diff -Nrcpad gcc-12.3.0/ChangeLog gcc-12.4.0/ChangeLog *** gcc-12.3.0/ChangeLog Mon May 8 12:15:03 2023 --- gcc-12.4.0/ChangeLog Thu Jun 20 08:09:01 2024 *************** *** 1,3 **** --- 1,15 ---- + 2024-06-20 Release Manager + + * GCC 12.4.0 released. + + 2024-04-22 Iain Sandoe + + Backported from master: + 2022-06-26 Iain Sandoe + + * configure: Regenerate. + * configure.ac: Correct use of $host. + 2023-05-08 Release Manager * GCC 12.3.0 released. diff -Nrcpad gcc-12.3.0/INSTALL/binaries.html gcc-12.4.0/INSTALL/binaries.html *** gcc-12.3.0/INSTALL/binaries.html Mon May 8 12:15:27 2023 --- gcc-12.4.0/INSTALL/binaries.html Thu Jun 20 08:10:31 2024 *************** *** 1,5 **** --- 1,8 ---- + + + - - - Installing GCC: Binaries --- 22,27 ---- *************** You have freedom to copy and modify this *** 29,58 **** --- 29,52 ---- + + *************** ul.no-bullet {list-style: none} *** 85,92 **** ! !

We are often asked about pre-compiled versions of GCC. While we cannot provide these for all platforms, below you’ll find links to binaries for --- 79,86 ---- ! !

We are often asked about pre-compiled versions of GCC. While we cannot provide these for all platforms, below you’ll find links to binaries for diff -Nrcpad gcc-12.3.0/INSTALL/build.html gcc-12.4.0/INSTALL/build.html *** gcc-12.3.0/INSTALL/build.html Mon May 8 12:15:26 2023 --- gcc-12.4.0/INSTALL/build.html Thu Jun 20 08:10:31 2024 *************** *** 1,5 **** --- 1,8 ---- + + + - - - Installing GCC: Building --- 22,27 ---- *************** You have freedom to copy and modify this *** 29,58 **** --- 29,52 ---- + + *************** ul.no-bullet {list-style: none} *** 82,88 **** !

Now that GCC is configured, you are ready to build the compiler and runtime libraries. --- 76,82 ---- !

Now that GCC is configured, you are ready to build the compiler and runtime libraries. *************** documentation, you need version 4.7 or l *** 129,135 **** want Info documentation to be regenerated. Releases contain Info documentation pre-built for the unmodified documentation in the release.

!

Building a native compiler

For a native build, the default configuration is to perform --- 123,129 ---- want Info documentation to be regenerated. Releases contain Info documentation pre-built for the unmodified documentation in the release.

!

Building a native compiler

For a native build, the default configuration is to perform *************** following example. This will save rough *** 172,179 **** the bootstrap and the final installation. (Libraries will still contain debugging information.)

!
! 
make BOOT_CFLAGS='-O' bootstrap

You can place non-default optimization flags into BOOT_CFLAGS; they --- 166,173 ---- the bootstrap and the final installation. (Libraries will still contain debugging information.)

!
! 
make BOOT_CFLAGS='-O' bootstrap

You can place non-default optimization flags into BOOT_CFLAGS; they *************** configure option --with-build-conf *** 224,241 **** examples of supported build configurations are:

!
‘bootstrap-O1’

Removes any -O-started option from BOOT_CFLAGS, and adds -O1 to it. ‘BUILD_CONFIG=bootstrap-O1’ is equivalent to ‘BOOT_CFLAGS='-g -O1'’.

!
‘bootstrap-O3’
!
‘bootstrap-Og’

Analogous to bootstrap-O1.

!
‘bootstrap-lto’

Enables Link-Time Optimization for host tools during bootstrapping. ‘BUILD_CONFIG=bootstrap-lto’ is equivalent to adding -flto to ‘BOOT_CFLAGS’. This option assumes that the host --- 218,235 ---- examples of supported build configurations are:

!
‘bootstrap-O1’

Removes any -O-started option from BOOT_CFLAGS, and adds -O1 to it. ‘BUILD_CONFIG=bootstrap-O1’ is equivalent to ‘BOOT_CFLAGS='-g -O1'’.

!
‘bootstrap-O3’
!
‘bootstrap-Og’

Analogous to bootstrap-O1.

!
‘bootstrap-lto’

Enables Link-Time Optimization for host tools during bootstrapping. ‘BUILD_CONFIG=bootstrap-lto’ is equivalent to adding -flto to ‘BOOT_CFLAGS’. This option assumes that the host *************** supports the linker plugin (e.g. GNU ld *** 243,249 **** version 2.21 or later).

!
‘bootstrap-lto-noplugin’

This option is similar to bootstrap-lto, but is intended for hosts that do not support the linker plugin. Without the linker plugin static libraries are not compiled with link-time optimizations. Since --- 237,243 ---- version 2.21 or later).

!
‘bootstrap-lto-noplugin’

This option is similar to bootstrap-lto, but is intended for hosts that do not support the linker plugin. Without the linker plugin static libraries are not compiled with link-time optimizations. Since *************** the GCC middle end and back end are in < *** 251,264 **** that only the front end is actually LTO optimized.

!
‘bootstrap-lto-lean’

This option is similar to bootstrap-lto, but is intended for faster build by only using LTO in the final bootstrap stage. With ‘make profiledbootstrap’ the LTO frontend is trained only on generator files.

!
‘bootstrap-debug’

Verifies that the compiler generates the same executable code, whether or not it is asked to emit debug information. To this end, this option builds stage2 host programs without debug information, and uses --- 245,258 ---- that only the front end is actually LTO optimized.

!
‘bootstrap-lto-lean’

This option is similar to bootstrap-lto, but is intended for faster build by only using LTO in the final bootstrap stage. With ‘make profiledbootstrap’ the LTO frontend is trained only on generator files.

!
‘bootstrap-debug’

Verifies that the compiler generates the same executable code, whether or not it is asked to emit debug information. To this end, this option builds stage2 host programs without debug information, and uses *************** info into identical object files. In ad *** 271,277 **** coverage, this option makes default bootstraps faster and leaner.

!
‘bootstrap-debug-big’

Rather than comparing stripped object files, as in bootstrap-debug, this option saves internal compiler dumps during stage2 and stage3 and compares them as well, which helps catch --- 265,271 ---- coverage, this option makes default bootstraps faster and leaner.

!
‘bootstrap-debug-big’

Rather than comparing stripped object files, as in bootstrap-debug, this option saves internal compiler dumps during stage2 and stage3 and compares them as well, which helps catch *************** additional potential problems, but at a *** 279,285 **** space. It can be specified in addition to ‘bootstrap-debug’.

!
‘bootstrap-debug-lean’

This option saves disk space compared with bootstrap-debug-big, but at the expense of some recompilation. Instead of saving the dumps of stage2 and stage3 until the final compare, it uses --- 273,279 ---- space. It can be specified in addition to ‘bootstrap-debug’.

!
‘bootstrap-debug-lean’

This option saves disk space compared with bootstrap-debug-big, but at the expense of some recompilation. Instead of saving the dumps of stage2 and stage3 until the final compare, it uses *************** during stage3, repeating the compilation *** 288,294 **** stage2, whose dumps were not saved.

!
‘bootstrap-debug-lib’

This option tests executable code invariance over debug information generation on target libraries, just like bootstrap-debug-lean tests it on host programs. It builds stage3 libraries with --- 282,288 ---- stage2, whose dumps were not saved.

!
‘bootstrap-debug-lib’

This option tests executable code invariance over debug information generation on target libraries, just like bootstrap-debug-lean tests it on host programs. It builds stage3 libraries with *************** in stage2 are used in stage3 host progra *** 302,308 **** compile stage2 libraries with different options for comparison purposes.

!
‘bootstrap-debug-ckovw’

Arranges for error messages to be issued if the compiler built on any stage is run without the option -fcompare-debug. This is useful to verify the full -fcompare-debug testing coverage. It --- 296,302 ---- compile stage2 libraries with different options for comparison purposes.

!
‘bootstrap-debug-ckovw’

Arranges for error messages to be issued if the compiler built on any stage is run without the option -fcompare-debug. This is useful to verify the full -fcompare-debug testing coverage. It *************** must be used along with bootstrap- *** 310,316 **** bootstrap-debug-lib.

!
‘bootstrap-cet’

This option enables Intel CET for host tools during bootstrapping. ‘BUILD_CONFIG=bootstrap-cet’ is equivalent to adding -fcf-protection to ‘BOOT_CFLAGS’. This option --- 304,310 ---- bootstrap-debug-lib.

!
‘bootstrap-cet’

This option enables Intel CET for host tools during bootstrapping. ‘BUILD_CONFIG=bootstrap-cet’ is equivalent to adding -fcf-protection to ‘BOOT_CFLAGS’. This option *************** assumes that the host supports Intel CET *** 318,335 **** 2.30 or later).

!
‘bootstrap-time’

Arranges for the run time of each program started by the GCC driver, built in any stage, to be logged to time.log, in the top level of the build tree.

!
‘bootstrap-asan’

Compiles GCC itself using Address Sanitization in order to catch invalid memory accesses within the GCC code.

!
‘bootstrap-hwasan’

Compiles GCC itself using HWAddress Sanitization in order to catch invalid memory accesses within the GCC code. This option is only available on AArch64 systems that are running Linux kernel version 5.4 or later. --- 312,329 ---- 2.30 or later).

!
‘bootstrap-time’

Arranges for the run time of each program started by the GCC driver, built in any stage, to be logged to time.log, in the top level of the build tree.

!
‘bootstrap-asan’

Compiles GCC itself using Address Sanitization in order to catch invalid memory accesses within the GCC code.

!
‘bootstrap-hwasan’

Compiles GCC itself using HWAddress Sanitization in order to catch invalid memory accesses within the GCC code. This option is only available on AArch64 systems that are running Linux kernel version 5.4 or later. *************** systems that are running Linux kernel ve *** 337,343 ****

!

Building a cross compiler

When building a cross compiler, it is not generally possible to do a --- 331,338 ----

!
!

Building a cross compiler

When building a cross compiler, it is not generally possible to do a *************** configuring GCC. Put them in the direct *** 375,394 **** you should put in this directory:

!
as

This should be the cross-assembler.

!
ld

This should be the cross-linker.

!
ar

This should be the cross-archiver: a program which can manipulate archive files (linker libraries) in the target machine’s format.

!
ranlib

This should be a program to construct a symbol table in an archive file.

--- 370,389 ---- you should put in this directory:

!
as

This should be the cross-assembler.

!
ld

This should be the cross-linker.

!
ar

This should be the cross-archiver: a program which can manipulate archive files (linker libraries) in the target machine’s format.

!
ranlib

This should be a program to construct a symbol table in an archive file.

*************** alternatives for crt0.o, fo *** 415,421 **** compilation options. Check your target’s definition of STARTFILE_SPEC to find out what start files it uses.

!

Building in parallel

GNU Make 3.80 and above, which is necessary to build GCC, support --- 410,417 ---- compilation options. Check your target’s definition of STARTFILE_SPEC to find out what start files it uses.

!
!

Building in parallel

GNU Make 3.80 and above, which is necessary to build GCC, support *************** your machine will result in fewer and sh *** 426,442 **** improving overall throughput; this is especially true for slow drives and network filesystems.

!

Building the Ada compiler

GNAT prerequisites.

!

Building the D compiler

GDC prerequisites.

!

Building with profile feedback

It is possible to use profile feedback to optimize the compiler itself. This --- 422,441 ---- improving overall throughput; this is especially true for slow drives and network filesystems.

!
!

Building the Ada compiler

GNAT prerequisites.

!
!

Building the D compiler

GDC prerequisites.

!
!

Building with profile feedback

It is possible to use profile feedback to optimize the compiler itself. This *************** the code quality may be much worse. *** 476,482 **** !

--- 475,481 ---- !
diff -Nrcpad gcc-12.3.0/INSTALL/configure.html gcc-12.4.0/INSTALL/configure.html *** gcc-12.3.0/INSTALL/configure.html Mon May 8 12:15:26 2023 --- gcc-12.4.0/INSTALL/configure.html Thu Jun 20 08:10:30 2024 *************** *** 1,5 **** --- 1,8 ---- + + + - - - Installing GCC: Configuration --- 22,27 ---- *************** You have freedom to copy and modify this *** 29,58 **** --- 29,52 ---- + + *************** ul.no-bullet {list-style: none} *** 81,88 **** ! !

Like most GNU software, GCC must be configured before it can be built. This document describes the recommended configuration procedure --- 75,82 ---- ! !

Like most GNU software, GCC must be configured before it can be built. This document describes the recommended configuration procedure *************** scripts may fail. *** 128,148 ****

To configure GCC:

!
! 
% mkdir objdir
  % cd objdir
  % srcdir/configure [options] [target]
! !

Distributor options

If you will be distributing binary versions of GCC, with modifications to the source code, you should use the options described in this section to make clear that your version contains modifications.

!
--with-pkgversion=version

Specify a string that identifies your package. You may wish to include a build number or build date. This version string will be included in the output of gcc --version. This suffix does --- 122,141 ----

To configure GCC:

!
! 
% mkdir objdir
  % cd objdir
  % srcdir/configure [options] [target]
!

Distributor options

If you will be distributing binary versions of GCC, with modifications to the source code, you should use the options described in this section to make clear that your version contains modifications.

!
--with-pkgversion=version

Specify a string that identifies your package. You may wish to include a build number or build date. This version string will be included in the output of gcc --version. This suffix does *************** not replace the default version string, *** 151,157 ****

The default value is ‘GCC’.

!
--with-bugurl=url

Specify the URL that users should visit if they wish to report a bug. You are of course welcome to forward bugs reported to you to the FSF, if you determine that they are not bugs in your modifications. --- 144,150 ----

The default value is ‘GCC’.

!
--with-bugurl=url

Specify the URL that users should visit if they wish to report a bug. You are of course welcome to forward bugs reported to you to the FSF, if you determine that they are not bugs in your modifications. *************** if you determine that they are not bugs *** 159,172 ****

The default value refers to the FSF’s GCC bug tracker.

!
--with-documentation-root-url=url

Specify the URL root that contains GCC option documentation. The url should end with a / character.

The default value is https://gcc.gnu.org/onlinedocs/.

!
--with-changes-root-url=url

Specify the URL root that contains information about changes in GCC releases like gcc-version/changes.html. The url should end with a / character. --- 152,165 ----

The default value refers to the FSF’s GCC bug tracker.

!
--with-documentation-root-url=url

Specify the URL root that contains GCC option documentation. The url should end with a / character.

The default value is https://gcc.gnu.org/onlinedocs/.

!
--with-changes-root-url=url

Specify the URL root that contains information about changes in GCC releases like gcc-version/changes.html. The url should end with a / character. *************** The url should end with a

! !

Host, Build and Target specification

Specify the host, build and target machine configurations. You do this when you run the configure script. --- 169,175 ----

!

Host, Build and Target specification

Specify the host, build and target machine configurations. You do this when you run the configure script. *************** the same as the host machine. *** 201,208 ****

Here is an example:

!
! 
./configure --host=x86_64-pc-linux-gnu

A configuration name may be canonical or it may be more or less --- 193,200 ----

Here is an example:

!
! 
./configure --host=x86_64-pc-linux-gnu

A configuration name may be canonical or it may be more or less *************** rtems, solarisversion, symbia *** 239,246 **** vxworks, vxworksae, vxworksmils

! !

Options specification

Use options to override several configure time options for GCC. A list of supported options follows; ‘configure --- 231,237 ---- vxworks, vxworksae, vxworksmils

!

Options specification

Use options to override several configure time options for GCC. A list of supported options follows; ‘configure *************** work and should not normally be used. *** 252,258 **** corresponding --without option.

!
--prefix=dirname

Specify the toplevel installation directory. This is the recommended way to install the tools into a directory other than the default. The toplevel installation directory defaults to --- 243,249 ---- corresponding --without option.

!
--prefix=dirname

Specify the toplevel installation directory. This is the recommended way to install the tools into a directory other than the default. The toplevel installation directory defaults to *************** beneath a user’s home directory tr *** 267,329 ****

The following standard autoconf options are supported. Normally you should not need to use these options.

!
--exec-prefix=dirname

Specify the toplevel installation directory for architecture-dependent files. The default is prefix.

!
--bindir=dirname

Specify the installation directory for the executables called by users (such as gcc and g++). The default is exec-prefix/bin.

!
--libdir=dirname

Specify the installation directory for object code libraries and internal data files of GCC. The default is exec-prefix/lib.

!
--libexecdir=dirname

Specify the installation directory for internal executables of GCC. The default is exec-prefix/libexec.

!
--with-slibdir=dirname

Specify the installation directory for the shared libgcc library. The default is libdir.

!
--datarootdir=dirname

Specify the root of the directory tree for read-only architecture-independent data files referenced by GCC. The default is prefix/share.

!
--infodir=dirname

Specify the installation directory for documentation in info format. The default is datarootdir/info.

!
--datadir=dirname

Specify the installation directory for some architecture-independent data files referenced by GCC. The default is datarootdir.

!
--docdir=dirname

Specify the installation directory for documentation files (other than Info) for GCC. The default is datarootdir/doc.

!
--htmldir=dirname

Specify the installation directory for HTML documentation files. The default is docdir.

!
--pdfdir=dirname

Specify the installation directory for PDF documentation files. The default is docdir.

!
--mandir=dirname

Specify the installation directory for manual pages. The default is datarootdir/man. (Note that the manual pages are only extracts from the full GCC manuals, which are provided in Texinfo format. The manpages --- 258,320 ----

The following standard autoconf options are supported. Normally you should not need to use these options.

!
--exec-prefix=dirname

Specify the toplevel installation directory for architecture-dependent files. The default is prefix.

!
--bindir=dirname

Specify the installation directory for the executables called by users (such as gcc and g++). The default is exec-prefix/bin.

!
--libdir=dirname

Specify the installation directory for object code libraries and internal data files of GCC. The default is exec-prefix/lib.

!
--libexecdir=dirname

Specify the installation directory for internal executables of GCC. The default is exec-prefix/libexec.

!
--with-slibdir=dirname

Specify the installation directory for the shared libgcc library. The default is libdir.

!
--datarootdir=dirname

Specify the root of the directory tree for read-only architecture-independent data files referenced by GCC. The default is prefix/share.

!
--infodir=dirname

Specify the installation directory for documentation in info format. The default is datarootdir/info.

!
--datadir=dirname

Specify the installation directory for some architecture-independent data files referenced by GCC. The default is datarootdir.

!
--docdir=dirname

Specify the installation directory for documentation files (other than Info) for GCC. The default is datarootdir/doc.

!
--htmldir=dirname

Specify the installation directory for HTML documentation files. The default is docdir.

!
--pdfdir=dirname

Specify the installation directory for PDF documentation files. The default is docdir.

!
--mandir=dirname

Specify the installation directory for manual pages. The default is datarootdir/man. (Note that the manual pages are only extracts from the full GCC manuals, which are provided in Texinfo format. The manpages *************** are derived by an automatic conversion p *** 331,344 **** manual.)

!
--with-gxx-include-dir=dirname

Specify the installation directory for G++ header files. The default depends on other configuration options, and differs between cross and native configurations.

!
--with-specs=specs

Specify additional command line driver SPECS. This can be useful if you need to turn on a non-standard feature by default without modifying the compiler’s source code, for instance --- 322,335 ---- manual.)

!
--with-gxx-include-dir=dirname

Specify the installation directory for G++ header files. The default depends on other configuration options, and differs between cross and native configurations.

!
--with-specs=specs

Specify additional command line driver SPECS. This can be useful if you need to turn on a non-standard feature by default without modifying the compiler’s source code, for instance *************** See “Spec Files” in the main *** 349,355 ****

!
--program-prefix=prefix

GCC supports some transformations of the names of its programs when installing them. This option prepends prefix to the names of programs to install in bindir (see above). For example, specifying --- 340,346 ----

!
--program-prefix=prefix

GCC supports some transformations of the names of its programs when installing them. This option prepends prefix to the names of programs to install in bindir (see above). For example, specifying *************** programs to install in bindir *** 357,370 **** being installed as /usr/local/bin/foo-gcc.

!
--program-suffix=suffix

Appends suffix to the names of programs to install in bindir (see above). For example, specifying --program-suffix=-3.1 would result in ‘gcc’ being installed as /usr/local/bin/gcc-3.1.

!
--program-transform-name=pattern

Applies the ‘sed’ script pattern to be applied to the names of programs to install in bindir (see above). pattern has to consist of one or more basic ‘sed’ editing commands, separated by --- 348,361 ---- being installed as /usr/local/bin/foo-gcc.

!
--program-suffix=suffix

Appends suffix to the names of programs to install in bindir (see above). For example, specifying --program-suffix=-3.1 would result in ‘gcc’ being installed as /usr/local/bin/gcc-3.1.

!
--program-transform-name=pattern

Applies the ‘sed’ script pattern to be applied to the names of programs to install in bindir (see above). pattern has to consist of one or more basic ‘sed’ editing commands, separated by *************** resulting binary would be installed as *** 397,403 **** transformed yet, which will be fixed in some time.

!
--with-local-prefix=dirname

Specify the installation directory for local include files. The default is /usr/local. Specify this option if you want the compiler to --- 388,394 ---- transformed yet, which will be fixed in some time.

!
--with-local-prefix=dirname

Specify the installation directory for local include files. The default is /usr/local. Specify this option if you want the compiler to *************** install part of GCC. Perhaps they make *** 470,481 **** installing GCC creates the directory.

!
--with-gcc-major-version-only

Specifies that GCC should use only the major number rather than major.minor.patchlevel in filesystem paths.

!
--with-native-system-header-dir=dirname

Specifies that dirname is the directory that contains native system header files, rather than /usr/include. This option is most useful if you are creating a compiler that should be isolated from the system --- 461,472 ---- installing GCC creates the directory.

!
--with-gcc-major-version-only

Specifies that GCC should use only the major number rather than major.minor.patchlevel in filesystem paths.

!
--with-native-system-header-dir=dirname

Specifies that dirname is the directory that contains native system header files, rather than /usr/include. This option is most useful if you are creating a compiler that should be isolated from the system *************** as much as possible. It is most commonl *** 484,490 **** dirname inside the system root specified by that option.

!
--enable-shared[=package[,…]]

Build shared versions of libraries, if shared libraries are supported on the target platform. Unlike GCC 2.95.x and earlier, shared libraries are enabled by default on all platforms that support shared libraries. --- 475,481 ---- dirname inside the system root specified by that option.

!
--enable-shared[=package[,…]]

Build shared versions of libraries, if shared libraries are supported on the target platform. Unlike GCC 2.95.x and earlier, shared libraries are enabled by default on all platforms that support shared libraries. *************** argument, only --enable-shared

!
--enable-host-shared

Specify that the host code should be built into position-independent machine code (with -fPIC), allowing it to be used within shared libraries, but yielding a slightly slower compiler. --- 496,502 ---- code.

!
--enable-host-shared

Specify that the host code should be built into position-independent machine code (with -fPIC), allowing it to be used within shared libraries, but yielding a slightly slower compiler. *************** but yielding a slightly slower compiler. *** 516,522 **** libraries.

!
--with-gnu-as

Specify that the compiler should assume that the assembler it finds is the GNU assembler. However, this does not modify the rules to find an assembler and will result in confusion if the --- 507,513 ---- libraries.

!
--with-gnu-as

Specify that the compiler should assume that the assembler it finds is the GNU assembler. However, this does not modify the rules to find an assembler and will result in confusion if the *************** whether you use the GNU assembler. On a *** 539,545 ****

!
--with-as=pathname

Specify that the compiler should use the assembler pointed to by pathname, rather than the one found by the standard rules to find an assembler, which are: --- 530,536 ----

!
--with-as=pathname

Specify that the compiler should use the assembler pointed to by pathname, rather than the one found by the standard rules to find an assembler, which are: *************** assemblers installed and want to choose *** 572,600 **** above rules.

!
--with-gnu-ld

Same as --with-gnu-as but for the linker.

!
--with-ld=pathname

Same as --with-as but for the linker.

!
--with-dsymutil=pathname

Same as --with-as but for the debug linker (only used on Darwin platforms so far).

!
--with-tls=dialect

Specify the default TLS dialect, for systems were there is a choice. For ARM targets, possible values for dialect are gnu or gnu2, which select between the original GNU dialect and the GNU TLS descriptor-based dialect.

!
--enable-multiarch

Specify whether to enable or disable multiarch support. The default is to check for glibc start files in a multiarch location, and enable it if the files are found. The auto detection is enabled for native builds, --- 563,591 ---- above rules.

!
--with-gnu-ld

Same as --with-gnu-as but for the linker.

!
--with-ld=pathname

Same as --with-as but for the linker.

!
--with-dsymutil=pathname

Same as --with-as but for the debug linker (only used on Darwin platforms so far).

!
--with-tls=dialect

Specify the default TLS dialect, for systems were there is a choice. For ARM targets, possible values for dialect are gnu or gnu2, which select between the original GNU dialect and the GNU TLS descriptor-based dialect.

!
--enable-multiarch

Specify whether to enable or disable multiarch support. The default is to check for glibc start files in a multiarch location, and enable it if the files are found. The auto detection is enabled for native builds, *************** More documentation about multiarch can b *** 604,616 **** https://wiki.debian.org/Multiarch.

!
--enable-sjlj-exceptions

Force use of the setjmp/longjmp-based scheme for exceptions. ‘configure’ ordinarily picks the correct value based on the platform. Only use this option if you are sure you need a different setting.

!
--enable-vtable-verify

Specify whether to enable or disable the vtable verification feature. Enabling this feature causes libstdc++ to be built with its virtual calls in verifiable mode. This means that, when linked with libvtv, every --- 595,607 ---- https://wiki.debian.org/Multiarch.

!
--enable-sjlj-exceptions

Force use of the setjmp/longjmp-based scheme for exceptions. ‘configure’ ordinarily picks the correct value based on the platform. Only use this option if you are sure you need a different setting.

!
--enable-vtable-verify

Specify whether to enable or disable the vtable verification feature. Enabling this feature causes libstdc++ to be built with its virtual calls in verifiable mode. This means that, when linked with libvtv, every *************** still be built (see --disable-libv *** 623,634 **** --disable-vtable-verify is the default.

!
--disable-gcov

Specify that the run-time library used for coverage analysis and associated host tools should not be built.

!
--disable-multilib

Specify that multiple target libraries to support different target variants, calling conventions, etc. should not be built. The default is to build a --- 614,625 ---- --disable-vtable-verify is the default.

!
--disable-gcov

Specify that the run-time library used for coverage analysis and associated host tools should not be built.

!
--disable-multilib

Specify that multiple target libraries to support different target variants, calling conventions, etc. should not be built. The default is to build a *************** predefined set of them. *** 637,659 ****

Some targets provide finer-grained control over which multilibs are built (e.g., --disable-softfloat):

!
arm-*-*

fpu, 26bit, underscore, interwork, biendian, nofmult.

!
m68*-*-*

softfloat, m68881, m68000, m68020.

!
mips*-*-*

single-float, biendian, softfloat.

!
msp430-*-*

no-exceptions

!
powerpc*-*-*, rs6000*-*-*

aix64, pthread, softfloat, powercpu, powerpccpu, powerpcos, biendian, sysv, aix.

--- 628,650 ----

Some targets provide finer-grained control over which multilibs are built (e.g., --disable-softfloat):

!
arm-*-*

fpu, 26bit, underscore, interwork, biendian, nofmult.

!
m68*-*-*

softfloat, m68881, m68000, m68020.

!
mips*-*-*

single-float, biendian, softfloat.

!
msp430-*-*

no-exceptions

!
powerpc*-*-*, rs6000*-*-*

aix64, pthread, softfloat, powercpu, powerpccpu, powerpcos, biendian, sysv, aix.

*************** sysv, aix. *** 661,668 ****
!
--with-multilib-list=list
!
--without-multilib-list

Specify what multilibs to build. list is a comma separated list of values, possibly consisting of a single value. Currently only implemented for aarch64*-*-*, arm*-*-*, loongarch64-*-*, riscv*-*-*, sh*-*-* and --- 652,659 ----

!
--with-multilib-list=list
!
--without-multilib-list

Specify what multilibs to build. list is a comma separated list of values, possibly consisting of a single value. Currently only implemented for aarch64*-*-*, arm*-*-*, loongarch64-*-*, riscv*-*-*, sh*-*-* and *************** x86-64-*-linux*. The accepted values an *** 670,676 **** below.

!
aarch64*-*-*

list is a comma separated list of ilp32, and lp64 to enable ILP32 and LP64 run-time libraries, respectively. If list is empty, then there will be no multilibs and only the --- 661,667 ---- below.

!
aarch64*-*-*

list is a comma separated list of ilp32, and lp64 to enable ILP32 and LP64 run-time libraries, respectively. If list is empty, then there will be no multilibs and only the *************** default set of libraries is selected bas *** 680,686 **** --target.

!
arm*-*-*

list is a comma separated list of aprofile and rmprofile to build multilibs for A or R and M architecture profiles respectively. Note that, due to some limitation of the current --- 671,677 ---- --target.

!
arm*-*-*

list is a comma separated list of aprofile and rmprofile to build multilibs for A or R and M architecture profiles respectively. Note that, due to some limitation of the current *************** profile. The union of these options is *** 742,748 ****

!
loongarch*-*-*

list is a comma-separated list of the following ABI identifiers: lp64d[/base] lp64f[/base] lp64d[/base], where the /base suffix may be omitted, to enable their respective run-time --- 733,739 ----

!
loongarch*-*-*

list is a comma-separated list of the following ABI identifiers: lp64d[/base] lp64f[/base] lp64d[/base], where the /base suffix may be omitted, to enable their respective run-time *************** or if --with-multilib-list *** 751,757 **** as specified by --with-abi or implied by --target is selected.

!
riscv*-*-*

list is a single ABI name. The target architecture must be either rv32gc or rv64gc. This will build a single multilib for the specified architecture and ABI pair. If --with-multilib-list is not --- 742,748 ---- as specified by --with-abi or implied by --target is selected.

!
riscv*-*-*

list is a single ABI name. The target architecture must be either rv32gc or rv64gc. This will build a single multilib for the specified architecture and ABI pair. If --with-multilib-list is not *************** given, then a default set of multilibs i *** 759,765 **** --target. This is usually a large set of multilibs.

!
sh*-*-*

list is a comma separated list of CPU names. These must be of the form sh* or m* (in which case they match the compiler option for that processor). The list should not contain any endian options - --- 750,756 ---- --target. This is usually a large set of multilibs.

!
sh*-*-*

list is a comma separated list of CPU names. These must be of the form sh* or m* (in which case they match the compiler option for that processor). The list should not contain any endian options - *************** specialized subset. *** 780,798 ****

Example 1: to configure a compiler for SH4A only, but supporting both endians, with little endian being the default: !

! 
--with-cpu=sh4a --with-endian=little,big --with-multilib-list=

Example 2: to configure a compiler for both SH4A and SH4AL-DSP, but with only little endian SH4AL: !

! 
--with-cpu=sh4a --with-endian=little,big \
  --with-multilib-list=sh4al,!mb/m4al
!
x86-64-*-linux*

list is a comma separated list of m32, m64 and mx32 to enable 32-bit, 64-bit and x32 run-time libraries, respectively. If list is empty, then there will be no multilibs --- 771,789 ----

Example 1: to configure a compiler for SH4A only, but supporting both endians, with little endian being the default: !

! 
--with-cpu=sh4a --with-endian=little,big --with-multilib-list=

Example 2: to configure a compiler for both SH4A and SH4AL-DSP, but with only little endian SH4AL: !

! 
--with-cpu=sh4a --with-endian=little,big \
  --with-multilib-list=sh4al,!mb/m4al
!
x86-64-*-linux*

list is a comma separated list of m32, m64 and mx32 to enable 32-bit, 64-bit and x32 run-time libraries, respectively. If list is empty, then there will be no multilibs *************** and only the default run-time library wi *** 804,810 ****

!
--with-multilib-generator=config

Specify what multilibs to build. config is a semicolon separated list of values, possibly consisting of a single value. Currently only implemented for riscv*-*-elf*. The accepted values and meanings are given below. --- 795,801 ----

!
--with-multilib-generator=config

Specify what multilibs to build. config is a semicolon separated list of values, possibly consisting of a single value. Currently only implemented for riscv*-*-elf*. The accepted values and meanings are given below. *************** for riscv*-*-elf*. The accepted values *** 814,838 **** reuse rule with architecture string and reuse rule with sub-extension.

Example 1: Add multi-lib suppport for rv32i with ilp32. !

! 
rv32i-ilp32--

Example 2: Add multi-lib suppport for rv32i with ilp32 and rv32imafd with ilp32. !

! 
rv32i-ilp32--;rv32imafd-ilp32--

Example 3: Add multi-lib suppport for rv32i with ilp32; rv32im with ilp32 and rv32ic with ilp32 will reuse this multi-lib set. !

! 
rv32i-ilp32-rv32im-c

Example 4: Add multi-lib suppport for rv64ima with lp64; rv64imaf with lp64, rv64imac with lp64 and rv64imafc with lp64 will reuse this multi-lib set. !

! 
rv64ima-lp64--f,c,fc

--with-multilib-generator have an optional configuration argument --- 805,829 ---- reuse rule with architecture string and reuse rule with sub-extension.

Example 1: Add multi-lib suppport for rv32i with ilp32. !

! 
rv32i-ilp32--

Example 2: Add multi-lib suppport for rv32i with ilp32 and rv32imafd with ilp32. !

! 
rv32i-ilp32--;rv32imafd-ilp32--

Example 3: Add multi-lib suppport for rv32i with ilp32; rv32im with ilp32 and rv32ic with ilp32 will reuse this multi-lib set. !

! 
rv32i-ilp32-rv32im-c

Example 4: Add multi-lib suppport for rv64ima with lp64; rv64imaf with lp64, rv64imac with lp64 and rv64imafc with lp64 will reuse this multi-lib set. !

! 
rv64ima-lp64--f,c,fc

--with-multilib-generator have an optional configuration argument *************** currently we support medlow and medany. *** 842,880 ****

Example 5: Add multi-lib suppport for rv64ima with lp64; rv64ima with lp64 and medlow code model !

! 
rv64ima-lp64--;--cmodel=medlow

Example 6: Add multi-lib suppport for rv64ima with lp64; rv64ima with lp64 and medlow code model; rv64ima with lp64 and medany code model !

! 
rv64ima-lp64--;--cmodel=medlow,medany
!
--with-endian=endians

Specify what endians to use. Currently only implemented for sh*-*-*.

endians may be one of the following:

!
big

Use big endian exclusively.

!
little

Use little endian exclusively.

!
big,little

Use big endian by default. Provide a multilib for little endian.

!
little,big

Use little endian by default. Provide a multilib for big endian.

!
--enable-threads

Specify that the target supports threads. This affects the Objective-C compiler and runtime library, and exception handling for other languages like C++. --- 833,871 ----

Example 5: Add multi-lib suppport for rv64ima with lp64; rv64ima with lp64 and medlow code model !

! 
rv64ima-lp64--;--cmodel=medlow

Example 6: Add multi-lib suppport for rv64ima with lp64; rv64ima with lp64 and medlow code model; rv64ima with lp64 and medany code model !

! 
rv64ima-lp64--;--cmodel=medlow,medany
!
--with-endian=endians

Specify what endians to use. Currently only implemented for sh*-*-*.

endians may be one of the following:

!
big

Use big endian exclusively.

!
little

Use little endian exclusively.

!
big,little

Use big endian by default. Provide a multilib for little endian.

!
little,big

Use little endian by default. Provide a multilib for big endian.

!
--enable-threads

Specify that the target supports threads. This affects the Objective-C compiler and runtime library, and exception handling for other languages like C++. *************** available for the system. In this case, *** 887,941 **** alias for --enable-threads=single.

!
--disable-threads

Specify that threading support should be disabled for the system. This is an alias for --enable-threads=single.

!
--enable-threads=lib

Specify that lib is the thread support library. This affects the Objective-C compiler and runtime library, and exception handling for other languages like C++. The possibilities for lib are:

!
aix

AIX thread support.

!
dce

DCE thread support.

!
lynx

LynxOS thread support.

!
mipssde

MIPS SDE thread support.

!
no

This is an alias for ‘single’.

!
posix

Generic POSIX/Unix98 thread support.

!
rtems

RTEMS thread support.

!
single

Disable thread support, should work for all platforms.

!
tpf

TPF thread support.

!
vxworks

VxWorks thread support.

!
win32

Microsoft Win32 API thread support.

!
--enable-tls

Specify that the target supports TLS (Thread Local Storage). Usually configure can correctly determine if TLS is supported. In cases where it guesses incorrectly, TLS can be explicitly enabled or disabled with --- 878,932 ---- alias for --enable-threads=single.

!
--disable-threads

Specify that threading support should be disabled for the system. This is an alias for --enable-threads=single.

!
--enable-threads=lib

Specify that lib is the thread support library. This affects the Objective-C compiler and runtime library, and exception handling for other languages like C++. The possibilities for lib are:

!
aix

AIX thread support.

!
dce

DCE thread support.

!
lynx

LynxOS thread support.

!
mipssde

MIPS SDE thread support.

!
no

This is an alias for ‘single’.

!
posix

Generic POSIX/Unix98 thread support.

!
rtems

RTEMS thread support.

!
single

Disable thread support, should work for all platforms.

!
tpf

TPF thread support.

!
vxworks

VxWorks thread support.

!
win32

Microsoft Win32 API thread support.

!
--enable-tls

Specify that the target supports TLS (Thread Local Storage). Usually configure can correctly determine if TLS is supported. In cases where it guesses incorrectly, TLS can be explicitly enabled or disabled with *************** the assembler supports TLS but the C lib *** 944,963 **** assumptions made by the configure test are incorrect.

!
--disable-tls

Specify that the target does not support TLS. This is an alias for --enable-tls=no.

!
--disable-tm-clone-registry

Disable TM clone registry in libgcc. It is enabled in libgcc by default. This option helps to reduce code size for embedded targets which do not use transactional memory.

!
--with-cpu=cpu
!
--with-cpu-32=cpu
!
--with-cpu-64=cpu

Specify which cpu variant the compiler should generate code for by default. cpu will be used as the default value of the -mcpu= switch. This option is only supported on some targets, including ARC, ARM, i386, M68k, --- 935,954 ---- assumptions made by the configure test are incorrect.

!
--disable-tls

Specify that the target does not support TLS. This is an alias for --enable-tls=no.

!
--disable-tm-clone-registry

Disable TM clone registry in libgcc. It is enabled in libgcc by default. This option helps to reduce code size for embedded targets which do not use transactional memory.

!
--with-cpu=cpu
!
--with-cpu-32=cpu
!
--with-cpu-64=cpu

Specify which cpu variant the compiler should generate code for by default. cpu will be used as the default value of the -mcpu= switch. This option is only supported on some targets, including ARC, ARM, i386, M68k, *************** PowerPC, and SPARC. It is mandatory for *** 967,982 **** x86-64, PowerPC, and SPARC.

!
--with-schedule=cpu
!
--with-arch=cpu
!
--with-arch-32=cpu
!
--with-arch-64=cpu
!
--with-tune=cpu
!
--with-tune-32=cpu
!
--with-tune-64=cpu
!
--with-abi=abi
!
--with-fpu=type
!
--with-float=type

These configure options provide default values for the -mschedule=, -march=, -mtune=, -mabi=, and -mfpu= options and for -mhard-float or -msoft-float. As with --- 958,973 ---- x86-64, PowerPC, and SPARC.

!
--with-schedule=cpu
!
--with-arch=cpu
!
--with-arch-32=cpu
!
--with-arch-64=cpu
!
--with-tune=cpu
!
--with-tune-32=cpu
!
--with-tune-64=cpu
!
--with-abi=abi
!
--with-fpu=type
!
--with-float=type

These configure options provide default values for the -mschedule=, -march=, -mtune=, -mabi=, and -mfpu= options and for -mhard-float or -msoft-float. As with *************** options and for -mhard-float

!
--with-mode=mode

Specify if the compiler should default to -marm or -mthumb. This option is only supported on ARM targets.

!
--with-stack-offset=num

This option sets the default for the -mstack-offset=num option, and will thus generally also control the setting of this option for libraries. This option is only supported on Epiphany targets.

!
--with-fpmath=isa

This options sets -mfpmath=sse by default and specifies the default ISA for floating-point arithmetics. You can select either ‘sse’ which enables -msse2 or ‘avx’ which enables -mavx by default. This option is only supported on i386 and x86-64 targets.

!
--with-fp-32=mode

On MIPS targets, set the default value for the -mfp option when using the o32 ABI. The possibilities for mode are:

!
32

Use the o32 FP32 ABI extension, as with the -mfp32 command-line option.

!
xx

Use the o32 FPXX ABI extension, as with the -mfpxx command-line option.

!
64

Use the o32 FP64 ABI extension, as with the -mfp64 command-line option.

--- 975,1011 ---- of the arguments depend on the target.

!
--with-mode=mode

Specify if the compiler should default to -marm or -mthumb. This option is only supported on ARM targets.

!
--with-stack-offset=num

This option sets the default for the -mstack-offset=num option, and will thus generally also control the setting of this option for libraries. This option is only supported on Epiphany targets.

!
--with-fpmath=isa

This options sets -mfpmath=sse by default and specifies the default ISA for floating-point arithmetics. You can select either ‘sse’ which enables -msse2 or ‘avx’ which enables -mavx by default. This option is only supported on i386 and x86-64 targets.

!
--with-fp-32=mode

On MIPS targets, set the default value for the -mfp option when using the o32 ABI. The possibilities for mode are:

!
32

Use the o32 FP32 ABI extension, as with the -mfp32 command-line option.

!
xx

Use the o32 FPXX ABI extension, as with the -mfpxx command-line option.

!
64

Use the o32 FP64 ABI extension, as with the -mfp64 command-line option.

*************** option. *** 1023,1049 **** FP32 ABI extension.

!
--with-odd-spreg-32

On MIPS targets, set the -modd-spreg option by default when using the o32 ABI.

!
--without-odd-spreg-32

On MIPS targets, set the -mno-odd-spreg option by default when using the o32 ABI. This is normally used in conjunction with --with-fp-32=64 in order to target the o32 FP64A ABI extension.

!
--with-nan=encoding

On MIPS targets, set the default encoding convention to use for the special not-a-number (NaN) IEEE 754 floating-point data. The possibilities for encoding are:

!
legacy

Use the legacy encoding, as with the -mnan=legacy command-line option.

!
2008

Use the 754-2008 encoding, as with the -mnan=2008 command-line option.

--- 1014,1040 ---- FP32 ABI extension.

!
--with-odd-spreg-32

On MIPS targets, set the -modd-spreg option by default when using the o32 ABI.

!
--without-odd-spreg-32

On MIPS targets, set the -mno-odd-spreg option by default when using the o32 ABI. This is normally used in conjunction with --with-fp-32=64 in order to target the o32 FP64A ABI extension.

!
--with-nan=encoding

On MIPS targets, set the default encoding convention to use for the special not-a-number (NaN) IEEE 754 floating-point data. The possibilities for encoding are:

!
legacy

Use the legacy encoding, as with the -mnan=legacy command-line option.

!
2008

Use the 754-2008 encoding, as with the -mnan=2008 command-line option.

*************** the legacy encoding, as when neither of *** 1055,1104 **** -mnan=legacy command-line options has been used.

!
--with-divide=type

Specify how the compiler should generate code for checking for division by zero. This option is only supported on the MIPS target. The possibilities for type are:

!
traps

Division by zero checks use conditional traps (this is the default on systems that support conditional traps).

!
breaks

Division by zero checks use the break instruction.

!
--with-llsc

On MIPS targets, make -mllsc the default when no -mno-llsc option is passed. This is the default for Linux-based targets, as the kernel will emulate them if the ISA does not provide them.

!
--without-llsc

On MIPS targets, make -mno-llsc the default when no -mllsc option is passed.

!
--with-synci

On MIPS targets, make -msynci the default when no -mno-synci option is passed.

!
--without-synci

On MIPS targets, make -mno-synci the default when no -msynci option is passed. This is the default.

!
--with-lxc1-sxc1

On MIPS targets, make -mlxc1-sxc1 the default when no -mno-lxc1-sxc1 option is passed. This is the default.

!
--without-lxc1-sxc1

On MIPS targets, make -mno-lxc1-sxc1 the default when no -mlxc1-sxc1 option is passed. The indexed load/store instructions are not directly a problem but can lead to unexpected --- 1046,1095 ---- -mnan=legacy command-line options has been used.

!
--with-divide=type

Specify how the compiler should generate code for checking for division by zero. This option is only supported on the MIPS target. The possibilities for type are:

!
traps

Division by zero checks use conditional traps (this is the default on systems that support conditional traps).

!
breaks

Division by zero checks use the break instruction.

!
--with-llsc

On MIPS targets, make -mllsc the default when no -mno-llsc option is passed. This is the default for Linux-based targets, as the kernel will emulate them if the ISA does not provide them.

!
--without-llsc

On MIPS targets, make -mno-llsc the default when no -mllsc option is passed.

!
--with-synci

On MIPS targets, make -msynci the default when no -mno-synci option is passed.

!
--without-synci

On MIPS targets, make -mno-synci the default when no -msynci option is passed. This is the default.

!
--with-lxc1-sxc1

On MIPS targets, make -mlxc1-sxc1 the default when no -mno-lxc1-sxc1 option is passed. This is the default.

!
--without-lxc1-sxc1

On MIPS targets, make -mno-lxc1-sxc1 the default when no -mlxc1-sxc1 option is passed. The indexed load/store instructions are not directly a problem but can lead to unexpected *************** pure 32-bit environment and can hold tru *** 1114,1125 **** the address space is accurately set to be 32-bit for o32 and n32.

!
--with-madd4

On MIPS targets, make -mmadd4 the default when no -mno-madd4 option is passed. This is the default.

!
--without-madd4

On MIPS targets, make -mno-madd4 the default when no -mmadd4 option is passed. The madd4 instruction family can be problematic when targeting a combination of cores that --- 1105,1116 ---- the address space is accurately set to be 32-bit for o32 and n32.

!
--with-madd4

On MIPS targets, make -mmadd4 the default when no -mno-madd4 option is passed. This is the default.

!
--without-madd4

On MIPS targets, make -mno-madd4 the default when no -mmadd4 option is passed. The madd4 instruction family can be problematic when targeting a combination of cores that *************** only way to ensure compatible code is ge *** 1130,1167 **** a performance penalty.

!
--with-mips-plt

On MIPS targets, make use of copy relocations and PLTs. These features are extensions to the traditional SVR4-based MIPS ABIs and require support from GNU binutils and the runtime C library.

!
--with-stack-clash-protection-guard-size=size

On certain targets this option sets the default stack clash protection guard size as a power of two in bytes. On AArch64 size is required to be either 12 (4KB) or 16 (64KB).

!
--with-isa-spec=ISA-spec-string

On RISC-V targets specify the default version of the RISC-V Unprivileged (formerly User-Level) ISA specification to produce code conforming to. The possibilities for ISA-spec-string are:

!
2.2

Produce code conforming to version 2.2.

!
20190608

Produce code conforming to version 20190608.

!
20191213

Produce code conforming to version 20191213.

In the absence of this configuration option the default version is 20191213.

!
--enable-__cxa_atexit

Define if you want to use __cxa_atexit, rather than atexit, to register C++ destructors for local statics and global objects. This is essential for fully standards-compliant handling of --- 1121,1158 ---- a performance penalty.

!
--with-mips-plt

On MIPS targets, make use of copy relocations and PLTs. These features are extensions to the traditional SVR4-based MIPS ABIs and require support from GNU binutils and the runtime C library.

!
--with-stack-clash-protection-guard-size=size

On certain targets this option sets the default stack clash protection guard size as a power of two in bytes. On AArch64 size is required to be either 12 (4KB) or 16 (64KB).

!
--with-isa-spec=ISA-spec-string

On RISC-V targets specify the default version of the RISC-V Unprivileged (formerly User-Level) ISA specification to produce code conforming to. The possibilities for ISA-spec-string are:

!
2.2

Produce code conforming to version 2.2.

!
20190608

Produce code conforming to version 20190608.

!
20191213

Produce code conforming to version 20191213.

In the absence of this configuration option the default version is 20191213.

!
--enable-__cxa_atexit

Define if you want to use __cxa_atexit, rather than atexit, to register C++ destructors for local statics and global objects. This is essential for fully standards-compliant handling of *************** only available on systems with GNU libc. *** 1170,1197 **** -fuse-cxa-atexit to be passed by default.

!
--enable-gnu-indirect-function

Define if you want to enable the ifunc attribute. This option is currently only available on systems with GNU libc on certain targets.

!
--enable-target-optspace

Specify that target libraries should be optimized for code space instead of code speed. This is the default for the m32r platform.

!
--with-cpp-install-dir=dirname

Specify that the user visible cpp program should be installed in prefix/dirname/cpp, in addition to bindir.

!
--enable-comdat

Enable COMDAT group support. This is primarily used to override the automatically detected value.

!
--enable-initfini-array

Force the use of sections .init_array and .fini_array (instead of .init and .fini) for constructors and destructors. Option --disable-initfini-array has the --- 1161,1188 ---- -fuse-cxa-atexit to be passed by default.

!
--enable-gnu-indirect-function

Define if you want to enable the ifunc attribute. This option is currently only available on systems with GNU libc on certain targets.

!
--enable-target-optspace

Specify that target libraries should be optimized for code space instead of code speed. This is the default for the m32r platform.

!
--with-cpp-install-dir=dirname

Specify that the user visible cpp program should be installed in prefix/dirname/cpp, in addition to bindir.

!
--enable-comdat

Enable COMDAT group support. This is primarily used to override the automatically detected value.

!
--enable-initfini-array

Force the use of sections .init_array and .fini_array (instead of .init and .fini) for constructors and destructors. Option --disable-initfini-array has the *************** will try to guess whether the .ini *** 1200,1212 **** .fini_array sections are supported and, if they are, use them.

!
--enable-link-mutex

When building GCC, use a mutex to avoid linking the compilers for multiple languages at the same time, to avoid thrashing on build systems with limited free memory. The default is not to use such a mutex.

!
--enable-link-serialization

When building GCC, use make dependencies to serialize linking the compilers for multiple languages, to avoid thrashing on build systems with limited free memory. The default is not to add such --- 1191,1203 ---- .fini_array sections are supported and, if they are, use them.

!
--enable-link-mutex

When building GCC, use a mutex to avoid linking the compilers for multiple languages at the same time, to avoid thrashing on build systems with limited free memory. The default is not to use such a mutex.

!
--enable-link-serialization

When building GCC, use make dependencies to serialize linking the compilers for multiple languages, to avoid thrashing on build systems with limited free memory. The default is not to add such *************** compilers concurrently. If the argument *** 1215,1221 **** that number of concurrent link processes for the large binaries.

!
--enable-maintainer-mode

The build rules that regenerate the Autoconf and Automake output files as well as the GCC master message catalog gcc.pot are normally disabled. This is because it can only be rebuilt if the complete source --- 1206,1212 ---- that number of concurrent link processes for the large binaries.

!
--enable-maintainer-mode

The build rules that regenerate the Autoconf and Automake output files as well as the GCC master message catalog gcc.pot are normally disabled. This is because it can only be rebuilt if the complete source *************** this. Note that you need a recent versi *** 1225,1238 **** to do so.

!
--disable-bootstrap

For a native build, the default configuration is to perform a 3-stage bootstrap of the compiler when ‘make’ is invoked, testing that GCC can compile itself correctly. If you want to disable this process, you can configure with --disable-bootstrap.

!
--enable-bootstrap

In special cases, you may want to perform a 3-stage build even if the target and host triplets are different. This is possible when the host can run code compiled for --- 1216,1229 ---- to do so.

!
--disable-bootstrap

For a native build, the default configuration is to perform a 3-stage bootstrap of the compiler when ‘make’ is invoked, testing that GCC can compile itself correctly. If you want to disable this process, you can configure with --disable-bootstrap.

!
--enable-bootstrap

In special cases, you may want to perform a 3-stage build even if the target and host triplets are different. This is possible when the host can run code compiled for *************** Starting from GCC 4.2, to do this you ha *** 1241,1247 **** with --enable-bootstrap.

!
--enable-generated-files-in-srcdir

Neither the .c and .h files that are generated from Bison and flex nor the info manuals and man pages that are built from the .texi files are present in the repository development tree. When building GCC from that development tree, --- 1232,1238 ---- with --enable-bootstrap.

!
--enable-generated-files-in-srcdir

Neither the .c and .h files that are generated from Bison and flex nor the info manuals and man pages that are built from the .texi files are present in the repository development tree. When building GCC from that development tree, *************** is not a requirement that the users of s *** 1256,1262 **** or makeinfo.

!
--enable-version-specific-runtime-libs

Specify that runtime libraries should be installed in the compiler specific subdirectory (libdir/gcc) rather than the usual places. In --- 1247,1253 ---- or makeinfo.

!
--enable-version-specific-runtime-libs

Specify that runtime libraries should be installed in the compiler specific subdirectory (libdir/gcc) rather than the usual places. In *************** parallel. The default is ‘y *** 1268,1274 **** the remaining libraries.

!
--with-aix-soname=‘aix’, ‘svr4’ or ‘both’

Traditional AIX shared library versioning (versioned Shared Object files as members of unversioned Archive Library files named ‘lib.a’) causes numerous headaches for package managers. However, --- 1259,1265 ---- the remaining libraries.

!
--with-aix-soname=‘aix’, ‘svr4’ or ‘both’

Traditional AIX shared library versioning (versioned Shared Object files as members of unversioned Archive Library files named ‘lib.a’) causes numerous headaches for package managers. However, *************** where this is called the "SONAME&qu *** 1279,1292 **** linker does search for ‘libNAME.so’ before ‘libNAME.a’ library filenames with the ‘-lNAME’ linker flag.

!

For detailed information please refer to the AIX ld Command reference.

As long as shared library creation is enabled, upon:

!
--with-aix-soname=aix
!
--with-aix-soname=both

A (traditional AIX) Shared Archive Library file is created:

  • using the ‘libNAME.a’ filename scheme --- 1270,1283 ---- linker does search for ‘libNAME.so’ before ‘libNAME.a’ library filenames with the ‘-lNAME’ linker flag.

    !

    For detailed information please refer to the AIX ld Command reference.

    As long as shared library creation is enabled, upon:

    !
    --with-aix-soname=aix
    !
    --with-aix-soname=both

    A (traditional AIX) Shared Archive Library file is created:

    • using the ‘libNAME.a’ filename scheme *************** Command reference. *** 1303,1310 ****
!
--with-aix-soname=both
!
--with-aix-soname=svr4

A (second) Shared Archive Library file is created:

  • using the ‘libNAME.so.V’ filename scheme --- 1294,1301 ----
!
--with-aix-soname=both
!
--with-aix-soname=svr4

A (second) Shared Archive Library file is created:

  • using the ‘libNAME.so.V’ filename scheme *************** Command reference. *** 1342,1348 ****

    As long as static library creation is enabled, upon:

    !
    --with-aix-soname=svr4

    A Static Archive Library is created:

    • using the ‘libNAME.a’ filename scheme --- 1333,1339 ----

      As long as static library creation is enabled, upon:

      !
      --with-aix-soname=svr4

      A Static Archive Library is created:

      • using the ‘libNAME.a’ filename scheme *************** this option is still experimental and no *** 1374,1386 ****

        Default is the traditional behavior --with-aix-soname=‘aix’.

      !
      --enable-languages=lang1,lang2,…

      Specify that only a particular subset of compilers and their runtime libraries should be built. For a list of valid values for langN you can issue the following command in the gcc directory of your GCC source tree:
      !

      ! 
      grep ^language= */config-lang.in

      Currently, you can use any of the following: all, default, ada, c, c++, d, --- 1365,1377 ----

      Default is the traditional behavior --with-aix-soname=‘aix’.

      !
      --enable-languages=lang1,lang2,…

      Specify that only a particular subset of compilers and their runtime libraries should be built. For a list of valid values for langN you can issue the following command in the gcc directory of your GCC source tree:
      !

      ! 
      grep ^language= */config-lang.in

      Currently, you can use any of the following: all, default, ada, c, c++, d, *************** exception is jit language, *** 1396,1402 **** --enable-host-shared to be included with all.

      !
      --enable-stage1-languages=lang1,lang2,…

      Specify that a particular subset of compilers and their runtime libraries should be built with the system C compiler during stage 1 of the bootstrap process, rather than only in later stages with the --- 1387,1393 ---- --enable-host-shared to be included with all.

      !
      --enable-stage1-languages=lang1,lang2,…

      Specify that a particular subset of compilers and their runtime libraries should be built with the system C compiler during stage 1 of the bootstrap process, rather than only in later stages with the *************** stage1-bubble all-target, or run *** 1412,1463 **** for the specified languages using make stage1-start check-gcc.

      !
      --disable-libada

      Specify that the run-time libraries and tools used by GNAT should not be built. This can be useful for debugging, or for compatibility with previous Ada build procedures, when it was required to explicitly do a ‘make -C gcc gnatlib_and_tools’.

      !
      --disable-libsanitizer

      Specify that the run-time libraries for the various sanitizers should not be built.

      !
      --disable-libssp

      Specify that the run-time libraries for stack smashing protection should not be built or linked against. On many targets library support is provided by the C library instead.

      !
      --disable-libquadmath

      Specify that the GCC quad-precision math library should not be built. On some systems, the library is required to be linkable when building the Fortran front end, unless --disable-libquadmath-support is used.

      !
      --disable-libquadmath-support

      Specify that the Fortran front end and libgfortran do not add support for libquadmath on systems supporting it.

      !
      --disable-libgomp

      Specify that the GNU Offloading and Multi Processing Runtime Library should not be built.

      !
      --disable-libvtv

      Specify that the run-time libraries used by vtable verification should not be built.

      !
      --with-dwarf2

      Specify that the compiler should use DWARF 2 debugging information as the default.

      !
      --with-advance-toolchain=at

      On 64-bit PowerPC Linux systems, configure the compiler to use the header files, library files, and the dynamic linker from the Advance Toolchain release at instead of the default versions that are --- 1403,1454 ---- for the specified languages using make stage1-start check-gcc.

      !
      --disable-libada

      Specify that the run-time libraries and tools used by GNAT should not be built. This can be useful for debugging, or for compatibility with previous Ada build procedures, when it was required to explicitly do a ‘make -C gcc gnatlib_and_tools’.

      !
      --disable-libsanitizer

      Specify that the run-time libraries for the various sanitizers should not be built.

      !
      --disable-libssp

      Specify that the run-time libraries for stack smashing protection should not be built or linked against. On many targets library support is provided by the C library instead.

      !
      --disable-libquadmath

      Specify that the GCC quad-precision math library should not be built. On some systems, the library is required to be linkable when building the Fortran front end, unless --disable-libquadmath-support is used.

      !
      --disable-libquadmath-support

      Specify that the Fortran front end and libgfortran do not add support for libquadmath on systems supporting it.

      !
      --disable-libgomp

      Specify that the GNU Offloading and Multi Processing Runtime Library should not be built.

      !
      --disable-libvtv

      Specify that the run-time libraries used by vtable verification should not be built.

      !
      --with-dwarf2

      Specify that the compiler should use DWARF 2 debugging information as the default.

      !
      --with-advance-toolchain=at

      On 64-bit PowerPC Linux systems, configure the compiler to use the header files, library files, and the dynamic linker from the Advance Toolchain release at instead of the default versions that are *************** intended for the developers of GCC, and *** 1466,1473 **** use.

      !
      --enable-targets=all
      !
      --enable-targets=target_list

      Some GCC targets, e.g. powerpc64-linux, build bi-arch compilers. These are compilers that are able to generate either 64-bit or 32-bit code. Typically, the corresponding 32-bit target, e.g. --- 1457,1464 ---- use.

      !
      --enable-targets=all
      !
      --enable-targets=target_list

      Some GCC targets, e.g. powerpc64-linux, build bi-arch compilers. These are compilers that are able to generate either 64-bit or 32-bit code. Typically, the corresponding 32-bit target, e.g. *************** Currently, this option only affects spar *** 1481,1505 **** mips-linux and s390-linux.

      !
      --enable-default-pie

      Turn on -fPIE and -pie by default.

      !
      --enable-secureplt

      This option enables -msecure-plt by default for powerpc-linux. See “RS/6000 and PowerPC Options” in the main manual

      !
      --enable-default-ssp

      Turn on -fstack-protector-strong by default.

      !
      --enable-cld

      This option enables -mcld by default for 32-bit x86 targets. See “i386 and x86-64 Options” in the main manual

      !
      --enable-large-address-aware

      The --enable-large-address-aware option arranges for MinGW executables to be linked using the --large-address-aware option, that enables the use of more than 2GB of memory. If GCC is --- 1472,1496 ---- mips-linux and s390-linux.

      !
      --enable-default-pie

      Turn on -fPIE and -pie by default.

      !
      --enable-secureplt

      This option enables -msecure-plt by default for powerpc-linux. See “RS/6000 and PowerPC Options” in the main manual

      !
      --enable-default-ssp

      Turn on -fstack-protector-strong by default.

      !
      --enable-cld

      This option enables -mcld by default for 32-bit x86 targets. See “i386 and x86-64 Options” in the main manual

      !
      --enable-large-address-aware

      The --enable-large-address-aware option arranges for MinGW executables to be linked using the --large-address-aware option, that enables the use of more than 2GB of memory. If GCC is *************** configured with this option, its effects *** 1508,1521 **** compiler driver.

      !
      --enable-win32-registry
      !
      --enable-win32-registry=key
      !
      --disable-win32-registry

      The --enable-win32-registry option enables Microsoft Windows-hosted GCC to look up installations paths in the registry using the following key:

      !
      ! 
      HKEY_LOCAL_MACHINE\SOFTWARE\Free Software Foundation\key

      key defaults to GCC version number, and can be overridden by the --- 1499,1512 ---- compiler driver.

      !
      --enable-win32-registry
      !
      --enable-win32-registry=key
      !
      --disable-win32-registry

      The --enable-win32-registry option enables Microsoft Windows-hosted GCC to look up installations paths in the registry using the following key:

      !
      ! 
      HKEY_LOCAL_MACHINE\SOFTWARE\Free Software Foundation\key

      key defaults to GCC version number, and can be overridden by the *************** by default, and can be disabled by

      !
      --nfp

      Specify that the machine does not have a floating point unit. This option only applies to ‘m68k-sun-sunosn’. On any other system, --nfp has no effect.

      !
      --enable-werror
      !
      --disable-werror
      !
      --enable-werror=yes
      !
      --enable-werror=no

      When you specify this option, it controls whether certain files in the compiler are built with -Werror in bootstrap stage2 and later. If you don’t specify it, -Werror is turned on for the main --- 1518,1533 ---- option. This option has no effect on the other hosts.

      !
      --nfp

      Specify that the machine does not have a floating point unit. This option only applies to ‘m68k-sun-sunosn’. On any other system, --nfp has no effect.

      !
      --enable-werror
      !
      --disable-werror
      !
      --enable-werror=yes
      !
      --enable-werror=no

      When you specify this option, it controls whether certain files in the compiler are built with -Werror in bootstrap stage2 and later. If you don’t specify it, -Werror is turned on for the main *************** final releases. The specific files whic *** 1545,1553 **** controlled by the Makefiles.

      !
      --enable-checking
      !
      --disable-checking
      !
      --enable-checking=list

      This option controls performing internal consistency checks in the compiler. It does not change the generated code, but adds error checking of the requested complexity. This slows down the compiler and may only work --- 1536,1544 ---- controlled by the Makefiles.

      !
      --enable-checking
      !
      --disable-checking
      !
      --enable-checking=list

      This option controls performing internal consistency checks in the compiler. It does not change the generated code, but adds error checking of the requested complexity. This slows down the compiler and may only work *************** expensive and the ‘df *** 1585,1593 **** expensive.

      !
      --disable-stage1-checking
      !
      --enable-stage1-checking
      !
      --enable-stage1-checking=list

      This option affects only bootstrap build. If no --enable-checking option is specified the stage1 compiler is built with ‘yes’ checking enabled, otherwise the stage1 checking flags are the same as specified by --- 1576,1584 ---- expensive.

      !
      --disable-stage1-checking
      !
      --enable-stage1-checking
      !
      --enable-stage1-checking=list

      This option affects only bootstrap build. If no --enable-checking option is specified the stage1 compiler is built with ‘yes’ checking enabled, otherwise the stage1 checking flags are the same as specified by *************** with checking for stage1 enabled, you ca *** 1599,1606 **** to disable checking for the stage1 compiler.

      !
      --enable-coverage
      !
      --enable-coverage=level

      With this option, the compiler is built to collect self coverage information, every time it is run. This is for internal development purposes, and only works when the compiler is being built with gcc. The --- 1590,1597 ---- to disable checking for the stage1 compiler.

      !
      --enable-coverage
      !
      --enable-coverage=level

      With this option, the compiler is built to collect self coverage information, every time it is run. This is for internal development purposes, and only works when the compiler is being built with gcc. The *************** enable optimization. When coverage is e *** 1611,1641 **** without optimization.

      !
      --enable-gather-detailed-mem-stats

      When this option is specified more detailed information on memory allocation is gathered. This information is printed when using -fmem-report.

      !
      --enable-valgrind-annotations

      Mark selected memory related operations in the compiler when run under valgrind to suppress false positives.

      !
      --enable-nls
      !
      --disable-nls

      The --enable-nls option enables Native Language Support (NLS), which lets GCC output diagnostics in languages other than American English. Native Language Support is enabled by default if not doing a canadian cross build. The --disable-nls option disables NLS.

      !
      --with-included-gettext

      If NLS is enabled, the --with-included-gettext option causes the build procedure to prefer its copy of GNU gettext.

      !
      --with-catgets

      If NLS is enabled, and if the host lacks gettext but has the inferior catgets interface, the GCC build procedure normally ignores catgets and instead uses GCC’s copy of the GNU --- 1602,1632 ---- without optimization.

      !
      --enable-gather-detailed-mem-stats

      When this option is specified more detailed information on memory allocation is gathered. This information is printed when using -fmem-report.

      !
      --enable-valgrind-annotations

      Mark selected memory related operations in the compiler when run under valgrind to suppress false positives.

      !
      --enable-nls
      !
      --disable-nls

      The --enable-nls option enables Native Language Support (NLS), which lets GCC output diagnostics in languages other than American English. Native Language Support is enabled by default if not doing a canadian cross build. The --disable-nls option disables NLS.

      !
      --with-included-gettext

      If NLS is enabled, the --with-included-gettext option causes the build procedure to prefer its copy of GNU gettext.

      !
      --with-catgets

      If NLS is enabled, and if the host lacks gettext but has the inferior catgets interface, the GCC build procedure normally ignores catgets and instead uses GCC’s copy of the GNU *************** ignores catgets and instead *** 1643,1654 **** build procedure to use the host’s catgets in this situation.

      !
      --with-libiconv-prefix=dir

      Search for libiconv header files in dir/include and libiconv library files in dir/lib.

      !
      --enable-obsolete

      Enable configuration for an obsoleted system. If you attempt to configure GCC for a system (build, host, or target) which has been obsoleted, and you do not specify this flag, configure will halt with an --- 1634,1645 ---- build procedure to use the host’s catgets in this situation.

      !
      --with-libiconv-prefix=dir

      Search for libiconv header files in dir/include and libiconv library files in dir/lib.

      !
      --enable-obsolete

      Enable configuration for an obsoleted system. If you attempt to configure GCC for a system (build, host, or target) which has been obsoleted, and you do not specify this flag, configure will halt with an *************** is removed entirely in the next major re *** 1659,1670 **** forward to maintain the port.

      !
      --enable-decimal-float
      !
      --enable-decimal-float=yes
      !
      --enable-decimal-float=no
      !
      --enable-decimal-float=bid
      !
      --enable-decimal-float=dpd
      !
      --disable-decimal-float

      Enable (or disable) support for the C decimal floating point extension that is in the IEEE 754-2008 standard. This is enabled by default only on PowerPC, i386, and x86_64 GNU/Linux systems. Other systems may also --- 1650,1661 ---- forward to maintain the port.

      !
      --enable-decimal-float
      !
      --enable-decimal-float=yes
      !
      --enable-decimal-float=no
      !
      --enable-decimal-float=bid
      !
      --enable-decimal-float=dpd
      !
      --disable-decimal-float

      Enable (or disable) support for the C decimal floating point extension that is in the IEEE 754-2008 standard. This is enabled by default only on PowerPC, i386, and x86_64 GNU/Linux systems. Other systems may also *************** format is default on i386 and x86_64 sys *** 1675,1689 **** (densely packed decimal) format is default on PowerPC systems.

      !
      --enable-fixed-point
      !
      --disable-fixed-point

      Enable (or disable) support for C fixed-point arithmetic. This option is enabled by default for some targets (such as MIPS) which have hardware-support for fixed-point operations. On other targets, you may enable this option manually.

      !
      --with-long-double-128

      Specify if long double type should be 128-bit by default on selected GNU/Linux architectures. If using --without-long-double-128, long double will be by default 64-bit, the same as double type. --- 1666,1680 ---- (densely packed decimal) format is default on PowerPC systems.

      !
      --enable-fixed-point
      !
      --disable-fixed-point

      Enable (or disable) support for C fixed-point arithmetic. This option is enabled by default for some targets (such as MIPS) which have hardware-support for fixed-point operations. On other targets, you may enable this option manually.

      !
      --with-long-double-128

      Specify if long double type should be 128-bit by default on selected GNU/Linux architectures. If using --without-long-double-128, long double will be by default 64-bit, the same as double type. *************** When neither of these configure options *** 1692,1699 **** 64-bit long double otherwise.

      !
      --with-long-double-format=ibm
      !
      --with-long-double-format=ieee

      Specify whether long double uses the IBM extended double format or the IEEE 128-bit floating point format on PowerPC Linux systems. This configuration switch will only work on little endian PowerPC --- 1683,1690 ---- 64-bit long double otherwise.

      !
      --with-long-double-format=ibm
      !
      --with-long-double-format=ieee

      Specify whether long double uses the IBM extended double format or the IEEE 128-bit floating point format on PowerPC Linux systems. This configuration switch will only work on little endian PowerPC *************** point, it is not recommended to use *** 1711,1729 **** --with-long-double-format=ieee.

      !
      --enable-fdpic

      On SH Linux systems, generate ELF FDPIC code.

      !
      --with-gmp=pathname
      !
      --with-gmp-include=pathname
      !
      --with-gmp-lib=pathname
      !
      --with-mpfr=pathname
      !
      --with-mpfr-include=pathname
      !
      --with-mpfr-lib=pathname
      !
      --with-mpc=pathname
      !
      --with-mpc-include=pathname
      !
      --with-mpc-lib=pathname

      If you want to build GCC but do not have the GMP library, the MPFR library and/or the MPC library installed in a standard location and do not have their sources present in the GCC source tree then you --- 1702,1720 ---- --with-long-double-format=ieee.

      !
      --enable-fdpic

      On SH Linux systems, generate ELF FDPIC code.

      !
      --with-gmp=pathname
      !
      --with-gmp-include=pathname
      !
      --with-gmp-lib=pathname
      !
      --with-mpfr=pathname
      !
      --with-mpfr-include=pathname
      !
      --with-mpfr-lib=pathname
      !
      --with-mpc=pathname
      !
      --with-mpc-include=pathname
      !
      --with-mpc-lib=pathname

      If you want to build GCC but do not have the GMP library, the MPFR library and/or the MPC library installed in a standard location and do not have their sources present in the GCC source tree then you *************** variable (LD_LIBRARY_PATH o *** 1750,1758 **** a cross compiler, they will not be used to configure target libraries.

      !
      --with-isl=pathname
      !
      --with-isl-include=pathname
      !
      --with-isl-lib=pathname

      If you do not have the isl library installed in a standard location and you want to build GCC, you can explicitly specify the directory where it is installed (‘--with-isl=islinstalldir’). The --- 1741,1749 ---- a cross compiler, they will not be used to configure target libraries.

      !
      --with-isl=pathname
      !
      --with-isl-include=pathname
      !
      --with-isl-lib=pathname

      If you do not have the isl library installed in a standard location and you want to build GCC, you can explicitly specify the directory where it is installed (‘--with-isl=islinstalldir’). The *************** include and lib options directly. *** 1766,1772 **** a cross compiler, they will not be used to configure target libraries.

      !
      --with-stage1-ldflags=flags

      This option may be used to set linker flags to be used when linking stage 1 of GCC. These are also used when linking GCC if configured with --disable-bootstrap. If --with-stage1-libs is not set to a --- 1757,1763 ---- a cross compiler, they will not be used to configure target libraries.

      !
      --with-stage1-ldflags=flags

      This option may be used to set linker flags to be used when linking stage 1 of GCC. These are also used when linking GCC if configured with --disable-bootstrap. If --with-stage1-libs is not set to a *************** value, then the default is ‘ *** 1774,1804 **** supported.

      !
      --with-stage1-libs=libs

      This option may be used to set libraries to be used when linking stage 1 of GCC. These are also used when linking GCC if configured with --disable-bootstrap.

      !
      --with-boot-ldflags=flags

      This option may be used to set linker flags to be used when linking stage 2 and later when bootstrapping GCC. If –with-boot-libs is not is set to a value, then the default is ‘-static-libstdc++ -static-libgcc’.

      !
      --with-boot-libs=libs

      This option may be used to set libraries to be used when linking stage 2 and later when bootstrapping GCC.

      !
      --with-debug-prefix-map=map

      Convert source directory names using -fdebug-prefix-map when building runtime libraries. ‘map’ is a space-separated list of maps of the form ‘old=new’.

      !
      --enable-linker-build-id

      Tells GCC to pass --build-id option to the linker for all final links (links performed without the -r or --relocatable option), if the linker supports it. If you specify --- 1765,1795 ---- supported.

      !
      --with-stage1-libs=libs

      This option may be used to set libraries to be used when linking stage 1 of GCC. These are also used when linking GCC if configured with --disable-bootstrap.

      !
      --with-boot-ldflags=flags

      This option may be used to set linker flags to be used when linking stage 2 and later when bootstrapping GCC. If –with-boot-libs is not is set to a value, then the default is ‘-static-libstdc++ -static-libgcc’.

      !
      --with-boot-libs=libs

      This option may be used to set libraries to be used when linking stage 2 and later when bootstrapping GCC.

      !
      --with-debug-prefix-map=map

      Convert source directory names using -fdebug-prefix-map when building runtime libraries. ‘map’ is a space-separated list of maps of the form ‘old=new’.

      !
      --enable-linker-build-id

      Tells GCC to pass --build-id option to the linker for all final links (links performed without the -r or --relocatable option), if the linker supports it. If you specify *************** support --build-id option, *** 1807,1827 **** --enable-linker-build-id option is ignored. The default is off.

      !
      --with-linker-hash-style=choice

      Tells GCC to pass --hash-style=choice option to the linker for all final links. choice can be one of ‘sysv’, ‘gnu’, and ‘both’ where ‘sysv’ is the default.

      !
      --enable-gnu-unique-object
      !
      --disable-gnu-unique-object

      Tells GCC to use the gnu_unique_object relocation for C++ template static data members and inline function local statics. Enabled by default for a toolchain with an assembler that accepts it and GLIBC 2.11 or above, otherwise disabled.

      !
      --with-diagnostics-color=choice

      Tells GCC to use choice as the default for -fdiagnostics-color= option (if not used explicitly on the command line). choice can be one of ‘never’, ‘auto’, ‘always’, and ‘auto-if-env’ --- 1798,1818 ---- --enable-linker-build-id option is ignored. The default is off.

      !
      --with-linker-hash-style=choice

      Tells GCC to pass --hash-style=choice option to the linker for all final links. choice can be one of ‘sysv’, ‘gnu’, and ‘both’ where ‘sysv’ is the default.

      !
      --enable-gnu-unique-object
      !
      --disable-gnu-unique-object

      Tells GCC to use the gnu_unique_object relocation for C++ template static data members and inline function local statics. Enabled by default for a toolchain with an assembler that accepts it and GLIBC 2.11 or above, otherwise disabled.

      !
      --with-diagnostics-color=choice

      Tells GCC to use choice as the default for -fdiagnostics-color= option (if not used explicitly on the command line). choice can be one of ‘never’, ‘auto’, ‘always’, and ‘auto-if-env’ *************** is present and non-empty in the environm *** 1831,1837 **** -fdiagnostics-color=never otherwise.

      !
      --with-diagnostics-urls=choice

      Tells GCC to use choice as the default for -fdiagnostics-urls= option (if not used explicitly on the command line). choice can be one of ‘never’, ‘auto’, ‘always’, and ‘auto-if-env’ --- 1822,1828 ---- -fdiagnostics-color=never otherwise.

      !
      --with-diagnostics-urls=choice

      Tells GCC to use choice as the default for -fdiagnostics-urls= option (if not used explicitly on the command line). choice can be one of ‘never’, ‘auto’, ‘always’, and ‘auto-if-env’ *************** or TERM_URLS is present and *** 1841,1854 **** compiler, and -fdiagnostics-urls=never otherwise.

      !
      --enable-lto
      !
      --disable-lto

      Enable support for link-time optimization (LTO). This is enabled by default, and may be disabled using --disable-lto.

      !
      --enable-linker-plugin-configure-flags=FLAGS
      !
      --enable-linker-plugin-flags=FLAGS

      By default, linker plugins (such as the LTO plugin) are built for the host system architecture. For the case that the linker has a different (but run-time compatible) architecture, these flags can be --- 1832,1845 ---- compiler, and -fdiagnostics-urls=never otherwise.

      !
      --enable-lto
      !
      --disable-lto

      Enable support for link-time optimization (LTO). This is enabled by default, and may be disabled using --disable-lto.

      !
      --enable-linker-plugin-configure-flags=FLAGS
      !
      --enable-linker-plugin-flags=FLAGS

      By default, linker plugins (such as the LTO plugin) are built for the host system architecture. For the case that the linker has a different (but run-time compatible) architecture, these flags can be *************** GNU/Linux (‘i686-pc-linux-gn *** 1859,1873 **** executable on the former system), you can configure GCC as follows for getting compatible linker plugins:

      !
      ! 
      % srcdir/configure \
      --host=x86_64-pc-linux-gnu \
      --enable-linker-plugin-configure-flags=--host=i686-pc-linux-gnu \
      --enable-linker-plugin-flags='CC=gcc\ -m32\ -Wl,-rpath,[...]/i686-pc-linux-gnu/lib'
      !
      --with-plugin-ld=pathname

      Enable an alternate linker to be used at link-time optimization (LTO) link time when -fuse-linker-plugin is enabled. This linker should have plugin support such as gold starting with --- 1850,1864 ---- executable on the former system), you can configure GCC as follows for getting compatible linker plugins:

      !
      ! 
      % srcdir/configure \
      --host=x86_64-pc-linux-gnu \
      --enable-linker-plugin-configure-flags=--host=i686-pc-linux-gnu \
      --enable-linker-plugin-flags='CC=gcc\ -m32\ -Wl,-rpath,[...]/i686-pc-linux-gnu/lib'
      !
      --with-plugin-ld=pathname

      Enable an alternate linker to be used at link-time optimization (LTO) link time when -fuse-linker-plugin is enabled. This linker should have plugin support such as gold starting with *************** version 2.20 or GNU ld starting with ver *** 1875,1882 **** See -fuse-linker-plugin for details.

      !
      --enable-canonical-system-headers
      !
      --disable-canonical-system-headers

      Enable system header path canonicalization for libcpp. This can produce shorter header file paths in diagnostics and dependency output files, but these changed header paths may conflict with some compilation --- 1866,1873 ---- See -fuse-linker-plugin for details.

      !
      --enable-canonical-system-headers
      !
      --disable-canonical-system-headers

      Enable system header path canonicalization for libcpp. This can produce shorter header file paths in diagnostics and dependency output files, but these changed header paths may conflict with some compilation *************** environments. Enabled by default, and m *** 1884,1890 **** --disable-canonical-system-headers.

      !
      --with-glibc-version=major.minor

      Tell GCC that when the GNU C Library (glibc) is used on the target it will be version major.minor or later. Normally this can be detected from the C library’s header files, but this option may be --- 1875,1881 ---- --disable-canonical-system-headers.

      !
      --with-glibc-version=major.minor

      Tell GCC that when the GNU C Library (glibc) is used on the target it will be version major.minor or later. Normally this can be detected from the C library’s header files, but this option may be *************** However, such configurations may not wor *** 1897,1919 **** configuration in GCC is on a per-multilib basis.

      !
      --enable-as-accelerator-for=target

      Build as offload target compiler. Specify offload host triple by target.

      !
      --enable-offload-targets=target1[=path1],…,targetN[=pathN]

      Enable offloading to targets target1, …, targetN. Offload compilers are expected to be already installed. Default search path for them is exec-prefix, but it can be changed by specifying paths path1, …, pathN.

      !
      ! 
      % srcdir/configure \
      --enable-offload-targets=x86_64-intelmicemul-linux-gnu=/path/to/x86_64/compiler,nvptx-none
      !
      --enable-offload-defaulted

      Tell GCC that configured but not installed offload compilers and libgomp plugins are silently ignored. Useful for distribution compilers where --- 1888,1910 ---- configuration in GCC is on a per-multilib basis.

      !
      --enable-as-accelerator-for=target

      Build as offload target compiler. Specify offload host triple by target.

      !
      --enable-offload-targets=target1[=path1],…,targetN[=pathN]

      Enable offloading to targets target1, …, targetN. Offload compilers are expected to be already installed. Default search path for them is exec-prefix, but it can be changed by specifying paths path1, …, pathN.

      !
      ! 
      % srcdir/configure \
      --enable-offload-targets=x86_64-intelmicemul-linux-gnu=/path/to/x86_64/compiler,nvptx-none
      !
      --enable-offload-defaulted

      Tell GCC that configured but not installed offload compilers and libgomp plugins are silently ignored. Useful for distribution compilers where *************** of those optional packages should determ *** 1922,1930 **** target set rather than the GCC configure-time selection.

      !
      --with-hsa-runtime=pathname
      !
      --with-hsa-runtime-include=pathname
      !
      --with-hsa-runtime-lib=pathname

      If you configure GCC with offloading which uses an HSA run-time such as AMDGCN but do not have the HSA run-time library installed in a standard --- 1913,1921 ---- target set rather than the GCC configure-time selection.

      !
      --with-hsa-runtime=pathname
      !
      --with-hsa-runtime-include=pathname
      !
      --with-hsa-runtime-lib=pathname

      If you configure GCC with offloading which uses an HSA run-time such as AMDGCN but do not have the HSA run-time library installed in a standard *************** is a shorthand for *** 1935,1942 **** --with-hsa-runtime-include=hsainstalldir/include.

      !
      --enable-cet
      !
      --disable-cet

      Enable building target run-time libraries with control-flow instrumentation, see -fcf-protection option. When --enable-cet is specified target libraries are configured --- 1926,1933 ---- --with-hsa-runtime-include=hsainstalldir/include.

      !
      --enable-cet
      !
      --disable-cet

      Enable building target run-time libraries with control-flow instrumentation, see -fcf-protection option. When --enable-cet is specified target libraries are configured *************** otherwise. In this case, the target lib *** 1949,1955 **** additional -fcf-protection option.

      !
      --with-riscv-attribute=‘yes’, ‘no’ or ‘default’

      Generate RISC-V attribute by default, in order to record extra build information in object.

      --- 1940,1946 ---- additional -fcf-protection option.

      !
      --with-riscv-attribute=‘yes’, ‘no’ or ‘default’

      Generate RISC-V attribute by default, in order to record extra build information in object.

      *************** information in object. *** 1957,1964 **** target if target binutils supported.

      !
      --enable-s390-excess-float-precision
      !
      --disable-s390-excess-float-precision

      On s390(x) targets, enable treatment of float expressions with double precision when in standards-compliant mode (e.g., when --std=c99 or -fexcess-precision=standard are given). --- 1948,1955 ---- target if target binutils supported.

      !
      --enable-s390-excess-float-precision
      !
      --disable-s390-excess-float-precision

      On s390(x) targets, enable treatment of float expressions with double precision when in standards-compliant mode (e.g., when --std=c99 or -fexcess-precision=standard are given). *************** GCC follows and enables the option. For *** 1969,1977 **** disabled.

      !
      --with-zstd=pathname
      !
      --with-zstd-include=pathname
      !
      --with-zstd-lib=pathname

      If you do not have the zstd library installed in a standard location and you want to build GCC, you can explicitly specify the directory where it is installed (‘--with-zstd=zstdinstalldir’). --- 1960,1968 ---- disabled.

      !
      --with-zstd=pathname
      !
      --with-zstd-include=pathname
      !
      --with-zstd-lib=pathname

      If you do not have the zstd library installed in a standard location and you want to build GCC, you can explicitly specify the directory where it is installed (‘--with-zstd=zstdinstalldir’). *************** a cross compiler, they will not be used *** 1986,2003 ****

      ! !

      Cross-Compiler-Specific Options

      The following options only apply to building cross compilers.

      !
      --with-toolexeclibdir=dir

      Specify the installation directory for libraries built with a cross compiler. The default is ${gcc_tooldir}/lib.

      !
      --with-sysroot
      !
      --with-sysroot=dir

      Tells GCC to consider dir as the root of a tree that contains (a subset of) the root filesystem of the target operating system. Target system headers, libraries and run-time object files will be --- 1977,1993 ----

      !

      Cross-Compiler-Specific Options

      The following options only apply to building cross compilers.

      !
      --with-toolexeclibdir=dir

      Specify the installation directory for libraries built with a cross compiler. The default is ${gcc_tooldir}/lib.

      !
      --with-sysroot
      !
      --with-sysroot=dir

      Tells GCC to consider dir as the root of a tree that contains (a subset of) the root filesystem of the target operating system. Target system headers, libraries and run-time object files will be *************** option then the compiler will search tha *** 2021,2028 **** native system headers rather than the default /usr/include.

      !
      --with-build-sysroot
      !
      --with-build-sysroot=dir

      Tells GCC to consider dir as the system root (see --with-sysroot) while building target libraries, instead of the directory specified with --with-sysroot. This option is --- 2011,2018 ---- native system headers rather than the default /usr/include.

      !
      --with-build-sysroot
      !
      --with-build-sysroot=dir

      Tells GCC to consider dir as the system root (see --with-sysroot) while building target libraries, instead of the directory specified with --with-sysroot. This option is *************** option then the compiler will search tha *** 2040,2047 **** native system headers rather than the default /usr/include.

      !
      --with-headers
      !
      --with-headers=dir

      Deprecated in favor of --with-sysroot. Specifies that target headers are available when building a cross compiler. The dir argument specifies a directory which has the target include --- 2030,2037 ---- native system headers rather than the default /usr/include.

      !
      --with-headers
      !
      --with-headers=dir

      Deprecated in favor of --with-sysroot. Specifies that target headers are available when building a cross compiler. The dir argument specifies a directory which has the target include *************** pre-exist, the dir argument m *** 2053,2066 **** will be run on these files to make them compatible with GCC.

      !
      --without-headers

      Tells GCC not use any target headers from a libc when building a cross compiler. When crossing to GNU/Linux, you need the headers so GCC can build the exception handling for libgcc.

      !
      --with-libs
      !
      --with-libs="dir1 dir2 … dirN"

      Deprecated in favor of --with-sysroot. Specifies a list of directories which contain the target runtime libraries. These libraries will be copied into the gcc install --- 2043,2056 ---- will be run on these files to make them compatible with GCC.

      !
      --without-headers

      Tells GCC not use any target headers from a libc when building a cross compiler. When crossing to GNU/Linux, you need the headers so GCC can build the exception handling for libgcc.

      !
      --with-libs
      !
      --with-libs="dir1 dir2 … dirN"

      Deprecated in favor of --with-sysroot. Specifies a list of directories which contain the target runtime libraries. These libraries will be copied into the gcc install *************** directory. If the directory list is omi *** 2068,2074 **** effect.

      !
      --with-newlib

      Specifies that ‘newlib’ is being used as the target C library. This causes __eprintf to be omitted from libgcc.a on the assumption that it will be provided by --- 2058,2064 ---- effect.

      !
      --with-newlib

      Specifies that ‘newlib’ is being used as the target C library. This causes __eprintf to be omitted from libgcc.a on the assumption that it will be provided by *************** omitted from libgcc.a on th *** 2076,2082 ****

      !
      --with-avrlibc

      Only supported for the AVR target. Specifies that ‘AVR-Libc’ is being used as the target C  library. This causes float support functions like __addsf3 to be omitted from libgcc.a on --- 2066,2072 ----

      !
      --with-avrlibc

      Only supported for the AVR target. Specifies that ‘AVR-Libc’ is being used as the target C  library. This causes float support functions like __addsf3 to be omitted from libgcc.a on *************** RTEMS configurations, which currently us *** 2087,2094 **** supported since version 4.7.2 and is the default in 4.8.0 and newer.

      !
      --with-double={32|64|32,64|64,32}
      !
      --with-long-double={32|64|32,64|64,32|double}

      Only supported for the AVR target since version 10. Specify the default layout available for the C/C++ ‘double’ and ‘long double’ type, respectively. The following rules apply: --- 2077,2084 ---- supported since version 4.7.2 and is the default in 4.8.0 and newer.

      !
      --with-double={32|64|32,64|64,32}
      !
      --with-long-double={32|64|32,64|64,32|double}

      Only supported for the AVR target since version 10. Specify the default layout available for the C/C++ ‘double’ and ‘long double’ type, respectively. The following rules apply: *************** that ‘long double&rsq *** 2115,2121 **** 32 bits wide.

      !
      --with-double-comparison={tristate|bool|libf7}

      Only supported for the AVR target since version 10. Specify what result format is returned by library functions that compare 64-bit floating point values (DFmode). --- 2105,2111 ---- 32 bits wide.

      !
      --with-double-comparison={tristate|bool|libf7}

      Only supported for the AVR target since version 10. Specify what result format is returned by library functions that compare 64-bit floating point values (DFmode). *************** The GCC default is ‘tristate *** 2123,2129 **** implementation returns a boolean instead, set it to ‘bool’.

      !
      --with-libf7={libgcc|math|math-symbols|no}

      Only supported for the AVR target since version 10. Specify to which degree code from LibF7 is included in libgcc. LibF7 is an ad-hoc, AVR-specific, 64-bit floating point emulation --- 2113,2119 ---- implementation returns a boolean instead, set it to ‘bool’.

      !
      --with-libf7={libgcc|math|math-symbols|no}

      Only supported for the AVR target since version 10. Specify to which degree code from LibF7 is included in libgcc. LibF7 is an ad-hoc, AVR-specific, 64-bit floating point emulation *************** from elsewhere. This option sets *** 2139,2151 **** to ‘bool’.

      !
      --with-nds32-lib=library

      Specifies that library setting is used for building libgcc.a. Currently, the valid library is ‘newlib’ or ‘mculib’. This option is only supported for the NDS32 target.

      !
      --with-build-time-tools=dir

      Specifies where to find the set of target tools (assembler, linker, etc.) that will be used while building GCC itself. This option can be useful if the directory layouts are different between the system you are building --- 2129,2141 ---- to ‘bool’.

      !
      --with-nds32-lib=library

      Specifies that library setting is used for building libgcc.a. Currently, the valid library is ‘newlib’ or ‘mculib’. This option is only supported for the NDS32 target.

      !
      --with-build-time-tools=dir

      Specifies where to find the set of target tools (assembler, linker, etc.) that will be used while building GCC itself. This option can be useful if the directory layouts are different between the system you are building *************** tools. *** 2164,2171 ****

      ! !

      Overriding configure test results

      Sometimes, it might be necessary to override the result of some configure test, for example in order to ease porting to a new --- 2154,2160 ----

    !

    Overriding configure test results

    Sometimes, it might be necessary to override the result of some configure test, for example in order to ease porting to a new *************** system or work around a bug in a test. *** 2173,2193 **** script provides three variables for this:

    !
    build_configargs
    !
    !

    The contents of this variable is passed to all build configure scripts.

    !
    host_configargs
    !
    !

    The contents of this variable is passed to all host configure scripts.

    !
    target_configargs
    !
    !

    The contents of this variable is passed to all target configure scripts.

    --- 2162,2179 ---- script provides three variables for this:

    !
    build_configargs
    !

    The contents of this variable is passed to all build configure scripts.

    !
    host_configargs
    !

    The contents of this variable is passed to all host configure scripts.

    !
    target_configargs
    !

    The contents of this variable is passed to all target configure scripts.

    *************** scripts. *** 2197,2209 **** overrides, you can pass a setting for CONFIG_SITE and set variables in the site file.

    ! !

    Objective-C-Specific Options

    The following options apply to the build of the Objective-C runtime library.

    !
    --enable-objc-gc

    Specify that an additional variant of the GNU Objective-C runtime library is built, using an external build of the Boehm-Demers-Weiser garbage collector (https://www.hboehm.info/gc/). This library needs to be --- 2183,2194 ---- overrides, you can pass a setting for CONFIG_SITE and set variables in the site file.

    !

    Objective-C-Specific Options

    The following options apply to the build of the Objective-C runtime library.

    !
    --enable-objc-gc

    Specify that an additional variant of the GNU Objective-C runtime library is built, using an external build of the Boehm-Demers-Weiser garbage collector (https://www.hboehm.info/gc/). This library needs to be *************** additional runtime library is skipped wh *** 2213,2221 **** continues.

    !
    --with-target-bdw-gc=list
    !
    --with-target-bdw-gc-include=list
    !
    --with-target-bdw-gc-lib=list

    Specify search directories for the garbage collector header files and libraries. list is a comma separated list of key value pairs of the form ‘multilibdir=path’, where the default multilib key --- 2198,2206 ---- continues.

    !
    --with-target-bdw-gc=list
    !
    --with-target-bdw-gc-include=list
    !
    --with-target-bdw-gc-lib=list

    Specify search directories for the garbage collector header files and libraries. list is a comma separated list of key value pairs of the form ‘multilibdir=path’, where the default multilib key *************** default locations. *** 2234,2248 ****

    ! !

    D-Specific Options

    The following options apply to the build of the D runtime library.

    !
    --enable-libphobos-checking
    !
    --disable-libphobos-checking
    !
    --enable-libphobos-checking=list

    This option controls whether run-time checks and contracts are compiled into the D runtime library. When the option is not specified, the library is built with ‘release’ checking. When the option is specified without a --- 2219,2232 ----

    !

    D-Specific Options

    The following options apply to the build of the D runtime library.

    !
    --enable-libphobos-checking
    !
    --disable-libphobos-checking
    !
    --enable-libphobos-checking=list

    This option controls whether run-time checks and contracts are compiled into the D runtime library. When the option is not specified, the library is built with ‘release’ checking. When the option is specified without a *************** libphobos with -fno-release *** 2259,2266 **** with an extra option -fassert).

    !
    --with-libphobos-druntime-only
    !
    --with-libphobos-druntime-only=choice

    Specify whether to build only the core D runtime library (druntime), or both the core and standard library (phobos) into libphobos. This is useful for targets that have full support in druntime, but no or incomplete support --- 2243,2250 ---- with an extra option -fassert).

    !
    --with-libphobos-druntime-only
    !
    --with-libphobos-druntime-only=choice

    Specify whether to build only the core D runtime library (druntime), or both the core and standard library (phobos) into libphobos. This is useful for targets that have full support in druntime, but no or incomplete support *************** When the option is specified without a < *** 2273,2279 **** ‘--with-libphobos-druntime-only=yes’.

    !
    --with-target-system-zlib

    Use installed ‘zlib’ rather than that included with GCC. This needs to be available for each multilib variant, unless configured with --with-target-system-zlib=‘auto’ in which case the GCC included --- 2257,2263 ---- ‘--with-libphobos-druntime-only=yes’.

    !
    --with-target-system-zlib

    Use installed ‘zlib’ rather than that included with GCC. This needs to be available for each multilib variant, unless configured with --with-target-system-zlib=‘auto’ in which case the GCC included diff -Nrcpad gcc-12.3.0/INSTALL/download.html gcc-12.4.0/INSTALL/download.html *** gcc-12.3.0/INSTALL/download.html Mon May 8 12:15:26 2023 --- gcc-12.4.0/INSTALL/download.html Thu Jun 20 08:10:30 2024 *************** *** 1,5 **** --- 1,8 ---- + + + - - - Downloading GCC --- 22,27 ---- *************** You have freedom to copy and modify this *** 29,58 **** --- 29,52 ---- + + *************** ul.no-bullet {list-style: none} *** 80,87 **** ! !

    GCC is distributed via git and via HTTPS as tarballs compressed with gzip or bzip2. --- 74,81 ---- ! !

    GCC is distributed via git and via HTTPS as tarballs compressed with gzip or bzip2. diff -Nrcpad gcc-12.3.0/INSTALL/finalinstall.html gcc-12.4.0/INSTALL/finalinstall.html *** gcc-12.3.0/INSTALL/finalinstall.html Mon May 8 12:15:27 2023 --- gcc-12.4.0/INSTALL/finalinstall.html Thu Jun 20 08:10:31 2024 *************** *** 1,5 **** --- 1,8 ---- + + + - - - Installing GCC: Final installation --- 22,27 ---- *************** You have freedom to copy and modify this *** 29,58 **** --- 29,52 ---- + + *************** ul.no-bullet {list-style: none} *** 86,93 ****

    Now that GCC has been built (and optionally tested), you can install it with !

    ! 
    cd objdir && make install

    We strongly recommend to install into a target directory where there is --- 80,87 ----

    Now that GCC has been built (and optionally tested), you can install it with !

    ! 
    cd objdir && make install

    We strongly recommend to install into a target directory where there is *************** binutils, including assembler and linker *** 119,126 ****

    Installation into a temporary staging area or into a chroot jail can be achieved with the command

    !
    ! 
    make DESTDIR=path-to-rootdir install

    where path-to-rootdir is the absolute path of --- 113,120 ----

    Installation into a temporary staging area or into a chroot jail can be achieved with the command

    !
    ! 
    make DESTDIR=path-to-rootdir install

    where path-to-rootdir is the absolute path of *************** using the DESTDIR feature. *** 139,146 ****

    You can install stripped programs and libraries with

    !
    ! 
    make install-strip

    If you are bootstrapping a released version of GCC then please --- 133,140 ----

    You can install stripped programs and libraries with

    !
    ! 
    make install-strip

    If you are bootstrapping a released version of GCC then please diff -Nrcpad gcc-12.3.0/INSTALL/gfdl.html gcc-12.4.0/INSTALL/gfdl.html *** gcc-12.3.0/INSTALL/gfdl.html Mon May 8 12:15:27 2023 --- gcc-12.4.0/INSTALL/gfdl.html Thu Jun 20 08:10:31 2024 *************** *** 1,5 **** --- 1,8 ---- + + + - - - Installing GCC: GNU Free Documentation License --- 22,27 ---- *************** You have freedom to copy and modify this *** 29,58 **** --- 29,52 ---- + + *************** ul.no-bullet {list-style: none} *** 89,95 ****

    Installing GCC: GNU Free Documentation License

    !
    Version 1.3, 3 November 2008
    --- 83,89 ----

    Installing GCC: GNU Free Documentation License

    !
    Version 1.3, 3 November 2008
    *************** provided the MMC is eligible for relicen *** 522,536 ****

    • !

    ADDENDUM: How to use this License for your documents

    To use this License in a document you have written, include a copy of the License in the document and put the following copyright and license notices just after the title page:

    !
    ! 
      Copyright (C)  year  your name.
    Permission is granted to copy, distribute and/or modify this document
    under the terms of the GNU Free Documentation License, Version 1.3
    or any later version published by the Free Software Foundation;
--- 516,530 ----
  
    
  
  
! 
    
  
    ADDENDUM: How to use this License for your documents
    
  
  
    To use this License in a document you have written, include a copy of
  the License in the document and put the following copyright and
  license notices just after the title page:
  
    
! 
    
! 
      Copyright (C)  year  your name.
    Permission is granted to copy, distribute and/or modify this document
    under the terms of the GNU Free Documentation License, Version 1.3
    or any later version published by the Free Software Foundation;
*************** license notices just after the title pag
*** 542,549 ****
  
    If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
  replace the “with...Texts.” line with this:
  
    
! 
    
! 
        with the Invariant Sections being list their titles, with
      the Front-Cover Texts being list, and with the Back-Cover Texts
      being list.
  
    
--- 536,543 ----
  
    If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
  replace the “with...Texts.” line with this:
  
    
! 
    
! 
        with the Invariant Sections being list their titles, with
      the Front-Cover Texts being list, and with the Back-Cover Texts
      being list.
  
    
*************** to permit their use in free software.
*** 563,569 ****
  
    Return to the GCC Installation page
  
    
  
! 
    
  
  
  
--- 557,563 ----
  
    Return to the GCC Installation page
  
    
  
! 
    
  
  
  
diff -Nrcpad gcc-12.3.0/INSTALL/index.html gcc-12.4.0/INSTALL/index.html
*** gcc-12.3.0/INSTALL/index.html	Mon May  8 12:15:25 2023
--- gcc-12.4.0/INSTALL/index.html	Thu Jun 20 08:10:29 2024
***************
*** 1,5 ****
--- 1,8 ----
  
  
+ 
+ 
+ 
  
- 
- 
- 
  Installing GCC
  
  
--- 22,27 ----
*************** You have freedom to copy and modify this
*** 29,58 ****
  
  
  
  
--- 29,52 ----
  
  
  
+ 
+ 
  
*************** Free Documentation License”.
*** 145,151 ****
  
  
  
- 
  
  
  
--- 139,144 ----
diff -Nrcpad gcc-12.3.0/INSTALL/prerequisites.html gcc-12.4.0/INSTALL/prerequisites.html
*** gcc-12.3.0/INSTALL/prerequisites.html	Mon May  8 12:15:26 2023
--- gcc-12.4.0/INSTALL/prerequisites.html	Thu Jun 20 08:10:30 2024
***************
*** 1,5 ****
--- 1,8 ----
  
  
+ 
+ 
+ 
  
- 
- 
- 
  Prerequisites for GCC
  
  
--- 22,27 ----
*************** You have freedom to copy and modify this
*** 29,58 ****
  
  
  
  
--- 29,52 ----
  
  
  
+ 
+ 
  
*************** ul.no-bullet {list-style: none}
*** 79,94 ****
  
  
  
! 
  
  
    GCC requires that various tools and packages be available for use in the
  build procedure.  Modifying GCC sources requires additional tools
  described below.
  
    
! 
! 
    Tools/packages necessary for building GCC
    
  
    
! 
    ISO C++11 compiler
    
  
    Necessary to bootstrap GCC.  GCC 4.8.3 or newer has sufficient
  support for used C++11 features, with earlier GCC versions you
  might run into implementation bugs.
--- 73,87 ----
  
  
  
! 
  
  
    GCC requires that various tools and packages be available for use in the
  build procedure.  Modifying GCC sources requires additional tools
  described below.
  
    
! 
    Tools/packages necessary for building GCC
    
  
    
! 
    ISO C++11 compiler
    
  
    Necessary to bootstrap GCC.  GCC 4.8.3 or newer has sufficient
  support for used C++11 features, with earlier GCC versions you
  might run into implementation bugs.
*************** GCC binary (version 4.8.3 or later) beca
*** 104,110 ****
  frontends other than C might use GCC extensions.
  
    
  
    
! 
    C standard library and headers
    
  
    
  
    In order to build GCC, the C standard library and headers must be present
  for all target variants for which target libraries will be built (and not
--- 97,103 ----
  frontends other than C might use GCC extensions.
  
    
  
    
! 
    C standard library and headers
    
  
    
  
    In order to build GCC, the C standard library and headers must be present
  for all target variants for which target libraries will be built (and not
*************** name of the package depends on your dist
*** 121,127 ****
  ‘fatal error: gnu/stubs-32.h: No such file’
  
    
  
    
! 
    GNAT
    
  
    
  
    In order to build GNAT, the Ada compiler, you need a working GNAT
  compiler (GCC version 5.1 or later).
--- 114,120 ----
  ‘fatal error: gnu/stubs-32.h: No such file’
  
    
  
    
! 
    GNAT
    
  
    
  
    In order to build GNAT, the Ada compiler, you need a working GNAT
  compiler (GCC version 5.1 or later).
*************** by verifying that ‘gnatls -v
*** 151,157 ****
  section.
  
    
  
    
! 
    GDC
    
  
    
  
    In order to build GDC, the D compiler, you need a working GDC
  compiler (GCC version 9.4 or later) and D runtime library,
--- 144,150 ----
  section.
  
    
  
    
! 
    GDC
    
  
    
  
    In order to build GDC, the D compiler, you need a working GDC
  compiler (GCC version 9.4 or later) and D runtime library,
*************** and works if --enable-libphobos
  
    
! 
    A “working” POSIX compatible shell, or GNU bash
    
  
    
  
    Necessary when running configure because some
  /bin/sh shells have bugs and may crash when configuring the
--- 169,175 ----
  documented for affected targets.
  
    
  
    
! 
    A “working” POSIX compatible shell, or GNU bash
    
  
    
  
    Necessary when running configure because some
  /bin/sh shells have bugs and may crash when configuring the
*************** environment to your “good” s
*** 195,208 ****
  work when configuring GCC.
  
    
  
    
! 
    A POSIX or SVR4 awk
    
  
    
  
    Necessary for creating some of the generated source files for GCC.
  If in doubt, use a recent GNU awk version, as some of the older ones
  are broken.  GNU awk version 3.1.5 is known to work.
  
    
  
    
! 
    GNU binutils
    
  
    
  
    Necessary in some circumstances, optional in others.  See the
  host/target specific instructions for your platform for the exact
--- 188,201 ----
  work when configuring GCC.
  
    
  
    
! 
    A POSIX or SVR4 awk
    
  
    
  
    Necessary for creating some of the generated source files for GCC.
  If in doubt, use a recent GNU awk version, as some of the older ones
  are broken.  GNU awk version 3.1.5 is known to work.
  
    
  
    
! 
    GNU binutils
    
  
    
  
    Necessary in some circumstances, optional in others.  See the
  host/target specific instructions for your platform for the exact
*************** requirements.
*** 212,237 ****
  with GNU libtool that includes doing a bootstrap with LTO enabled.
  
    
  
    
! 
    gzip version 1.2.4 (or later) or
    
! 
    bzip2 version 1.0.2 (or later)
    
  
    
  
    Necessary to uncompress GCC tar files when source code is
  obtained via HTTPS mirror sites.
  
    
  
    
! 
    GNU make version 3.80 (or later)
    
  
    
  
    You must have GNU make installed to build GCC.
  
    
  
    
! 
    GNU tar version 1.14 (or later)
    
  
    
  
    Necessary (only on some platforms) to untar the source code.  Many
  systems’ tar programs will also work, only try GNU
  tar if you have problems.
  
    
  
    
! 
    Perl version between 5.6.1 and 5.6.24
    
  
    
  
    Necessary when targeting Darwin, building ‘libstdc++’,
  and not using --disable-symvers.
--- 205,230 ----
  with GNU libtool that includes doing a bootstrap with LTO enabled.
  
    
  
    
! 
    gzip version 1.2.4 (or later) or
    
! 
    bzip2 version 1.0.2 (or later)
    
  
    
  
    Necessary to uncompress GCC tar files when source code is
  obtained via HTTPS mirror sites.
  
    
  
    
! 
    GNU make version 3.80 (or later)
    
  
    
  
    You must have GNU make installed to build GCC.
  
    
  
    
! 
    GNU tar version 1.14 (or later)
    
  
    
  
    Necessary (only on some platforms) to untar the source code.  Many
  systems’ tar programs will also work, only try GNU
  tar if you have problems.
  
    
  
    
! 
    Perl version between 5.6.1 and 5.6.24
    
  
    
  
    Necessary when targeting Darwin, building ‘libstdc++’,
  and not using --disable-symvers.
*************** tables.
*** 247,252 ****
--- 240,248 ----
  
    
  
    Used by automake.
  
    
+ 
    If available, enables parallel testing of ‘libgomp’ in case that
+ flock is not available.
+ 
    
  
    
  
    
  
*************** support libraries then using those packa
*** 260,266 ****
  install the libraries.
  
    
  
    
! 
    GNU Multiple Precision Library (GMP) version 4.3.2 (or later)
    
  
    
  
    Necessary to build GCC.  If a GMP source distribution is found in a
  subdirectory of your GCC sources named gmp, it will be built
--- 256,262 ----
  install the libraries.
  
    
  
    
! 
    GNU Multiple Precision Library (GMP) version 4.3.2 (or later)
    
  
    
  
    Necessary to build GCC.  If a GMP source distribution is found in a
  subdirectory of your GCC sources named gmp, it will be built
*************** The in-tree build is only supported with
*** 272,278 ****
  download_prerequisites installs.
  
    
  
    
! 
    MPFR Library version 3.1.0 (or later)
    
  
    
  
    Necessary to build GCC.  It can be downloaded from
  https://www.mpfr.org.  If an MPFR source distribution is found
--- 268,274 ----
  download_prerequisites installs.
  
    
  
    
! 
    MPFR Library version 3.1.0 (or later)
    
  
    
  
    Necessary to build GCC.  It can be downloaded from
  https://www.mpfr.org.  If an MPFR source distribution is found
*************** The in-tree build is only supported with
*** 285,291 ****
  download_prerequisites installs.
  
    
  
    
! 
    MPC Library version 1.0.1 (or later)
    
  
    
  
    Necessary to build GCC.  It can be downloaded from
  https://www.multiprecision.org/mpc/.  If an MPC source distribution
--- 281,287 ----
  download_prerequisites installs.
  
    
  
    
! 
    MPC Library version 1.0.1 (or later)
    
  
    
  
    Necessary to build GCC.  It can be downloaded from
  https://www.multiprecision.org/mpc/.  If an MPC source distribution
*************** The in-tree build is only supported with
*** 298,304 ****
  download_prerequisites installs.
  
    
  
    
! 
    isl Library version 0.15 or later.
    
  
    
  
    Necessary to build GCC with the Graphite loop optimizations.
  It can be downloaded from https://gcc.gnu.org/pub/gcc/infrastructure/.
--- 294,300 ----
  download_prerequisites installs.
  
    
  
    
! 
    isl Library version 0.15 or later.
    
  
    
  
    Necessary to build GCC with the Graphite loop optimizations.
  It can be downloaded from https://gcc.gnu.org/pub/gcc/infrastructure/.
*************** option should be used if isl is not inst
*** 309,315 ****
  search path.
  
    
  
    
! 
    zstd Library.
    
  
    
  
    Necessary to build GCC with zstd compression used for LTO bytecode.
  The library is searched in your default library patch search.
--- 305,311 ----
  search path.
  
    
  
    
! 
    zstd Library.
    
  
    
  
    Necessary to build GCC with zstd compression used for LTO bytecode.
  The library is searched in your default library patch search.
*************** Alternatively, the --with-zstd
  
    
  
! 
! 
    Tools/packages necessary for modifying GCC
    
  
    
! 
    autoconf version 2.69
    
! 
    GNU m4 version 1.4.6 (or later)
    
  
    
  
    Necessary when modifying configure.ac, aclocal.m4, etc.
  to regenerate configure and config.in files.
  
    
  
    
! 
    automake version 1.15.1
    
  
    
  
    Necessary when modifying a Makefile.am file to regenerate its
  associated Makefile.in.
--- 314,329 ----
  
    
  
    
  
! 
    Tools/packages necessary for modifying GCC
    
  
    
! 
    autoconf version 2.69
    
! 
    GNU m4 version 1.4.6 (or later)
    
  
    
  
    Necessary when modifying configure.ac, aclocal.m4, etc.
  to regenerate configure and config.in files.
  
    
  
    
! 
    automake version 1.15.1
    
  
    
  
    Necessary when modifying a Makefile.am file to regenerate its
  associated Makefile.in.
*************** to a newer version, please update all th
*** 344,371 ****
  to the latest released version.
  
    
  
    
! 
    gettext version 0.14.5 (or later)
    
  
    
  
    Needed to regenerate gcc.pot.
  
    
  
    
! 
    gperf version 2.7.2 (or later)
    
  
    
  
    Necessary when modifying gperf input files, e.g.
  gcc/cp/cfns.gperf to regenerate its associated header file, e.g.
  gcc/cp/cfns.h.
  
    
  
    
! 
    DejaGnu version 1.5.3 (or later)
    
! 
    Expect
    
! 
    Tcl
    
  
    
  
    Necessary to run the GCC testsuite; see the section on testing for
  details.
  
    
  
    
! 
    autogen version 5.5.4 (or later) and
    
! 
    guile version 1.4.1 (or later)
    
  
    
  
    Necessary to regenerate fixinc/fixincl.x from
  fixinc/inclhack.def and fixinc/*.tpl.
--- 339,366 ----
  to the latest released version.
  
    
  
    
! 
    gettext version 0.14.5 (or later)
    
  
    
  
    Needed to regenerate gcc.pot.
  
    
  
    
! 
    gperf version 2.7.2 (or later)
    
  
    
  
    Necessary when modifying gperf input files, e.g.
  gcc/cp/cfns.gperf to regenerate its associated header file, e.g.
  gcc/cp/cfns.h.
  
    
  
    
! 
    DejaGnu version 1.5.3 (or later)
    
! 
    Expect
    
! 
    Tcl
    
  
    
  
    Necessary to run the GCC testsuite; see the section on testing for
  details.
  
    
  
    
! 
    autogen version 5.5.4 (or later) and
    
! 
    guile version 1.4.1 (or later)
    
  
    
  
    Necessary to regenerate fixinc/fixincl.x from
  fixinc/inclhack.def and fixinc/*.tpl.
*************** details.
*** 376,382 ****
  Makefile.tpl and Makefile.def.
  
    
  
    
! 
    Flex version 2.5.4 (or later)
    
  
    
  
    Necessary when modifying *.l files.
  
    
--- 371,377 ----
  Makefile.tpl and Makefile.def.
  
    
  
    
! 
    Flex version 2.5.4 (or later)
    
  
    
  
    Necessary when modifying *.l files.
  
    
*************** files are not included in the version-co
*** 385,391 ****
  They are included in releases.
  
    
  
    
! 
    Texinfo version 4.7 (or later)
    
  
    
  
    Necessary for running makeinfo when modifying *.texi
  files to test your changes.
--- 380,386 ----
  They are included in releases.
  
    
  
    
! 
    Texinfo version 4.7 (or later)
    
  
    
  
    Necessary for running makeinfo when modifying *.texi
  files to test your changes.
*************** generated output files are not included
*** 399,430 ****
  included in releases.
  
    
  
    
! 
    TeX (any working version)
    
  
    
  
    Necessary for running texi2dvi and texi2pdf, which
  are used when running make dvi or make pdf to create
  DVI or PDF files, respectively.
  
    
  
    
! 
    Sphinx version 1.0 (or later)
    
  
    
  
    Necessary to regenerate jit/docs/_build/texinfo from the .rst
  files in the directories below jit/docs.
  
    
  
    
! 
    git (any version)
    
! 
    SSH (any version)
    
  
    
  
    Necessary to access the source repository.  Public releases and weekly
  snapshots of the development sources are also available via HTTPS.
  
    
  
    
! 
    GNU diffutils version 2.7 (or later)
    
  
    
  
    Useful when submitting patches for the GCC source code.
  
    
  
    
! 
    patch version 2.5.4 (or later)
    
  
    
  
    Necessary when applying patches, created with diff, to one’s
  own sources.
--- 394,425 ----
  included in releases.
  
    
  
    
! 
    TeX (any working version)
    
  
    
  
    Necessary for running texi2dvi and texi2pdf, which
  are used when running make dvi or make pdf to create
  DVI or PDF files, respectively.
  
    
  
    
! 
    Sphinx version 1.0 (or later)
    
  
    
  
    Necessary to regenerate jit/docs/_build/texinfo from the .rst
  files in the directories below jit/docs.
  
    
  
    
! 
    git (any version)
    
! 
    SSH (any version)
    
  
    
  
    Necessary to access the source repository.  Public releases and weekly
  snapshots of the development sources are also available via HTTPS.
  
    
  
    
! 
    GNU diffutils version 2.7 (or later)
    
  
    
  
    Useful when submitting patches for the GCC source code.
  
    
  
    
! 
    patch version 2.5.4 (or later)
    
  
    
  
    Necessary when applying patches, created with diff, to one’s
  own sources.
diff -Nrcpad gcc-12.3.0/INSTALL/specific.html gcc-12.4.0/INSTALL/specific.html
*** gcc-12.3.0/INSTALL/specific.html	Mon May  8 12:15:26 2023
--- gcc-12.4.0/INSTALL/specific.html	Thu Jun 20 08:10:30 2024
***************
*** 1,5 ****
--- 1,8 ----
  
  
+ 
+ 
+ 
  
- 
- 
- 
  Host/Target specific installation notes for GCC
  
  
--- 22,27 ----
*************** You have freedom to copy and modify this
*** 29,58 ****
  
  
  
  
--- 29,52 ----
  
  
  
+ 
+ 
  
*************** ul.no-bullet {list-style: none}
*** 86,96 ****
  
  
  
! 
! 
! 
! 
! 
  
  
    Please read this document carefully before installing the
  GNU Compiler Collection on your machine.
--- 80,90 ----
  
  
  
! 
! 
! 
! 
! 
  
  
    Please read this document carefully before installing the
  GNU Compiler Collection on your machine.
*************** information have to.
*** 191,198 ****
  
  
  
    
! 
! 
    aarch64*-*-*
    
  
    Binutils pre 2.24 does not have support for selecting -mabi and
  does not support ILP32.  If it is used to build GCC 4.9 or later, GCC will
  not support option -mabi=ilp32.
--- 185,191 ----
  
  
  
    
! 
    aarch64*-*-*
    
  
    Binutils pre 2.24 does not have support for selecting -mabi and
  does not support ILP32.  If it is used to build GCC 4.9 or later, GCC will
  not support option -mabi=ilp32.
*************** protections by default.  This mechanism
*** 229,248 ****
  of the options are given at configure time.
  
    
  
    
! 
! 
    alpha*-*-*
    
  
    This section contains general configuration information for all
  Alpha-based platforms using ELF.  In addition to reading this
  section, please read all other sections that match your target.
  
    
  
    
! 
! 
    amd64-*-solaris2*
    
  
    This is a synonym for ‘x86_64-*-solaris2*’.
  
    
  
    
! 
! 
    amdgcn-*-amdhsa
    
  
    AMD GCN GPU target.
  
    
  
    Instead of GNU Binutils, you will need to install LLVM 13.0.1, or later, and copy
--- 222,238 ----
  of the options are given at configure time.
  
    
  
    
! 
    alpha*-*-*
    
  
    This section contains general configuration information for all
  Alpha-based platforms using ELF.  In addition to reading this
  section, please read all other sections that match your target.
  
    
  
    
! 
    amd64-*-solaris2*
    
  
    This is a synonym for ‘x86_64-*-solaris2*’.
  
    
  
    
! 
    amdgcn-*-amdhsa
    
  
    AMD GCN GPU target.
  
    
  
    Instead of GNU Binutils, you will need to install LLVM 13.0.1, or later, and copy
*************** section, please read all other sections
*** 260,281 ****
  on the GPU.
  
    
  
    
! 
! 
    arc-*-elf32
    
  
  
    Use ‘configure --target=arc-elf32 --with-cpu=cpu --enable-languages="c,c++"’
  to configure GCC, with cpu being one of ‘arc600’, ‘arc601’,
  or ‘arc700’.
  
    
  
    
! 
! 
    arc-linux-uclibc
    
  
  
    Use ‘configure --target=arc-linux-uclibc --with-cpu=arc700 --enable-languages="c,c++"’ to configure GCC.
  
    
  
    
! 
! 
    arm-*-eabi
    
  
    ARM-family processors.
  
    
  
    Building the Ada frontend commonly fails (an infinite loop executing
--- 250,268 ----
  on the GPU.
  
    
  
    
! 
    arc-*-elf32
    
  
  
    Use ‘configure --target=arc-elf32 --with-cpu=cpu --enable-languages="c,c++"’
  to configure GCC, with cpu being one of ‘arc600’, ‘arc601’,
  or ‘arc700’.
  
    
  
    
! 
    arc-linux-uclibc
    
  
  
    Use ‘configure --target=arc-linux-uclibc --with-cpu=arc700 --enable-languages="c,c++"’ to configure GCC.
  
    
  
    
! 
    arm-*-eabi
    
  
    ARM-family processors.
  
    
  
    Building the Ada frontend commonly fails (an infinite loop executing
*************** or ‘arc700’.
*** 283,290 ****
  GNAT 4.6, 4.9 or 5 release branches are known to succeed.
  
    
  
    
! 
! 
    avr
    
  
    ATMEL AVR-family micro controllers.  These are used in embedded
  applications.  There are no standard Unix configurations.
  See “AVR Options” in the main manual
--- 270,276 ----
  GNAT 4.6, 4.9 or 5 release branches are known to succeed.
  
    
  
    
! 
    avr
    
  
    ATMEL AVR-family micro controllers.  These are used in embedded
  applications.  There are no standard Unix configurations.
  See “AVR Options” in the main manual
*************** can also be obtained from:
*** 301,315 ****

The following error: !

! 
Error: register required

indicates that you should upgrade to a newer version of the binutils.

! !

Blackfin

The Blackfin processor, an Analog Devices DSP. See “Blackfin Options” in the main manual

--- 287,300 ----

The following error: !

! 
Error: register required

indicates that you should upgrade to a newer version of the binutils.

!

Blackfin

The Blackfin processor, an Analog Devices DSP. See “Blackfin Options” in the main manual

*************** See “Blackfin Options” in th *** 317,324 **** are available at https://sourceforge.net/projects/adi-toolchain/.

! !

CR16

The CR16 CompactRISC architecture is a 16-bit architecture. This architecture is used in embedded applications.

--- 302,308 ---- are available at https://sourceforge.net/projects/adi-toolchain/.

!

CR16

The CR16 CompactRISC architecture is a 16-bit architecture. This architecture is used in embedded applications.

*************** GCC for building a CR16 elf cross-c *** 332,339 **** configure GCC for building a CR16 uclinux cross-compiler.

! !

CRIS

CRIS is a CPU architecture in Axis Communications systems-on-a-chip, for example the ETRAX series. These are used in embedded applications.

--- 316,322 ---- configure GCC for building a CR16 uclinux cross-compiler.

!

CRIS

CRIS is a CPU architecture in Axis Communications systems-on-a-chip, for example the ETRAX series. These are used in embedded applications.

*************** for a list of CRIS-specific options. *** 343,350 ****

Use ‘configure --target=cris-elf’ to configure GCC for building a cross-compiler for CRIS.

!

!

DOS

Please have a look at the binaries page.

You cannot install GCC by itself on MSDOS; it will not compile under --- 326,332 ----

Use ‘configure --target=cris-elf’ to configure GCC for building a cross-compiler for CRIS.

!

DOS

Please have a look at the binaries page.

You cannot install GCC by itself on MSDOS; it will not compile under *************** compilation package DJGPP, which include *** 353,366 **** and includes all the necessary compilation tools and libraries.

! !

epiphany-*-elf

Adapteva Epiphany. This configuration is intended for embedded systems.

! !

*-*-freebsd*

In order to better utilize FreeBSD base system functionality and match the configuration of the system compiler, GCC 4.5 and above as well as GCC 4.4 past 2010-06-20 leverage SSP support in libc (which is present --- 335,346 ---- and includes all the necessary compilation tools and libraries.

!

epiphany-*-elf

Adapteva Epiphany. This configuration is intended for embedded systems.

!

*-*-freebsd*

In order to better utilize FreeBSD base system functionality and match the configuration of the system compiler, GCC 4.5 and above as well as GCC 4.4 past 2010-06-20 leverage SSP support in libc (which is present *************** properly on FreeBSD prior to the FreeBSD *** 391,404 **** after 2.16.1.

! !

ft32-*-elf

The FT32 processor. This configuration is intended for embedded systems.

! !

h8300-hms

Renesas H8/300 series of processors.

Please have a look at the binaries page. --- 371,382 ---- after 2.16.1.

!

ft32-*-elf

The FT32 processor. This configuration is intended for embedded systems.

!

h8300-hms

Renesas H8/300 series of processors.

Please have a look at the binaries page. *************** first three arguments in function calls *** 409,416 **** longer a multiple of 2 bytes.

! !

hppa*-hp-hpux*

Support for HP-UX version 9 and older was discontinued in GCC 3.4.

We require using gas/binutils on all hppa platforms. Version 2.19 or --- 387,393 ---- longer a multiple of 2 bytes.

!

hppa*-hp-hpux*

Support for HP-UX version 9 and older was discontinued in GCC 3.4.

We require using gas/binutils on all hppa platforms. Version 2.19 or *************** a list of the predefines used with each *** 460,467 ****

More specific information to ‘hppa*-hp-hpux*’ targets follows.

! !

hppa*-hp-hpux10

For hpux10.20, we highly recommend you pick up the latest sed patch PHCO_19798 from HP.

--- 437,443 ----

More specific information to ‘hppa*-hp-hpux*’ targets follows.

!

hppa*-hp-hpux10

For hpux10.20, we highly recommend you pick up the latest sed patch PHCO_19798 from HP.

*************** problems in using C++ on this target. H *** 471,478 **** with the one implemented under HP-UX 11 using secondary definitions.

! !

hppa*-hp-hpux11

GCC 3.0 and up support HP-UX 11. GCC 2.95.x is not supported and cannot be used to compile GCC 3.0 and up.

--- 447,453 ---- with the one implemented under HP-UX 11 using secondary definitions.

!

hppa*-hp-hpux11

GCC 3.0 and up support HP-UX 11. GCC 2.95.x is not supported and cannot be used to compile GCC 3.0 and up.

*************** versioning with --disable-symvers< *** 575,582 **** supported, so --enable-threads=dce does not work.

! !

*-*-linux-gnu

The .init_array and .fini_array sections are enabled unconditionally which requires at least glibc 2.1 and binutils 2.12.

--- 550,556 ---- supported, so --enable-threads=dce does not work.

!

*-*-linux-gnu

The .init_array and .fini_array sections are enabled unconditionally which requires at least glibc 2.1 and binutils 2.12.

*************** in glibc 2.2.5 and later. More informat *** 585,592 **** libstdc++-v3 documentation.

! !

i?86-*-linux*

As of GCC 3.3, binutils 2.13.1 or later is required for this platform. See bug 10877 for more information.

--- 559,565 ---- libstdc++-v3 documentation.

!

i?86-*-linux*

As of GCC 3.3, binutils 2.13.1 or later is required for this platform. See bug 10877 for more information.

*************** possible you have a hardware problem. F *** 595,602 **** found on www.bitwizard.nl.

! !

i?86-*-solaris2*

Use this for Solaris 11.3 or later on x86 and x86-64 systems. Starting with GCC 4.7, there is also a 64-bit ‘amd64-*-solaris2*’ or ‘x86_64-*-solaris2*’ configuration that corresponds to --- 568,574 ---- found on www.bitwizard.nl.

!

i?86-*-solaris2*

Use this for Solaris 11.3 or later on x86 and x86-64 systems. Starting with GCC 4.7, there is also a 64-bit ‘amd64-*-solaris2*’ or ‘x86_64-*-solaris2*’ configuration that corresponds to *************** to configure with --without-gnu-ld *** 620,627 **** guarantee use of Solaris ld.

! !

ia64-*-linux

IA-64 processor (also known as IPF, or Itanium Processor Family) running GNU/Linux.

--- 592,598 ---- guarantee use of Solaris ld.

!

ia64-*-linux

IA-64 processor (also known as IPF, or Itanium Processor Family) running GNU/Linux.

*************** running GNU/Linux. *** 630,637 **** later.

! !

ia64-*-hpux*

Building GCC on this target requires the GNU Assembler. The bundled HP assembler will not work. To prevent GCC from using the wrong assembler, the option --with-gnu-as may be necessary. --- 601,607 ---- later.

!

ia64-*-hpux*

Building GCC on this target requires the GNU Assembler. The bundled HP assembler will not work. To prevent GCC from using the wrong assembler, the option --with-gnu-as may be necessary. *************** removed and the system libunwind library *** 644,651 ****

! !

*-ibm-aix*

Support for AIX version 3 and older was discontinued in GCC 3.4. Support for AIX version 4.2 and older was discontinued in GCC 4.5.

--- 614,620 ----

!

*-ibm-aix*

Support for AIX version 3 and older was discontinued in GCC 3.4. Support for AIX version 4.2 and older was discontinued in GCC 4.5.

*************** with an earlier release of GCC is recomm *** 662,669 **** requires a larger data segment, which can be enabled through the LDR_CNTRL environment variable, e.g.,

!
! 
% LDR_CNTRL=MAXDATA=0x50000000
  % export LDR_CNTRL
--- 631,638 ---- requires a larger data segment, which can be enabled through the LDR_CNTRL environment variable, e.g.,

!
! 
% LDR_CNTRL=MAXDATA=0x50000000
  % export LDR_CNTRL
*************** with a version of GCC built for an earli *** 674,681 ****

To speed up the configuration phases of bootstrapping and installing GCC, one may use GNU Bash instead of AIX /bin/sh, e.g.,

!
! 
% CONFIG_SHELL=/opt/freeware/bin/bash
  % export CONFIG_SHELL
--- 643,650 ----

To speed up the configuration phases of bootstrapping and installing GCC, one may use GNU Bash instead of AIX /bin/sh, e.g.,

!
! 
% CONFIG_SHELL=/opt/freeware/bin/bash
  % export CONFIG_SHELL
*************** APAR IY26685 (AIX 4.3) or APAR IY25528 ( *** 725,731 **** fix for another AIX Assembler bug and a co-dependent AIX Archiver fix referenced as APAR IY53606 (AIX 5.2) or as APAR IY54774 (AIX 5.1)

!

‘libstdc++’ in GCC 3.4 increments the major version number of the shared object and GCC installation places the libstdc++.a shared library in a common location which will overwrite the and GCC 3.3 version of the shared library. Applications either need to be --- 694,700 ---- fix for another AIX Assembler bug and a co-dependent AIX Archiver fix referenced as APAR IY53606 (AIX 5.2) or as APAR IY54774 (AIX 5.1)

!

‘libstdc++’ in GCC 3.4 increments the major version number of the shared object and GCC installation places the libstdc++.a shared library in a common location which will overwrite the and GCC 3.3 version of the shared library. Applications either need to be *************** multilib libstdc++.a instal *** 739,758 ****

Extract the shared objects from the currently installed libstdc++.a archive: !

! 
% ar -x libstdc++.a libstdc++.so.4 libstdc++.so.5

Enable the ‘F_LOADONLY’ flag so that the shared object will be available for runtime dynamic loading, but not linking: !

! 
% strip -e libstdc++.so.4 libstdc++.so.5

Archive the runtime-only shared object in the GCC 3.4 libstdc++.a archive: !

! 
% ar -q libstdc++.a libstdc++.so.4 libstdc++.so.5

Eventually, the --- 708,727 ----

Extract the shared objects from the currently installed libstdc++.a archive: !

! 
% ar -x libstdc++.a libstdc++.so.4 libstdc++.so.5

Enable the ‘F_LOADONLY’ flag so that the shared object will be available for runtime dynamic loading, but not linking: !

! 
% strip -e libstdc++.so.4 libstdc++.so.5

Archive the runtime-only shared object in the GCC 3.4 libstdc++.a archive: !

! 
% ar -q libstdc++.a libstdc++.so.4 libstdc++.so.5

Eventually, the *************** environment variable to ‘C--with-cpu-cpu_type.

! !

iq2000-*-elf

Vitesse IQ2000 processors. These are used in embedded applications. There are no standard Unix configurations.

! !

lm32-*-elf

Lattice Mico32 processor. This configuration is intended for embedded systems.

! !

lm32-*-uclinux

Lattice Mico32 processor. This configuration is intended for embedded systems running uClinux.

! !

LoongArch

LoongArch processor. The following LoongArch targets are available:

!
loongarch64-linux-gnu*

LoongArch processor running GNU/Linux. This target triplet may be coupled with a small set of possible suffixes to identify their default ABI type:

!
f64

Uses lp64d/base ABI by default.

!
f32

Uses lp64f/base ABI by default.

!
sf

Uses lp64s/base ABI by default.

!
loongarch64-linux-gnu

Same as loongarch64-linux-gnuf64, but may be used with --with-abi=* to configure the default ABI type.

--- 778,819 ---- switch and using the configure option --with-cpu-cpu_type.

!

iq2000-*-elf

Vitesse IQ2000 processors. These are used in embedded applications. There are no standard Unix configurations.

!

lm32-*-elf

Lattice Mico32 processor. This configuration is intended for embedded systems.

!

lm32-*-uclinux

Lattice Mico32 processor. This configuration is intended for embedded systems running uClinux.

!

LoongArch

LoongArch processor. The following LoongArch targets are available:

!
loongarch64-linux-gnu*

LoongArch processor running GNU/Linux. This target triplet may be coupled with a small set of possible suffixes to identify their default ABI type:

!
f64

Uses lp64d/base ABI by default.

!
f32

Uses lp64f/base ABI by default.

!
sf

Uses lp64s/base ABI by default.

!
loongarch64-linux-gnu

Same as loongarch64-linux-gnuf64, but may be used with --with-abi=* to configure the default ABI type.

*************** with a small set of possible suffixes to *** 858,877 **** https://github.com/loongson/LoongArch-Documentation.

! !

m32c-*-elf

Renesas M32C processor. This configuration is intended for embedded systems.

! !

m32r-*-elf

Renesas M32R processor. This configuration is intended for embedded systems.

! !

m68k-*-*

By default, ‘m68k-*-elf*’, ‘m68k-*-rtems’, ‘m68k-*-uclinux’ and ‘m68k-*-linux’ --- 823,839 ---- https://github.com/loongson/LoongArch-Documentation.

!

m32c-*-elf

Renesas M32C processor. This configuration is intended for embedded systems.

!

m32r-*-elf

Renesas M32R processor. This configuration is intended for embedded systems.

!

m68k-*-*

By default, ‘m68k-*-elf*’, ‘m68k-*-rtems’, ‘m68k-*-uclinux’ and ‘m68k-*-linux’ *************** be a -mcpu argument or one *** 897,918 ****

GCC requires at least binutils version 2.17 on these targets.

! !

m68k-*-uclinux

GCC 4.3 changed the uClinux configuration so that it uses the ‘m68k-linux-gnu’ ABI rather than the ‘m68k-elf’ ABI. It also added improved support for C++ and flat shared libraries, both of which were ABI changes.

! !

microblaze-*-elf

Xilinx MicroBlaze processor. This configuration is intended for embedded systems.

! !

mips-*-*

If on a MIPS system you get an error message saying “does not have gp sections for all it’s [sic] sectons [sic]”, don’t worry about it. This happens whenever you use GAS with the MIPS linker, but there is not --- 859,877 ----

GCC requires at least binutils version 2.17 on these targets.

!

m68k-*-uclinux

GCC 4.3 changed the uClinux configuration so that it uses the ‘m68k-linux-gnu’ ABI rather than the ‘m68k-elf’ ABI. It also added improved support for C++ and flat shared libraries, both of which were ABI changes.

!

microblaze-*-elf

Xilinx MicroBlaze processor. This configuration is intended for embedded systems.

!

mips-*-*

If on a MIPS system you get an error message saying “does not have gp sections for all it’s [sic] sectons [sic]”, don’t worry about it. This happens whenever you use GAS with the MIPS linker, but there is not *************** the use of break, use the --with-d *** 952,964 **** use traps on systems that support them.

! !

moxie-*-elf

The moxie processor.

! !

msp430-*-elf*

TI MSP430 processor. This configuration is intended for embedded systems.

--- 911,921 ---- use traps on systems that support them.

!

moxie-*-elf

The moxie processor.

!

msp430-*-elf*

TI MSP430 processor. This configuration is intended for embedded systems.

*************** in a minimal run-time environment by def *** 977,994 ****
! !

nds32le-*-elf

Andes NDS32 target in little endian mode.

! !

nds32be-*-elf

Andes NDS32 target in big endian mode.

! !

nvptx-*-none

Nvidia PTX target.

Instead of GNU binutils, you will need to install --- 934,948 ----

!

nds32le-*-elf

Andes NDS32 target in little endian mode.

!

nds32be-*-elf

Andes NDS32 target in big endian mode.

!

nvptx-*-none

Nvidia PTX target.

Instead of GNU binutils, you will need to install *************** the GCC sources. *** 1005,1031 **** --enable-newlib-io-long-long options when configuring.

! !

or1k-*-elf

The OpenRISC 1000 32-bit processor with delay slots. This configuration is intended for embedded systems.

! !

or1k-*-linux

The OpenRISC 1000 32-bit processor with delay slots.

! !

powerpc-*-*

You can specify a default version for the -mcpu=cpu_type switch by using the configure option --with-cpu-cpu_type.

You will need GNU binutils 2.20 or newer.

! !

powerpc-*-darwin*

PowerPC running Darwin (Mac OS X kernel).

Pre-installed versions of Mac OS X may not include any developer tools, --- 959,981 ---- --enable-newlib-io-long-long options when configuring.

!

or1k-*-elf

The OpenRISC 1000 32-bit processor with delay slots. This configuration is intended for embedded systems.

!

or1k-*-linux

The OpenRISC 1000 32-bit processor with delay slots.

!

powerpc-*-*

You can specify a default version for the -mcpu=cpu_type switch by using the configure option --with-cpu-cpu_type.

You will need GNU binutils 2.20 or newer.

!

powerpc-*-darwin*

PowerPC running Darwin (Mac OS X kernel).

Pre-installed versions of Mac OS X may not include any developer tools, *************** cctools-590.36 package referenced from *** 1039,1141 **** on systems older than 10.3.9 (aka darwin7.9.0).

! !

powerpc-*-elf

PowerPC system in big endian mode, running System V.4.

! !

powerpc*-*-linux-gnu*

PowerPC system in big endian mode running Linux.

! !

powerpc-*-netbsd*

PowerPC system in big endian mode running NetBSD.

! !

powerpc-*-eabisim

Embedded PowerPC system in big endian mode for use in running under the PSIM simulator.

! !

powerpc-*-eabi

Embedded PowerPC system in big endian mode.

! !

powerpcle-*-elf

PowerPC system in little endian mode, running System V.4.

! !

powerpcle-*-eabisim

Embedded PowerPC system in little endian mode for use in running under the PSIM simulator.

! !

powerpcle-*-eabi

Embedded PowerPC system in little endian mode.

! !

rl78-*-elf

The Renesas RL78 processor. This configuration is intended for embedded systems.

! !

riscv32-*-elf

The RISC-V RV32 instruction set. This configuration is intended for embedded systems. This (and all other RISC-V) targets require the binutils 2.30 release.

! !

riscv32-*-linux

The RISC-V RV32 instruction set running GNU/Linux. This (and all other RISC-V) targets require the binutils 2.30 release.

! !

riscv64-*-elf

The RISC-V RV64 instruction set. This configuration is intended for embedded systems. This (and all other RISC-V) targets require the binutils 2.30 release.

! !

riscv64-*-linux

The RISC-V RV64 instruction set running GNU/Linux. This (and all other RISC-V) targets require the binutils 2.30 release.

! !

rx-*-elf

The Renesas RX processor.

! !

s390-*-linux*

S/390 system running GNU/Linux for S/390.

! !

s390x-*-linux*

zSeries system (64-bit) running GNU/Linux for zSeries.

! !

s390x-ibm-tpf*

zSeries system (64-bit) running TPF. This platform is supported as cross-compilation target only.

! !

*-*-solaris2*

Support for Solaris 10 has been removed in GCC 10. Support for Solaris 9 has been removed in GCC 5. Support for Solaris 8 has been removed in GCC 4.8. Support for Solaris 7 has been removed in GCC 4.6. --- 989,1073 ---- on systems older than 10.3.9 (aka darwin7.9.0).

!

powerpc-*-elf

PowerPC system in big endian mode, running System V.4.

!

powerpc*-*-linux-gnu*

PowerPC system in big endian mode running Linux.

!

powerpc-*-netbsd*

PowerPC system in big endian mode running NetBSD.

!

powerpc-*-eabisim

Embedded PowerPC system in big endian mode for use in running under the PSIM simulator.

!

powerpc-*-eabi

Embedded PowerPC system in big endian mode.

!

powerpcle-*-elf

PowerPC system in little endian mode, running System V.4.

!

powerpcle-*-eabisim

Embedded PowerPC system in little endian mode for use in running under the PSIM simulator.

!

powerpcle-*-eabi

Embedded PowerPC system in little endian mode.

!

rl78-*-elf

The Renesas RL78 processor. This configuration is intended for embedded systems.

!

riscv32-*-elf

The RISC-V RV32 instruction set. This configuration is intended for embedded systems. This (and all other RISC-V) targets require the binutils 2.30 release.

!

riscv32-*-linux

The RISC-V RV32 instruction set running GNU/Linux. This (and all other RISC-V) targets require the binutils 2.30 release.

!

riscv64-*-elf

The RISC-V RV64 instruction set. This configuration is intended for embedded systems. This (and all other RISC-V) targets require the binutils 2.30 release.

!

riscv64-*-linux

The RISC-V RV64 instruction set running GNU/Linux. This (and all other RISC-V) targets require the binutils 2.30 release.

!

rx-*-elf

The Renesas RX processor.

!

s390-*-linux*

S/390 system running GNU/Linux for S/390.

!

s390x-*-linux*

zSeries system (64-bit) running GNU/Linux for zSeries.

!

s390x-ibm-tpf*

zSeries system (64-bit) running TPF. This platform is supported as cross-compilation target only.

!

*-*-solaris2*

Support for Solaris 10 has been removed in GCC 10. Support for Solaris 9 has been removed in GCC 5. Support for Solaris 8 has been removed in GCC 4.8. Support for Solaris 7 has been removed in GCC 4.6. *************** you can install a pre-built GCC to boots *** 1150,1157 **** ‘libstdc++-v3’. We therefore recommend using the following initial sequence of commands

!
! 
% CONFIG_SHELL=/bin/ksh
  % export CONFIG_SHELL
--- 1082,1089 ---- ‘libstdc++-v3’. We therefore recommend using the following initial sequence of commands

!
! 
% CONFIG_SHELL=/bin/ksh
  % export CONFIG_SHELL
*************** need to provide a more recent one. *** 1215,1222 ****
! !

sparc*-*-*

This section contains general configuration information for all SPARC-based platforms. In addition to reading this section, please read all other sections that match your target. --- 1147,1153 ----

!

sparc*-*-*

This section contains general configuration information for all SPARC-based platforms. In addition to reading this section, please read all other sections that match your target. *************** of the exact versions of these libraries *** 1228,1235 **** in the prerequisites.

! !

sparc-sun-solaris2*

When GCC is configured to use GNU binutils 2.14 or later, the binaries produced are smaller than the ones produced using Solaris native tools; this difference is quite significant for binaries containing debugging --- 1159,1165 ---- in the prerequisites.

!

sparc-sun-solaris2*

When GCC is configured to use GNU binutils 2.14 or later, the binaries produced are smaller than the ones produced using Solaris native tools; this difference is quite significant for binaries containing debugging *************** target triplet must be specified as the *** 1249,1265 **** configure line. This target triplet can be obtained by invoking ./config.guess in the toplevel source directory of GCC (and not that of GMP or MPFR or MPC). For example on a Solaris 11 system:

!
! 
% ./configure --build=sparc-sun-solaris2.11 --prefix=xxx
! !

sparc-*-linux*

! !

sparc64-*-solaris2*

When configuring a 64-bit-default GCC on Solaris/SPARC, you must use a build compiler that generates 64-bit code, either by default or by specifying ‘CC='gcc -m64' CXX='gcc-m64'’ to configure. --- 1179,1193 ---- configure line. This target triplet can be obtained by invoking ./config.guess in the toplevel source directory of GCC (and not that of GMP or MPFR or MPC). For example on a Solaris 11 system:

!
! 
% ./configure --build=sparc-sun-solaris2.11 --prefix=xxx
!

sparc-*-linux*

!

sparc64-*-solaris2*

When configuring a 64-bit-default GCC on Solaris/SPARC, you must use a build compiler that generates 64-bit code, either by default or by specifying ‘CC='gcc -m64' CXX='gcc-m64'’ to configure. *************** library or the MPC library, the canonica *** 1272,1318 **** as the build parameter on the configure line. For example on a Solaris 11 system:

!
! 
% ./configure --build=sparc64-sun-solaris2.11 --prefix=xxx
! !

sparcv9-*-solaris2*

This is a synonym for ‘sparc64-*-solaris2*’.

! !

c6x-*-*

The C6X family of processors. This port requires binutils-2.22 or newer.

! !

tilegx-*-linux*

The TILE-Gx processor in little endian mode, running GNU/Linux. This port requires binutils-2.22 or newer.

! !

tilegxbe-*-linux*

The TILE-Gx processor in big endian mode, running GNU/Linux. This port requires binutils-2.23 or newer.

! !

tilepro-*-linux*

The TILEPro processor running GNU/Linux. This port requires binutils-2.22 or newer.

! !

visium-*-elf

CDS VISIUMcore processor. This configuration is intended for embedded systems.

! !

*-*-vxworks*

Support for VxWorks is in flux. At present GCC supports only the very recent VxWorks 5.5 (aka Tornado 2.2) release, and only on PowerPC. We welcome patches for other architectures supported by VxWorks 5.5. --- 1200,1239 ---- as the build parameter on the configure line. For example on a Solaris 11 system:

!
! 
% ./configure --build=sparc64-sun-solaris2.11 --prefix=xxx
!

sparcv9-*-solaris2*

This is a synonym for ‘sparc64-*-solaris2*’.

!

c6x-*-*

The C6X family of processors. This port requires binutils-2.22 or newer.

!

tilegx-*-linux*

The TILE-Gx processor in little endian mode, running GNU/Linux. This port requires binutils-2.22 or newer.

!

tilegxbe-*-linux*

The TILE-Gx processor in big endian mode, running GNU/Linux. This port requires binutils-2.23 or newer.

!

tilepro-*-linux*

The TILEPro processor running GNU/Linux. This port requires binutils-2.22 or newer.

!

visium-*-elf

CDS VISIUMcore processor. This configuration is intended for embedded systems.

!

*-*-vxworks*

Support for VxWorks is in flux. At present GCC supports only the very recent VxWorks 5.5 (aka Tornado 2.2) release, and only on PowerPC. We welcome patches for other architectures supported by VxWorks 5.5. *************** that file to add the module to your kern *** 1345,1360 **** VxWorks will incorporate this module.)

! !

x86_64-*-*, amd64-*-*

GCC supports the x86-64 architecture implemented by the AMD64 processor (amd64-*-* is an alias for x86_64-*-*) on GNU/Linux, FreeBSD and NetBSD. On GNU/Linux the default is a bi-arch compiler which is able to generate both 64-bit x86-64 and 32-bit x86 code (via the -m32 switch).

! !

x86_64-*-solaris2*

GCC also supports the x86-64 architecture implemented by the AMD64 processor (‘amd64-*-*’ is an alias for ‘x86_64-*-*’) on Solaris 10 or later. Unlike other systems, without special options a --- 1266,1279 ---- VxWorks will incorporate this module.)

!

x86_64-*-*, amd64-*-*

GCC supports the x86-64 architecture implemented by the AMD64 processor (amd64-*-* is an alias for x86_64-*-*) on GNU/Linux, FreeBSD and NetBSD. On GNU/Linux the default is a bi-arch compiler which is able to generate both 64-bit x86-64 and 32-bit x86 code (via the -m32 switch).

!

x86_64-*-solaris2*

GCC also supports the x86-64 architecture implemented by the AMD64 processor (‘amd64-*-*’ is an alias for ‘x86_64-*-*’) on Solaris 10 or later. Unlike other systems, without special options a *************** as 64-bit code, configure with --t *** 1367,1374 **** and ‘CC=gcc -m64’.

! !

xtensa*-*-elf

This target is intended for embedded Xtensa systems using the ‘newlib’ C library. It uses ELF but does not support shared objects. Designed-defined instructions specified via the --- 1286,1292 ---- and ‘CC=gcc -m64’.

!

xtensa*-*-elf

This target is intended for embedded Xtensa systems using the ‘newlib’ C library. It uses ELF but does not support shared objects. Designed-defined instructions specified via the *************** downloaded files include a customized co *** 1383,1390 **** which you can use to replace the default header file.

! !

xtensa*-*-linux*

This target is for Xtensa systems running GNU/Linux. It supports ELF shared objects and the GNU C library (glibc). It also generates position-independent code (PIC) regardless of whether the --- 1301,1307 ---- which you can use to replace the default header file.

!

xtensa*-*-linux*

This target is for Xtensa systems running GNU/Linux. It supports ELF shared objects and the GNU C library (glibc). It also generates position-independent code (PIC) regardless of whether the *************** respects, this target is the same as the *** 1393,1411 **** ‘xtensa*-*-elf’ target.

! !

Microsoft Windows

! !

Intel 16-bit versions

The 16-bit versions of Microsoft Windows, such as Windows 3.1, are not supported.

However, the 32-bit port has limited support for Microsoft Windows 3.11 in the Win32s environment, as a target only. See below.

! !

Intel 32-bit versions

The 32-bit versions of Windows, including Windows 95, Windows NT, Windows XP, and Windows Vista, are supported by several different target platforms. These targets differ in which Windows subsystem they target --- 1310,1325 ---- ‘xtensa*-*-elf’ target.

!

Microsoft Windows

!

Intel 16-bit versions

The 16-bit versions of Microsoft Windows, such as Windows 3.1, are not supported.

However, the 32-bit port has limited support for Microsoft Windows 3.11 in the Win32s environment, as a target only. See below.

!

Intel 32-bit versions

The 32-bit versions of Windows, including Windows 95, Windows NT, Windows XP, and Windows Vista, are supported by several different target platforms. These targets differ in which Windows subsystem they target *************** the Win32 subsystem that provides a subs *** 1420,1438 **** https://www.mkssoftware.com for more information. ! !

Intel 64-bit versions

GCC contains support for x86-64 using the mingw-w64 runtime library, available from https://www.mingw-w64.org/downloads/. This library should be used with the target triple x86_64-pc-mingw32.

! !

Windows CE

Windows CE is supported as a target only on Hitachi SuperH (sh-wince-pe), and MIPS (mips-wince-pe).

! !

Other Windows Platforms

GCC no longer supports Windows NT on the Alpha or PowerPC.

GCC no longer supports the Windows POSIX subsystem. However, it does --- 1334,1349 ---- https://www.mkssoftware.com for more information. !

Intel 64-bit versions

GCC contains support for x86-64 using the mingw-w64 runtime library, available from https://www.mingw-w64.org/downloads/. This library should be used with the target triple x86_64-pc-mingw32.

!

Windows CE

Windows CE is supported as a target only on Hitachi SuperH (sh-wince-pe), and MIPS (mips-wince-pe).

!

Other Windows Platforms

GCC no longer supports Windows NT on the Alpha or PowerPC.

GCC no longer supports the Windows POSIX subsystem. However, it does *************** be inactive. See !

*-*-cygwin

Ports of GCC are included with the Cygwin environment.

--- 1357,1363 ----

UWIN support has been removed due to a lack of maintenance.

!

*-*-cygwin

Ports of GCC are included with the Cygwin environment.

*************** the latest official GNU binutils release *** 1461,1468 **** or version 2.20 or above if building your own.

! !

*-*-mingw32

GCC will build with and support only MinGW runtime 3.12 and later. Earlier versions of headers are incompatible with the new default semantics of extern inline in -std=c99 and -std=gnu99 modes. --- 1371,1377 ---- or version 2.20 or above if building your own.

!

*-*-mingw32

GCC will build with and support only MinGW runtime 3.12 and later. Earlier versions of headers are incompatible with the new default semantics of extern inline in -std=c99 and -std=gnu99 modes. *************** version 2.16 or above containing support *** 1472,1479 **** assembler pseudo-op.

! !

Older systems

GCC contains support files for many older (1980s and early 1990s) Unix variants. For the most part, support for these systems has not been deliberately removed, but it has not been maintained for --- 1381,1387 ---- assembler pseudo-op.

!

Older systems

GCC contains support files for many older (1980s and early 1990s) Unix variants. For the most part, support for these systems has not been deliberately removed, but it has not been maintained for *************** about GCC on such systems (which may no *** 1516,1523 **** current GCC) is to be found in the GCC texinfo manual.

! !

all ELF targets (SVR4, Solaris 2, etc.)

C++ support is significantly better on ELF targets if you use the GNU linker; duplicate copies of inlines, vtables and template instantiations will be discarded --- 1424,1430 ---- current GCC) is to be found in the GCC texinfo manual.

!

all ELF targets (SVR4, Solaris 2, etc.)

C++ support is significantly better on ELF targets if you use the GNU linker; duplicate copies of inlines, vtables and template instantiations will be discarded diff -Nrcpad gcc-12.3.0/INSTALL/test.html gcc-12.4.0/INSTALL/test.html *** gcc-12.3.0/INSTALL/test.html Mon May 8 12:15:26 2023 --- gcc-12.4.0/INSTALL/test.html Thu Jun 20 08:10:31 2024 *************** *** 1,5 **** --- 1,8 ---- + + + - - - Installing GCC: Testing --- 22,27 ---- *************** You have freedom to copy and modify this *** 29,58 **** --- 29,52 ---- + + *************** ul.no-bullet {list-style: none} *** 83,91 **** ! ! !

Before you install GCC, we encourage you to run the testsuites and to compare your results with results from a similar configuration that have --- 77,85 ---- ! ! !

Before you install GCC, we encourage you to run the testsuites and to compare your results with results from a similar configuration that have *************** installed are not in the PATH/usr/local):

!
! 
TCL_LIBRARY = /usr/local/share/tcl8.0
  DEJAGNULIBS = /usr/local/share/dejagnu
--- 107,114 ---- environment variables appropriately, as in the following example (which assumes that DejaGnu has been installed under /usr/local):

!
! 
TCL_LIBRARY = /usr/local/share/tcl8.0
  DEJAGNULIBS = /usr/local/share/dejagnu
*************** portability in the DejaGnu code.) *** 124,131 ****

Finally, you can run the testsuite (which may take a long time): !

! 
cd objdir; make -k check

This will test various components of GCC, such as compiler --- 118,125 ----

Finally, you can run the testsuite (which may take a long time): !

! 
cd objdir; make -k check

This will test various components of GCC, such as compiler *************** might emit some harmless messages resemb *** 137,143 ****

If you are testing a cross-compiler, you may want to run the testsuite on a simulator as described at https://gcc.gnu.org/simtest-howto.html.

!

How can you run the testsuite on selected tests?

In order to run sets of tests selectively, there are targets --- 131,137 ----

If you are testing a cross-compiler, you may want to run the testsuite on a simulator as described at https://gcc.gnu.org/simtest-howto.html.

!

How can you run the testsuite on selected tests?

In order to run sets of tests selectively, there are targets *************** just run ‘make check& *** 152,166 ****

A more selective way to just run all gcc execute tests in the testsuite is to use

!
! 
make check-gcc RUNTESTFLAGS="execute.exp other-options"

Likewise, in order to run only the g++ “old-deja” tests in the testsuite with filenames matching ‘9805*’, you would use

!
! 
make check-g++ RUNTESTFLAGS="old-deja.exp=9805* other-options"

The file-matching expression following filename.exp= is treated --- 146,160 ----

A more selective way to just run all gcc execute tests in the testsuite is to use

!
! 
make check-gcc RUNTESTFLAGS="execute.exp other-options"

Likewise, in order to run only the g++ “old-deja” tests in the testsuite with filenames matching ‘9805*’, you would use

!
! 
make check-g++ RUNTESTFLAGS="old-deja.exp=9805* other-options"

The file-matching expression following filename.exp= is treated *************** as a series of whitespace-delimited glob *** 168,175 **** may be passed, although any whitespace must either be escaped or surrounded by single quotes if multiple expressions are desired. For example,

!
! 
make check-g++ RUNTESTFLAGS="old-deja.exp=9805*\ virtual2.c other-options"
  make check-g++ RUNTESTFLAGS="'old-deja.exp=9805* virtual2.c' other-options"
--- 162,169 ---- may be passed, although any whitespace must either be escaped or surrounded by single quotes if multiple expressions are desired. For example,

!
! 
make check-g++ RUNTESTFLAGS="old-deja.exp=9805*\ virtual2.c other-options"
  make check-g++ RUNTESTFLAGS="'old-deja.exp=9805* virtual2.c' other-options"
*************** To get a list of the possible *.ex *** 180,186 **** output of ‘make check’ into a file and look at the ‘Running … .exp’ lines.

!

Passing options and running multiple testsuites

You can pass multiple options to the testsuite using the --- 174,181 ---- output of ‘make check’ into a file and look at the ‘Running … .exp’ lines.

!
!

Passing options and running multiple testsuites

You can pass multiple options to the testsuite using the *************** output of ‘make check *** 188,195 **** ‘RUNTESTFLAGS’, or directly to runtest if you prefer to work outside the makefiles. For example,

!
! 
make check-g++ RUNTESTFLAGS="--target_board=unix/-O3/-fmerge-constants"

will run the standard g++ testsuites (“unix” is the target name --- 183,190 ---- ‘RUNTESTFLAGS’, or directly to runtest if you prefer to work outside the makefiles. For example,

!
! 
make check-g++ RUNTESTFLAGS="--target_board=unix/-O3/-fmerge-constants"

will run the standard g++ testsuites (“unix” is the target name *************** slashes separate options. *** 200,215 ****

You can run the testsuites multiple times using combinations of options with a syntax similar to the brace expansion of popular shells:

!
! 
…"--target_board=arm-sim\{-mhard-float,-msoft-float\}\{-O1,-O2,-O3,\}"

(Note the empty option caused by the trailing comma in the final group.) The following will run each testsuite eight times using the ‘arm-sim’ target, as if you had specified all possible combinations yourself:

!
! 
--target_board='arm-sim/-mhard-float/-O1 \
                  arm-sim/-mhard-float/-O2 \
                  arm-sim/-mhard-float/-O3 \
                  arm-sim/-mhard-float \
--- 195,210 ----
  
You can run the testsuites multiple times using combinations of options
  with a syntax similar to the brace expansion of popular shells:
  

! 

! 
…"--target_board=arm-sim\{-mhard-float,-msoft-float\}\{-O1,-O2,-O3,\}"
  

  
  
(Note the empty option caused by the trailing comma in the final group.)
  The following will run each testsuite eight times using the ‘arm-sim’
  target, as if you had specified all possible combinations yourself:
  

! 

! 
--target_board='arm-sim/-mhard-float/-O1 \
                  arm-sim/-mhard-float/-O2 \
                  arm-sim/-mhard-float/-O3 \
                  arm-sim/-mhard-float \
*************** target, as if you had specified all poss
*** 222,229 ****
  
They can be combined as many times as you wish, in arbitrary ways.  This
  list:
  

! 

! 
…"--target_board=unix/-Wextra\{-O3,-fno-strength\}\{-fomit-frame,\}"
  

  
  
will generate four combinations, all involving ‘-Wextra’.
--- 217,224 ----
  
They can be combined as many times as you wish, in arbitrary ways.  This
  list:
  

! 

! 
…"--target_board=unix/-Wextra\{-O3,-fno-strength\}\{-fomit-frame,\}"
  

  
  
will generate four combinations, all involving ‘-Wextra’.
*************** parallel by having the shell perform the
*** 235,248 ****
  do the parallel runs.  Instead of using ‘--target_board’, use a
  special makefile target:
  

! 

! 
make -jN check-testsuite//test-target/option1/option2/…
  

  
  
For example,
  

! 

! 
make -j3 check-gcc//sh-hms-sim/{-m1,-m2,-m3,-m3e,-m4}/{,-nofpu}
  

  
  
will run three concurrent “make-gcc” testsuites, eventually testing all
--- 230,243 ----
  do the parallel runs.  Instead of using ‘--target_board’, use a
  special makefile target:
  

! 

! 
make -jN check-testsuite//test-target/option1/option2/…
  

  
  
For example,
  

! 

! 
make -j3 check-gcc//sh-hms-sim/{-m1,-m2,-m3,-m3e,-m4}/{,-nofpu}
  

  
  
will run three concurrent “make-gcc” testsuites, eventually testing all
*************** supported in the gcc subdir
*** 251,257 ****
  typing echo before the example given here.)
  

  
! 
  
How to interpret test results

  
  
The result of running the testsuite are various *.sum and *.log
--- 246,253 ----
  typing echo before the example given here.)
  

  
! 

! 

  
How to interpret test results

  
  
The result of running the testsuite are various *.sum and *.log
*************** over whether or not a test is expected t
*** 276,289 ****
  be fixed in future releases.
  

  
! 
  
Submitting test results

  
  
If you want to report the results to the GCC project, use the
  contrib/test_summary shell script.  Start it in the objdir with
  

! 

! 
srcdir/contrib/test_summary -p your_commentary.txt \
      -m gcc-testresults@gcc.gnu.org |sh
  

  
--- 272,286 ----
  be fixed in future releases.
  

  
! 

! 

  
Submitting test results

  
  
If you want to report the results to the GCC project, use the
  contrib/test_summary shell script.  Start it in the objdir with
  

! 

! 
srcdir/contrib/test_summary -p your_commentary.txt \
      -m gcc-testresults@gcc.gnu.org |sh
  

  
*************** messages may be automatically processed.
*** 303,309 ****
  
  
  
! 

  
  
  
--- 300,306 ----
  
  
  
! 

  
  
  
diff -Nrcpad gcc-12.3.0/LAST_UPDATED gcc-12.4.0/LAST_UPDATED
*** gcc-12.3.0/LAST_UPDATED	Mon May  8 12:15:25 2023
--- gcc-12.4.0/LAST_UPDATED	Thu Jun 20 08:10:29 2024
***************
*** 1 ****
! Obtained from git: releases/gcc-12.3.0 revision 8fc1a49c9312b05d925b7d21f1d2145d70818151
--- 1 ----
! Obtained from git: releases/gcc-12.4.0 revision 2bada4bc59bed4be34fab463bdb3c3ebfd2b41bb
diff -Nrcpad gcc-12.3.0/MD5SUMS gcc-12.4.0/MD5SUMS
*** gcc-12.3.0/MD5SUMS	Mon May  8 12:34:02 2023
--- gcc-12.4.0/MD5SUMS	Thu Jun 20 08:36:33 2024
***************
*** 1,5 ****
! # This file contains the MD5 checksums of the files in the 
! # gcc-12.3.0.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
--- 1,5 ----
! # This file contains the MD5 checksums of the files in the
! # gcc-12.4.0.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
*************** c234515d9056662b94af0653f8562888  .dir-l
*** 17,45 ****
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! 8b33c05829cb61ac07bd30368d9bdfb6  ChangeLog
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! b0c49ff8001cc228ea2b2c71e6eb5f7b  INSTALL/binaries.html
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  ccd3498e6b247dfe4e65793a88a27296  c++tools/configure
--- 17,45 ----
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! 82bfc219a55eda78a21962561cdf5317  NEWS
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  ccd3498e6b247dfe4e65793a88a27296  c++tools/configure
*************** da3f3927414dbcf7878d2d582a2a8992  c++too
*** 52,58 ****
  c64564b7c7563dae5ebe016f340c9cd9  config.guess
  040359150cf11493f973a46d8a25b06b  config.rpath
  111d54aa3a3019adbab413c8fb435f22  config.sub
! e9a6125f102985b3a2904b74649378b0  config/ChangeLog
  0d9cf183f9cbbe5f59796e35831fe774  config/acinclude.m4
  0b0c1d39d39d11f4b42359daf3516e62  config/acx.m4
  6b030f5cf640bdd401ea739f54a667f8  config/asmcfi.m4
--- 52,58 ----
  c64564b7c7563dae5ebe016f340c9cd9  config.guess
  040359150cf11493f973a46d8a25b06b  config.rpath
  111d54aa3a3019adbab413c8fb435f22  config.sub
! ff6c8595723bc81951689f490c073af3  config/ChangeLog
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  0b0c1d39d39d11f4b42359daf3516e62  config/acx.m4
  6b030f5cf640bdd401ea739f54a667f8  config/asmcfi.m4
*************** e2dc6b4fd62b77bff96b7951ef74f78f  config
*** 153,161 ****
  5cabffc02a90bd9698105b9eef507f11  config/warnings.m4
  7ef51b0adb98e5c5f7aba46d2c7293f1  config/weakref.m4
  0163b672c888aaf1c8ad3e867a0ec9f1  config/zlib.m4
! 856983826b8a23e737488c8702dc8df9  configure
! fe4f5e87d4d87c4612040acc70334eb4  configure.ac
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--- 153,161 ----
  5cabffc02a90bd9698105b9eef507f11  config/warnings.m4
  7ef51b0adb98e5c5f7aba46d2c7293f1  config/weakref.m4
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! 313212028768892323f028d5b3d80313  configure
! 8bac0687372f4ec1d9d8cddd4c3edfb3  configure.ac
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*************** e9bac7c82bdb5f92b354d9da854d463b  contri
*** 209,215 ****
  e462c83bdf45bf6e9b434d18fa9f66e4  contrib/git-fix-changelog.py
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  59304fc08afa489baa6b920cc76dc625  contrib/gthr_supp_vxw_5x.c
! b01a97714134c85a476602bf9665b71f  contrib/header-tools/ChangeLog
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  ba0485a3c721bce9e32407ef996d2a9d  contrib/header-tools/gcc-order-headers
--- 209,215 ----
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*************** a34668cfad9dec733354503fbc67fb24  contri
*** 234,240 ****
  87a19b40fbd220938cf6c23c42c255e2  contrib/prepare_patch.sh
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--- 234,240 ----
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*************** f251d49dd87647250fcd74dd50b7835f  contri
*** 293,299 ****
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--- 293,299 ----
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*************** a0d12be401961a2557883b7c09dc71eb  contri
*** 334,340 ****
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! 80e49f1efa4308862b93520d911ec796  gcc/ada/sem_res.adb
  8aafa0bbe0659305fca1075cf9a63c76  gcc/ada/sem_res.ads
  30540a00a0ce832eed79b6ff5b0cc1c5  gcc/ada/sem_scil.adb
  59032b02529742b631ce33ade9468c5a  gcc/ada/sem_scil.ads
*************** a90368159c1f4354778fdfba479b896d  gcc/ad
*** 3005,3011 ****
  2cc2cdd05c8be53c1cb016bba012fd9b  gcc/align.h
  b2ce75825ccf75e072ab6c8975c38232  gcc/alloc-pool.cc
  b7c04162e76f23d56fa00205e789f7dc  gcc/alloc-pool.h
! f95a5943c6c92f450c8e55b94d3a5964  gcc/analyzer/ChangeLog
  3acec58f414ce82e99f2983591f45b43  gcc/analyzer/analysis-plan.cc
  8ce96491e4c46bedd4a35adc52251a3a  gcc/analyzer/analysis-plan.h
  3cadfbc2a96c42c26013f8530330f752  gcc/analyzer/analyzer-logging.cc
--- 3006,3012 ----
  2cc2cdd05c8be53c1cb016bba012fd9b  gcc/align.h
  b2ce75825ccf75e072ab6c8975c38232  gcc/alloc-pool.cc
  b7c04162e76f23d56fa00205e789f7dc  gcc/alloc-pool.h
! d82d62ab562dd12cefa672bc2bdf85e4  gcc/analyzer/ChangeLog
  3acec58f414ce82e99f2983591f45b43  gcc/analyzer/analysis-plan.cc
  8ce96491e4c46bedd4a35adc52251a3a  gcc/analyzer/analysis-plan.h
  3cadfbc2a96c42c26013f8530330f752  gcc/analyzer/analyzer-logging.cc
*************** d1ece647573091c4b6a0434986d022b9  gcc/an
*** 3073,3122 ****
  d88189bdcecfa56e5ffaab39a03396f5  gcc/analyzer/trimmed-graph.cc
  4bafa74d2a8c0d933f1620cbe9887fc2  gcc/analyzer/trimmed-graph.h
  0b95095c8e8df661977864b73fa53bcc  gcc/array-traits.h
! b2201566fe8736e33f20ceb357d7dd31  gcc/asan.cc
  9d182c46a0fa9d235966ac5a88ef883f  gcc/asan.h
  2787dfa04681d7b87cf7a65b5fd3f2e8  gcc/attr-fnspec.h
! 94bff5727492a16c140450adc5bec8f2  gcc/attribs.cc
  f35983fbc75e85ec6bb625c1e3d93060  gcc/attribs.h
  f2a5b546c85c4efb7d2f0103653a5728  gcc/auto-inc-dec.cc
  98a3904d4727900960256e4afbf77de7  gcc/auto-profile.cc
  96b0d496f959bdb607cc3d80d8f0e62e  gcc/auto-profile.h
  e8ddb5768af138adb4c7dc9ceeef18fc  gcc/backend.h
  789f9c53260b2e6310c6d9cce6573842  gcc/basic-block.h
! 760ffe7808513ba154746d41f72a9cd0  gcc/bb-reorder.cc
  6617828b52b378fcd102261c0a5e92b5  gcc/bb-reorder.h
! 86e6d04ba8d6db17822d7e77f111b625  gcc/bitmap.cc
  463d4f90c70a2ee34e18e4e1cdac3017  gcc/bitmap.h
  effc7bf1ccdcbbcde7f3785aa54561c2  gcc/btfout.cc
  054e5fb089c16e62b46b994b919a245d  gcc/builtin-attrs.def
  9397c619ec5582634dc3e244ff03f6c9  gcc/builtin-types.def
! 709a8f13eddee30cf0e409e2a48b6cb8  gcc/builtins.cc
  a72c74534e856f4d387a76fa2204ea5b  gcc/builtins.def
  48b30dc7e25f5905415a1dac460e9750  gcc/builtins.h
! 06dfdb053b4b831351d84c75f42a2258  gcc/c-family/ChangeLog
  ea3fa1f4d7390a105fa3caab4f79aaf7  gcc/c-family/ChangeLog.gimple-classes
  a7afd263f1b3f5cb5c733ee443f9dfe1  gcc/c-family/c-ada-spec.cc
  77ea826f6e5f43400d6095c1026cb640  gcc/c-family/c-ada-spec.h
! 1ac3eb502ce4873ac4d8cea0f46f5931  gcc/c-family/c-attribs.cc
! a935e0179c32e14ea65371d3cea022f5  gcc/c-family/c-common.cc
  8a7421b92ec542eccb81b8a4069ba2ad  gcc/c-family/c-common.def
  bd4a6637b69d074cb9b9ce8f5ffbd9a1  gcc/c-family/c-common.h
! 8991a62ab96fa1fad9d89d551283bdd5  gcc/c-family/c-cppbuiltin.cc
  ace6960d00063212ee9ff914f19af263  gcc/c-family/c-dump.cc
  80d00f99e45ecd540ec701c130df1919  gcc/c-family/c-format.cc
  074df03d16455b2d5d97400267b29292  gcc/c-family/c-format.h
  e4fa35a4a437e8cc853743c2416405d5  gcc/c-family/c-gimplify.cc
  78c1df4a556b61f6fbcf775b1b06ef03  gcc/c-family/c-indentation.cc
  366be7ff35d4473fe925e98f64d0fa83  gcc/c-family/c-indentation.h
! 6443c345952222040741cbd8a1d6e1b9  gcc/c-family/c-lex.cc
  f53bf811224874c8cf6803a9d4766c7c  gcc/c-family/c-objc.h
  af9a0fa4e63145b3c994f3cfd9d608a1  gcc/c-family/c-omp.cc
  ba4e6aa580bcb97695f1e88ac963111e  gcc/c-family/c-opts.cc
! 00ed0919fbaac7675375ccdfaab6a8bf  gcc/c-family/c-pch.cc
  12e90bdd8eac8ef2f8fb0bd3d4520db0  gcc/c-family/c-ppoutput.cc
  2c66f0f1cfcfe4ee885f16bd33a6d2db  gcc/c-family/c-pragma.cc
  84bfd9edb36a8013d6108c26781c39dc  gcc/c-family/c-pragma.h
! 7711d04d7e1ba677219ecac31ee22781  gcc/c-family/c-pretty-print.cc
  0c6371d3a654141a9cd26a12aaad0911  gcc/c-family/c-pretty-print.h
  d88141dbe6ee4cdf0241ecea034a6ebd  gcc/c-family/c-semantics.cc
  eb037f948fa34a189765877123cb18b4  gcc/c-family/c-spellcheck.cc
--- 3074,3123 ----
  d88189bdcecfa56e5ffaab39a03396f5  gcc/analyzer/trimmed-graph.cc
  4bafa74d2a8c0d933f1620cbe9887fc2  gcc/analyzer/trimmed-graph.h
  0b95095c8e8df661977864b73fa53bcc  gcc/array-traits.h
! c4e83b9f0c73f00f8809c61dcc9ecc3b  gcc/asan.cc
  9d182c46a0fa9d235966ac5a88ef883f  gcc/asan.h
  2787dfa04681d7b87cf7a65b5fd3f2e8  gcc/attr-fnspec.h
! 7d35e1c3a62d4663c96e9110e4ef797b  gcc/attribs.cc
  f35983fbc75e85ec6bb625c1e3d93060  gcc/attribs.h
  f2a5b546c85c4efb7d2f0103653a5728  gcc/auto-inc-dec.cc
  98a3904d4727900960256e4afbf77de7  gcc/auto-profile.cc
  96b0d496f959bdb607cc3d80d8f0e62e  gcc/auto-profile.h
  e8ddb5768af138adb4c7dc9ceeef18fc  gcc/backend.h
  789f9c53260b2e6310c6d9cce6573842  gcc/basic-block.h
! 9ab1b5e3cbb034a5bf30d67469c7e1db  gcc/bb-reorder.cc
  6617828b52b378fcd102261c0a5e92b5  gcc/bb-reorder.h
! 02d5f1c29d6ce6c6e72ecde42d1ee13d  gcc/bitmap.cc
  463d4f90c70a2ee34e18e4e1cdac3017  gcc/bitmap.h
  effc7bf1ccdcbbcde7f3785aa54561c2  gcc/btfout.cc
  054e5fb089c16e62b46b994b919a245d  gcc/builtin-attrs.def
  9397c619ec5582634dc3e244ff03f6c9  gcc/builtin-types.def
! cb0ebb96c500ae3babe07c47b90dc82a  gcc/builtins.cc
  a72c74534e856f4d387a76fa2204ea5b  gcc/builtins.def
  48b30dc7e25f5905415a1dac460e9750  gcc/builtins.h
! 352544f35e8e1ef116ef08051f376415  gcc/c-family/ChangeLog
  ea3fa1f4d7390a105fa3caab4f79aaf7  gcc/c-family/ChangeLog.gimple-classes
  a7afd263f1b3f5cb5c733ee443f9dfe1  gcc/c-family/c-ada-spec.cc
  77ea826f6e5f43400d6095c1026cb640  gcc/c-family/c-ada-spec.h
! f7c3a2eff4387977c7c4e40122d5fe31  gcc/c-family/c-attribs.cc
! 67aa846540cd3d9fe2c7636d03eb4716  gcc/c-family/c-common.cc
  8a7421b92ec542eccb81b8a4069ba2ad  gcc/c-family/c-common.def
  bd4a6637b69d074cb9b9ce8f5ffbd9a1  gcc/c-family/c-common.h
! 1d3feccdb648bc027a269369f47b3c83  gcc/c-family/c-cppbuiltin.cc
  ace6960d00063212ee9ff914f19af263  gcc/c-family/c-dump.cc
  80d00f99e45ecd540ec701c130df1919  gcc/c-family/c-format.cc
  074df03d16455b2d5d97400267b29292  gcc/c-family/c-format.h
  e4fa35a4a437e8cc853743c2416405d5  gcc/c-family/c-gimplify.cc
  78c1df4a556b61f6fbcf775b1b06ef03  gcc/c-family/c-indentation.cc
  366be7ff35d4473fe925e98f64d0fa83  gcc/c-family/c-indentation.h
! 2c396d1e72b524df0d9d0d7247daf43c  gcc/c-family/c-lex.cc
  f53bf811224874c8cf6803a9d4766c7c  gcc/c-family/c-objc.h
  af9a0fa4e63145b3c994f3cfd9d608a1  gcc/c-family/c-omp.cc
  ba4e6aa580bcb97695f1e88ac963111e  gcc/c-family/c-opts.cc
! 067be2e53f5781ca0079ea5b106a24f3  gcc/c-family/c-pch.cc
  12e90bdd8eac8ef2f8fb0bd3d4520db0  gcc/c-family/c-ppoutput.cc
  2c66f0f1cfcfe4ee885f16bd33a6d2db  gcc/c-family/c-pragma.cc
  84bfd9edb36a8013d6108c26781c39dc  gcc/c-family/c-pragma.h
! 2467a3554dc90b8962b5af38d440666f  gcc/c-family/c-pretty-print.cc
  0c6371d3a654141a9cd26a12aaad0911  gcc/c-family/c-pretty-print.h
  d88141dbe6ee4cdf0241ecea034a6ebd  gcc/c-family/c-semantics.cc
  eb037f948fa34a189765877123cb18b4  gcc/c-family/c-spellcheck.cc
*************** eb037f948fa34a189765877123cb18b4  gcc/c-
*** 3126,3143 ****
  d377f983a2b7608542fc0d1034ab9e5a  gcc/c-family/c-target.h
  014a9d801945dfd171d22b65b225162c  gcc/c-family/c-ubsan.cc
  644fa2dfeaf0cfe53b8bca3d6ad5bb1c  gcc/c-family/c-ubsan.h
! f6e63f74a71e82c7a924fea861d4f086  gcc/c-family/c-warn.cc
  9ba31ec21d4ddd5e65ec4f2a9510fb5f  gcc/c-family/c.opt
  dcb2cef5a26e1633b9899946a2ea78cb  gcc/c-family/cppspec.cc
  20446c529e92951bf598907c958af026  gcc/c-family/known-headers.cc
  a68d869def2a6738d328ed7689f87190  gcc/c-family/known-headers.h
  55d4227fdfb9e5cd81ffac2fadcf85c9  gcc/c-family/name-hint.h
  d5e5e6221af65ab5bf8c100105a7e635  gcc/c-family/stub-objc.cc
! 4371a497d0b842d3f103513f3f557331  gcc/c/ChangeLog
  c34f18ab50963bd48783733e4cc912d5  gcc/c/Make-lang.in
  bca8b48089af255e3dc7cdc6705005fa  gcc/c/c-aux-info.cc
  a670199451d3424bfef5a97af7e81f86  gcc/c/c-convert.cc
! c120f0f2d55e5218dfa5c85f6c424349  gcc/c/c-decl.cc
  76e38393aeab52ee4fd15f1b7bcfe5c0  gcc/c/c-errors.cc
  e2d3c0a7888d2d1089c7b84ca5cf8adb  gcc/c/c-fold.cc
  36585bbdc134fac93bf37ce4a266a742  gcc/c/c-lang.cc
--- 3127,3144 ----
  d377f983a2b7608542fc0d1034ab9e5a  gcc/c-family/c-target.h
  014a9d801945dfd171d22b65b225162c  gcc/c-family/c-ubsan.cc
  644fa2dfeaf0cfe53b8bca3d6ad5bb1c  gcc/c-family/c-ubsan.h
! a8af3dce61b3e9a821c7119465d43e09  gcc/c-family/c-warn.cc
  9ba31ec21d4ddd5e65ec4f2a9510fb5f  gcc/c-family/c.opt
  dcb2cef5a26e1633b9899946a2ea78cb  gcc/c-family/cppspec.cc
  20446c529e92951bf598907c958af026  gcc/c-family/known-headers.cc
  a68d869def2a6738d328ed7689f87190  gcc/c-family/known-headers.h
  55d4227fdfb9e5cd81ffac2fadcf85c9  gcc/c-family/name-hint.h
  d5e5e6221af65ab5bf8c100105a7e635  gcc/c-family/stub-objc.cc
! f3a00163305dd2c4f3c75f8a0b4d4e5b  gcc/c/ChangeLog
  c34f18ab50963bd48783733e4cc912d5  gcc/c/Make-lang.in
  bca8b48089af255e3dc7cdc6705005fa  gcc/c/c-aux-info.cc
  a670199451d3424bfef5a97af7e81f86  gcc/c/c-convert.cc
! 15c199f781f722360206a458111f697d  gcc/c/c-decl.cc
  76e38393aeab52ee4fd15f1b7bcfe5c0  gcc/c/c-errors.cc
  e2d3c0a7888d2d1089c7b84ca5cf8adb  gcc/c/c-fold.cc
  36585bbdc134fac93bf37ce4a266a742  gcc/c/c-lang.cc
*************** d28ee28e1915a34068f3acb03f4a49bb  gcc/cf
*** 3166,3172 ****
  b12c021dcabda408f8a77b1262578938  gcc/cfgbuild.h
  a4a247f647880ceaa0b9d18d5312a4b7  gcc/cfgcleanup.cc
  26d6ce4714a68321ba5ee3ca8d8d5042  gcc/cfgcleanup.h
! 64996b46dbdf1a3189ee696a6c167dce  gcc/cfgexpand.cc
  2081ed1f982aff326fd96314f500b487  gcc/cfgexpand.h
  9425b52a9b66d59c96ac2ccb5f5fb020  gcc/cfghooks.cc
  c07ae507570a86e164131d0adbb19c7a  gcc/cfghooks.h
--- 3167,3173 ----
  b12c021dcabda408f8a77b1262578938  gcc/cfgbuild.h
  a4a247f647880ceaa0b9d18d5312a4b7  gcc/cfgcleanup.cc
  26d6ce4714a68321ba5ee3ca8d8d5042  gcc/cfgcleanup.h
! 7d8e9abcbf726ac326e731f09fd14e4a  gcc/cfgexpand.cc
  2081ed1f982aff326fd96314f500b487  gcc/cfgexpand.h
  9425b52a9b66d59c96ac2ccb5f5fb020  gcc/cfghooks.cc
  c07ae507570a86e164131d0adbb19c7a  gcc/cfghooks.h
*************** c07ae507570a86e164131d0adbb19c7a  gcc/cf
*** 3175,3187 ****
  5b7a334e2dcaeb9a33896540bd01f7bb  gcc/cfgloopanal.cc
  50b7fc6231c733144dc1c33d48b8b739  gcc/cfgloopmanip.cc
  4455a96e3179beb08bf7d4c4275ea90a  gcc/cfgloopmanip.h
! fb3b9724fb78e61df55fbe34b04db160  gcc/cfgrtl.cc
! f7f172c645d893709e8151eeaad80a16  gcc/cfgrtl.h
! f75b117e72cae9acf9d68fd5ca110a4d  gcc/cgraph.cc
! 23cfeab3816df5e46f5c13733a2fd35b  gcc/cgraph.h
  5757ec66e81724328cf4c78ce0354445  gcc/cgraphbuild.cc
  af0efaf9e2173f391a376b4f8f61037f  gcc/cgraphclones.cc
! 524197c503f7ce0df60038720cbe9e06  gcc/cgraphunit.cc
  c4a638b8438c85490d58aa4c8a364b19  gcc/cif-code.def
  51b9093b582e7ab838747e098a7aeedd  gcc/collect-utils.cc
  553d6ef88e3bbc59f1562d2aa4b14ada  gcc/collect-utils.h
--- 3176,3188 ----
  5b7a334e2dcaeb9a33896540bd01f7bb  gcc/cfgloopanal.cc
  50b7fc6231c733144dc1c33d48b8b739  gcc/cfgloopmanip.cc
  4455a96e3179beb08bf7d4c4275ea90a  gcc/cfgloopmanip.h
! 06df51e753cd5e404ce6c631e9f53a74  gcc/cfgrtl.cc
! 3040600eba8d49493411fbff497fd94b  gcc/cfgrtl.h
! a9e07719fdcc54085a77ed0d2cfa2ba1  gcc/cgraph.cc
! 36f2d894754990a4d109b7c95700ab75  gcc/cgraph.h
  5757ec66e81724328cf4c78ce0354445  gcc/cgraphbuild.cc
  af0efaf9e2173f391a376b4f8f61037f  gcc/cgraphclones.cc
! 9c6124b49afaf89d9a379249260d75f5  gcc/cgraphunit.cc
  c4a638b8438c85490d58aa4c8a364b19  gcc/cif-code.def
  51b9093b582e7ab838747e098a7aeedd  gcc/collect-utils.cc
  553d6ef88e3bbc59f1562d2aa4b14ada  gcc/collect-utils.h
*************** edbea9c45bd94aaebcdc56d9cf836f77  gcc/co
*** 3191,3197 ****
  2ec72d0e57c1f7b840013ba711e852c7  gcc/collect2.h
  a11d1e0986f7e4980609556464f7402b  gcc/color-macros.h
  8944f9bf83d393ae5343dc8323fbe27c  gcc/combine-stack-adj.cc
! 3f3fdbe6897fed5eacdbf6771f715875  gcc/combine.cc
  95a28c5bec13efb49456ad7b0b35c5e8  gcc/common.md
  e204bf4b5990ec9536bc7ebd5fbed741  gcc/common.opt
  1dfb24e07014e2857e3871b986f7cda8  gcc/common/common-target-def.h
--- 3192,3198 ----
  2ec72d0e57c1f7b840013ba711e852c7  gcc/collect2.h
  a11d1e0986f7e4980609556464f7402b  gcc/color-macros.h
  8944f9bf83d393ae5343dc8323fbe27c  gcc/combine-stack-adj.cc
! 4128cbee668e7335703ba833dccbd4c4  gcc/combine.cc
  95a28c5bec13efb49456ad7b0b35c5e8  gcc/common.md
  e204bf4b5990ec9536bc7ebd5fbed741  gcc/common.opt
  1dfb24e07014e2857e3871b986f7cda8  gcc/common/common-target-def.h
*************** cd40090c6b0ff392d059a73dafb6c8e7  gcc/co
*** 3216,3222 ****
  20e390668a44860c3145733d9c796800  gcc/common/config/frv/frv-common.cc
  be9b9d41f6660137eeec7dfdf8a7f359  gcc/common/config/gcn/gcn-common.cc
  165032b6a1a6571ace982867c4ff2039  gcc/common/config/h8300/h8300-common.cc
! 53d2f0046d1231777b92ad3c4d63c19b  gcc/common/config/i386/cpuinfo.h
  3737d93d5e1cf0e50e1596dbfcfc3452  gcc/common/config/i386/i386-common.cc
  09f083db704de0dbd05d89d9a77468d5  gcc/common/config/i386/i386-cpuinfo.h
  3f143be99f8781c66861c65ae2a601a3  gcc/common/config/i386/i386-isas.h
--- 3217,3223 ----
  20e390668a44860c3145733d9c796800  gcc/common/config/frv/frv-common.cc
  be9b9d41f6660137eeec7dfdf8a7f359  gcc/common/config/gcn/gcn-common.cc
  165032b6a1a6571ace982867c4ff2039  gcc/common/config/h8300/h8300-common.cc
! 15b82148b3920dba211649a5ab23b40e  gcc/common/config/i386/cpuinfo.h
  3737d93d5e1cf0e50e1596dbfcfc3452  gcc/common/config/i386/i386-common.cc
  09f083db704de0dbd05d89d9a77468d5  gcc/common/config/i386/i386-cpuinfo.h
  3f143be99f8781c66861c65ae2a601a3  gcc/common/config/i386/i386-isas.h
*************** e0c84d669ee99cd7622e8c33152058ed  gcc/co
*** 3257,3270 ****
  6a09dc5d69c18159e48b650b80038ce6  gcc/config.build
  43bf829407a766488ab296a7c420d149  gcc/config.gcc
  f9e9c6799c33fd97ecef8d0371a5960e  gcc/config.host
! 05aae2b3f68c309d65e695856db883b9  gcc/config.in
  8e697813dc96ca90f5d0f4c196efe2cc  gcc/config/README
  f1de29e1b542d2f98786a8a5bed74596  gcc/config/aarch64/aarch64-arches.def
  fe42934bb2be20fce3a65bddc5f20adf  gcc/config/aarch64/aarch64-bti-insert.cc
! 4bf71100f6ef7e427a5bee7200179edd  gcc/config/aarch64/aarch64-builtins.cc
  3a596e16575b27f2763dd0c1aa74b9a6  gcc/config/aarch64/aarch64-c.cc
  228a5b455d8db6951f07072ca3e905a0  gcc/config/aarch64/aarch64-cc-fusion.cc
! ef2807d6f9beab4f4e9e55743531f261  gcc/config/aarch64/aarch64-cores.def
  1bef2bc91d6c2282d3b5a48cdccc9a9b  gcc/config/aarch64/aarch64-cost-tables.h
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  a7af803a36f47f80fa9cab4d71a67940  gcc/config/aarch64/aarch64-d.h
--- 3258,3271 ----
  6a09dc5d69c18159e48b650b80038ce6  gcc/config.build
  43bf829407a766488ab296a7c420d149  gcc/config.gcc
  f9e9c6799c33fd97ecef8d0371a5960e  gcc/config.host
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  3a596e16575b27f2763dd0c1aa74b9a6  gcc/config/aarch64/aarch64-c.cc
  228a5b455d8db6951f07072ca3e905a0  gcc/config/aarch64/aarch64-cc-fusion.cc
! 7a31061721060f1b5fece4c161bd8841  gcc/config/aarch64/aarch64-cores.def
  1bef2bc91d6c2282d3b5a48cdccc9a9b  gcc/config/aarch64/aarch64-cost-tables.h
  bfcad118f4e1d0faf33cd0f4724802c5  gcc/config/aarch64/aarch64-d.cc
  a7af803a36f47f80fa9cab4d71a67940  gcc/config/aarch64/aarch64-d.h
*************** bbf7795c7deae4a1b994b366a3ee10c7  gcc/co
*** 3280,3286 ****
  81f259af6086b92d472c64bb1a57e9ef  gcc/config/aarch64/aarch64-option-extensions.def
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  bc2702391f7a1d6ceedc1a05d62a8dca  gcc/config/aarch64/aarch64-passes.def
! 5b5a7d72e3260c8d8cf8e195e1bc15c1  gcc/config/aarch64/aarch64-protos.h
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  605913e6bba64efb989549a141209408  gcc/config/aarch64/aarch64-simd-builtins.def
  eb4ee2e7be03c43ecbad8d44393fc9d6  gcc/config/aarch64/aarch64-simd.md
--- 3281,3287 ----
  81f259af6086b92d472c64bb1a57e9ef  gcc/config/aarch64/aarch64-option-extensions.def
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! 8523383da1b7fb30b8d84cc9d5015cce  gcc/config/aarch64/aarch64-protos.h
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*************** d53d0fbc6526d523bedefd90ee66c697  gcc/co
*** 3299,3312 ****
  85b90f18099c71fc34e444232db3299e  gcc/config/aarch64/aarch64-sve-builtins.h
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! acca9c995b2f47a7b66c962ec8b26631  gcc/config/aarch64/aarch64.cc
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  3d8b1c6373873351739af54d209f8abe  gcc/config/aarch64/aarch64.opt
! 273bc0578a1b2e9d9df47bfb5160118c  gcc/config/aarch64/arm_acle.h
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  b041e1c91c2a57f1b07188bd82b07c88  gcc/config/aarch64/arm_fp16.h
  14cc63c6b8c265d0279b0dd2a525ad94  gcc/config/aarch64/arm_neon.h
--- 3300,3313 ----
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! 1883f5e6689b3fafcc7c6ef49a64eb11  gcc/config/aarch64/aarch64.md
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  14cc63c6b8c265d0279b0dd2a525ad94  gcc/config/aarch64/arm_neon.h
*************** ebdfd65d4a873052d228398d5331af7e  gcc/co
*** 3324,3330 ****
  9aa9cbf52d3975e3e11ff0152e1430ee  gcc/config/aarch64/geniterators.sh
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  86eaf33edeb885c2c9ae2a9825879e59  gcc/config/aarch64/host-aarch64-darwin.cc
! 48dc1df1c26e295abbbe5114614e4e46  gcc/config/aarch64/iterators.md
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--- 3325,3331 ----
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! 6d13669c566cdcd5d5ff0f23def122d8  gcc/config/aarch64/iterators.md
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*************** a07ee362a4961e9d41cb0ab83553de74  gcc/co
*** 3342,3352 ****
  9857ce0f95eda3ad2548d3c99d7db2b0  gcc/config/alpha/alpha-modes.def
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--- 3343,3353 ----
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! e9c377b9e5c7dee01b1c710b5b118fc0  gcc/config/alpha/alpha.cc
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  10364c8bfc3e1be17c4006b0afcdf86a  gcc/config/alpha/elf.opt
*************** afc3b989a3b35a84eedcdbaffcbf7597  gcc/co
*** 3406,3412 ****
  86ad934fe071d60aa0944c4e5629ee45  gcc/config/arm/aarch-common.cc
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! 6126555e47e65862b1299f227e550eff  gcc/config/arm/arm-builtins.cc
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  492769dadd3b1200d72feb224819263f  gcc/config/arm/arm-cpus.in
--- 3407,3413 ----
  86ad934fe071d60aa0944c4e5629ee45  gcc/config/arm/aarch-common.cc
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! ca6ebc7e891c4459b5e39d502e738460  gcc/config/arm/arm-builtins.cc
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  492769dadd3b1200d72feb224819263f  gcc/config/arm/arm-cpus.in
*************** c2d0c814a2ee25dbbb1edfceeb6f5683  gcc/co
*** 3425,3433 ****
  e6d8d15841677273be28f2c17f0334d0  gcc/config/arm/arm-simd-builtin-types.def
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--- 3426,3434 ----
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! f690165fb40e5eb0944c4a7c6d5b8958  gcc/config/arm/arm.cc
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! baa138251371e569c79b7ed7b5315efc  gcc/config/arm/arm.md
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  52e6ca4bd01cf86b7cb20e854aec637a  gcc/config/arm/arm1026ejs.md
*************** f82fe1ddbe3db8a800ef98ecafa6bd46  gcc/co
*** 3440,3446 ****
  fc5cc271a5697d0016cd6c64a67c71db  gcc/config/arm/arm_cde_builtins.def
  2d8f46acb748e5350c359a70c09571a8  gcc/config/arm/arm_cmse.h
  c4cb23cd7b0bb7e50703761c71c47806  gcc/config/arm/arm_fp16.h
! 190b68b5fcda4c346a4ca41f853b38ea  gcc/config/arm/arm_mve.h
  4d52cc595e40683c2116c1c9505f3c21  gcc/config/arm/arm_mve_builtins.def
  675c2bc4d01144ddb0d3ca1324746a54  gcc/config/arm/arm_mve_types.h
  46cdfe229792555c51a5405c7d7daaf3  gcc/config/arm/arm_neon.h
--- 3441,3447 ----
  fc5cc271a5697d0016cd6c64a67c71db  gcc/config/arm/arm_cde_builtins.def
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! c0efc85f8545791b68603e4c54d8c26f  gcc/config/arm/arm_mve.h
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  46cdfe229792555c51a5405c7d7daaf3  gcc/config/arm/arm_neon.h
*************** c4cb23cd7b0bb7e50703761c71c47806  gcc/co
*** 3448,3454 ****
  b713bc09f037a0f4cd254202dd76a14b  gcc/config/arm/arm_vfp_builtins.def
  9e78fb9227c3d2b30c14089309f6d8af  gcc/config/arm/bpabi.h
  82ebffe80579478445adfec7e1cfab29  gcc/config/arm/common.md
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  6dc9c5189db0cf6db32e63018f40b702  gcc/config/arm/cortex-a17-neon.md
--- 3449,3455 ----
  b713bc09f037a0f4cd254202dd76a14b  gcc/config/arm/arm_vfp_builtins.def
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*************** b50c07130eb3ca41d10c14b178702537  gcc/co
*** 3489,3500 ****
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  778cf6a75ff4abe8d012c19053effcd5  gcc/config/arm/parsecpu.awk
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  83f6bb89bd00ca7c4381bd036c0ca6ba  gcc/config/arm/symbian.h
--- 3490,3501 ----
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*************** df9b3fed001223cd70a167527c8bf05c  gcc/co
*** 3521,3556 ****
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! bdd0de08d8ef9281ea68799bf0dc4666  gcc/config/avr/predicates.md
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  0c00177746f6857c43084485cb9756eb  gcc/config/avr/stdfix.h
  0d13497f8f07c60ebbb52a5beaecfede  gcc/config/avr/t-avr
--- 3522,3557 ----
  80a116f15f21f7abef8ef372d4eeb59d  gcc/config/arm/unknown-elf.h
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  41031118cca2e75ff725bb3ffd2f5751  gcc/config/arm/vec-common.md
! 86a3916c0adadda256ac1ab2dba91eee  gcc/config/arm/vfp.md
  95def474af7af4de37dc84d6fc296632  gcc/config/arm/vfp11.md
  df81f23fd0210a50276836db87675296  gcc/config/arm/vxworks.h
  267f32e117cb09202d6198b83964ee77  gcc/config/arm/vxworks.opt
  8bb1a840fb87b138c620682ccad6aee4  gcc/config/arm/x-arm
  2d1f84525fa04ec8662e53f9e39d1134  gcc/config/arm/xgene1.md
! d483c5d70f26ba46db3fd243f30229fc  gcc/config/avr/avr-arch.h
  2f32979b314fdfa213d04509e193eea9  gcc/config/avr/avr-c.cc
! 952ae95453da752980ef4fbee9df9c44  gcc/config/avr/avr-devices.cc
! d64e43aad4ad9bbf3d299acd55495ac0  gcc/config/avr/avr-dimode.md
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  0a144448d4f6070a4b9fcace87d0201f  gcc/config/avr/avr-log.cc
! 09ce676bb7cf71f13790ea4501506101  gcc/config/avr/avr-mcus.def
  480a983b45cb16a07fb0c86c70ec186f  gcc/config/avr/avr-modes.def
! a0fc31d8a59f7d686e973180e1669f56  gcc/config/avr/avr-passes.def
! 8f3858c21eacb8bac31962b42074a3d0  gcc/config/avr/avr-protos.h
  164ff6dd3b6f3a910fed5a48242842d5  gcc/config/avr/avr-stdint.h
! 7b5ca8cf22bead3a6e27ed383769be3d  gcc/config/avr/avr.cc
! ed39df13044ebe7bc1b2f5ff146ac579  gcc/config/avr/avr.h
! 149e0a205cf14ccd500e344eed283927  gcc/config/avr/avr.md
! 6edbfde303cb883ffe1050b8e0085fd4  gcc/config/avr/avr.opt
  eaed73ea14d92bf236ad5c9187507c16  gcc/config/avr/avrlibc.h
  9f9294792b117b0797422b0f0fd8db86  gcc/config/avr/builtins.def
! 22896009455f0da9f8cb63a5585bb39c  gcc/config/avr/constraints.md
! 74b6b298d3840b5f3a5ee140a30472d7  gcc/config/avr/driver-avr.cc
  bec6d9236523353c7e7397b804a6437a  gcc/config/avr/elf.h
  994f8b1234a164d23683bad0667c5f61  gcc/config/avr/gen-avr-mmcu-specs.cc
  e24c8d6e0f93587aab14772ff2f948c0  gcc/config/avr/gen-avr-mmcu-texi.cc
  9aacb3efacdfbea2504d9362807594fd  gcc/config/avr/genmultilib.awk
! 6d57740dc648f1c493b7c1f165b88320  gcc/config/avr/predicates.md
  cac8c94973c07d9bc0bdb4c2508bd82b  gcc/config/avr/specs.h
  0c00177746f6857c43084485cb9756eb  gcc/config/avr/stdfix.h
  0d13497f8f07c60ebbb52a5beaecfede  gcc/config/avr/t-avr
*************** c63f12e83019ec59f0315579c612ec6c  gcc/co
*** 3665,3675 ****
  34d6df0b3c2c505374efb226d0308119  gcc/config/darwin-driver.cc
  f45abe10e3aa93ce43dc8cdba5640b58  gcc/config/darwin-f.cc
  2f008666ac55a1275ad46737705557fc  gcc/config/darwin-ppc-ldouble-patch.def
! dd284730639b90f8e1b9409230c9dfc9  gcc/config/darwin-protos.h
! cb5bf7a5e59178a24f11676df7bd36ec  gcc/config/darwin-sections.def
! 6afc2ac3df5167a08a2ab5ff1e94577d  gcc/config/darwin.cc
! 282ab6a00ab99cccdc98025815b8e3b7  gcc/config/darwin.h
! 73a379c0bcbe698b48e59ff3d032707e  gcc/config/darwin.opt
  3565bbd41b50b8b5d5ee9ea2a2f7418a  gcc/config/dbxcoff.h
  6d89a3bd0a87690df3f4303c420c070f  gcc/config/dbxelf.h
  362acdec0f55c89a1402846a3c6a8f6f  gcc/config/default-c.cc
--- 3666,3676 ----
  34d6df0b3c2c505374efb226d0308119  gcc/config/darwin-driver.cc
  f45abe10e3aa93ce43dc8cdba5640b58  gcc/config/darwin-f.cc
  2f008666ac55a1275ad46737705557fc  gcc/config/darwin-ppc-ldouble-patch.def
! 6d32e8a940bb7132ce6928ce2767a4e5  gcc/config/darwin-protos.h
! 6db41de9eb5ca0404e49baaa94feddc1  gcc/config/darwin-sections.def
! 82212d8fc6ccddcaac88d0eeb35d2bf1  gcc/config/darwin.cc
! 2b57f631a28d110f81bca230156aee14  gcc/config/darwin.h
! 03ee4661b994ef3daddfe9a40d567124  gcc/config/darwin.opt
  3565bbd41b50b8b5d5ee9ea2a2f7418a  gcc/config/dbxcoff.h
  6d89a3bd0a87690df3f4303c420c070f  gcc/config/dbxelf.h
  362acdec0f55c89a1402846a3c6a8f6f  gcc/config/default-c.cc
*************** cf1bbcc054268a6a185f17503b37010d  gcc/co
*** 3797,3803 ****
  7140c08161ca9219fd720c34f93a602b  gcc/config/i386/ammintrin.h
  d4a6c7a692c80f0ed51ec3d6099f15dd  gcc/config/i386/amxbf16intrin.h
  d6abc2d151311152cb0693652c7b05cf  gcc/config/i386/amxint8intrin.h
! d99629e77d325de0ab19c2d2c883f7b9  gcc/config/i386/amxtileintrin.h
  d6b432ae98731354d73e97ad3d785397  gcc/config/i386/athlon.md
  d146e533457f0a84f8ed2dfcc599c0c5  gcc/config/i386/atom.md
  d3b4f4cbfc84b2f53ce3827afe4b7945  gcc/config/i386/att.h
--- 3798,3804 ----
  7140c08161ca9219fd720c34f93a602b  gcc/config/i386/ammintrin.h
  d4a6c7a692c80f0ed51ec3d6099f15dd  gcc/config/i386/amxbf16intrin.h
  d6abc2d151311152cb0693652c7b05cf  gcc/config/i386/amxint8intrin.h
! 30478dace2808786ce2f123ea241e825  gcc/config/i386/amxtileintrin.h
  d6b432ae98731354d73e97ad3d785397  gcc/config/i386/athlon.md
  d146e533457f0a84f8ed2dfcc599c0c5  gcc/config/i386/atom.md
  d3b4f4cbfc84b2f53ce3827afe4b7945  gcc/config/i386/att.h
*************** c458e148668e78e4e02a6f3565ab7e07  gcc/co
*** 3857,3865 ****
  881a6a791a72addc382da31af0ffbf7e  gcc/config/i386/cygming.opt
  68301008ce277633b6bcf0040cbfb53f  gcc/config/i386/cygwin-stdint.h
  73065376169b922762be869e9e462310  gcc/config/i386/cygwin-w64.h
! 9530f33d46cf20b7412ae03da7784ffe  gcc/config/i386/cygwin.h
  b60e062357a44078a917798542979921  gcc/config/i386/cygwin.opt
! e3830e39ae8b0d14fb1335be03c09c32  gcc/config/i386/darwin.h
  9babe6eff270583b672cdffa01aca413  gcc/config/i386/darwin32-biarch.h
  a22fb0f4889ea875908c2fdd7aea518b  gcc/config/i386/darwin64-biarch.h
  681f8c7a400d3008ee990b4357496d22  gcc/config/i386/djgpp-stdint.h
--- 3858,3866 ----
  881a6a791a72addc382da31af0ffbf7e  gcc/config/i386/cygming.opt
  68301008ce277633b6bcf0040cbfb53f  gcc/config/i386/cygwin-stdint.h
  73065376169b922762be869e9e462310  gcc/config/i386/cygwin-w64.h
! abd358f4fcfccaf6a002bcce8c4b54a9  gcc/config/i386/cygwin.h
  b60e062357a44078a917798542979921  gcc/config/i386/cygwin.opt
! c9b5c21399b224c44fc196d940202e8a  gcc/config/i386/darwin.h
  9babe6eff270583b672cdffa01aca413  gcc/config/i386/darwin32-biarch.h
  a22fb0f4889ea875908c2fdd7aea518b  gcc/config/i386/darwin64-biarch.h
  681f8c7a400d3008ee990b4357496d22  gcc/config/i386/djgpp-stdint.h
*************** b8f390f29e7cbe3b57bc812ec1f6aaab  gcc/co
*** 3884,3890 ****
  ab3fa41803950084ee3cd9958e6a1393  gcc/config/i386/glm.md
  61a7d42e02dbdb9257d8b64555e94d1f  gcc/config/i386/gmm_malloc.h
  2a4d03ea9a09acb2e27c79bc3055ab84  gcc/config/i386/gnu-property.cc
! 3acfb57e99e43adb2e845e037899cf1c  gcc/config/i386/gnu-user-common.h
  059d140455c7939d025adab7aa395a84  gcc/config/i386/gnu-user.h
  9ef90e64bcac5c359183947852d99edd  gcc/config/i386/gnu-user64.h
  44386b4d54a6ab2c5d2b8ce484bab564  gcc/config/i386/gnu.h
--- 3885,3891 ----
  ab3fa41803950084ee3cd9958e6a1393  gcc/config/i386/glm.md
  61a7d42e02dbdb9257d8b64555e94d1f  gcc/config/i386/gmm_malloc.h
  2a4d03ea9a09acb2e27c79bc3055ab84  gcc/config/i386/gnu-property.cc
! 580fe8134cbcbf3d3ef9ccd0d35d51e9  gcc/config/i386/gnu-user-common.h
  059d140455c7939d025adab7aa395a84  gcc/config/i386/gnu-user.h
  9ef90e64bcac5c359183947852d99edd  gcc/config/i386/gnu-user64.h
  44386b4d54a6ab2c5d2b8ce484bab564  gcc/config/i386/gnu.h
*************** dac1d55fce23c07f7334ab60107d2740  gcc/co
*** 3895,3921 ****
  f49f27ecc3f73457a104e71798f69e31  gcc/config/i386/hresetintrin.h
  59f4f2b14da54e4579a407bec8feacf2  gcc/config/i386/i386-builtin-types.awk
  e5f608519e1f03ddbe8c845378fdadc8  gcc/config/i386/i386-builtin-types.def
! 9d2d976ea2a22cefdce6662b9b745c1a  gcc/config/i386/i386-builtin.def
! 495e81c2a755f1c683cc2866edf7b9f3  gcc/config/i386/i386-builtins.cc
  1386ed6c665b92fb05c52b30d7fab44f  gcc/config/i386/i386-builtins.h
  7fb11c6fb9a30a343631cdbe654af3c0  gcc/config/i386/i386-c.cc
  e9dba11a6030bb896e56316e87976b8d  gcc/config/i386/i386-d.cc
  18d8aca3d6be4c0f13a294b167f38f45  gcc/config/i386/i386-d.h
! c90d4b86f631ff39ebbb7e7c026f08cf  gcc/config/i386/i386-expand.cc
  3c709d191abaf095a50b0ccc29328991  gcc/config/i386/i386-expand.h
! 754bff776651063ff06b2bcb50252ee7  gcc/config/i386/i386-features.cc
! ffd76bdf4194098464fbcf9c1dc4c463  gcc/config/i386/i386-features.h
  6937d1c6ece95c74b1c7ca2eb0265674  gcc/config/i386/i386-isa.def
  0093d40a44064ad74492537c26a7eac7  gcc/config/i386/i386-modes.def
! 3db38fdc5b8da86ec2dcb9b97320bb8e  gcc/config/i386/i386-options.cc
  7be51e744d8f9807ab03a83afaf685ca  gcc/config/i386/i386-options.h
  af85d0ff6d4cd15b14460985c816bbb3  gcc/config/i386/i386-opts.h
  bc068488ad4d00d93e15004aec10c28f  gcc/config/i386/i386-passes.def
  ec6047eefecd3fcbd1f5f5e73eedfe2f  gcc/config/i386/i386-protos.h
! ffd3785e7248340204441c5955650662  gcc/config/i386/i386.cc
! 545323e70a64499bc5ea1e5969289967  gcc/config/i386/i386.h
! f6611391db2e40d02deea172b2e6e9f6  gcc/config/i386/i386.md
! 65820a1c90a672e37a51eb5bd670dc73  gcc/config/i386/i386.opt
  916e372af07c88992a4dde741f963eac  gcc/config/i386/i386elf.h
  14e1802bbf5e0d6233d80d8f9fc83ed0  gcc/config/i386/ia32intrin.h
  b72f097222302e248e86a1bd8e98ca9b  gcc/config/i386/iamcu.h
--- 3896,3922 ----
  f49f27ecc3f73457a104e71798f69e31  gcc/config/i386/hresetintrin.h
  59f4f2b14da54e4579a407bec8feacf2  gcc/config/i386/i386-builtin-types.awk
  e5f608519e1f03ddbe8c845378fdadc8  gcc/config/i386/i386-builtin-types.def
! fd940784d70365a012747bd266742f09  gcc/config/i386/i386-builtin.def
! 120f6b3cdd9d2f1ae9b44ba63e6dbbec  gcc/config/i386/i386-builtins.cc
  1386ed6c665b92fb05c52b30d7fab44f  gcc/config/i386/i386-builtins.h
  7fb11c6fb9a30a343631cdbe654af3c0  gcc/config/i386/i386-c.cc
  e9dba11a6030bb896e56316e87976b8d  gcc/config/i386/i386-d.cc
  18d8aca3d6be4c0f13a294b167f38f45  gcc/config/i386/i386-d.h
! e90e18d477373b2c879ec7688343be85  gcc/config/i386/i386-expand.cc
  3c709d191abaf095a50b0ccc29328991  gcc/config/i386/i386-expand.h
! 0b4580838b2788a24d7a70eca267bf73  gcc/config/i386/i386-features.cc
! d3b148611be020715f6ff78424760245  gcc/config/i386/i386-features.h
  6937d1c6ece95c74b1c7ca2eb0265674  gcc/config/i386/i386-isa.def
  0093d40a44064ad74492537c26a7eac7  gcc/config/i386/i386-modes.def
! cb41e6bfb20d6a1bc16b3028ffc8e991  gcc/config/i386/i386-options.cc
  7be51e744d8f9807ab03a83afaf685ca  gcc/config/i386/i386-options.h
  af85d0ff6d4cd15b14460985c816bbb3  gcc/config/i386/i386-opts.h
  bc068488ad4d00d93e15004aec10c28f  gcc/config/i386/i386-passes.def
  ec6047eefecd3fcbd1f5f5e73eedfe2f  gcc/config/i386/i386-protos.h
! 65aef74fb267532a74e992960237e606  gcc/config/i386/i386.cc
! e5d843a5a920b7d7680734c13c8929bd  gcc/config/i386/i386.h
! f2909eec244ba6b2236b7775f2fd1852  gcc/config/i386/i386.md
! 7abb49886360a7038bbe29d74fa68b6f  gcc/config/i386/i386.opt
  916e372af07c88992a4dde741f963eac  gcc/config/i386/i386elf.h
  14e1802bbf5e0d6233d80d8f9fc83ed0  gcc/config/i386/ia32intrin.h
  b72f097222302e248e86a1bd8e98ca9b  gcc/config/i386/iamcu.h
*************** deb7d09bcda1f23f297841aa569db37a  gcc/co
*** 3938,3947 ****
  6f2e20eb5413e72135658acb3c265d88  gcc/config/i386/mingw-w64.h
  7825d17d84303a77ad8b6bc6dd673906  gcc/config/i386/mingw-w64.opt
  bbcda60db12697e323b00933ee40ded8  gcc/config/i386/mingw.opt
! b6cb7e0a3811006748966469cf8cc56b  gcc/config/i386/mingw32.h
  ea23ad893a55f744d2c1b92bb1fa58b7  gcc/config/i386/mm3dnow.h
  6c1c7c663150e74b9ab2511d744352d3  gcc/config/i386/mmintrin.h
! f8c70420148e0e93e459f18f491381d6  gcc/config/i386/mmx.md
  31346a482647fdb2ff94eca6e48e57ec  gcc/config/i386/movdirintrin.h
  70ad1e0e1a2bcedfd68558e53106cced  gcc/config/i386/msformat-c.cc
  2b0e639ce8a95cf149bf779faa505657  gcc/config/i386/mwaitintrin.h
--- 3939,3948 ----
  6f2e20eb5413e72135658acb3c265d88  gcc/config/i386/mingw-w64.h
  7825d17d84303a77ad8b6bc6dd673906  gcc/config/i386/mingw-w64.opt
  bbcda60db12697e323b00933ee40ded8  gcc/config/i386/mingw.opt
! 79fa880aa1d5038d9a3510d994295b78  gcc/config/i386/mingw32.h
  ea23ad893a55f744d2c1b92bb1fa58b7  gcc/config/i386/mm3dnow.h
  6c1c7c663150e74b9ab2511d744352d3  gcc/config/i386/mmintrin.h
! a5159c4e17ee152354410e6679834263  gcc/config/i386/mmx.md
  31346a482647fdb2ff94eca6e48e57ec  gcc/config/i386/movdirintrin.h
  70ad1e0e1a2bcedfd68558e53106cced  gcc/config/i386/msformat-c.cc
  2b0e639ce8a95cf149bf779faa505657  gcc/config/i386/mwaitintrin.h
*************** d6906912055f25ce87b3f315021dd99b  gcc/co
*** 3972,3978 ****
  5dc568f106b96e0944f39b6c8f27c51d  gcc/config/i386/slm.md
  2729a11650973e195375af7bccb55ce7  gcc/config/i386/smmintrin.h
  daccd4e3cdd63f0dbda7ded81a1478e8  gcc/config/i386/sol2.h
! 89ec7826d46ada5f91f0e3d071d83cc6  gcc/config/i386/sse.md
  10b2b2efc6fdb5368eb608587f67539d  gcc/config/i386/ssemath.h
  6bdc7b51876de6e87681dd2c97093efb  gcc/config/i386/stringop.def
  63673be1e52dad91e6e09ab3fd23682e  gcc/config/i386/subst.md
--- 3973,3979 ----
  5dc568f106b96e0944f39b6c8f27c51d  gcc/config/i386/slm.md
  2729a11650973e195375af7bccb55ce7  gcc/config/i386/smmintrin.h
  daccd4e3cdd63f0dbda7ded81a1478e8  gcc/config/i386/sol2.h
! 9a5c7dc008a1431011dd8f2d24c1453a  gcc/config/i386/sse.md
  10b2b2efc6fdb5368eb608587f67539d  gcc/config/i386/ssemath.h
  6bdc7b51876de6e87681dd2c97093efb  gcc/config/i386/stringop.def
  63673be1e52dad91e6e09ab3fd23682e  gcc/config/i386/subst.md
*************** f73f78a01e075bc90fe68c6a1b71ac1b  gcc/co
*** 4026,4032 ****
  389139c200520120fb9419c1c8e1b828  gcc/config/i386/x86-tune-sched-bd.cc
  40bf2fd6e01b2d322f54a763a3b55a06  gcc/config/i386/x86-tune-sched-core.cc
  862c36dc0312bd87cf63a2119be99160  gcc/config/i386/x86-tune-sched.cc
! d206b125d8ff15659d7b9168a70a63ac  gcc/config/i386/x86-tune.def
  ce22b05cc535a89dbb219457d178cacf  gcc/config/i386/x86gprintrin.h
  e44c986b85092282aced3b766506ebb6  gcc/config/i386/x86intrin.h
  111ac823774e8831ad95ac74302324da  gcc/config/i386/xm-cygwin.h
--- 4027,4033 ----
  389139c200520120fb9419c1c8e1b828  gcc/config/i386/x86-tune-sched-bd.cc
  40bf2fd6e01b2d322f54a763a3b55a06  gcc/config/i386/x86-tune-sched-core.cc
  862c36dc0312bd87cf63a2119be99160  gcc/config/i386/x86-tune-sched.cc
! 766b6a2e3fe2c2189e0630dc70ca24c9  gcc/config/i386/x86-tune.def
  ce22b05cc535a89dbb219457d178cacf  gcc/config/i386/x86gprintrin.h
  e44c986b85092282aced3b766506ebb6  gcc/config/i386/x86intrin.h
  111ac823774e8831ad95ac74302324da  gcc/config/i386/xm-cygwin.h
*************** d7c9029984fb692c48b03c7edec3da62  gcc/co
*** 4101,4108 ****
  187927a38ef291c9b146c6e31ce8bde9  gcc/config/loongarch/generic.md
  93bbe6d503e459bec56c7dd59ad562e4  gcc/config/loongarch/genopts/genstr.sh
  2c9c3f2661b6a86014d3af7826513e10  gcc/config/loongarch/genopts/loongarch-strings
! af5583deee0ea7e02967cb03a6c85dfb  gcc/config/loongarch/genopts/loongarch.opt.in
! 85adbedddbea6f7a3893f22710de0e28  gcc/config/loongarch/gnu-user.h
  b0b53e3aa4b2caf4c8fc56270f53b8ba  gcc/config/loongarch/la464.md
  d131557e8500011af1d08a79d6541c67  gcc/config/loongarch/larchintrin.h
  c561ec008b9da44240632a2e8738cd84  gcc/config/loongarch/linux.h
--- 4102,4109 ----
  187927a38ef291c9b146c6e31ce8bde9  gcc/config/loongarch/generic.md
  93bbe6d503e459bec56c7dd59ad562e4  gcc/config/loongarch/genopts/genstr.sh
  2c9c3f2661b6a86014d3af7826513e10  gcc/config/loongarch/genopts/loongarch-strings
! ac8b28535269ec773ef0ce6af5ff2225  gcc/config/loongarch/genopts/loongarch.opt.in
! 1b3de56f6a17b76b916901126bd6f3f5  gcc/config/loongarch/gnu-user.h
  b0b53e3aa4b2caf4c8fc56270f53b8ba  gcc/config/loongarch/la464.md
  d131557e8500011af1d08a79d6541c67  gcc/config/loongarch/larchintrin.h
  c561ec008b9da44240632a2e8738cd84  gcc/config/loongarch/linux.h
*************** cae26252c54a28513d91f790be149a4c  gcc/co
*** 4116,4134 ****
  1953cc130563d0ebe2e054c9e39b1bf5  gcc/config/loongarch/loongarch-driver.h
  5cc9d4c848862dcad636760ca3b54297  gcc/config/loongarch/loongarch-ftypes.def
  15082170b1e96d1d677239d8373f4ce4  gcc/config/loongarch/loongarch-modes.def
! 9d590a79ec519fc8a1563b9ef017498c  gcc/config/loongarch/loongarch-opts.cc
! 6f8d5bdd9db684a6838b5c6c56a120ac  gcc/config/loongarch/loongarch-opts.h
! ce786b3bbe89341012dadc4b50812bea  gcc/config/loongarch/loongarch-protos.h
  7dac179891b7f5030f246b3dc5063a34  gcc/config/loongarch/loongarch-str.h
  e87e1fc114ac64d998e217fc70bb284d  gcc/config/loongarch/loongarch-tune.h
! 905e46d5dc3e6b272a885ff93e09338a  gcc/config/loongarch/loongarch.cc
! 9e83ea13dcd9f00c5b817fd6d23484bb  gcc/config/loongarch/loongarch.h
! cd6048ef7b1b30c1dcd5b21a9b3309ab  gcc/config/loongarch/loongarch.md
! 6ce82e6fac38842ebeab30d9fa9c86ee  gcc/config/loongarch/loongarch.opt
  341adb054a917216830fd2decd29e84b  gcc/config/loongarch/predicates.md
! 3d246a3b6f221b39efda2e99543a59fd  gcc/config/loongarch/sync.md
  b5b7ae25005eaf777c6c7f8113d73fff  gcc/config/loongarch/t-linux
! fc7d079b5f56ba7e8ce7b4ab0cb064dd  gcc/config/loongarch/t-loongarch
  0694afecae00bd387716b1c1aa91f58f  gcc/config/lynx.h
  54c0ca65e031c269266318a6793975f2  gcc/config/lynx.opt
  620af35e67d564c03797d0efed05ee3c  gcc/config/m32c/addsub.md
--- 4117,4135 ----
  1953cc130563d0ebe2e054c9e39b1bf5  gcc/config/loongarch/loongarch-driver.h
  5cc9d4c848862dcad636760ca3b54297  gcc/config/loongarch/loongarch-ftypes.def
  15082170b1e96d1d677239d8373f4ce4  gcc/config/loongarch/loongarch-modes.def
! 81193ce934d79e3ad1ab992e8f796ebf  gcc/config/loongarch/loongarch-opts.cc
! 1a372c4fcbc6d8c402018e05a35c78a6  gcc/config/loongarch/loongarch-opts.h
! 80fa8abbce86711703a5a129b2f123e3  gcc/config/loongarch/loongarch-protos.h
  7dac179891b7f5030f246b3dc5063a34  gcc/config/loongarch/loongarch-str.h
  e87e1fc114ac64d998e217fc70bb284d  gcc/config/loongarch/loongarch-tune.h
! aa1008fce750f885f450e3f61b307928  gcc/config/loongarch/loongarch.cc
! d2e27e36aeaecfbd9b05b89c5186c7a6  gcc/config/loongarch/loongarch.h
! d3ba13b38bf5ecd09b8c9898243eddf0  gcc/config/loongarch/loongarch.md
! 2b399db875b4060d0a638e2eaa897bb9  gcc/config/loongarch/loongarch.opt
  341adb054a917216830fd2decd29e84b  gcc/config/loongarch/predicates.md
! b6357a7332ad6182d8356115f790af88  gcc/config/loongarch/sync.md
  b5b7ae25005eaf777c6c7f8113d73fff  gcc/config/loongarch/t-linux
! 9de60fce88ab6dd1d094fea04faf23dd  gcc/config/loongarch/t-loongarch
  0694afecae00bd387716b1c1aa91f58f  gcc/config/lynx.h
  54c0ca65e031c269266318a6793975f2  gcc/config/lynx.opt
  620af35e67d564c03797d0efed05ee3c  gcc/config/m32c/addsub.md
*************** c3ef461a61245d5d932cb01ed4d833e8  gcc/co
*** 4271,4282 ****
  88e78340f91191e86961da7cb0f6d396  gcc/config/mips/mips-fixed.md
  d8c324596c91841b46a3f6309447a40d  gcc/config/mips/mips-ftypes.def
  435edb7c2c6c1b16de8e29d60737747c  gcc/config/mips/mips-modes.def
! 3348d4620bd6195017ce782801822395  gcc/config/mips/mips-msa.md
  ea23feec32f144d135b5d5f32396a8ad  gcc/config/mips/mips-opts.h
  6156cdde6da23b9c368bc68f6f9d82bb  gcc/config/mips/mips-protos.h
  0e10771a2b2d29acfcc816bac79ef440  gcc/config/mips/mips-ps-3d.md
  234d90729fafb2d011d97c39dd26e283  gcc/config/mips/mips-tables.opt
! e4b5aaf56a0b2c5dbfec8047f2704ec8  gcc/config/mips/mips.cc
  47fe4503d2340225cb4a85c953c89008  gcc/config/mips/mips.h
  225a53521100ee70d70387865e0c1fb6  gcc/config/mips/mips.md
  0d82471eaffa9f4749a237e08b80ad37  gcc/config/mips/mips.opt
--- 4272,4283 ----
  88e78340f91191e86961da7cb0f6d396  gcc/config/mips/mips-fixed.md
  d8c324596c91841b46a3f6309447a40d  gcc/config/mips/mips-ftypes.def
  435edb7c2c6c1b16de8e29d60737747c  gcc/config/mips/mips-modes.def
! d01e1c80026e1907ee578506a5edd33f  gcc/config/mips/mips-msa.md
  ea23feec32f144d135b5d5f32396a8ad  gcc/config/mips/mips-opts.h
  6156cdde6da23b9c368bc68f6f9d82bb  gcc/config/mips/mips-protos.h
  0e10771a2b2d29acfcc816bac79ef440  gcc/config/mips/mips-ps-3d.md
  234d90729fafb2d011d97c39dd26e283  gcc/config/mips/mips-tables.opt
! 29340b1a0e2aab3c59f5118016db8003  gcc/config/mips/mips.cc
  47fe4503d2340225cb4a85c953c89008  gcc/config/mips/mips.h
  225a53521100ee70d70387865e0c1fb6  gcc/config/mips/mips.md
  0d82471eaffa9f4749a237e08b80ad37  gcc/config/mips/mips.opt
*************** e47d71d86ebb0d0f8afddf6d199f5364  gcc/co
*** 4500,4508 ****
  2eda1205dffee59771ece16cfd9f0d8b  gcc/config/pa/pa-openbsd.h
  7a10250d76ade2d934709e9b7bb5ed6a  gcc/config/pa/pa-opts.h
  81f28e8af0f5bc5ba27387764d23963b  gcc/config/pa/pa-protos.h
! 4d2299e4d6d733de7ec1c7685ddcdd9d  gcc/config/pa/pa.cc
  98df2e15f09cff2f151120ceee9f12df  gcc/config/pa/pa.h
! 5185fd9b7b5c9ba5d5bc227ae8b27775  gcc/config/pa/pa.md
  64cec30c3507a2146fe6ab58b03330af  gcc/config/pa/pa.opt
  891f23207e8d80f19e1df8c9e5118ab1  gcc/config/pa/pa32-linux.h
  b721e31e8ac5cfd5c02dda7a9fbca7c3  gcc/config/pa/pa32-netbsd.h
--- 4501,4509 ----
  2eda1205dffee59771ece16cfd9f0d8b  gcc/config/pa/pa-openbsd.h
  7a10250d76ade2d934709e9b7bb5ed6a  gcc/config/pa/pa-opts.h
  81f28e8af0f5bc5ba27387764d23963b  gcc/config/pa/pa-protos.h
! 5b34dd1d849b62c46f8d67394383d9da  gcc/config/pa/pa.cc
  98df2e15f09cff2f151120ceee9f12df  gcc/config/pa/pa.h
! cfa25b49f1d3f48a07efd8522187432f  gcc/config/pa/pa.md
  64cec30c3507a2146fe6ab58b03330af  gcc/config/pa/pa.opt
  891f23207e8d80f19e1df8c9e5118ab1  gcc/config/pa/pa32-linux.h
  b721e31e8ac5cfd5c02dda7a9fbca7c3  gcc/config/pa/pa32-netbsd.h
*************** b797d004525a009864b893ae4fd37c7a  gcc/co
*** 4565,4577 ****
  88c2c78891ab447d2675d0968c6626d9  gcc/config/riscv/riscv-shorten-memrefs.cc
  f60d94e10e9a0c6a4ddae1f3aae0bbc4  gcc/config/riscv/riscv-sr.cc
  d21366ce6d880e1560089312a963636e  gcc/config/riscv/riscv-subset.h
! b59643cff7ea0a2a6f614032a16139e8  gcc/config/riscv/riscv.cc
  f9b5d1210e6b0940277f77fd8ab0c9bb  gcc/config/riscv/riscv.h
  5ab629d6f9eb839b59c2fba1c700eb8b  gcc/config/riscv/riscv.md
  5d262ceccd11d7637234635169e18019  gcc/config/riscv/riscv.opt
  1f8d9fb5328ab69d6ee6aea7cbc52af8  gcc/config/riscv/rtems.h
  462630614e6e7a6209f8f18b6dff0eef  gcc/config/riscv/sifive-7.md
! 68ce7572bf65c61a8e3297e7e05368fd  gcc/config/riscv/sync.md
  1c27821991689abdaa7a908a0cc8dfa4  gcc/config/riscv/t-elf-multilib
  d8ae7bee35ef1ecd77143535da9aae78  gcc/config/riscv/t-linux
  1ed181a166b1d0e206c4a4e0024cce2a  gcc/config/riscv/t-linux-multilib
--- 4566,4578 ----
  88c2c78891ab447d2675d0968c6626d9  gcc/config/riscv/riscv-shorten-memrefs.cc
  f60d94e10e9a0c6a4ddae1f3aae0bbc4  gcc/config/riscv/riscv-sr.cc
  d21366ce6d880e1560089312a963636e  gcc/config/riscv/riscv-subset.h
! 127dc558ab84144bfc75c59af6e27a94  gcc/config/riscv/riscv.cc
  f9b5d1210e6b0940277f77fd8ab0c9bb  gcc/config/riscv/riscv.h
  5ab629d6f9eb839b59c2fba1c700eb8b  gcc/config/riscv/riscv.md
  5d262ceccd11d7637234635169e18019  gcc/config/riscv/riscv.opt
  1f8d9fb5328ab69d6ee6aea7cbc52af8  gcc/config/riscv/rtems.h
  462630614e6e7a6209f8f18b6dff0eef  gcc/config/riscv/sifive-7.md
! 7d2b60cc0f0c63811e5fb40daa67c3a6  gcc/config/riscv/sync.md
  1c27821991689abdaa7a908a0cc8dfa4  gcc/config/riscv/t-elf-multilib
  d8ae7bee35ef1ecd77143535da9aae78  gcc/config/riscv/t-linux
  1ed181a166b1d0e206c4a4e0024cce2a  gcc/config/riscv/t-linux-multilib
*************** ff4a6b203fb6d5089653a8497f00f395  gcc/co
*** 4612,4618 ****
  ba9a44e430912aebbb6a1b81be97cd3a  gcc/config/rs6000/aix72.h
  896ac66876b04d2b76989e6eee0b90ce  gcc/config/rs6000/aix73.h
  ef2ced8f2fb6ce8c5c1245ce6cee66f6  gcc/config/rs6000/altivec.h
! 9c0711847a18b3bda8e1aa02c327e9a6  gcc/config/rs6000/altivec.md
  cc49b81ab7c9ca29772c01a9a7535cca  gcc/config/rs6000/amo.h
  02da5ce24a764b70228b18b91f3c71b7  gcc/config/rs6000/biarch64.h
  1085f75a8407fb26f3c9146067f6f20b  gcc/config/rs6000/bmi2intrin.h
--- 4613,4619 ----
  ba9a44e430912aebbb6a1b81be97cd3a  gcc/config/rs6000/aix72.h
  896ac66876b04d2b76989e6eee0b90ce  gcc/config/rs6000/aix73.h
  ef2ced8f2fb6ce8c5c1245ce6cee66f6  gcc/config/rs6000/altivec.h
! 278886351e264c850ab923bdc10b063e  gcc/config/rs6000/altivec.md
  cc49b81ab7c9ca29772c01a9a7535cca  gcc/config/rs6000/amo.h
  02da5ce24a764b70228b18b91f3c71b7  gcc/config/rs6000/biarch64.h
  1085f75a8407fb26f3c9146067f6f20b  gcc/config/rs6000/bmi2intrin.h
*************** cc49b81ab7c9ca29772c01a9a7535cca  gcc/co
*** 4620,4626 ****
  54ec91ad1765f5503425295580f47013  gcc/config/rs6000/cell.md
  48092c856b89587cf747f397635a814e  gcc/config/rs6000/constraints.md
  441921d402e9838d42e073dbdae44779  gcc/config/rs6000/crypto.md
! 77c27779e033c8aebcea737036e485a2  gcc/config/rs6000/darwin.h
  503185b2f1b7ecba15c3130eeb6de309  gcc/config/rs6000/darwin.md
  6262a630a0319b874ebf7bb603354dff  gcc/config/rs6000/darwin.opt
  4d1427642846be99ef5df72c1c464cbd  gcc/config/rs6000/darwin32-biarch.h
--- 4621,4627 ----
  54ec91ad1765f5503425295580f47013  gcc/config/rs6000/cell.md
  48092c856b89587cf747f397635a814e  gcc/config/rs6000/constraints.md
  441921d402e9838d42e073dbdae44779  gcc/config/rs6000/crypto.md
! 58e049e372382f27f13a2f3c3ee65a3d  gcc/config/rs6000/darwin.h
  503185b2f1b7ecba15c3130eeb6de309  gcc/config/rs6000/darwin.md
  6262a630a0319b874ebf7bb603354dff  gcc/config/rs6000/darwin.opt
  4d1427642846be99ef5df72c1c464cbd  gcc/config/rs6000/darwin32-biarch.h
*************** ca44783c9c7d3e980434a37fd5ebd2bd  gcc/co
*** 4640,4647 ****
  177812c3c73950afb57861e8b44764a8  gcc/config/rs6000/emmintrin.h
  e2f33e3ad8c58ae7c4d37c57668d5d6d  gcc/config/rs6000/freebsd.h
  1b9d73432959c122188bd5c2819c226d  gcc/config/rs6000/freebsd64.h
! 294d38ad800a36068f5e357f6120ffe6  gcc/config/rs6000/fusion.md
! 510d12e161addcd3e90133d8016734f0  gcc/config/rs6000/genfusion.pl
  77483e03f3638fc04120ec5e72cc81c6  gcc/config/rs6000/genopt.sh
  e424c8451aa2fa5e941011dedc3f3d08  gcc/config/rs6000/host-darwin.cc
  e6df280cc5a65d387c7826ba6a8d5c36  gcc/config/rs6000/host-ppc64-darwin.cc
--- 4641,4648 ----
  177812c3c73950afb57861e8b44764a8  gcc/config/rs6000/emmintrin.h
  e2f33e3ad8c58ae7c4d37c57668d5d6d  gcc/config/rs6000/freebsd.h
  1b9d73432959c122188bd5c2819c226d  gcc/config/rs6000/freebsd64.h
! 42c2335311a88a309560a92ba5ce4c98  gcc/config/rs6000/fusion.md
! f3a5521e95d97a4bad6cd579f2534251  gcc/config/rs6000/genfusion.pl
  77483e03f3638fc04120ec5e72cc81c6  gcc/config/rs6000/genopt.sh
  e424c8451aa2fa5e941011dedc3f3d08  gcc/config/rs6000/host-darwin.cc
  e6df280cc5a65d387c7826ba6a8d5c36  gcc/config/rs6000/host-ppc64-darwin.cc
*************** db8e0cbf1cbd090070ea33edd5629e0b  gcc/co
*** 4656,4662 ****
  527bc8f53c10064aed61f852b917df1f  gcc/config/rs6000/lynx.h
  0cc3c5f9101501b8253ce3176c3ffce4  gcc/config/rs6000/milli.exp
  c483353b3be8e4608e9f79096169e69a  gcc/config/rs6000/mm_malloc.h
! 67fbc0ac86da83e1b861a2d77a288ad2  gcc/config/rs6000/mma.md
  6eadcc7d4dcedd8624a1fb7b41da66f6  gcc/config/rs6000/mmintrin.h
  61c28e3586fb2b03805991a64b45cb8c  gcc/config/rs6000/mpc.md
  95952f5d67af6326d2a04de86ee33226  gcc/config/rs6000/netbsd.h
--- 4657,4663 ----
  527bc8f53c10064aed61f852b917df1f  gcc/config/rs6000/lynx.h
  0cc3c5f9101501b8253ce3176c3ffce4  gcc/config/rs6000/milli.exp
  c483353b3be8e4608e9f79096169e69a  gcc/config/rs6000/mm_malloc.h
! 333a18dfab09df6dc320f98898945441  gcc/config/rs6000/mma.md
  6eadcc7d4dcedd8624a1fb7b41da66f6  gcc/config/rs6000/mmintrin.h
  61c28e3586fb2b03805991a64b45cb8c  gcc/config/rs6000/mpc.md
  95952f5d67af6326d2a04de86ee33226  gcc/config/rs6000/netbsd.h
*************** ee5eec4bab981773b4e3f805b4675170  gcc/co
*** 4674,4690 ****
  dd882bb8b346fd5c71c3edc3523c9837  gcc/config/rs6000/ppc-asm.h
  6d1c5a9feee6656b996e2ca020d567d5  gcc/config/rs6000/ppc-auxv.h
  1bd0038bfa018ab27c48f63a4e6515e1  gcc/config/rs6000/ppu_intrinsics.h
! 5cf2585a27776874e85afbf8f7d3c75e  gcc/config/rs6000/predicates.md
  8c1455ab31e44fd0dfaba2988aeac309  gcc/config/rs6000/rbtree.cc
  a8d5a7b4dde5aabdefe618616c9a0f75  gcc/config/rs6000/rbtree.h
! 4f6516b27edf03476faee4c43da43658  gcc/config/rs6000/rs6000-builtin.cc
! a19a889741326a0b3539d146e7c90e0f  gcc/config/rs6000/rs6000-builtins.def
! 194b4cf23e7ae4847e8b82d6217281df  gcc/config/rs6000/rs6000-c.cc
  d69516edfcccc824ece23ac1abebc808  gcc/config/rs6000/rs6000-call.cc
! 788bbb7b212d3eb79c98533414d76742  gcc/config/rs6000/rs6000-cpus.def
  c29c5d14236f95e023e900bf3d0da626  gcc/config/rs6000/rs6000-d.cc
  c338280d6b54073cccb52687d0ecc47a  gcc/config/rs6000/rs6000-d.h
! 73fdd592a835c4516b858963e5bdccd1  gcc/config/rs6000/rs6000-gen-builtins.cc
  a490bd1734755760e696287f317cb9db  gcc/config/rs6000/rs6000-internal.h
  a9fd9182753b1742f0240fb46af52781  gcc/config/rs6000/rs6000-linux.cc
  a4066af94f9fef208343046356f48fdc  gcc/config/rs6000/rs6000-logue.cc
--- 4675,4691 ----
  dd882bb8b346fd5c71c3edc3523c9837  gcc/config/rs6000/ppc-asm.h
  6d1c5a9feee6656b996e2ca020d567d5  gcc/config/rs6000/ppc-auxv.h
  1bd0038bfa018ab27c48f63a4e6515e1  gcc/config/rs6000/ppu_intrinsics.h
! f9988f8ee768613f827ca390bf213e67  gcc/config/rs6000/predicates.md
  8c1455ab31e44fd0dfaba2988aeac309  gcc/config/rs6000/rbtree.cc
  a8d5a7b4dde5aabdefe618616c9a0f75  gcc/config/rs6000/rbtree.h
! e0f4c016a8d3df118d1708c557d018e4  gcc/config/rs6000/rs6000-builtin.cc
! 36e5061a4c56bd75de1ff83419264a74  gcc/config/rs6000/rs6000-builtins.def
! a1cb6b8388293cf391d13f28b0b92a24  gcc/config/rs6000/rs6000-c.cc
  d69516edfcccc824ece23ac1abebc808  gcc/config/rs6000/rs6000-call.cc
! e38bd123eaaee0c150c6ec09d8eb707f  gcc/config/rs6000/rs6000-cpus.def
  c29c5d14236f95e023e900bf3d0da626  gcc/config/rs6000/rs6000-d.cc
  c338280d6b54073cccb52687d0ecc47a  gcc/config/rs6000/rs6000-d.h
! b90cf26dc9bd4b4b16ba5b0cf51ac967  gcc/config/rs6000/rs6000-gen-builtins.cc
  a490bd1734755760e696287f317cb9db  gcc/config/rs6000/rs6000-internal.h
  a9fd9182753b1742f0240fb46af52781  gcc/config/rs6000/rs6000-linux.cc
  a4066af94f9fef208343046356f48fdc  gcc/config/rs6000/rs6000-logue.cc
*************** b0ebc5652bf92a4f2c752b74777afe46  gcc/co
*** 4696,4707 ****
  67835799ee87533e04f2fbed2bd60702  gcc/config/rs6000/rs6000-passes.def
  ffda8f63c8242e1c9b8ca7d891c3106a  gcc/config/rs6000/rs6000-pcrel-opt.cc
  91fffda8ae46844deb7a9db32b7d07ba  gcc/config/rs6000/rs6000-protos.h
! ef3e25381794d8ed8d7aca2e005897ea  gcc/config/rs6000/rs6000-string.cc
  e63a23cfbabbc08ab82c8dba906a13b9  gcc/config/rs6000/rs6000-tables.opt
! 9a74932bcc32ba19d0e63159098e5fd4  gcc/config/rs6000/rs6000.cc
! df3197dc1718e3eb7b4e88a81a6ab939  gcc/config/rs6000/rs6000.h
! 11d514c207099391d51a59928983cc35  gcc/config/rs6000/rs6000.md
! bb01fd05fe116c89bb06cc20336b7160  gcc/config/rs6000/rs6000.opt
  6ae739401a438fbbd4f5625c7f040ce2  gcc/config/rs6000/rs64.md
  4d688d01298aeea9600a8af44172f891  gcc/config/rs6000/rtems.h
  bff178b842621aa040def2dfb8f23961  gcc/config/rs6000/secureplt.h
--- 4697,4708 ----
  67835799ee87533e04f2fbed2bd60702  gcc/config/rs6000/rs6000-passes.def
  ffda8f63c8242e1c9b8ca7d891c3106a  gcc/config/rs6000/rs6000-pcrel-opt.cc
  91fffda8ae46844deb7a9db32b7d07ba  gcc/config/rs6000/rs6000-protos.h
! 5f7d4f8db6bc1a1c6c4d685afb0436cf  gcc/config/rs6000/rs6000-string.cc
  e63a23cfbabbc08ab82c8dba906a13b9  gcc/config/rs6000/rs6000-tables.opt
! 4e63e5675fc8f8c9eb57693d81e8da0d  gcc/config/rs6000/rs6000.cc
! 1d02c47bea7435e1d2b6dd88bd87ee2d  gcc/config/rs6000/rs6000.h
! f9b93ce818416fda5a78cf21cf72cce2  gcc/config/rs6000/rs6000.md
! 8700751be0214a4ca8ae23c73529d19f  gcc/config/rs6000/rs6000.opt
  6ae739401a438fbbd4f5625c7f040ce2  gcc/config/rs6000/rs64.md
  4d688d01298aeea9600a8af44172f891  gcc/config/rs6000/rtems.h
  bff178b842621aa040def2dfb8f23961  gcc/config/rs6000/secureplt.h
*************** afddd2a7589607f0c4fbe9ac61a90663  gcc/co
*** 4738,4744 ****
  be77ffba248fa7ebb90e840df8bdae02  gcc/config/rs6000/tmmintrin.h
  79d33dfc94147d876ca015f4a25d8cac  gcc/config/rs6000/vec_types.h
  3ad3eb71ffcf8b730887d1083c86969b  gcc/config/rs6000/vector.md
! 2c5391c2e900bbdddc153dd802dea4f0  gcc/config/rs6000/vsx.md
  07be543763620625532c4855fd2bbd8b  gcc/config/rs6000/vxworks.h
  410becd5ec1d44b12ad8abac150d8386  gcc/config/rs6000/vxworksae.h
  c81225cedf76fb8af245069ce63f1856  gcc/config/rs6000/vxworksmils.h
--- 4739,4745 ----
  be77ffba248fa7ebb90e840df8bdae02  gcc/config/rs6000/tmmintrin.h
  79d33dfc94147d876ca015f4a25d8cac  gcc/config/rs6000/vec_types.h
  3ad3eb71ffcf8b730887d1083c86969b  gcc/config/rs6000/vector.md
! e72d9c433c122a98aa6c87ca01c0b8d1  gcc/config/rs6000/vsx.md
  07be543763620625532c4855fd2bbd8b  gcc/config/rs6000/vxworks.h
  410becd5ec1d44b12ad8abac150d8386  gcc/config/rs6000/vxworksae.h
  c81225cedf76fb8af245069ce63f1856  gcc/config/rs6000/vxworksmils.h
*************** df711d3c4209dc2078403fede05b0c9f  gcc/co
*** 4826,4841 ****
  f6221f8d3397d492618e56579e467e42  gcc/config/sh/sh-mem.cc
  d22ca9f61b3c805404561dcfc87d2298  gcc/config/sh/sh-modes.def
  2df8afb4e4a2466319288500b8b1cafa  gcc/config/sh/sh-protos.h
! 73fe24015420e63988aaa42e507c0c33  gcc/config/sh/sh.cc
  d7a6129121131f3e3e065eca8b30ecaf  gcc/config/sh/sh.h
! 209a3bc0c73d88acbc59af0353d39fbf  gcc/config/sh/sh.md
  139aee6f03e0b710a7924323803aae81  gcc/config/sh/sh.opt
  084246870c25f111b506b273305de323  gcc/config/sh/sh1.md
  62872f49ccc9aaaa5931032f18cb33ee  gcc/config/sh/sh4-300.md
  de1ffc7485829b4c1829022e8c18cfa3  gcc/config/sh/sh4.md
  b513326c77a24af4716e52c2187ce2a9  gcc/config/sh/sh4a.md
  23ce1444bb9d11f50a1348cfca3bcb64  gcc/config/sh/sh_optimize_sett_clrt.cc
! e6463102cdb7fa30f8a08d8896586422  gcc/config/sh/sh_treg_combine.cc
  85b3b9260ba16b29271cdc22d46df733  gcc/config/sh/superh.h
  06158b0f1e33501120db330d7734228d  gcc/config/sh/superh.opt
  7ef467da960017f1cab28ea3b64842af  gcc/config/sh/sync.md
--- 4827,4842 ----
  f6221f8d3397d492618e56579e467e42  gcc/config/sh/sh-mem.cc
  d22ca9f61b3c805404561dcfc87d2298  gcc/config/sh/sh-modes.def
  2df8afb4e4a2466319288500b8b1cafa  gcc/config/sh/sh-protos.h
! 687f75dfd1d216956fe6284997d6cab8  gcc/config/sh/sh.cc
  d7a6129121131f3e3e065eca8b30ecaf  gcc/config/sh/sh.h
! 39d122a7a70bd88e5e0438b959f43d36  gcc/config/sh/sh.md
  139aee6f03e0b710a7924323803aae81  gcc/config/sh/sh.opt
  084246870c25f111b506b273305de323  gcc/config/sh/sh1.md
  62872f49ccc9aaaa5931032f18cb33ee  gcc/config/sh/sh4-300.md
  de1ffc7485829b4c1829022e8c18cfa3  gcc/config/sh/sh4.md
  b513326c77a24af4716e52c2187ce2a9  gcc/config/sh/sh4a.md
  23ce1444bb9d11f50a1348cfca3bcb64  gcc/config/sh/sh_optimize_sett_clrt.cc
! d47342003db28a07a85d8899ccd7a7b2  gcc/config/sh/sh_treg_combine.cc
  85b3b9260ba16b29271cdc22d46df733  gcc/config/sh/superh.h
  06158b0f1e33501120db330d7734228d  gcc/config/sh/superh.opt
  7ef467da960017f1cab28ea3b64842af  gcc/config/sh/sync.md
*************** edf42a730fa0e206acb4c36eb4fa36fe  gcc/co
*** 4999,5005 ****
  fc45ffa911b2561f64220620c3d3a7d3  gcc/config/vax/predicates.md
  8bafffc4214815e9fd184580c1e1f0d8  gcc/config/vax/vax-modes.def
  88dfdb263a18d045e0249cea9e3cc56b  gcc/config/vax/vax-protos.h
! a6103824529000c4a1f5896987881fbf  gcc/config/vax/vax.cc
  af2d177a52d10d2e653044329a046dc3  gcc/config/vax/vax.h
  6a22e9e199a573b6ff7872cc7945723c  gcc/config/vax/vax.md
  f094875de5c978bed96156c015cce2b8  gcc/config/vax/vax.opt
--- 5000,5006 ----
  fc45ffa911b2561f64220620c3d3a7d3  gcc/config/vax/predicates.md
  8bafffc4214815e9fd184580c1e1f0d8  gcc/config/vax/vax-modes.def
  88dfdb263a18d045e0249cea9e3cc56b  gcc/config/vax/vax-protos.h
! 32d066b57cbbbb8778c24ca7ec51efe8  gcc/config/vax/vax.cc
  af2d177a52d10d2e653044329a046dc3  gcc/config/vax/vax.h
  6a22e9e199a573b6ff7872cc7945723c  gcc/config/vax/vax.md
  f094875de5c978bed96156c015cce2b8  gcc/config/vax/vax.opt
*************** db7e9d820bb832167ac7f105d093fdda  gcc/co
*** 5070,5077 ****
  414aed735962abfc0a242138b2833d30  gcc/config/xtensa/xtensa.h
  f8577ed90789aeb2b1d1e68701b2a18b  gcc/config/xtensa/xtensa.md
  49b91f52a0ff696a3067d3288badf84f  gcc/config/xtensa/xtensa.opt
! e7902d705aff8b5cd66c0b40f2ca97be  gcc/configure
! 56da926d2f6f92c69c88d1eeeaedf228  gcc/configure.ac
  2c3b5239194c0b4a2e4fb1effa7de1fe  gcc/context.cc
  f0af356bf719524dae46597a2b9376be  gcc/context.h
  9f79427f6fb6308f148ac1b824d74c87  gcc/convert.cc
--- 5071,5078 ----
  414aed735962abfc0a242138b2833d30  gcc/config/xtensa/xtensa.h
  f8577ed90789aeb2b1d1e68701b2a18b  gcc/config/xtensa/xtensa.md
  49b91f52a0ff696a3067d3288badf84f  gcc/config/xtensa/xtensa.opt
! f5dd44687a7725be30a01fa6fb661cb1  gcc/configure
! a9f1550dec52e693637c60ed8f546854  gcc/configure.ac
  2c3b5239194c0b4a2e4fb1effa7de1fe  gcc/context.cc
  f0af356bf719524dae46597a2b9376be  gcc/context.h
  9f79427f6fb6308f148ac1b824d74c87  gcc/convert.cc
*************** b81f031d36161f2b75151b5503458623  gcc/co
*** 5081,5087 ****
  5f947cfa4f11adffe84f558e88a17922  gcc/coroutine-passes.cc
  0fa89640cf054df390ce1a7cc7f2a797  gcc/coverage.cc
  b0252895005c33390b86f406799d9e70  gcc/coverage.h
! d33d778717a49d7d1e19945586457a3e  gcc/cp/ChangeLog
  d271e3663538ba1f3281cab3838e92cd  gcc/cp/ChangeLog-1993
  f5a44adbc05521162350ca409d1d95ce  gcc/cp/ChangeLog-1994
  ac55db48d964cb5469ff03c1cd3ee04d  gcc/cp/ChangeLog-1995
--- 5082,5088 ----
  5f947cfa4f11adffe84f558e88a17922  gcc/coroutine-passes.cc
  0fa89640cf054df390ce1a7cc7f2a797  gcc/coverage.cc
  b0252895005c33390b86f406799d9e70  gcc/coverage.h
! af049c41b25440eb2d60ecf6b8e44908  gcc/cp/ChangeLog
  d271e3663538ba1f3281cab3838e92cd  gcc/cp/ChangeLog-1993
  f5a44adbc05521162350ca409d1d95ce  gcc/cp/ChangeLog-1994
  ac55db48d964cb5469ff03c1cd3ee04d  gcc/cp/ChangeLog-1995
*************** bb663add91c7d9a78c9ac229a8930cef  gcc/cp
*** 5114,5148 ****
  c1c7801b9b0f379e702a4f6cb83972e7  gcc/cp/ChangeLog.ptr
  9aa3cd9f75c785de9f51446e3f295515  gcc/cp/ChangeLog.tree-ssa
  7e7b121cfc8ec5e3f50fc4115df96fec  gcc/cp/Make-lang.in
! e97662475593c0547d1608fb06460f68  gcc/cp/call.cc
  61492df7414a94076d2ea1be4ad1bdd5  gcc/cp/cfns.gperf
  4af50d4f82b93440a2801cf7837dce2e  gcc/cp/cfns.h
  0d6cd9a708e60767c26f8266b56114ff  gcc/cp/class.cc
  19c35c5421d2b8d512ffa110701df758  gcc/cp/config-lang.in
! 377b9a931759b8a51beb3600097fe48b  gcc/cp/constexpr.cc
  77a979d32de8cb8e46d54a3ebe92ea42  gcc/cp/constraint.cc
  27cb7d2ba6312acadcfc0dfc15dbcd2b  gcc/cp/coroutines.cc
! 234f0ca7156fdb33c852a06e00358015  gcc/cp/cp-gimplify.cc
  59c2096cf662e2d5bf81f477c55c9d2d  gcc/cp/cp-lang.cc
  6b0b8ba87ad071a0acceb6567386ef78  gcc/cp/cp-name-hint.h
  aa35fbdbada58c8b3f4d5e0910b3df37  gcc/cp/cp-objcp-common.cc
  af9e79c65b8109b071bfab436f53fd06  gcc/cp/cp-objcp-common.h
  1503b8e00198c339d86d7125d96a92e0  gcc/cp/cp-tree.def
! 89674d68018ee44f23b8a44473d71a5a  gcc/cp/cp-tree.h
  93d92e57a74a5fd9ee45f47650516d4f  gcc/cp/cp-ubsan.cc
  cf937b536f89656bbd216fda359c5f56  gcc/cp/cvt.cc
  2b73a9fc46b5816431c794ab7d308871  gcc/cp/cxx-pretty-print.cc
  fb305bef28206d87862d28cb7233a56b  gcc/cp/cxx-pretty-print.h
! ecfacf6b08d14bcaf3ee4ed89b749e67  gcc/cp/decl.cc
  cffc01a2fb968bde8c15a0cf880e57f3  gcc/cp/decl.h
  a85051d5a44d327240b1f0b44cdee94d  gcc/cp/decl2.cc
  a5dba9831bf8a38a28a4b412c76ceef5  gcc/cp/dump.cc
  b05e7f9587bf188168b525f48c7479f4  gcc/cp/error.cc
! 9d0b278707364af28a921f5daa9827e5  gcc/cp/except.cc
  8cebaad85dc0c01a9c1ceb500919c45c  gcc/cp/expr.cc
  1a3ebbf7c0f22d963d7ba4a245ff205c  gcc/cp/friend.cc
! bc3bb34c8c708bd0a0f8320a9bf32d07  gcc/cp/g++spec.cc
! 00eca5f97d5229db0adb72721432979a  gcc/cp/init.cc
  070afdcd7a31bfd27df0dbdd7a063376  gcc/cp/lambda.cc
  2d025243c67abcccf63845127a051ce4  gcc/cp/lang-specs.h
  7fae35cf7f4dae942a3e4ba08e3fc077  gcc/cp/lex.cc
--- 5115,5149 ----
  c1c7801b9b0f379e702a4f6cb83972e7  gcc/cp/ChangeLog.ptr
  9aa3cd9f75c785de9f51446e3f295515  gcc/cp/ChangeLog.tree-ssa
  7e7b121cfc8ec5e3f50fc4115df96fec  gcc/cp/Make-lang.in
! 7a0f7e8dc851e16ec5fad9c98ee67d2f  gcc/cp/call.cc
  61492df7414a94076d2ea1be4ad1bdd5  gcc/cp/cfns.gperf
  4af50d4f82b93440a2801cf7837dce2e  gcc/cp/cfns.h
  0d6cd9a708e60767c26f8266b56114ff  gcc/cp/class.cc
  19c35c5421d2b8d512ffa110701df758  gcc/cp/config-lang.in
! c4feeea05c30ce9511d7f88e10c5830d  gcc/cp/constexpr.cc
  77a979d32de8cb8e46d54a3ebe92ea42  gcc/cp/constraint.cc
  27cb7d2ba6312acadcfc0dfc15dbcd2b  gcc/cp/coroutines.cc
! 7501a8946b544f82ced7912c0f8f957f  gcc/cp/cp-gimplify.cc
  59c2096cf662e2d5bf81f477c55c9d2d  gcc/cp/cp-lang.cc
  6b0b8ba87ad071a0acceb6567386ef78  gcc/cp/cp-name-hint.h
  aa35fbdbada58c8b3f4d5e0910b3df37  gcc/cp/cp-objcp-common.cc
  af9e79c65b8109b071bfab436f53fd06  gcc/cp/cp-objcp-common.h
  1503b8e00198c339d86d7125d96a92e0  gcc/cp/cp-tree.def
! 0ec61314e3693d259fbe0b0983df68dc  gcc/cp/cp-tree.h
  93d92e57a74a5fd9ee45f47650516d4f  gcc/cp/cp-ubsan.cc
  cf937b536f89656bbd216fda359c5f56  gcc/cp/cvt.cc
  2b73a9fc46b5816431c794ab7d308871  gcc/cp/cxx-pretty-print.cc
  fb305bef28206d87862d28cb7233a56b  gcc/cp/cxx-pretty-print.h
! e960a8e842a0bf98a49e42ea7d47e8f3  gcc/cp/decl.cc
  cffc01a2fb968bde8c15a0cf880e57f3  gcc/cp/decl.h
  a85051d5a44d327240b1f0b44cdee94d  gcc/cp/decl2.cc
  a5dba9831bf8a38a28a4b412c76ceef5  gcc/cp/dump.cc
  b05e7f9587bf188168b525f48c7479f4  gcc/cp/error.cc
! 9882b133987e0ef98e9551a9762234f3  gcc/cp/except.cc
  8cebaad85dc0c01a9c1ceb500919c45c  gcc/cp/expr.cc
  1a3ebbf7c0f22d963d7ba4a245ff205c  gcc/cp/friend.cc
! 0f6900a5092d59c380273a15cc1e6995  gcc/cp/g++spec.cc
! 180f96c767a8be30b0159ffb3308d628  gcc/cp/init.cc
  070afdcd7a31bfd27df0dbdd7a063376  gcc/cp/lambda.cc
  2d025243c67abcccf63845127a051ce4  gcc/cp/lang-specs.h
  7fae35cf7f4dae942a3e4ba08e3fc077  gcc/cp/lex.cc
*************** bc3bb34c8c708bd0a0f8320a9bf32d07  gcc/cp
*** 5151,5179 ****
  5324dfd367e7c8ebba7e3c511388ba71  gcc/cp/mapper-client.cc
  c08ce26e97ca92d6e36c71453aac5baf  gcc/cp/mapper-client.h
  5afaaf13a0191802d9adaa6cd1ff7b4b  gcc/cp/mapper-resolver.cc
! 475b454a38b3292062e999c0725ce2d3  gcc/cp/method.cc
  9b4fa8523bf6057cee15600a65221bb9  gcc/cp/module.cc
! f1648ab601f381500db0cad97ef1be62  gcc/cp/name-lookup.cc
! 9a3b7d6aa1623145cbb45cf2be753fe9  gcc/cp/name-lookup.h
  a8c0211ed0a1501bf948aff39864fd1b  gcc/cp/operators.def
  a175d4e76fa35476b1f2d1cef21b9d1e  gcc/cp/optimize.cc
! a0c47d7f9ff2568760e7859ce6355ebe  gcc/cp/parser.cc
  dee781c4e5da6a9ed8a8ed1119c12dbb  gcc/cp/parser.h
! 65b4f1c79137b4729fe4ad8ad2375900  gcc/cp/pt.cc
  39ea1e495d971ae62d15c580b9b26531  gcc/cp/ptree.cc
  a69253bf5f41f60f5be44abcb3134ee0  gcc/cp/rtti.cc
  763aed8f1a637266774e6466b1b98345  gcc/cp/search.cc
! 99bdd5b4325538685e960964677e975c  gcc/cp/semantics.cc
! 3948cac45784ecc6767b6d549df6eeb4  gcc/cp/tree.cc
  3ffb7b1546d92ce86c89a0d8324fa763  gcc/cp/type-utils.h
! d27294fc553c57a26a1188088d756904  gcc/cp/typeck.cc
  5833643279133cc5dbf13a9631077ce4  gcc/cp/typeck2.cc
  04b0f0bf0cbb8a2ebc3665e2acdd1be9  gcc/cp/vtable-class-hierarchy.cc
  2ed020c144695714d83ff76c8dc8551c  gcc/cppbuiltin.cc
  5e7300b7656f214ebad548e0d02d2d89  gcc/cppbuiltin.h
  22407913ee8063f2b6226b5860f0ea95  gcc/cppdefault.cc
  6ec17d982c4a82bb37cb668fada8a325  gcc/cppdefault.h
! 0c588d460d7ce7b601066501489f0ab3  gcc/cprop.cc
  920a4d7947132423a7d010e42c59d61a  gcc/cse.cc
  3693d7a5568e545df024d55501f2c82b  gcc/cselib.cc
  b6d6c874c2b61fc5ea973ad62359a416  gcc/cselib.h
--- 5152,5180 ----
  5324dfd367e7c8ebba7e3c511388ba71  gcc/cp/mapper-client.cc
  c08ce26e97ca92d6e36c71453aac5baf  gcc/cp/mapper-client.h
  5afaaf13a0191802d9adaa6cd1ff7b4b  gcc/cp/mapper-resolver.cc
! 0daac91a7d76dece74349caf1c32143a  gcc/cp/method.cc
  9b4fa8523bf6057cee15600a65221bb9  gcc/cp/module.cc
! 1e2da2f220c242ff666dacd4d7252e97  gcc/cp/name-lookup.cc
! eb7607457e31c0a54edf0539675b5b2e  gcc/cp/name-lookup.h
  a8c0211ed0a1501bf948aff39864fd1b  gcc/cp/operators.def
  a175d4e76fa35476b1f2d1cef21b9d1e  gcc/cp/optimize.cc
! 01bf4863b0be9b5cc2c0ce928457af40  gcc/cp/parser.cc
  dee781c4e5da6a9ed8a8ed1119c12dbb  gcc/cp/parser.h
! bb948a64bada4c750e3cab95dd84d6aa  gcc/cp/pt.cc
  39ea1e495d971ae62d15c580b9b26531  gcc/cp/ptree.cc
  a69253bf5f41f60f5be44abcb3134ee0  gcc/cp/rtti.cc
  763aed8f1a637266774e6466b1b98345  gcc/cp/search.cc
! dd0c13e5e9eeead8942a845760f28344  gcc/cp/semantics.cc
! 96228ad6b38f3037301535261b3c6026  gcc/cp/tree.cc
  3ffb7b1546d92ce86c89a0d8324fa763  gcc/cp/type-utils.h
! 1b4ba2b4d067c335f7feb6d0787f71f9  gcc/cp/typeck.cc
  5833643279133cc5dbf13a9631077ce4  gcc/cp/typeck2.cc
  04b0f0bf0cbb8a2ebc3665e2acdd1be9  gcc/cp/vtable-class-hierarchy.cc
  2ed020c144695714d83ff76c8dc8551c  gcc/cppbuiltin.cc
  5e7300b7656f214ebad548e0d02d2d89  gcc/cppbuiltin.h
  22407913ee8063f2b6226b5860f0ea95  gcc/cppdefault.cc
  6ec17d982c4a82bb37cb668fada8a325  gcc/cppdefault.h
! 3fd65bb756f17a28aaa8aaf215865361  gcc/cprop.cc
  920a4d7947132423a7d010e42c59d61a  gcc/cse.cc
  3693d7a5568e545df024d55501f2c82b  gcc/cselib.cc
  b6d6c874c2b61fc5ea973ad62359a416  gcc/cselib.h
*************** b6d6c874c2b61fc5ea973ad62359a416  gcc/cs
*** 5181,5187 ****
  d5ed22370e5dd622b0b12c32b21f04cd  gcc/ctfc.cc
  0a1449a42c84460895e02a7a3ee5eb09  gcc/ctfc.h
  c86420385a29dc1b103e1a4cca601af9  gcc/ctfout.cc
! 1b4bc6be7d02acfd98e8f1340c534f5a  gcc/d/ChangeLog
  86f687c485111eedca2eb048294f957e  gcc/d/ChangeLog-2006
  70ed1c47fd9b3f5dd95055642ed79265  gcc/d/ChangeLog-2007
  a7090ab2dd83aa4f44823c17566b83ef  gcc/d/ChangeLog-2008
--- 5182,5188 ----
  d5ed22370e5dd622b0b12c32b21f04cd  gcc/ctfc.cc
  0a1449a42c84460895e02a7a3ee5eb09  gcc/ctfc.h
  c86420385a29dc1b103e1a4cca601af9  gcc/ctfout.cc
! e69672de58a628bae0976a20defee3aa  gcc/d/ChangeLog
  86f687c485111eedca2eb048294f957e  gcc/d/ChangeLog-2006
  70ed1c47fd9b3f5dd95055642ed79265  gcc/d/ChangeLog-2007
  a7090ab2dd83aa4f44823c17566b83ef  gcc/d/ChangeLog-2008
*************** e432bfc5c605ae0b1beedf0492ad40d1  gcc/d/
*** 5202,5211 ****
  426254b45d40584d0597c63f3fd1f889  gcc/d/README.gcc
  8bf5d890e781b56206924e00d9e49939  gcc/d/config-lang.in
  d08c623f247be5cfa5170417f26d5480  gcc/d/d-attribs.cc
! 69376a17d40f468c514561874ccaf99a  gcc/d/d-builtins.cc
! 03ff26d700e4c0c548b26525553b8237  gcc/d/d-codegen.cc
  d392fda0a2aca5434b3f337c80f8f864  gcc/d/d-compiler.cc
! a56e87d314027fcf6714ff9f18aa20bc  gcc/d/d-convert.cc
  8d7ac5eca73cc075b175513a7fc713e3  gcc/d/d-ctfloat.cc
  a45dc5a01e8d32b42d3e48a112e065b4  gcc/d/d-diagnostic.cc
  1e4c2f76e9781d5cadf99f2a0b628299  gcc/d/d-frontend.cc
--- 5203,5212 ----
  426254b45d40584d0597c63f3fd1f889  gcc/d/README.gcc
  8bf5d890e781b56206924e00d9e49939  gcc/d/config-lang.in
  d08c623f247be5cfa5170417f26d5480  gcc/d/d-attribs.cc
! 688fb2314b162760f8950ea9705af7ab  gcc/d/d-builtins.cc
! cb8d3dc5d6edece8d62b15cc87441f55  gcc/d/d-codegen.cc
  d392fda0a2aca5434b3f337c80f8f864  gcc/d/d-compiler.cc
! 7afde298a7a53e5dee640eeaa93a1feb  gcc/d/d-convert.cc
  8d7ac5eca73cc075b175513a7fc713e3  gcc/d/d-ctfloat.cc
  a45dc5a01e8d32b42d3e48a112e065b4  gcc/d/d-diagnostic.cc
  1e4c2f76e9781d5cadf99f2a0b628299  gcc/d/d-frontend.cc
*************** d187ab42ee24bae8e09e49fbd31d3752  gcc/d/
*** 5218,5232 ****
  7fd2410570d6cc275d2f4bd82620eb39  gcc/d/d-spec.cc
  5e7a162f22439e5912f58fe3facdc6ee  gcc/d/d-system.h
  6f744f77de810e88c4285983c844098c  gcc/d/d-target-def.h
! fd5863030187662b0a21a5e1ec8e8916  gcc/d/d-target.cc
  021df40040406e7afee01d7e08802798  gcc/d/d-target.def
  af194d51ac76779c9790fddaa8ca34ec  gcc/d/d-target.h
  e67401e2b9e7e3fd1c7867f4a1dd0db2  gcc/d/d-tree.def
! b6aab59305ff125e6a2e6f31eb721ced  gcc/d/d-tree.h
! 9834c92ae2fb96d9f867a2a7c1b08bfe  gcc/d/decl.cc
! b12d0d5df7729754f61d54abeb56b5fd  gcc/d/dmd/MERGE
  c65e8ed7b55dcb02725394bcde7c2da6  gcc/d/dmd/README.md
! d2d0546119ea4af834d32702c3a3eafc  gcc/d/dmd/VERSION
  fee1124c67987d66a0df1db139185575  gcc/d/dmd/access.d
  a168589ac70f62a374e6ab64288c6d01  gcc/d/dmd/aggregate.d
  37c6b3eaa80ad090aed4f88a25159f4a  gcc/d/dmd/aggregate.h
--- 5219,5233 ----
  7fd2410570d6cc275d2f4bd82620eb39  gcc/d/d-spec.cc
  5e7a162f22439e5912f58fe3facdc6ee  gcc/d/d-system.h
  6f744f77de810e88c4285983c844098c  gcc/d/d-target-def.h
! 450ea2ab19a4944ffda76bc103bde4b2  gcc/d/d-target.cc
  021df40040406e7afee01d7e08802798  gcc/d/d-target.def
  af194d51ac76779c9790fddaa8ca34ec  gcc/d/d-target.h
  e67401e2b9e7e3fd1c7867f4a1dd0db2  gcc/d/d-tree.def
! 695b1e7c5849dfe615e0b4f1706520c0  gcc/d/d-tree.h
! ac8b41005cbf2a7b5de89495104d9561  gcc/d/decl.cc
! 4a330cb9c9f0c38ccced280946873aa1  gcc/d/dmd/MERGE
  c65e8ed7b55dcb02725394bcde7c2da6  gcc/d/dmd/README.md
! d626781f165e41221200fce4c11b7ac8  gcc/d/dmd/VERSION
  fee1124c67987d66a0df1db139185575  gcc/d/dmd/access.d
  a168589ac70f62a374e6ab64288c6d01  gcc/d/dmd/aggregate.d
  37c6b3eaa80ad090aed4f88a25159f4a  gcc/d/dmd/aggregate.h
*************** afa67342ce21d3c5637b5c4c6a1c1ab5  gcc/d/
*** 5245,5251 ****
  e10a6d4cc21552d9c975f8152deae1d2  gcc/d/dmd/blockexit.d
  e4224ccaecb14d942c71d31bef20d78c  gcc/d/dmd/boostlicense.txt
  5857f43e9496e3122eaccea53e3cfbf4  gcc/d/dmd/builtin.d
! e805aaabad2ad8a5f29adf99ecdfc4fe  gcc/d/dmd/canthrow.d
  4ff85f3c50760b861a15844b465f0b64  gcc/d/dmd/chkformat.d
  f636875c767fb15992fd5e9b4112fb5c  gcc/d/dmd/clone.d
  45b88c639fb2c94835612227c0b7e6ee  gcc/d/dmd/common/README.md
--- 5246,5252 ----
  e10a6d4cc21552d9c975f8152deae1d2  gcc/d/dmd/blockexit.d
  e4224ccaecb14d942c71d31bef20d78c  gcc/d/dmd/boostlicense.txt
  5857f43e9496e3122eaccea53e3cfbf4  gcc/d/dmd/builtin.d
! 5c5b757212e7cfe644f756ea1811f2f1  gcc/d/dmd/canthrow.d
  4ff85f3c50760b861a15844b465f0b64  gcc/d/dmd/chkformat.d
  f636875c767fb15992fd5e9b4112fb5c  gcc/d/dmd/clone.d
  45b88c639fb2c94835612227c0b7e6ee  gcc/d/dmd/common/README.md
*************** f1e0c409377a80c2f093702c1a7b4196  gcc/d/
*** 5266,5277 ****
  14575700db973a2c2789dc9e19787fcb  gcc/d/dmd/ctorflow.d
  646d80b679dd70066b703c75926a2abc  gcc/d/dmd/dcast.d
  81f26a303e667916bd1626e604afcfad  gcc/d/dmd/dclass.d
! 7ff8b69d58592fc1ebbac97d3d09ffa3  gcc/d/dmd/declaration.d
  eb3208fff93f08cdeb37ff1e2b1a2812  gcc/d/dmd/declaration.h
  58d03f21c060c81890aaea88286b3aa0  gcc/d/dmd/delegatize.d
  d1554b47cf996a8a108a6b3451e052b2  gcc/d/dmd/denum.d
  5b4303a98042d0bc691c7227703d20d2  gcc/d/dmd/dimport.d
! 4aa21407b1725eccd282d1e08142e7b2  gcc/d/dmd/dinterpret.d
  59c569b838ce8dd176921d0caf7d219a  gcc/d/dmd/dmacro.d
  1892053eaeadfb7ce018a66c9f26dba3  gcc/d/dmd/dmangle.d
  0765c6c523b4dc8f1816676970466626  gcc/d/dmd/dmodule.d
--- 5267,5278 ----
  14575700db973a2c2789dc9e19787fcb  gcc/d/dmd/ctorflow.d
  646d80b679dd70066b703c75926a2abc  gcc/d/dmd/dcast.d
  81f26a303e667916bd1626e604afcfad  gcc/d/dmd/dclass.d
! 3b39ff578b554bf881cb963a29b35e87  gcc/d/dmd/declaration.d
  eb3208fff93f08cdeb37ff1e2b1a2812  gcc/d/dmd/declaration.h
  58d03f21c060c81890aaea88286b3aa0  gcc/d/dmd/delegatize.d
  d1554b47cf996a8a108a6b3451e052b2  gcc/d/dmd/denum.d
  5b4303a98042d0bc691c7227703d20d2  gcc/d/dmd/dimport.d
! 711d7b2cd203e62e7fb22720be832d0a  gcc/d/dmd/dinterpret.d
  59c569b838ce8dd176921d0caf7d219a  gcc/d/dmd/dmacro.d
  1892053eaeadfb7ce018a66c9f26dba3  gcc/d/dmd/dmangle.d
  0765c6c523b4dc8f1816676970466626  gcc/d/dmd/dmodule.d
*************** f2d33c239db71d4caa28de9031d1e93a  gcc/d/
*** 5281,5300 ****
  d9b0b9593df66b6f6004fe171df0a3b1  gcc/d/dmd/dstruct.d
  7f7e0bf02588f8e67112aca7940cbd93  gcc/d/dmd/dsymbol.d
  bdcd9fae9c9729e6d486bdcb77f7c156  gcc/d/dmd/dsymbol.h
! 0a7aa9ac0ed76c3e61ba91c2fb4cfdf8  gcc/d/dmd/dsymbolsem.d
  8a90f34c1247850bc1c9ec4d90e903a7  gcc/d/dmd/dtemplate.d
! 1e8160589bb012608ed581a010809c72  gcc/d/dmd/dtoh.d
  0ee0d7b932860ac1bec982ffa05479a5  gcc/d/dmd/dversion.d
  ecc4eb65f17c436f7acd52c25ffc3dc9  gcc/d/dmd/entity.d
  3b65e001bd0b54436775fc65eb906cf0  gcc/d/dmd/enum.h
  4590fc95a8da11567a3591472896a008  gcc/d/dmd/errors.d
  1447ec42d748faaec4c9dadc3321b31d  gcc/d/dmd/errors.h
! e1a7feabb436c350b7f8306e34c01940  gcc/d/dmd/escape.d
! f62c3acd764eaa2ae5acc91ad782d373  gcc/d/dmd/expression.d
  48cf81586f4dde3773ab84a856f3c6ca  gcc/d/dmd/expression.h
  ce78b01d572b78dd2d6e2732b8f6b270  gcc/d/dmd/expressionsem.d
  9f90ce55efd03f86135c7c3719d61d35  gcc/d/dmd/file_manager.d
! 5cb2f2865af80f962854e4ef9849ce03  gcc/d/dmd/foreachvar.d
  5be195d4bfa343996a770f0b1fa92918  gcc/d/dmd/func.d
  12614d5ffda1fa315ba0e7acc9c39307  gcc/d/dmd/globals.d
  b3e2894e834f08ad6cb7e8fa387c352b  gcc/d/dmd/globals.h
--- 5282,5301 ----
  d9b0b9593df66b6f6004fe171df0a3b1  gcc/d/dmd/dstruct.d
  7f7e0bf02588f8e67112aca7940cbd93  gcc/d/dmd/dsymbol.d
  bdcd9fae9c9729e6d486bdcb77f7c156  gcc/d/dmd/dsymbol.h
! 572861496553c793e53016cefcf6371c  gcc/d/dmd/dsymbolsem.d
  8a90f34c1247850bc1c9ec4d90e903a7  gcc/d/dmd/dtemplate.d
! 32b41d545845dc5518f1ab9da08b322e  gcc/d/dmd/dtoh.d
  0ee0d7b932860ac1bec982ffa05479a5  gcc/d/dmd/dversion.d
  ecc4eb65f17c436f7acd52c25ffc3dc9  gcc/d/dmd/entity.d
  3b65e001bd0b54436775fc65eb906cf0  gcc/d/dmd/enum.h
  4590fc95a8da11567a3591472896a008  gcc/d/dmd/errors.d
  1447ec42d748faaec4c9dadc3321b31d  gcc/d/dmd/errors.h
! 77b03726872d92f3c1a34ca4efda1c25  gcc/d/dmd/escape.d
! b906c0246e58ab332ec592e3dcb9acdd  gcc/d/dmd/expression.d
  48cf81586f4dde3773ab84a856f3c6ca  gcc/d/dmd/expression.h
  ce78b01d572b78dd2d6e2732b8f6b270  gcc/d/dmd/expressionsem.d
  9f90ce55efd03f86135c7c3719d61d35  gcc/d/dmd/file_manager.d
! 4ec90cfee44c20f89df2bb84fdfaa882  gcc/d/dmd/foreachvar.d
  5be195d4bfa343996a770f0b1fa92918  gcc/d/dmd/func.d
  12614d5ffda1fa315ba0e7acc9c39307  gcc/d/dmd/globals.d
  b3e2894e834f08ad6cb7e8fa387c352b  gcc/d/dmd/globals.h
*************** daf8c67ba126913faedb4942624557e1  gcc/d/
*** 5328,5334 ****
  0190cb41cd56a1d6b47b372a3300d4fa  gcc/d/dmd/nogc.d
  157597331e63d28616f902c9dd385d87  gcc/d/dmd/nspace.d
  a49dd74783ddad8520c6b0a54aab22d5  gcc/d/dmd/nspace.h
! ba8d8daad7b9e2ba7619e03cd03c83df  gcc/d/dmd/ob.d
  fc51651bb7603133b16545f0185022fe  gcc/d/dmd/objc.d
  a51ce6c75048c2a0524e08f79897480e  gcc/d/dmd/objc.h
  678b1b973c726e0fc52c81a86e2d5d1e  gcc/d/dmd/opover.d
--- 5329,5335 ----
  0190cb41cd56a1d6b47b372a3300d4fa  gcc/d/dmd/nogc.d
  157597331e63d28616f902c9dd385d87  gcc/d/dmd/nspace.d
  a49dd74783ddad8520c6b0a54aab22d5  gcc/d/dmd/nspace.h
! 37f95cdc7bbd2569001544d408175e26  gcc/d/dmd/ob.d
  fc51651bb7603133b16545f0185022fe  gcc/d/dmd/objc.d
  a51ce6c75048c2a0524e08f79897480e  gcc/d/dmd/objc.h
  678b1b973c726e0fc52c81a86e2d5d1e  gcc/d/dmd/opover.d
*************** bafd6f5434ca029e7f466818e8560bca  gcc/d/
*** 5371,5377 ****
  920d26625a87b03e320e957a2d32fb02  gcc/d/dmd/safe.d
  cca2ef3c5fa1e2a3e2c2c2e7c6c96887  gcc/d/dmd/sapply.d
  34a1d2b91ca0f8b2ff88915c36634f13  gcc/d/dmd/scope.h
! 6892ede044939ea73a39b7fff0157d8e  gcc/d/dmd/semantic2.d
  fe2d441e804cdf9df37423f32ca487cf  gcc/d/dmd/semantic3.d
  502044c590d3a887430453ad77720c17  gcc/d/dmd/sideeffect.d
  b548fae0283104002ad0a61611dcf0c4  gcc/d/dmd/statement.d
--- 5372,5378 ----
  920d26625a87b03e320e957a2d32fb02  gcc/d/dmd/safe.d
  cca2ef3c5fa1e2a3e2c2c2e7c6c96887  gcc/d/dmd/sapply.d
  34a1d2b91ca0f8b2ff88915c36634f13  gcc/d/dmd/scope.h
! df0800a814a14e69e3526f911e084dc5  gcc/d/dmd/semantic2.d
  fe2d441e804cdf9df37423f32ca487cf  gcc/d/dmd/semantic3.d
  502044c590d3a887430453ad77720c17  gcc/d/dmd/sideeffect.d
  b548fae0283104002ad0a61611dcf0c4  gcc/d/dmd/statement.d
*************** d5204f87064447609d6339627fdff5d1  gcc/d/
*** 5396,5415 ****
  484e2455ce6e8669895e099600f824a6  gcc/d/dmd/version.h
  ddc228ae57e81b4b8d64d30be36696ec  gcc/d/dmd/visitor.d
  64beecc207e7f501df4ed2c6baf7a398  gcc/d/dmd/visitor.h
! 2fec22071b3243a505600630fd41ad5f  gcc/d/expr.cc
  12f00f3f5da3f7bca99022b121c5668d  gcc/d/gdc.texi
! 584249eca0a3d7af3bca5c475d380236  gcc/d/imports.cc
! a64c38b4bc97f8d81f862fa9e5685e52  gcc/d/intrinsics.cc
  64c73cd509877a6967d709b72d528b40  gcc/d/intrinsics.def
  5f46cece4cf39b1190b559bd7a38e482  gcc/d/lang-specs.h
  47b0991b66e20e7fb6deb3b0c5d726d7  gcc/d/lang.opt
  2223a0b14c657c8628dde685ca2a7e21  gcc/d/longdouble.h
! a5df962eb5554bbd932b3da0dfb1059c  gcc/d/modules.cc
  ef51af63f3d28d970fa354b57e27e1c9  gcc/d/runtime.cc
  34cc9679fc05c8c104e0d7d566c0006c  gcc/d/runtime.def
  43727159ad9828140f390722e0b084d4  gcc/d/toir.cc
  7b7a6e2d7b41558f8d7be6e0028d1a48  gcc/d/typeinfo.cc
! ab7927f0c95ab476ff180d8f10ae0823  gcc/d/types.cc
  7190a15f37d4f7ff57e61d95811688ee  gcc/data-streamer-in.cc
  ed3faa827a6dda47ad1f234f5e7e0be5  gcc/data-streamer-out.cc
  a2b2afc07edacc88155bd02fbddc74a4  gcc/data-streamer.cc
--- 5397,5416 ----
  484e2455ce6e8669895e099600f824a6  gcc/d/dmd/version.h
  ddc228ae57e81b4b8d64d30be36696ec  gcc/d/dmd/visitor.d
  64beecc207e7f501df4ed2c6baf7a398  gcc/d/dmd/visitor.h
! 2f79baf188b752c8e89f529cb5a25be7  gcc/d/expr.cc
  12f00f3f5da3f7bca99022b121c5668d  gcc/d/gdc.texi
! 0b922a119416d9822c173c0d2497f62a  gcc/d/imports.cc
! 5a94ef82a61da2924e9bccb76de28992  gcc/d/intrinsics.cc
  64c73cd509877a6967d709b72d528b40  gcc/d/intrinsics.def
  5f46cece4cf39b1190b559bd7a38e482  gcc/d/lang-specs.h
  47b0991b66e20e7fb6deb3b0c5d726d7  gcc/d/lang.opt
  2223a0b14c657c8628dde685ca2a7e21  gcc/d/longdouble.h
! a735a5b49db5af4faa623bd327087b60  gcc/d/modules.cc
  ef51af63f3d28d970fa354b57e27e1c9  gcc/d/runtime.cc
  34cc9679fc05c8c104e0d7d566c0006c  gcc/d/runtime.def
  43727159ad9828140f390722e0b084d4  gcc/d/toir.cc
  7b7a6e2d7b41558f8d7be6e0028d1a48  gcc/d/typeinfo.cc
! 950e279f5dde292b4879685dd8c0f804  gcc/d/types.cc
  7190a15f37d4f7ff57e61d95811688ee  gcc/data-streamer-in.cc
  ed3faa827a6dda47ad1f234f5e7e0be5  gcc/data-streamer-out.cc
  a2b2afc07edacc88155bd02fbddc74a4  gcc/data-streamer.cc
*************** a3ceb8a0362a43c2fcd99cb29e1dfc64  gcc/di
*** 5449,5455 ****
  4abcebccda704b5459132b50c1a41479  gcc/digraph.cc
  9c15b06626075c48695b2978a224667a  gcc/digraph.h
  e7b417ac1005fe2d9d34413336db9ac0  gcc/doc/analyzer.texi
! aa1622a854139a4e3a9cff7d135929ba  gcc/doc/avr-mmcu.texi
  07ad7c31bc22a55f1cc8f82cdfbb2cb6  gcc/doc/bugreport.texi
  2e6791fec8df18e66c12b1a2078e8176  gcc/doc/cfg.texi
  a32d4b37e98def59fecbefe9651f80e2  gcc/doc/collect2.texi
--- 5450,5456 ----
  4abcebccda704b5459132b50c1a41479  gcc/digraph.cc
  9c15b06626075c48695b2978a224667a  gcc/digraph.h
  e7b417ac1005fe2d9d34413336db9ac0  gcc/doc/analyzer.texi
! 774e3d962e2e077d470c220972d4e649  gcc/doc/avr-mmcu.texi
  07ad7c31bc22a55f1cc8f82cdfbb2cb6  gcc/doc/bugreport.texi
  2e6791fec8df18e66c12b1a2078e8176  gcc/doc/cfg.texi
  a32d4b37e98def59fecbefe9651f80e2  gcc/doc/collect2.texi
*************** aa3b7596dd5b6f06217a90d7090a99b9  gcc/do
*** 5458,5495 ****
  fbce9ef3057c5f46171c7f3214e3bd9b  gcc/doc/configterms.texi
  eb2a47d945ad5f919fce2e58dff16598  gcc/doc/contrib.texi
  ebe9d4f914f26d51d300bb1949a5014b  gcc/doc/contribute.texi
! 43682477ed8978897d0f9154d30cc629  gcc/doc/cpp.1
! 04556560ddc748fd03471280199d1ae2  gcc/doc/cpp.info
  42df7076a2292d64e19b48fc9937d922  gcc/doc/cpp.texi
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*************** a2fcc43c6167952462815a241fa20c2d  gcc/do
*** 5500,5513 ****
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*************** d0f4114e702026befeabc3127bc54323  gcc/do
*** 5520,5526 ****
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--- 5521,5527 ----
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*************** f632a58265e8b78f0813590dda2827e9  gcc/du
*** 5546,5552 ****
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--- 5547,5553 ----
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*************** ba26be1a33461d149c9e3304d436ea94  gcc/fl
*** 5580,5588 ****
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--- 5581,5589 ----
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*************** d1595b2ed8fb2a33f6ce0dc595f4f33c  gcc/fo
*** 5605,5611 ****
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--- 5606,5612 ----
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*************** f2515ce2d4eea4ae49c7f087b70eeb2a  gcc/fo
*** 5619,5639 ****
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--- 5620,5640 ----
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*************** bd0ab91f17def7a653d5ff09c58bb9f4  gcc/fo
*** 5651,5678 ****
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--- 5652,5679 ----
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! fe71c67ee010a6eb5ea9a08226be4f30  gcc/fortran/simplify.cc
  4a7855d2420481b81f4ff31d48066f24  gcc/fortran/st.cc
! 78f4d0d8c194b7b730dee61dc940ff25  gcc/fortran/symbol.cc
  c6d5b41165a24519b1877dafd17780c7  gcc/fortran/target-memory.cc
  d58dc979add87c7e22ecf3fe8ea7d636  gcc/fortran/target-memory.h
! 1304a933c0072eda346bf1ebef5dc9b6  gcc/fortran/trans-array.cc
  699968d0496851dd2f7c7cc5566f73f2  gcc/fortran/trans-array.h
  451f5b83f594fdd9a854e00dbc66fd9b  gcc/fortran/trans-common.cc
  60dfb80d5ab4bb8f574d40380456a8ef  gcc/fortran/trans-const.cc
  7468f5a70b780bf92036ea75d5312bd4  gcc/fortran/trans-const.h
  ce37a7099768c06117e736b50fbc8005  gcc/fortran/trans-decl.cc
! 62d392ee7355339ae3ad756dbcea4882  gcc/fortran/trans-expr.cc
! 408605a1145b1a8bb8b94b3ba47e9a54  gcc/fortran/trans-intrinsic.cc
  85141448817f23e9ee692c3b7b763c75  gcc/fortran/trans-io.cc
  59236c5b820b6ffc26470283bc0e6db6  gcc/fortran/trans-openmp.cc
  ee76646a8bbb271f793e1e8867f57d71  gcc/fortran/trans-stmt.cc
*************** e407ce5e464ee5640a9730448c53532b  gcc/fo
*** 5689,5695 ****
  4e2f34bb1401e871b7cca9babb99ec3e  gcc/function-tests.cc
  2a4309239adfb0f59d7062cddae8a372  gcc/function.cc
  691a265913d36a47e60accc3677bb50c  gcc/function.h
! 4cc6ef071dbb01f6c1e057a1f76f44f0  gcc/fwprop.cc
  254a48c75187b7e47b94abf826e16c94  gcc/gcc-ar.cc
  c21ee37cecaf1b25e3bd8de9fb19e968  gcc/gcc-main.cc
  43e771c4505a7e453452149b727fb8e8  gcc/gcc-plugin.h
--- 5690,5696 ----
  4e2f34bb1401e871b7cca9babb99ec3e  gcc/function-tests.cc
  2a4309239adfb0f59d7062cddae8a372  gcc/function.cc
  691a265913d36a47e60accc3677bb50c  gcc/function.h
! 191568f8ff996f25b093ee138a7a5590  gcc/fwprop.cc
  254a48c75187b7e47b94abf826e16c94  gcc/gcc-ar.cc
  c21ee37cecaf1b25e3bd8de9fb19e968  gcc/gcc-main.cc
  43e771c4505a7e453452149b727fb8e8  gcc/gcc-plugin.h
*************** a9a669f4d283200c8f2bc4d9f5d3e071  gcc/ge
*** 5725,5743 ****
  92d112d338c65b76ab1fee6469ef43d0  gcc/genconstants.cc
  908326f62403d92576d19a6d60a5c16c  gcc/genemit.cc
  805dc8119200b4c7094d9cf17cce3b93  gcc/genenums.cc
! 5e524560c542ee66355126a3b50ce674  gcc/generic-match-head.cc
  b061e1a9c4a98dd20f874b7c8b25e7d6  gcc/generic-match.h
  f750f2d25d09cf621bc33d71e2d4257a  gcc/genextract.cc
  1afb6dee14dd76199f347ef290ebb806  gcc/genflags.cc
  e57a4ee7a3efa6f9879d9401732ce8e9  gcc/gengenrtl.cc
! 3a80f2fffb9914a02b5cf504740ae28a  gcc/gengtype-lex.cc
  dccb6b651cc3b08a9d91dc473d2c5c56  gcc/gengtype-lex.l
  eb4d9740e017bdc5f85328a53d2d1727  gcc/gengtype-parse.cc
  50a65f1126e7a18b74cea77bdd779e98  gcc/gengtype-state.cc
  f478a818c2202fa1a9c5eeeb9e716b7b  gcc/gengtype.cc
  0ba34863951c3fb241ac4a955bddc0a5  gcc/gengtype.h
  f24c75731c311961c21c8e8305435b00  gcc/genhooks.cc
! c19fcebae36d8ebfbff472b352747435  gcc/genmatch.cc
  2cf04cf8cf3ed9bfee20f1dec10e924f  gcc/genmddeps.cc
  7a9894fd2f41e06b7a03e40b67376964  gcc/genmddump.cc
  c4a535228e71fdb6c6526d7cdc6e93be  gcc/genmodes.cc
--- 5726,5744 ----
  92d112d338c65b76ab1fee6469ef43d0  gcc/genconstants.cc
  908326f62403d92576d19a6d60a5c16c  gcc/genemit.cc
  805dc8119200b4c7094d9cf17cce3b93  gcc/genenums.cc
! df3c2a4905a6e7da9d5630f27c31ba54  gcc/generic-match-head.cc
  b061e1a9c4a98dd20f874b7c8b25e7d6  gcc/generic-match.h
  f750f2d25d09cf621bc33d71e2d4257a  gcc/genextract.cc
  1afb6dee14dd76199f347ef290ebb806  gcc/genflags.cc
  e57a4ee7a3efa6f9879d9401732ce8e9  gcc/gengenrtl.cc
! ee15c27c589e29ab4bc2c1e441a22453  gcc/gengtype-lex.cc
  dccb6b651cc3b08a9d91dc473d2c5c56  gcc/gengtype-lex.l
  eb4d9740e017bdc5f85328a53d2d1727  gcc/gengtype-parse.cc
  50a65f1126e7a18b74cea77bdd779e98  gcc/gengtype-state.cc
  f478a818c2202fa1a9c5eeeb9e716b7b  gcc/gengtype.cc
  0ba34863951c3fb241ac4a955bddc0a5  gcc/gengtype.h
  f24c75731c311961c21c8e8305435b00  gcc/genhooks.cc
! ed95812909e6f029f32c749809855674  gcc/genmatch.cc
  2cf04cf8cf3ed9bfee20f1dec10e924f  gcc/genmddeps.cc
  7a9894fd2f41e06b7a03e40b67376964  gcc/genmddump.cc
  c4a535228e71fdb6c6526d7cdc6e93be  gcc/genmodes.cc
*************** b2a4b31d65ce0513e1b55b3cc0fb9562  gcc/ge
*** 5751,5757 ****
  e85779601c137dcdd709c761e1f9f81c  gcc/gensupport.h
  746501b7bdfad06b392960c121e24b85  gcc/gentarget-def.cc
  8225a557753a2ad91f93ca46a0650179  gcc/genversion.cc
! 9fe719a18729c28d50a65a218b84be60  gcc/ggc-common.cc
  2554173627e7abbcf9b350008d28ed3d  gcc/ggc-internal.h
  92993def7552bd1f56210bccd8199b5e  gcc/ggc-none.cc
  ae5ff28b8e5857f2e89a7a499c0cb706  gcc/ggc-page.cc
--- 5752,5758 ----
  e85779601c137dcdd709c761e1f9f81c  gcc/gensupport.h
  746501b7bdfad06b392960c121e24b85  gcc/gentarget-def.cc
  8225a557753a2ad91f93ca46a0650179  gcc/genversion.cc
! 6287d2885fac3431e9876823da470631  gcc/ggc-common.cc
  2554173627e7abbcf9b350008d28ed3d  gcc/ggc-internal.h
  92993def7552bd1f56210bccd8199b5e  gcc/ggc-none.cc
  ae5ff28b8e5857f2e89a7a499c0cb706  gcc/ggc-page.cc
*************** c09c9c82904f715ce24dbb5f5e7ae143  gcc/gi
*** 5763,5769 ****
  71288f9828f96bb6d528314ca5d455fd  gcc/gimple-builder.h
  f50e26d784233d2ffe55ee17bc3ac46a  gcc/gimple-expr.cc
  d1de4fb8ce13938f7c3dd22dd3afe622  gcc/gimple-expr.h
! 59c242c3a7847e41cb5aca4bb0cacfe2  gcc/gimple-fold.cc
  759408e1e968762ac2845df7ae6efa73  gcc/gimple-fold.h
  8350312718333859d5f584a2792e3c00  gcc/gimple-harden-conditionals.cc
  5397f4236c244ea6e396da577b07cb75  gcc/gimple-if-to-switch.cc
--- 5764,5770 ----
  71288f9828f96bb6d528314ca5d455fd  gcc/gimple-builder.h
  f50e26d784233d2ffe55ee17bc3ac46a  gcc/gimple-expr.cc
  d1de4fb8ce13938f7c3dd22dd3afe622  gcc/gimple-expr.h
! 24e48b82778727622ebae55cb3ebae09  gcc/gimple-fold.cc
  759408e1e968762ac2845df7ae6efa73  gcc/gimple-fold.h
  8350312718333859d5f584a2792e3c00  gcc/gimple-harden-conditionals.cc
  5397f4236c244ea6e396da577b07cb75  gcc/gimple-if-to-switch.cc
*************** ea6739e1baae6fef631091cd341aeb7a  gcc/gi
*** 5776,5795 ****
  f5fb978108285be3c589c1080dbbad96  gcc/gimple-loop-versioning.cc
  14024b204b227ade2750e2161a5c3082  gcc/gimple-low.cc
  e5fb54e1c9ffbbb7c5e6cff5991f2104  gcc/gimple-low.h
! 1607a52f6c468949efc067de9ae1f173  gcc/gimple-match-head.cc
  72fb6758017af5de87e230d25359555b  gcc/gimple-match.h
  8d43733f6347e3670a9aef1e2d7419ee  gcc/gimple-predicate-analysis.cc
  7eb33d03e7b1e6b6327f7cb427da050e  gcc/gimple-predicate-analysis.h
  4cb1a344328d9b4fc0c4735add3da4a4  gcc/gimple-predict.h
  3c38ca4d1ec0bfb067a868c99d216cd0  gcc/gimple-pretty-print.cc
  3efe916bb7c15be5080b13dbaee9c3b0  gcc/gimple-pretty-print.h
! 60e7e4a38c58fb84ea4cf7e8322c294f  gcc/gimple-range-cache.cc
  34423785bbebf48c5894527a2d85dfa3  gcc/gimple-range-cache.h
  de819abc38e5513404e31ba8147f6719  gcc/gimple-range-edge.cc
  ff7214e2064e1c914da68bbc5c59ac6d  gcc/gimple-range-edge.h
  4b6d81555c2fd93dce4352b2756cacec  gcc/gimple-range-fold.cc
  a25f3a6963c602d111eb631ee4444cf9  gcc/gimple-range-fold.h
! 907091739ab8a7df723e8daa1e7a22b3  gcc/gimple-range-gori.cc
  5fe5f05a236de0492006918bee486f98  gcc/gimple-range-gori.h
  c07084f0a48eb3917f54d93973b563a6  gcc/gimple-range-path.cc
  5f9c5bca0ea21cd23f44f6fbea308f4d  gcc/gimple-range-path.h
--- 5777,5796 ----
  f5fb978108285be3c589c1080dbbad96  gcc/gimple-loop-versioning.cc
  14024b204b227ade2750e2161a5c3082  gcc/gimple-low.cc
  e5fb54e1c9ffbbb7c5e6cff5991f2104  gcc/gimple-low.h
! 66e4c9653e0abbc7db3b65422a8738b4  gcc/gimple-match-head.cc
  72fb6758017af5de87e230d25359555b  gcc/gimple-match.h
  8d43733f6347e3670a9aef1e2d7419ee  gcc/gimple-predicate-analysis.cc
  7eb33d03e7b1e6b6327f7cb427da050e  gcc/gimple-predicate-analysis.h
  4cb1a344328d9b4fc0c4735add3da4a4  gcc/gimple-predict.h
  3c38ca4d1ec0bfb067a868c99d216cd0  gcc/gimple-pretty-print.cc
  3efe916bb7c15be5080b13dbaee9c3b0  gcc/gimple-pretty-print.h
! 9c9dc21d5e0a5467580381c4f3e88246  gcc/gimple-range-cache.cc
  34423785bbebf48c5894527a2d85dfa3  gcc/gimple-range-cache.h
  de819abc38e5513404e31ba8147f6719  gcc/gimple-range-edge.cc
  ff7214e2064e1c914da68bbc5c59ac6d  gcc/gimple-range-edge.h
  4b6d81555c2fd93dce4352b2756cacec  gcc/gimple-range-fold.cc
  a25f3a6963c602d111eb631ee4444cf9  gcc/gimple-range-fold.h
! 8b6022b06c538f079a01524fc7ba745a  gcc/gimple-range-gori.cc
  5fe5f05a236de0492006918bee486f98  gcc/gimple-range-gori.h
  c07084f0a48eb3917f54d93973b563a6  gcc/gimple-range-path.cc
  5f9c5bca0ea21cd23f44f6fbea308f4d  gcc/gimple-range-path.h
*************** f0756e5b5cf48a95b7e157d22e9faeda  gcc/gi
*** 5798,5814 ****
  ae1d2577cae83e6acea7dc5239c033f3  gcc/gimple-range-trace.h
  59b9f2f75e5de30ecfda93bde785915a  gcc/gimple-range.cc
  79c8ed03d56c9a2f09f77ece8c2838bc  gcc/gimple-range.h
! f4eef9979afe1a62a26aab899f31fd5e  gcc/gimple-ssa-backprop.cc
  3a9acfb81d934871fc78a536f2df929c  gcc/gimple-ssa-evrp-analyze.cc
  a2e47746135af17dac3a1f31d5ec570b  gcc/gimple-ssa-evrp-analyze.h
  7b4c1e8f532bae009a7eee5a9914f4e0  gcc/gimple-ssa-evrp.cc
  1b1d4df650a10ddd70ed93d3ff96663c  gcc/gimple-ssa-isolate-paths.cc
  6881154cb788d83ed5d3a6faa40e8491  gcc/gimple-ssa-nonnull-compare.cc
  8e1e93b40c3c71852038f4e15cc0ea0e  gcc/gimple-ssa-split-paths.cc
! 5d75a7da22682142863c4cbee7017838  gcc/gimple-ssa-sprintf.cc
! 676176f6f9694eca12e6351f1988c5db  gcc/gimple-ssa-store-merging.cc
  ca63b943de7942e5678ba99a1ddd3285  gcc/gimple-ssa-strength-reduction.cc
! 3b78e30f73dfc0ca11b0bbdf4ccf987e  gcc/gimple-ssa-warn-access.cc
  7064ea947fe572efdcb48307a73cc457  gcc/gimple-ssa-warn-access.h
  760b69c7948cbd7e7ee6a848c204e287  gcc/gimple-ssa-warn-alloca.cc
  1bc2d755960e18e2591f149a5eb08cfc  gcc/gimple-ssa-warn-restrict.cc
--- 5799,5815 ----
  ae1d2577cae83e6acea7dc5239c033f3  gcc/gimple-range-trace.h
  59b9f2f75e5de30ecfda93bde785915a  gcc/gimple-range.cc
  79c8ed03d56c9a2f09f77ece8c2838bc  gcc/gimple-range.h
! 224993fb57f0387f4a6a3eb261687a41  gcc/gimple-ssa-backprop.cc
  3a9acfb81d934871fc78a536f2df929c  gcc/gimple-ssa-evrp-analyze.cc
  a2e47746135af17dac3a1f31d5ec570b  gcc/gimple-ssa-evrp-analyze.h
  7b4c1e8f532bae009a7eee5a9914f4e0  gcc/gimple-ssa-evrp.cc
  1b1d4df650a10ddd70ed93d3ff96663c  gcc/gimple-ssa-isolate-paths.cc
  6881154cb788d83ed5d3a6faa40e8491  gcc/gimple-ssa-nonnull-compare.cc
  8e1e93b40c3c71852038f4e15cc0ea0e  gcc/gimple-ssa-split-paths.cc
! 4f7e23705d457e93b29edca5a1da0961  gcc/gimple-ssa-sprintf.cc
! 62346616dd003a655894e57f5b102985  gcc/gimple-ssa-store-merging.cc
  ca63b943de7942e5678ba99a1ddd3285  gcc/gimple-ssa-strength-reduction.cc
! 4c37768065cd62ce8453e3c4678efa08  gcc/gimple-ssa-warn-access.cc
  7064ea947fe572efdcb48307a73cc457  gcc/gimple-ssa-warn-access.h
  760b69c7948cbd7e7ee6a848c204e287  gcc/gimple-ssa-warn-alloca.cc
  1bc2d755960e18e2591f149a5eb08cfc  gcc/gimple-ssa-warn-restrict.cc
*************** cedfeeeb6a89b08187da0a55778ff05c  gcc/gi
*** 5825,5831 ****
  b1f2597055332f7a009df2374360eee2  gcc/gimple.h
  1a79444af2bcf0c019b20c37cb346635  gcc/gimplify-me.cc
  489260dcd67a90caca7adf7b361f9078  gcc/gimplify-me.h
! 72f1b9b98a93f98c03df6f0f3b1c2299  gcc/gimplify.cc
  acbd4cf19da012507fa6f90cc988cc15  gcc/gimplify.h
  4b707ba8acc84c0c2c69cd7d11b0b878  gcc/ginclude/float.h
  5e92ed0886d68a4cce339044cf03cd57  gcc/ginclude/iso646.h
--- 5826,5832 ----
  b1f2597055332f7a009df2374360eee2  gcc/gimple.h
  1a79444af2bcf0c019b20c37cb346635  gcc/gimplify-me.cc
  489260dcd67a90caca7adf7b361f9078  gcc/gimplify-me.h
! 98f389d1036f8f326636c7afcfe3b5b4  gcc/gimplify.cc
  acbd4cf19da012507fa6f90cc988cc15  gcc/gimplify.h
  4b707ba8acc84c0c2c69cd7d11b0b878  gcc/ginclude/float.h
  5e92ed0886d68a4cce339044cf03cd57  gcc/ginclude/iso646.h
*************** d6e38b1f29ed7cbf094498b65058bc0c  gcc/gi
*** 5842,5858 ****
  35c8e63b0bb041362d4e62e0722a0f12  gcc/ginclude/unwind-arm-common.h
  8d9ecf0d6ef93c79623ce1d27a32a2cb  gcc/ginclude/varargs.h
  90ab079b9764cd0047ebb8e51e5950d5  gcc/glimits.h
! be385b49e3421fb12a485309787257c4  gcc/go/ChangeLog
  1e8d98252d6f5b7d8428ae93446ae0c1  gcc/go/Make-lang.in
  60ea054548c83c7f66170073f9f3e74c  gcc/go/README.gcc
  d9ae6df7a9c50076ec6b5e564516ca11  gcc/go/config-lang.in
  6de103fbcaf3ede09e154b4507410fad  gcc/go/gccgo.texi
! abb8870216b1dcb46678a28424efe8e5  gcc/go/go-backend.cc
  d5f87e40815add17cf3d7b44e1f1e16c  gcc/go/go-c.h
  c8ae93841aa60c948162af93a875a63b  gcc/go/go-gcc-diagnostics.cc
  03db2c35a39e03c8ab1f72e866ecd76c  gcc/go/go-gcc.cc
  3331ac40c70c2495e29194d7a6ce2149  gcc/go/go-gcc.h
! c218daa2fbe96a9f0c4b05d8fbb89a77  gcc/go/go-lang.cc
  c5d6aaa7e913ef205113a2bba2e5206f  gcc/go/go-linemap.cc
  91c7a6773e207cc086ae0888826cc3c4  gcc/go/go-location.h
  e7ac1a933b9be9177f17122bbdaf7f15  gcc/go/go-sha1.cc
--- 5843,5859 ----
  35c8e63b0bb041362d4e62e0722a0f12  gcc/ginclude/unwind-arm-common.h
  8d9ecf0d6ef93c79623ce1d27a32a2cb  gcc/ginclude/varargs.h
  90ab079b9764cd0047ebb8e51e5950d5  gcc/glimits.h
! d3bc06b5f718cf0981b6490487d5b14d  gcc/go/ChangeLog
  1e8d98252d6f5b7d8428ae93446ae0c1  gcc/go/Make-lang.in
  60ea054548c83c7f66170073f9f3e74c  gcc/go/README.gcc
  d9ae6df7a9c50076ec6b5e564516ca11  gcc/go/config-lang.in
  6de103fbcaf3ede09e154b4507410fad  gcc/go/gccgo.texi
! cb9d9f43ce55d21e9dc7362fc69e0ed3  gcc/go/go-backend.cc
  d5f87e40815add17cf3d7b44e1f1e16c  gcc/go/go-c.h
  c8ae93841aa60c948162af93a875a63b  gcc/go/go-gcc-diagnostics.cc
  03db2c35a39e03c8ab1f72e866ecd76c  gcc/go/go-gcc.cc
  3331ac40c70c2495e29194d7a6ce2149  gcc/go/go-gcc.h
! 9751850b73cf46daf9b3a75e84f7cbfd  gcc/go/go-lang.cc
  c5d6aaa7e913ef205113a2bba2e5206f  gcc/go/go-linemap.cc
  91c7a6773e207cc086ae0888826cc3c4  gcc/go/go-location.h
  e7ac1a933b9be9177f17122bbdaf7f15  gcc/go/go-sha1.cc
*************** f4698d5111935f1c789b7efd8ed91a74  gcc/go
*** 5869,5875 ****
  ee8753eb1d8ca2fa168f6a71d3991455  gcc/go/gofrontend/escape.h
  dccb73c4ca0b41d94f8c32f09722e264  gcc/go/gofrontend/export.cc
  c10142760925e22c72c7072c9c214bf8  gcc/go/gofrontend/export.h
! d21670515fe23df2b0c0f939571e07a3  gcc/go/gofrontend/expressions.cc
  c5b86a2accffe77a96df85021bd57878  gcc/go/gofrontend/expressions.h
  bf7f8a519eadaa90804fe15cfa37ba6f  gcc/go/gofrontend/go-diagnostics.cc
  accfd5ea41ee789e6adbaec31a228cfe  gcc/go/gofrontend/go-diagnostics.h
--- 5870,5876 ----
  ee8753eb1d8ca2fa168f6a71d3991455  gcc/go/gofrontend/escape.h
  dccb73c4ca0b41d94f8c32f09722e264  gcc/go/gofrontend/export.cc
  c10142760925e22c72c7072c9c214bf8  gcc/go/gofrontend/export.h
! ea7c5482d2703c7ac9ed297bca5a31c4  gcc/go/gofrontend/expressions.cc
  c5b86a2accffe77a96df85021bd57878  gcc/go/gofrontend/expressions.h
  bf7f8a519eadaa90804fe15cfa37ba6f  gcc/go/gofrontend/go-diagnostics.cc
  accfd5ea41ee789e6adbaec31a228cfe  gcc/go/gofrontend/go-diagnostics.h
*************** c08c0bc386a3e50faacf99daf94c080f  gcc/go
*** 5882,5888 ****
  ead5ac25b7b99d361225e0fd940e286a  gcc/go/gofrontend/go-optimize.h
  5b59619fab7e543c5bb28dd8a6d62793  gcc/go/gofrontend/go-sha1.h
  8d64d49cf01e7d7605f32b644d82c7e1  gcc/go/gofrontend/go.cc
! d0c206bbee40862a4251351a8a3194ea  gcc/go/gofrontend/gogo.cc
  7225312726c1a007ca4244c66fe8157d  gcc/go/gofrontend/gogo.h
  f9015ccccf7764d4c6eeae1bd5e01c7f  gcc/go/gofrontend/import-archive.cc
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--- 5883,5889 ----
  ead5ac25b7b99d361225e0fd940e286a  gcc/go/gofrontend/go-optimize.h
  5b59619fab7e543c5bb28dd8a6d62793  gcc/go/gofrontend/go-sha1.h
  8d64d49cf01e7d7605f32b644d82c7e1  gcc/go/gofrontend/go.cc
! 603fec8e98ed276a532a40cf1fbde5c7  gcc/go/gofrontend/gogo.cc
  7225312726c1a007ca4244c66fe8157d  gcc/go/gofrontend/gogo.h
  f9015ccccf7764d4c6eeae1bd5e01c7f  gcc/go/gofrontend/import-archive.cc
  69248b78bc1185657dbc63be6016ac45  gcc/go/gofrontend/import.cc
*************** acf3629698886d7731465289650fbbae  gcc/in
*** 5958,5977 ****
  4c297622fd65667c55ca02af467839b5  gcc/insn-addr.h
  5709259b06b655ea8191ac2302e2d9b7  gcc/insn-notes.def
  2e02df0276f8a31361cab997f6a982d5  gcc/int-vector-builder.h
! d8b816ce0804ccf49972f9737caa47c8  gcc/internal-fn.cc
  d7430b67aefa3403a2207e43265581a4  gcc/internal-fn.def
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  af937d6371bfc6dae1126fa3b845a40d  gcc/ipa-comdats.cc
! b48887a0fbd129d74e78a91b4117d61e  gcc/ipa-cp.cc
  c902d1e07ec7e9d3fc10e9ad37aa9a67  gcc/ipa-devirt.cc
  b8faf7652ab73348eb8dfd2b188a5d56  gcc/ipa-fnsummary.cc
  634795391b1718599123e8f6f5dd1068  gcc/ipa-fnsummary.h
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! 8549067301085950d4377b2f3edf87a0  gcc/ipa-icf-gimple.cc
  ac03bc194f37ee5eb93086c446e09d46  gcc/ipa-icf-gimple.h
! ee2caeb2b5a661cb2b3320d1ed0f0ffc  gcc/ipa-icf.cc
  160f6907201241c29aa0aba8c773fb7d  gcc/ipa-icf.h
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  3691be748be0839f168ca434883e3578  gcc/ipa-inline-transform.cc
--- 5959,5978 ----
  4c297622fd65667c55ca02af467839b5  gcc/insn-addr.h
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  2e02df0276f8a31361cab997f6a982d5  gcc/int-vector-builder.h
! be2bc42ea7c35f22638ea77f739cf2c2  gcc/internal-fn.cc
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  fdcce39ba434215ff2ed425e037af50e  gcc/intl.h
  af937d6371bfc6dae1126fa3b845a40d  gcc/ipa-comdats.cc
! 1fe4e2c00fb6b7385df67480e33d0fc6  gcc/ipa-cp.cc
  c902d1e07ec7e9d3fc10e9ad37aa9a67  gcc/ipa-devirt.cc
  b8faf7652ab73348eb8dfd2b188a5d56  gcc/ipa-fnsummary.cc
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! 1461ba766c8866ca428487c7aa48d5cd  gcc/ipa-icf-gimple.cc
  ac03bc194f37ee5eb93086c446e09d46  gcc/ipa-icf-gimple.h
! 0ce567e80b74cab5db05bbd7c890c3b8  gcc/ipa-icf.cc
  160f6907201241c29aa0aba8c773fb7d  gcc/ipa-icf.h
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  3691be748be0839f168ca434883e3578  gcc/ipa-inline-transform.cc
*************** df25330f62b3dfe116e3d208d97382c0  gcc/ip
*** 5981,5994 ****
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! d31cf24ad65cb55bd058bbf61fcb7bfc  gcc/ipa-param-manipulation.cc
! e01722139c46d541a8e92df69558f7b8  gcc/ipa-param-manipulation.h
  1a2032e460d88a8d7a36ee255cd5def4  gcc/ipa-polymorphic-call.cc
  8e4ffa832ff8be986741e4db4fb7a14d  gcc/ipa-predicate.cc
  8ea80a7dfb62d31f755b1bab47536cfb  gcc/ipa-predicate.h
  186ed06995655200325c448906fd4688  gcc/ipa-profile.cc
! 12c5ee2cf23cb6ad3f281ea2da0d236a  gcc/ipa-prop.cc
! 1fb858c281241d36ef6f35f0d86dff28  gcc/ipa-prop.h
  e4663294020d7a5d918996dbcaacdb0d  gcc/ipa-pure-const.cc
  57bca18eaf2476064d1e04fcdcff555b  gcc/ipa-ref.cc
  2704b79d11adc7a154b9c72ea85288ec  gcc/ipa-ref.h
--- 5982,5995 ----
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! a3ac337da07de091ab3c184819c1c37e  gcc/ipa-param-manipulation.cc
! 1642ce52f56ac97998826713b05f7f8e  gcc/ipa-param-manipulation.h
  1a2032e460d88a8d7a36ee255cd5def4  gcc/ipa-polymorphic-call.cc
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  8ea80a7dfb62d31f755b1bab47536cfb  gcc/ipa-predicate.h
  186ed06995655200325c448906fd4688  gcc/ipa-profile.cc
! 91026c5b205f54cc0d1bf952ef64a75c  gcc/ipa-prop.cc
! 13a31f6e6202f187029df90f9cb2412d  gcc/ipa-prop.h
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  57bca18eaf2476064d1e04fcdcff555b  gcc/ipa-ref.cc
  2704b79d11adc7a154b9c72ea85288ec  gcc/ipa-ref.h
*************** dd51496e4c7b4c7a7fab6af86cc145d1  gcc/ir
*** 6011,6019 ****
  16270966db2614c9182968e8d3013de9  gcc/ira.h
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! bc3ec6237965d6c61f4353800637fa15  gcc/jit/ChangeLog
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  df53fb6b84c435b56ac2cb2727b62b27  gcc/jit/docs/Makefile
--- 6012,6020 ----
  16270966db2614c9182968e8d3013de9  gcc/ira.h
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! 52a1123b376040445504ce4a1d7363f9  gcc/jit/ChangeLog
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*************** cc545497c12300f9ef4ef17d957c4ffe  gcc/ji
*** 6095,6100 ****
--- 6096,6102 ----
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  a683bef6f6721b574c76acc1efb5050c  gcc/jit/notes.txt
*************** e5932fb927bbb4bfb85cb5d33ffd6417  gcc/lo
*** 6121,6133 ****
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! 5c9e4539deefe9a5b8c5a1f4bd61935d  gcc/lra-constraints.cc
! 27b30505478beaf07d23cdc19a5c2d06  gcc/lra-eliminations.cc
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  cfd5ab112698229bbb833f8a805d27ef  gcc/lra-lives.cc
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! 3651205587b5293818168470115ab539  gcc/lra.cc
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  5f9713f5327a766eda14c98080a2f793  gcc/lto-compress.cc
--- 6123,6135 ----
  d5ac5a89e073a7e5b33668071523cef0  gcc/lower-subreg.h
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! 8af016f653ef309d269a40b20c238258  gcc/lra.cc
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  5f9713f5327a766eda14c98080a2f793  gcc/lto-compress.cc
*************** daebc1236d16034267b252a3005afafe  gcc/lt
*** 6140,6147 ****
  45cf33f2a79f186280384b15b18641e0  gcc/lto-streamer-out.cc
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! 7a6bfb500235850012a795905f6a4b12  gcc/lto/ChangeLog
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--- 6142,6149 ----
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*************** dff2331e5edc5d66c07f2ba05c20a9c5  gcc/lt
*** 6163,6169 ****
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! 7c921a5376b9de0eace11b382fa29075  gcc/match.pd
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--- 6165,6171 ----
  704dbc3758376f5f1a822ef60e3ab455  gcc/machmode.def
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! 2c6b2210ec6773c7af2f4660c1d13625  gcc/match.pd
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*************** b95605bc52a4f8d760769e6d26d195e4  gcc/mk
*** 6176,6186 ****
  6b3daff0bb8e0990085d41fecb74b358  gcc/modulo-sched.cc
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! e2a9306bf38a36b0e6eea1c4ff33a749  gcc/objc/ChangeLog
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! 18a697734ecb13a1a12c866eca740486  gcc/objc/objc-act.cc
  1289a7740d247d5b27c9c968e8cd35a3  gcc/objc/objc-act.h
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--- 6178,6188 ----
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  1b8a6511f7b276a98264e2efaa13d10c  gcc/objc/objc-encoding.cc
  af186e2684d2aff9faa352ea1cff213e  gcc/objc/objc-encoding.h
*************** b22836839e7030071d74a1f688b18c03  gcc/ob
*** 6190,6201 ****
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! 0b1d7e857ce9a5805b4ead292b2f2e49  gcc/objc/objc-next-runtime-abi-02.cc
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! d5208088eb44cde2354166919108e041  gcc/objc/objc-runtime-shared-support.cc
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! ce59d5aee228b2b06d511069f0d007bb  gcc/objcp/ChangeLog
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--- 6192,6203 ----
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! c65941ba78e6c8d97e439f0a5925e890  gcc/objc/objc-next-runtime-abi-02.cc
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! a6c59fc462145bd7473f0dd7bd905b86  gcc/objc/objc-runtime-shared-support.cc
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! 409dd24dbdb349813475767c30ce2d3f  gcc/objcp/ChangeLog
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*************** d2c6fc9e746263d862668f94a7312032  gcc/ob
*** 6204,6210 ****
  1d57186920863b45e407890ff8e0a2bc  gcc/objcp/objcp-lang.cc
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! 5ab951d3abb6c7512dd2f5407f3b902e  gcc/omp-expand.cc
  d2882be1e5e0c8bcb94e40249892eda8  gcc/omp-expand.h
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--- 6206,6212 ----
  1d57186920863b45e407890ff8e0a2bc  gcc/objcp/objcp-lang.cc
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! 9653022d4fd1e6e80dd6dfa641969c51  gcc/omp-expand.cc
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*************** ca27fff752bb2bf3547470865f677089  gcc/pa
*** 6256,6262 ****
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! 54547e71f939841d615f33e61761654c  gcc/po/ChangeLog
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--- 6258,6264 ----
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*************** de01fe47e5757d0b334b5a7bec2027fb  gcc/pr
*** 6320,6326 ****
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--- 6322,6328 ----
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*************** c88b1a148e33f6b40896031ef906b6c5  gcc/rt
*** 6359,6365 ****
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--- 6361,6367 ----
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*************** aba021400841b2455680b33c4ae146d7  gcc/rt
*** 6378,6385 ****
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--- 6380,6387 ----
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*************** d52426f1c62c0c37089feeaada3b4d81  gcc/sy
*** 6451,6459 ****
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--- 6453,6461 ----
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*************** bdb7861240a719686c5923e70bd8347a  gcc/ta
*** 6464,6470 ****
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--- 6466,6472 ----
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*************** ad210b6699449d7c2f1c95f9c363d606  gcc/te
*** 9114,9119 ****
--- 9116,9122 ----
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*************** d38712ca0af7a9dc1180236b496d6f9f  gcc/te
*** 10714,10720 ****
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--- 10717,10723 ----
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*************** e35caecbc64e5306c5790ce0f003eff6  gcc/te
*** 10926,10931 ****
--- 10929,10935 ----
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*************** f5c3f8c802beee48f514efd82c71f586  gcc/te
*** 11048,11053 ****
--- 11052,11058 ----
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*************** ca578f19b2d380be0549cc9c2f904f2e  gcc/te
*** 12046,12051 ****
--- 12051,12058 ----
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*************** acdc66e4d80b02a42a452d3b516a42b6  gcc/te
*** 13573,13578 ****
--- 13580,13587 ----
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*************** eb8899f6095da627d668fbc099e59316  gcc/te
*** 13611,13616 ****
--- 13620,13626 ----
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*************** cd0880983dc32cb469f470728ae8b22b  gcc/te
*** 13809,13814 ****
--- 13819,13825 ----
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*************** dd169c18a4c3d9571a259e67ef8648ef  gcc/te
*** 14140,14145 ****
--- 14151,14158 ----
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*************** cb5b10af278fbafac78a6d53829b3d37  gcc/te
*** 14159,14164 ****
--- 14172,14178 ----
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*************** f900a961724b234dbae2b1dd5e2b9ae6  gcc/te
*** 14197,14202 ****
--- 14211,14217 ----
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*************** fd449c2760b279bd0767e28da8a563bf  gcc/te
*** 15522,15527 ****
--- 15537,15543 ----
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*************** ca10f046e47ea09ba5b87084372f1ce2  gcc/te
*** 15856,15861 ****
--- 15872,15878 ----
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*************** e6baed7e5941603d690b9c2c737ea663  gcc/te
*** 16139,16145 ****
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--- 16156,16162 ----
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  bb194d9ce590c9e5e69935ebac0f25e4  gcc/testsuite/g++.dg/cpp1z/eval-order2.C
! 8b89dee7164b6f4d992706e5b85433f4  gcc/testsuite/g++.dg/cpp1z/eval-order3.C
  6d8d378fedaf65b4cb89952060799280  gcc/testsuite/g++.dg/cpp1z/eval-order4.C
  56af6596678e014cdf3ef38d1427358f  gcc/testsuite/g++.dg/cpp1z/eval-order5.C
  f6da488c72cf7236fa560fcdd857f03e  gcc/testsuite/g++.dg/cpp1z/eval-order6.C
*************** c3433159b2bd23aac24ee2591dc866c3  gcc/te
*** 16386,16392 ****
  6bfd7e3fb2dd8f7e8d9c698e12bcb12d  gcc/testsuite/g++.dg/cpp23/constexpr-nonlit6.C
  e8f7bd0576728e974495935283ad4f39  gcc/testsuite/g++.dg/cpp23/constexpr-nonlit7.C
  94d923eb6e3e9a6e1a82b6aa88915ed5  gcc/testsuite/g++.dg/cpp23/cplusplus.C
! 92d47ef004cad05d17725e67099961ba  gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C
  b2919427c96be25ae3a72933323c8de1  gcc/testsuite/g++.dg/cpp23/init-stmt1.C
  368308646b02bb36cf22014a0d5bbbdb  gcc/testsuite/g++.dg/cpp23/init-stmt2.C
  794e5eb1bd211982315d61651af3bbaa  gcc/testsuite/g++.dg/cpp23/lambda-attr1.C
--- 16403,16409 ----
  6bfd7e3fb2dd8f7e8d9c698e12bcb12d  gcc/testsuite/g++.dg/cpp23/constexpr-nonlit6.C
  e8f7bd0576728e974495935283ad4f39  gcc/testsuite/g++.dg/cpp23/constexpr-nonlit7.C
  94d923eb6e3e9a6e1a82b6aa88915ed5  gcc/testsuite/g++.dg/cpp23/cplusplus.C
! f15cf4056fd44fef3bab4c0e3d8ed9ea  gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C
  b2919427c96be25ae3a72933323c8de1  gcc/testsuite/g++.dg/cpp23/init-stmt1.C
  368308646b02bb36cf22014a0d5bbbdb  gcc/testsuite/g++.dg/cpp23/init-stmt2.C
  794e5eb1bd211982315d61651af3bbaa  gcc/testsuite/g++.dg/cpp23/lambda-attr1.C
*************** a3d09682b891e46d2909fa15e90968be  gcc/te
*** 16447,16452 ****
--- 16464,16470 ----
  6ef777b34934fa2f70b3248e0ca3f4c0  gcc/testsuite/g++.dg/cpp2a/bit-cast13.C
  b3285f9f18a8d9542bc46f53e0efd28e  gcc/testsuite/g++.dg/cpp2a/bit-cast14.C
  fc2669bf6c2d9f293b18029e7572dc94  gcc/testsuite/g++.dg/cpp2a/bit-cast15.C
+ b21ee39782e659d8a55e03a67e8f3d2a  gcc/testsuite/g++.dg/cpp2a/bit-cast16.C
  1a2fa5e09ce4afea93f8549367941793  gcc/testsuite/g++.dg/cpp2a/bit-cast2.C
  4cd9a6c75b7b9c06d500d33a4b70e045  gcc/testsuite/g++.dg/cpp2a/bit-cast3.C
  43041147b254e878b1962b35b230ff79  gcc/testsuite/g++.dg/cpp2a/bit-cast4.C
*************** a6a50b6488710734804c5c75b79b903a  gcc/te
*** 16551,16556 ****
--- 16569,16575 ----
  24a9eaf01cde49642308b85f4d4dcc5e  gcc/testsuite/g++.dg/cpp2a/concepts-fn5.C
  0f1a6b3b582e8d9538428d983f021ba9  gcc/testsuite/g++.dg/cpp2a/concepts-fn6.C
  361e29e28ac51bd246a126bf9582d546  gcc/testsuite/g++.dg/cpp2a/concepts-fn7.C
+ d75bf2669acc8817d2d366ec5854068e  gcc/testsuite/g++.dg/cpp2a/concepts-fn8.C
  54600170a553fbe02a4c3cc4c16271ab  gcc/testsuite/g++.dg/cpp2a/concepts-fnparm1.C
  ddf7b3c6cc5b3127a1fb9f8ada7bd1d3  gcc/testsuite/g++.dg/cpp2a/concepts-friend1.C
  9b464178270ccc7b2da3483ef6eb72e3  gcc/testsuite/g++.dg/cpp2a/concepts-friend12.C
*************** f43d24631924e6835f35ad16f9b77ac9  gcc/te
*** 16635,16640 ****
--- 16654,16660 ----
  b48de652a269ba0411d9c971e6b06869  gcc/testsuite/g++.dg/cpp2a/concepts-partial-spec8.C
  66e23ad7cf5207487bf51a95b73faeae  gcc/testsuite/g++.dg/cpp2a/concepts-partial-spec9.C
  29ec7a379f70ee79ba0310d8fc45703b  gcc/testsuite/g++.dg/cpp2a/concepts-placeholder1.C
+ f57d40e8c8a062ab42228a604dc8b336  gcc/testsuite/g++.dg/cpp2a/concepts-placeholder12.C
  9a1776b1d9b3c080e847b78507e8c1c6  gcc/testsuite/g++.dg/cpp2a/concepts-placeholder2.C
  d4ce4a5306e35eff2b78390b50d6c95b  gcc/testsuite/g++.dg/cpp2a/concepts-placeholder3.C
  e428d578c8a0c5a61ab85eddccb24071  gcc/testsuite/g++.dg/cpp2a/concepts-placeholder4.C
*************** c66c957a03459efed336ab628ac7a020  gcc/te
*** 16791,16796 ****
--- 16811,16817 ----
  9ff1f88974ac56dba726f1074288f8e9  gcc/testsuite/g++.dg/cpp2a/concepts-template-parm8.C
  ec9215388b111eac1916dca163b2b4dd  gcc/testsuite/g++.dg/cpp2a/concepts-template-parm9.C
  ee36c7ebc03385f37bcba1c49e06c808  gcc/testsuite/g++.dg/cpp2a/concepts-this1.C
+ 8fe2b0550580edd7f36bb9d150fad6c4  gcc/testsuite/g++.dg/cpp2a/concepts-throw1.C
  39c15f1dc604f714304d144250164089  gcc/testsuite/g++.dg/cpp2a/concepts-traits1.C
  c9a6ab7bc0f1947e843b9c7150ccb98c  gcc/testsuite/g++.dg/cpp2a/concepts-traits2.C
  da802903e656a602947ee543e58f625e  gcc/testsuite/g++.dg/cpp2a/concepts-traits3.C
*************** ac4c42a0f2fd071297e154c82dd3e5cc  gcc/te
*** 16804,16809 ****
--- 16825,16832 ----
  e9afe83f998c36b2fb7c1f09347d0bde  gcc/testsuite/g++.dg/cpp2a/concepts-ttp2.C
  61d4933dc5691f3ec1773e39ad6449b4  gcc/testsuite/g++.dg/cpp2a/concepts-ttp3.C
  9fd760dc32683991c1046ee2a7769a0f  gcc/testsuite/g++.dg/cpp2a/concepts-ttp4.C
+ 88c3dc6cebb92ccd4e70aff54871edad  gcc/testsuite/g++.dg/cpp2a/concepts-ttp5.C
+ 14dc8338f97cc1b6792145fdfa5edade  gcc/testsuite/g++.dg/cpp2a/concepts-ttp6.C
  12bfd0f0b99ab93e9f3c3ea3610ad8db  gcc/testsuite/g++.dg/cpp2a/concepts-uneval1.C
  728cf90d57c99021cb85c6b8dd9ffa5e  gcc/testsuite/g++.dg/cpp2a/concepts-uneval2.C
  8ededbbf50406070bfd15b600f7ea746  gcc/testsuite/g++.dg/cpp2a/concepts-uneval3.C
*************** f2ad91569581aa3fa670ae32821491f9  gcc/te
*** 17096,17101 ****
--- 17119,17125 ----
  90589ce06ced8c136aaf37770e1ec488  gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated11.C
  d61cc66863701219edff4cd7fe87ebb9  gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated12.C
  c158bbb4df76b9867cf177e079c2ce23  gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated13.C
+ 13b8a2f12e5511e8657e1c29bb0f8073  gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated15.C
  4617b7d86ad3299b351c033f194bee8a  gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated2.C
  73b56ba004639bd18c7c3c95c3bfd080  gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated3.C
  5c37b5cacdb70688ac2e90c563d9613c  gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated4.C
*************** c7c933568cc5b17f6d8dadb7cec8101f  gcc/te
*** 17329,17334 ****
--- 17353,17360 ----
  279eb9b925ca084c1b6d0115a14ecb82  gcc/testsuite/g++.dg/cpp2a/spaceship-eq12.C
  ae3ef3d8cbf3145fa938c567ccc11530  gcc/testsuite/g++.dg/cpp2a/spaceship-eq13.C
  38fdc580773803f5236af81425b44d75  gcc/testsuite/g++.dg/cpp2a/spaceship-eq14.C
+ 4f286359dd97839020e6c19de0f2dd05  gcc/testsuite/g++.dg/cpp2a/spaceship-eq16.C
+ 466e9895fc63c3cc51f38790018adba9  gcc/testsuite/g++.dg/cpp2a/spaceship-eq17.C
  35b5b00dc11e88e35813caed81c920fc  gcc/testsuite/g++.dg/cpp2a/spaceship-eq1a.C
  da366bbf37859e5c77c24a8138c72180  gcc/testsuite/g++.dg/cpp2a/spaceship-eq2.C
  695134b1125f480b4d381c7ab5398d05  gcc/testsuite/g++.dg/cpp2a/spaceship-eq3.C
*************** f63b5565ab0bb6d2125aa5a844f18e62  gcc/te
*** 17363,17369 ****
  44f85774d50950da2270385ce1798644  gcc/testsuite/g++.dg/cpp2a/spaceship-sfinae2.C
  a1b5541b791ba1834869a1ceeb340ddc  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg1.C
  e6037687c8367081183d5ad6f709b4a7  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg2.C
! 48cc4340eb8546a39438777b57d87c47  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg3.C
  15bc319256750cf3a9caf5d852b30aa1  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg4.C
  853bb4d901c7e141b3533566d35db6c5  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg5.C
  11ce883df5bfcdc17848d1a182086ec8  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg6.C
--- 17389,17395 ----
  44f85774d50950da2270385ce1798644  gcc/testsuite/g++.dg/cpp2a/spaceship-sfinae2.C
  a1b5541b791ba1834869a1ceeb340ddc  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg1.C
  e6037687c8367081183d5ad6f709b4a7  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg2.C
! f33ebefab5f5462103b17cd15e835bc0  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg3.C
  15bc319256750cf3a9caf5d852b30aa1  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg4.C
  853bb4d901c7e141b3533566d35db6c5  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg5.C
  11ce883df5bfcdc17848d1a182086ec8  gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg6.C
*************** c97b36f101808a4d1b88e966d08df228  gcc/te
*** 17573,17579 ****
  2c571572a5d9948808d5c737071aa994  gcc/testsuite/g++.dg/debug/dwarf2/pr80234-1.C
  faf5c36abd2cfa3ad2cff3321cf391cf  gcc/testsuite/g++.dg/debug/dwarf2/pr80234-2.C
  4ee1bfe8771af7455053744f7fbfacc8  gcc/testsuite/g++.dg/debug/dwarf2/pr85302.C
! 5de08163e6802415b19e2d6aeb632428  gcc/testsuite/g++.dg/debug/dwarf2/pr85550.C
  2ccdefbe0960011d93e7b256421df22a  gcc/testsuite/g++.dg/debug/dwarf2/pr86456.C
  d7ed5be36e8ab58d3d73c325b6ec84ab  gcc/testsuite/g++.dg/debug/dwarf2/pr86900.C
  6bacb72669961d72ae42d4e8ef6f3235  gcc/testsuite/g++.dg/debug/dwarf2/pr87295.C
--- 17599,17605 ----
  2c571572a5d9948808d5c737071aa994  gcc/testsuite/g++.dg/debug/dwarf2/pr80234-1.C
  faf5c36abd2cfa3ad2cff3321cf391cf  gcc/testsuite/g++.dg/debug/dwarf2/pr80234-2.C
  4ee1bfe8771af7455053744f7fbfacc8  gcc/testsuite/g++.dg/debug/dwarf2/pr85302.C
! 55c05ba87fa91d96f3105fd4979a0d4d  gcc/testsuite/g++.dg/debug/dwarf2/pr85550.C
  2ccdefbe0960011d93e7b256421df22a  gcc/testsuite/g++.dg/debug/dwarf2/pr86456.C
  d7ed5be36e8ab58d3d73c325b6ec84ab  gcc/testsuite/g++.dg/debug/dwarf2/pr86900.C
  6bacb72669961d72ae42d4e8ef6f3235  gcc/testsuite/g++.dg/debug/dwarf2/pr87295.C
*************** a0ac13a0885ee162c972f58ffbd934e7  gcc/te
*** 17643,17648 ****
--- 17669,17675 ----
  c805656a195d9a98cc7141e7db52d9ef  gcc/testsuite/g++.dg/debug/nullptr01.C
  57e21034689a45ffd010ec86b2596de5  gcc/testsuite/g++.dg/debug/pr106261.C
  19de4ef7373a891f957af0121c166d89  gcc/testsuite/g++.dg/debug/pr108967.C
+ 553e3d84e73e0efbd2c26b6ea6df2a6c  gcc/testsuite/g++.dg/debug/pr110295.C
  fcdc9d29f34ff56d1b7de0d55a1eaed7  gcc/testsuite/g++.dg/debug/pr15736.cc
  d25b84553c2083b28615202497b8f94a  gcc/testsuite/g++.dg/debug/pr16792.C
  91880dfb66fda0db4ddabf486346b755  gcc/testsuite/g++.dg/debug/pr22514.C
*************** f9722392abd0d8da545dd7e9182420ee  gcc/te
*** 17748,17753 ****
--- 17775,17781 ----
  bdbe25cf432b7755bcf34617531e70c9  gcc/testsuite/g++.dg/diagnostic/conflicting-specifiers-1.C
  f7373a71dd891357231338f7279d20ca  gcc/testsuite/g++.dg/diagnostic/constexpr1.C
  13461b7c9b3b8e9d46f44892e6c9d868  gcc/testsuite/g++.dg/diagnostic/constexpr2.C
+ 5f5c4576dd5f9feb1898ccabe6a8ee2b  gcc/testsuite/g++.dg/diagnostic/constexpr4.C
  e824a88234abd039ffea31d13a8e9e42  gcc/testsuite/g++.dg/diagnostic/delete1.C
  4a4ed8a805a81f8726e0ba889c68ff19  gcc/testsuite/g++.dg/diagnostic/disable.C
  526efa2a8771e0409f39701dd3fc5953  gcc/testsuite/g++.dg/diagnostic/duplicate1.C
*************** d38795dc5765c85251d1b51d2837fa65  gcc/te
*** 17953,17959 ****
  9623b61344d258574a3ed60670199161  gcc/testsuite/g++.dg/eh/ref-temp1.C
  edd7f2bf186873e0f253e337b7c0baa7  gcc/testsuite/g++.dg/eh/ref-temp2.C
  a9ed8d0335c982c533cb9ab886ed3a49  gcc/testsuite/g++.dg/eh/registers1.C
! b17a8e37ca2c7024b8fdc3747635ee79  gcc/testsuite/g++.dg/eh/return1.C
  10cee1522872b7a635448041c93abb77  gcc/testsuite/g++.dg/eh/scope1.C
  be5af3c4aa82f74a07dbbdc316e9c02c  gcc/testsuite/g++.dg/eh/seh-xmm-unwind.C
  25142fe6cff6b7d981b3267f13c2b8ab  gcc/testsuite/g++.dg/eh/shadow1.C
--- 17981,17989 ----
  9623b61344d258574a3ed60670199161  gcc/testsuite/g++.dg/eh/ref-temp1.C
  edd7f2bf186873e0f253e337b7c0baa7  gcc/testsuite/g++.dg/eh/ref-temp2.C
  a9ed8d0335c982c533cb9ab886ed3a49  gcc/testsuite/g++.dg/eh/registers1.C
! efe051fbc8c815684c69526732bddef0  gcc/testsuite/g++.dg/eh/return1.C
! 195393f174c1cbb9a64af2efb4ac325f  gcc/testsuite/g++.dg/eh/return2.C
! dc439ae1040bcf10935e1aa092b15f49  gcc/testsuite/g++.dg/eh/return3.C
  10cee1522872b7a635448041c93abb77  gcc/testsuite/g++.dg/eh/scope1.C
  be5af3c4aa82f74a07dbbdc316e9c02c  gcc/testsuite/g++.dg/eh/seh-xmm-unwind.C
  25142fe6cff6b7d981b3267f13c2b8ab  gcc/testsuite/g++.dg/eh/shadow1.C
*************** fd9d6b2aeb10f429dd19c2675cd7ac03  gcc/te
*** 17985,17990 ****
--- 18015,18021 ----
  7549d75346531f9c6ff9ee0763a142b5  gcc/testsuite/g++.dg/eh/throw1.C
  7f4aab5cdb2954060fab6ebdbf157a33  gcc/testsuite/g++.dg/eh/throw2.C
  45cea983dcee48d4c249758ac270c782  gcc/testsuite/g++.dg/eh/throw3.C
+ 2d0c14860f41acf7377cc2d392a448aa  gcc/testsuite/g++.dg/eh/throw4.C
  d949616391e9201fe80327c74d26daf0  gcc/testsuite/g++.dg/eh/uncaught1.C
  0a4a6e449503f9ebd41b838472d08e86  gcc/testsuite/g++.dg/eh/uncaught2.C
  99e4a259aad973b217052ad01fc8c886  gcc/testsuite/g++.dg/eh/uncaught4.C
*************** df4711200e4e7cd7c5366aa4bdd29d74  gcc/te
*** 18314,18319 ****
--- 18345,18351 ----
  5254a238524950c95810e43d56192c6d  gcc/testsuite/g++.dg/ext/attrib62.C
  27519d8ffae247f3603111ebadacea31  gcc/testsuite/g++.dg/ext/attrib63.C
  c992ba90cd524ff973d2e06226c41bfa  gcc/testsuite/g++.dg/ext/attrib64.C
+ 1d6aa4b155d2e2ee76db642f389b5463  gcc/testsuite/g++.dg/ext/attrib68.C
  7af1e9265de26187b4a3a3880f99ac11  gcc/testsuite/g++.dg/ext/attrib7.C
  23c4a640241391acec5a1fd2c3fa5f25  gcc/testsuite/g++.dg/ext/attrib8.C
  db629587302d47a98b453a1702e900c9  gcc/testsuite/g++.dg/ext/attrib9.C
*************** a06d181d1f37ed4bbf17112c988f9608  gcc/te
*** 18550,18555 ****
--- 18582,18588 ----
  9e62aa095a73cd8f1f5e3c31669594cd  gcc/testsuite/g++.dg/ext/fnname3.C
  7201a84abcaa3ac89c91328b3625f57d  gcc/testsuite/g++.dg/ext/fnname4.C
  60898b718df5cec3ef7222e3b1257e0f  gcc/testsuite/g++.dg/ext/fpreg1.C
+ 698921918c46997aacc89312130201d9  gcc/testsuite/g++.dg/ext/frounding-math1.C
  653367c82c3f5a9a42dfc8ce52f23ec3  gcc/testsuite/g++.dg/ext/gnu-inline-anon-namespace.C
  3b39aa1a4010d4127a39b9443b421c4c  gcc/testsuite/g++.dg/ext/gnu-inline-class-static.C
  3e9228fd78fc3a72b584e4e2eaab7d3f  gcc/testsuite/g++.dg/ext/gnu-inline-class.C
*************** f2cf0baaaf489aa15f22210e07d052d1  gcc/te
*** 18596,18601 ****
--- 18629,18636 ----
  3b33306d69b3ca18d4baf8c0846a03a3  gcc/testsuite/g++.dg/ext/int128-4.C
  754d9cd2dfd66632200e26d330e6b4a6  gcc/testsuite/g++.dg/ext/int128-5.C
  77dfa593ec9ad567eab91cd02d57603f  gcc/testsuite/g++.dg/ext/int128-6.C
+ 302484e7798b2a4053ee4acf24bcfa8e  gcc/testsuite/g++.dg/ext/int128-7.C
+ 8a3239fa82cd3fe31a3157e5a8f33832  gcc/testsuite/g++.dg/ext/int128-8.C
  83602db2bd9d77a181d488d81e2441e1  gcc/testsuite/g++.dg/ext/integer-pack1.C
  4443382c2ba1abef21e5ac6b05161a19  gcc/testsuite/g++.dg/ext/integer-pack2.C
  c82a623a667acc283be2af5673150fd6  gcc/testsuite/g++.dg/ext/integer-pack3.C
*************** b579998c84a7b6c9374dbdc81f28e45a  gcc/te
*** 18631,18636 ****
--- 18666,18672 ----
  ed04365b57dec8b58125996aefe86234  gcc/testsuite/g++.dg/ext/is_constructible4.C
  dc3385dfd74c1bf2c03d4da78571f637  gcc/testsuite/g++.dg/ext/is_constructible5.C
  9553e2b6c2e80320fe1dbc53bb218083  gcc/testsuite/g++.dg/ext/is_constructible6.C
+ 0fdc603161df17318d861d136ade90c2  gcc/testsuite/g++.dg/ext/is_constructible8.C
  deb5d60ce9955a69d116b30edd2cf933  gcc/testsuite/g++.dg/ext/is_empty.C
  51590a59aaf8715b9fe4a7ae06414cb8  gcc/testsuite/g++.dg/ext/is_empty2.C
  03f82ac5f5b864878fa0ffa4383fa338  gcc/testsuite/g++.dg/ext/is_enum.C
*************** bcf9b6873e48870b8f6014b5da708cd3  gcc/te
*** 18702,18707 ****
--- 18738,18744 ----
  2e29b33d9b093b6a30a0e49d1b42c6c8  gcc/testsuite/g++.dg/ext/packed7.C
  065cff376c58bb925a16845eb3c01ced  gcc/testsuite/g++.dg/ext/packed8.C
  0932ad5ce3e0455a61e5bd35e5ed587a  gcc/testsuite/g++.dg/ext/packed9.C
+ 219625d5165b1dc19f7c5e8fccd607a5  gcc/testsuite/g++.dg/ext/pr114691.C
  210171cdbd9571de1bfd894e6c809efa  gcc/testsuite/g++.dg/ext/pr17577.C
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*************** e3920251c1881f799695cd65335b3cac  gcc/te
*** 18823,18829 ****
--- 18860,18870 ----
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*************** a7c093e32d8e0cc08e02c3253748979c  gcc/te
*** 19035,19042 ****
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--- 19076,19083 ----
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*************** ef95eb29955e54a2310be36a0828b0cb  gcc/te
*** 19804,19809 ****
--- 19845,19851 ----
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*************** d0415e5d5ed79c73a04e7df5551e4b95  gcc/te
*** 20012,20017 ****
--- 20054,20060 ----
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*************** b5ea3678b95f88606bb0d37ee1f58a68  gcc/te
*** 21963,21968 ****
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*************** bad9496f071793031ea4ab93b911a483  gcc/te
*** 21996,22001 ****
--- 22040,22046 ----
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*************** d9064b328bf2156a9e67df26156ec572  gcc/te
*** 23352,23357 ****
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*************** f8b96612d216a7b190f337247c8e8315  gcc/te
*** 24393,24398 ****
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*************** e93f073f61a42e3c7ad372625dbf5491  gcc/te
*** 25050,25055 ****
--- 25101,25107 ----
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*************** e0f2cfb1a1f922a19280efa88e1e5f1c  gcc/te
*** 25440,25448 ****
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--- 25492,25502 ----
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*************** d53f4a36bfd00298b6b687881aad6861  gcc/te
*** 25898,25903 ****
--- 25952,25959 ----
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*************** bb3b906322f73b1bfddaab3658a0314e  gcc/te
*** 26334,26339 ****
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*************** da3dbc8526151b41f4a741a5d5e51eae  gcc/te
*** 26618,26623 ****
--- 26675,26681 ----
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*************** d53cb2073c8f36697f63dfe19779eb13  gcc/te
*** 30517,30522 ****
--- 30575,30583 ----
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*************** c11e5f97e7a5971cc5c5017024f54496  gcc/te
*** 30531,30537 ****
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--- 30592,30598 ----
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*************** b745a307c6018d88262928962e2684e9  gcc/te
*** 30828,30833 ****
--- 30889,30897 ----
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*************** a621b799eff193996043d9d5462e5c27  gcc/te
*** 30872,30877 ****
--- 30936,30942 ----
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*************** bd1c35be302338df14b1aa330813797d  gcc/te
*** 30914,30920 ****
--- 30979,30991 ----
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*************** cbe67a4212b7d85b023f62848033fa31  gcc/te
*** 31742,31747 ****
--- 31813,31819 ----
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*************** e12df015117953bcc79bb2bd0912de65  gcc/te
*** 31998,32003 ****
--- 32070,32082 ----
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*** 33341,33346 ****
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*************** eda9698796bef969bb50e5712208e61b  gcc/te
*** 34053,34058 ****
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*************** fe9cbf88b57bdd9a5bf9c526284225f4  gcc/te
*** 34552,34557 ****
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*************** e273443a6f4eccf5890b6c4d46998324  gcc/te
*** 35217,35222 ****
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*************** f77fcc9ffd92ab717a2d6107303723f5  gcc/te
*** 35637,35643 ****
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*** 36217,36222 ****
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*** 36914,36919 ****
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*************** c4152191bf290926b6b747aa4397e015  gcc/te
*** 38146,38152 ****
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*** 38167,38175 ****
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*** 38347,38353 ****
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*** 38361,38366 ****
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*** 38414,38419 ****
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*** 38792,38797 ****
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*** 39133,39139 ****
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*** 40187,40193 ****
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*************** e9a270cc0fe29965bd5d3f98375ad921  gcc/te
*** 40290,40296 ****
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*** 40647,40652 ****
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*** 41172,41183 ****
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*** 41448,41455 ****
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*** 41461,41466 ****
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*** 41474,41481 ****
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*************** b09000e6104e19c4d2e2e0550272c280  gcc/te
*** 42977,42983 ****
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*** 43599,43604 ****
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*** 43872,43878 ****
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*** 44150,44156 ****
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*** 44582,44587 ****
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*************** fc343ac4dddc2387803c4581508bd355  gcc/te
*** 46044,46050 ****
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--- 46194,46200 ----
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*************** c502141393b8f053f7454ee254898a9a  gcc/te
*** 46567,46572 ****
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*************** bb62f82a973334db1c0ebf75b17bcdf8  gcc/te
*** 47843,47848 ****
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*************** b6636fcf606d4b2a9b3c129b082bc808  gcc/te
*** 47889,47894 ****
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*************** bb6370e51fdfc71eb406f2d9d7e1f004  gcc/te
*** 48027,48032 ****
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*** 48565,48573 ****
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*************** b551cf977314c7406b99b8d04c143b19  gcc/te
*** 48927,48933 ****
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*************** c38511a26575a66a65ddd31d3bc229da  gcc/te
*** 49661,49666 ****
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*************** c400cc0e03e4317110d582fdba04ace0  gcc/te
*** 50187,50199 ****
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*************** db99ea9df53af2aa9156fb039f1d5e57  gcc/te
*** 50247,50253 ****
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*************** ccf5175907998c0c871634fd51ca889f  gcc/te
*** 50354,50359 ****
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*************** ff3a09d9afde293ac1598cb7530ead9d  gcc/te
*** 50366,50371 ****
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*************** e3003ad7bf9014830c6f9c58e85b082a  gcc/te
*** 51023,51029 ****
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*** 51260,51266 ****
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*************** cb35ae597b395ee5d00d96a082dfbd6a  gcc/te
*** 51358,51364 ****
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--- 51528,51534 ----
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! 4f70f13ba5254fb500f72a9e35ec9b20  gcc/testsuite/gcc.target/aarch64/mops_4.c
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*************** face3a8c6631236fedad3dce5526b762  gcc/te
*** 51389,51394 ****
--- 51559,51565 ----
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*************** e2136e7e4121b5b98591560242d1826f  gcc/te
*** 51441,51447 ****
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--- 51612,51618 ----
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*************** e047cf533ea7d668ad1746232b7c35f6  gcc/te
*** 51456,51462 ****
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--- 51627,51633 ----
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*************** a7d8042acc2272e21686f52da76e42f1  gcc/te
*** 51465,51470 ****
--- 51636,51643 ----
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*************** d8cfefc063686118062e9fc3b774907b  gcc/te
*** 51475,51481 ****
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--- 51648,51654 ----
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*************** b28ad75ae030029f6a891f12b81c0ebf  gcc/te
*** 51495,51501 ****
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--- 51668,51674 ----
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*************** c8c052e3ffb361fbe4b0043b1414c58b  gcc/te
*** 51506,51513 ****
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--- 51679,51686 ----
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*************** a9e3fa9bf042d9c1c357a23c16f6b387  gcc/te
*** 51539,51546 ****
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--- 51712,51719 ----
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*************** c45bc47433163208f0aec414ada73705  gcc/te
*** 51564,51570 ****
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--- 51737,51743 ----
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*************** d0bcbc3d9ff4ecc6817a33d0d9f3aed3  gcc/te
*** 51575,51581 ****
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--- 51748,51754 ----
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*************** a02965d358c103b08e6c3e285f93010b  gcc/te
*** 51618,51624 ****
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--- 51791,51797 ----
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*************** d8cba6fbd72082d21194a1854f6c2dfc  gcc/te
*** 52072,52078 ****
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--- 52245,52251 ----
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*************** a39fffcb877f065fdd23dfa57eee91ff  gcc/te
*** 52111,52118 ****
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--- 52284,52291 ----
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*************** b6d24cc44c0ae841eedac19bb3b71ae7  gcc/te
*** 52122,52128 ****
--- 52295,52305 ----
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*************** e13154393d19a49196906480b6d2d4bc  gcc/te
*** 52139,52144 ****
--- 52316,52323 ----
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*************** bd0ea7412913a5ce083ddea4613bd169  gcc/te
*** 54546,54552 ****
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--- 54725,54731 ----
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*************** e79a454266487377a5fe47ecfa638d07  gcc/te
*** 54681,54687 ****
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--- 54860,54866 ----
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*************** a1eb5ddb5902496d5253fa3260ba71e1  gcc/te
*** 54737,54742 ****
--- 54916,54922 ----
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*************** b1c8f3af47e9cea755b055cce544806c  gcc/te
*** 54760,54765 ****
--- 54940,54946 ----
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*************** c59c91f159013d73cdf4d699b8f4ae48  gcc/te
*** 56022,56028 ****
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*************** a2ccf9bfd1d0bb840b23c25e1bdec31c  gcc/te
*** 56044,56049 ****
--- 56225,56231 ----
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*************** a9f54382c872d8300abd0751aaf2baa7  gcc/te
*** 56274,56279 ****
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*************** e5b7374e291244b801b4c292504d3f80  gcc/te
*** 56522,56528 ****
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--- 56706,56712 ----
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*************** ce1fe2059d8e263b0f3d889cb1392892  gcc/te
*** 56745,56750 ****
--- 56929,56936 ----
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*************** c6b1f31177a60b170040e0eddc1787ba  gcc/te
*** 57022,57037 ****
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--- 57208,57225 ----
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*************** eca0b9cdc77f8bcef8a2dc068fb71496  gcc/te
*** 57040,57059 ****
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*************** ca8fc175292b81b70decf89029745e9b  gcc/te
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*************** c4c7d66036ac40ceb8fcc46da005c425  gcc/te
*** 59026,59587 ****
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*************** bce9be46a9e956c5fcc66bfb68691f0f  gcc/te
*** 59601,59606 ****
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*************** ce2ea998f70f030c1e5c5cf0f3536bd7  gcc/te
*** 59692,59697 ****
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*************** a13d496741ee33ca9436673eb16995cf  gcc/te
*** 59886,59891 ****
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*************** c85c6e997259bc6ea785859ca3cd0503  gcc/te
*** 59921,59941 ****
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*************** c2eea7db2d4567249d33b386cdaf476b  gcc/te
*** 59945,59955 ****
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*************** c128da719ddaa71fe006886c68ef9e8b  gcc/te
*** 59970,59976 ****
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*** 60293,60298 ****
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*** 60301,60306 ****
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*** 60327,60332 ****
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*** 60359,60364 ****
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*** 60373,60378 ****
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*** 61115,61120 ****
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*** 61720,61726 ****
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*************** b47b757f8315eacb46b04546750c92a3  gcc/te
*** 61738,61761 ****
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*************** dc7877a60c094039a172aa23afb1e37c  gcc/te
*** 62950,62955 ****
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*** 62971,62981 ****
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*** 64260,64281 ****
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*** 65829,65834 ****
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*** 67589,67596 ****
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*** 68478,68483 ****
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*** 70547,70555 ****
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*** 70587,70592 ****
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*** 70603,70608 ****
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*** 71011,71017 ****
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*** 71103,71110 ****
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*** 71131,71137 ****
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*** 71401,71408 ****
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*************** b7e24879332d72f72c91833c27ceef33  gcc/te
*** 87111,87116 ****
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*************** f9299b514c5c25293c940907f5a4059d  gcc/te
*** 87520,87525 ****
--- 87713,87723 ----
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*************** f3429f34adffc8bdea29c62318bbaca5  gcc/te
*** 87828,87833 ****
--- 88026,88032 ----
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*************** e9400740e9c9b40bb4da23c840d60a4e  gcc/te
*** 88581,88586 ****
--- 88780,88788 ----
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*************** d19a0449bac1fb497429a88904f3d658  gcc/te
*** 90698,90704 ****
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--- 90900,90906 ----
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*************** b02011c7edbcfca8dfb3bd46815567fc  gcc/te
*** 90821,90827 ****
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--- 91023,91029 ----
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*************** df424c268791473ace062ef873c388e2  gcc/te
*** 90840,90846 ****
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--- 91042,91048 ----
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*************** a3c51194521aeaec30746bcd09540ded  gcc/te
*** 90913,90919 ****
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--- 91115,91121 ----
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*************** df8e1651432977636bf9ca64823f6609  gcc/te
*** 90996,91002 ****
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--- 91198,91204 ----
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*************** edc8405f3beeb6923d529479e62f98be  gcc/te
*** 91004,91010 ****
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--- 91206,91212 ----
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*************** e16387e01018d3d54a2f32822682dac1  gcc/te
*** 91335,91341 ****
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--- 91537,91543 ----
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*************** b157b4e7044f8a4b50066404351184e9  gcc/tr
*** 91977,91983 ****
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--- 92179,92185 ----
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*************** e35c2d4712dafbb07acf21e1b9026b1f  gcc/tr
*** 91993,92009 ****
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--- 92195,92211 ----
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*************** a9e072251c9cd071080f867b429c833b  gcc/tr
*** 92015,92031 ****
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! 2267c8a08be256094faf58eab483bb2e  gcc/tree-scalar-evolution.cc
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! bdd5e0cb99bb85230a953590c9d3075a  gcc/tree-sra.cc
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  5daf63c693503c3da59da196d885d1e6  gcc/tree-ssa-alias-compare.h
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  9693c083b57172a5de1c03311467b54f  gcc/tree-ssa-alias.h
! 36a4a2ae59fd23f04fbd98bf8e717a4c  gcc/tree-ssa-ccp.cc
  038e40c57d9c925b2f2ab27ce65aec68  gcc/tree-ssa-ccp.h
  d0589077e360719205f673fa28e27473  gcc/tree-ssa-coalesce.cc
  7df6905ad76540fc0ba6958ce894a5a4  gcc/tree-ssa-coalesce.h
--- 92217,92233 ----
  5d8f11da41666287f34c5c5ff91732bd  gcc/tree-predcom.cc
  685a2a1bc806bfb60256953c02c0ba71  gcc/tree-pretty-print.cc
  bee23ec1af17a7d796af14ca70f8dc46  gcc/tree-pretty-print.h
! 946fb99ef28d9b8456c053492adf3d3f  gcc/tree-profile.cc
! d3f86577bf5d45cdd84ea0e9e35dc52e  gcc/tree-scalar-evolution.cc
  f5e09b2dd6f2fef9f16a58b4cd348400  gcc/tree-scalar-evolution.h
! e934b1c86118e1814be6e8a8ac39b135  gcc/tree-sra.cc
  22ad2a6946f74c4f2e7665952622d9d0  gcc/tree-sra.h
  a4f99ae3557e1161cd896d23217b56a4  gcc/tree-ssa-address.cc
  4233bdbcb0d4183c9631eebafa6f4820  gcc/tree-ssa-address.h
  5daf63c693503c3da59da196d885d1e6  gcc/tree-ssa-alias-compare.h
  00863b99be56c3e8bd536dc74bdb5411  gcc/tree-ssa-alias.cc
  9693c083b57172a5de1c03311467b54f  gcc/tree-ssa-alias.h
! a0cea7e64f6a07c2f3ad60bcc122e610  gcc/tree-ssa-ccp.cc
  038e40c57d9c925b2f2ab27ce65aec68  gcc/tree-ssa-ccp.h
  d0589077e360719205f673fa28e27473  gcc/tree-ssa-coalesce.cc
  7df6905ad76540fc0ba6958ce894a5a4  gcc/tree-ssa-coalesce.h
*************** b5611be2889ac60f8358352f44be0eac  gcc/tr
*** 92034,92079 ****
  d9087990e3ccbe29be4cb2d6fbcd0d6b  gcc/tree-ssa-dce.h
  38e1cf32b4e25aa2758552af48728c9f  gcc/tree-ssa-dom.cc
  f163bc3e9903da9f8045d8369ae0a861  gcc/tree-ssa-dom.h
! 1b42f80cd56b7b80fdedf19070e1771c  gcc/tree-ssa-dse.cc
  195877f983e0a31af6302aed94fa678f  gcc/tree-ssa-dse.h
  2f7eb6688251cdb496e80893d05208fe  gcc/tree-ssa-forwprop.cc
! 01cb88691242bd822e285cee0991d29d  gcc/tree-ssa-ifcombine.cc
  2583b0542c537376d7d4e52a3a3ce910  gcc/tree-ssa-live.cc
  1d67651fbc8ab600f45126f148f4c12b  gcc/tree-ssa-live.h
  b584536fc99eb576420b3ef5e3780c49  gcc/tree-ssa-loop-ch.cc
! dcbf7a69fb8b686e4356221dc1b7d777  gcc/tree-ssa-loop-im.cc
! 0e82db34e6245ef507793cd8894b447b  gcc/tree-ssa-loop-ivcanon.cc
! 0a143703be12779c74424df733444477  gcc/tree-ssa-loop-ivopts.cc
  3f30c52cd6fd7f965316dafa58373681  gcc/tree-ssa-loop-ivopts.h
  ef807a1da16d0fd13015b7232cea5f9f  gcc/tree-ssa-loop-manip.cc
  d8ad877acd553ebd0bd25b5694a3faff  gcc/tree-ssa-loop-manip.h
  ee6dcea06f13f2e4ffeef5eb7dca0dbb  gcc/tree-ssa-loop-niter.cc
  7846c6b4a5c247d1cbdae546020ad25f  gcc/tree-ssa-loop-niter.h
! 14595cbe718de0b8d598cc311c9b902f  gcc/tree-ssa-loop-prefetch.cc
  757d0efec651140b554d079e79fd5977  gcc/tree-ssa-loop-split.cc
! f7436362de0b3fcd67ad43810db53479  gcc/tree-ssa-loop-unswitch.cc
  5d9355772a32a02f9de8b8da727fe954  gcc/tree-ssa-loop.cc
  16e3b759aa71fcd40fb9ac27f0b4552d  gcc/tree-ssa-loop.h
! f152809e819eb0986c6be0e8a5314c99  gcc/tree-ssa-math-opts.cc
  f0db024320e40ac1ac8d450e8be90f02  gcc/tree-ssa-math-opts.h
  99fc0aa9825a52457c111c1df6c54358  gcc/tree-ssa-operands.cc
  45c8305b030ec69139d01c326f9a1133  gcc/tree-ssa-operands.h
! 45d1b9dbe652edbd08734f14fd8cb203  gcc/tree-ssa-phiopt.cc
  35e3309df2c090d12494914f49fc1e1e  gcc/tree-ssa-phiprop.cc
! fb379cd0159c0885d7948216ffa8e749  gcc/tree-ssa-pre.cc
  3a55ddfc911130111194d8f209761e03  gcc/tree-ssa-propagate.cc
  7e14602488f8f1e7e754422dd9731b01  gcc/tree-ssa-propagate.h
! b1392b609cdfe9efdf50ccbbef5658f1  gcc/tree-ssa-reassoc.cc
  a2d407f6fd4aa95d7eb7ad8a17b81af4  gcc/tree-ssa-reassoc.h
  5a5f1e71f87f5ab41730b4c7fe0651bb  gcc/tree-ssa-sccvn.cc
  9b971767e8b1b24cc98c426f1f399ed8  gcc/tree-ssa-sccvn.h
  648524d5c619edb0acece29c53601b89  gcc/tree-ssa-scopedtables.cc
  9da7a798aaf58ceb04c796be96a5bdc8  gcc/tree-ssa-scopedtables.h
  1a01f1b2d173ce0bd6dc265a99316950  gcc/tree-ssa-sink.cc
! 2012a25aa20863b46230c40ae40b1b69  gcc/tree-ssa-strlen.cc
  c3601488e1adeaebe82eec4348f3568d  gcc/tree-ssa-strlen.h
! 25d1c78b94974440c9fc85ab6aeec599  gcc/tree-ssa-structalias.cc
! 1331a83a0763d00ff819b24064392d12  gcc/tree-ssa-tail-merge.cc
  7599bc99d54acc459659d85b787faee8  gcc/tree-ssa-ter.cc
  08299e87c1517c92eb914373542d3cc8  gcc/tree-ssa-ter.h
  f74ec8bee7ed7504fbe5b21a035e2ec3  gcc/tree-ssa-threadbackward.cc
--- 92236,92281 ----
  d9087990e3ccbe29be4cb2d6fbcd0d6b  gcc/tree-ssa-dce.h
  38e1cf32b4e25aa2758552af48728c9f  gcc/tree-ssa-dom.cc
  f163bc3e9903da9f8045d8369ae0a861  gcc/tree-ssa-dom.h
! 9e92b12de18963b66bd682029be71aea  gcc/tree-ssa-dse.cc
  195877f983e0a31af6302aed94fa678f  gcc/tree-ssa-dse.h
  2f7eb6688251cdb496e80893d05208fe  gcc/tree-ssa-forwprop.cc
! fa6f9132426613883a9a158014b2a7ea  gcc/tree-ssa-ifcombine.cc
  2583b0542c537376d7d4e52a3a3ce910  gcc/tree-ssa-live.cc
  1d67651fbc8ab600f45126f148f4c12b  gcc/tree-ssa-live.h
  b584536fc99eb576420b3ef5e3780c49  gcc/tree-ssa-loop-ch.cc
! 7bb09dec4a6ae87dd19896ba77ac4b4b  gcc/tree-ssa-loop-im.cc
! 595f63705e53fd8387b90a8ee3692ef5  gcc/tree-ssa-loop-ivcanon.cc
! 7c0b4c9c9a41e57bdc77ff9cfb33b9bb  gcc/tree-ssa-loop-ivopts.cc
  3f30c52cd6fd7f965316dafa58373681  gcc/tree-ssa-loop-ivopts.h
  ef807a1da16d0fd13015b7232cea5f9f  gcc/tree-ssa-loop-manip.cc
  d8ad877acd553ebd0bd25b5694a3faff  gcc/tree-ssa-loop-manip.h
  ee6dcea06f13f2e4ffeef5eb7dca0dbb  gcc/tree-ssa-loop-niter.cc
  7846c6b4a5c247d1cbdae546020ad25f  gcc/tree-ssa-loop-niter.h
! 508555a8a882dcaee120afeeada6f95d  gcc/tree-ssa-loop-prefetch.cc
  757d0efec651140b554d079e79fd5977  gcc/tree-ssa-loop-split.cc
! fd8e7ab6072c9318249e544a02ca3d0d  gcc/tree-ssa-loop-unswitch.cc
  5d9355772a32a02f9de8b8da727fe954  gcc/tree-ssa-loop.cc
  16e3b759aa71fcd40fb9ac27f0b4552d  gcc/tree-ssa-loop.h
! 939b791840e8142aabfcbc1e53ab8707  gcc/tree-ssa-math-opts.cc
  f0db024320e40ac1ac8d450e8be90f02  gcc/tree-ssa-math-opts.h
  99fc0aa9825a52457c111c1df6c54358  gcc/tree-ssa-operands.cc
  45c8305b030ec69139d01c326f9a1133  gcc/tree-ssa-operands.h
! 7729ecf4fe5c29c2a3c0d87f651e42fe  gcc/tree-ssa-phiopt.cc
  35e3309df2c090d12494914f49fc1e1e  gcc/tree-ssa-phiprop.cc
! f9e799527e96fb43c96edcf03ebb6a85  gcc/tree-ssa-pre.cc
  3a55ddfc911130111194d8f209761e03  gcc/tree-ssa-propagate.cc
  7e14602488f8f1e7e754422dd9731b01  gcc/tree-ssa-propagate.h
! 6e8f74fdfb4c39b9b305ee8ade1dfa2a  gcc/tree-ssa-reassoc.cc
  a2d407f6fd4aa95d7eb7ad8a17b81af4  gcc/tree-ssa-reassoc.h
  5a5f1e71f87f5ab41730b4c7fe0651bb  gcc/tree-ssa-sccvn.cc
  9b971767e8b1b24cc98c426f1f399ed8  gcc/tree-ssa-sccvn.h
  648524d5c619edb0acece29c53601b89  gcc/tree-ssa-scopedtables.cc
  9da7a798aaf58ceb04c796be96a5bdc8  gcc/tree-ssa-scopedtables.h
  1a01f1b2d173ce0bd6dc265a99316950  gcc/tree-ssa-sink.cc
! 181e1424785cbf0e1a240820e7712120  gcc/tree-ssa-strlen.cc
  c3601488e1adeaebe82eec4348f3568d  gcc/tree-ssa-strlen.h
! 162b5602b917c115869606301bf8da9f  gcc/tree-ssa-structalias.cc
! 2f25bfc0dc9f8ec66fc417c5c22d0f92  gcc/tree-ssa-tail-merge.cc
  7599bc99d54acc459659d85b787faee8  gcc/tree-ssa-ter.cc
  08299e87c1517c92eb914373542d3cc8  gcc/tree-ssa-ter.h
  f74ec8bee7ed7504fbe5b21a035e2ec3  gcc/tree-ssa-threadbackward.cc
*************** f74ec8bee7ed7504fbe5b21a035e2ec3  gcc/tr
*** 92083,92089 ****
  5cbd06b4671b9d3a386ae0b3b1899ff0  gcc/tree-ssa-threadupdate.h
  87d4c13c047088a0266b3ff765ee429e  gcc/tree-ssa-uncprop.cc
  7ed817cf5846d767d8b96f9e60bc058a  gcc/tree-ssa-uninit.cc
! 301dd3bbae1a92fdb0ae7b2cbb5971a5  gcc/tree-ssa.cc
  8c68b1470d74209ca93348eaff68f563  gcc/tree-ssa.h
  1e5a5a5e038804c8ae08600e168b502d  gcc/tree-ssanames.cc
  5f0afaa1eeaac0ca2f771408bdaf5c9d  gcc/tree-ssanames.h
--- 92285,92291 ----
  5cbd06b4671b9d3a386ae0b3b1899ff0  gcc/tree-ssa-threadupdate.h
  87d4c13c047088a0266b3ff765ee429e  gcc/tree-ssa-uncprop.cc
  7ed817cf5846d767d8b96f9e60bc058a  gcc/tree-ssa-uninit.cc
! e325a4a3353d342488995f82d5e0483b  gcc/tree-ssa.cc
  8c68b1470d74209ca93348eaff68f563  gcc/tree-ssa.h
  1e5a5a5e038804c8ae08600e168b502d  gcc/tree-ssanames.cc
  5f0afaa1eeaac0ca2f771408bdaf5c9d  gcc/tree-ssanames.h
*************** aafcaaf57b1b41ce694f51f37fe1dd93  gcc/tr
*** 92096,92128 ****
  9fe812d705ac88f473d91d7ced8745df  gcc/tree-switch-conversion.cc
  f9949ff32a719d47d731381154dd534c  gcc/tree-switch-conversion.h
  1a726f178c55eac3224071963ee9bb3a  gcc/tree-tailcall.cc
! 513bc4b334e877141928d0f73796f3bd  gcc/tree-vect-data-refs.cc
! 212ea4478045644f9da2032ca618a355  gcc/tree-vect-generic.cc
  d77cf2655cb870786e919f02d9b07f1e  gcc/tree-vect-loop-manip.cc
! 89f2128cc9f1b87079c896d12146ffa3  gcc/tree-vect-loop.cc
! cd711de8354580b4aa19eef890071fe8  gcc/tree-vect-patterns.cc
  db19be1249cd94d158a20e2be7032249  gcc/tree-vect-slp-patterns.cc
! 9a43fe7624cfa6c8550521c329469278  gcc/tree-vect-slp.cc
! 7cb2bb4be82d2abbcdef46346dc10101  gcc/tree-vect-stmts.cc
  17da0c4ee2c405d67d63509bd85f801c  gcc/tree-vector-builder.cc
  81e7b3c9a18c29b53f3f017109c91f6f  gcc/tree-vector-builder.h
  541c768983210e5d6b69b9ceeaf40e4b  gcc/tree-vectorizer.cc
  5a1d9b1a4fd93a1dc9773d46eaa80403  gcc/tree-vectorizer.h
  89443f1b171fee24a2d36f7d1af2b315  gcc/tree-vrp.cc
  9cb72e4782bdb3fb2fb9a04498598bf1  gcc/tree-vrp.h
! a2de7abc6b606b71f98be68100bd4a70  gcc/tree.cc
  45808a76997a44962fa135c3a7de1ff8  gcc/tree.def
  637a29beea44508096255de7a58c6860  gcc/tree.h
  789a781bb4a16a840a4d12b33e5e41aa  gcc/treestruct.def
  7176ab9942843346cd7a7e47f7b62463  gcc/tristate.cc
  9b9356511a9a18b1a38ed98eb7a8d3e0  gcc/tristate.h
! beaaf57de01c41199e3b6a9eb24fb143  gcc/tsan.cc
  20c3068b317a87ad36e2e439f2505566  gcc/tsan.h
  114597ac7dc093c760e9fc3ea6b82138  gcc/tsystem.h
  23d3ef3b350b5c0785589547a581b715  gcc/typeclass.h
  d38c58f87ee7ee53eb825a0444aea09b  gcc/typed-splay-tree.cc
  c8f92fd70553d3478d74451987ed8835  gcc/typed-splay-tree.h
! 6a8d8db3cf6d0d7de35a9c5f42e5c353  gcc/ubsan.cc
  e6a6b3805ac7207859f56a703a4cf905  gcc/ubsan.h
  b5748b6b0f57f1d91ae8016e87f5d411  gcc/valtrack.cc
  ad9b356abb114134e0ce58bf604c4a85  gcc/valtrack.h
--- 92298,92330 ----
  9fe812d705ac88f473d91d7ced8745df  gcc/tree-switch-conversion.cc
  f9949ff32a719d47d731381154dd534c  gcc/tree-switch-conversion.h
  1a726f178c55eac3224071963ee9bb3a  gcc/tree-tailcall.cc
! d4a4a21135fb985aa91937e6ba4037fa  gcc/tree-vect-data-refs.cc
! d1fc9b6c5543afd25e87854bb3508f49  gcc/tree-vect-generic.cc
  d77cf2655cb870786e919f02d9b07f1e  gcc/tree-vect-loop-manip.cc
! 7f5964b7413afc7d27c4bfb9eefe326c  gcc/tree-vect-loop.cc
! afdadaa3e7ffae199ce4c4aecbbd98ff  gcc/tree-vect-patterns.cc
  db19be1249cd94d158a20e2be7032249  gcc/tree-vect-slp-patterns.cc
! af6d455d103dc8f9c23ea1f8576825f1  gcc/tree-vect-slp.cc
! c2e7775bf7fd48f0f6b753bb6888f305  gcc/tree-vect-stmts.cc
  17da0c4ee2c405d67d63509bd85f801c  gcc/tree-vector-builder.cc
  81e7b3c9a18c29b53f3f017109c91f6f  gcc/tree-vector-builder.h
  541c768983210e5d6b69b9ceeaf40e4b  gcc/tree-vectorizer.cc
  5a1d9b1a4fd93a1dc9773d46eaa80403  gcc/tree-vectorizer.h
  89443f1b171fee24a2d36f7d1af2b315  gcc/tree-vrp.cc
  9cb72e4782bdb3fb2fb9a04498598bf1  gcc/tree-vrp.h
! 894f26dfce9d0188302e02f92fa3164d  gcc/tree.cc
  45808a76997a44962fa135c3a7de1ff8  gcc/tree.def
  637a29beea44508096255de7a58c6860  gcc/tree.h
  789a781bb4a16a840a4d12b33e5e41aa  gcc/treestruct.def
  7176ab9942843346cd7a7e47f7b62463  gcc/tristate.cc
  9b9356511a9a18b1a38ed98eb7a8d3e0  gcc/tristate.h
! 8919381ccc97b40411151098cfa9f4f4  gcc/tsan.cc
  20c3068b317a87ad36e2e439f2505566  gcc/tsan.h
  114597ac7dc093c760e9fc3ea6b82138  gcc/tsystem.h
  23d3ef3b350b5c0785589547a581b715  gcc/typeclass.h
  d38c58f87ee7ee53eb825a0444aea09b  gcc/typed-splay-tree.cc
  c8f92fd70553d3478d74451987ed8835  gcc/typed-splay-tree.h
! fb06f713782c4665a4b2f32ccf696707  gcc/ubsan.cc
  e6a6b3805ac7207859f56a703a4cf905  gcc/ubsan.h
  b5748b6b0f57f1d91ae8016e87f5d411  gcc/valtrack.cc
  ad9b356abb114134e0ce58bf604c4a85  gcc/valtrack.h
*************** d338ccdbfad0f64ecbdd1b67c8277705  gcc/va
*** 92135,92145 ****
  bc26a3485cb0a269944b49b2427ca012  gcc/value-range-equiv.cc
  b6d9efd1a637bb7e7bb66614921055be  gcc/value-range-equiv.h
  9ec3280a012fbd643f8fbbee8f79eeca  gcc/value-range.cc
! 473bc142d8c84cc76764637c005b943a  gcc/value-range.h
  10e20613642a5a9dfe658f7b7bee260b  gcc/value-relation.cc
  8e00a37814d00e977bd4878c88c6b9f0  gcc/value-relation.h
  93e740653e6cec3f6c4610b2fdee225a  gcc/var-tracking.cc
! 5edbd0093097da1ff9e3402d51c5be76  gcc/varasm.cc
  8d61ef065460d6dd2c76f09bed5abdfa  gcc/varasm.h
  fded5307f938c647643e0c2583d58779  gcc/varpool.cc
  b027979c03d820b6ac30b5ae30e840ff  gcc/vec-perm-indices.cc
--- 92337,92347 ----
  bc26a3485cb0a269944b49b2427ca012  gcc/value-range-equiv.cc
  b6d9efd1a637bb7e7bb66614921055be  gcc/value-range-equiv.h
  9ec3280a012fbd643f8fbbee8f79eeca  gcc/value-range.cc
! 69b2679c0b53e16d632831390c411b40  gcc/value-range.h
  10e20613642a5a9dfe658f7b7bee260b  gcc/value-relation.cc
  8e00a37814d00e977bd4878c88c6b9f0  gcc/value-relation.h
  93e740653e6cec3f6c4610b2fdee225a  gcc/var-tracking.cc
! 45bbba7f424b4970f2ccf2ec51d8d13e  gcc/varasm.cc
  8d61ef065460d6dd2c76f09bed5abdfa  gcc/varasm.h
  fded5307f938c647643e0c2583d58779  gcc/varpool.cc
  b027979c03d820b6ac30b5ae30e840ff  gcc/vec-perm-indices.cc
*************** c569eea2f11765b9f2dd3470d3bbbf4b  gcc/vr
*** 92158,92173 ****
  23d5a7e5548f4e13fc245d606c148f40  gcc/wide-int-bitmask.h
  483f48114286da1c540e3b6a9ec3e6b6  gcc/wide-int-print.cc
  09dba6185099df41595ab2939afa51a2  gcc/wide-int-print.h
! eee34cd0ae971df627b488114bed6b73  gcc/wide-int.cc
! e0eec42a4c843f3c3ea448e9f8e895f8  gcc/wide-int.h
  e82d97504c16e7a9d61318fafd536cac  gcc/xcoff.h
  fc8f6cd70740468b3d092d0a12d9c1b8  gcc/xcoffout.cc
  d675816050a9ff3c1178b9cdf507b9c2  gcc/xcoffout.h
! 92a46884b0bd7d7823480f152c32a2b7  gnattools/ChangeLog
  3e149f46f7f39c4f49e3e3449af997a3  gnattools/Makefile.in
  612bff48e9d0bfce4a8a8b2ce0e136ae  gnattools/configure
  5904825aa8ada9f931733a205c8ed847  gnattools/configure.ac
! 235aaa56a4f43a84a901cd414aba935f  gotools/ChangeLog
  5d56cc28c41dee982565dd2bb6835d75  gotools/Makefile.am
  1b3e301307fb3c8ef2e668e88e9da768  gotools/Makefile.in
  7e23031e2e274aaa07b61c1e8f18dc99  gotools/README
--- 92360,92375 ----
  23d5a7e5548f4e13fc245d606c148f40  gcc/wide-int-bitmask.h
  483f48114286da1c540e3b6a9ec3e6b6  gcc/wide-int-print.cc
  09dba6185099df41595ab2939afa51a2  gcc/wide-int-print.h
! d14807031dd3605275dad2f55a263bb8  gcc/wide-int.cc
! a5e6a809a9631072a9f5ed6d7d9489a3  gcc/wide-int.h
  e82d97504c16e7a9d61318fafd536cac  gcc/xcoff.h
  fc8f6cd70740468b3d092d0a12d9c1b8  gcc/xcoffout.cc
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*** 94505,94511 ****
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*************** b4b3ff9a2527e499cebeb7b48c150ff6  libgom
*** 101053,101059 ****
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*** 101099,101110 ****
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*************** b033e9045b45805b9c4de42aa8f1eb17  libgom
*** 101125,101131 ****
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--- 101331,101337 ----
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*************** bddf1919febc77ab73283f66e954b61e  libgom
*** 101206,101211 ****
--- 101412,101418 ----
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*************** dffc3aabaa5b2461aa560fc66c80c0fe  libgom
*** 101449,101454 ****
--- 101656,101662 ----
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*************** ef7b761ee578290c488dcfb7c28a0b66  libgom
*** 102390,102396 ****
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--- 102598,102604 ----
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*************** e8a3245c095430c8ef2413afe2ee4c48  libgom
*** 103039,103045 ****
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*** 103206,103212 ****
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*** 103264,103270 ****
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*** 103310,103316 ****
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*************** a30af7ca948eb564a2533132489a22b2  libobj
*** 103367,103373 ****
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*************** b1def68202639bd452fb59aea3371fe4  liboff
*** 103455,103461 ****
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*** 103464,103470 ****
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*** 103487,103493 ****
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*************** be2340569194e9c072c40fc94eab3483  libpho
*** 104025,104031 ****
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  ff30fe7275b03f69e2a7796e47d142e8  libphobos/src/drtstuff.spec
*************** d7e0be2558cfd762beb23a58be6fc33d  libpho
*** 104050,104056 ****
  757c8eb1d1c8a51cb52672afd0ad6523  libphobos/src/std/compiler.d
  7d70b27133c5d68900d3722282927e68  libphobos/src/std/complex.d
  9d843077700d2f4ce86837f6c490bb1e  libphobos/src/std/concurrency.d
! 004ac7014a2a3eb7d0ec935350093163  libphobos/src/std/container/array.d
  fbf4cee1f26069434cc434da66c2d9a0  libphobos/src/std/container/binaryheap.d
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  df3f67c15b5b7b1af94bf29d9744f005  libphobos/src/std/container/package.d
--- 104258,104264 ----
  757c8eb1d1c8a51cb52672afd0ad6523  libphobos/src/std/compiler.d
  7d70b27133c5d68900d3722282927e68  libphobos/src/std/complex.d
  9d843077700d2f4ce86837f6c490bb1e  libphobos/src/std/concurrency.d
! c2eebb4f46c1e26a43e14ff06660ab15  libphobos/src/std/container/array.d
  fbf4cee1f26069434cc434da66c2d9a0  libphobos/src/std/container/binaryheap.d
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  df3f67c15b5b7b1af94bf29d9744f005  libphobos/src/std/container/package.d
*************** ece83ca6b8d7d3df554ca657bdcc387d  libpho
*** 104179,104185 ****
  f0a368222f2eb4ba986cce7bb91802ce  libphobos/src/std/sumtype.d
  743fc73fb5b932ab501e2690fb60f287  libphobos/src/std/system.d
  16bee9a601a5394901ad560af671980b  libphobos/src/std/traits.d
! cad380d728c4715a4d8f53e6cbee63e9  libphobos/src/std/typecons.d
  8592c7afe7a1de32c25d04e3fa0f2bca  libphobos/src/std/typetuple.d
  745692defd8651a1789b4bfc936271a1  libphobos/src/std/uni/package.d
  c2ff190df1f5298cbcc40494150b1d48  libphobos/src/std/uri.d
--- 104387,104393 ----
  f0a368222f2eb4ba986cce7bb91802ce  libphobos/src/std/sumtype.d
  743fc73fb5b932ab501e2690fb60f287  libphobos/src/std/system.d
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! 65750d9deabecd03d4d1209fc967c46c  libphobos/src/std/typecons.d
  8592c7afe7a1de32c25d04e3fa0f2bca  libphobos/src/std/typetuple.d
  745692defd8651a1789b4bfc936271a1  libphobos/src/std/uni/package.d
  c2ff190df1f5298cbcc40494150b1d48  libphobos/src/std/uri.d
*************** bf5b834c84dce34c411728d08e740501  libpho
*** 104242,104248 ****
  68b182a855dd5d72a6c0afd27961c698  libphobos/testsuite/libphobos.exceptions/unknown_gc.d
  b6ebfcdaf3a8630eae6d2fea0200d718  libphobos/testsuite/libphobos.gc/attributes.d
  5becf076c0fa4681b6900d0d305d77c1  libphobos/testsuite/libphobos.gc/forkgc.d
! 8af09af86fcec343cb88000da6cfb030  libphobos/testsuite/libphobos.gc/forkgc2.d
  774f5323f130348fc511b3351208502e  libphobos/testsuite/libphobos.gc/gc.exp
  2edada512091a3b4061f7667900f9563  libphobos/testsuite/libphobos.gc/nocollect.d
  96e067519bb8d41abce482b6595333aa  libphobos/testsuite/libphobos.gc/precisegc.d
--- 104450,104456 ----
  68b182a855dd5d72a6c0afd27961c698  libphobos/testsuite/libphobos.exceptions/unknown_gc.d
  b6ebfcdaf3a8630eae6d2fea0200d718  libphobos/testsuite/libphobos.gc/attributes.d
  5becf076c0fa4681b6900d0d305d77c1  libphobos/testsuite/libphobos.gc/forkgc.d
! df3ff72b86d93171f71ffc809fb04d95  libphobos/testsuite/libphobos.gc/forkgc2.d
  774f5323f130348fc511b3351208502e  libphobos/testsuite/libphobos.gc/gc.exp
  2edada512091a3b4061f7667900f9563  libphobos/testsuite/libphobos.gc/nocollect.d
  96e067519bb8d41abce482b6595333aa  libphobos/testsuite/libphobos.gc/precisegc.d
*************** d3ca33295a3a7d8dce98defab11dd626  libpho
*** 104298,104304 ****
  0a20e31851bfeb7af5c833abe63b3ba1  libphobos/testsuite/libphobos.unittest/unittest.exp
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! 989d3fc05f2191afc391b94a8b335f71  libquadmath/ChangeLog
  4696eddf264dd090e144b4849b0a6d91  libquadmath/Makefile.am
  644a78a01d94abe28b364eaa21142d82  libquadmath/Makefile.in
  d9afbc1f1e04c7e461265ff9323cc6f4  libquadmath/acinclude.m4
--- 104506,104512 ----
  0a20e31851bfeb7af5c833abe63b3ba1  libphobos/testsuite/libphobos.unittest/unittest.exp
  bf9a9859c3d5e0581c756501aefba7b9  libphobos/testsuite/testsuite_flags.in
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! 22232001f6c99303e8d9eff8388ca7bf  libquadmath/ChangeLog
  4696eddf264dd090e144b4849b0a6d91  libquadmath/Makefile.am
  644a78a01d94abe28b364eaa21142d82  libquadmath/Makefile.in
  d9afbc1f1e04c7e461265ff9323cc6f4  libquadmath/acinclude.m4
*************** d9afbc1f1e04c7e461265ff9323cc6f4  libqua
*** 104306,104312 ****
  cf5a7864ff15ab4dd1604e0f6fe4e501  libquadmath/config.h.in
  29f1dc1d4d1b2c2dde209fe86503326b  libquadmath/configure
  06e51379889d00dc467f2a2d496fa0a7  libquadmath/configure.ac
! ad2f49008e837f007286d54545656dcc  libquadmath/libquadmath.info
  b19dc24b5767bb9f3e4d7b3bb50f9f47  libquadmath/libquadmath.texi
  77280bb7ee423875e03d9c0d34527df6  libquadmath/libtool-version
  452fee0ef153d65eb7413a5103c63a23  libquadmath/math/acoshq.c
--- 104514,104520 ----
  cf5a7864ff15ab4dd1604e0f6fe4e501  libquadmath/config.h.in
  29f1dc1d4d1b2c2dde209fe86503326b  libquadmath/configure
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! f33b7afbc989c830c805e3906f49f823  libquadmath/libquadmath.info
  b19dc24b5767bb9f3e4d7b3bb50f9f47  libquadmath/libquadmath.texi
  77280bb7ee423875e03d9c0d34527df6  libquadmath/libtool-version
  452fee0ef153d65eb7413a5103c63a23  libquadmath/math/acoshq.c
*************** b67a007c23999dda365051cda023edbf  libqua
*** 104420,104427 ****
  dccfb932e7a4ec8c89731a6c7a7a9b82  libquadmath/printf/mul.c
  1cfc3bffd2c94cb06e55b49841dc8f7f  libquadmath/printf/mul_1.c
  f387f032d813cca837e7cf5477e2f6d5  libquadmath/printf/mul_n.c
! 155ece2d5e94e8539083ccfb4779c856  libquadmath/printf/printf_fp.c
! d372c1026983b3d0a5d2fca4a2ff5226  libquadmath/printf/printf_fphex.c
  e1960c6cccb78a5a2d60bdfe428c9d1b  libquadmath/printf/quadmath-printf.c
  793f681760a8266fc2adf2810355df6a  libquadmath/printf/quadmath-printf.h
  4d100ac07c5c1c4033ef4b9f60c96605  libquadmath/printf/rshift.c
--- 104628,104635 ----
  dccfb932e7a4ec8c89731a6c7a7a9b82  libquadmath/printf/mul.c
  1cfc3bffd2c94cb06e55b49841dc8f7f  libquadmath/printf/mul_1.c
  f387f032d813cca837e7cf5477e2f6d5  libquadmath/printf/mul_n.c
! 8f689c2eecdac18dd2ba0d5492bfcd5d  libquadmath/printf/printf_fp.c
! 9bc3ff4862b4fe31d0be46abc64a8bc4  libquadmath/printf/printf_fphex.c
  e1960c6cccb78a5a2d60bdfe428c9d1b  libquadmath/printf/quadmath-printf.c
  793f681760a8266fc2adf2810355df6a  libquadmath/printf/quadmath-printf.h
  4d100ac07c5c1c4033ef4b9f60c96605  libquadmath/printf/rshift.c
*************** e0bd9b8669e44ec6010f92da1d5188ad  libqua
*** 104438,104444 ****
  af84fa5118f4adec8393614994e1c4d6  libquadmath/strtod/strtoflt128.c
  d15a18f7c46ba2add6148edc5b7563c0  libquadmath/strtod/tens_in_limb.c
  12c73a846f7668d29de720bd79502bef  libquadmath/update-quadmath.py
! 21adb4e138b0d07b21ffb5b7797f1d03  libsanitizer/ChangeLog
  63916ba64a3cfa7ce2809fb46ab38597  libsanitizer/HOWTO_MERGE
  0249c37748936faf5b1efd5789587909  libsanitizer/LICENSE.TXT
  eb7d5a3897193a0675d10dd982bfae23  libsanitizer/LOCAL_PATCHES
--- 104646,104652 ----
  af84fa5118f4adec8393614994e1c4d6  libquadmath/strtod/strtoflt128.c
  d15a18f7c46ba2add6148edc5b7563c0  libquadmath/strtod/tens_in_limb.c
  12c73a846f7668d29de720bd79502bef  libquadmath/update-quadmath.py
! 7816518b7997079987d8e04354282881  libsanitizer/ChangeLog
  63916ba64a3cfa7ce2809fb46ab38597  libsanitizer/HOWTO_MERGE
  0249c37748936faf5b1efd5789587909  libsanitizer/LICENSE.TXT
  eb7d5a3897193a0675d10dd982bfae23  libsanitizer/LOCAL_PATCHES
*************** c50a89dac6948f41e92cfe2a810a13f8  libsan
*** 104515,104521 ****
  4d6948c4912be5da16e30aac001b87d7  libsanitizer/config.h.in
  f8900d5fa9ad163e05755076d9d6f33c  libsanitizer/configure
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! 60b96644243456152e202b3863d62262  libsanitizer/configure.tgt
  67b34ddb7e381b476beabd5723cad66a  libsanitizer/hwasan/Makefile.am
  86ee1b4ab68f16b6a2d0b2ed9efc94d4  libsanitizer/hwasan/Makefile.in
  cee328f472ec30601c33b88db78e99e9  libsanitizer/hwasan/hwasan.cpp
--- 104723,104729 ----
  4d6948c4912be5da16e30aac001b87d7  libsanitizer/config.h.in
  f8900d5fa9ad163e05755076d9d6f33c  libsanitizer/configure
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! 04191dbb4e9c8e4f7e942ee188ca7fc7  libsanitizer/configure.tgt
  67b34ddb7e381b476beabd5723cad66a  libsanitizer/hwasan/Makefile.am
  86ee1b4ab68f16b6a2d0b2ed9efc94d4  libsanitizer/hwasan/Makefile.in
  cee328f472ec30601c33b88db78e99e9  libsanitizer/hwasan/hwasan.cpp
*************** bd58abd803667b3373381b6bb1b68f1b  libsan
*** 104909,104915 ****
  545e91fffb8d4987ca5d1c0054aadd11  libsanitizer/ubsan/ubsan_win_dll_thunk.cpp
  e9c85349d92ab1a6b66d0872077acd3b  libsanitizer/ubsan/ubsan_win_dynamic_runtime_thunk.cpp
  72f297f487b6bb9db917cce361192c28  libsanitizer/ubsan/ubsan_win_weak_interception.cpp
! 723d16da34a48581196cf6ac7b5336c6  libssp/ChangeLog
  6a01d14c2cd27212838caea837dc03f3  libssp/Makefile.am
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  f6f6c804e40e3a3ef407d3d13fafb6c0  libssp/aclocal.m4
--- 105117,105123 ----
  545e91fffb8d4987ca5d1c0054aadd11  libsanitizer/ubsan/ubsan_win_dll_thunk.cpp
  e9c85349d92ab1a6b66d0872077acd3b  libsanitizer/ubsan/ubsan_win_dynamic_runtime_thunk.cpp
  72f297f487b6bb9db917cce361192c28  libsanitizer/ubsan/ubsan_win_weak_interception.cpp
! 65af5514b656c4464e11d482b0dc2edb  libssp/ChangeLog
  6a01d14c2cd27212838caea837dc03f3  libssp/Makefile.am
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  f6f6c804e40e3a3ef407d3d13fafb6c0  libssp/aclocal.m4
*************** b7cf7ac9dd30a51c9de8919a232874a4  libssp
*** 104938,104944 ****
  b81de192dda77932887ae66cf31cdd9e  libssp/strncpy-chk.c
  5c71217c6b2a9d406fbc27d0fc6e8042  libssp/vsnprintf-chk.c
  caf814994c08b81abae4688b582bcaf4  libssp/vsprintf-chk.c
! f42c7883b9ccd043a2ac06e4c909c456  libstdc++-v3/ChangeLog
  7aa6c40440a44fcf5ec94c066160c2f8  libstdc++-v3/ChangeLog-1998
  7aff86600b6a1ed3fa87305075a92db0  libstdc++-v3/ChangeLog-1999
  a6f28e8fc9bb07696a9e068b439a3a87  libstdc++-v3/ChangeLog-2000
--- 105146,105152 ----
  b81de192dda77932887ae66cf31cdd9e  libssp/strncpy-chk.c
  5c71217c6b2a9d406fbc27d0fc6e8042  libssp/vsnprintf-chk.c
  caf814994c08b81abae4688b582bcaf4  libssp/vsprintf-chk.c
! b0f94faa585f575db7e4da71ad9544ac  libstdc++-v3/ChangeLog
  7aa6c40440a44fcf5ec94c066160c2f8  libstdc++-v3/ChangeLog-1998
  7aff86600b6a1ed3fa87305075a92db0  libstdc++-v3/ChangeLog-1999
  a6f28e8fc9bb07696a9e068b439a3a87  libstdc++-v3/ChangeLog-2000
*************** a8f4290dba5b481ad426148a03c75dd0  libstd
*** 104966,104974 ****
  6a380413ccbbfc2fdf8d8bc0138fbbd9  libstdc++-v3/Makefile.am
  19c8cb7684c2596811789c770fbe79fc  libstdc++-v3/Makefile.in
  f372af73db4ac0ad88e43199e1f29e08  libstdc++-v3/README
! 23dae2d9ee02fa80e44e1409f1b3e666  libstdc++-v3/acinclude.m4
  734c1cbc8791fbceb09b49c5d07d6966  libstdc++-v3/aclocal.m4
! 4d6b9664edbfbcffc7321a2d0843b55e  libstdc++-v3/config.h.in
  b321f08c525a980d5443810305bb4463  libstdc++-v3/config/abi/compatibility.h
  1e503159ee7333dd5a3f9df292325d11  libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt
  730569c0ef38f6e6322b3c4ac65253ce  libstdc++-v3/config/abi/post/alpha-linux-gnu/baseline_symbols.txt
--- 105174,105182 ----
  6a380413ccbbfc2fdf8d8bc0138fbbd9  libstdc++-v3/Makefile.am
  19c8cb7684c2596811789c770fbe79fc  libstdc++-v3/Makefile.in
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! 53146b59a99fb6a2e1b6850d5b76bdf2  libstdc++-v3/acinclude.m4
  734c1cbc8791fbceb09b49c5d07d6966  libstdc++-v3/aclocal.m4
! 5c576390e1b3345bb87af431246c8203  libstdc++-v3/config.h.in
  b321f08c525a980d5443810305bb4463  libstdc++-v3/config/abi/compatibility.h
  1e503159ee7333dd5a3f9df292325d11  libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt
  730569c0ef38f6e6322b3c4ac65253ce  libstdc++-v3/config/abi/post/alpha-linux-gnu/baseline_symbols.txt
*************** a26caf1cbae7ec64ae4fbb6f805c0a43  libstd
*** 105028,105034 ****
  c975e13735ebb9be1461f2ad8ac4410d  libstdc++-v3/config/cpu/sh/atomicity.h
  ef2abdb7456c30a1284e9c584aa6c997  libstdc++-v3/config/cpu/sparc/atomic_word.h
  ad343c746c7e744633b4f289946e24e2  libstdc++-v3/config/cpu/sparc/atomicity.h
! cc22c8b1fb2381085637d59007445f35  libstdc++-v3/config/io/basic_file_stdio.cc
  6cf1e4b1e947dc35dd4afd51c59dd19f  libstdc++-v3/config/io/basic_file_stdio.h
  a318b6ec50abc4d7950c4833d5b47e87  libstdc++-v3/config/io/c_io_stdio.h
  f56c983e3b553cbca607693455c506dc  libstdc++-v3/config/locale/darwin/ctype_members.cc
--- 105236,105242 ----
  c975e13735ebb9be1461f2ad8ac4410d  libstdc++-v3/config/cpu/sh/atomicity.h
  ef2abdb7456c30a1284e9c584aa6c997  libstdc++-v3/config/cpu/sparc/atomic_word.h
  ad343c746c7e744633b4f289946e24e2  libstdc++-v3/config/cpu/sparc/atomicity.h
! 8220b0d50652281032e9db975ca8a6e7  libstdc++-v3/config/io/basic_file_stdio.cc
  6cf1e4b1e947dc35dd4afd51c59dd19f  libstdc++-v3/config/io/basic_file_stdio.h
  a318b6ec50abc4d7950c4833d5b47e87  libstdc++-v3/config/io/c_io_stdio.h
  f56c983e3b553cbca607693455c506dc  libstdc++-v3/config/locale/darwin/ctype_members.cc
*************** cf2c568c51de05c8c9ea4fc73cc4a7d1  libstd
*** 105083,105089 ****
  4dba8f5fff21b944bc6c09b7476a0cbe  libstdc++-v3/config/os/bsd/darwin/ctype_base.h
  98b61494bb0364dd62a284430d82b6f8  libstdc++-v3/config/os/bsd/darwin/ctype_configure_char.cc
  bea58f0b1462adb4715391585424c2f4  libstdc++-v3/config/os/bsd/darwin/ctype_inline.h
! 89a3b806f2477b51ebadc834cacf5569  libstdc++-v3/config/os/bsd/darwin/os_defines.h
  9e91dfcb11e4c78744df0e1e0cf69b5b  libstdc++-v3/config/os/bsd/darwin/ppc-extra.ver
  0ce4b7914f00fd6af304f11efd7cfd30  libstdc++-v3/config/os/bsd/dragonfly/ctype_base.h
  eec583ae69a4a2889d741f1943ff6d81  libstdc++-v3/config/os/bsd/dragonfly/ctype_configure_char.cc
--- 105291,105297 ----
  4dba8f5fff21b944bc6c09b7476a0cbe  libstdc++-v3/config/os/bsd/darwin/ctype_base.h
  98b61494bb0364dd62a284430d82b6f8  libstdc++-v3/config/os/bsd/darwin/ctype_configure_char.cc
  bea58f0b1462adb4715391585424c2f4  libstdc++-v3/config/os/bsd/darwin/ctype_inline.h
! 61f3c170f9c486a7e15964376e922a65  libstdc++-v3/config/os/bsd/darwin/os_defines.h
  9e91dfcb11e4c78744df0e1e0cf69b5b  libstdc++-v3/config/os/bsd/darwin/ppc-extra.ver
  0ce4b7914f00fd6af304f11efd7cfd30  libstdc++-v3/config/os/bsd/dragonfly/ctype_base.h
  eec583ae69a4a2889d741f1943ff6d81  libstdc++-v3/config/os/bsd/dragonfly/ctype_configure_char.cc
*************** b32b29daa3ac6240ae38f37366b0d4da  libstd
*** 105156,105163 ****
  78d15556a78885c1221dbb429fd77a08  libstdc++-v3/config/os/vxworks/ctype_configure_char.cc
  11c759cf4b750f149bca3052e251404d  libstdc++-v3/config/os/vxworks/ctype_inline.h
  a58306525e8e9363101bf5738db96b46  libstdc++-v3/config/os/vxworks/os_defines.h
! 07fe1df6923c77da58d3ac4ad7b046be  libstdc++-v3/configure
! 66ce87efbc534ee0cded86eba4d48aeb  libstdc++-v3/configure.ac
  6f48d91af78c16e62f258e7bedec5125  libstdc++-v3/configure.host
  584164974df7c169b96d93356371b4a7  libstdc++-v3/crossconfig.m4
  894b6a88368e88c0d19c47645d774272  libstdc++-v3/doc/Makefile.am
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  6b1e3f2a153145ca36e79c175901ed4a  libstdc++-v3/include/backward/binders.h
  11289cccffdd5941fbc099dfde3bf5e7  libstdc++-v3/include/backward/hash_fun.h
*************** f405d265bf2ae2b1dc65804f90517ae6  libstd
*** 105609,105659 ****
  c182ef70f8140930d68b4febf211cd38  libstdc++-v3/include/backward/hash_set
  0786c5fabbdc02e1b5d7f5941b1036f0  libstdc++-v3/include/backward/hashtable.h
  e87dd399a9a3274bd93b51404f64d0bf  libstdc++-v3/include/backward/strstream
! dd3f7f524033a844f5bb1056a873b4ff  libstdc++-v3/include/bits/algorithmfwd.h
  7217663cbd5e0a5e2111f3fec04713c8  libstdc++-v3/include/bits/align.h
! fd441eaab0a8965f7012f98a3edcbb86  libstdc++-v3/include/bits/alloc_traits.h
  6c08ea97cd0ca641b7c6a4e7a687cd0e  libstdc++-v3/include/bits/allocated_ptr.h
! 6fa856a93062ce2b39cf0c9a3a6a3468  libstdc++-v3/include/bits/allocator.h
! a1f49462067f381335c5712907aac440  libstdc++-v3/include/bits/atomic_base.h
  7d8c351bca946a7fab5426d823e9989f  libstdc++-v3/include/bits/atomic_futex.h
  2bc333d129d557e353930e14487d1089  libstdc++-v3/include/bits/atomic_timed_wait.h
  6d4afbc0d502087a5e1d9be679beaf84  libstdc++-v3/include/bits/atomic_wait.h
  1e7a7ec7b70380fec2fae7859f444a62  libstdc++-v3/include/bits/basic_ios.h
  5138e57b1c4bb47b788cf001a00d5e83  libstdc++-v3/include/bits/basic_ios.tcc
! d917f45f52129dd5db90487dd896a862  libstdc++-v3/include/bits/basic_string.h
! 55116d4c1948fa70cbdfabfbe6155c2a  libstdc++-v3/include/bits/basic_string.tcc
  29b717115b885d97e144509c7987d132  libstdc++-v3/include/bits/boost_concept_check.h
  b812f02d862ef0991e7444eeb075e24b  libstdc++-v3/include/bits/c++0x_warning.h
! 730a9760f569df98df8fd3fd78961745  libstdc++-v3/include/bits/c++config
! cc58aeb935ac6f897d8057e145b0f694  libstdc++-v3/include/bits/char_traits.h
  1e60fddeaaeb6880b640941bee6ce9ea  libstdc++-v3/include/bits/charconv.h
! d5eb654578b300b90c0ce1fd859fc4d7  libstdc++-v3/include/bits/chrono.h
  3e9cf75ed9ed37659eac8d4ff38d8f97  libstdc++-v3/include/bits/codecvt.h
  07d6e1893b90a983d593ee7fb21310ed  libstdc++-v3/include/bits/concept_check.h
! 015da4a305462082b6be424248744c97  libstdc++-v3/include/bits/cow_string.h
  834baaab8c868bfccd5bf4fd671ff55b  libstdc++-v3/include/bits/cpp_type_traits.h
  eedc4c8df05c6edc00d2429148559730  libstdc++-v3/include/bits/deque.tcc
  e2975f99f1320ed7aea974ab28e63548  libstdc++-v3/include/bits/enable_special_members.h
  5b841f3a77d290016be71c2ec593e5ee  libstdc++-v3/include/bits/erase_if.h
! d8fee3f5100fd27cac74eb8d143c125e  libstdc++-v3/include/bits/forward_list.h
  6a9e63a5a5b9d8d66230e7498a13a8ac  libstdc++-v3/include/bits/forward_list.tcc
! 06666e6cc9950a3aa955acbae3eb28a0  libstdc++-v3/include/bits/fs_dir.h
  c754907ea8fca8ebfbbd704b0a111dd0  libstdc++-v3/include/bits/fs_fwd.h
! cfd0f2b837bcd99a02d5c7582c18aca4  libstdc++-v3/include/bits/fs_ops.h
! 269b1f0ebd2afa484bd2dd5afa809afe  libstdc++-v3/include/bits/fs_path.h
  7907281755e6b0faa1dfdce636aaa01f  libstdc++-v3/include/bits/fstream.tcc
  a363406ed41198146320f1e077ba3f30  libstdc++-v3/include/bits/functexcept.h
  69623b8458c64a8fc398295e296f4d44  libstdc++-v3/include/bits/functional_hash.h
  3461cc1f731e7f5eab3dfae226db37ea  libstdc++-v3/include/bits/gslice.h
  bfcab028fa2389b4368fedf2ef42c7a3  libstdc++-v3/include/bits/gslice_array.h
! da17bc523256518623e8ec71acb3886d  libstdc++-v3/include/bits/hashtable.h
! a6fcc0732f7e61f215e9ca88f9c795f6  libstdc++-v3/include/bits/hashtable_policy.h
  b7f492a3c197876ddbec011b1ee1c815  libstdc++-v3/include/bits/indirect_array.h
  36f0ed82567fccf4c612b30c6fb08084  libstdc++-v3/include/bits/invoke.h
  53c51c3f00094b1c64caa1bc34dcb29d  libstdc++-v3/include/bits/ios_base.h
  1d80ed8d4657605e55337056a44f4ef7  libstdc++-v3/include/bits/istream.tcc
! 4bfec191df898b11fcfe5ad477868278  libstdc++-v3/include/bits/iterator_concepts.h
! b4bd40923ef5db1adecc4c8cae565963  libstdc++-v3/include/bits/list.tcc
  a9565f66bcc3c46bbc030e0ef2ab1ed9  libstdc++-v3/include/bits/locale_classes.h
  e1da42ac46dbd6c74562953047c225cb  libstdc++-v3/include/bits/locale_classes.tcc
  33034d2531967431e8e609ac63cd3573  libstdc++-v3/include/bits/locale_conv.h
--- 105817,105867 ----
  c182ef70f8140930d68b4febf211cd38  libstdc++-v3/include/backward/hash_set
  0786c5fabbdc02e1b5d7f5941b1036f0  libstdc++-v3/include/backward/hashtable.h
  e87dd399a9a3274bd93b51404f64d0bf  libstdc++-v3/include/backward/strstream
! 55d94cba1b89ba2364853d3bf7ad3b62  libstdc++-v3/include/bits/algorithmfwd.h
  7217663cbd5e0a5e2111f3fec04713c8  libstdc++-v3/include/bits/align.h
! d3293889955e929d58e1f028de6cf29e  libstdc++-v3/include/bits/alloc_traits.h
  6c08ea97cd0ca641b7c6a4e7a687cd0e  libstdc++-v3/include/bits/allocated_ptr.h
! 7362644b2dafeb066cea713bcb177b3f  libstdc++-v3/include/bits/allocator.h
! 55027045dee573f454c97fe82d8a6947  libstdc++-v3/include/bits/atomic_base.h
  7d8c351bca946a7fab5426d823e9989f  libstdc++-v3/include/bits/atomic_futex.h
  2bc333d129d557e353930e14487d1089  libstdc++-v3/include/bits/atomic_timed_wait.h
  6d4afbc0d502087a5e1d9be679beaf84  libstdc++-v3/include/bits/atomic_wait.h
  1e7a7ec7b70380fec2fae7859f444a62  libstdc++-v3/include/bits/basic_ios.h
  5138e57b1c4bb47b788cf001a00d5e83  libstdc++-v3/include/bits/basic_ios.tcc
! 855ed4c5516f043899142200fbe87e6d  libstdc++-v3/include/bits/basic_string.h
! e389499c773300716ed61afb7807e81e  libstdc++-v3/include/bits/basic_string.tcc
  29b717115b885d97e144509c7987d132  libstdc++-v3/include/bits/boost_concept_check.h
  b812f02d862ef0991e7444eeb075e24b  libstdc++-v3/include/bits/c++0x_warning.h
! 8ec1bbae0da273ee03ccd9422ac9eaa9  libstdc++-v3/include/bits/c++config
! a263a3f3602f70203473b672d17c8a72  libstdc++-v3/include/bits/char_traits.h
  1e60fddeaaeb6880b640941bee6ce9ea  libstdc++-v3/include/bits/charconv.h
! 4a85035bd13609f152e96c57bda26cd9  libstdc++-v3/include/bits/chrono.h
  3e9cf75ed9ed37659eac8d4ff38d8f97  libstdc++-v3/include/bits/codecvt.h
  07d6e1893b90a983d593ee7fb21310ed  libstdc++-v3/include/bits/concept_check.h
! dc4f7a9bf49f92b36f90bb74df54e3e8  libstdc++-v3/include/bits/cow_string.h
  834baaab8c868bfccd5bf4fd671ff55b  libstdc++-v3/include/bits/cpp_type_traits.h
  eedc4c8df05c6edc00d2429148559730  libstdc++-v3/include/bits/deque.tcc
  e2975f99f1320ed7aea974ab28e63548  libstdc++-v3/include/bits/enable_special_members.h
  5b841f3a77d290016be71c2ec593e5ee  libstdc++-v3/include/bits/erase_if.h
! df585b647bf64527d75a18d706b9c354  libstdc++-v3/include/bits/forward_list.h
  6a9e63a5a5b9d8d66230e7498a13a8ac  libstdc++-v3/include/bits/forward_list.tcc
! 376a9c72a01c6351fdb3ea876ab1d7fc  libstdc++-v3/include/bits/fs_dir.h
  c754907ea8fca8ebfbbd704b0a111dd0  libstdc++-v3/include/bits/fs_fwd.h
! 24187ccfba5ea82f6400131a7949b9df  libstdc++-v3/include/bits/fs_ops.h
! b8ff50c36c207a47bb5f4c1209b3ee00  libstdc++-v3/include/bits/fs_path.h
  7907281755e6b0faa1dfdce636aaa01f  libstdc++-v3/include/bits/fstream.tcc
  a363406ed41198146320f1e077ba3f30  libstdc++-v3/include/bits/functexcept.h
  69623b8458c64a8fc398295e296f4d44  libstdc++-v3/include/bits/functional_hash.h
  3461cc1f731e7f5eab3dfae226db37ea  libstdc++-v3/include/bits/gslice.h
  bfcab028fa2389b4368fedf2ef42c7a3  libstdc++-v3/include/bits/gslice_array.h
! 331cf9e6a2ec84d2a3fbdcb34cfb4aa0  libstdc++-v3/include/bits/hashtable.h
! 498141d0967c9c29ae6233a318116deb  libstdc++-v3/include/bits/hashtable_policy.h
  b7f492a3c197876ddbec011b1ee1c815  libstdc++-v3/include/bits/indirect_array.h
  36f0ed82567fccf4c612b30c6fb08084  libstdc++-v3/include/bits/invoke.h
  53c51c3f00094b1c64caa1bc34dcb29d  libstdc++-v3/include/bits/ios_base.h
  1d80ed8d4657605e55337056a44f4ef7  libstdc++-v3/include/bits/istream.tcc
! 3adb8ab51f9c7988be4310e07e79698a  libstdc++-v3/include/bits/iterator_concepts.h
! b3dc3c673a64ac23e73f09567dc0b9b3  libstdc++-v3/include/bits/list.tcc
  a9565f66bcc3c46bbc030e0ef2ab1ed9  libstdc++-v3/include/bits/locale_classes.h
  e1da42ac46dbd6c74562953047c225cb  libstdc++-v3/include/bits/locale_classes.tcc
  33034d2531967431e8e609ac63cd3573  libstdc++-v3/include/bits/locale_conv.h
*************** e7ba553e9ab184f5bd68cc7606d816d2  libstd
*** 105668,105684 ****
  7b351469ff54ea35e3e585733ed01c68  libstdc++-v3/include/bits/mofunc_impl.h
  0c3876f398d8dc449bea393734a87ee1  libstdc++-v3/include/bits/move.h
  6c3144ba196d4dbb3fabe7a3235678a8  libstdc++-v3/include/bits/move_only_function.h
! 6b069d101319ece6de3732b658fb1d77  libstdc++-v3/include/bits/new_allocator.h
! 27c968d51ee063ecd3245faa3a6a77b4  libstdc++-v3/include/bits/node_handle.h
  865dc3b8fd8ea9325101bbde9ca457d5  libstdc++-v3/include/bits/ostream.tcc
! 02068878ffa064cf4d81d74fcfa8706a  libstdc++-v3/include/bits/ostream_insert.h
  0dd1b9e9caf16df51df5b5d72c3c5a88  libstdc++-v3/include/bits/parse_numbers.h
  093924672c05904d8e0e1ca87cd021b0  libstdc++-v3/include/bits/postypes.h
  a42f8fd86dfe94e0818cf65d60c0c495  libstdc++-v3/include/bits/predefined_ops.h
! 9b5bf297da766c3f1b9b4657c4f62700  libstdc++-v3/include/bits/ptr_traits.h
! 0db2d39069ef28c3a38688814e808f30  libstdc++-v3/include/bits/quoted_string.h
  c49033f669b537de224bb51e9daac558  libstdc++-v3/include/bits/random.h
! 28800a1dcd1ae032fee845b2f75e4195  libstdc++-v3/include/bits/random.tcc
  1127c7558c4cba717dab561411781868  libstdc++-v3/include/bits/range_access.h
  a93916f72be5983f50e58dcf45bebc66  libstdc++-v3/include/bits/ranges_algo.h
  88b0d11c505562ea7e9a0f6e79378a84  libstdc++-v3/include/bits/ranges_algobase.h
--- 105876,105892 ----
  7b351469ff54ea35e3e585733ed01c68  libstdc++-v3/include/bits/mofunc_impl.h
  0c3876f398d8dc449bea393734a87ee1  libstdc++-v3/include/bits/move.h
  6c3144ba196d4dbb3fabe7a3235678a8  libstdc++-v3/include/bits/move_only_function.h
! f83703c5dc2b5a0391d381f9d92c5e98  libstdc++-v3/include/bits/new_allocator.h
! 94407653d54e092d9f41de76ce8f1e32  libstdc++-v3/include/bits/node_handle.h
  865dc3b8fd8ea9325101bbde9ca457d5  libstdc++-v3/include/bits/ostream.tcc
! adf2e5a7969ff8d86aa467d982a1701e  libstdc++-v3/include/bits/ostream_insert.h
  0dd1b9e9caf16df51df5b5d72c3c5a88  libstdc++-v3/include/bits/parse_numbers.h
  093924672c05904d8e0e1ca87cd021b0  libstdc++-v3/include/bits/postypes.h
  a42f8fd86dfe94e0818cf65d60c0c495  libstdc++-v3/include/bits/predefined_ops.h
! 2beadb8012099b3b2e435d6785332dbb  libstdc++-v3/include/bits/ptr_traits.h
! d3637cd743fa97c819dcc90426acee0d  libstdc++-v3/include/bits/quoted_string.h
  c49033f669b537de224bb51e9daac558  libstdc++-v3/include/bits/random.h
! 1bd2dbed412f1286b2bd6a4e31980b0e  libstdc++-v3/include/bits/random.tcc
  1127c7558c4cba717dab561411781868  libstdc++-v3/include/bits/range_access.h
  a93916f72be5983f50e58dcf45bebc66  libstdc++-v3/include/bits/ranges_algo.h
  88b0d11c505562ea7e9a0f6e79378a84  libstdc++-v3/include/bits/ranges_algobase.h
*************** a45a0035a2ea36833ccd76f01c3674ca  libstd
*** 105687,105719 ****
  154dfd0c70357290b292fa1de3b6b20d  libstdc++-v3/include/bits/ranges_uninitialized.h
  f64c8eee99550f162748196f92025465  libstdc++-v3/include/bits/ranges_util.h
  7134478b2d6962986c8f55feda96f290  libstdc++-v3/include/bits/refwrap.h
! d9c3db17bad25dd466918cd85a244b4a  libstdc++-v3/include/bits/regex.h
  afdda3aa1dbf0e29afa3e1195f5b261f  libstdc++-v3/include/bits/regex.tcc
! 503406f4e782b783c010ffd824341d1e  libstdc++-v3/include/bits/regex_automaton.h
! 56f4b806c3e207e0d4d03ff274e75416  libstdc++-v3/include/bits/regex_automaton.tcc
  abc4868fa7fa69f1ec4bfe9357086f37  libstdc++-v3/include/bits/regex_compiler.h
  c618ded2f7e5df12c5292a63b1c35049  libstdc++-v3/include/bits/regex_compiler.tcc
! 3adc887953dc0fe5a5bea29e5a6c58d0  libstdc++-v3/include/bits/regex_constants.h
! d5427142e821959fa84b6fab58b82d40  libstdc++-v3/include/bits/regex_error.h
! 9e790bedbc4477ba162c19583cac5d44  libstdc++-v3/include/bits/regex_executor.h
! fa2cbcf47f72200af80a8827b2ec5216  libstdc++-v3/include/bits/regex_executor.tcc
  aba82e3133a961d21651b1e236e83955  libstdc++-v3/include/bits/regex_scanner.h
! 84c97e63ca73478752f1837edd8be39e  libstdc++-v3/include/bits/regex_scanner.tcc
  56efa2d600a18ebb013d6683df7d5139  libstdc++-v3/include/bits/semaphore_base.h
  88e13dbb751546443834154ec05bc922  libstdc++-v3/include/bits/shared_ptr.h
! ba41406da6fd97e8f21c90d7c66ad8b5  libstdc++-v3/include/bits/shared_ptr_atomic.h
! f141636c2a59134096ca285caf4f89ae  libstdc++-v3/include/bits/shared_ptr_base.h
  c9e42ab2b6cc1a8edc95c127dc513314  libstdc++-v3/include/bits/slice_array.h
  ba8703462210c53c0fea444a0d04e75f  libstdc++-v3/include/bits/specfun.h
  a4f0ee46114c7eb871e66f07be86d815  libstdc++-v3/include/bits/sstream.tcc
! f9d284276be9b9f792be818fe5ee534e  libstdc++-v3/include/bits/std_abs.h
  031acde85a8896c1ea19c4da889cae8c  libstdc++-v3/include/bits/std_function.h
! 0c1631ea9c6b77a42132f78e7028b526  libstdc++-v3/include/bits/std_mutex.h
  64d1fbbc59f75721c436b611254c743a  libstdc++-v3/include/bits/std_thread.h
! 1f80f17ff9e3b6ed9cc1dacee5649bef  libstdc++-v3/include/bits/stl_algo.h
! 1a6791fdba310103ceb325f334cf0b22  libstdc++-v3/include/bits/stl_algobase.h
! 7659d664f0aa080aa638ffb1531778da  libstdc++-v3/include/bits/stl_bvector.h
! ceba413818ae9b0f6742666be9b2ed67  libstdc++-v3/include/bits/stl_construct.h
  3dc1cd32df14abc94da494258ef5ae60  libstdc++-v3/include/bits/stl_deque.h
  63fc7573f04ccb8f515906b34e2fa890  libstdc++-v3/include/bits/stl_function.h
  6af963f90d2b295e1816b415f43c6e38  libstdc++-v3/include/bits/stl_heap.h
--- 105895,105927 ----
  154dfd0c70357290b292fa1de3b6b20d  libstdc++-v3/include/bits/ranges_uninitialized.h
  f64c8eee99550f162748196f92025465  libstdc++-v3/include/bits/ranges_util.h
  7134478b2d6962986c8f55feda96f290  libstdc++-v3/include/bits/refwrap.h
! b3d1d1fb010cbdbdf16a3356bb857104  libstdc++-v3/include/bits/regex.h
  afdda3aa1dbf0e29afa3e1195f5b261f  libstdc++-v3/include/bits/regex.tcc
! 7e6e868eb004537605330be8ad018752  libstdc++-v3/include/bits/regex_automaton.h
! 521ec6125a927ad13bce983367a2f289  libstdc++-v3/include/bits/regex_automaton.tcc
  abc4868fa7fa69f1ec4bfe9357086f37  libstdc++-v3/include/bits/regex_compiler.h
  c618ded2f7e5df12c5292a63b1c35049  libstdc++-v3/include/bits/regex_compiler.tcc
! 3960da4cd6e735289649a48923d88f64  libstdc++-v3/include/bits/regex_constants.h
! 88b8606dfb1e709785797b445fe59699  libstdc++-v3/include/bits/regex_error.h
! 9ba7811079918f5235c24ee1798d23bd  libstdc++-v3/include/bits/regex_executor.h
! 0e11f3f9802a812a4e4372f540c8c3d8  libstdc++-v3/include/bits/regex_executor.tcc
  aba82e3133a961d21651b1e236e83955  libstdc++-v3/include/bits/regex_scanner.h
! 0c9f47c6f496065e3910ee15866fc14f  libstdc++-v3/include/bits/regex_scanner.tcc
  56efa2d600a18ebb013d6683df7d5139  libstdc++-v3/include/bits/semaphore_base.h
  88e13dbb751546443834154ec05bc922  libstdc++-v3/include/bits/shared_ptr.h
! b0cc86dbb28ea6fb59967062545ebbe1  libstdc++-v3/include/bits/shared_ptr_atomic.h
! b2f3213aa088325c7c49dd690925071e  libstdc++-v3/include/bits/shared_ptr_base.h
  c9e42ab2b6cc1a8edc95c127dc513314  libstdc++-v3/include/bits/slice_array.h
  ba8703462210c53c0fea444a0d04e75f  libstdc++-v3/include/bits/specfun.h
  a4f0ee46114c7eb871e66f07be86d815  libstdc++-v3/include/bits/sstream.tcc
! fd4d88db8c05379090bee503697c1cce  libstdc++-v3/include/bits/std_abs.h
  031acde85a8896c1ea19c4da889cae8c  libstdc++-v3/include/bits/std_function.h
! b8ca4407175edde886c753e9218e35f7  libstdc++-v3/include/bits/std_mutex.h
  64d1fbbc59f75721c436b611254c743a  libstdc++-v3/include/bits/std_thread.h
! 093480d0a62d296a1ca12faa241c4e2d  libstdc++-v3/include/bits/stl_algo.h
! f52c1e15d6ceb9fae0fb0afe04ef4eb5  libstdc++-v3/include/bits/stl_algobase.h
! 2286695ca0fa1999d0f31443691a93d5  libstdc++-v3/include/bits/stl_bvector.h
! 1880b4f432a7cb200d74a3a48081e770  libstdc++-v3/include/bits/stl_construct.h
  3dc1cd32df14abc94da494258ef5ae60  libstdc++-v3/include/bits/stl_deque.h
  63fc7573f04ccb8f515906b34e2fa890  libstdc++-v3/include/bits/stl_function.h
  6af963f90d2b295e1816b415f43c6e38  libstdc++-v3/include/bits/stl_heap.h
*************** ceba413818ae9b0f6742666be9b2ed67  libstd
*** 105721,105754 ****
  38b2a8b62aa295bca5f77a15903f4deb  libstdc++-v3/include/bits/stl_iterator_base_funcs.h
  bce36b604a747a8f3a8ce8c38a7ac225  libstdc++-v3/include/bits/stl_iterator_base_types.h
  73516b0fa035db1e298f5594effbdd24  libstdc++-v3/include/bits/stl_list.h
! f18c995445c8115b28fe5595fc6ef3fd  libstdc++-v3/include/bits/stl_map.h
! 77aa4b615a1562873ee78d8dd6ebcd56  libstdc++-v3/include/bits/stl_multimap.h
! 84946df670c054babd87fa8079a34db7  libstdc++-v3/include/bits/stl_multiset.h
! 36db7ae47394e395415a70ef7cf15fa3  libstdc++-v3/include/bits/stl_numeric.h
! f2351ea411e0407b28929ea2397f6e3f  libstdc++-v3/include/bits/stl_pair.h
  7e6a9bfd3a1772b29829e5f721cfd888  libstdc++-v3/include/bits/stl_queue.h
  ca3e0abe0e9c127479cabae81f09acc0  libstdc++-v3/include/bits/stl_raw_storage_iter.h
  0ec171924cece31342e93ace4c4449fa  libstdc++-v3/include/bits/stl_relops.h
! 4935a22000c5af7a654163249f54cba9  libstdc++-v3/include/bits/stl_set.h
  fe9061931e58eb13610622c957ad8bfe  libstdc++-v3/include/bits/stl_stack.h
! 469a3342893403dff08e484a26d87835  libstdc++-v3/include/bits/stl_tempbuf.h
! 9845b4f95b2f060fd6f4b98136e8ad1d  libstdc++-v3/include/bits/stl_tree.h
! 76b804c7705a952d454f754eea890c01  libstdc++-v3/include/bits/stl_uninitialized.h
! 8db44c3d22440641ac1ba040d9370a58  libstdc++-v3/include/bits/stl_vector.h
! a04724c39d37f5ef63faf8eb2f98eb63  libstdc++-v3/include/bits/stream_iterator.h
  b0fcb882a7290e08ca43e14029ec35de  libstdc++-v3/include/bits/streambuf.tcc
  0bc57a4d1e53acce822697a7a2af289e  libstdc++-v3/include/bits/streambuf_iterator.h
  4b309c48dd81f69fe08fb04bf101abca  libstdc++-v3/include/bits/string_view.tcc
  26f486326c4d6cb8b037baaec6a47af8  libstdc++-v3/include/bits/stringfwd.h
  2a83d892a641f4d5d627db796cc45fe5  libstdc++-v3/include/bits/this_thread_sleep.h
  1aa49350032bcc3a2864897c5791200a  libstdc++-v3/include/bits/uniform_int_dist.h
! fcb492cbf26ebf3de0d70188eeb44113  libstdc++-v3/include/bits/unique_lock.h
! 5afa5b43c03beeacf055d44cdc4bb0e6  libstdc++-v3/include/bits/unique_ptr.h
! 66681adabd3b1d78b8c1598cf4ef6582  libstdc++-v3/include/bits/unordered_map.h
! 2d0f973ffc37cccad521ff7eb0b346d0  libstdc++-v3/include/bits/unordered_set.h
  8fb0bb8a0e08dbc54c6967e43841de9b  libstdc++-v3/include/bits/uses_allocator.h
  7a8e68f36176e9a758f949e3cbaeaf5a  libstdc++-v3/include/bits/uses_allocator_args.h
! 3f505dbdde1dde722e40ea133f643c4f  libstdc++-v3/include/bits/utility.h
  092d0d9f5c5948cb4e5d52b7a5f06923  libstdc++-v3/include/bits/valarray_after.h
  d1794ea86712506af9ad861dfbec9f9b  libstdc++-v3/include/bits/valarray_array.h
  39a6066d7b092ff20a6731264df6ca7e  libstdc++-v3/include/bits/valarray_array.tcc
--- 105929,105962 ----
  38b2a8b62aa295bca5f77a15903f4deb  libstdc++-v3/include/bits/stl_iterator_base_funcs.h
  bce36b604a747a8f3a8ce8c38a7ac225  libstdc++-v3/include/bits/stl_iterator_base_types.h
  73516b0fa035db1e298f5594effbdd24  libstdc++-v3/include/bits/stl_list.h
! 4b4edd2061cbc542c0bb0ff9a0243660  libstdc++-v3/include/bits/stl_map.h
! e326d8cc250ea138fc27585199b9ea1e  libstdc++-v3/include/bits/stl_multimap.h
! a3f8636902da48b83d3aed3621f4a776  libstdc++-v3/include/bits/stl_multiset.h
! 9811bf3c5dc9533306316cac37dbffa3  libstdc++-v3/include/bits/stl_numeric.h
! 17fdc542c1673cbf2246762910ac362d  libstdc++-v3/include/bits/stl_pair.h
  7e6a9bfd3a1772b29829e5f721cfd888  libstdc++-v3/include/bits/stl_queue.h
  ca3e0abe0e9c127479cabae81f09acc0  libstdc++-v3/include/bits/stl_raw_storage_iter.h
  0ec171924cece31342e93ace4c4449fa  libstdc++-v3/include/bits/stl_relops.h
! 3b05d03afaef0afb569b1f6a5964e6e1  libstdc++-v3/include/bits/stl_set.h
  fe9061931e58eb13610622c957ad8bfe  libstdc++-v3/include/bits/stl_stack.h
! 1b1faa88b3cc0d6a85478ff95f6ecfe3  libstdc++-v3/include/bits/stl_tempbuf.h
! b0f070805933485a32b6dcd875ddf57b  libstdc++-v3/include/bits/stl_tree.h
! 896cdab3151745d4496c63e8ebf4a4d4  libstdc++-v3/include/bits/stl_uninitialized.h
! 859577cb28ce25a2a0926b0cacd04970  libstdc++-v3/include/bits/stl_vector.h
! 865f635f62f4671aab4c1aa924218fe4  libstdc++-v3/include/bits/stream_iterator.h
  b0fcb882a7290e08ca43e14029ec35de  libstdc++-v3/include/bits/streambuf.tcc
  0bc57a4d1e53acce822697a7a2af289e  libstdc++-v3/include/bits/streambuf_iterator.h
  4b309c48dd81f69fe08fb04bf101abca  libstdc++-v3/include/bits/string_view.tcc
  26f486326c4d6cb8b037baaec6a47af8  libstdc++-v3/include/bits/stringfwd.h
  2a83d892a641f4d5d627db796cc45fe5  libstdc++-v3/include/bits/this_thread_sleep.h
  1aa49350032bcc3a2864897c5791200a  libstdc++-v3/include/bits/uniform_int_dist.h
! 312a506d6494cd60840850f99356560e  libstdc++-v3/include/bits/unique_lock.h
! 130f210b2e6914a807ebd7caab4be54f  libstdc++-v3/include/bits/unique_ptr.h
! 3b3ac013617af6dccfccd3d52e5fd9ba  libstdc++-v3/include/bits/unordered_map.h
! 8fce9968754eb10cc30265e0644ef411  libstdc++-v3/include/bits/unordered_set.h
  8fb0bb8a0e08dbc54c6967e43841de9b  libstdc++-v3/include/bits/uses_allocator.h
  7a8e68f36176e9a758f949e3cbaeaf5a  libstdc++-v3/include/bits/uses_allocator_args.h
! 8b3b0123243b244104370bc84804f5f4  libstdc++-v3/include/bits/utility.h
  092d0d9f5c5948cb4e5d52b7a5f06923  libstdc++-v3/include/bits/valarray_after.h
  d1794ea86712506af9ad861dfbec9f9b  libstdc++-v3/include/bits/valarray_array.h
  39a6066d7b092ff20a6731264df6ca7e  libstdc++-v3/include/bits/valarray_array.tcc
*************** a76f8506a05bb00c10bff03eb4206cc8  libstd
*** 105884,105905 ****
  d1c85ab843e7786260a3593e711622d5  libstdc++-v3/include/experimental/array
  ce4d9d942c78c7a71a2f983bbd9a37d4  libstdc++-v3/include/experimental/bits/fs_dir.h
  92829844a42af6748ed988249b7c2557  libstdc++-v3/include/experimental/bits/fs_fwd.h
! cfd46a6ba8b7e92c26323aa2041931ae  libstdc++-v3/include/experimental/bits/fs_ops.h
! 67ee2d42f8fd3434cacba2c759731ce4  libstdc++-v3/include/experimental/bits/fs_path.h
  f79062269672eb2b6195fcad7034e18b  libstdc++-v3/include/experimental/bits/lfts_config.h
  85b50cb8925a5dcaa808980b5cb0d8f7  libstdc++-v3/include/experimental/bits/net.h
! 1c99b46217fbeb7cfcb4fe9fd60a5ac8  libstdc++-v3/include/experimental/bits/numeric_traits.h
  1d457f0e71c47e01d107c0ca8609019c  libstdc++-v3/include/experimental/bits/shared_ptr.h
! 5e937c88d4acaed57b976aa6f2273873  libstdc++-v3/include/experimental/bits/simd.h
! 4ee508b691a5157c7e809660bad7ec82  libstdc++-v3/include/experimental/bits/simd_builtin.h
! 893b969b5ded9ce2840356ae752d5063  libstdc++-v3/include/experimental/bits/simd_converter.h
! 7ad58535dc1b2b8a7e0adb98b02a1086  libstdc++-v3/include/experimental/bits/simd_detail.h
! 2f6dec5e93e6387b98ba68b2ed06426b  libstdc++-v3/include/experimental/bits/simd_fixed_size.h
! 1f871284754415e51452369ca2647ddd  libstdc++-v3/include/experimental/bits/simd_math.h
! e861ebcbafc444ea9eb01ac9c5b99979  libstdc++-v3/include/experimental/bits/simd_neon.h
! 9d8c9201675f2559be4096f8d152c694  libstdc++-v3/include/experimental/bits/simd_ppc.h
! 0f52ac4c09d5b301f2ea36edd4b54508  libstdc++-v3/include/experimental/bits/simd_scalar.h
! 3d8ea34f8434a734344fc44773184c25  libstdc++-v3/include/experimental/bits/simd_x86.h
  50722f04d8752d1fa4618f77cc80ed2f  libstdc++-v3/include/experimental/bits/simd_x86_conversions.h
  e1be8e54aaec8a34e1f682da217a9550  libstdc++-v3/include/experimental/bits/string_view.tcc
  b17463914bf45d86c8b27f74d4738c10  libstdc++-v3/include/experimental/buffer
--- 106092,106113 ----
  d1c85ab843e7786260a3593e711622d5  libstdc++-v3/include/experimental/array
  ce4d9d942c78c7a71a2f983bbd9a37d4  libstdc++-v3/include/experimental/bits/fs_dir.h
  92829844a42af6748ed988249b7c2557  libstdc++-v3/include/experimental/bits/fs_fwd.h
! d09b4eb47e1b5339decf29e866cfb096  libstdc++-v3/include/experimental/bits/fs_ops.h
! 43e0d340cd247e40d925b0152b179bbc  libstdc++-v3/include/experimental/bits/fs_path.h
  f79062269672eb2b6195fcad7034e18b  libstdc++-v3/include/experimental/bits/lfts_config.h
  85b50cb8925a5dcaa808980b5cb0d8f7  libstdc++-v3/include/experimental/bits/net.h
! b32e2888ec293d596ddfe98726a78cc7  libstdc++-v3/include/experimental/bits/numeric_traits.h
  1d457f0e71c47e01d107c0ca8609019c  libstdc++-v3/include/experimental/bits/shared_ptr.h
! 450e7e8272e831846c3e0de925774bab  libstdc++-v3/include/experimental/bits/simd.h
! 8c77adb8c96e9ebdd51a5cb3e6f07a31  libstdc++-v3/include/experimental/bits/simd_builtin.h
! 1dcdb4880687a585b7a4eefae780875e  libstdc++-v3/include/experimental/bits/simd_converter.h
! 966744e4a1d8afd63e630bd369285aeb  libstdc++-v3/include/experimental/bits/simd_detail.h
! 45d83d46e5f5e353d6fcb6ed6091c97c  libstdc++-v3/include/experimental/bits/simd_fixed_size.h
! 58d3b8e199b58221b53bc3637d2bb375  libstdc++-v3/include/experimental/bits/simd_math.h
! afe187f0ebc655339d9517eea4162676  libstdc++-v3/include/experimental/bits/simd_neon.h
! 07871da9889f814398693690143f99fd  libstdc++-v3/include/experimental/bits/simd_ppc.h
! c63aee3fd930f615492d6e5b011c787e  libstdc++-v3/include/experimental/bits/simd_scalar.h
! 54752d71b8804634e166d27c0c4a7c75  libstdc++-v3/include/experimental/bits/simd_x86.h
  50722f04d8752d1fa4618f77cc80ed2f  libstdc++-v3/include/experimental/bits/simd_x86_conversions.h
  e1be8e54aaec8a34e1f682da217a9550  libstdc++-v3/include/experimental/bits/string_view.tcc
  b17463914bf45d86c8b27f74d4738c10  libstdc++-v3/include/experimental/buffer
*************** f4f8da16d8133bfcb69eef49d797a1b3  libstd
*** 105909,105915 ****
  174c0fa7105d71925dc0c7ab3376f07c  libstdc++-v3/include/experimental/filesystem
  4cfd0865400c74397b111980a5b8f3ea  libstdc++-v3/include/experimental/forward_list
  ee6ba0e2ca753c4c038a9ebfb0805c4f  libstdc++-v3/include/experimental/functional
! dab5202bb88779e945a419918ae33338  libstdc++-v3/include/experimental/internet
  2766d0b421163f93012e31499fd68480  libstdc++-v3/include/experimental/io_context
  abc318d32456e26882cc3fa419abe900  libstdc++-v3/include/experimental/iterator
  89cd7b8a6b8c8fc54f2f5404abadc032  libstdc++-v3/include/experimental/list
--- 106117,106123 ----
  174c0fa7105d71925dc0c7ab3376f07c  libstdc++-v3/include/experimental/filesystem
  4cfd0865400c74397b111980a5b8f3ea  libstdc++-v3/include/experimental/forward_list
  ee6ba0e2ca753c4c038a9ebfb0805c4f  libstdc++-v3/include/experimental/functional
! 29fa27b81c81da91e282020124e6c470  libstdc++-v3/include/experimental/internet
  2766d0b421163f93012e31499fd68480  libstdc++-v3/include/experimental/io_context
  abc318d32456e26882cc3fa419abe900  libstdc++-v3/include/experimental/iterator
  89cd7b8a6b8c8fc54f2f5404abadc032  libstdc++-v3/include/experimental/list
*************** dafac68817c8f9475fc3bde566ed8902  libstd
*** 105933,105939 ****
  75b66c367e172042a1afedda1fab27e1  libstdc++-v3/include/experimental/system_error
  5f1266d4d8133f022b78f98f0cdefbbf  libstdc++-v3/include/experimental/timer
  718aeb28b4405dec4492366cf0eca27d  libstdc++-v3/include/experimental/tuple
! 84501e2955d71ce01f40c4b8ac8c97b2  libstdc++-v3/include/experimental/type_traits
  92ab5c9c07aa60675ea9c096ca4aebeb  libstdc++-v3/include/experimental/unordered_map
  cbe31faa77957d2214e875f0edad5264  libstdc++-v3/include/experimental/unordered_set
  18cdbc7f9c4eac37a520ae985047e727  libstdc++-v3/include/experimental/utility
--- 106141,106147 ----
  75b66c367e172042a1afedda1fab27e1  libstdc++-v3/include/experimental/system_error
  5f1266d4d8133f022b78f98f0cdefbbf  libstdc++-v3/include/experimental/timer
  718aeb28b4405dec4492366cf0eca27d  libstdc++-v3/include/experimental/tuple
! f28d969ed5020a2e979af19af98348a3  libstdc++-v3/include/experimental/type_traits
  92ab5c9c07aa60675ea9c096ca4aebeb  libstdc++-v3/include/experimental/unordered_map
  cbe31faa77957d2214e875f0edad5264  libstdc++-v3/include/experimental/unordered_set
  18cdbc7f9c4eac37a520ae985047e727  libstdc++-v3/include/experimental/utility
*************** f28cb6d6aaa0d3e381ecaf9e126ebf46  libstd
*** 105950,105961 ****
  ebe0e740b47791e8a0d5fa704ca6db70  libstdc++-v3/include/ext/debug_allocator.h
  f6eb6b846fc6a602340bb94d9d462688  libstdc++-v3/include/ext/enc_filebuf.h
  a991657867364dcaf16d19671aaf643c  libstdc++-v3/include/ext/extptr_allocator.h
! 43c3089edbabbc7eae00a5c6facf7daa  libstdc++-v3/include/ext/functional
  48f390fcfbb6a44e248facdb0ec14988  libstdc++-v3/include/ext/iterator
  d373ed650ddc96c5e431650c65be6e68  libstdc++-v3/include/ext/malloc_allocator.h
  008b2229637eab3f9bc87596aa035239  libstdc++-v3/include/ext/memory
  5a173e66ab05ee5c37fa416596420100  libstdc++-v3/include/ext/mt_allocator.h
! e1998e6fc2a8d3eb451025d3c021ceb3  libstdc++-v3/include/ext/new_allocator.h
  9ae1e878156f72db62d7d94772f7dcb6  libstdc++-v3/include/ext/numeric
  8bcaa226ce57469a87ed94febd6082f9  libstdc++-v3/include/ext/numeric_traits.h
  bd496b3b9a1ecb478f97715addaffe67  libstdc++-v3/include/ext/pb_ds/assoc_container.hpp
--- 106158,106169 ----
  ebe0e740b47791e8a0d5fa704ca6db70  libstdc++-v3/include/ext/debug_allocator.h
  f6eb6b846fc6a602340bb94d9d462688  libstdc++-v3/include/ext/enc_filebuf.h
  a991657867364dcaf16d19671aaf643c  libstdc++-v3/include/ext/extptr_allocator.h
! 6fad287f1dc1ba781865b6cefa140679  libstdc++-v3/include/ext/functional
  48f390fcfbb6a44e248facdb0ec14988  libstdc++-v3/include/ext/iterator
  d373ed650ddc96c5e431650c65be6e68  libstdc++-v3/include/ext/malloc_allocator.h
  008b2229637eab3f9bc87596aa035239  libstdc++-v3/include/ext/memory
  5a173e66ab05ee5c37fa416596420100  libstdc++-v3/include/ext/mt_allocator.h
! 973b74fd9e95de44080c1262bf5a7ae7  libstdc++-v3/include/ext/new_allocator.h
  9ae1e878156f72db62d7d94772f7dcb6  libstdc++-v3/include/ext/numeric
  8bcaa226ce57469a87ed94febd6082f9  libstdc++-v3/include/ext/numeric_traits.h
  bd496b3b9a1ecb478f97715addaffe67  libstdc++-v3/include/ext/pb_ds/assoc_container.hpp
*************** b156f0d597a2edae1a06e54aba071e41  libstd
*** 106293,106319 ****
  16ecbf48b313f47955487be8fe668037  libstdc++-v3/include/pstl/utils.h
  072481f1e7d96b55385089405f535dd4  libstdc++-v3/include/std/algorithm
  570dea393806af64e854327a07eae25a  libstdc++-v3/include/std/any
! 88906e37f833d2f5a22c5438677c71cf  libstdc++-v3/include/std/array
! ba58221a2b190541ffd1168b2d6dd34c  libstdc++-v3/include/std/atomic
  0d3eb7ccdf0eef93cb681ca20d943870  libstdc++-v3/include/std/barrier
  6c4a00cca741ccc69d90f2c62c4bed21  libstdc++-v3/include/std/bit
  60d28f3596e47b8d6f0482c0aa059f08  libstdc++-v3/include/std/bitset
! 2ee22b6a48915ac5bb3f7e44089980c6  libstdc++-v3/include/std/charconv
! 2e799728de69db1ba60355d8204ac60e  libstdc++-v3/include/std/chrono
  ef0864942910987e7d7dc0c185bfe8a4  libstdc++-v3/include/std/codecvt
! be6c12b098d82e85b07d3672abe54bfe  libstdc++-v3/include/std/complex
  16439135249b21db1105ff810c791cf3  libstdc++-v3/include/std/concepts
! 5f9d3f1270677d2a503aa58b9ea24b5d  libstdc++-v3/include/std/condition_variable
  bb6439627adf3d0dfd39054edcaf7d8b  libstdc++-v3/include/std/coroutine
  6b89200406cc1ab389e7796857584f28  libstdc++-v3/include/std/deque
  b7b3e00d632ce3d8dab091194900a119  libstdc++-v3/include/std/execution
  701c8ab43837021f865d4c887bffaade  libstdc++-v3/include/std/expected
! 2591b4b2dfa65f0fae8dd4fdb5c06398  libstdc++-v3/include/std/filesystem
  a9c719562e9e02bb827652856f5a0411  libstdc++-v3/include/std/forward_list
  aad9a7ff99d2eb9e0ba45475cf6c9001  libstdc++-v3/include/std/fstream
  4973a3c4b6705c523303a2162e880d5f  libstdc++-v3/include/std/functional
! 59bae8d38f885b342bdb08e29fc4e9ad  libstdc++-v3/include/std/future
! d7e54ce63c756d943e981b79ad7b87b1  libstdc++-v3/include/std/iomanip
  913326f95f00b67976b511c89ddf1668  libstdc++-v3/include/std/ios
  1fa07fb54e534480c0163b8ede1e6416  libstdc++-v3/include/std/iosfwd
  7d4512e3f3a1b2cce6ebeeadfc5eb944  libstdc++-v3/include/std/iostream
--- 106501,106527 ----
  16ecbf48b313f47955487be8fe668037  libstdc++-v3/include/pstl/utils.h
  072481f1e7d96b55385089405f535dd4  libstdc++-v3/include/std/algorithm
  570dea393806af64e854327a07eae25a  libstdc++-v3/include/std/any
! 19fa1e5331913fa2d824b26a04dfe055  libstdc++-v3/include/std/array
! 8be7bfd2354d786e2db174572c492cdb  libstdc++-v3/include/std/atomic
  0d3eb7ccdf0eef93cb681ca20d943870  libstdc++-v3/include/std/barrier
  6c4a00cca741ccc69d90f2c62c4bed21  libstdc++-v3/include/std/bit
  60d28f3596e47b8d6f0482c0aa059f08  libstdc++-v3/include/std/bitset
! f5445b7fe962edc560c6697d97f8773d  libstdc++-v3/include/std/charconv
! dd90d7b6b45ec1a635ceeb81f7e188c9  libstdc++-v3/include/std/chrono
  ef0864942910987e7d7dc0c185bfe8a4  libstdc++-v3/include/std/codecvt
! dc129583b571999c1345170f762dceda  libstdc++-v3/include/std/complex
  16439135249b21db1105ff810c791cf3  libstdc++-v3/include/std/concepts
! edf1dcc3d28423dc93731d2dd9d8f7ef  libstdc++-v3/include/std/condition_variable
  bb6439627adf3d0dfd39054edcaf7d8b  libstdc++-v3/include/std/coroutine
  6b89200406cc1ab389e7796857584f28  libstdc++-v3/include/std/deque
  b7b3e00d632ce3d8dab091194900a119  libstdc++-v3/include/std/execution
  701c8ab43837021f865d4c887bffaade  libstdc++-v3/include/std/expected
! 3ebb6aed1b2f2ace86fdea6bc2369bb3  libstdc++-v3/include/std/filesystem
  a9c719562e9e02bb827652856f5a0411  libstdc++-v3/include/std/forward_list
  aad9a7ff99d2eb9e0ba45475cf6c9001  libstdc++-v3/include/std/fstream
  4973a3c4b6705c523303a2162e880d5f  libstdc++-v3/include/std/functional
! 684453ca026b3af49aa776a969edef7b  libstdc++-v3/include/std/future
! c9d3fc72ba1a8da1ff01d4caabc6eee4  libstdc++-v3/include/std/iomanip
  913326f95f00b67976b511c89ddf1668  libstdc++-v3/include/std/ios
  1fa07fb54e534480c0163b8ede1e6416  libstdc++-v3/include/std/iosfwd
  7d4512e3f3a1b2cce6ebeeadfc5eb944  libstdc++-v3/include/std/iostream
*************** beb24c4055c34e1ca99669e732635eee  libstd
*** 106326,106367 ****
  5587cbee59427f9937239e4c6c08b890  libstdc++-v3/include/std/map
  10bdb36e17478ec36d07cc2256ca087c  libstdc++-v3/include/std/memory
  e522dd3e975e1e8c5f3456994d59033d  libstdc++-v3/include/std/memory_resource
! 6185fa777de9d0ffd588b3b4f694533a  libstdc++-v3/include/std/mutex
  258094736c1a9827ac9b532d460fea3c  libstdc++-v3/include/std/numbers
  db7224ff7ecff429fbbb5705e8c9cd88  libstdc++-v3/include/std/numeric
! b55ac5ede6133c48df8d44e4bef366b5  libstdc++-v3/include/std/optional
  e21684775dfcf87b9059ad483189890c  libstdc++-v3/include/std/ostream
  678ed5570fa228987b1bd4c3b2ab38a9  libstdc++-v3/include/std/queue
  ad0c4543d69f42e0e141d6c961148a3c  libstdc++-v3/include/std/random
  435c9e3541d6c9a9f23b8d8e9edae738  libstdc++-v3/include/std/ranges
! 83fe6e62c45e5cbeb03e474f78fb84dd  libstdc++-v3/include/std/ratio
  3ad3827bf7257834ed886bfc875792f6  libstdc++-v3/include/std/regex
! a36ee050c2d5e66519638b914997e074  libstdc++-v3/include/std/scoped_allocator
  4afcdb7beade1642d1f3b27ba5e2bfa3  libstdc++-v3/include/std/semaphore
  45dc0825469e66239592e3a77a3a80dc  libstdc++-v3/include/std/set
! 6f5c8b5ac435bdf64613896b8cc6908a  libstdc++-v3/include/std/shared_mutex
  88a3179695d69d9d5efe8967df5bb8c1  libstdc++-v3/include/std/source_location
  692e0b2c06c5d19ac5338d286eb7e5d7  libstdc++-v3/include/std/span
! e086a98622e688a0f02c701b33ae1b75  libstdc++-v3/include/std/spanstream
! 275b137855ae240ad345fcea64ce43d6  libstdc++-v3/include/std/sstream
  ddbf2edbc47249f513d1ec2ef82db9b7  libstdc++-v3/include/std/stack
! c42d9ed7509390ff3996796abf0dcd3e  libstdc++-v3/include/std/stacktrace
  9a484d3a8b869e29b314e81780995cea  libstdc++-v3/include/std/stdexcept
  bca91ec547ac22052499a8fdbf54402f  libstdc++-v3/include/std/stop_token
  41d10501d4e6f65d267f4b3f86edf933  libstdc++-v3/include/std/streambuf
  2050db70d23bce24c0db23f72bb7a5a4  libstdc++-v3/include/std/string
! 418a36401dfa5a9966f3e2e9c1c7836f  libstdc++-v3/include/std/string_view
! 6b175fdd1e71aabe6e03e47e736cb301  libstdc++-v3/include/std/syncstream
! 8b34e73a1cabfdff0bf938e5e7e87321  libstdc++-v3/include/std/system_error
  2bcb7b3da31da2e6a5dba342215915fb  libstdc++-v3/include/std/thread
! ba850143aaf393fbbaec14b91f50a098  libstdc++-v3/include/std/tuple
! d714180ae9702e3a62e2df15d56a73d7  libstdc++-v3/include/std/type_traits
  405de94a2049d47cf0dcc1e507c130c2  libstdc++-v3/include/std/typeindex
  bcde64de884a6ef8713ae1ef3d01c974  libstdc++-v3/include/std/unordered_map
  70ee03c1644aafe0cc882e9a3211d3d1  libstdc++-v3/include/std/unordered_set
! fd851f22b27e7743e814a5b580b5bb9b  libstdc++-v3/include/std/utility
! ed627e591efe729f22f77269217d68af  libstdc++-v3/include/std/valarray
! 0328e72e195b442f7c8bfd341aa65af2  libstdc++-v3/include/std/variant
  3a32d802d4e23e09e723dfe0459079e5  libstdc++-v3/include/std/vector
  07f27972c4ac72fa1bc271f88f049b4a  libstdc++-v3/include/std/version
  315a0c0dcb63f40cf8755bfeedce3f87  libstdc++-v3/include/tr1/array
--- 106534,106575 ----
  5587cbee59427f9937239e4c6c08b890  libstdc++-v3/include/std/map
  10bdb36e17478ec36d07cc2256ca087c  libstdc++-v3/include/std/memory
  e522dd3e975e1e8c5f3456994d59033d  libstdc++-v3/include/std/memory_resource
! 55a0037171b6287a8885be03261039b7  libstdc++-v3/include/std/mutex
  258094736c1a9827ac9b532d460fea3c  libstdc++-v3/include/std/numbers
  db7224ff7ecff429fbbb5705e8c9cd88  libstdc++-v3/include/std/numeric
! 1b42b4ee274bd6efbb416d31943f2297  libstdc++-v3/include/std/optional
  e21684775dfcf87b9059ad483189890c  libstdc++-v3/include/std/ostream
  678ed5570fa228987b1bd4c3b2ab38a9  libstdc++-v3/include/std/queue
  ad0c4543d69f42e0e141d6c961148a3c  libstdc++-v3/include/std/random
  435c9e3541d6c9a9f23b8d8e9edae738  libstdc++-v3/include/std/ranges
! 8a2604c0d9ca51f35d9b036e24287356  libstdc++-v3/include/std/ratio
  3ad3827bf7257834ed886bfc875792f6  libstdc++-v3/include/std/regex
! ecf2b56fde660beef255e7f04613957a  libstdc++-v3/include/std/scoped_allocator
  4afcdb7beade1642d1f3b27ba5e2bfa3  libstdc++-v3/include/std/semaphore
  45dc0825469e66239592e3a77a3a80dc  libstdc++-v3/include/std/set
! f06d5e0bd8ba76c953f6e66286be4872  libstdc++-v3/include/std/shared_mutex
  88a3179695d69d9d5efe8967df5bb8c1  libstdc++-v3/include/std/source_location
  692e0b2c06c5d19ac5338d286eb7e5d7  libstdc++-v3/include/std/span
! 4a9df1750ad06d95e86ac71ebda2e80f  libstdc++-v3/include/std/spanstream
! f20be19b07cc107b37bbac605920911c  libstdc++-v3/include/std/sstream
  ddbf2edbc47249f513d1ec2ef82db9b7  libstdc++-v3/include/std/stack
! 36183b8448cd63f1058082f3dbdf2af8  libstdc++-v3/include/std/stacktrace
  9a484d3a8b869e29b314e81780995cea  libstdc++-v3/include/std/stdexcept
  bca91ec547ac22052499a8fdbf54402f  libstdc++-v3/include/std/stop_token
  41d10501d4e6f65d267f4b3f86edf933  libstdc++-v3/include/std/streambuf
  2050db70d23bce24c0db23f72bb7a5a4  libstdc++-v3/include/std/string
! 2db3ca10419d4457aecb783199bde07b  libstdc++-v3/include/std/string_view
! 53595cdde4367db32fddc133626bd091  libstdc++-v3/include/std/syncstream
! 6059edfe8f0b4e7014488d6627bfbcf9  libstdc++-v3/include/std/system_error
  2bcb7b3da31da2e6a5dba342215915fb  libstdc++-v3/include/std/thread
! bcfe58b0268a24fe16eef99703b24f90  libstdc++-v3/include/std/tuple
! 7ef2b812a24e58bb6a2a97c251197866  libstdc++-v3/include/std/type_traits
  405de94a2049d47cf0dcc1e507c130c2  libstdc++-v3/include/std/typeindex
  bcde64de884a6ef8713ae1ef3d01c974  libstdc++-v3/include/std/unordered_map
  70ee03c1644aafe0cc882e9a3211d3d1  libstdc++-v3/include/std/unordered_set
! c0c9dccc846622406eef9f083e4f4ad5  libstdc++-v3/include/std/utility
! 543899a002d82719328274e29ff5f9ee  libstdc++-v3/include/std/valarray
! caa250d69587be3268588e4efad09e80  libstdc++-v3/include/std/variant
  3a32d802d4e23e09e723dfe0459079e5  libstdc++-v3/include/std/vector
  07f27972c4ac72fa1bc271f88f049b4a  libstdc++-v3/include/std/version
  315a0c0dcb63f40cf8755bfeedce3f87  libstdc++-v3/include/tr1/array
*************** c930d4036922201099619257d25a2245  libstd
*** 106428,106439 ****
  064789c496f0f70ebb4edbc0b7e4a666  libstdc++-v3/include/tr1/wctype.h
  27d05cea5b02463850117b8476f2ec42  libstdc++-v3/include/tr2/bool_set
  917d83e0b0ee35850a1a637a3eee75c9  libstdc++-v3/include/tr2/bool_set.tcc
! 6170b319c367c15cc44b854b464396c2  libstdc++-v3/include/tr2/dynamic_bitset
  4384700c62cb70a7774717710cac4c07  libstdc++-v3/include/tr2/dynamic_bitset.tcc
  88ca2da6dd5700f0e05d5f58e8fa62ef  libstdc++-v3/include/tr2/ratio
  632570c5614f68ebbbf25e6b74a12da2  libstdc++-v3/include/tr2/type_traits
! 4daa7113f4ebba675c4ef23b11602d2e  libstdc++-v3/libsupc++/Makefile.am
! ad30d9aa6fbfa82c6dcb69892d10681b  libstdc++-v3/libsupc++/Makefile.in
  96d5d64fad06961ea529f30e07345f14  libstdc++-v3/libsupc++/array_type_info.cc
  dce6f8e3d6b965cd0fd40f034b78a74d  libstdc++-v3/libsupc++/atexit_arm.cc
  64a51042a2c5073bdb6689e6239ef0ed  libstdc++-v3/libsupc++/atexit_thread.cc
--- 106636,106647 ----
  064789c496f0f70ebb4edbc0b7e4a666  libstdc++-v3/include/tr1/wctype.h
  27d05cea5b02463850117b8476f2ec42  libstdc++-v3/include/tr2/bool_set
  917d83e0b0ee35850a1a637a3eee75c9  libstdc++-v3/include/tr2/bool_set.tcc
! ccdc152be32111912551bd0294ae6989  libstdc++-v3/include/tr2/dynamic_bitset
  4384700c62cb70a7774717710cac4c07  libstdc++-v3/include/tr2/dynamic_bitset.tcc
  88ca2da6dd5700f0e05d5f58e8fa62ef  libstdc++-v3/include/tr2/ratio
  632570c5614f68ebbbf25e6b74a12da2  libstdc++-v3/include/tr2/type_traits
! fa9622f8938011481224bfc47d3e2a92  libstdc++-v3/libsupc++/Makefile.am
! eb43c7ca09c7553290a22c5b553f1433  libstdc++-v3/libsupc++/Makefile.in
  96d5d64fad06961ea529f30e07345f14  libstdc++-v3/libsupc++/array_type_info.cc
  dce6f8e3d6b965cd0fd40f034b78a74d  libstdc++-v3/libsupc++/atexit_arm.cc
  64a51042a2c5073bdb6689e6239ef0ed  libstdc++-v3/libsupc++/atexit_thread.cc
*************** a397502b691bf0d7a9c7b63f63454f98  libstd
*** 106447,106453 ****
  31f5ffc107b8635ae5c3c63e619e7c52  libstdc++-v3/libsupc++/compare
  a8ca959615041ec3243af356f4ecc624  libstdc++-v3/libsupc++/cxxabi.h
  ab128a36728911fa441f71f19397c91f  libstdc++-v3/libsupc++/cxxabi_forced.h
! c0c7802c5e0096ab182755f808164e5a  libstdc++-v3/libsupc++/cxxabi_init_exception.h
  60bb4069fc06de12df9cb43ad21c79ae  libstdc++-v3/libsupc++/del_op.cc
  7f855cd5f1f241ffab0d9ca14d2c3c5d  libstdc++-v3/libsupc++/del_opa.cc
  8ef5bb06ac7b1dc1a42948ad7e78cdf9  libstdc++-v3/libsupc++/del_opant.cc
--- 106655,106661 ----
  31f5ffc107b8635ae5c3c63e619e7c52  libstdc++-v3/libsupc++/compare
  a8ca959615041ec3243af356f4ecc624  libstdc++-v3/libsupc++/cxxabi.h
  ab128a36728911fa441f71f19397c91f  libstdc++-v3/libsupc++/cxxabi_forced.h
! 6fb3ca40d6524dab90228d622d43beeb  libstdc++-v3/libsupc++/cxxabi_init_exception.h
  60bb4069fc06de12df9cb43ad21c79ae  libstdc++-v3/libsupc++/del_op.cc
  7f855cd5f1f241ffab0d9ca14d2c3c5d  libstdc++-v3/libsupc++/del_opa.cc
  8ef5bb06ac7b1dc1a42948ad7e78cdf9  libstdc++-v3/libsupc++/del_opant.cc
*************** d9fad0164214a24429310b8e7c123505  libstd
*** 106468,106474 ****
  2826e5c2de48542ba3ce264b3320d192  libstdc++-v3/libsupc++/eh_call.cc
  f9a2b6ce76ea27f40df988fb955d2de1  libstdc++-v3/libsupc++/eh_catch.cc
  3da7f2c6cfa1995c8968405d9ee450b6  libstdc++-v3/libsupc++/eh_exception.cc
! 7046be6a6b4551f65a840bcf85fbd4bb  libstdc++-v3/libsupc++/eh_globals.cc
  7ccbc99cfaa5318038f64dbee140946b  libstdc++-v3/libsupc++/eh_personality.cc
  1c54e24b64de6b013027e51c6377a701  libstdc++-v3/libsupc++/eh_ptr.cc
  d385138666c69cff7ca02656c9f9ed79  libstdc++-v3/libsupc++/eh_term_handler.cc
--- 106676,106682 ----
  2826e5c2de48542ba3ce264b3320d192  libstdc++-v3/libsupc++/eh_call.cc
  f9a2b6ce76ea27f40df988fb955d2de1  libstdc++-v3/libsupc++/eh_catch.cc
  3da7f2c6cfa1995c8968405d9ee450b6  libstdc++-v3/libsupc++/eh_exception.cc
! fbe70b88b3a21ac5c4ed4a006f176754  libstdc++-v3/libsupc++/eh_globals.cc
  7ccbc99cfaa5318038f64dbee140946b  libstdc++-v3/libsupc++/eh_personality.cc
  1c54e24b64de6b013027e51c6377a701  libstdc++-v3/libsupc++/eh_ptr.cc
  d385138666c69cff7ca02656c9f9ed79  libstdc++-v3/libsupc++/eh_term_handler.cc
*************** dd79628835db55b2e3ac0f19e6d67f4b  libstd
*** 106482,106488 ****
  6b7e04711d0d81627261d8d8d19988de  libstdc++-v3/libsupc++/exception
  c63781c44ea62d41d540e3dc9df083ad  libstdc++-v3/libsupc++/exception.h
  7831f52e348280d54cdefd954a8125ae  libstdc++-v3/libsupc++/exception_defines.h
! e8a32dcadc5d06d341e371fb480b7b44  libstdc++-v3/libsupc++/exception_ptr.h
  e9526cde45ad82aac1bdad78e48b77d9  libstdc++-v3/libsupc++/function_type_info.cc
  19738f26bfd633c091434c2b3a705170  libstdc++-v3/libsupc++/fundamental_type_info.cc
  2a200bb5c53b0893bf37016eaa025581  libstdc++-v3/libsupc++/guard.cc
--- 106690,106696 ----
  6b7e04711d0d81627261d8d8d19988de  libstdc++-v3/libsupc++/exception
  c63781c44ea62d41d540e3dc9df083ad  libstdc++-v3/libsupc++/exception.h
  7831f52e348280d54cdefd954a8125ae  libstdc++-v3/libsupc++/exception_defines.h
! 88ee853a91f89dcf79baecdf5a1e3aa4  libstdc++-v3/libsupc++/exception_ptr.h
  e9526cde45ad82aac1bdad78e48b77d9  libstdc++-v3/libsupc++/function_type_info.cc
  19738f26bfd633c091434c2b3a705170  libstdc++-v3/libsupc++/fundamental_type_info.cc
  2a200bb5c53b0893bf37016eaa025581  libstdc++-v3/libsupc++/guard.cc
*************** b736a3e0c3130311d7283d2e42b337ae  libstd
*** 106495,106501 ****
  008264d01c4067464408c9777e292ee3  libstdc++-v3/libsupc++/new
  87c7167973517867f1dce7e6537f5493  libstdc++-v3/libsupc++/new_handler.cc
  a0242b24fe3d20508b195a569e213580  libstdc++-v3/libsupc++/new_op.cc
! 9147256faba7ae3d5c4e9400ed523a35  libstdc++-v3/libsupc++/new_opa.cc
  db5414821a05e8baefb055b0be852385  libstdc++-v3/libsupc++/new_opant.cc
  fd977844781418fe90162ecd1a5bdcbe  libstdc++-v3/libsupc++/new_opnt.cc
  5bc9c32dd691fa3053c50c840c28112d  libstdc++-v3/libsupc++/new_opv.cc
--- 106703,106709 ----
  008264d01c4067464408c9777e292ee3  libstdc++-v3/libsupc++/new
  87c7167973517867f1dce7e6537f5493  libstdc++-v3/libsupc++/new_handler.cc
  a0242b24fe3d20508b195a569e213580  libstdc++-v3/libsupc++/new_op.cc
! 498cc29197c865d2bd7407914a050a7c  libstdc++-v3/libsupc++/new_opa.cc
  db5414821a05e8baefb055b0be852385  libstdc++-v3/libsupc++/new_opant.cc
  fd977844781418fe90162ecd1a5bdcbe  libstdc++-v3/libsupc++/new_opnt.cc
  5bc9c32dd691fa3053c50c840c28112d  libstdc++-v3/libsupc++/new_opv.cc
*************** c8cbca9ae8196cdff7586f9cd8784702  libstd
*** 106529,106563 ****
  99337a5a9c6351ae321ba8645b3981f0  libstdc++-v3/python/hook.in
  68b329da9893e34099c7d8ad5cb9c940  libstdc++-v3/python/libstdcxx/__init__.py
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! 9653bdd9c763b1e15e1a47bd5d1e7402  libstdc++-v3/src/c++11/compatibility-c++0x.cc
! 822301c830c65bb2a495049efd0e0501  libstdc++-v3/src/c++11/compatibility-chrono.cc
! 7fb623f08c2323af817abfbab08370f5  libstdc++-v3/src/c++11/compatibility-condvar.cc
  706be41734f65fd49abdd4588859dea1  libstdc++-v3/src/c++11/compatibility-ldbl-alt128-cxx11.cc
  ba35560b9593674f94b8e5cc2fa5c6a6  libstdc++-v3/src/c++11/compatibility-ldbl-alt128.cc
  8d462d7c234a7824f70c654a77fd0343  libstdc++-v3/src/c++11/compatibility-ldbl-facets-aliases.h
! 47fa47dc9800c7194df096036a780a5a  libstdc++-v3/src/c++11/compatibility-thread-c++0x.cc
  936c3c006efff078161dc4ea908eff51  libstdc++-v3/src/c++11/condition_variable.cc
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  8ef14c27c500b1c2ae8c88191aa07f4f  libstdc++-v3/src/c++11/cow-locale_init.cc
--- 106737,106772 ----
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! 4afad50e36b2bfef56fb3189f112ee46  libstdc++-v3/src/c++11/assert_fail.cc
! c914b3a82977dc07700477f8af234283  libstdc++-v3/src/c++11/chrono.cc
! 5ff7c7e87f5b8aef1a3dafd4292a4782  libstdc++-v3/src/c++11/codecvt.cc
  6f4d4569f8ec67d46c6dcf972c0d8937  libstdc++-v3/src/c++11/compatibility-atomic-c++0x.cc
! 32ea7478f1ddaffbe3764bb00fb64d9d  libstdc++-v3/src/c++11/compatibility-c++0x.cc
! 8e67a7c1de0698003fd3270c31f2ba6a  libstdc++-v3/src/c++11/compatibility-chrono.cc
! 1b83f473b9bf9041d2a7a34c141855ce  libstdc++-v3/src/c++11/compatibility-condvar.cc
  706be41734f65fd49abdd4588859dea1  libstdc++-v3/src/c++11/compatibility-ldbl-alt128-cxx11.cc
  ba35560b9593674f94b8e5cc2fa5c6a6  libstdc++-v3/src/c++11/compatibility-ldbl-alt128.cc
  8d462d7c234a7824f70c654a77fd0343  libstdc++-v3/src/c++11/compatibility-ldbl-facets-aliases.h
! e202697e2502a46c22c7d564febe8e10  libstdc++-v3/src/c++11/compatibility-thread-c++0x.cc
  936c3c006efff078161dc4ea908eff51  libstdc++-v3/src/c++11/condition_variable.cc
  0a2f98e6dce0f4843b63c6f18fed049b  libstdc++-v3/src/c++11/cow-fstream-inst.cc
  8ef14c27c500b1c2ae8c88191aa07f4f  libstdc++-v3/src/c++11/cow-locale_init.cc
*************** c0ce22782698f527aa23c86081579318  libstd
*** 106575,106581 ****
  1873f8363e67f6beac3a8f0cb4ea8b08  libstdc++-v3/src/c++11/cxx11-shim_facets.cc
  077ed5dbaeb50d017644c6a26b19acf5  libstdc++-v3/src/c++11/cxx11-stdexcept.cc
  d13ab90d7b02d7fa901c3b5c1ec93519  libstdc++-v3/src/c++11/cxx11-wlocale-inst.cc
! 6f95f475b9b606e7e6585cfa7b4fb01e  libstdc++-v3/src/c++11/debug.cc
  ccc01b37e3b2bb8b326ea8036a900a13  libstdc++-v3/src/c++11/ext11-inst.cc
  3a70dd8395391521505453d2cf8b6304  libstdc++-v3/src/c++11/fstream-inst.cc
  809f713df54dbe4ce5d5840f7bf50c53  libstdc++-v3/src/c++11/functexcept.cc
--- 106784,106790 ----
  1873f8363e67f6beac3a8f0cb4ea8b08  libstdc++-v3/src/c++11/cxx11-shim_facets.cc
  077ed5dbaeb50d017644c6a26b19acf5  libstdc++-v3/src/c++11/cxx11-stdexcept.cc
  d13ab90d7b02d7fa901c3b5c1ec93519  libstdc++-v3/src/c++11/cxx11-wlocale-inst.cc
! 8d6cbaf5fcd315efc61b8e0aa2803aef  libstdc++-v3/src/c++11/debug.cc
  ccc01b37e3b2bb8b326ea8036a900a13  libstdc++-v3/src/c++11/ext11-inst.cc
  3a70dd8395391521505453d2cf8b6304  libstdc++-v3/src/c++11/fstream-inst.cc
  809f713df54dbe4ce5d5840f7bf50c53  libstdc++-v3/src/c++11/functexcept.cc
*************** ec9c72a5ee0ff6169c89816cd997fc7f  libstd
*** 106605,106611 ****
  62d68a338d9d558342a64e3812f42370  libstdc++-v3/src/c++11/streambuf-inst.cc
  3f5be41744a83869e79685eee51be75b  libstdc++-v3/src/c++11/string-inst.cc
  bfd5afa319b8c484af4d2d6a9c51d6cd  libstdc++-v3/src/c++11/string-io-inst.cc
! 102320edfb80dfb0e5bc3c8b6861d25b  libstdc++-v3/src/c++11/system_error.cc
  e224dbd54286756dd3434a53e714ba2f  libstdc++-v3/src/c++11/thread.cc
  cfb4d4117b273737a07a71762eae15d1  libstdc++-v3/src/c++11/wlocale-inst.cc
  ef307f9cecfa67b64519d3c87e2d7cbf  libstdc++-v3/src/c++11/wstring-inst.cc
--- 106814,106820 ----
  62d68a338d9d558342a64e3812f42370  libstdc++-v3/src/c++11/streambuf-inst.cc
  3f5be41744a83869e79685eee51be75b  libstdc++-v3/src/c++11/string-inst.cc
  bfd5afa319b8c484af4d2d6a9c51d6cd  libstdc++-v3/src/c++11/string-io-inst.cc
! 653ada64af76081793cf995ee8177c22  libstdc++-v3/src/c++11/system_error.cc
  e224dbd54286756dd3434a53e714ba2f  libstdc++-v3/src/c++11/thread.cc
  cfb4d4117b273737a07a71762eae15d1  libstdc++-v3/src/c++11/wlocale-inst.cc
  ef307f9cecfa67b64519d3c87e2d7cbf  libstdc++-v3/src/c++11/wstring-inst.cc
*************** bccfdaafbb95c858e37317d0863bce04  libstd
*** 106624,106632 ****
  f755cc51c53f4702fa47e78a06db4bef  libstdc++-v3/src/c++17/floating_from_chars.cc
  73812a0c249f1a107c6747054f47134b  libstdc++-v3/src/c++17/floating_to_chars.cc
  bb0739a0b76ea0dfca5442362e727905  libstdc++-v3/src/c++17/fs_dir.cc
! 5cdc766edd11539c01605ce5bd586add  libstdc++-v3/src/c++17/fs_ops.cc
  3763d05c842e72fb442d10bcd2333274  libstdc++-v3/src/c++17/fs_path.cc
! b7168c593c53a44cbac0c2f5e38498ce  libstdc++-v3/src/c++17/memory_resource.cc
  f986a48e2efed103402262a2315d1784  libstdc++-v3/src/c++17/ostream-inst.cc
  f7696e2f5518e5e873ced4beacb8d107  libstdc++-v3/src/c++17/ryu/LOCAL_PATCHES
  e225c39ccc4c6adc72a744687977d59d  libstdc++-v3/src/c++17/ryu/MERGE
--- 106833,106841 ----
  f755cc51c53f4702fa47e78a06db4bef  libstdc++-v3/src/c++17/floating_from_chars.cc
  73812a0c249f1a107c6747054f47134b  libstdc++-v3/src/c++17/floating_to_chars.cc
  bb0739a0b76ea0dfca5442362e727905  libstdc++-v3/src/c++17/fs_dir.cc
! 2aa4875b25b628b8f9327916444ba936  libstdc++-v3/src/c++17/fs_ops.cc
  3763d05c842e72fb442d10bcd2333274  libstdc++-v3/src/c++17/fs_path.cc
! 5ae56ccd7ecc861799378737bab31926  libstdc++-v3/src/c++17/memory_resource.cc
  f986a48e2efed103402262a2315d1784  libstdc++-v3/src/c++17/ostream-inst.cc
  f7696e2f5518e5e873ced4beacb8d107  libstdc++-v3/src/c++17/ryu/LOCAL_PATCHES
  e225c39ccc4c6adc72a744687977d59d  libstdc++-v3/src/c++17/ryu/MERGE
*************** ce5be71e7e8cd53b30c2f5098afdf2f3  libstd
*** 106696,106706 ****
  c9755a27253724e51dc118d2832eec1c  libstdc++-v3/src/filesystem/cow-path.cc
  5b0a766e4b7be57dc339424afd722b26  libstdc++-v3/src/filesystem/dir-common.h
  b8fde319e2db86a39680ddcb52522fef  libstdc++-v3/src/filesystem/dir.cc
! 4a48c2fd38b58889cc3af92f5634a30a  libstdc++-v3/src/filesystem/ops-common.h
! a287374bc3d519a3e459736e90573f72  libstdc++-v3/src/filesystem/ops.cc
  339d6d3eeddb51bb668748f19203420f  libstdc++-v3/src/filesystem/path.cc
! 363b12ab3b2dd386adec7aee648e7dd6  libstdc++-v3/src/libbacktrace/Makefile.am
! 775bfe992c7c40d0700e4fa9f00c9d83  libstdc++-v3/src/libbacktrace/Makefile.in
  ce4e38332339194e4192eb2ba07fcd41  libstdc++-v3/src/libbacktrace/backtrace-rename.h
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--- 106905,106915 ----
  c9755a27253724e51dc118d2832eec1c  libstdc++-v3/src/filesystem/cow-path.cc
  5b0a766e4b7be57dc339424afd722b26  libstdc++-v3/src/filesystem/dir-common.h
  b8fde319e2db86a39680ddcb52522fef  libstdc++-v3/src/filesystem/dir.cc
! 9821e6e174556ccfd8ad9467062344a2  libstdc++-v3/src/filesystem/ops-common.h
! d0e1b8adbd675a382092bd143ee161b9  libstdc++-v3/src/filesystem/ops.cc
  339d6d3eeddb51bb668748f19203420f  libstdc++-v3/src/filesystem/path.cc
! d9c5f36f6a9eb51e654703b145116b53  libstdc++-v3/src/libbacktrace/Makefile.am
! 799e06af4d51c81025cff347841726e0  libstdc++-v3/src/libbacktrace/Makefile.in
  ce4e38332339194e4192eb2ba07fcd41  libstdc++-v3/src/libbacktrace/backtrace-rename.h
  f1f9f4df2a1a6c954c5a09ac3f6238e8  libstdc++-v3/src/libbacktrace/backtrace-supported.h.in
  d80381bdd74336b121a4f087efc21dbb  libstdc++-v3/src/libbacktrace/config.h.in
*************** b8a53b2b8da32d102d69cbedea3d2216  libstd
*** 106761,106767 ****
  64f755290372eba3d8235278d6f5b8b7  libstdc++-v3/testsuite/17_intro/headers/c++2020/operator_names.cc
  652e2a337bf38b3e3ca0c49c2bcdcca6  libstdc++-v3/testsuite/17_intro/headers/c++2020/stdc++.cc
  9df22201175c827bee60b62e621e537b  libstdc++-v3/testsuite/17_intro/headers/c++2020/stdc++_multiple_inclusion.cc
! f11164ff458b5a76ab402a7f1bfb3783  libstdc++-v3/testsuite/17_intro/names.cc
  44aea4dc1700d437c73f660156e02461  libstdc++-v3/testsuite/17_intro/shared_with_static_deps.cc
  ef83f2fe6df689b8cf96f8504ae113db  libstdc++-v3/testsuite/17_intro/static.cc
  dab68cc9b569ccb6c01e3bd633cc366b  libstdc++-v3/testsuite/17_intro/tag_type_explicit_ctor.cc
--- 106970,106976 ----
  64f755290372eba3d8235278d6f5b8b7  libstdc++-v3/testsuite/17_intro/headers/c++2020/operator_names.cc
  652e2a337bf38b3e3ca0c49c2bcdcca6  libstdc++-v3/testsuite/17_intro/headers/c++2020/stdc++.cc
  9df22201175c827bee60b62e621e537b  libstdc++-v3/testsuite/17_intro/headers/c++2020/stdc++_multiple_inclusion.cc
! 710f4242cad3097f884c9052b9d0c1e6  libstdc++-v3/testsuite/17_intro/names.cc
  44aea4dc1700d437c73f660156e02461  libstdc++-v3/testsuite/17_intro/shared_with_static_deps.cc
  ef83f2fe6df689b8cf96f8504ae113db  libstdc++-v3/testsuite/17_intro/static.cc
  dab68cc9b569ccb6c01e3bd633cc366b  libstdc++-v3/testsuite/17_intro/tag_type_explicit_ctor.cc
*************** b9fd24dabd45aeb58f49d163159969e0  libstd
*** 106878,106884 ****
  eb0e3ec00478dd3f996bc89b1923586c  libstdc++-v3/testsuite/18_support/new_aligned.cc
  a48edfb14d283df63c79641898aa4146  libstdc++-v3/testsuite/18_support/new_delete_placement.cc
  183f355142a2ebc660affd473c5471ab  libstdc++-v3/testsuite/18_support/new_handler.cc
! 2f1b95f9cf7dea1e3d5c5afef956866c  libstdc++-v3/testsuite/18_support/new_nothrow.cc
  59ad3909f307e0747eab47ead4637928  libstdc++-v3/testsuite/18_support/numeric_limits/29989.cc
  7ff8875ccb67e3edeb333989b1302c49  libstdc++-v3/testsuite/18_support/numeric_limits/40856.cc
  792e5796ce23ed7ae896f901fe8e21e2  libstdc++-v3/testsuite/18_support/numeric_limits/char16_32_t.cc
--- 107087,107093 ----
  eb0e3ec00478dd3f996bc89b1923586c  libstdc++-v3/testsuite/18_support/new_aligned.cc
  a48edfb14d283df63c79641898aa4146  libstdc++-v3/testsuite/18_support/new_delete_placement.cc
  183f355142a2ebc660affd473c5471ab  libstdc++-v3/testsuite/18_support/new_handler.cc
! 1c9d63a9ccffa11a4326a589634b8962  libstdc++-v3/testsuite/18_support/new_nothrow.cc
  59ad3909f307e0747eab47ead4637928  libstdc++-v3/testsuite/18_support/numeric_limits/29989.cc
  7ff8875ccb67e3edeb333989b1302c49  libstdc++-v3/testsuite/18_support/numeric_limits/40856.cc
  792e5796ce23ed7ae896f901fe8e21e2  libstdc++-v3/testsuite/18_support/numeric_limits/char16_32_t.cc
*************** c06cd3372e5d237f3d664d174e69b38d  libstd
*** 106973,106978 ****
--- 107182,107188 ----
  a6dcf6cbaf916e3c7f40ba4b651d42f3  libstdc++-v3/testsuite/19_diagnostics/runtime_error/what-big.cc
  a3f875cb81845cea6552ad2be474733b  libstdc++-v3/testsuite/19_diagnostics/stacktrace/current.cc
  bcbe8956841ad8748b7d53b018a0f23b  libstdc++-v3/testsuite/19_diagnostics/stacktrace/entry.cc
+ 1cb3680da0023fa955ece4a3030256f9  libstdc++-v3/testsuite/19_diagnostics/stacktrace/hash.cc
  489c2f3ec1b126c0f5cab03ec75198b5  libstdc++-v3/testsuite/19_diagnostics/stacktrace/stacktrace.cc
  1a16038fc4f582a0976f9f59a252d7cb  libstdc++-v3/testsuite/19_diagnostics/stacktrace/synopsis.cc
  663e3dcea433a03255e7eed74d7d7f2f  libstdc++-v3/testsuite/19_diagnostics/stacktrace/version.cc
*************** d01ba038607a0be8c0ebcbc0afc0fe04  libstd
*** 107061,107067 ****
  335e5502fad2ac140247bdc170504f8f  libstdc++-v3/testsuite/20_util/any/cons/104242.cc
  855e75aa8462203b5f87a24541db1952  libstdc++-v3/testsuite/20_util/any/cons/2.cc
  826f185dc51f69a0ab8d1f2335986459  libstdc++-v3/testsuite/20_util/any/cons/90415.cc
! 5539553886e8ad6b2ba83893f0b569bd  libstdc++-v3/testsuite/20_util/any/cons/92156.cc
  cb739269f63b936a136e916b9d839d5f  libstdc++-v3/testsuite/20_util/any/cons/92878_92947.cc
  1a0d7537907092a26f448a5c16ecf941  libstdc++-v3/testsuite/20_util/any/cons/aligned.cc
  c90b9951e6429a4b4ad2ef035e3cc857  libstdc++-v3/testsuite/20_util/any/cons/explicit.cc
--- 107271,107277 ----
  335e5502fad2ac140247bdc170504f8f  libstdc++-v3/testsuite/20_util/any/cons/104242.cc
  855e75aa8462203b5f87a24541db1952  libstdc++-v3/testsuite/20_util/any/cons/2.cc
  826f185dc51f69a0ab8d1f2335986459  libstdc++-v3/testsuite/20_util/any/cons/90415.cc
! 57527ff09347d874b7e2fa6f571b59cb  libstdc++-v3/testsuite/20_util/any/cons/92156.cc
  cb739269f63b936a136e916b9d839d5f  libstdc++-v3/testsuite/20_util/any/cons/92878_92947.cc
  1a0d7537907092a26f448a5c16ecf941  libstdc++-v3/testsuite/20_util/any/cons/aligned.cc
  c90b9951e6429a4b4ad2ef035e3cc857  libstdc++-v3/testsuite/20_util/any/cons/explicit.cc
*************** a04eac60519c81e4fdef0d442c07af11  libstd
*** 107074,107080 ****
  70a36e128b355c8a699ecd49ffdd7b3e  libstdc++-v3/testsuite/20_util/any/misc/swap.cc
  da19833eaea81e776688f755b0c0d7c6  libstdc++-v3/testsuite/20_util/any/modifiers/1.cc
  ffd841383afd9ceee535b6029825102a  libstdc++-v3/testsuite/20_util/any/modifiers/83658.cc
! 0b178f58fe2dc648c5ceadbb3843ace8  libstdc++-v3/testsuite/20_util/any/modifiers/92156.cc
  8cf003e1ff241a7b0df478196794d384  libstdc++-v3/testsuite/20_util/any/observers/type.cc
  b965df8cef8c2d5831514ae10feef71d  libstdc++-v3/testsuite/20_util/any/requirements.cc
  ca32a2a3ed352918a9edce8c1128a596  libstdc++-v3/testsuite/20_util/any/typedefs.cc
--- 107284,107290 ----
  70a36e128b355c8a699ecd49ffdd7b3e  libstdc++-v3/testsuite/20_util/any/misc/swap.cc
  da19833eaea81e776688f755b0c0d7c6  libstdc++-v3/testsuite/20_util/any/modifiers/1.cc
  ffd841383afd9ceee535b6029825102a  libstdc++-v3/testsuite/20_util/any/modifiers/83658.cc
! a8f2be3f2e89f61ab5b418cd3d53f67e  libstdc++-v3/testsuite/20_util/any/modifiers/92156.cc
  8cf003e1ff241a7b0df478196794d384  libstdc++-v3/testsuite/20_util/any/observers/type.cc
  b965df8cef8c2d5831514ae10feef71d  libstdc++-v3/testsuite/20_util/any/requirements.cc
  ca32a2a3ed352918a9edce8c1128a596  libstdc++-v3/testsuite/20_util/any/typedefs.cc
*************** a38ea2fa32cc4818228bb597203e3fe5  libstd
*** 107145,107151 ****
  8795c34c783c151467f9d8c090c4a066  libstdc++-v3/testsuite/20_util/declval/requirements/1_neg.cc
  510094f2352e00bc3c98d72c6e2d291a  libstdc++-v3/testsuite/20_util/default_delete/48631_neg.cc
  9a7515be77eedd837ee73f5e0c54ead4  libstdc++-v3/testsuite/20_util/default_delete/cons/constexpr.cc
! 77aabc6b885a5e747f6090c1f8dd29e2  libstdc++-v3/testsuite/20_util/default_delete/void_neg.cc
  b3415c59024254394b532b647bc497f6  libstdc++-v3/testsuite/20_util/duration/arithmetic/1.cc
  e4b514e6ace9ea3f45a5559e581e68ac  libstdc++-v3/testsuite/20_util/duration/arithmetic/2.cc
  27fb0edde4e6b353a82bda16d421e3b0  libstdc++-v3/testsuite/20_util/duration/arithmetic/58850.cc
--- 107355,107361 ----
  8795c34c783c151467f9d8c090c4a066  libstdc++-v3/testsuite/20_util/declval/requirements/1_neg.cc
  510094f2352e00bc3c98d72c6e2d291a  libstdc++-v3/testsuite/20_util/default_delete/48631_neg.cc
  9a7515be77eedd837ee73f5e0c54ead4  libstdc++-v3/testsuite/20_util/default_delete/cons/constexpr.cc
! ec44da080688f9c9038c0c0cb39248b9  libstdc++-v3/testsuite/20_util/default_delete/void_neg.cc
  b3415c59024254394b532b647bc497f6  libstdc++-v3/testsuite/20_util/duration/arithmetic/1.cc
  e4b514e6ace9ea3f45a5559e581e68ac  libstdc++-v3/testsuite/20_util/duration/arithmetic/2.cc
  27fb0edde4e6b353a82bda16d421e3b0  libstdc++-v3/testsuite/20_util/duration/arithmetic/58850.cc
*************** e80cdba765ebc45f35f3465225e219a8  libstd
*** 107181,107188 ****
  8c1b26686b749cf5ad365ff9d05a5737  libstdc++-v3/testsuite/20_util/duration/requirements/reduced_period.cc
  a972cfee7b783b7695dc85eba704d4b7  libstdc++-v3/testsuite/20_util/duration/requirements/sfinae_friendly_1.cc
  d32f2eb40ce86eb35d99e7d5df9e0b62  libstdc++-v3/testsuite/20_util/duration/requirements/treat_as_floating_point_v.cc
! b2e9238e5e4a5968dd04050cc7997254  libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg1.cc
! 25c9e12b261f6af449879ac690f3c996  libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg2.cc
  e71581e883eae422b1878ffd5c272074  libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg3.cc
  d0208aa17f417e0adb70258de9ddfdb5  libstdc++-v3/testsuite/20_util/duration_cast/constexpr.cc
  f6f5a1d78824477356777d8d15b93c22  libstdc++-v3/testsuite/20_util/duration_cast/rounding.cc
--- 107391,107398 ----
  8c1b26686b749cf5ad365ff9d05a5737  libstdc++-v3/testsuite/20_util/duration/requirements/reduced_period.cc
  a972cfee7b783b7695dc85eba704d4b7  libstdc++-v3/testsuite/20_util/duration/requirements/sfinae_friendly_1.cc
  d32f2eb40ce86eb35d99e7d5df9e0b62  libstdc++-v3/testsuite/20_util/duration/requirements/treat_as_floating_point_v.cc
! 49688231c258d98c1121bf94792b23f5  libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg1.cc
! da662ecb63fff9c57d83cdd174c69253  libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg2.cc
  e71581e883eae422b1878ffd5c272074  libstdc++-v3/testsuite/20_util/duration/requirements/typedefs_neg3.cc
  d0208aa17f417e0adb70258de9ddfdb5  libstdc++-v3/testsuite/20_util/duration_cast/constexpr.cc
  f6f5a1d78824477356777d8d15b93c22  libstdc++-v3/testsuite/20_util/duration_cast/rounding.cc
*************** e97254ce4fd08fa50a505c35d5316111  libstd
*** 107201,107207 ****
  72288a1f7e75afaa7f130333f81d1d98  libstdc++-v3/testsuite/20_util/enable_shared_from_this/members/weak_from_this.cc
  6d65efb6f7e1e04dad4717a415d9674f  libstdc++-v3/testsuite/20_util/enable_shared_from_this/requirements/explicit_instantiation.cc
  409664681669399d3364b74f0eb3146e  libstdc++-v3/testsuite/20_util/exchange/1.cc
! 0f5354206a79465581c921cc3f2cba78  libstdc++-v3/testsuite/20_util/exchange/constexpr.cc
  5abbf6d20cd589946f4bdfcb28f02dd4  libstdc++-v3/testsuite/20_util/exchange/noexcept.cc
  da3718fa1e22fa960e90da076e9180db  libstdc++-v3/testsuite/20_util/expected/assign.cc
  786012815e4d290200d001a0341260c1  libstdc++-v3/testsuite/20_util/expected/bad.cc
--- 107411,107417 ----
  72288a1f7e75afaa7f130333f81d1d98  libstdc++-v3/testsuite/20_util/enable_shared_from_this/members/weak_from_this.cc
  6d65efb6f7e1e04dad4717a415d9674f  libstdc++-v3/testsuite/20_util/enable_shared_from_this/requirements/explicit_instantiation.cc
  409664681669399d3364b74f0eb3146e  libstdc++-v3/testsuite/20_util/exchange/1.cc
! 7f5bd137420f98f4a7d7e8538b615ec5  libstdc++-v3/testsuite/20_util/exchange/constexpr.cc
  5abbf6d20cd589946f4bdfcb28f02dd4  libstdc++-v3/testsuite/20_util/exchange/noexcept.cc
  da3718fa1e22fa960e90da076e9180db  libstdc++-v3/testsuite/20_util/expected/assign.cc
  786012815e4d290200d001a0341260c1  libstdc++-v3/testsuite/20_util/expected/bad.cc
*************** a7024278402f6bfa44a39f55f6161294  libstd
*** 107231,107237 ****
  5e4098df3da50ef73e46d8ffdd46b39a  libstdc++-v3/testsuite/20_util/from_chars/1_neg.cc
  527af2bc58c919e71583749ebf9cce55  libstdc++-v3/testsuite/20_util/from_chars/2.cc
  4c743055fc43cb29857c73ad99c7c811  libstdc++-v3/testsuite/20_util/from_chars/3.cc
! 25b059603915bc19f9024edb2361e09a  libstdc++-v3/testsuite/20_util/from_chars/4.cc
  afc5f2fb411348dbe627137f0be5c20f  libstdc++-v3/testsuite/20_util/from_chars/5.cc
  173967c637a04148bcc75da2fef53af7  libstdc++-v3/testsuite/20_util/from_chars/6.cc
  33cb1fba3bfa8508f23e78bc210ae25d  libstdc++-v3/testsuite/20_util/from_chars/7.cc
--- 107441,107447 ----
  5e4098df3da50ef73e46d8ffdd46b39a  libstdc++-v3/testsuite/20_util/from_chars/1_neg.cc
  527af2bc58c919e71583749ebf9cce55  libstdc++-v3/testsuite/20_util/from_chars/2.cc
  4c743055fc43cb29857c73ad99c7c811  libstdc++-v3/testsuite/20_util/from_chars/3.cc
! 9dae4db7f88acde050f7758f04464311  libstdc++-v3/testsuite/20_util/from_chars/4.cc
  afc5f2fb411348dbe627137f0be5c20f  libstdc++-v3/testsuite/20_util/from_chars/5.cc
  173967c637a04148bcc75da2fef53af7  libstdc++-v3/testsuite/20_util/from_chars/6.cc
  33cb1fba3bfa8508f23e78bc210ae25d  libstdc++-v3/testsuite/20_util/from_chars/7.cc
*************** fe9469f3df706448a4da3b435459235c  libstd
*** 107350,107356 ****
  f458ef6e28dd60e84def3afb83add43f  libstdc++-v3/testsuite/20_util/headers/functional/synopsis.cc
  b638d5a1436ae1ef82d64e143096673c  libstdc++-v3/testsuite/20_util/headers/functional/types_std_c++0x.cc
  e5037351f89d0c490f773de5e8663921  libstdc++-v3/testsuite/20_util/headers/functional/using_namespace_std_placeholders.cc
! 1ce043d1bf57756c331e317e1b9e515a  libstdc++-v3/testsuite/20_util/headers/memory/synopsis.cc
  f25a24c9881b0423d62f56322f00e192  libstdc++-v3/testsuite/20_util/headers/memory/types_std_c++0x.cc
  029aa6a284914b0a9b1933208ee6d909  libstdc++-v3/testsuite/20_util/headers/type_traits/std_c++0x_neg.cc
  8158b6cba3b9e34ee67ac99fb5984678  libstdc++-v3/testsuite/20_util/headers/type_traits/types_std_c++0x.cc
--- 107560,107566 ----
  f458ef6e28dd60e84def3afb83add43f  libstdc++-v3/testsuite/20_util/headers/functional/synopsis.cc
  b638d5a1436ae1ef82d64e143096673c  libstdc++-v3/testsuite/20_util/headers/functional/types_std_c++0x.cc
  e5037351f89d0c490f773de5e8663921  libstdc++-v3/testsuite/20_util/headers/functional/using_namespace_std_placeholders.cc
! df51b5ed5f0cd9728ccbb7e67808bb02  libstdc++-v3/testsuite/20_util/headers/memory/synopsis.cc
  f25a24c9881b0423d62f56322f00e192  libstdc++-v3/testsuite/20_util/headers/memory/types_std_c++0x.cc
  029aa6a284914b0a9b1933208ee6d909  libstdc++-v3/testsuite/20_util/headers/type_traits/std_c++0x_neg.cc
  8158b6cba3b9e34ee67ac99fb5984678  libstdc++-v3/testsuite/20_util/headers/type_traits/types_std_c++0x.cc
*************** ae78d4e1f061aaf6556908dc649baabd  libstd
*** 107374,107380 ****
--- 107584,107592 ----
  1ef204a969d3f470c0de434d5a42dd20  libstdc++-v3/testsuite/20_util/integer_comparisons/less_neg.cc
  d40d281f67bbddfd8ee3afa09db84194  libstdc++-v3/testsuite/20_util/integer_comparisons/not_equal.cc
  cff204fedb508acd88251e570815bd1e  libstdc++-v3/testsuite/20_util/integer_comparisons/not_equal_neg.cc
+ 01419816e55df10955ea47006b7fd41b  libstdc++-v3/testsuite/20_util/integer_sequence/112473.cc
  77217a1a0be9e8752b771ab62615174e  libstdc++-v3/testsuite/20_util/integer_sequence/intseq.cc
+ b299881c5f8a46c9954c9cfffbb15437  libstdc++-v3/testsuite/20_util/integer_sequence/pr111357.cc
  159d3fde83605a05000ed1adee3483a5  libstdc++-v3/testsuite/20_util/integer_sequence/requirements/typedefs.cc
  d83f2a7f8162634068865ab00d86a66a  libstdc++-v3/testsuite/20_util/integral_constant/call_operator.cc
  2447082448aab79905ba32b3aa79c2aa  libstdc++-v3/testsuite/20_util/integral_constant/operator_value_type.cc
*************** eb9bfe0027ea25f86df479187f2e2b51  libstd
*** 107762,107767 ****
--- 107974,107980 ----
  2e7aead929c8a20b8f4de6346cd95db7  libstdc++-v3/testsuite/20_util/optional/observers/6.cc
  d8af3640e7aabc8dd1960265b3ca5a27  libstdc++-v3/testsuite/20_util/optional/observers/lwg2762.cc
  7c9d417a4b0745e80dc5d920811dd7c1  libstdc++-v3/testsuite/20_util/optional/relops/1.cc
+ 9b0c6c5d74424693ceca6e756d7db294  libstdc++-v3/testsuite/20_util/optional/relops/104606.cc
  e7375870ac149e6fd0b61a1ce5c07e22  libstdc++-v3/testsuite/20_util/optional/relops/2.cc
  b82e5c7c2c813fea4e4e3c1e22106f9a  libstdc++-v3/testsuite/20_util/optional/relops/3.cc
  3ac691fa9feebe1a9124e9dfe774cae8  libstdc++-v3/testsuite/20_util/optional/relops/4.cc
*************** f63763611d2f39c6364f5717ce8aabe0  libstd
*** 107824,107830 ****
  5caef850610155be9b6c2033eeeb4d30  libstdc++-v3/testsuite/20_util/pair/swap_cxx17.cc
  c5d2ad990f812ed47a8b071884c2320f  libstdc++-v3/testsuite/20_util/pair/traits.cc
  4db5230edc60daf04deb5d886b7682e4  libstdc++-v3/testsuite/20_util/pointer_safety/1.cc
! 137193e221b043692c29a575c84f55f7  libstdc++-v3/testsuite/20_util/pointer_traits/lwg3545.cc
  2975cb430bb44eb904c416b203f8ae5c  libstdc++-v3/testsuite/20_util/pointer_traits/pointer_to.cc
  f860bff45e1170370ba6fc13aea4b94f  libstdc++-v3/testsuite/20_util/pointer_traits/pointer_to_constexpr.cc
  72a6d074e60a1b3b35cd824784faa89f  libstdc++-v3/testsuite/20_util/pointer_traits/rebind.cc
--- 108037,108043 ----
  5caef850610155be9b6c2033eeeb4d30  libstdc++-v3/testsuite/20_util/pair/swap_cxx17.cc
  c5d2ad990f812ed47a8b071884c2320f  libstdc++-v3/testsuite/20_util/pair/traits.cc
  4db5230edc60daf04deb5d886b7682e4  libstdc++-v3/testsuite/20_util/pointer_safety/1.cc
! 4ea61b01821ef91d050e7dc8bc19448b  libstdc++-v3/testsuite/20_util/pointer_traits/lwg3545.cc
  2975cb430bb44eb904c416b203f8ae5c  libstdc++-v3/testsuite/20_util/pointer_traits/pointer_to.cc
  f860bff45e1170370ba6fc13aea4b94f  libstdc++-v3/testsuite/20_util/pointer_traits/pointer_to_constexpr.cc
  72a6d074e60a1b3b35cd824784faa89f  libstdc++-v3/testsuite/20_util/pointer_traits/rebind.cc
*************** ee06c841bb23b4293304a23ddb3e1b97  libstd
*** 107855,107860 ****
--- 108068,108074 ----
  388c1b29064b2df244e9e89f3d18ae98  libstdc++-v3/testsuite/20_util/ratio/operations/ops_overflow_neg.cc
  6785d8ad8eab79be32eb8a1acab31957  libstdc++-v3/testsuite/20_util/ratio/requirements/constexpr_data.cc
  fb3427c994513620f40b5feb9d0ca9bb  libstdc++-v3/testsuite/20_util/ratio/requirements/ratio_equal_v.cc
+ d8bbe2c17046f08594a91f5a8e216ba7  libstdc++-v3/testsuite/20_util/ratio/requirements/type_constraints.cc
  adb5d68178006afea0a210c3b6d00b75  libstdc++-v3/testsuite/20_util/raw_storage_iterator/base.cc
  349d560eb6fa81f631f92d67b31e6a52  libstdc++-v3/testsuite/20_util/raw_storage_iterator/dr2127.cc
  d9bd349f9dd045de18c630078b82944e  libstdc++-v3/testsuite/20_util/raw_storage_iterator/requirements/base_classes.cc
*************** a3e2460d6bfae92a75109fe32407b41e  libstd
*** 107919,107924 ****
--- 108133,108139 ----
  9cc69f57d4e8b0f5602b4ebbd25be92b  libstdc++-v3/testsuite/20_util/scoped_allocator/construct_pair.cc
  0ae95cda47e71f65e553871b84de1398  libstdc++-v3/testsuite/20_util/scoped_allocator/construct_pair_c++2a.cc
  da4d65552940e65aa9d1b59f671421ca  libstdc++-v3/testsuite/20_util/scoped_allocator/dr2586.cc
+ 52ac694fb85b64837c02f1c4a7a2ebc9  libstdc++-v3/testsuite/20_util/scoped_allocator/noexcept.cc
  2ca4dc91545f4fa74b0b77f0d54e2ff2  libstdc++-v3/testsuite/20_util/scoped_allocator/outermost.cc
  cf2b68a4f2e80d3601f099fa53008067  libstdc++-v3/testsuite/20_util/scoped_allocator/propagation.cc
  11406f1cab3a7c7fd3f2a496454cc2ba  libstdc++-v3/testsuite/20_util/scoped_allocator/requirements/explicit_instantiation.cc
*************** e229d21ad28b17cf86e6023bb17532b6  libstd
*** 107981,107987 ****
  54c06b1286f303cf4fd6c5ec441153d8  libstdc++-v3/testsuite/20_util/shared_ptr/cons/unique_ptr_deleter_ref_1.cc
  f33d1878b4dbc41ec42803e9f34d9eb5  libstdc++-v3/testsuite/20_util/shared_ptr/cons/unique_ptr_deleter_ref_2.cc
  64521dae3f2aa23bd5aec6d59bc85edb  libstdc++-v3/testsuite/20_util/shared_ptr/cons/unique_ptr_neg.cc
! 7eaa4e5e65923584e56643495f1b5bce  libstdc++-v3/testsuite/20_util/shared_ptr/cons/void_neg.cc
  a528a67a2796e98f560c2ad59405ac7b  libstdc++-v3/testsuite/20_util/shared_ptr/cons/weak_ptr.cc
  e447654b7496b7e56ebe484e788d4d77  libstdc++-v3/testsuite/20_util/shared_ptr/cons/weak_ptr_expired.cc
  0ac7da30cf3e24d402140edd73403a98  libstdc++-v3/testsuite/20_util/shared_ptr/creation/36949.cc
--- 108196,108202 ----
  54c06b1286f303cf4fd6c5ec441153d8  libstdc++-v3/testsuite/20_util/shared_ptr/cons/unique_ptr_deleter_ref_1.cc
  f33d1878b4dbc41ec42803e9f34d9eb5  libstdc++-v3/testsuite/20_util/shared_ptr/cons/unique_ptr_deleter_ref_2.cc
  64521dae3f2aa23bd5aec6d59bc85edb  libstdc++-v3/testsuite/20_util/shared_ptr/cons/unique_ptr_neg.cc
! da830a9eb9b6c692238054df8e4f3bc6  libstdc++-v3/testsuite/20_util/shared_ptr/cons/void_neg.cc
  a528a67a2796e98f560c2ad59405ac7b  libstdc++-v3/testsuite/20_util/shared_ptr/cons/weak_ptr.cc
  e447654b7496b7e56ebe484e788d4d77  libstdc++-v3/testsuite/20_util/shared_ptr/cons/weak_ptr_expired.cc
  0ac7da30cf3e24d402140edd73403a98  libstdc++-v3/testsuite/20_util/shared_ptr/creation/36949.cc
*************** a7b9f2532325aa2dbcb244a2b8858e6d  libstd
*** 108115,108121 ****
  224c36f900afc5ec2ad272b606f5f8d6  libstdc++-v3/testsuite/20_util/to_chars/compare.cc
  5023f6c1a2d374e90adee1ec171efa98  libstdc++-v3/testsuite/20_util/to_chars/double.cc
  23ac211304a3685d878056005dca6369  libstdc++-v3/testsuite/20_util/to_chars/float.cc
! 5d2a72f0b0bb14657b7d750212e5d8b2  libstdc++-v3/testsuite/20_util/to_chars/long_double.cc
  b7f24939aa37c4de46e365ee2377af7f  libstdc++-v3/testsuite/20_util/to_chars/lwg3266.cc
  c750e67c3f3c2a58166a927c07e4c2bc  libstdc++-v3/testsuite/20_util/to_chars/requirements.cc
  05340145a7552fa3d7b9ef3667d9d88d  libstdc++-v3/testsuite/20_util/to_underlying/1.cc
--- 108330,108336 ----
  224c36f900afc5ec2ad272b606f5f8d6  libstdc++-v3/testsuite/20_util/to_chars/compare.cc
  5023f6c1a2d374e90adee1ec171efa98  libstdc++-v3/testsuite/20_util/to_chars/double.cc
  23ac211304a3685d878056005dca6369  libstdc++-v3/testsuite/20_util/to_chars/float.cc
! 2929c86a21f643fd66a85636ac25ece5  libstdc++-v3/testsuite/20_util/to_chars/long_double.cc
  b7f24939aa37c4de46e365ee2377af7f  libstdc++-v3/testsuite/20_util/to_chars/lwg3266.cc
  c750e67c3f3c2a58166a927c07e4c2bc  libstdc++-v3/testsuite/20_util/to_chars/requirements.cc
  05340145a7552fa3d7b9ef3667d9d88d  libstdc++-v3/testsuite/20_util/to_underlying/1.cc
*************** cbbdfb59b20fecf9c36e7976a7e7b591  libstd
*** 108141,108146 ****
--- 108356,108362 ----
  b63b11f3e0b7691716b7b97386098c37  libstdc++-v3/testsuite/20_util/tuple/comparison_operators/three_way.cc
  d23b1a747046dfeaadefce18d2c02b12  libstdc++-v3/testsuite/20_util/tuple/cons/101960.cc
  32c154912a091023741fdaa263538a86  libstdc++-v3/testsuite/20_util/tuple/cons/102270.cc
+ 9a6dc1f9548e126de2581231c632a19f  libstdc++-v3/testsuite/20_util/tuple/cons/114147.cc
  d61a2574bb2f78ba189fb3d3d976b60f  libstdc++-v3/testsuite/20_util/tuple/cons/41530.cc
  f73a0d86bc346a26b596c982337a6ee4  libstdc++-v3/testsuite/20_util/tuple/cons/44487.cc
  9a6caf96eceee35edd4509647bec7df7  libstdc++-v3/testsuite/20_util/tuple/cons/45228.cc
*************** bbb7e8d91361816c5b935b7d6be7171f  libstd
*** 108256,108262 ****
  c1cd4a3f6b5b59a88032dbf805303d25  libstdc++-v3/testsuite/20_util/unique_ptr/creation/array.cc
  826674ffd67673c076a869791f2541b6  libstdc++-v3/testsuite/20_util/unique_ptr/creation/array_neg.cc
  2792ef777902e600585d3d371995f27e  libstdc++-v3/testsuite/20_util/unique_ptr/creation/constexpr.cc
! 118eaf245c4bfe5b8fe9ec33499a7905  libstdc++-v3/testsuite/20_util/unique_ptr/creation/for_overwrite.cc
  1c0ba278f2dc6c12ee8e5ba060feac89  libstdc++-v3/testsuite/20_util/unique_ptr/creation/for_overwrite__neg.cc
  d8442bac5982eadab8ea3614c54314f1  libstdc++-v3/testsuite/20_util/unique_ptr/creation/single.cc
  885f41e25fd52834ab5f4aaedab6120b  libstdc++-v3/testsuite/20_util/unique_ptr/dr2228.cc
--- 108472,108478 ----
  c1cd4a3f6b5b59a88032dbf805303d25  libstdc++-v3/testsuite/20_util/unique_ptr/creation/array.cc
  826674ffd67673c076a869791f2541b6  libstdc++-v3/testsuite/20_util/unique_ptr/creation/array_neg.cc
  2792ef777902e600585d3d371995f27e  libstdc++-v3/testsuite/20_util/unique_ptr/creation/constexpr.cc
! 12b7fc295d7fd872918eece1b32ccf14  libstdc++-v3/testsuite/20_util/unique_ptr/creation/for_overwrite.cc
  1c0ba278f2dc6c12ee8e5ba060feac89  libstdc++-v3/testsuite/20_util/unique_ptr/creation/for_overwrite__neg.cc
  d8442bac5982eadab8ea3614c54314f1  libstdc++-v3/testsuite/20_util/unique_ptr/creation/single.cc
  885f41e25fd52834ab5f4aaedab6120b  libstdc++-v3/testsuite/20_util/unique_ptr/dr2228.cc
*************** f7d0f9129e0b14e1c3df4a90394eaa38  libstd
*** 108368,108381 ****
  47a30bf063796d65f2bb5f1e0d3bc7ac  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/1.cc
  e4b279a4f3b9abde058d6cb00a5c89ba  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/18654.cc
  f9a91331593aabe548c2fc0e48acb792  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/2.cc
! f3ba4193abdc2fa4d0bd35a950966823  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite.cc
  21a08162c432ecd45acdcf71514da2a5  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/shrink_to_fit.cc
  6f776af274307bd76d3595e2bdead30e  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/1.cc
  710c93966d68c68a3e2b4606a1cd55ed  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/18654.cc
  5511ce6451d8fc11cd2177e28e767cdf  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/2.cc
  33fbb68611c0d2796a632eb756426ff8  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/shrink_to_fit.cc
  bc8bf776e5ee41c9814d26072b74f552  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/1.cc
! 408950d5673e5a28433457ba820da161  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/103919.cc
  be058c3faf15d6649e949b8b50bc53fb  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/105995.cc
  7cbb90b06fb23bfb46f181effd3fb1d1  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/2.cc
  c3f6121645f290dc77eaea7e494552e3  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/3.cc
--- 108584,108597 ----
  47a30bf063796d65f2bb5f1e0d3bc7ac  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/1.cc
  e4b279a4f3b9abde058d6cb00a5c89ba  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/18654.cc
  f9a91331593aabe548c2fc0e48acb792  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/2.cc
! 24a38889a74f6c2286556a1ea532a9ce  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite.cc
  21a08162c432ecd45acdcf71514da2a5  libstdc++-v3/testsuite/21_strings/basic_string/capacity/char/shrink_to_fit.cc
  6f776af274307bd76d3595e2bdead30e  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/1.cc
  710c93966d68c68a3e2b4606a1cd55ed  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/18654.cc
  5511ce6451d8fc11cd2177e28e767cdf  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/2.cc
  33fbb68611c0d2796a632eb756426ff8  libstdc++-v3/testsuite/21_strings/basic_string/capacity/wchar_t/shrink_to_fit.cc
  bc8bf776e5ee41c9814d26072b74f552  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/1.cc
! 122070b73ab61f4cd7f3bf7dca05ad4c  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/103919.cc
  be058c3faf15d6649e949b8b50bc53fb  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/105995.cc
  7cbb90b06fb23bfb46f181effd3fb1d1  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/2.cc
  c3f6121645f290dc77eaea7e494552e3  libstdc++-v3/testsuite/21_strings/basic_string/cons/char/3.cc
*************** b11d0df57f224d847aa3d0cb18f8f4bb  libstd
*** 108627,108638 ****
  3be6aa269cbd95b653b6ea8205b19c8d  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/3.cc
  8a5aedc5a351256b6af8b9d145c6def8  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/nonnull.cc
  0b6a2443178aa75da3ceb62696d49e66  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/range.cc
! dd73b87ff09b692a47a9f72f5fdfbea7  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/range_c++20.cc
  eb0cd7f4dc47b332e4b989164dbf3596  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/1.cc
  19abc9659deed856b266404089b4a97f  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/2.cc
  40bb94b540026ddf7f8657de7554ab2d  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/3.cc
  e26edf9d921a7ba6d7d719a5e60bd472  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/nonnull.cc
! 70c18cee988dbc78964b72ba9c7b52a1  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/range_c++20.cc
  33a72c1b879b7f225bab2d6798ba53df  libstdc++-v3/testsuite/21_strings/basic_string_view/element_access/char/1.cc
  82d6917465a3bdbb78d67ae494174910  libstdc++-v3/testsuite/21_strings/basic_string_view/element_access/char/2.cc
  f51217ab4eda42699b30463d9c64760f  libstdc++-v3/testsuite/21_strings/basic_string_view/element_access/char/back_constexpr_neg.cc
--- 108843,108854 ----
  3be6aa269cbd95b653b6ea8205b19c8d  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/3.cc
  8a5aedc5a351256b6af8b9d145c6def8  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/nonnull.cc
  0b6a2443178aa75da3ceb62696d49e66  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/range.cc
! 7c9f4e5f6fe5fbf99f7f9c2761e884f1  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/range_c++20.cc
  eb0cd7f4dc47b332e4b989164dbf3596  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/1.cc
  19abc9659deed856b266404089b4a97f  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/2.cc
  40bb94b540026ddf7f8657de7554ab2d  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/3.cc
  e26edf9d921a7ba6d7d719a5e60bd472  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/nonnull.cc
! 703dc662683b3d60ac586848b8ce6cc6  libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_t/range_c++20.cc
  33a72c1b879b7f225bab2d6798ba53df  libstdc++-v3/testsuite/21_strings/basic_string_view/element_access/char/1.cc
  82d6917465a3bdbb78d67ae494174910  libstdc++-v3/testsuite/21_strings/basic_string_view/element_access/char/2.cc
  f51217ab4eda42699b30463d9c64760f  libstdc++-v3/testsuite/21_strings/basic_string_view/element_access/char/back_constexpr_neg.cc
*************** cc2f020563c3847b68e798d098126ab4  libstd
*** 108664,108671 ****
--- 108880,108889 ----
  c49dc63272bc485aa7a87cfc078d3242  libstdc++-v3/testsuite/21_strings/basic_string_view/literals/values-char8_t.cc
  7e6023e76cf2d41e8d67c2521c34f0b1  libstdc++-v3/testsuite/21_strings/basic_string_view/literals/values.cc
  ce32a948987ee0257f6c1c20759ae9ba  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_prefix/char/1.cc
+ be3b65e8d28ffd0b6c071ad71ef5662a  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_prefix/debug.cc
  64971260c3c99f4bf03ef94b5547589b  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_prefix/wchar_t/1.cc
  e83ee45f270b4b9df21249b1f4d6d528  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_suffix/char/1.cc
+ ef869b073577745bda077a76ccf586b4  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_suffix/debug.cc
  6b382b94f0a3a85d2b7a04ebb5c95d80  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/remove_suffix/wchar_t/1.cc
  29069c42f8ea2f8510d54827fb9ea605  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/swap/char/1.cc
  c212a698edf0c7104ba92da18834aece  libstdc++-v3/testsuite/21_strings/basic_string_view/modifiers/swap/wchar_t/1.cc
*************** cbe8dd34cb38d056b20592fe96d50940  libstd
*** 108731,108737 ****
  315e59bf71624bfddd1704955e8f5026  libstdc++-v3/testsuite/21_strings/basic_string_view/requirements/traits_neg.cc
  58947d8735c23b82574427ce2851e965  libstdc++-v3/testsuite/21_strings/basic_string_view/requirements/trivially_copyable.cc
  aa743a3bf573499c0785c35cd42e85fb  libstdc++-v3/testsuite/21_strings/basic_string_view/requirements/typedefs.cc
! 847f86350f5eac76fe17cd432a64f4a5  libstdc++-v3/testsuite/21_strings/basic_string_view/typedefs.cc
  2d9e8d751d3e458bf070d211d6afef49  libstdc++-v3/testsuite/21_strings/basic_string_view/types/1.cc
  b5684c275c956cee9f797a9f3ad5626a  libstdc++-v3/testsuite/21_strings/c_strings/char/1.cc
  f9218ebcfbd2487131e1696c75a12702  libstdc++-v3/testsuite/21_strings/c_strings/char/2.cc
--- 108949,108955 ----
  315e59bf71624bfddd1704955e8f5026  libstdc++-v3/testsuite/21_strings/basic_string_view/requirements/traits_neg.cc
  58947d8735c23b82574427ce2851e965  libstdc++-v3/testsuite/21_strings/basic_string_view/requirements/trivially_copyable.cc
  aa743a3bf573499c0785c35cd42e85fb  libstdc++-v3/testsuite/21_strings/basic_string_view/requirements/typedefs.cc
! f933df0db3751fab21097de7b0fdf3b8  libstdc++-v3/testsuite/21_strings/basic_string_view/typedefs.cc
  2d9e8d751d3e458bf070d211d6afef49  libstdc++-v3/testsuite/21_strings/basic_string_view/types/1.cc
  b5684c275c956cee9f797a9f3ad5626a  libstdc++-v3/testsuite/21_strings/c_strings/char/1.cc
  f9218ebcfbd2487131e1696c75a12702  libstdc++-v3/testsuite/21_strings/c_strings/char/2.cc
*************** b585a1bbf03dd84e79127526e05b6b7a  libstd
*** 108741,108746 ****
--- 108959,108965 ----
  f93ec43aa4dd8a420a7ece2440e0666b  libstdc++-v3/testsuite/21_strings/c_strings/wchar_t/2.cc
  22bfc5ed265e4143ba00dd09c45ce88e  libstdc++-v3/testsuite/21_strings/c_strings/wchar_t/24559.cc
  2ec63f6752702d324bcea6556ae1bfe5  libstdc++-v3/testsuite/21_strings/c_strings/wchar_t/3_neg.cc
+ 82d6b4f00580779800e341ec6c9ffaea  libstdc++-v3/testsuite/21_strings/char_traits/requirements/113200.cc
  2b5c3fe3f4e29007d663c0c64a31ec6b  libstdc++-v3/testsuite/21_strings/char_traits/requirements/char/1.cc
  6ba9605ad5b8901d814b619f3e486a3c  libstdc++-v3/testsuite/21_strings/char_traits/requirements/char/57704.cc
  6ca3d966dbea1443e11d0455e8b8a6bd  libstdc++-v3/testsuite/21_strings/char_traits/requirements/char/65049.cc
*************** a8e6b7213cb563f803aabba9861cd5c1  libstd
*** 108799,108804 ****
--- 109018,109026 ----
  d852212d2ead3d526429dcef2df15959  libstdc++-v3/testsuite/22_locale/codecvt/char16_t.cc
  2178238c43cb9063edb4480912809fdb  libstdc++-v3/testsuite/22_locale/codecvt/char32_t-char8_t.cc
  03932ee68bfe475d06d1cf860be50b52  libstdc++-v3/testsuite/22_locale/codecvt/char32_t.cc
+ 39e115ce2884a387df120350fd0ad60b  libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode.cc
+ ed6edab6f59b87234fc2bae1fe8db3cb  libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode.h
+ a7a3af87e049ad325f7701ed518dcdee  libstdc++-v3/testsuite/22_locale/codecvt/codecvt_unicode_wchar_t.cc
  176b52905d389a9d85a771637808db33  libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf16/66417.cc
  18d58fc402135cc84f5023d5b9344936  libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf16/79980.cc
  e604ead22a0915a67aca53d9e6c88142  libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf16/80041.cc
*************** bd280f3ea3e5d9abf50dd2d5c3c1ea42  libstd
*** 109418,109423 ****
--- 109640,109647 ----
  32ac54909221492a28e633b359888c7c  libstdc++-v3/testsuite/23_containers/array/cons/deduction.cc
  e7020060d3f451aafff35f4f5f1c45ed  libstdc++-v3/testsuite/23_containers/array/cons/deduction_neg.cc
  a0a4fd0ebb58bd078933f95239938034  libstdc++-v3/testsuite/23_containers/array/creation/1.cc
+ 29863c1177013eb82c96ce1e6df02aea  libstdc++-v3/testsuite/23_containers/array/creation/110167.cc
+ c33e3cf546fa87ee1cf2a1313c16655a  libstdc++-v3/testsuite/23_containers/array/creation/111512.cc
  aa17ba9d9b09772b44a183382127ba06  libstdc++-v3/testsuite/23_containers/array/creation/2.cc
  3c3b42932a234b65502e903d67e8f2d8  libstdc++-v3/testsuite/23_containers/array/creation/3_neg.cc
  fe745a295fadf30b545b3d8d16e52a34  libstdc++-v3/testsuite/23_containers/array/debug/back1_neg.cc
*************** e8114d1769d117c368830eb0c7e39b1e  libstd
*** 109554,109562 ****
  ae8b2280d05e29df06d36c98cdb105da  libstdc++-v3/testsuite/23_containers/deque/erasure.cc
  49570c8f2526d4bcac96113389bcbe2f  libstdc++-v3/testsuite/23_containers/deque/init-list.cc
  9d5278f518894accc9b8e1dc3c4dbbd2  libstdc++-v3/testsuite/23_containers/deque/modifiers/assign/1.cc
! 0034f5fd400c9cbb1bb7d78b34c39420  libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/52799.cc
  1aa01e2edef2f76f4833d0c90ecd0014  libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/92878_92947.cc
- 06aba31d0af36c463b4d0a9939af86fc  libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/const_iterator.cc
  f3045ecf6b8921fc4cdc9c92900777f3  libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/cxx17_return.cc
  2c76f139cc33a06edc7644f522965188  libstdc++-v3/testsuite/23_containers/deque/modifiers/erase/1.cc
  6b3511627daf465cc60fc8d69615cd04  libstdc++-v3/testsuite/23_containers/deque/modifiers/erase/2.cc
--- 109778,109785 ----
  ae8b2280d05e29df06d36c98cdb105da  libstdc++-v3/testsuite/23_containers/deque/erasure.cc
  49570c8f2526d4bcac96113389bcbe2f  libstdc++-v3/testsuite/23_containers/deque/init-list.cc
  9d5278f518894accc9b8e1dc3c4dbbd2  libstdc++-v3/testsuite/23_containers/deque/modifiers/assign/1.cc
! 5b30438ec704fa2989c2780d4b7988b0  libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/1.cc
  1aa01e2edef2f76f4833d0c90ecd0014  libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/92878_92947.cc
  f3045ecf6b8921fc4cdc9c92900777f3  libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/cxx17_return.cc
  2c76f139cc33a06edc7644f522965188  libstdc++-v3/testsuite/23_containers/deque/modifiers/erase/1.cc
  6b3511627daf465cc60fc8d69615cd04  libstdc++-v3/testsuite/23_containers/deque/modifiers/erase/2.cc
*************** d71acc9fb4c70a3d2e4a6b65aa0f8300  libstd
*** 109803,109811 ****
  d25b6635b03255d71ed5c110eb9027b7  libstdc++-v3/testsuite/23_containers/list/modifiers/3.h
  8afee581c66a68b2f94906125016a858  libstdc++-v3/testsuite/23_containers/list/modifiers/addressof.cc
  92e3a603af90854c437499ef9b831a26  libstdc++-v3/testsuite/23_containers/list/modifiers/assign/1.cc
! 40e1a1753586a34c905bfb2d8eb0eb82  libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/52799.cc
  12c057db25765d5edb053a225d78c40f  libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/92878_92947.cc
- 81639ee17c309ead699ddcc9cdb22b14  libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/const_iterator.cc
  7152d3ca1891e71f501363f1b22e014b  libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/cxx17_return.cc
  13115fde4dfda8892f0fa9a8fb8ba354  libstdc++-v3/testsuite/23_containers/list/modifiers/erase/54577.cc
  df75c73238ff2c8a2da1f50a46746bda  libstdc++-v3/testsuite/23_containers/list/modifiers/insert/25288.cc
--- 110026,110033 ----
  d25b6635b03255d71ed5c110eb9027b7  libstdc++-v3/testsuite/23_containers/list/modifiers/3.h
  8afee581c66a68b2f94906125016a858  libstdc++-v3/testsuite/23_containers/list/modifiers/addressof.cc
  92e3a603af90854c437499ef9b831a26  libstdc++-v3/testsuite/23_containers/list/modifiers/assign/1.cc
! c25b0a9dc317b9f58288d8f92299007f  libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/1.cc
  12c057db25765d5edb053a225d78c40f  libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/92878_92947.cc
  7152d3ca1891e71f501363f1b22e014b  libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/cxx17_return.cc
  13115fde4dfda8892f0fa9a8fb8ba354  libstdc++-v3/testsuite/23_containers/list/modifiers/erase/54577.cc
  df75c73238ff2c8a2da1f50a46746bda  libstdc++-v3/testsuite/23_containers/list/modifiers/insert/25288.cc
*************** ccff29b520f9850a776c70074e8ea654  libstd
*** 109909,109915 ****
  8642b25c59832140c46994b559a3d1a8  libstdc++-v3/testsuite/23_containers/map/modifiers/108554.cc
  a2fa5a1d057fba63d0586996fd4e5f8b  libstdc++-v3/testsuite/23_containers/map/modifiers/dr130.cc
  190ea7e44e5f498d530d5f384460db60  libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/1.cc
! 65c93864ca531a2dafefb20331b9de6e  libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/92300.cc
  31f967a5bb275aefe7af35363b1a2390  libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/92878_92947.cc
  10c03d16c56c505b0d533a0231f9e320  libstdc++-v3/testsuite/23_containers/map/modifiers/erase/47628.cc
  0abbd71a92f9993b46c8436b5fd00e90  libstdc++-v3/testsuite/23_containers/map/modifiers/erase/51142.cc
--- 110131,110137 ----
  8642b25c59832140c46994b559a3d1a8  libstdc++-v3/testsuite/23_containers/map/modifiers/108554.cc
  a2fa5a1d057fba63d0586996fd4e5f8b  libstdc++-v3/testsuite/23_containers/map/modifiers/dr130.cc
  190ea7e44e5f498d530d5f384460db60  libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/1.cc
! 205086c15a257b2b3847ce68833198f5  libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/92300.cc
  31f967a5bb275aefe7af35363b1a2390  libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/92878_92947.cc
  10c03d16c56c505b0d533a0231f9e320  libstdc++-v3/testsuite/23_containers/map/modifiers/erase/47628.cc
  0abbd71a92f9993b46c8436b5fd00e90  libstdc++-v3/testsuite/23_containers/map/modifiers/erase/51142.cc
*************** bce5590dc4177d3794bcbc8141dc49c1  libstd
*** 109926,109932 ****
  16ee8a55b9ef14176dff7dd15960bce5  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/78595.cc
  c423b3f9feda6d2258e89ab2d974ead8  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/83226.cc
  08d4c52d7b974928c7bf742b835f3474  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/87194.cc
! 0c90bbb89e71d8600d1700a29a8e6b52  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/92300.cc
  d9943e9761bc07a076f479c9b32f9c3b  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/dr2354.cc
  d97a111c9e7b7487c26b2157acbaeaa9  libstdc++-v3/testsuite/23_containers/map/modifiers/insert_or_assign/1.cc
  eebc3dd165121b6a55acfd197e30b097  libstdc++-v3/testsuite/23_containers/map/modifiers/merge.cc
--- 110148,110154 ----
  16ee8a55b9ef14176dff7dd15960bce5  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/78595.cc
  c423b3f9feda6d2258e89ab2d974ead8  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/83226.cc
  08d4c52d7b974928c7bf742b835f3474  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/87194.cc
! bf1079f7dbecd612e1c7ff8cc0558abc  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/92300.cc
  d9943e9761bc07a076f479c9b32f9c3b  libstdc++-v3/testsuite/23_containers/map/modifiers/insert/dr2354.cc
  d97a111c9e7b7487c26b2157acbaeaa9  libstdc++-v3/testsuite/23_containers/map/modifiers/insert_or_assign/1.cc
  eebc3dd165121b6a55acfd197e30b097  libstdc++-v3/testsuite/23_containers/map/modifiers/merge.cc
*************** b90033bf134172fa5857680599d4fb43  libstd
*** 110070,110075 ****
--- 110292,110298 ----
  1f2057626117ba0f2fef313ab9121fa9  libstdc++-v3/testsuite/23_containers/multiset/debug/move_assign_neg.cc
  8c45857d459b7057a803a299991cac30  libstdc++-v3/testsuite/23_containers/multiset/debug/move_neg.cc
  1bdeadc0b50cc91e2151afcdb2371adf  libstdc++-v3/testsuite/23_containers/multiset/init-list.cc
+ b761d5230bf4935944006f713e5604d5  libstdc++-v3/testsuite/23_containers/multiset/modifiers/114401.cc
  4c36e202d6abd8306550ce348e12b0cd  libstdc++-v3/testsuite/23_containers/multiset/modifiers/dr130.cc
  cea6cf805e4009657d1c4634153f8ce3  libstdc++-v3/testsuite/23_containers/multiset/modifiers/emplace/1.cc
  04dd6410ae9c4467847c20d2676d0459  libstdc++-v3/testsuite/23_containers/multiset/modifiers/emplace/92878_92947.cc
*************** a97381ea5bd9d71f1b2acb4fac3c8d3a  libstd
*** 110182,110187 ****
--- 110405,110411 ----
  eec660a30623e93c2c265aa52e826178  libstdc++-v3/testsuite/23_containers/set/debug/move_neg.cc
  dbf252bf31115b88d0ea72c000bb9105  libstdc++-v3/testsuite/23_containers/set/erasure.cc
  4378e383c4836188ab85292183733169  libstdc++-v3/testsuite/23_containers/set/init-list.cc
+ 600f3a07c5d12def9ca643094daf86cd  libstdc++-v3/testsuite/23_containers/set/modifiers/114401.cc
  ca83c2cd9ba50771210d79b9e9e26a9b  libstdc++-v3/testsuite/23_containers/set/modifiers/16728.cc
  56efde33fea333b0aafe8a6d145a9d1a  libstdc++-v3/testsuite/23_containers/set/modifiers/17948.cc
  9bf1d5e6b5c7ccdbe887e1aa22a6188d  libstdc++-v3/testsuite/23_containers/set/modifiers/dr130.cc
*************** f4993e60c966cbd7b7c00a8a0fa6a17b  libstd
*** 110345,110351 ****
  1e14e83ef4746bb9169430b1d5bd9a5a  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/emplace.cc
  b827d771e02de1a1f930ec7e5c7b6765  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/extract.cc
  5c0c1ad89698c2805855fb0b70d10e6b  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/insert_or_assign.cc
! cab517ef1ca869f351a0cdd1cca03942  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/merge.cc
  c9846991c4ca0ce97b56c75dcce0fe88  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/move_assign.cc
  c31ead35490503b9cd3ca60543467c49  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/reserve.cc
  5510fa6dbcd62dde70eb4fd314d91179  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/try_emplace.cc
--- 110569,110575 ----
  1e14e83ef4746bb9169430b1d5bd9a5a  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/emplace.cc
  b827d771e02de1a1f930ec7e5c7b6765  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/extract.cc
  5c0c1ad89698c2805855fb0b70d10e6b  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/insert_or_assign.cc
! 1f5077bbd2eb2b7952076000e8783b81  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/merge.cc
  c9846991c4ca0ce97b56c75dcce0fe88  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/move_assign.cc
  c31ead35490503b9cd3ca60543467c49  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/reserve.cc
  5510fa6dbcd62dde70eb4fd314d91179  libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/try_emplace.cc
*************** e4f8f761815549c9655a1afa85c84621  libstd
*** 110535,110540 ****
--- 110759,110765 ----
  2cbb0afd915083a5cabafa50f998d5c8  libstdc++-v3/testsuite/23_containers/unordered_multiset/insert/multiset_range.cc
  25f6641c9b65591cfe0b8858e7b910b5  libstdc++-v3/testsuite/23_containers/unordered_multiset/insert/multiset_single.cc
  c35b057960b073e57577f894c93abd5c  libstdc++-v3/testsuite/23_containers/unordered_multiset/insert/multiset_single_move.cc
+ 81ce776a3ac75fcc704e7f3efc65de81  libstdc++-v3/testsuite/23_containers/unordered_multiset/modifiers/114401.cc
  1031b470e6127a252d2adced81d5dede  libstdc++-v3/testsuite/23_containers/unordered_multiset/modifiers/92878_92947.cc
  1d40b8f180c16337816a13e75181ed5e  libstdc++-v3/testsuite/23_containers/unordered_multiset/modifiers/emplace.cc
  6f1ad8e9a94be3b78fe3ef0ae9684c3d  libstdc++-v3/testsuite/23_containers/unordered_multiset/modifiers/extract.cc
*************** e0ca5e830e5b0abcf4f1b25b0e3cbeb1  libstd
*** 110645,110650 ****
--- 110870,110876 ----
  1a609ba18ef8455b0e135d1b507af9db  libstdc++-v3/testsuite/23_containers/unordered_set/insert/set_single_move.cc
  fc3c05a0cfa119fb13c4bf775be7275b  libstdc++-v3/testsuite/23_containers/unordered_set/instantiation_neg.cc
  6b84d3217cde41a522d1df444f814a43  libstdc++-v3/testsuite/23_containers/unordered_set/max_load_factor/robustness.cc
+ 48b51763d3c882761e49bc54aa3174c2  libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/114401.cc
  f672c3621e6e83f276d79caf6b626a78  libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/92878_92947.cc
  5ac8bb8d2bd7f9f285567564f37af02a  libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/emplace.cc
  53d7181bce16ac21267b0b21427167b3  libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/extract.cc
*************** f7e44bc5605d8dbaecbe9449d6f1ab65  libstd
*** 110784,110789 ****
--- 111010,111016 ----
  539f8a7a20b33d9116aa9937776fc40f  libstdc++-v3/testsuite/23_containers/vector/cons/cons_size.cc
  1ce2272844a9da337ee743c345bec85b  libstdc++-v3/testsuite/23_containers/vector/cons/constexpr.cc
  3bd45daa102290f1176d8405d7221143  libstdc++-v3/testsuite/23_containers/vector/cons/deduction.cc
+ 7a66bf7f5aca27ddc8ca203f2f55a9b6  libstdc++-v3/testsuite/23_containers/vector/cons/destroy-adl.cc
  aba23da2c50408d320fee5821caad013  libstdc++-v3/testsuite/23_containers/vector/cons/destructible_debug_neg.cc
  19f1c44c76dfb817df55800d837fa674  libstdc++-v3/testsuite/23_containers/vector/cons/destructible_neg.cc
  55550ae8dde510aa5f780945c50e0dc9  libstdc++-v3/testsuite/23_containers/vector/cons/moveable.cc
*************** eb2f20a71817b36711028ec1d3cb0cbb  libstd
*** 110846,110854 ****
  bd11fcf10b79647f8bc55f1d9471d13b  libstdc++-v3/testsuite/23_containers/vector/modifiers/assign/1.cc
  3922aaba2a433c66301ae0e55030a827  libstdc++-v3/testsuite/23_containers/vector/modifiers/assign/constexpr.cc
  79f9958e484b07409ba222ba2faa32b4  libstdc++-v3/testsuite/23_containers/vector/modifiers/constexpr.cc
! f0aa5bc2e6c7fda928a4a6e20b362e14  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/52799.cc
  75a5828dd1b791afd1e1e337538dde58  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/92878_92947.cc
- 7ebe0a00c3c6232cfa8e3d1d2c4d17fb  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/const_iterator.cc
  2fd4bdf2964fcd6ec69e53c3ca4904ec  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/cxx17_return.cc
  265d83f0b170d2bdd58bbdf30702028f  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/self_emplace.cc
  0e0e6bf0f542ece2df9f9251623e336d  libstdc++-v3/testsuite/23_containers/vector/modifiers/erase/1.cc
--- 111073,111080 ----
  bd11fcf10b79647f8bc55f1d9471d13b  libstdc++-v3/testsuite/23_containers/vector/modifiers/assign/1.cc
  3922aaba2a433c66301ae0e55030a827  libstdc++-v3/testsuite/23_containers/vector/modifiers/assign/constexpr.cc
  79f9958e484b07409ba222ba2faa32b4  libstdc++-v3/testsuite/23_containers/vector/modifiers/constexpr.cc
! 00bc8fb19959079360f78f326f302b5b  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/1.cc
  75a5828dd1b791afd1e1e337538dde58  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/92878_92947.cc
  2fd4bdf2964fcd6ec69e53c3ca4904ec  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/cxx17_return.cc
  265d83f0b170d2bdd58bbdf30702028f  libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/self_emplace.cc
  0e0e6bf0f542ece2df9f9251623e336d  libstdc++-v3/testsuite/23_containers/vector/modifiers/erase/1.cc
*************** d84b529a40c757abd3524ccd17747a1f  libstd
*** 110931,110939 ****
  055fe071dfe8afc4f0581e1704f688fe  libstdc++-v3/testsuite/24_iterators/front_insert_iterator/requirements/container.cc
  a8e15dd63097f29796c8e6d35e4fb176  libstdc++-v3/testsuite/24_iterators/front_insert_iterator/requirements/explicit_instantiation.cc
  1daa51ed33cd59caf57ef78ccc1e5f89  libstdc++-v3/testsuite/24_iterators/front_insert_iterator/requirements/typedefs.cc
! b35864c07a0d2473c948d6b42631346b  libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++11.cc
! 8f9dccdcc7e1170d21beb50e5c614c11  libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++14.cc
! 03ae70d18cc77b5d803349deef0eee0a  libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++17.cc
  b7f81759f38c65b81a7106df73b052e6  libstdc++-v3/testsuite/24_iterators/headers/iterator/synopsis.cc
  437f58978002d1f6b31ac5fba75c9f23  libstdc++-v3/testsuite/24_iterators/headers/iterator/synopsis_c++11.cc
  f58ea44951638f75d41550335c618cd3  libstdc++-v3/testsuite/24_iterators/headers/iterator/synopsis_c++14.cc
--- 111157,111165 ----
  055fe071dfe8afc4f0581e1704f688fe  libstdc++-v3/testsuite/24_iterators/front_insert_iterator/requirements/container.cc
  a8e15dd63097f29796c8e6d35e4fb176  libstdc++-v3/testsuite/24_iterators/front_insert_iterator/requirements/explicit_instantiation.cc
  1daa51ed33cd59caf57ef78ccc1e5f89  libstdc++-v3/testsuite/24_iterators/front_insert_iterator/requirements/typedefs.cc
! 5a82c44ff6e4705b25d9dc8ba83d7149  libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++11.cc
! 6710ae4aae91807beed3b0ba53c8c4ce  libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++14.cc
! 1be51655130165b686fff09bc94870a4  libstdc++-v3/testsuite/24_iterators/headers/iterator/range_access_c++17.cc
  b7f81759f38c65b81a7106df73b052e6  libstdc++-v3/testsuite/24_iterators/headers/iterator/synopsis.cc
  437f58978002d1f6b31ac5fba75c9f23  libstdc++-v3/testsuite/24_iterators/headers/iterator/synopsis_c++11.cc
  f58ea44951638f75d41550335c618cd3  libstdc++-v3/testsuite/24_iterators/headers/iterator/synopsis_c++14.cc
*************** afbf134e563d12a5fdee23b5ba7b39d3  libstd
*** 110941,110946 ****
--- 111167,111173 ----
  01d084dbad05a1a482e18cecd2d4debd  libstdc++-v3/testsuite/24_iterators/headers/iterator/synopsis_c++20.cc
  1dcb96ff6a51bd7f0490d0c5d9732d4c  libstdc++-v3/testsuite/24_iterators/headers/iterator/types_std.cc
  f254b1c37f106eebc5bc55470ab224a9  libstdc++-v3/testsuite/24_iterators/indirect_callable/92894.cc
+ 6293c732540e05cda90f807f444b0120  libstdc++-v3/testsuite/24_iterators/indirect_callable/projected-adl.cc
  a4e27d523d01f0ad52fccda597bb1d05  libstdc++-v3/testsuite/24_iterators/indirect_callable/projected.cc
  a2e77fb2cdc3c2ea904787cd683ae6a1  libstdc++-v3/testsuite/24_iterators/input/concept.cc
  8bdd4ba8221b12e6ff2107b4d22dea1c  libstdc++-v3/testsuite/24_iterators/input/tag.cc
*************** e2776c4264f0886c90f5b2c3f53468b5  libstd
*** 110954,110960 ****
  b279b61963a1d2e6eec75dbce52bd7b3  libstdc++-v3/testsuite/24_iterators/istream_iterator/1.cc
  c62bf745fc97788888e1f31ef115a26f  libstdc++-v3/testsuite/24_iterators/istream_iterator/2.cc
  eaa85a1f451f792d507caed4f5c6b298  libstdc++-v3/testsuite/24_iterators/istream_iterator/70766.cc
! 9e4c847bd9730f86a57df5ea430391e8  libstdc++-v3/testsuite/24_iterators/istream_iterator/cons/constexpr.cc
  8f4d1f0e10990bba5c4f9cbaeac79d02  libstdc++-v3/testsuite/24_iterators/istream_iterator/cons/sentinel.cc
  bb76c4afa6ebba73115fae68df6ed0e7  libstdc++-v3/testsuite/24_iterators/istream_iterator/requirements/base_classes.cc
  b6791eb89d7b366b6e8afc9da446020c  libstdc++-v3/testsuite/24_iterators/istream_iterator/requirements/explicit_instantiation.cc
--- 111181,111187 ----
  b279b61963a1d2e6eec75dbce52bd7b3  libstdc++-v3/testsuite/24_iterators/istream_iterator/1.cc
  c62bf745fc97788888e1f31ef115a26f  libstdc++-v3/testsuite/24_iterators/istream_iterator/2.cc
  eaa85a1f451f792d507caed4f5c6b298  libstdc++-v3/testsuite/24_iterators/istream_iterator/70766.cc
! 6faca5bf9636ccd27cfd5addc5de4960  libstdc++-v3/testsuite/24_iterators/istream_iterator/cons/constexpr.cc
  8f4d1f0e10990bba5c4f9cbaeac79d02  libstdc++-v3/testsuite/24_iterators/istream_iterator/cons/sentinel.cc
  bb76c4afa6ebba73115fae68df6ed0e7  libstdc++-v3/testsuite/24_iterators/istream_iterator/requirements/base_classes.cc
  b6791eb89d7b366b6e8afc9da446020c  libstdc++-v3/testsuite/24_iterators/istream_iterator/requirements/explicit_instantiation.cc
*************** e2367337bb98389a3471640f1b6e863d  libstd
*** 111089,111094 ****
--- 111316,111322 ----
  62f31809d63048366621060ff715781f  libstdc++-v3/testsuite/25_algorithms/clamp/requirements/explicit_instantiation/pod.cc
  b3550a8684d4888ff5c2e243087f628d  libstdc++-v3/testsuite/25_algorithms/constexpr_macro.cc
  177cabfe6b30523bd1d1463d013f00b1  libstdc++-v3/testsuite/25_algorithms/copy/1.cc
+ ab3dc855e72ee51df3a966a7fda86fc5  libstdc++-v3/testsuite/25_algorithms/copy/108846.cc
  01e966f44ac05073030b3ec0f2b362fa  libstdc++-v3/testsuite/25_algorithms/copy/2.cc
  8bf89af26b056de869043ec9426b2d40  libstdc++-v3/testsuite/25_algorithms/copy/3.cc
  841b22dcfcbdba02c358cf74d8bbb302  libstdc++-v3/testsuite/25_algorithms/copy/34595.cc
*************** d7ee23f823ccdda9564597c9865cb166  libstd
*** 111125,111130 ****
--- 111353,111359 ----
  aa156cf9079c8e62d301d2af1dbf197b  libstdc++-v3/testsuite/25_algorithms/copy/streambuf_iterators/wchar_t/2.cc
  c70aabf1b3087a6a7ed829d3143674d9  libstdc++-v3/testsuite/25_algorithms/copy/streambuf_iterators/wchar_t/3.cc
  8b592f8727d345917b4612cd259d628b  libstdc++-v3/testsuite/25_algorithms/copy/streambuf_iterators/wchar_t/4.cc
+ bb0e824b90574124bc4bf32ff7dc510b  libstdc++-v3/testsuite/25_algorithms/copy_backward/108846.cc
  cee1930285898de61a4be2751f2aeb4f  libstdc++-v3/testsuite/25_algorithms/copy_backward/94013.cc
  1ab4159ef3b8b8cb55039235bdaa1e78  libstdc++-v3/testsuite/25_algorithms/copy_backward/95578.cc
  e03dbfa91278f6ec6f1557e001b7b025  libstdc++-v3/testsuite/25_algorithms/copy_backward/constexpr.cc
*************** e5bed8e20df3fad20f903e7537508e3a  libstd
*** 111145,111150 ****
--- 111374,111380 ----
  3349ddaea4c2f3defa34e3ee7e617bbd  libstdc++-v3/testsuite/25_algorithms/copy_if/requirements/explicit_instantiation/2.cc
  95589e4d187aff3fd4e2dbc6bf632a2b  libstdc++-v3/testsuite/25_algorithms/copy_if/requirements/explicit_instantiation/pod.cc
  a3e7222df69ad45f94c26a42c43f2335  libstdc++-v3/testsuite/25_algorithms/copy_n/1.cc
+ 1e20df47bf8b9c2d7325fca62a0f583e  libstdc++-v3/testsuite/25_algorithms/copy_n/108846.cc
  60133f910aec11850b64fdbb10c453bd  libstdc++-v3/testsuite/25_algorithms/copy_n/2.cc
  0911dc705b29d38aea911a8c45926855  libstdc++-v3/testsuite/25_algorithms/copy_n/3.cc
  bca0b6a846c7a12d3a8a06eb7cee0a11  libstdc++-v3/testsuite/25_algorithms/copy_n/4.cc
*************** e9930b44233507ccddf2b50440579c55  libstd
*** 111371,111376 ****
--- 111601,111607 ----
  0340568de491299dc209b19d24097878  libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/requirements/explicit_instantiation/pod.cc
  b84123300f318db795b4127821d5ceef  libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/uchar.cc
  2bfaa67426aa29acae3e6aef04e0478e  libstdc++-v3/testsuite/25_algorithms/lexicographical_compare_three_way/1.cc
+ fda158d264fd98a45243c1135a92fa52  libstdc++-v3/testsuite/25_algorithms/lexicographical_compare_three_way/113960.cc
  b581325610de818749534c0d46aa3ce1  libstdc++-v3/testsuite/25_algorithms/lexicographical_compare_three_way/constexpr.cc
  d8ab00fb36581eefbd51c9ce173c1dc2  libstdc++-v3/testsuite/25_algorithms/lower_bound/1.cc
  3a4f9b5436955304a5ea1cf3d186618f  libstdc++-v3/testsuite/25_algorithms/lower_bound/2.cc
*************** e3353433ba9e10f9f12ef9f1a56a2233  libstd
*** 111458,111463 ****
--- 111689,111695 ----
  905fa5a20f2f6d4cd5968d4412484769  libstdc++-v3/testsuite/25_algorithms/mismatch/constexpr.cc
  559baff14ba095ad0c40317946ecdef6  libstdc++-v3/testsuite/25_algorithms/mismatch/constrained.cc
  3947a31b1187dd211ddfcfb8ec9afa9f  libstdc++-v3/testsuite/25_algorithms/move/1.cc
+ 4ae907818586f505a2d4d108b85aff1d  libstdc++-v3/testsuite/25_algorithms/move/108846.cc
  216d61467a92f257d9bb6c8b6e483530  libstdc++-v3/testsuite/25_algorithms/move/69478.cc
  77435b71473117ed98d79dc854e89466  libstdc++-v3/testsuite/25_algorithms/move/93872.cc
  c29e4b7047b8296e74cbaf898bc2b7f5  libstdc++-v3/testsuite/25_algorithms/move/94013.cc
*************** c41fedc68e3cee79d652221a1c6b2c9a  libstd
*** 111469,111474 ****
--- 111701,111707 ----
  a96504c7196ca10e6855d5546f616be9  libstdc++-v3/testsuite/25_algorithms/move/requirements/explicit_instantiation/2.cc
  cb5598cc3525c0016ef88275fcfebd94  libstdc++-v3/testsuite/25_algorithms/move/requirements/explicit_instantiation/pod.cc
  f087fba1f5a0577853286db5171184a0  libstdc++-v3/testsuite/25_algorithms/move_backward/1.cc
+ ad56a2e5738139bc09cd67e855d44a07  libstdc++-v3/testsuite/25_algorithms/move_backward/108846.cc
  bd16770e040d8a0701e9fc2eca39c128  libstdc++-v3/testsuite/25_algorithms/move_backward/69478.cc
  d3b5eda6d7350468190f595c7c53c70c  libstdc++-v3/testsuite/25_algorithms/move_backward/93872.cc
  278933c4e7ec97cbf8e0c09b50ced266  libstdc++-v3/testsuite/25_algorithms/move_backward/94013.cc
*************** be60fe758d82386ccaa966aafc76bb06  libstd
*** 111607,111615 ****
  16ce09da94a728b6a6598b781fc5aa07  libstdc++-v3/testsuite/25_algorithms/push_heap/constexpr.cc
  6c5db64e22a6d556f551d03092eafaa8  libstdc++-v3/testsuite/25_algorithms/push_heap/requirements/explicit_instantiation/2.cc
  7b69dcdc35a76d124f79a50e8d897f18  libstdc++-v3/testsuite/25_algorithms/push_heap/requirements/explicit_instantiation/pod.cc
! e17f187a7d22403b9e51acc5d6560948  libstdc++-v3/testsuite/25_algorithms/random_shuffle/1.cc
! 95389f17583382590872e839f615c669  libstdc++-v3/testsuite/25_algorithms/random_shuffle/59603.cc
! 68eb66dda45ef787caf505cc37897414  libstdc++-v3/testsuite/25_algorithms/random_shuffle/moveable.cc
  457bbbfb3a832042d307ad45f3813698  libstdc++-v3/testsuite/25_algorithms/random_shuffle/requirements/explicit_instantiation/2.cc
  e15292ccec7214c4903cf1450cb593ab  libstdc++-v3/testsuite/25_algorithms/random_shuffle/requirements/explicit_instantiation/pod.cc
  ae8319d0e7b82102015821d7b3ab7bb9  libstdc++-v3/testsuite/25_algorithms/remove/1.cc
--- 111840,111849 ----
  16ce09da94a728b6a6598b781fc5aa07  libstdc++-v3/testsuite/25_algorithms/push_heap/constexpr.cc
  6c5db64e22a6d556f551d03092eafaa8  libstdc++-v3/testsuite/25_algorithms/push_heap/requirements/explicit_instantiation/2.cc
  7b69dcdc35a76d124f79a50e8d897f18  libstdc++-v3/testsuite/25_algorithms/push_heap/requirements/explicit_instantiation/pod.cc
! 1c8ed22d43220712eaafa915536b6d5d  libstdc++-v3/testsuite/25_algorithms/random_shuffle/1.cc
! afd980d9ab06c5f889f437ba484ef395  libstdc++-v3/testsuite/25_algorithms/random_shuffle/59603.cc
! a5565155158ab1cf9a8d82958acd5a06  libstdc++-v3/testsuite/25_algorithms/random_shuffle/deprecated.cc
! 70c6a38742cfe636d60532908319b138  libstdc++-v3/testsuite/25_algorithms/random_shuffle/moveable.cc
  457bbbfb3a832042d307ad45f3813698  libstdc++-v3/testsuite/25_algorithms/random_shuffle/requirements/explicit_instantiation/2.cc
  e15292ccec7214c4903cf1450cb593ab  libstdc++-v3/testsuite/25_algorithms/random_shuffle/requirements/explicit_instantiation/pod.cc
  ae8319d0e7b82102015821d7b3ab7bb9  libstdc++-v3/testsuite/25_algorithms/remove/1.cc
*************** a0c745f1c47af2a2ec7553fcf4bda762  libstd
*** 111898,111903 ****
--- 112132,112138 ----
  8e56e75f786ab9ab2b33aa9fcf9ca243  libstdc++-v3/testsuite/26_numerics/headers/ccomplex/std_c++0x_neg.cc
  87bce82be6d927c520d1e63ad8201d35  libstdc++-v3/testsuite/26_numerics/headers/cfenv/std_c++0x_neg.cc
  0b98f8f9c557d52570ae7d3bd942e73d  libstdc++-v3/testsuite/26_numerics/headers/cfenv/types_std_c++0x.cc
+ 2c248a4dde912eb37b2f452da846b228  libstdc++-v3/testsuite/26_numerics/headers/cmath/109758.cc
  f53a33be373104096efc8d1ca2ecb454  libstdc++-v3/testsuite/26_numerics/headers/cmath/14608.cc
  71eabdcab36bca2d627d3d4c095a9332  libstdc++-v3/testsuite/26_numerics/headers/cmath/19322.cc
  7285381b30b10361b3c8acaf5850d5c0  libstdc++-v3/testsuite/26_numerics/headers/cmath/25913.cc
*************** bc07796e3dc71ee908b6cf1de3fb0243  libstd
*** 111990,111996 ****
  862f4f439e8707b32a42b5fe736946a5  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/adjacent_difference.cc
  0553df89726830b7195d3dc76149d7b4  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/reduce.cc
  e7d03e915035104e8c34f0e1a253cea1  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/scan.cc
! 371296694e234040b308e95ba965691b  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/transform_reduce.cc
  37a9d3638006b842a59994327880b85f  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/transform_scan.cc
  2203e7f8542c0f2cb67b91452f9cf175  libstdc++-v3/testsuite/26_numerics/random/bernoulli_distribution/cons/default.cc
  3e10f6694b66f03433216378f82c9671  libstdc++-v3/testsuite/26_numerics/random/bernoulli_distribution/cons/parms.cc
--- 112225,112231 ----
  862f4f439e8707b32a42b5fe736946a5  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/adjacent_difference.cc
  0553df89726830b7195d3dc76149d7b4  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/reduce.cc
  e7d03e915035104e8c34f0e1a253cea1  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/scan.cc
! ee23c3ef0c6798a40b17c2720f1599c9  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/transform_reduce.cc
  37a9d3638006b842a59994327880b85f  libstdc++-v3/testsuite/26_numerics/pstl/numeric_ops/transform_scan.cc
  2203e7f8542c0f2cb67b91452f9cf175  libstdc++-v3/testsuite/26_numerics/random/bernoulli_distribution/cons/default.cc
  3e10f6694b66f03433216378f82c9671  libstdc++-v3/testsuite/26_numerics/random/bernoulli_distribution/cons/parms.cc
*************** e1bf80a338778b1fd8021c6b11da10ae  libstd
*** 111999,112004 ****
--- 112234,112240 ----
  b9ff898ef20784b6377f49a4d59b41a6  libstdc++-v3/testsuite/26_numerics/random/bernoulli_distribution/operators/serialize.cc
  4b853a99f87112f77eafffaa3bfb20c3  libstdc++-v3/testsuite/26_numerics/random/bernoulli_distribution/operators/values.cc
  16b9633198c3d86aa670e0dd71c6cd44  libstdc++-v3/testsuite/26_numerics/random/bernoulli_distribution/requirements/typedefs.cc
+ 334c22069a56db08670dd630ad02a516  libstdc++-v3/testsuite/26_numerics/random/binomial_distribution/114359.cc
  52875fd9eae59363d5913f23adb00abb  libstdc++-v3/testsuite/26_numerics/random/binomial_distribution/cons/default.cc
  3a3b0f3a56ffb11148ee1135661a15a8  libstdc++-v3/testsuite/26_numerics/random/binomial_distribution/cons/parms.cc
  7093745def550fdfc5322966ccef382f  libstdc++-v3/testsuite/26_numerics/random/binomial_distribution/operators/equal.cc
*************** fd35a30659d18b4dfc6f69461d687867  libstd
*** 112191,112197 ****
  336b167edee7c2c97cd1ba0faa509389  libstdc++-v3/testsuite/26_numerics/random/poisson_distribution/operators/values.cc
  b13057ea5e25d9bd21fadbf9a7a5901b  libstdc++-v3/testsuite/26_numerics/random/poisson_distribution/requirements/explicit_instantiation/1.cc
  7f99ecaaf3374e5d961f96f2e1a4076c  libstdc++-v3/testsuite/26_numerics/random/poisson_distribution/requirements/typedefs.cc
! 42c2c0225a7158e51f7eac21fd146318  libstdc++-v3/testsuite/26_numerics/random/pr60037-neg.cc
  fb8dc2f561a0616b43c81b8d8ce74c49  libstdc++-v3/testsuite/26_numerics/random/random_device/85494.cc
  6acc7376afeb4884a1c2f760051d9637  libstdc++-v3/testsuite/26_numerics/random/random_device/94087.cc
  13e7dadb883535e7c011e380914e549e  libstdc++-v3/testsuite/26_numerics/random/random_device/cons/default-cow.cc
--- 112427,112433 ----
  336b167edee7c2c97cd1ba0faa509389  libstdc++-v3/testsuite/26_numerics/random/poisson_distribution/operators/values.cc
  b13057ea5e25d9bd21fadbf9a7a5901b  libstdc++-v3/testsuite/26_numerics/random/poisson_distribution/requirements/explicit_instantiation/1.cc
  7f99ecaaf3374e5d961f96f2e1a4076c  libstdc++-v3/testsuite/26_numerics/random/poisson_distribution/requirements/typedefs.cc
! 1f4374d6f9450751db682750efdc3094  libstdc++-v3/testsuite/26_numerics/random/pr60037-neg.cc
  fb8dc2f561a0616b43c81b8d8ce74c49  libstdc++-v3/testsuite/26_numerics/random/random_device/85494.cc
  6acc7376afeb4884a1c2f760051d9637  libstdc++-v3/testsuite/26_numerics/random/random_device/94087.cc
  13e7dadb883535e7c011e380914e549e  libstdc++-v3/testsuite/26_numerics/random/random_device/cons/default-cow.cc
*************** ce14cd4e63e320814d2f98c9b2e3d47b  libstd
*** 112235,112241 ****
  cae9f40b3c36adf09ab9b7da36be9188  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/55215.cc
  2ea596dd6e6b2bb562905a341572f854  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/copy.cc
  bfdc5dc97c05960cacae7929b0d95463  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/default.cc
! f6735a89cd53d5b140b5c2d979ef11c5  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/lwg3809.cc
  22ce99a43c709f3b69bedea51fb0e19c  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/seed1.cc
  8035cb25ca6db4ae2b1a24b338e42709  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/seed2.cc
  50d353e4a40f0d30d9c999f73f6c8992  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/seed_seq.cc
--- 112471,112477 ----
  cae9f40b3c36adf09ab9b7da36be9188  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/55215.cc
  2ea596dd6e6b2bb562905a341572f854  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/copy.cc
  bfdc5dc97c05960cacae7929b0d95463  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/default.cc
! 7fdf0ab9b87bcd0e74ad97ad9667a1e1  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/lwg3809.cc
  22ce99a43c709f3b69bedea51fb0e19c  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/seed1.cc
  8035cb25ca6db4ae2b1a24b338e42709  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/seed2.cc
  50d353e4a40f0d30d9c999f73f6c8992  libstdc++-v3/testsuite/26_numerics/random/subtract_with_carry_engine/cons/seed_seq.cc
*************** b1eca1c88d29bc234531e91815621e81  libstd
*** 112786,112793 ****
  142f2542f5179f648b85f4b47db6520f  libstdc++-v3/testsuite/27_io/basic_istringstream/str/char/2.cc
  83956b575c39066e9446320bb6790eb2  libstdc++-v3/testsuite/27_io/basic_istringstream/str/wchar_t/1.cc
  b298dfe137b0c993ff1fb78641f6af32  libstdc++-v3/testsuite/27_io/basic_istringstream/str/wchar_t/2.cc
! 57e5db4dec7d8c57a49b4062805acb76  libstdc++-v3/testsuite/27_io/basic_istringstream/view/char/1.cc
! 13b0232bc5d0b7f1734b813e3c560fb6  libstdc++-v3/testsuite/27_io/basic_istringstream/view/wchar_t/1.cc
  8d47f37af787a3cbb3d3aef4eed85a63  libstdc++-v3/testsuite/27_io/basic_ofstream/assign/1.cc
  6fbb41c2eb58a7c50f53cd5f0ee65f06  libstdc++-v3/testsuite/27_io/basic_ofstream/cons/2020.cc
  8956e5c5203ecf2c1c4a717bdb2f559e  libstdc++-v3/testsuite/27_io/basic_ofstream/cons/char/1.cc
--- 113022,113029 ----
  142f2542f5179f648b85f4b47db6520f  libstdc++-v3/testsuite/27_io/basic_istringstream/str/char/2.cc
  83956b575c39066e9446320bb6790eb2  libstdc++-v3/testsuite/27_io/basic_istringstream/str/wchar_t/1.cc
  b298dfe137b0c993ff1fb78641f6af32  libstdc++-v3/testsuite/27_io/basic_istringstream/str/wchar_t/2.cc
! 57a688e5b674ee49d202703cf49dad30  libstdc++-v3/testsuite/27_io/basic_istringstream/view/char/1.cc
! aa530049fc2ee3bc2c69f7ba7416b86d  libstdc++-v3/testsuite/27_io/basic_istringstream/view/wchar_t/1.cc
  8d47f37af787a3cbb3d3aef4eed85a63  libstdc++-v3/testsuite/27_io/basic_ofstream/assign/1.cc
  6fbb41c2eb58a7c50f53cd5f0ee65f06  libstdc++-v3/testsuite/27_io/basic_ofstream/cons/2020.cc
  8956e5c5203ecf2c1c4a717bdb2f559e  libstdc++-v3/testsuite/27_io/basic_ofstream/cons/char/1.cc
*************** a270d7f7e7321001d328fd4753b77e28  libstd
*** 112962,112969 ****
  6ef2dcb6b7eaeb25bb778f0305135a83  libstdc++-v3/testsuite/27_io/basic_ostringstream/str/wchar_t/1.cc
  635cb7874c5ac3b558287ffaf302bf24  libstdc++-v3/testsuite/27_io/basic_ostringstream/str/wchar_t/2.cc
  03a7326c7d06aa3ab0c5f1f46c2798b2  libstdc++-v3/testsuite/27_io/basic_ostringstream/str/wchar_t/3.cc
! d02dc6dabff50fd9ee2aaa7cb87ac0c5  libstdc++-v3/testsuite/27_io/basic_ostringstream/view/char/1.cc
! 4861ce818104fe71ce507a1c0c565d60  libstdc++-v3/testsuite/27_io/basic_ostringstream/view/wchar_t/1.cc
  6738b09da613713bc72fd5d0c9890f0e  libstdc++-v3/testsuite/27_io/basic_streambuf/cons/2020.cc
  dd99582200109b124dccf94e56382ff0  libstdc++-v3/testsuite/27_io/basic_streambuf/cons/57394.cc
  2599b8946833c7fddbae6cfba0e351f9  libstdc++-v3/testsuite/27_io/basic_streambuf/cons/char/1.cc
--- 113198,113205 ----
  6ef2dcb6b7eaeb25bb778f0305135a83  libstdc++-v3/testsuite/27_io/basic_ostringstream/str/wchar_t/1.cc
  635cb7874c5ac3b558287ffaf302bf24  libstdc++-v3/testsuite/27_io/basic_ostringstream/str/wchar_t/2.cc
  03a7326c7d06aa3ab0c5f1f46c2798b2  libstdc++-v3/testsuite/27_io/basic_ostringstream/str/wchar_t/3.cc
! 4d504579f48fe4971f56c133db86a882  libstdc++-v3/testsuite/27_io/basic_ostringstream/view/char/1.cc
! 0df84a0b0a2b4dc91180c4fcb90d0479  libstdc++-v3/testsuite/27_io/basic_ostringstream/view/wchar_t/1.cc
  6738b09da613713bc72fd5d0c9890f0e  libstdc++-v3/testsuite/27_io/basic_streambuf/cons/2020.cc
  dd99582200109b124dccf94e56382ff0  libstdc++-v3/testsuite/27_io/basic_streambuf/cons/57394.cc
  2599b8946833c7fddbae6cfba0e351f9  libstdc++-v3/testsuite/27_io/basic_streambuf/cons/char/1.cc
*************** cc19e34c508508e7871dc192b34febf7  libstd
*** 113099,113106 ****
  4500f68678e664b104850c50d49cd34e  libstdc++-v3/testsuite/27_io/basic_stringbuf/sungetc/wchar_t/1.cc
  af584112212b193b47b4fd698367cd50  libstdc++-v3/testsuite/27_io/basic_stringbuf/sync/char/1057.cc
  20b710eecc5d61ed3bf89b94e3c8bd57  libstdc++-v3/testsuite/27_io/basic_stringbuf/sync/wchar_t/1057.cc
! 14963b53d87b7f8320eb832bf172a50c  libstdc++-v3/testsuite/27_io/basic_stringbuf/view/char/1.cc
! 706390e349b308d626d70291389209e9  libstdc++-v3/testsuite/27_io/basic_stringbuf/view/wchar_t/1.cc
  38ec6d891d6d4a47865a059e215ea0c8  libstdc++-v3/testsuite/27_io/basic_stringstream/assign/1.cc
  5e8a8a93e5870b17031c24e2b4b199dd  libstdc++-v3/testsuite/27_io/basic_stringstream/assign/81338.cc
  09501862893de29ea85b24bc560b9387  libstdc++-v3/testsuite/27_io/basic_stringstream/cons/2020.cc
--- 113335,113342 ----
  4500f68678e664b104850c50d49cd34e  libstdc++-v3/testsuite/27_io/basic_stringbuf/sungetc/wchar_t/1.cc
  af584112212b193b47b4fd698367cd50  libstdc++-v3/testsuite/27_io/basic_stringbuf/sync/char/1057.cc
  20b710eecc5d61ed3bf89b94e3c8bd57  libstdc++-v3/testsuite/27_io/basic_stringbuf/sync/wchar_t/1057.cc
! 6a14c4de00f2fb2c50f3485166dd5068  libstdc++-v3/testsuite/27_io/basic_stringbuf/view/char/1.cc
! 7d64e1696fb193732ca0118ef00c14f5  libstdc++-v3/testsuite/27_io/basic_stringbuf/view/wchar_t/1.cc
  38ec6d891d6d4a47865a059e215ea0c8  libstdc++-v3/testsuite/27_io/basic_stringstream/assign/1.cc
  5e8a8a93e5870b17031c24e2b4b199dd  libstdc++-v3/testsuite/27_io/basic_stringstream/assign/81338.cc
  09501862893de29ea85b24bc560b9387  libstdc++-v3/testsuite/27_io/basic_stringstream/cons/2020.cc
*************** e8295924f4e5264f13e49f81c52134cf  libstd
*** 113124,113131 ****
  d17c6253f2cedad22f109ac6f77e58fa  libstdc++-v3/testsuite/27_io/basic_stringstream/str/wchar_t/3.cc
  a8e0730088f40f414534c63fc8079003  libstdc++-v3/testsuite/27_io/basic_stringstream/str/wchar_t/4.cc
  b17ebd49a2351a5a06628f8c9d824a9c  libstdc++-v3/testsuite/27_io/basic_stringstream/str/wchar_t/5.cc.cc
! 88f4a448d7064c699e657f8b44faabd9  libstdc++-v3/testsuite/27_io/basic_stringstream/view/char/1.cc
! 1fac8ab5d0edb82b6e006b5e7204e2f4  libstdc++-v3/testsuite/27_io/basic_stringstream/view/wchar_t/1.cc
  fe0d2af1606d21205f2da67070530e99  libstdc++-v3/testsuite/27_io/basic_syncbuf/1.cc
  b380f141304ed16cac8d4d08c4342708  libstdc++-v3/testsuite/27_io/basic_syncbuf/2.cc
  2f08d8d0fca981a79bbabf0cb7a1ece9  libstdc++-v3/testsuite/27_io/basic_syncbuf/basic_ops/1.cc
--- 113360,113367 ----
  d17c6253f2cedad22f109ac6f77e58fa  libstdc++-v3/testsuite/27_io/basic_stringstream/str/wchar_t/3.cc
  a8e0730088f40f414534c63fc8079003  libstdc++-v3/testsuite/27_io/basic_stringstream/str/wchar_t/4.cc
  b17ebd49a2351a5a06628f8c9d824a9c  libstdc++-v3/testsuite/27_io/basic_stringstream/str/wchar_t/5.cc.cc
! c0a4c7f1aff31f6f632a37b8ff8b4fa8  libstdc++-v3/testsuite/27_io/basic_stringstream/view/char/1.cc
! 508441b4d94ab60a19ad81ce101aefc4  libstdc++-v3/testsuite/27_io/basic_stringstream/view/wchar_t/1.cc
  fe0d2af1606d21205f2da67070530e99  libstdc++-v3/testsuite/27_io/basic_syncbuf/1.cc
  b380f141304ed16cac8d4d08c4342708  libstdc++-v3/testsuite/27_io/basic_syncbuf/2.cc
  2f08d8d0fca981a79bbabf0cb7a1ece9  libstdc++-v3/testsuite/27_io/basic_syncbuf/basic_ops/1.cc
*************** a4a432360a8ed2c0d9f582958d93cc62  libstd
*** 113155,113165 ****
  35978ee44efd20a2373d13bfab890b9e  libstdc++-v3/testsuite/27_io/filesystem/operations/canonical.cc
  96e7a09ba65d743166089cae46676bd2  libstdc++-v3/testsuite/27_io/filesystem/operations/copy.cc
  baf6585ecd9476c87e4659aa815018ec  libstdc++-v3/testsuite/27_io/filesystem/operations/copy_file.cc
  8316659f617960cafa349695f2ac163e  libstdc++-v3/testsuite/27_io/filesystem/operations/create_directories.cc
  1d1b529d3483bdbe217244e7f1cb0c1a  libstdc++-v3/testsuite/27_io/filesystem/operations/create_directory.cc
  6742f3d96acb605f9150065bc1b9ed9d  libstdc++-v3/testsuite/27_io/filesystem/operations/create_symlink.cc
  1a326be911f45be0260f9204216aa4d0  libstdc++-v3/testsuite/27_io/filesystem/operations/current_path.cc
! ef6741c85f460eca4314d164cc9ae618  libstdc++-v3/testsuite/27_io/filesystem/operations/equivalent.cc
  40721b7e2bdc65d92b93ed61873cb807  libstdc++-v3/testsuite/27_io/filesystem/operations/exists.cc
  841032b8606254bba1237d18bd980abc  libstdc++-v3/testsuite/27_io/filesystem/operations/file_size.cc
  db20c8025ec30fad37cfa2d5b80f4551  libstdc++-v3/testsuite/27_io/filesystem/operations/is_empty.cc
--- 113391,113402 ----
  35978ee44efd20a2373d13bfab890b9e  libstdc++-v3/testsuite/27_io/filesystem/operations/canonical.cc
  96e7a09ba65d743166089cae46676bd2  libstdc++-v3/testsuite/27_io/filesystem/operations/copy.cc
  baf6585ecd9476c87e4659aa815018ec  libstdc++-v3/testsuite/27_io/filesystem/operations/copy_file.cc
+ 10b6e95add9984bd29138cd25bc3a19f  libstdc++-v3/testsuite/27_io/filesystem/operations/copy_file_108178.cc
  8316659f617960cafa349695f2ac163e  libstdc++-v3/testsuite/27_io/filesystem/operations/create_directories.cc
  1d1b529d3483bdbe217244e7f1cb0c1a  libstdc++-v3/testsuite/27_io/filesystem/operations/create_directory.cc
  6742f3d96acb605f9150065bc1b9ed9d  libstdc++-v3/testsuite/27_io/filesystem/operations/create_symlink.cc
  1a326be911f45be0260f9204216aa4d0  libstdc++-v3/testsuite/27_io/filesystem/operations/current_path.cc
! af5ab2107093ab86366dc780a5ccf849  libstdc++-v3/testsuite/27_io/filesystem/operations/equivalent.cc
  40721b7e2bdc65d92b93ed61873cb807  libstdc++-v3/testsuite/27_io/filesystem/operations/exists.cc
  841032b8606254bba1237d18bd980abc  libstdc++-v3/testsuite/27_io/filesystem/operations/file_size.cc
  db20c8025ec30fad37cfa2d5b80f4551  libstdc++-v3/testsuite/27_io/filesystem/operations/is_empty.cc
*************** e24d44f581a05c8e683843dc9fc1a8f3  libstd
*** 113177,113183 ****
  5c1d700abf212e29f14784e2e523aa2d  libstdc++-v3/testsuite/27_io/filesystem/operations/symlink_status.cc
  0062e5d140893182b615e814cf1ae46f  libstdc++-v3/testsuite/27_io/filesystem/operations/temp_directory_path.cc
  38dee53dd844f69a702bd8d79b5d671b  libstdc++-v3/testsuite/27_io/filesystem/operations/weakly_canonical.cc
! 9897c7912c7b47987d118515b02ab561  libstdc++-v3/testsuite/27_io/filesystem/path/108636.cc
  bba1248fe386d1a1a21631e774815c65  libstdc++-v3/testsuite/27_io/filesystem/path/append/path.cc
  28c0d37c0e2f90cf6a142915f8ff0700  libstdc++-v3/testsuite/27_io/filesystem/path/append/source.cc
  349a648747f4bf9c0d342ff7c45920fb  libstdc++-v3/testsuite/27_io/filesystem/path/assign/assign.cc
--- 113414,113420 ----
  5c1d700abf212e29f14784e2e523aa2d  libstdc++-v3/testsuite/27_io/filesystem/operations/symlink_status.cc
  0062e5d140893182b615e814cf1ae46f  libstdc++-v3/testsuite/27_io/filesystem/operations/temp_directory_path.cc
  38dee53dd844f69a702bd8d79b5d671b  libstdc++-v3/testsuite/27_io/filesystem/operations/weakly_canonical.cc
! b2970ce50b620a0f99e06931534c3d14  libstdc++-v3/testsuite/27_io/filesystem/path/108636.cc
  bba1248fe386d1a1a21631e774815c65  libstdc++-v3/testsuite/27_io/filesystem/path/append/path.cc
  28c0d37c0e2f90cf6a142915f8ff0700  libstdc++-v3/testsuite/27_io/filesystem/path/append/source.cc
  349a648747f4bf9c0d342ff7c45920fb  libstdc++-v3/testsuite/27_io/filesystem/path/assign/assign.cc
*************** a22e69eb2c027825b8fb3e0e6df6a97d  libstd
*** 113195,113201 ****
  62be85132974055d79ef2c66b9d5c87e  libstdc++-v3/testsuite/27_io/filesystem/path/construct/80762.cc
  7ce3d0b79e41297664f123c1bf32d35a  libstdc++-v3/testsuite/27_io/filesystem/path/construct/90281.cc
  c64922a75e4fc4cacdce9eac39563b6c  libstdc++-v3/testsuite/27_io/filesystem/path/construct/90634.cc
! 16f2c14a3bea9b80ab6807caa15c110d  libstdc++-v3/testsuite/27_io/filesystem/path/construct/95048.cc
  3942fb1d3a926fec720c459d973c2f19  libstdc++-v3/testsuite/27_io/filesystem/path/construct/copy.cc
  a6934c3c16b2e54ddf466f543bb7f5a0  libstdc++-v3/testsuite/27_io/filesystem/path/construct/default.cc
  38f0f98a3816f51d44b4c3a09093a1b1  libstdc++-v3/testsuite/27_io/filesystem/path/construct/format.cc
--- 113432,113438 ----
  62be85132974055d79ef2c66b9d5c87e  libstdc++-v3/testsuite/27_io/filesystem/path/construct/80762.cc
  7ce3d0b79e41297664f123c1bf32d35a  libstdc++-v3/testsuite/27_io/filesystem/path/construct/90281.cc
  c64922a75e4fc4cacdce9eac39563b6c  libstdc++-v3/testsuite/27_io/filesystem/path/construct/90634.cc
! 7e3f9d185f69161e92a1fe6e162069f3  libstdc++-v3/testsuite/27_io/filesystem/path/construct/95048.cc
  3942fb1d3a926fec720c459d973c2f19  libstdc++-v3/testsuite/27_io/filesystem/path/construct/copy.cc
  a6934c3c16b2e54ddf466f543bb7f5a0  libstdc++-v3/testsuite/27_io/filesystem/path/construct/default.cc
  38f0f98a3816f51d44b4c3a09093a1b1  libstdc++-v3/testsuite/27_io/filesystem/path/construct/format.cc
*************** ff06448329baa1c06328dea778ee6217  libstd
*** 113330,113336 ****
  694e1a2dbd81fad828cb2f84907cb96f  libstdc++-v3/testsuite/27_io/manipulators/extended/get_money/wchar_t/1.cc
  4369b14d89f3ae467a4fc0adb5817a7c  libstdc++-v3/testsuite/27_io/manipulators/extended/get_money/wchar_t/51288.cc
  57ea7a6e5d482b5441bd701a55e71bec  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/char/1.cc
! 671f2124125a7d0169da9a4da18a5e8b  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/char/2.cc
  fce483af0606714dcd2de7e74092938d  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/wchar_t/1.cc
  5ba95c9f75413e8ceb39c874e7281512  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/wchar_t/2.cc
  cfe1b2401e3821ead0ca57e2cd6b2ef6  libstdc++-v3/testsuite/27_io/manipulators/extended/put_money/char/1.cc
--- 113567,113573 ----
  694e1a2dbd81fad828cb2f84907cb96f  libstdc++-v3/testsuite/27_io/manipulators/extended/get_money/wchar_t/1.cc
  4369b14d89f3ae467a4fc0adb5817a7c  libstdc++-v3/testsuite/27_io/manipulators/extended/get_money/wchar_t/51288.cc
  57ea7a6e5d482b5441bd701a55e71bec  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/char/1.cc
! a4c77e3315281d9ee1fd1edc768b4246  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/char/2.cc
  fce483af0606714dcd2de7e74092938d  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/wchar_t/1.cc
  5ba95c9f75413e8ceb39c874e7281512  libstdc++-v3/testsuite/27_io/manipulators/extended/get_time/wchar_t/2.cc
  cfe1b2401e3821ead0ca57e2cd6b2ef6  libstdc++-v3/testsuite/27_io/manipulators/extended/put_money/char/1.cc
*************** ebfba19d8a3fd6d3e27bb7b0a3577134  libstd
*** 113447,113452 ****
--- 113684,113690 ----
  b06a0534dbed66ce7509c33dedb7fe0d  libstdc++-v3/testsuite/27_io/types/2.cc
  98c43797dbb511da269fe5daf06f3c8d  libstdc++-v3/testsuite/27_io/types/3.cc
  47c7f43bb6153743c7431f0c1c162142  libstdc++-v3/testsuite/27_io/types/4.cc
+ 2311cea628cce5b052734c24d5a5cae9  libstdc++-v3/testsuite/28_regex/algorithms/regex_match/107376.cc
  ac17a08648e0976b0c7d6fdedfa3b873  libstdc++-v3/testsuite/28_regex/algorithms/regex_match/awk/cstring_01.cc
  b4de49ecda034d158711adf6d15c8c16  libstdc++-v3/testsuite/28_regex/algorithms/regex_match/basic/empty_range.cc
  80c695ed0ff87f3b529b00e4cfb3bac6  libstdc++-v3/testsuite/28_regex/algorithms/regex_match/basic/string_01.cc
*************** fb122acef0bbf0fc9a70c958cb5bc819  libstd
*** 113572,113577 ****
--- 113810,113816 ----
  1346fd756cbbfa5fca18dc7e542b6835  libstdc++-v3/testsuite/28_regex/iterators/regex_token_iterator/wchar_t/wstring_02.cc
  e50868497a6eac9c6a7e389f3cda11ef  libstdc++-v3/testsuite/28_regex/match_results/102667.cc
  c0c620239c2efe0541afd787aae66d95  libstdc++-v3/testsuite/28_regex/match_results/94627.cc
+ ae3c69a2af41b63301190a3e8902a808  libstdc++-v3/testsuite/28_regex/match_results/ctors/char/alloc.cc
  523747fb6682da93512c29f0c3f84d96  libstdc++-v3/testsuite/28_regex/match_results/ctors/char/default.cc
  44e9dfbe7dc2fb0575e1461d15735094  libstdc++-v3/testsuite/28_regex/match_results/ctors/wchar_t/default.cc
  943e9f2d23fb95391f8540b16cbf669c  libstdc++-v3/testsuite/28_regex/match_results/format.cc
*************** be6f2558da97adb9fd11069e714aa638  libstd
*** 113952,113957 ****
--- 114191,114197 ----
  7e1bd6928d9af16b714bdcc3ab2676a7  libstdc++-v3/testsuite/30_threads/shared_lock/cons/5.cc
  1eab13a914dbb5210e8fa29f8548f896  libstdc++-v3/testsuite/30_threads/shared_lock/cons/6.cc
  fdd5b9a72939ea484c451ecafd73ec65  libstdc++-v3/testsuite/30_threads/shared_lock/locking/1.cc
+ f73343e4c89cb77298874c0578e423c3  libstdc++-v3/testsuite/30_threads/shared_lock/locking/112089.cc
  ddb90abb5419839bf18eb9c5c56acde3  libstdc++-v3/testsuite/30_threads/shared_lock/locking/2.cc
  9a932816d03780392dd3ea8a34345d91  libstdc++-v3/testsuite/30_threads/shared_lock/locking/3.cc
  ebaafc7818a24a7298485430455e3f32  libstdc++-v3/testsuite/30_threads/shared_lock/locking/4.cc
*************** bb6a21c3b983ca1e0f627b097b92d18c  libstd
*** 114270,114276 ****
  eed4d160963378898dde2692dcea87d6  libstdc++-v3/testsuite/experimental/chrono/value.cc
  5ed8a0dc031a8b99e196cc860447e1f8  libstdc++-v3/testsuite/experimental/deque/erasure.cc
  486c6490ca99880768c8a8d443ad1c02  libstdc++-v3/testsuite/experimental/feat-char8_t.cc
! 02455db47de7f16c8e2d1f2af4839fc7  libstdc++-v3/testsuite/experimental/feat-cxx14.cc
  f754118861b851f83334813d834cb200  libstdc++-v3/testsuite/experimental/feat-lib-fund.cc
  b357baf6c5aabc7bc6a18b73a159c3f9  libstdc++-v3/testsuite/experimental/filesystem/file_status/1.cc
  6fbf2560cc0f0331e3d9474af50277eb  libstdc++-v3/testsuite/experimental/filesystem/filesystem_error/cons.cc
--- 114510,114516 ----
  eed4d160963378898dde2692dcea87d6  libstdc++-v3/testsuite/experimental/chrono/value.cc
  5ed8a0dc031a8b99e196cc860447e1f8  libstdc++-v3/testsuite/experimental/deque/erasure.cc
  486c6490ca99880768c8a8d443ad1c02  libstdc++-v3/testsuite/experimental/feat-char8_t.cc
! 1e40b25f41d84c78c0074f58858cbdb3  libstdc++-v3/testsuite/experimental/feat-cxx14.cc
  f754118861b851f83334813d834cb200  libstdc++-v3/testsuite/experimental/feat-lib-fund.cc
  b357baf6c5aabc7bc6a18b73a159c3f9  libstdc++-v3/testsuite/experimental/filesystem/file_status/1.cc
  6fbf2560cc0f0331e3d9474af50277eb  libstdc++-v3/testsuite/experimental/filesystem/filesystem_error/cons.cc
*************** e7e8dcabc9ea03dbfe622f77cbdbee0d  libstd
*** 114288,114294 ****
  0b6be655195128ee4c4a44059a79f483  libstdc++-v3/testsuite/experimental/filesystem/operations/create_directory.cc
  86df7b64e4c303e0d8b514da3f6e2403  libstdc++-v3/testsuite/experimental/filesystem/operations/create_symlink.cc
  ad0e395725a0a7fd04d783fa3ecc9f9c  libstdc++-v3/testsuite/experimental/filesystem/operations/current_path.cc
! 4edc111e04a46ececccad8c8b357c98d  libstdc++-v3/testsuite/experimental/filesystem/operations/equivalent.cc
  998942b6add860e6956b4d91ebeb4f4c  libstdc++-v3/testsuite/experimental/filesystem/operations/exists.cc
  49e6da792986ffc12c1d8c07de270f8c  libstdc++-v3/testsuite/experimental/filesystem/operations/file_size.cc
  be0eb21bfeb3e5951b30037607f7fdba  libstdc++-v3/testsuite/experimental/filesystem/operations/is_empty.cc
--- 114528,114534 ----
  0b6be655195128ee4c4a44059a79f483  libstdc++-v3/testsuite/experimental/filesystem/operations/create_directory.cc
  86df7b64e4c303e0d8b514da3f6e2403  libstdc++-v3/testsuite/experimental/filesystem/operations/create_symlink.cc
  ad0e395725a0a7fd04d783fa3ecc9f9c  libstdc++-v3/testsuite/experimental/filesystem/operations/current_path.cc
! 916229d21d5aa6928469db80451ffcfc  libstdc++-v3/testsuite/experimental/filesystem/operations/equivalent.cc
  998942b6add860e6956b4d91ebeb4f4c  libstdc++-v3/testsuite/experimental/filesystem/operations/exists.cc
  49e6da792986ffc12c1d8c07de270f8c  libstdc++-v3/testsuite/experimental/filesystem/operations/file_size.cc
  be0eb21bfeb3e5951b30037607f7fdba  libstdc++-v3/testsuite/experimental/filesystem/operations/is_empty.cc
*************** c06b01e19066f0d4ffa4faa5202f4e3e  libstd
*** 114313,114319 ****
  0b9876d2dbc13ea170ce1e6f98c951a7  libstdc++-v3/testsuite/experimental/filesystem/path/construct/80762.cc
  f075500414fc6cbaf74c652ceabb379f  libstdc++-v3/testsuite/experimental/filesystem/path/construct/90281.cc
  abdd6f0c4be378f596d9eafe1d838cb4  libstdc++-v3/testsuite/experimental/filesystem/path/construct/90634.cc
! 5c406dc2e8d3c5bbab9689a471cce8f9  libstdc++-v3/testsuite/experimental/filesystem/path/construct/95048.cc
  117246a83e96fccd8c3b5aeac5882f9c  libstdc++-v3/testsuite/experimental/filesystem/path/construct/copy.cc
  441fcf2bc3399ac3cc19178605716898  libstdc++-v3/testsuite/experimental/filesystem/path/construct/default.cc
  d9b9a772f9f82a1016a72762f2c923e4  libstdc++-v3/testsuite/experimental/filesystem/path/construct/locale.cc
--- 114553,114559 ----
  0b9876d2dbc13ea170ce1e6f98c951a7  libstdc++-v3/testsuite/experimental/filesystem/path/construct/80762.cc
  f075500414fc6cbaf74c652ceabb379f  libstdc++-v3/testsuite/experimental/filesystem/path/construct/90281.cc
  abdd6f0c4be378f596d9eafe1d838cb4  libstdc++-v3/testsuite/experimental/filesystem/path/construct/90634.cc
! bc0c58037ed5ab6415d0899ccc8799af  libstdc++-v3/testsuite/experimental/filesystem/path/construct/95048.cc
  117246a83e96fccd8c3b5aeac5882f9c  libstdc++-v3/testsuite/experimental/filesystem/path/construct/copy.cc
  441fcf2bc3399ac3cc19178605716898  libstdc++-v3/testsuite/experimental/filesystem/path/construct/default.cc
  d9b9a772f9f82a1016a72762f2c923e4  libstdc++-v3/testsuite/experimental/filesystem/path/construct/locale.cc
*************** d3648d8a2ddc3c7201a4d5148ea0eabb  libstd
*** 114416,114421 ****
--- 114656,114662 ----
  b82e376b28cf430be76d2adc2ffa231a  libstdc++-v3/testsuite/experimental/net/internet/address/v4/creation.cc
  3a11c8807fab0d2f61e6dda6fc2fb3de  libstdc++-v3/testsuite/experimental/net/internet/address/v4/members.cc
  2011063352328b4b10ea7578b6f6b968  libstdc++-v3/testsuite/experimental/net/internet/address/v6/members.cc
+ b289bacb72f52125d6995bdc98f9a336  libstdc++-v3/testsuite/experimental/net/internet/network/v6/cons.cc
  e074bf09364a14b650e240651a0a47bc  libstdc++-v3/testsuite/experimental/net/internet/resolver/base.cc
  4e3970ded3af166abeb3813088cc10ea  libstdc++-v3/testsuite/experimental/net/internet/resolver/ops/lookup.cc
  8947f13760e616166e7059b1a52984f1  libstdc++-v3/testsuite/experimental/net/internet/resolver/ops/reverse.cc
*************** cd56463689cba039dc0577c8b2d7a855  libstd
*** 114518,114523 ****
--- 114759,114767 ----
  d6f0083479e5097ec27151965ff89e5d  libstdc++-v3/testsuite/experimental/simd/README.md
  2c666451450a60415a52ed94723ea1a6  libstdc++-v3/testsuite/experimental/simd/driver.sh
  744a88ed80132268f2d29c9d5e586308  libstdc++-v3/testsuite/experimental/simd/generate_makefile.sh
+ 03e8f51d7ef48b8a37325dad25e551ed  libstdc++-v3/testsuite/experimental/simd/pr109261_constexpr_simd.cc
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  febb06982704a772da61d7b14e5795ee  libstdc++-v3/testsuite/experimental/simd/standard_abi_usable.cc
  8456d329f682f25f869aac367480356e  libstdc++-v3/testsuite/experimental/simd/standard_abi_usable_2.cc
  59bc95299ad0d5ce1b19ecb4358e5c43  libstdc++-v3/testsuite/experimental/simd/tests/abs.cc
*************** d32d57c818b064ed375165ea4754089f  libstd
*** 114532,114545 ****
  5f84478dfa4dcd3e1c05aed24c8a3be0  libstdc++-v3/testsuite/experimental/simd/tests/bits/verify.h
  60407475679dc04e7d60bb1bc86dffdb  libstdc++-v3/testsuite/experimental/simd/tests/broadcast.cc
  ffc42372c02e90af242f59788399db5a  libstdc++-v3/testsuite/experimental/simd/tests/casts.cc
! 101a999bb7c646b579b4376416643895  libstdc++-v3/testsuite/experimental/simd/tests/fpclassify.cc
! 5c39c95d201f635a1de2535d53521fc9  libstdc++-v3/testsuite/experimental/simd/tests/frexp.cc
  af847d64df49c134727d3da5561a3723  libstdc++-v3/testsuite/experimental/simd/tests/generator.cc
  b234ef1901b5ba6d6ef358f2098f9475  libstdc++-v3/testsuite/experimental/simd/tests/hypot3_fma.cc
! 9002b5364b98cae972f0c9239f161205  libstdc++-v3/testsuite/experimental/simd/tests/integer_operators.cc
! e71a311524b3ac7dcc5fa6956e5b5a81  libstdc++-v3/testsuite/experimental/simd/tests/ldexp_scalbn_scalbln_modf.cc
  2f4834e979867c7f1db242a3dc9e0f84  libstdc++-v3/testsuite/experimental/simd/tests/loadstore.cc
! 894e612c58b45d3a0a0664f507d404ce  libstdc++-v3/testsuite/experimental/simd/tests/logarithm.cc
  a0f7c3ca5a18f8542ba3a9915810f127  libstdc++-v3/testsuite/experimental/simd/tests/mask_broadcast.cc
  b107b97473b7c99530a8603cf2da2324  libstdc++-v3/testsuite/experimental/simd/tests/mask_conversions.cc
  2b751bab06aaa71fa2b9053371d4f5be  libstdc++-v3/testsuite/experimental/simd/tests/mask_implicit_cvt.cc
--- 114776,114789 ----
  5f84478dfa4dcd3e1c05aed24c8a3be0  libstdc++-v3/testsuite/experimental/simd/tests/bits/verify.h
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  ffc42372c02e90af242f59788399db5a  libstdc++-v3/testsuite/experimental/simd/tests/casts.cc
! b6b91725acf8af5720a3dd16652d1864  libstdc++-v3/testsuite/experimental/simd/tests/fpclassify.cc
! f72a1d1b5d8432706793ea4498b30578  libstdc++-v3/testsuite/experimental/simd/tests/frexp.cc
  af847d64df49c134727d3da5561a3723  libstdc++-v3/testsuite/experimental/simd/tests/generator.cc
  b234ef1901b5ba6d6ef358f2098f9475  libstdc++-v3/testsuite/experimental/simd/tests/hypot3_fma.cc
! a05483aa2ba15e9e2a19d8ed7b9096f0  libstdc++-v3/testsuite/experimental/simd/tests/integer_operators.cc
! 9d8315b30118571c4530f2fbaaa67f5e  libstdc++-v3/testsuite/experimental/simd/tests/ldexp_scalbn_scalbln_modf.cc
  2f4834e979867c7f1db242a3dc9e0f84  libstdc++-v3/testsuite/experimental/simd/tests/loadstore.cc
! 8b0a10497d7aa54e7bf71efadd70c73e  libstdc++-v3/testsuite/experimental/simd/tests/logarithm.cc
  a0f7c3ca5a18f8542ba3a9915810f127  libstdc++-v3/testsuite/experimental/simd/tests/mask_broadcast.cc
  b107b97473b7c99530a8603cf2da2324  libstdc++-v3/testsuite/experimental/simd/tests/mask_conversions.cc
  2b751bab06aaa71fa2b9053371d4f5be  libstdc++-v3/testsuite/experimental/simd/tests/mask_implicit_cvt.cc
*************** b107b97473b7c99530a8603cf2da2324  libstd
*** 114549,114564 ****
  9a3d07ed231ad4a8ac07b19bb4761b2b  libstdc++-v3/testsuite/experimental/simd/tests/mask_reductions.cc
  951b947393323da0fd0bd090f8fc81d9  libstdc++-v3/testsuite/experimental/simd/tests/math_1arg.cc
  1595c4b98dd21d21548e171ba5bb5a7a  libstdc++-v3/testsuite/experimental/simd/tests/math_2arg.cc
! d21cdbc7bc3b41b29957f4e2fd8e3357  libstdc++-v3/testsuite/experimental/simd/tests/operator_cvt.cc
  b7691a7156c96f83c25b9fe6a36307ca  libstdc++-v3/testsuite/experimental/simd/tests/operators.cc
! dd671dbe35947377857f0f71337ea225  libstdc++-v3/testsuite/experimental/simd/tests/reductions.cc
  602de48c0437c1eca409deac2c196c53  libstdc++-v3/testsuite/experimental/simd/tests/remqo.cc
  2b03327b12708d313a4591a4fbb2f3e2  libstdc++-v3/testsuite/experimental/simd/tests/simd.cc
  070b37e3ae10319ba1cdd6a15808e929  libstdc++-v3/testsuite/experimental/simd/tests/sincos.cc
  2cb204227ac6a30742376b71c73ab773  libstdc++-v3/testsuite/experimental/simd/tests/split_concat.cc
  08fa96bd646c4d617dfedb1436d00717  libstdc++-v3/testsuite/experimental/simd/tests/splits.cc
  9bf3b6278fe2f036cc846a88df8ebcb3  libstdc++-v3/testsuite/experimental/simd/tests/trigonometric.cc
! 201affd1d9ed7afd66658b1f2f5701c0  libstdc++-v3/testsuite/experimental/simd/tests/trunc_ceil_floor.cc
  2f197150877211119ac153f159dc1200  libstdc++-v3/testsuite/experimental/simd/tests/where.cc
  ebdd856dc1e0446c45236f494cddaefb  libstdc++-v3/testsuite/experimental/source_location/1.cc
  fccce21c04130e6b402d758f8e7e4de4  libstdc++-v3/testsuite/experimental/string/erasure.cc
--- 114793,114808 ----
  9a3d07ed231ad4a8ac07b19bb4761b2b  libstdc++-v3/testsuite/experimental/simd/tests/mask_reductions.cc
  951b947393323da0fd0bd090f8fc81d9  libstdc++-v3/testsuite/experimental/simd/tests/math_1arg.cc
  1595c4b98dd21d21548e171ba5bb5a7a  libstdc++-v3/testsuite/experimental/simd/tests/math_2arg.cc
! 5d4e9d4a781714bda02df195620d5d28  libstdc++-v3/testsuite/experimental/simd/tests/operator_cvt.cc
  b7691a7156c96f83c25b9fe6a36307ca  libstdc++-v3/testsuite/experimental/simd/tests/operators.cc
! 8f727e7bb555702245107256530790ba  libstdc++-v3/testsuite/experimental/simd/tests/reductions.cc
  602de48c0437c1eca409deac2c196c53  libstdc++-v3/testsuite/experimental/simd/tests/remqo.cc
  2b03327b12708d313a4591a4fbb2f3e2  libstdc++-v3/testsuite/experimental/simd/tests/simd.cc
  070b37e3ae10319ba1cdd6a15808e929  libstdc++-v3/testsuite/experimental/simd/tests/sincos.cc
  2cb204227ac6a30742376b71c73ab773  libstdc++-v3/testsuite/experimental/simd/tests/split_concat.cc
  08fa96bd646c4d617dfedb1436d00717  libstdc++-v3/testsuite/experimental/simd/tests/splits.cc
  9bf3b6278fe2f036cc846a88df8ebcb3  libstdc++-v3/testsuite/experimental/simd/tests/trigonometric.cc
! 618a6afab8386f2b5d8375673bc85dda  libstdc++-v3/testsuite/experimental/simd/tests/trunc_ceil_floor.cc
  2f197150877211119ac153f159dc1200  libstdc++-v3/testsuite/experimental/simd/tests/where.cc
  ebdd856dc1e0446c45236f494cddaefb  libstdc++-v3/testsuite/experimental/source_location/1.cc
  fccce21c04130e6b402d758f8e7e4de4  libstdc++-v3/testsuite/experimental/string/erasure.cc
*************** dd6759b40a7f7a797962e13433070128  libstd
*** 114632,114638 ****
  c97bb58a0d698de4ac0963f0a2971db0  libstdc++-v3/testsuite/experimental/string_view/requirements/explicit_instantiation/char8_t/1.cc
  2ea27c389fe9f2cdd56b517580289990  libstdc++-v3/testsuite/experimental/string_view/requirements/explicit_instantiation/wchar_t/1.cc
  667094772a251d3a614c05b38a484ec2  libstdc++-v3/testsuite/experimental/string_view/requirements/typedefs.cc
! 082b55b5bcbe6779a39c54e959a5d9e3  libstdc++-v3/testsuite/experimental/string_view/typedefs.cc
  ebdd3bcc1466d8e7516c043bd77303d9  libstdc++-v3/testsuite/experimental/string_view/types/1.cc
  44afa132fe15442f7cad19b625884b73  libstdc++-v3/testsuite/experimental/system_error/value.cc
  5b0712bcc9e4658332efc1e4fadb2a47  libstdc++-v3/testsuite/experimental/tuple/apply.cc
--- 114876,114882 ----
  c97bb58a0d698de4ac0963f0a2971db0  libstdc++-v3/testsuite/experimental/string_view/requirements/explicit_instantiation/char8_t/1.cc
  2ea27c389fe9f2cdd56b517580289990  libstdc++-v3/testsuite/experimental/string_view/requirements/explicit_instantiation/wchar_t/1.cc
  667094772a251d3a614c05b38a484ec2  libstdc++-v3/testsuite/experimental/string_view/requirements/typedefs.cc
! 5c206362fbacd074b00202aa695c38d1  libstdc++-v3/testsuite/experimental/string_view/typedefs.cc
  ebdd3bcc1466d8e7516c043bd77303d9  libstdc++-v3/testsuite/experimental/string_view/types/1.cc
  44afa132fe15442f7cad19b625884b73  libstdc++-v3/testsuite/experimental/system_error/value.cc
  5b0712bcc9e4658332efc1e4fadb2a47  libstdc++-v3/testsuite/experimental/tuple/apply.cc
*************** cd0313fea79467b83d9afaf51ea7b6f8  libstd
*** 115000,115008 ****
  efe80cd6fb09aa93d37114ed5340800c  libstdc++-v3/testsuite/ext/vstring/requirements/explicit_instantiation/wchar_t/1.cc
  64b3206e033f99952dd1678871a15f2a  libstdc++-v3/testsuite/ext/vstring/requirements/typedefs.cc
  d30063403274e1065cc854085e116d6b  libstdc++-v3/testsuite/ext/vstring/types/23767.cc
! 4ab0eb3fb5aaffdf8091547947d6f98f  libstdc++-v3/testsuite/lib/dg-options.exp
  fc2503720aae2c77c00f195d8b6ba64e  libstdc++-v3/testsuite/lib/gdb-test.exp
! 4424f97ad0c4ff6ebfb5044d99e5a347  libstdc++-v3/testsuite/lib/libstdc++.exp
  56632af45fd1ea0f618c2958d04755ae  libstdc++-v3/testsuite/lib/prune.exp
  06e070e55f5a8385db00266af680f0eb  libstdc++-v3/testsuite/libstdc++-abi/abi.exp
  e49fd8c901c170534216585f66b1e045  libstdc++-v3/testsuite/libstdc++-dg/conformance.exp
--- 115244,115252 ----
  efe80cd6fb09aa93d37114ed5340800c  libstdc++-v3/testsuite/ext/vstring/requirements/explicit_instantiation/wchar_t/1.cc
  64b3206e033f99952dd1678871a15f2a  libstdc++-v3/testsuite/ext/vstring/requirements/typedefs.cc
  d30063403274e1065cc854085e116d6b  libstdc++-v3/testsuite/ext/vstring/types/23767.cc
! 256140b1f8d4dee5a7ecea0c156e8307  libstdc++-v3/testsuite/lib/dg-options.exp
  fc2503720aae2c77c00f195d8b6ba64e  libstdc++-v3/testsuite/lib/gdb-test.exp
! ab0b85152edcb64e60abf681a9c2f33d  libstdc++-v3/testsuite/lib/libstdc++.exp
  56632af45fd1ea0f618c2958d04755ae  libstdc++-v3/testsuite/lib/prune.exp
  06e070e55f5a8385db00266af680f0eb  libstdc++-v3/testsuite/libstdc++-abi/abi.exp
  e49fd8c901c170534216585f66b1e045  libstdc++-v3/testsuite/libstdc++-dg/conformance.exp
*************** c417b54472d07ec7aa6e7af1c3c6d896  libstd
*** 115011,115017 ****
  152e703d617bb7d3724a194d7c9f0799  libstdc++-v3/testsuite/libstdc++-prettyprinters/80276.cc
  b1281cbb5e95214d54adafdf2cf2b03f  libstdc++-v3/testsuite/libstdc++-prettyprinters/91997.cc
  46e322fb900e091e5635c048b2623306  libstdc++-v3/testsuite/libstdc++-prettyprinters/compat.cc
! a621e16465f591704a2e3250537aad0e  libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx11.cc
  a8d73378b5fc400100d29de439be4a44  libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx17.cc
  8a7a1074cfc491af32881d81a2c24a91  libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx20.cc
  9ec08e769d05c4e57a2216c17a47a794  libstdc++-v3/testsuite/libstdc++-prettyprinters/debug.cc
--- 115255,115261 ----
  152e703d617bb7d3724a194d7c9f0799  libstdc++-v3/testsuite/libstdc++-prettyprinters/80276.cc
  b1281cbb5e95214d54adafdf2cf2b03f  libstdc++-v3/testsuite/libstdc++-prettyprinters/91997.cc
  46e322fb900e091e5635c048b2623306  libstdc++-v3/testsuite/libstdc++-prettyprinters/compat.cc
! 3b476a3e62e680bfa3526c5eb93bd80c  libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx11.cc
  a8d73378b5fc400100d29de439be4a44  libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx17.cc
  8a7a1074cfc491af32881d81a2c24a91  libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx20.cc
  9ec08e769d05c4e57a2216c17a47a794  libstdc++-v3/testsuite/libstdc++-prettyprinters/debug.cc
*************** a0fdef1654a7cce567c466178f2e4b29  libstd
*** 115027,115033 ****
  e62ddba2d5699b2da68d1bd242a3536c  libstdc++-v3/testsuite/libstdc++-prettyprinters/whatis2.cc
  bce8bb63953cd2f76e9429708e884949  libstdc++-v3/testsuite/libstdc++-xmethods/array.cc
  a0e7ce5b03ed560d49265aed37b12cc7  libstdc++-v3/testsuite/libstdc++-xmethods/associative-containers.cc
! 94a207eeede0afa31ca42f89a730dd1f  libstdc++-v3/testsuite/libstdc++-xmethods/deque.cc
  c2226029ecf5fdb125ac9a4771b762d6  libstdc++-v3/testsuite/libstdc++-xmethods/forwardlist.cc
  a100879d6e7ba579a0ad08cdbbc26eb0  libstdc++-v3/testsuite/libstdc++-xmethods/list.cc
  63d39e620edeb5e4aaafa8737fe9af2d  libstdc++-v3/testsuite/libstdc++-xmethods/shared_ptr.cc
--- 115271,115277 ----
  e62ddba2d5699b2da68d1bd242a3536c  libstdc++-v3/testsuite/libstdc++-prettyprinters/whatis2.cc
  bce8bb63953cd2f76e9429708e884949  libstdc++-v3/testsuite/libstdc++-xmethods/array.cc
  a0e7ce5b03ed560d49265aed37b12cc7  libstdc++-v3/testsuite/libstdc++-xmethods/associative-containers.cc
! 9e231002b5b4bc22d6fc172c9850bc4f  libstdc++-v3/testsuite/libstdc++-xmethods/deque.cc
  c2226029ecf5fdb125ac9a4771b762d6  libstdc++-v3/testsuite/libstdc++-xmethods/forwardlist.cc
  a100879d6e7ba579a0ad08cdbbc26eb0  libstdc++-v3/testsuite/libstdc++-xmethods/list.cc
  63d39e620edeb5e4aaafa8737fe9af2d  libstdc++-v3/testsuite/libstdc++-xmethods/shared_ptr.cc
*************** d92e49da207bf912ef96adc5011f6de0  libstd
*** 115312,115318 ****
  c192d585fa9080c1f80ec4cec5ed1772  libstdc++-v3/testsuite/std/ranges/iota/iota_view.cc
  0cd77770d34e5f400c9eea5fad4e8690  libstdc++-v3/testsuite/std/ranges/iota/iterator.cc
  d3cf733a5c3197ae11dcddfeaa512b9e  libstdc++-v3/testsuite/std/ranges/iota/lwg3292_neg.cc
! 9b396381e8b657a19f1c2426a30d24a6  libstdc++-v3/testsuite/std/ranges/iota/max_size_type.cc
  667b44b08d3b7ae9548298cfe6bcaa85  libstdc++-v3/testsuite/std/ranges/iota/size.cc
  61222efbc6eff91f53bcecd1b3758779  libstdc++-v3/testsuite/std/ranges/istream_view.cc
  64080a8eda23a51d5fb499026fa0dae4  libstdc++-v3/testsuite/std/ranges/p2259.cc
--- 115556,115562 ----
  c192d585fa9080c1f80ec4cec5ed1772  libstdc++-v3/testsuite/std/ranges/iota/iota_view.cc
  0cd77770d34e5f400c9eea5fad4e8690  libstdc++-v3/testsuite/std/ranges/iota/iterator.cc
  d3cf733a5c3197ae11dcddfeaa512b9e  libstdc++-v3/testsuite/std/ranges/iota/lwg3292_neg.cc
! 1308c157b3c799e07aa9f74367dbee83  libstdc++-v3/testsuite/std/ranges/iota/max_size_type.cc
  667b44b08d3b7ae9548298cfe6bcaa85  libstdc++-v3/testsuite/std/ranges/iota/size.cc
  61222efbc6eff91f53bcecd1b3758779  libstdc++-v3/testsuite/std/ranges/istream_view.cc
  64080a8eda23a51d5fb499026fa0dae4  libstdc++-v3/testsuite/std/ranges/p2259.cc
*************** afe90a21fe8f6c5a2a97cbe9fc1ae49a  libstd
*** 115342,115355 ****
  6a2f0eb60479730d6b6f1b6d3436a913  libstdc++-v3/testsuite/std/time/is_pm/1.cc
  11a1b0b0dc2f0bf45b2b9a7608bff871  libstdc++-v3/testsuite/std/time/make12/1.cc
  dbc4514c5003ed2d1442d0676cbc4a02  libstdc++-v3/testsuite/std/time/make24/1.cc
! 2cc4ffcc2e7118793e56e0b07507f0c8  libstdc++-v3/testsuite/std/time/month/1.cc
  e012fe1eb95d2291f6ad6c8c5f1fe041  libstdc++-v3/testsuite/std/time/month_day/1.cc
  7f2aefa66b33b12663b816445f8e994a  libstdc++-v3/testsuite/std/time/month_day_last/1.cc
  dbb34b617244c645fd9bc32dcfb84663  libstdc++-v3/testsuite/std/time/month_weekday/1.cc
  cd3f90e806f2979c466207907984351b  libstdc++-v3/testsuite/std/time/month_weekday_last/1.cc
  75e70bdabe3c07e0218b303a1f3ecf37  libstdc++-v3/testsuite/std/time/syn_c++20.cc
  95fc10e252443f22e4022a1a82715453  libstdc++-v3/testsuite/std/time/traits/is_clock.cc
! 6cc3dff9098d0a0b4987232ffa4192a0  libstdc++-v3/testsuite/std/time/weekday/1.cc
  07a6c4c70bcfd13350693a1ad65f00fa  libstdc++-v3/testsuite/std/time/weekday_indexed/1.cc
  f9bb2332633525b6b855cb92aee40380  libstdc++-v3/testsuite/std/time/weekday_last/1.cc
  feca06bff9fab60b776db8b63e94508f  libstdc++-v3/testsuite/std/time/year/1.cc
--- 115586,115601 ----
  6a2f0eb60479730d6b6f1b6d3436a913  libstdc++-v3/testsuite/std/time/is_pm/1.cc
  11a1b0b0dc2f0bf45b2b9a7608bff871  libstdc++-v3/testsuite/std/time/make12/1.cc
  dbc4514c5003ed2d1442d0676cbc4a02  libstdc++-v3/testsuite/std/time/make24/1.cc
! f7b3c80c4e116dab00e6313d95ec8615  libstdc++-v3/testsuite/std/time/month/1.cc
! b7a5373ed0797aa495f69436f1939726  libstdc++-v3/testsuite/std/time/month/2.cc
  e012fe1eb95d2291f6ad6c8c5f1fe041  libstdc++-v3/testsuite/std/time/month_day/1.cc
  7f2aefa66b33b12663b816445f8e994a  libstdc++-v3/testsuite/std/time/month_day_last/1.cc
  dbb34b617244c645fd9bc32dcfb84663  libstdc++-v3/testsuite/std/time/month_weekday/1.cc
  cd3f90e806f2979c466207907984351b  libstdc++-v3/testsuite/std/time/month_weekday_last/1.cc
  75e70bdabe3c07e0218b303a1f3ecf37  libstdc++-v3/testsuite/std/time/syn_c++20.cc
  95fc10e252443f22e4022a1a82715453  libstdc++-v3/testsuite/std/time/traits/is_clock.cc
! 9c3ec11094d0ce79885b65560b53d78e  libstdc++-v3/testsuite/std/time/weekday/1.cc
! d6cb5f0804c9bd14e047294d47decf33  libstdc++-v3/testsuite/std/time/weekday/2.cc
  07a6c4c70bcfd13350693a1ad65f00fa  libstdc++-v3/testsuite/std/time/weekday_indexed/1.cc
  f9bb2332633525b6b855cb92aee40380  libstdc++-v3/testsuite/std/time/weekday_last/1.cc
  feca06bff9fab60b776db8b63e94508f  libstdc++-v3/testsuite/std/time/year/1.cc
*************** c2a97eca3a90bb49f2ca88521206e5d9  libstd
*** 115939,115948 ****
  d14e66c94eaa24942df81154214ce8cb  libstdc++-v3/testsuite/tr1/8_c_compatibility/complex/overloads_float.cc
  bad82e60eaf42f633348637ad6af882f  libstdc++-v3/testsuite/tr1/8_c_compatibility/complex/overloads_int.cc
  c2853e3ee835fcea365cd724ea5f2cdd  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdint/types_std_tr1.cc
! 3836874d6428ebe546651be55a1a15ec  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdio/functions.cc
  61f1a85f64525693cb564ca7e09a9927  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdlib/functions.cc
  c603793d94afa72f146a44405619126c  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdlib/types_std_tr1.cc
! 9f136149c3baef1fd7e1cbc98e5000d2  libstdc++-v3/testsuite/tr1/8_c_compatibility/cwchar/functions.cc
  db0e9942bd6d90868055ae7e838b0a21  libstdc++-v3/testsuite/tr1/8_c_compatibility/cwctype/functions.cc
  d9e471422e6ce045cb7591717d3deaac  libstdc++-v3/testsuite/tr1/headers/all.cc
  41ab99c3159e620c64444c0ff4619850  libstdc++-v3/testsuite/tr1/headers/c++200x/complex.cc
--- 116185,116194 ----
  d14e66c94eaa24942df81154214ce8cb  libstdc++-v3/testsuite/tr1/8_c_compatibility/complex/overloads_float.cc
  bad82e60eaf42f633348637ad6af882f  libstdc++-v3/testsuite/tr1/8_c_compatibility/complex/overloads_int.cc
  c2853e3ee835fcea365cd724ea5f2cdd  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdint/types_std_tr1.cc
! 79c0be2a6ede9940c27ebca5afd095ac  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdio/functions.cc
  61f1a85f64525693cb564ca7e09a9927  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdlib/functions.cc
  c603793d94afa72f146a44405619126c  libstdc++-v3/testsuite/tr1/8_c_compatibility/cstdlib/types_std_tr1.cc
! 42fa6cf0d06073c00e3fce1f11d3c1b6  libstdc++-v3/testsuite/tr1/8_c_compatibility/cwchar/functions.cc
  db0e9942bd6d90868055ae7e838b0a21  libstdc++-v3/testsuite/tr1/8_c_compatibility/cwctype/functions.cc
  d9e471422e6ce045cb7591717d3deaac  libstdc++-v3/testsuite/tr1/headers/all.cc
  41ab99c3159e620c64444c0ff4619850  libstdc++-v3/testsuite/tr1/headers/c++200x/complex.cc
*************** f11ef991bc17262fc656f24489ad5bc2  libstd
*** 115962,115967 ****
--- 116208,116214 ----
  2b4a18798ec59ec0ccb42b1b6dfeda0a  libstdc++-v3/testsuite/tr2/dynamic_bitset/pr58729.cc
  03f730c3136672f8cd1226742b5abe63  libstdc++-v3/testsuite/tr2/dynamic_bitset/pr87784.cc
  e3b7410ecb9a7c465b9bb748d97e0a49  libstdc++-v3/testsuite/tr2/dynamic_bitset/pr92059.cc
+ ecda9a957b2187c0e03c98357f9a8f67  libstdc++-v3/testsuite/tr2/dynamic_bitset/string.cc
  e38724df984f6f323ea00f7a077fec36  libstdc++-v3/testsuite/tr2/headers/all.cc
  6854641b62882de184c8f0cad1cafbad  libstdc++-v3/testsuite/tr2/headers/using_namespace_std_tr2.cc
  4b5b900d3ee66e7ce3cf094c41c8888c  libstdc++-v3/testsuite/util/atomic/wait_notify_util.h
*************** e7d5f77a9502136b76649f684199ef70  libstd
*** 116030,116036 ****
  4a9a9063a97988791213102aa96d7632  libstdc++-v3/testsuite/util/performance/time/elapsed_timer.hpp
  a5c6a20d7e5bf02bb86fe0dbf6cf4884  libstdc++-v3/testsuite/util/performance/time/timing_test_base.hpp
  f229f005fb6b0edfab2a25224f4aa670  libstdc++-v3/testsuite/util/pstl/pstl_test_config.h
! 315ea42a1d905634a70b6bfebf2b60e4  libstdc++-v3/testsuite/util/pstl/test_utils.h
  5dfc09db3b2617d5c19c9eaec6f64d67  libstdc++-v3/testsuite/util/regression/basic_type.hpp
  6eadb86a02b8dc5e99f6258f3034b19b  libstdc++-v3/testsuite/util/regression/common_type.hpp
  a31d5aa6650e7d3ba8be115d978a0d62  libstdc++-v3/testsuite/util/regression/rand/assoc/container_rand_regression_test.h
--- 116277,116283 ----
  4a9a9063a97988791213102aa96d7632  libstdc++-v3/testsuite/util/performance/time/elapsed_timer.hpp
  a5c6a20d7e5bf02bb86fe0dbf6cf4884  libstdc++-v3/testsuite/util/performance/time/timing_test_base.hpp
  f229f005fb6b0edfab2a25224f4aa670  libstdc++-v3/testsuite/util/pstl/pstl_test_config.h
! 5286838f82726826df274b6eb8e38ff1  libstdc++-v3/testsuite/util/pstl/test_utils.h
  5dfc09db3b2617d5c19c9eaec6f64d67  libstdc++-v3/testsuite/util/regression/basic_type.hpp
  6eadb86a02b8dc5e99f6258f3034b19b  libstdc++-v3/testsuite/util/regression/common_type.hpp
  a31d5aa6650e7d3ba8be115d978a0d62  libstdc++-v3/testsuite/util/regression/rand/assoc/container_rand_regression_test.h
*************** b1dbe55b9edd1c63e213a5d77d4daa77  libstd
*** 116061,116067 ****
  b6512138575fef873fceae65f127e888  libstdc++-v3/testsuite/util/testsuite_abi.h
  890a2ba99fd019bde86026b30a2431e6  libstdc++-v3/testsuite/util/testsuite_abi_check.cc
  6e266b277968cb27c93329a4b5ba47de  libstdc++-v3/testsuite/util/testsuite_allocator.cc
! 76bce70903547f6b2805d51a82152975  libstdc++-v3/testsuite/util/testsuite_allocator.h
  73cbff69a4a3732bb760848ce25110bf  libstdc++-v3/testsuite/util/testsuite_api.h
  5ed09a09458ce0f5233885ea4ff0c00a  libstdc++-v3/testsuite/util/testsuite_character.cc
  27d746bda1ad2167a2f4b476782ac174  libstdc++-v3/testsuite/util/testsuite_character.h
--- 116308,116314 ----
  b6512138575fef873fceae65f127e888  libstdc++-v3/testsuite/util/testsuite_abi.h
  890a2ba99fd019bde86026b30a2431e6  libstdc++-v3/testsuite/util/testsuite_abi_check.cc
  6e266b277968cb27c93329a4b5ba47de  libstdc++-v3/testsuite/util/testsuite_allocator.cc
! aa37b1c51691a6e5b257ed5b3883c3bd  libstdc++-v3/testsuite/util/testsuite_allocator.h
  73cbff69a4a3732bb760848ce25110bf  libstdc++-v3/testsuite/util/testsuite_api.h
  5ed09a09458ce0f5233885ea4ff0c00a  libstdc++-v3/testsuite/util/testsuite_character.cc
  27d746bda1ad2167a2f4b476782ac174  libstdc++-v3/testsuite/util/testsuite_character.h
*************** a412686870425c5fb3e383ec59146426  libstd
*** 116088,116094 ****
  039fb71c0474e0e873b0c17058f6787e  libstdc++-v3/testsuite/util/thread/all.h
  b950d655469c477755252b1e18009596  libtool-ldflags
  1936a81f2a04a996ff99c7ebdebc5003  libtool.m4
! 50e3c52d294280d8f3223126bd7c0e12  libvtv/ChangeLog
  ba2573e6811220314686b082dc2e0204  libvtv/Makefile.am
  b1170aae9472f26fdc8326737dc22aba  libvtv/Makefile.in
  3b765c4f4a0a0f606db1472bce2b8d29  libvtv/acinclude.m4
--- 116335,116341 ----
  039fb71c0474e0e873b0c17058f6787e  libstdc++-v3/testsuite/util/thread/all.h
  b950d655469c477755252b1e18009596  libtool-ldflags
  1936a81f2a04a996ff99c7ebdebc5003  libtool.m4
! b03547475365ba6f358b267f7bad9587  libvtv/ChangeLog
  ba2573e6811220314686b082dc2e0204  libvtv/Makefile.am
  b1170aae9472f26fdc8326737dc22aba  libvtv/Makefile.in
  3b765c4f4a0a0f606db1472bce2b8d29  libvtv/acinclude.m4
*************** e0e7ee6d9ede75d9d8822ab3b88d5080  libvtv
*** 116171,116177 ****
  05b984c47b23470a9bac686f5d51249e  libvtv/vtv_utils.h
  247597a3fcc5b5aa8bd923351c59d853  ltgcc.m4
  06c2854f9cfe5864b2885e0d0e9c512f  ltmain.sh
! 40a05a0efcbacc4548e850973d26d3b1  lto-plugin/ChangeLog
  50806c6aac4ef6d8e689dfe596507a3a  lto-plugin/Makefile.am
  5d97b067df8959a09d2d9392fca6774b  lto-plugin/Makefile.in
  75fc65b35d0a47ac098f7a278d37060b  lto-plugin/aclocal.m4
--- 116418,116424 ----
  05b984c47b23470a9bac686f5d51249e  libvtv/vtv_utils.h
  247597a3fcc5b5aa8bd923351c59d853  ltgcc.m4
  06c2854f9cfe5864b2885e0d0e9c512f  ltmain.sh
! 8d1a275647af986a06a4319be2ff9ee9  lto-plugin/ChangeLog
  50806c6aac4ef6d8e689dfe596507a3a  lto-plugin/Makefile.am
  5d97b067df8959a09d2d9392fca6774b  lto-plugin/Makefile.in
  75fc65b35d0a47ac098f7a278d37060b  lto-plugin/aclocal.m4
*************** dee72a6a60e99528b0d17bf3ff9a1e15  ltopti
*** 116184,116190 ****
  bc2f6032c98896249eadb56177c7d357  ltsugar.m4
  c30cd33c496505f13d9fbdb6970c7c33  ltversion.m4
  293853a13b7e218e3a4342cf85fbbf25  lt~obsolete.m4
! 28a64fafbd465ac45b99e801b303f508  maintainer-scripts/ChangeLog
  33c7bc2d2c55956dfac85a05d8a80eff  maintainer-scripts/README
  507e832af5f2d63b8a78eef217c807a7  maintainer-scripts/branch_changer.py
  c819510f0d438149c1518bda7b165ac4  maintainer-scripts/bugzilla-close-candidate.py
--- 116431,116437 ----
  bc2f6032c98896249eadb56177c7d357  ltsugar.m4
  c30cd33c496505f13d9fbdb6970c7c33  ltversion.m4
  293853a13b7e218e3a4342cf85fbbf25  lt~obsolete.m4
! c5d4720a61f135f6352038ef2ee28f09  maintainer-scripts/ChangeLog
  33c7bc2d2c55956dfac85a05d8a80eff  maintainer-scripts/README
  507e832af5f2d63b8a78eef217c807a7  maintainer-scripts/branch_changer.py
  c819510f0d438149c1518bda7b165ac4  maintainer-scripts/bugzilla-close-candidate.py
*************** cf2baa0854f564a7785307e79f155efc  symlin
*** 116205,116211 ****
  40bb1f4ce4a60a36d1ec50d66aeed4d1  test-driver
  cb06c1be6a41d68b0a65e0c1a91752bc  ylwrap
  03bf3ba8089f4bf475ef4035cf316a47  zlib/CMakeLists.txt
! 2ddb3e0e2465797bb389c92f87b62a6d  zlib/ChangeLog
  f10e5e9394787b288e91fed29533720a  zlib/ChangeLog.gcj
  0e9a37be8e3b85cc0ccf60504064c297  zlib/ChangeLog.jit
  b7a1991f01daea3efe108a215c5514a5  zlib/FAQ
--- 116452,116458 ----
  40bb1f4ce4a60a36d1ec50d66aeed4d1  test-driver
  cb06c1be6a41d68b0a65e0c1a91752bc  ylwrap
  03bf3ba8089f4bf475ef4035cf316a47  zlib/CMakeLists.txt
! 088b790ce8fb45f4faba82a93ba72343  zlib/ChangeLog
  f10e5e9394787b288e91fed29533720a  zlib/ChangeLog.gcj
  0e9a37be8e3b85cc0ccf60504064c297  zlib/ChangeLog.jit
  b7a1991f01daea3efe108a215c5514a5  zlib/FAQ
diff -Nrcpad gcc-12.3.0/NEWS gcc-12.4.0/NEWS
*** gcc-12.3.0/NEWS	Mon May  8 12:15:47 2023
--- gcc-12.4.0/NEWS	Thu Jun 20 08:11:22 2024
*************** see ONEWS.
*** 6,31 ****
  
  ======================================================================
  http://gcc.gnu.org/gcc-12/index.html
- 
                               GCC 12 Release Series
  
!    May 8, 2023
  
!    The GCC developers are pleased to announce the release of GCC 12.3.
  
     This release is a bug-fix release, containing fixes for regressions in
!    GCC 12.2 relative to previous releases of GCC.
  
  Release History
  
     GCC 12.3
!           May 8, 2023 ([1]changes, [2]documentation)
  
     GCC 12.2
!           Aug 19, 2022 ([3]changes, [4]documentation)
  
     GCC 12.1
!           May 6, 2022 ([5]changes, [6]documentation)
  
  References and Acknowledgements
  
--- 6,33 ----
  
  ======================================================================
  http://gcc.gnu.org/gcc-12/index.html
                               GCC 12 Release Series
  
!    Jun 20, 2024
  
!    The GCC developers are pleased to announce the release of GCC 12.4.
  
     This release is a bug-fix release, containing fixes for regressions in
!    GCC 12.3 relative to previous releases of GCC.
  
  Release History
  
+    GCC 12.4
+           Jun 20, 2024 ([1]changes, [2]documentation)
+ 
     GCC 12.3
!           May 8, 2023 ([3]changes, [4]documentation)
  
     GCC 12.2
!           Aug 19, 2022 ([5]changes, [6]documentation)
  
     GCC 12.1
!           May 6, 2022 ([7]changes, [8]documentation)
  
  References and Acknowledgements
  
*************** References and Acknowledgements
*** 33,90 ****
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
-    A list of [7]successful builds is updated as new information becomes
-    available.
- 
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [8]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [9]GCC project
!    web site or contact the [10]GCC development mailing list.
  
!    To obtain GCC please use [11]our mirror sites or [12]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [13]GCC manuals. If that fails, the
!     [14]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [15]gcc@gcc.gnu.org. All of [16]our lists have public
      archives.
  
!    Copyright (C) [17]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [18]maintained by the GCC team. Last modified
!    2023-05-08.
  
  References
  
!    1. http://gcc.gnu.org/gcc-12/changes.html
!    2. http://gcc.gnu.org/onlinedocs/12.3.0/
!    3. http://gcc.gnu.org/gcc-12/changes.html
!    4. http://gcc.gnu.org/onlinedocs/12.2.0/
!    5. http://gcc.gnu.org/gcc-12/changes.html
!    6. http://gcc.gnu.org/onlinedocs/12.1.0/
!    7. http://gcc.gnu.org/gcc-12/buildstat.html
!    8. http://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Contributors.html
!    9. http://gcc.gnu.org/index.html
!   10. mailto:gcc@gcc.gnu.org
!   11. http://gcc.gnu.org/mirrors.html
!   12. http://gcc.gnu.org/git.html
!   13. https://gcc.gnu.org/onlinedocs/
!   14. mailto:gcc-help@gcc.gnu.org
!   15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/lists.html
!   17. https://www.fsf.org/
!   18. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-12/changes.html
- 
                               GCC 12 Release Series
                          Changes, New Features, and Fixes
  
--- 35,89 ----
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [9]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [10]GCC
!    project web site or contact the [11]GCC development mailing list.
  
!    To obtain GCC please use [12]our mirror sites or [13]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [14]GCC manuals. If that fails, the
!     [15]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [16]gcc@gcc.gnu.org. All of [17]our lists have public
      archives.
  
!    Copyright (C) [18]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [19]maintained by the GCC team. Last modified
!    2024-06-20.
  
  References
  
!    1. https://gcc.gnu.org/gcc-12/changes.html
!    2. https://gcc.gnu.org/onlinedocs/12.4.0/
!    3. https://gcc.gnu.org/gcc-12/changes.html
!    4. https://gcc.gnu.org/onlinedocs/12.3.0/
!    5. https://gcc.gnu.org/gcc-12/changes.html
!    6. https://gcc.gnu.org/onlinedocs/12.2.0/
!    7. https://gcc.gnu.org/gcc-12/changes.html
!    8. https://gcc.gnu.org/onlinedocs/12.1.0/
!    9. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Contributors.html
!   10. https://gcc.gnu.org/index.html
!   11. mailto:gcc@gcc.gnu.org
!   12. https://gcc.gnu.org/mirrors.html
!   13. https://gcc.gnu.org/git.html
!   14. https://gcc.gnu.org/onlinedocs/
!   15. mailto:gcc-help@gcc.gnu.org
!   16. mailto:gcc@gcc.gnu.org
!   17. https://gcc.gnu.org/lists.html
!   18. https://www.fsf.org/
!   19. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-12/changes.html
                               GCC 12 Release Series
                          Changes, New Features, and Fixes
  
*************** Caveats
*** 161,170 ****
  
  General Improvements
  
!      * Vectorization is enabled at -O2 which is now equivalent to the
!        original -O2 -ftree-vectorize -fvect-cost-model=very-cheap. Note
!        that default vectorizer cost model has been changed which used to
!        behave as -fvect-cost-model=cheap were specified.
       * GCC now supports the [7]ShadowCallStack sanitizer, which can be
         enabled using the command-line option
         [8]-fsanitize=shadow-call-stack. This sanitizer currently only
--- 160,170 ----
  
  General Improvements
  
!      * Vectorization is enabled at -O2 which is now equivalent to what
!        would have been -O2 -ftree-vectorize -fvect-cost-model=very-cheap
!        in the past. Note that the default vectorizer cost model has been
!        changed; it used to behave as if -fvect-cost-model=cheap had been
!        specified.
       * GCC now supports the [7]ShadowCallStack sanitizer, which can be
         enabled using the command-line option
         [8]-fsanitize=shadow-call-stack. This sanitizer currently only
*************** New Targets and Target Specific Improvem
*** 577,584 ****
    BPF
  
       * Support for CO-RE (compile-once, run-everywhere) has been added to
!        the BPF backend. CO-RE allows to compile portable BPF programs that
!        are able to run among different versions of the Linux kernel.
  
    IA-32/x86-64
  
--- 577,584 ----
    BPF
  
       * Support for CO-RE (compile-once, run-everywhere) has been added to
!        the BPF back end. CO-RE allows to compile portable BPF programs
!        that are able to run among different versions of the Linux kernel.
  
    IA-32/x86-64
  
*************** New Targets and Target Specific Improvem
*** 655,661 ****
         functions has been rewritten to be easier and less error-prone to
         maintain. Every attempt has been made to ensure that the new
         behavior matches the old behavior, but inevitably some bugs can be
!        expected. Please report any problems via [104]GCC Bugzilla.
       * The built-in functions __builtin_get_texasr, __builtin_get_texasru,
         __builtin_get_tfhar, __builtin_get_tfiar, __builtin_set_texasr,
         __builtin_set_texasru, __builtin_set_tfhar, and __builtin_set_tfiar
--- 655,661 ----
         functions has been rewritten to be easier and less error-prone to
         maintain. Every attempt has been made to ensure that the new
         behavior matches the old behavior, but inevitably some bugs can be
!        expected. Please [104]report any problems.
       * The built-in functions __builtin_get_texasr, __builtin_get_texasru,
         __builtin_get_tfhar, __builtin_get_tfiar, __builtin_set_texasr,
         __builtin_set_texasru, __builtin_set_tfhar, and __builtin_set_tfiar
*************** New Targets and Target Specific Improvem
*** 679,685 ****
         [106]announcement
       * New ISA extension support for zba, zbb, zbc, zbs was added.
       * New ISA extension support for vector and scalar crypto was added,
!        only support architecture testing marco and -march= parsing.
       * The option -mtune=thead-c906 is added to tune for T-HEAD c906
         cores.
       * libstdc++ no longer attempts to detect built-in atomics.
--- 679,685 ----
         [106]announcement
       * New ISA extension support for zba, zbb, zbc, zbs was added.
       * New ISA extension support for vector and scalar crypto was added,
!        only support architecture testing macro and -march= parsing.
       * The option -mtune=thead-c906 is added to tune for T-HEAD c906
         cores.
       * libstdc++ no longer attempts to detect built-in atomics.
*************** GCC 12.3
*** 824,830 ****
    x86-64
  
       * GCC now supports AMD CPUs based on the znver4 core via
!        -march=znver4. The switch makes GCC consider using 512 bit vectors
         when auto-vectorizing.
  
     This is the [141]list of problem reports (PRs) from GCC's bug tracking
--- 824,830 ----
    x86-64
  
       * GCC now supports AMD CPUs based on the znver4 core via
!        -march=znver4. The switch makes GCC consider using 512-bit vectors
         when auto-vectorizing.
  
     This is the [141]list of problem reports (PRs) from GCC's bug tracking
*************** GCC 12.3
*** 834,842 ****
  
  GCC 12.4
  
-    Note: GCC 12.4 has not been released yet, so this section is a
-    work-in-progress.
- 
     This is the [142]list of problem reports (PRs) from GCC's bug tracking
     system that are known to be fixed in the 12.4 release. This list might
     not be complete (that is, it is possible that some PRs that have been
--- 834,839 ----
*************** GCC 12.4
*** 855,878 ****
     provided this notice is preserved.
  
     These pages are [148]maintained by the GCC team. Last modified
!    2023-05-08.
  
  References
  
!    1. http://gcc.gnu.org/gcc-12/porting_to.html
!    2. http://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/PR102024
     4. https://gcc.gnu.org/PR42217
!    5. http://gcc.gnu.org/gcc-12/changes.html#mips_zero_width_fields
     6. https://gcc.gnu.org/install/specific.html
     7. https://clang.llvm.org/docs/ShadowCallStack.html
     8. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Instrumentation-Options.html#index-fsanitize_003dshadow-call-stack
     9. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/libgomp/OpenMP-Implementation-Status.html
    10. https://www.openacc.org/
!   11. https://gcc.gnu.org/wiki/OpenACC/Implementation%20Status#status-12
    12. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/libgomp/Enabling-OpenACC.html
!   13. http://gcc.gnu.org/gcc-12/changes.html#amdgcn
!   14. http://gcc.gnu.org/gcc-12/changes.html#nvptx
    15. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Optimize-Options.html#index-param
    16. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Warning-Options.html#index-Wopenacc-parallelism
    17. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/C-Dialect-Options.html#index-foffload-options
--- 852,875 ----
     provided this notice is preserved.
  
     These pages are [148]maintained by the GCC team. Last modified
!    2024-06-20.
  
  References
  
!    1. https://gcc.gnu.org/gcc-12/porting_to.html
!    2. https://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/PR102024
     4. https://gcc.gnu.org/PR42217
!    5. https://gcc.gnu.org/gcc-12/changes.html#mips_zero_width_fields
     6. https://gcc.gnu.org/install/specific.html
     7. https://clang.llvm.org/docs/ShadowCallStack.html
     8. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Instrumentation-Options.html#index-fsanitize_003dshadow-call-stack
     9. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/libgomp/OpenMP-Implementation-Status.html
    10. https://www.openacc.org/
!   11. https://gcc.gnu.org/wiki/OpenACC/Implementation Status#status-12
    12. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/libgomp/Enabling-OpenACC.html
!   13. https://gcc.gnu.org/gcc-12/changes.html#amdgcn
!   14. https://gcc.gnu.org/gcc-12/changes.html#nvptx
    15. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Optimize-Options.html#index-param
    16. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Warning-Options.html#index-Wopenacc-parallelism
    17. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/C-Dialect-Options.html#index-foffload-options
*************** References
*** 962,968 ****
   101. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/jit/topics/expressions.html#c.gcc_jit_context_new_cast
   102. https://gcc.gnu.org/PR95498
   103. https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-developments-2020
!  104. https://gcc.gnu.org/bugzilla/
   105. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Named-Address-Spaces.html#PRU-Named-Address-Spaces
   106. https://groups.google.com/a/groups.riscv.org/g/sw-dev/c/aE1ZeHHCYf4
   107. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Static-Analyzer-Options.html#index-Wanalyzer-use-of-uninitialized-value
--- 959,965 ----
   101. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/jit/topics/expressions.html#c.gcc_jit_context_new_cast
   102. https://gcc.gnu.org/PR95498
   103. https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-developments-2020
!  104. https://gcc.gnu.org/bugs/
   105. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Named-Address-Spaces.html#PRU-Named-Address-Spaces
   106. https://groups.google.com/a/groups.riscv.org/g/sw-dev/c/aE1ZeHHCYf4
   107. https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Static-Analyzer-Options.html#index-Wanalyzer-use-of-uninitialized-value
*************** References
*** 1009,1034 ****
   148. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-11/index.html
- 
                               GCC 11 Release Series
  
!    April 21, 2022
  
!    The GCC developers are pleased to announce the release of GCC 11.3.
  
     This release is a bug-fix release, containing fixes for regressions in
!    GCC 11.2 relative to previous releases of GCC.
  
  Release History
  
     GCC 11.3
!           April 21, 2022 ([1]changes, [2]documentation)
  
     GCC 11.2
!           July 28, 2021 ([3]changes, [4]documentation)
  
     GCC 11.1
!           April 27, 2021 ([5]changes, [6]documentation)
  
  References and Acknowledgements
  
--- 1006,1033 ----
   148. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-11/index.html
                               GCC 11 Release Series
  
!    May 29, 2023
  
!    The GCC developers are pleased to announce the release of GCC 11.4.
  
     This release is a bug-fix release, containing fixes for regressions in
!    GCC 11.3 relative to previous releases of GCC.
  
  Release History
  
+    GCC 11.4
+           May 29, 2023 ([1]changes, [2]documentation)
+ 
     GCC 11.3
!           April 21, 2022 ([3]changes, [4]documentation)
  
     GCC 11.2
!           July 28, 2021 ([5]changes, [6]documentation)
  
     GCC 11.1
!           April 27, 2021 ([7]changes, [8]documentation)
  
  References and Acknowledgements
  
*************** References and Acknowledgements
*** 1036,1093 ****
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
-    A list of [7]successful builds is updated as new information becomes
-    available.
- 
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [8]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [9]GCC project
!    web site or contact the [10]GCC development mailing list.
  
!    To obtain GCC please use [11]our mirror sites or [12]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [13]GCC manuals. If that fails, the
!     [14]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [15]gcc@gcc.gnu.org. All of [16]our lists have public
      archives.
  
!    Copyright (C) [17]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [18]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
!    1. http://gcc.gnu.org/gcc-11/changes.html
!    2. http://gcc.gnu.org/onlinedocs/11.3.0/
!    3. http://gcc.gnu.org/gcc-11/changes.html
!    4. http://gcc.gnu.org/onlinedocs/11.2.0/
!    5. http://gcc.gnu.org/gcc-11/changes.html
!    6. http://gcc.gnu.org/onlinedocs/11.1.0/
!    7. http://gcc.gnu.org/gcc-11/buildstat.html
!    8. http://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Contributors.html
!    9. http://gcc.gnu.org/index.html
!   10. mailto:gcc@gcc.gnu.org
!   11. http://gcc.gnu.org/mirrors.html
!   12. http://gcc.gnu.org/git.html
!   13. https://gcc.gnu.org/onlinedocs/
!   14. mailto:gcc-help@gcc.gnu.org
!   15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/lists.html
!   17. https://www.fsf.org/
!   18. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-11/changes.html
- 
                               GCC 11 Release Series
                          Changes, New Features, and Fixes
  
--- 1035,1089 ----
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [9]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [10]GCC
!    project web site or contact the [11]GCC development mailing list.
  
!    To obtain GCC please use [12]our mirror sites or [13]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [14]GCC manuals. If that fails, the
!     [15]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [16]gcc@gcc.gnu.org. All of [17]our lists have public
      archives.
  
!    Copyright (C) [18]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [19]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
!    1. https://gcc.gnu.org/gcc-11/changes.html
!    2. https://gcc.gnu.org/onlinedocs/11.4.0/
!    3. https://gcc.gnu.org/gcc-11/changes.html
!    4. https://gcc.gnu.org/onlinedocs/11.3.0/
!    5. https://gcc.gnu.org/gcc-11/changes.html
!    6. https://gcc.gnu.org/onlinedocs/11.2.0/
!    7. https://gcc.gnu.org/gcc-11/changes.html
!    8. https://gcc.gnu.org/onlinedocs/11.1.0/
!    9. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Contributors.html
!   10. https://gcc.gnu.org/index.html
!   11. mailto:gcc@gcc.gnu.org
!   12. https://gcc.gnu.org/mirrors.html
!   13. https://gcc.gnu.org/git.html
!   14. https://gcc.gnu.org/onlinedocs/
!   15. mailto:gcc-help@gcc.gnu.org
!   16. mailto:gcc@gcc.gnu.org
!   17. https://gcc.gnu.org/lists.html
!   18. https://www.fsf.org/
!   19. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-11/changes.html
                               GCC 11 Release Series
                          Changes, New Features, and Fixes
  
*************** General Improvements
*** 1140,1149 ****
              and
            + multicolumn characters (requiring more than one column to
              display in a monospace font)
!        For example, the character p ("GREEK SMALL LETTER PI (U+03C0)")
         occupies one column, and its UTF-8 encoding requires two bytes; the
!        character 🙂 ("SLIGHTLY SMILING FACE (U+1F642)") occupies
!        two columns, and its UTF-8 encoding requires four bytes.
         In GCC 11 the column numbers default to being column numbers,
         respecting multi-column characters. The old behavior can be
         restored using a new option [7]-fdiagnostics-column-unit=byte.
--- 1136,1145 ----
              and
            + multicolumn characters (requiring more than one column to
              display in a monospace font)
!        For example, the character π ("GREEK SMALL LETTER PI (U+03C0)")
         occupies one column, and its UTF-8 encoding requires two bytes; the
!        character 🙂 ("SLIGHTLY SMILING FACE (U+1F642)") occupies two
!        columns, and its UTF-8 encoding requires four bytes.
         In GCC 11 the column numbers default to being column numbers,
         respecting multi-column characters. The old behavior can be
         restored using a new option [7]-fdiagnostics-column-unit=byte.
*************** New Languages and Language specific impr
*** 1454,1460 ****
              core.stdc.config module.
            + User-defined attributes can now be used to annotate enum
              members, alias declarations, and function parameters.
!           + Templates alias parameters can now be instantiated with basic
              types such as int or void function().
            + The mixin construct can now be used as types in the form
              mixin(string) var.
--- 1450,1456 ----
              core.stdc.config module.
            + User-defined attributes can now be used to annotate enum
              members, alias declarations, and function parameters.
!           + Template alias parameters can now be instantiated with basic
              types such as int or void function().
            + The mixin construct can now be used as types in the form
              mixin(string) var.
*************** New Targets and Target Specific Improvem
*** 1575,1581 ****
    AArch64 & arm
  
       * A number of new CPUs are supported through arguments to the -mcpu
!        and -mtune options in both the arm and aarch64 backends (GCC
         identifiers in parentheses):
            + Arm Cortex-A78 (cortex-a78).
            + Arm Cortex-A78AE (cortex-a78ae).
--- 1571,1577 ----
    AArch64 & arm
  
       * A number of new CPUs are supported through arguments to the -mcpu
!        and -mtune options in both the arm and aarch64 back ends (GCC
         identifiers in parentheses):
            + Arm Cortex-A78 (cortex-a78).
            + Arm Cortex-A78AE (cortex-a78ae).
*************** Operating Systems
*** 1718,1725 ****
  
    AIX
  
!      * GCC for AIX can be built as a 64 bit application and the runtime is
!        built as FAT libraries containing both 32 bit and 64 bit objects.
       * Support AIX Vector Extended ABI with -mabi=vec-extabi.
       * Thread-Local uninitiated data placed in local common section.
       * Use thread-safe access in ctype.
--- 1714,1721 ----
  
    AIX
  
!      * GCC for AIX can be built as a 64-bit application and the runtime is
!        built as FAT libraries containing both 32-bit and 64-bit objects.
       * Support AIX Vector Extended ABI with -mabi=vec-extabi.
       * Thread-Local uninitiated data placed in local common section.
       * Use thread-safe access in ctype.
*************** GCC 11.3
*** 1786,1791 ****
--- 1782,1794 ----
     not be complete (that is, it is possible that some PRs that have been
     fixed are not listed here).
  
+ GCC 11.4
+ 
+    This is the [70]list of problem reports (PRs) from GCC's bug tracking
+    system that are known to be fixed in the 11.4 release. This list might
+    not be complete (that is, it is possible that some PRs that have been
+    fixed are not listed here).
+ 
    Target Specific Changes
  
      x86-64
*************** GCC 11.3
*** 1802,1824 ****
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [70]GCC manuals. If that fails, the
!     [71]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [72]gcc@gcc.gnu.org. All of [73]our lists have public
      archives.
  
!    Copyright (C) [74]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [75]maintained by the GCC team. Last modified
!    2023-02-02.
  
  References
  
!    1. http://gcc.gnu.org/gcc-11/porting_to.html
!    2. http://gcc.gnu.org/onlinedocs/index.html#current
     3. https://wg21.link/p0522r0
     4. https://gcc.gnu.org/pipermail/gcc-patches/2020-May/546494.html
     5. https://github.com/google/sanitizers/wiki/ThreadSanitizerCppManual
--- 1805,1827 ----
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [71]GCC manuals. If that fails, the
!     [72]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [73]gcc@gcc.gnu.org. All of [74]our lists have public
      archives.
  
!    Copyright (C) [75]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [76]maintained by the GCC team. Last modified
!    2024-06-14.
  
  References
  
!    1. https://gcc.gnu.org/gcc-11/porting_to.html
!    2. https://gcc.gnu.org/onlinedocs/index.html#current
     3. https://wg21.link/p0522r0
     4. https://gcc.gnu.org/pipermail/gcc-patches/2020-May/546494.html
     5. https://github.com/google/sanitizers/wiki/ThreadSanitizerCppManual
*************** References
*** 1837,1843 ****
    18. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Optimize-Options.html#index-fprofile-values
    19. https://www.openmp.org/specifications/
    20. https://www.openacc.org/
!   21. https://gcc.gnu.org/wiki/OpenACC/Implementation%20Status#status-11
    22. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/libgomp/Enabling-OpenACC.html
    23. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Common-Function-Attributes.html#index-no_005fstack_005fprotector-function-attribute
    24. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Common-Function-Attributes.html#index-malloc-function-attribute
--- 1840,1846 ----
    18. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Optimize-Options.html#index-fprofile-values
    19. https://www.openmp.org/specifications/
    20. https://www.openacc.org/
!   21. https://gcc.gnu.org/wiki/OpenACC/Implementation Status#status-11
    22. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/libgomp/Enabling-OpenACC.html
    23. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Common-Function-Attributes.html#index-no_005fstack_005fprotector-function-attribute
    24. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Common-Function-Attributes.html#index-malloc-function-attribute
*************** References
*** 1853,1860 ****
    34. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Wuninitialized
    35. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Warray-parameter
    36. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Wvla-parameter
!   37. http://gcc.gnu.org/projects/cxx-status.html#cxx20
!   38. http://gcc.gnu.org/projects/cxx-status.html#cxx23
    39. https://gcc.gnu.org/PR41437
    40. https://gcc.gnu.org/PR95307
    41. https://gcc.gnu.org/PR97518
--- 1856,1863 ----
    34. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Wuninitialized
    35. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Warray-parameter
    36. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Wvla-parameter
!   37. https://gcc.gnu.org/projects/cxx-status.html#cxx20
!   38. https://gcc.gnu.org/projects/cxx-status.html#cxx23
    39. https://gcc.gnu.org/PR41437
    40. https://gcc.gnu.org/PR95307
    41. https://gcc.gnu.org/PR97518
*************** References
*** 1865,1871 ****
    46. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wmismatched-new-delete
    47. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wvexing-parse
    48. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Wnonnull
!   49. http://gcc.gnu.org/gcc-5/changes.html#jit
    50. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/jit/topics/compatibility.html
    51. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/jit/topics/expressions.html#c.gcc_jit_global_set_initializer
    52. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/jit/topics/asm.html
--- 1868,1874 ----
    46. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wmismatched-new-delete
    47. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wvexing-parse
    48. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Warning-Options.html#index-Wnonnull
!   49. https://gcc.gnu.org/gcc-5/changes.html#jit
    50. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/jit/topics/compatibility.html
    51. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/jit/topics/expressions.html#c.gcc_jit_global_set_initializer
    52. https://gcc.gnu.org/onlinedocs/gcc-11.1.0/jit/topics/asm.html
*************** References
*** 1886,1923 ****
    67. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=11.0
    68. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=11.2
    69. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=11.3
!   70. https://gcc.gnu.org/onlinedocs/
!   71. mailto:gcc-help@gcc.gnu.org
!   72. mailto:gcc@gcc.gnu.org
!   73. https://gcc.gnu.org/lists.html
!   74. https://www.fsf.org/
!   75. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-10/index.html
- 
                               GCC 10 Release Series
  
!    June 28, 2022
  
     The [1]GNU project and the GCC developers are pleased to announce the
!    release of GCC 10.4.
  
     This release is a bug-fix release, containing fixes for regressions in
!    GCC 10.3 relative to previous releases of GCC.
  
  Release History
  
     GCC 10.4
!           June 28, 2022 ([2]changes, [3]documentation)
  
     GCC 10.3
!           April 8, 2021 ([4]changes, [5]documentation)
  
     GCC 10.2
!           July 23, 2020 ([6]changes, [7]documentation)
  
     GCC 10.1
!           May 7, 2020 ([8]changes, [9]documentation)
  
  References and Acknowledgements
  
--- 1889,1931 ----
    67. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=11.0
    68. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=11.2
    69. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=11.3
!   70. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=11.4
!   71. https://gcc.gnu.org/onlinedocs/
!   72. mailto:gcc-help@gcc.gnu.org
!   73. mailto:gcc@gcc.gnu.org
!   74. https://gcc.gnu.org/lists.html
!   75. https://www.fsf.org/
!   76. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-10/index.html
                               GCC 10 Release Series
  
!    (This release series is no longer supported.)
! 
!    July, 7, 2023
  
     The [1]GNU project and the GCC developers are pleased to announce the
!    release of GCC 10.5.
  
     This release is a bug-fix release, containing fixes for regressions in
!    GCC 10.4 relative to previous releases of GCC.
  
  Release History
  
+    GCC 10.5
+           July 7, 2023 ([2]changes, [3]documentation)
+ 
     GCC 10.4
!           June 28, 2022 ([4]changes, [5]documentation)
  
     GCC 10.3
!           April 8, 2021 ([6]changes, [7]documentation)
  
     GCC 10.2
!           July 23, 2020 ([8]changes, [9]documentation)
  
     GCC 10.1
!           May 7, 2020 ([10]changes, [11]documentation)
  
  References and Acknowledgements
  
*************** References and Acknowledgements
*** 1925,1985 ****
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
-    A list of [10]successful builds is updated as new information becomes
-    available.
- 
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [11]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [12]GCC
!    project web site or contact the [13]GCC development mailing list.
  
!    To obtain GCC please use [14]our mirror sites or [15]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [16]GCC manuals. If that fails, the
!     [17]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [18]gcc@gcc.gnu.org. All of [19]our lists have public
      archives.
  
!    Copyright (C) [20]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [21]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-10/changes.html
!    3. http://gcc.gnu.org/onlinedocs/10.4.0/
!    4. http://gcc.gnu.org/gcc-10/changes.html
!    5. http://gcc.gnu.org/onlinedocs/10.3.0/
!    6. http://gcc.gnu.org/gcc-10/changes.html
!    7. http://gcc.gnu.org/onlinedocs/10.2.0/
!    8. http://gcc.gnu.org/gcc-10/changes.html
!    9. http://gcc.gnu.org/onlinedocs/10.1.0/
!   10. http://gcc.gnu.org/gcc-10/buildstat.html
!   11. http://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Contributors.html
!   12. http://gcc.gnu.org/index.html
!   13. mailto:gcc@gcc.gnu.org
!   14. http://gcc.gnu.org/mirrors.html
!   15. http://gcc.gnu.org/git.html
!   16. https://gcc.gnu.org/onlinedocs/
!   17. mailto:gcc-help@gcc.gnu.org
!   18. mailto:gcc@gcc.gnu.org
!   19. https://gcc.gnu.org/lists.html
!   20. https://www.fsf.org/
!   21. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-10/changes.html
- 
                               GCC 10 Release Series
                          Changes, New Features, and Fixes
  
--- 1933,1990 ----
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [12]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [13]GCC
!    project web site or contact the [14]GCC development mailing list.
  
!    To obtain GCC please use [15]our mirror sites or [16]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [17]GCC manuals. If that fails, the
!     [18]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [19]gcc@gcc.gnu.org. All of [20]our lists have public
      archives.
  
!    Copyright (C) [21]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [22]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-10/changes.html
!    3. https://gcc.gnu.org/onlinedocs/10.5.0/
!    4. https://gcc.gnu.org/gcc-10/changes.html
!    5. https://gcc.gnu.org/onlinedocs/10.4.0/
!    6. https://gcc.gnu.org/gcc-10/changes.html
!    7. https://gcc.gnu.org/onlinedocs/10.3.0/
!    8. https://gcc.gnu.org/gcc-10/changes.html
!    9. https://gcc.gnu.org/onlinedocs/10.2.0/
!   10. https://gcc.gnu.org/gcc-10/changes.html
!   11. https://gcc.gnu.org/onlinedocs/10.1.0/
!   12. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Contributors.html
!   13. https://gcc.gnu.org/index.html
!   14. mailto:gcc@gcc.gnu.org
!   15. https://gcc.gnu.org/mirrors.html
!   16. https://gcc.gnu.org/git.html
!   17. https://gcc.gnu.org/onlinedocs/
!   18. mailto:gcc-help@gcc.gnu.org
!   19. mailto:gcc@gcc.gnu.org
!   20. https://gcc.gnu.org/lists.html
!   21. https://www.fsf.org/
!   22. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-10/changes.html
                               GCC 10 Release Series
                          Changes, New Features, and Fixes
  
*************** New Languages and Language-Specific Impr
*** 2147,2155 ****
         the input encoding (UTF-8, by default), in addition to the UCN
         syntax (\uNNNN or \UNNNNNNNN) that is already supported:
  
! static const int p = 3;
! int get_naïve_pi() {
!   return p;
  }
  
    C
--- 2152,2160 ----
         the input encoding (UTF-8, by default), in addition to the UCN
         syntax (\uNNNN or \UNNNNNNNN) that is already supported:
  
! static const int π = 3;
! int get_naïve_pi() {
!   return π;
  }
  
    C
*************** typedef svbool_t pred512 __attribute__((
*** 2429,2435 ****
              one. Previously it would always use SVE if possible.
            + If a vector loop uses Advanced SIMD rather than SVE, the
              vectorizer now considers using SVE to vectorize the left-over
!             elements (the "scalar tail" or "epilog").
            + Besides these specific points, there have been many general
              improvements to the way that the vectorizer uses SVE.
       * The -mbranch-protection=pac-ret option now accepts the optional
--- 2434,2440 ----
              one. Previously it would always use SVE if possible.
            + If a vector loop uses Advanced SIMD rather than SVE, the
              vectorizer now considers using SVE to vectorize the left-over
!             elements (the “scalar tail†or “epilogâ€).
            + Besides these specific points, there have been many general
              improvements to the way that the vectorizer uses SVE.
       * The -mbranch-protection=pac-ret option now accepts the optional
*************** GCC 10.4
*** 2718,2745 ****
         MMX no longer changes how they are passed nor returned. This ABI
         change is now diagnosed with -Wpsabi.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [61]GCC manuals. If that fails, the
!     [62]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [63]gcc@gcc.gnu.org. All of [64]our lists have public
      archives.
  
!    Copyright (C) [65]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [66]maintained by the GCC team. Last modified
!    2023-03-11.
  
  References
  
!    1. http://gcc.gnu.org/gcc-10/porting_to.html
!    2. http://gcc.gnu.org/onlinedocs/index.html#current
!    3. http://gcc.gnu.org/gcc-10/changes.html#empty_base
     4. https://www.mpfr.org/
!    5. http://gcc.gnu.org/gcc-10/changes.html#iterator_base
     6. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/cpp/_005f_005fhas_005fbuiltin.html#g_t_005f_005fhas_005fbuiltin
     7. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fno-allocation-dce
     8. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fprofile-partial-training
--- 2723,2757 ----
         MMX no longer changes how they are passed nor returned. This ABI
         change is now diagnosed with -Wpsabi.
  
+ GCC 10.5
+ 
+    This is the [61]list of problem reports (PRs) from GCC's bug tracking
+    system that are known to be fixed in the 10.5 release. This list might
+    not be complete (that is, it is possible that some PRs that have been
+    fixed are not listed here).
+ 
  
      For questions related to the use of GCC, please consult these web
!     pages and the [62]GCC manuals. If that fails, the
!     [63]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [64]gcc@gcc.gnu.org. All of [65]our lists have public
      archives.
  
!    Copyright (C) [66]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [67]maintained by the GCC team. Last modified
!    2023-07-07.
  
  References
  
!    1. https://gcc.gnu.org/gcc-10/porting_to.html
!    2. https://gcc.gnu.org/onlinedocs/index.html#current
!    3. https://gcc.gnu.org/gcc-10/changes.html#empty_base
     4. https://www.mpfr.org/
!    5. https://gcc.gnu.org/gcc-10/changes.html#iterator_base
     6. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/cpp/_005f_005fhas_005fbuiltin.html#g_t_005f_005fhas_005fbuiltin
     7. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fno-allocation-dce
     8. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fprofile-partial-training
*************** References
*** 2752,2758 ****
    15. https://facebook.github.io/zstd/
    16. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fprofile-values
    17. https://www.openacc.org/
!   18. https://gcc.gnu.org/wiki/OpenACC/Implementation%20Status#status-10
    19. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/libgomp/#toc-Enabling-OpenACC-1
    20. https://www.openmp.org/specifications/
    21. https://gcc.gnu.org/wiki/Offloading
--- 2764,2770 ----
    15. https://facebook.github.io/zstd/
    16. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Optimize-Options.html#index-fprofile-values
    17. https://www.openacc.org/
!   18. https://gcc.gnu.org/wiki/OpenACC/Implementation Status#status-10
    19. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/libgomp/#toc-Enabling-OpenACC-1
    20. https://www.openmp.org/specifications/
    21. https://gcc.gnu.org/wiki/Offloading
*************** References
*** 2778,2784 ****
    41. https://gcc.gnu.org/onlinedocs/jit/topics/compatibility.html#c.gcc_jit_version_patchlevel
    42. https://gcc.gnu.org/onlinedocs/jit/topics/types.html#c.gcc_jit_context_new_bitfield
    43. https://developer.arm.com/documentation/101028/0009/Data-processing-intrinsics
!   44. https://developer.arm.com/Architectures/M-Profile%20Architecture
    45. https://developer.arm.com/architectures/instruction-sets/intrinsics/
    46. https://developer.arm.com/documentation/101028/0010/Custom-Datapath-Extension
    47. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/AVR-Options.html#index-nodevicespecs
--- 2790,2796 ----
    41. https://gcc.gnu.org/onlinedocs/jit/topics/compatibility.html#c.gcc_jit_version_patchlevel
    42. https://gcc.gnu.org/onlinedocs/jit/topics/types.html#c.gcc_jit_context_new_bitfield
    43. https://developer.arm.com/documentation/101028/0009/Data-processing-intrinsics
!   44. https://developer.arm.com/Architectures/M-Profile Architecture
    45. https://developer.arm.com/architectures/instruction-sets/intrinsics/
    46. https://developer.arm.com/documentation/101028/0010/Custom-Datapath-Extension
    47. https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/AVR-Options.html#index-nodevicespecs
*************** References
*** 2795,2809 ****
    58. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.2
    59. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.3
    60. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.4
!   61. https://gcc.gnu.org/onlinedocs/
!   62. mailto:gcc-help@gcc.gnu.org
!   63. mailto:gcc@gcc.gnu.org
!   64. https://gcc.gnu.org/lists.html
!   65. https://www.fsf.org/
!   66. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-9/index.html
- 
                                GCC 9 Release Series
  
     (This release series is no longer supported.)
--- 2807,2821 ----
    58. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.2
    59. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.3
    60. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.4
!   61. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.5
!   62. https://gcc.gnu.org/onlinedocs/
!   63. mailto:gcc-help@gcc.gnu.org
!   64. mailto:gcc@gcc.gnu.org
!   65. https://gcc.gnu.org/lists.html
!   66. https://www.fsf.org/
!   67. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-9/index.html
                                GCC 9 Release Series
  
     (This release series is no longer supported.)
*************** References and Acknowledgements
*** 2839,2901 ****
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
-    A list of [12]successful builds is updated as new information becomes
-    available.
- 
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [13]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [14]GCC
!    project web site or contact the [15]GCC development mailing list.
  
!    To obtain GCC please use [16]our mirror sites or [17]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [18]GCC manuals. If that fails, the
!     [19]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [20]gcc@gcc.gnu.org. All of [21]our lists have public
      archives.
  
!    Copyright (C) [22]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [23]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-9/changes.html
!    3. http://gcc.gnu.org/onlinedocs/9.5.0/
!    4. http://gcc.gnu.org/gcc-9/changes.html
!    5. http://gcc.gnu.org/onlinedocs/9.4.0/
!    6. http://gcc.gnu.org/gcc-9/changes.html
!    7. http://gcc.gnu.org/onlinedocs/9.3.0/
!    8. http://gcc.gnu.org/gcc-9/changes.html
!    9. http://gcc.gnu.org/onlinedocs/9.2.0/
!   10. http://gcc.gnu.org/gcc-9/changes.html
!   11. http://gcc.gnu.org/onlinedocs/9.1.0/
!   12. http://gcc.gnu.org/gcc-9/buildstat.html
!   13. http://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
!   15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
!   18. https://gcc.gnu.org/onlinedocs/
!   19. mailto:gcc-help@gcc.gnu.org
!   20. mailto:gcc@gcc.gnu.org
!   21. https://gcc.gnu.org/lists.html
!   22. https://www.fsf.org/
!   23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-9/changes.html
- 
                                GCC 9 Release Series
                          Changes, New Features, and Fixes
  
--- 2851,2908 ----
     supports several other languages aside from C, it now stands for the
     GNU Compiler Collection.
  
     The GCC developers would like to thank the numerous people that have
     contributed new features, improvements, bug fixes, and other changes as
!    well as test results to GCC. This [12]amazing group of volunteers is
     what makes GCC successful.
  
!    For additional information about GCC please refer to the [13]GCC
!    project web site or contact the [14]GCC development mailing list.
  
!    To obtain GCC please use [15]our mirror sites or [16]our version
     control system.
  
  
      For questions related to the use of GCC, please consult these web
!     pages and the [17]GCC manuals. If that fails, the
!     [18]gcc-help@gcc.gnu.org mailing list might help. Comments on these
      web pages and the development of GCC are welcome on our developer
!     list at [19]gcc@gcc.gnu.org. All of [20]our lists have public
      archives.
  
!    Copyright (C) [21]Free Software Foundation, Inc. Verbatim copying and
     distribution of this entire article is permitted in any medium,
     provided this notice is preserved.
  
!    These pages are [22]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-9/changes.html
!    3. https://gcc.gnu.org/onlinedocs/9.5.0/
!    4. https://gcc.gnu.org/gcc-9/changes.html
!    5. https://gcc.gnu.org/onlinedocs/9.4.0/
!    6. https://gcc.gnu.org/gcc-9/changes.html
!    7. https://gcc.gnu.org/onlinedocs/9.3.0/
!    8. https://gcc.gnu.org/gcc-9/changes.html
!    9. https://gcc.gnu.org/onlinedocs/9.2.0/
!   10. https://gcc.gnu.org/gcc-9/changes.html
!   11. https://gcc.gnu.org/onlinedocs/9.1.0/
!   12. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Contributors.html
!   13. https://gcc.gnu.org/index.html
!   14. mailto:gcc@gcc.gnu.org
!   15. https://gcc.gnu.org/mirrors.html
!   16. https://gcc.gnu.org/git.html
!   17. https://gcc.gnu.org/onlinedocs/
!   18. mailto:gcc-help@gcc.gnu.org
!   19. mailto:gcc@gcc.gnu.org
!   20. https://gcc.gnu.org/lists.html
!   21. https://www.fsf.org/
!   22. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-9/changes.html
                                GCC 9 Release Series
                          Changes, New Features, and Fixes
  
*************** mory");
*** 3031,3037 ****
         chain, and profile information (if available).
       * Inter-procedural propagation of stack alignment can now be
         controlled by [22]-fipa-stack-alignment.
!      * Propagation of addressability, readonly and writeonly flags on
         static variables can now be controlled by
         [23]-fipa-reference-addressable.
  
--- 3038,3044 ----
         chain, and profile information (if available).
       * Inter-procedural propagation of stack alignment can now be
         controlled by [22]-fipa-stack-alignment.
!      * Propagation of addressability, readonly, and writeonly flags on
         static variables can now be controlled by
         [23]-fipa-reference-addressable.
  
*************** foo (int how)
*** 3070,3077 ****
         can be transformed into 100 * how + 5 (for values defined in the
         switch statement).
       * Inter-procedural optimization improvements:
!           + Inliner defaults was tuned to better suits modern C++
!             codebases especially when built with link time optimizations.
              New parameters max-inline-insns-small, max-inline-insns-size,
              uninlined-function-insns, uninlined-function-time,
              uninlined-thunk-insns, and uninlined-thunk-time were added.
--- 3077,3084 ----
         can be transformed into 100 * how + 5 (for values defined in the
         switch statement).
       * Inter-procedural optimization improvements:
!           + Inliner defaults were tuned to better suit modern C++
!             codebases, especially when built with link time-optimizations.
              New parameters max-inline-insns-small, max-inline-insns-size,
              uninlined-function-insns, uninlined-function-time,
              uninlined-thunk-insns, and uninlined-thunk-time were added.
*************** foo (int how)
*** 3082,3106 ****
            + [29]-fprofile-use now enables [30]-fversion-loops-for-strides,
              [31]-floop-interchange, [32]-floop-unroll-and-jam,
              [33]-ftree-loop-distribution.
!           + Streaming of counter histograms was removed. This reduces the
!             size of profile files. Histogram is computed on the fly with
!             link-time optimization. Parameter hot-bb-count-ws-permille was
!             reduced from 999 to 990 to account for more precise
!             histograms.
       * Link-time optimization improvements:
!           + Types are now simplified prior streaming resulting in
!             significant reductions of the LTO object files, link-time
!             memory use, and improvements of link-time parallelism.
!           + Default number of partitions (--param lto-partitions) was
              increased from 32 to 128 enabling effective use of CPUs with
              more than 32 hyperthreads. --param
!             lto-max-streaming-parallelism can now be used to control
              number of streaming processes.
            + Warnings on C++ One Decl Rule violations (-Wodr) are now more
              informative and produce fewer redundant results.
         Overall compile time of Firefox 66 and LibreOffice 6.2.3 on an
         8-core machine was reduced by about 5% compared to GCC 8.3, and the
!        size of LTO object files by 7%. LTO link-time improves by 11% on an
         8-core machine and scales significantly better for more parallel
         build environments. The serial stage of the link-time optimization
         is 28% faster consuming 20% less memory. The parallel stage now
--- 3089,3113 ----
            + [29]-fprofile-use now enables [30]-fversion-loops-for-strides,
              [31]-floop-interchange, [32]-floop-unroll-and-jam,
              [33]-ftree-loop-distribution.
!           + Streaming of counter histograms was removed, which reduces the
!             size of profile files. Histograms are computed on the fly with
!             link-time optimization.
!           + The parameter hot-bb-count-ws-permille was reduced from 999 to
!             990 to account for more precise histograms.
       * Link-time optimization improvements:
!           + Types are now simplified prior to streaming resulting in
!             significant reductions of LTO object file sizes and link-time
!             memory use as well as improvements of link-time parallelism.
!           + The default number of partitions (--param lto-partitions) was
              increased from 32 to 128 enabling effective use of CPUs with
              more than 32 hyperthreads. --param
!             lto-max-streaming-parallelism can now be used to control the
              number of streaming processes.
            + Warnings on C++ One Decl Rule violations (-Wodr) are now more
              informative and produce fewer redundant results.
         Overall compile time of Firefox 66 and LibreOffice 6.2.3 on an
         8-core machine was reduced by about 5% compared to GCC 8.3, and the
!        size of LTO object files by 7%. LTO link time improves by 11% on an
         8-core machine and scales significantly better for more parallel
         build environments. The serial stage of the link-time optimization
         is 28% faster consuming 20% less memory. The parallel stage now
*************** New Targets and Target Specific Improvem
*** 3582,3588 ****
         The produced code is compatible only with newer glibc versions,
         which provide the __fentry__ symbol and do not clobber r0 when
         resolving lazily bound functions. -mfentry is only supported when
!        generating 64 bit code and does not work with nested C functions.
       * The -mnop-mcount option can be used to emit NOP instructions
         instead of an mcount or fentry call stub.
       * With the -mrecord-mcount option a __mcount_loc section is generated
--- 3589,3595 ----
         The produced code is compatible only with newer glibc versions,
         which provide the __fentry__ symbol and do not clobber r0 when
         resolving lazily bound functions. -mfentry is only supported when
!        generating 64-bit code and does not work with nested C functions.
       * The -mnop-mcount option can be used to emit NOP instructions
         instead of an mcount or fentry call stub.
       * With the -mrecord-mcount option a __mcount_loc section is generated
*************** GCC 9.5
*** 3695,3706 ****
     provided this notice is preserved.
  
     These pages are [75]maintained by the GCC team. Last modified
!    2023-02-22.
  
  References
  
!    1. http://gcc.gnu.org/gcc-9/porting_to.html
!    2. http://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88469
     4. https://gcc.gnu.org/ml/gcc/2018-10/msg00139.html
     5. https://gcc.gnu.org/ml/gcc/2019-04/msg00023.html
--- 3702,3713 ----
     provided this notice is preserved.
  
     These pages are [75]maintained by the GCC team. Last modified
!    2024-05-09.
  
  References
  
!    1. https://gcc.gnu.org/gcc-9/porting_to.html
!    2. https://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88469
     4. https://gcc.gnu.org/ml/gcc/2018-10/msg00139.html
     5. https://gcc.gnu.org/ml/gcc/2019-04/msg00023.html
*************** References
*** 3734,3740 ****
    33. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Optimize-Options.html#index-ftree-loop-distribution
    34. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Invoking-Gcov.html#Invoking-Gcov
    35. https://www.openacc.org/
!   36. https://gcc.gnu.org/wiki/OpenACC/Implementation%20Status#status-9
    37. https://www.openmp.org/specifications/
    38. https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00628.html
    39. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Vector-Extensions.html#index-_005f_005fbuiltin_005fconvertvector
--- 3741,3747 ----
    33. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Optimize-Options.html#index-ftree-loop-distribution
    34. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Invoking-Gcov.html#Invoking-Gcov
    35. https://www.openacc.org/
!   36. https://gcc.gnu.org/wiki/OpenACC/Implementation Status#status-9
    37. https://www.openmp.org/specifications/
    38. https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00628.html
    39. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Vector-Extensions.html#index-_005f_005fbuiltin_005fconvertvector
*************** References
*** 3751,3757 ****
    50. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wredundant-move
    51. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wpessimizing-move
    52. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wclass-conversion
!   53. http://gcc.gnu.org/projects/cxx-status.html#cxx2a
    54. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Warning-Options.html#index-Wformat
    55. https://github.com/oneapi-src/oneTBB
    56. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gfortran/Fortran-Dialect-Options.html#index-fdec-include
--- 3758,3764 ----
    50. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wredundant-move
    51. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wpessimizing-move
    52. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/C_002b_002b-Dialect-Options.html#index-Wclass-conversion
!   53. https://gcc.gnu.org/projects/cxx-status.html#cxx2a
    54. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Warning-Options.html#index-Wformat
    55. https://github.com/oneapi-src/oneTBB
    56. https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gfortran/Fortran-Dialect-Options.html#index-fdec-include
*************** References
*** 3776,3782 ****
    75. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-8/index.html
- 
                                GCC 8 Release Series
  
     (This release series is no longer supported.)
--- 3783,3788 ----
*************** References and Acknowledgements
*** 3839,3865 ****
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-8/changes.html
!    3. http://gcc.gnu.org/onlinedocs/8.5.0/
!    4. http://gcc.gnu.org/gcc-8/changes.html
!    5. http://gcc.gnu.org/onlinedocs/8.4.0/
!    6. http://gcc.gnu.org/gcc-8/changes.html
!    7. http://gcc.gnu.org/onlinedocs/8.3.0/
!    8. http://gcc.gnu.org/gcc-8/changes.html
!    9. http://gcc.gnu.org/onlinedocs/8.2.0/
!   10. http://gcc.gnu.org/gcc-8/changes.html
!   11. http://gcc.gnu.org/onlinedocs/8.1.0/
!   12. http://gcc.gnu.org/gcc-8/buildstat.html
!   13. http://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
--- 3845,3871 ----
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-8/changes.html
!    3. https://gcc.gnu.org/onlinedocs/8.5.0/
!    4. https://gcc.gnu.org/gcc-8/changes.html
!    5. https://gcc.gnu.org/onlinedocs/8.4.0/
!    6. https://gcc.gnu.org/gcc-8/changes.html
!    7. https://gcc.gnu.org/onlinedocs/8.3.0/
!    8. https://gcc.gnu.org/gcc-8/changes.html
!    9. https://gcc.gnu.org/onlinedocs/8.2.0/
!   10. https://gcc.gnu.org/gcc-8/changes.html
!   11. https://gcc.gnu.org/onlinedocs/8.1.0/
!   12. https://gcc.gnu.org/gcc-8/buildstat.html
!   13. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Contributors.html
!   14. https://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/mirrors.html
!   17. https://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
*************** References
*** 3868,3874 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-8/changes.html
- 
                                GCC 8 Release Series
                          Changes, New Features, and Fixes
  
--- 3874,3879 ----
*************** void copy (const char *s)
*** 4153,4159 ****
  {
      char buf[80];
      strncpy (buf, s, sizeof buf);
!     ...
  }
  warning: 'strncpy' specified bound 80 equals destination size [-Wstringop-trunca
  tion]
--- 4158,4164 ----
  {
      char buf[80];
      strncpy (buf, s, sizeof buf);
!     …
  }
  warning: 'strncpy' specified bound 80 equals destination size [-Wstringop-trunca
  tion]
*************** void f (void)
*** 4226,4232 ****
  {
      char a[] = "abcd1234";
      strcpy (a, a + 4);
!     ...
  }
  warning: 'strcpy' accessing 5 bytes at offsets 0 and 4 overlaps 1 byte at offset
   4 [-Wrestrict]
--- 4231,4237 ----
  {
      char a[] = "abcd1234";
      strcpy (a, a + 4);
!     …
  }
  warning: 'strcpy' accessing 5 bytes at offsets 0 and 4 overlaps 1 byte at offset
   4 [-Wrestrict]
*************** GCC 8.5
*** 4952,4959 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-8/porting_to.html
!    2. http://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/ml/gcc/2018-04/msg00102.html
     4. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Warning-Options.html#index-Wmultistatement-macros
     5. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Warning-Options.html#index-Wstringop-truncation
--- 4957,4964 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-8/porting_to.html
!    2. https://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/ml/gcc/2018-04/msg00102.html
     4. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Warning-Options.html#index-Wmultistatement-macros
     5. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Warning-Options.html#index-Wstringop-truncation
*************** References
*** 4968,4974 ****
    14. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Warning-Options.html#index-Wformat-truncation
    15. https://gcc.gnu.org/PR86094
    16. https://gcc.gnu.org/onlinedocs/gcc/C_002b_002b-Dialect-Options.html#index-Wclass-memaccess
!   17. http://gcc.gnu.org/projects/cxx-status.html#cxx2a
    18. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/jit/topics/types.html#gcc_jit_type_get_vector
    19. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/jit/topics/expressions.html#gcc_jit_context_new_rvalue_from_vector
    20. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/jit/topics/types.html#gcc_jit_type_get_aligned
--- 4973,4979 ----
    14. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Warning-Options.html#index-Wformat-truncation
    15. https://gcc.gnu.org/PR86094
    16. https://gcc.gnu.org/onlinedocs/gcc/C_002b_002b-Dialect-Options.html#index-Wclass-memaccess
!   17. https://gcc.gnu.org/projects/cxx-status.html#cxx2a
    18. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/jit/topics/types.html#gcc_jit_type_get_vector
    19. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/jit/topics/expressions.html#gcc_jit_context_new_rvalue_from_vector
    20. https://gcc.gnu.org/onlinedocs/gcc-8.1.0/jit/topics/types.html#gcc_jit_type_get_aligned
*************** References
*** 4984,4990 ****
    30. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=8.0
    31. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=8.2
    32. https://gcc.gnu.org/PR86094
!   33. http://gcc.gnu.org/gcc-8/changes.html#cxx
    34. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84413
    35. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=8.3
    36. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87137
--- 4989,4995 ----
    30. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=8.0
    31. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=8.2
    32. https://gcc.gnu.org/PR86094
!   33. https://gcc.gnu.org/gcc-8/changes.html#cxx
    34. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84413
    35. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=8.3
    36. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87137
*************** References
*** 4998,5004 ****
    44. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-7/index.html
- 
                                GCC 7 Release Series
  
     (This release series is no longer supported.)
--- 5003,5008 ----
*************** References and Acknowledgements
*** 5061,5087 ****
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-7/changes.html
!    3. http://gcc.gnu.org/onlinedocs/7.5.0/
!    4. http://gcc.gnu.org/gcc-7/changes.html
!    5. http://gcc.gnu.org/onlinedocs/7.4.0/
!    6. http://gcc.gnu.org/gcc-7/changes.html
!    7. http://gcc.gnu.org/onlinedocs/7.3.0/
!    8. http://gcc.gnu.org/gcc-7/changes.html
!    9. http://gcc.gnu.org/onlinedocs/7.2.0/
!   10. http://gcc.gnu.org/gcc-7/changes.html
!   11. http://gcc.gnu.org/onlinedocs/7.1.0/
!   12. http://gcc.gnu.org/gcc-7/buildstat.html
!   13. http://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
--- 5065,5091 ----
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-7/changes.html
!    3. https://gcc.gnu.org/onlinedocs/7.5.0/
!    4. https://gcc.gnu.org/gcc-7/changes.html
!    5. https://gcc.gnu.org/onlinedocs/7.4.0/
!    6. https://gcc.gnu.org/gcc-7/changes.html
!    7. https://gcc.gnu.org/onlinedocs/7.3.0/
!    8. https://gcc.gnu.org/gcc-7/changes.html
!    9. https://gcc.gnu.org/onlinedocs/7.2.0/
!   10. https://gcc.gnu.org/gcc-7/changes.html
!   11. https://gcc.gnu.org/onlinedocs/7.1.0/
!   12. https://gcc.gnu.org/gcc-7/buildstat.html
!   13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. https://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/mirrors.html
!   17. https://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
*************** References
*** 5090,5096 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-7/changes.html
- 
                                GCC 7 Release Series
                          Changes, New Features, and Fixes
  
--- 5094,5099 ----
*************** void f (int n)
*** 5459,5465 ****
      d = alloca (n);
    else
      d = malloc (n);
!   ...
  }
  
  warning: argument to 'alloca may be too large due to conversion from 'int' to 'l
--- 5462,5468 ----
      d = alloca (n);
    else
      d = malloc (n);
!   …
  }
  
  warning: argument to 'alloca may be too large due to conversion from 'int' to 'l
*************** ong unsigned int' [-Walloca-larger-than=
*** 5472,5478 ****
  void f (size_t n)
  {
    char *d = alloca (n);
!   ...
  }
  
  warning: unbounded use of 'alloca' [-Walloca-larger-than=]
--- 5475,5481 ----
  void f (size_t n)
  {
    char *d = alloca (n);
!   …
  }
  
  warning: unbounded use of 'alloca' [-Walloca-larger-than=]
*************** void f (unsigned x)
*** 5520,5526 ****
  {
    char d[4];
    snprintf (d, sizeof d, "%#02x", x & 0xff);
!   ...
  }
  
  warning: 'snprintf' output may be truncated before the last format character [-W
--- 5523,5529 ----
  {
    char d[4];
    snprintf (d, sizeof d, "%#02x", x & 0xff);
!   …
  }
  
  warning: 'snprintf' output may be truncated before the last format character [-W
*************** void f (const char *fname)
*** 5548,5554 ****
    char d[8];
    strncpy (d, "/tmp/", sizeof d);
    strncat (d, fname, sizeof d);
!   ...
  }
  
  warning: specified bound 8 equals the size of the destination [-Wstringop-overfl
--- 5551,5557 ----
    char d[8];
    strncpy (d, "/tmp/", sizeof d);
    strncat (d, fname, sizeof d);
!   …
  }
  
  warning: specified bound 8 equals the size of the destination [-Wstringop-overfl
*************** test.cc:4:11: error: expected ';' after
*** 5686,5695 ****
            + std::as_const, std::not_fn,
              std::has_unique_object_representations, constexpr
              std::addressof.
!        Thanks to Daniel Krügler, Tim Shen, Edward Smith-Rowland, and Ville
         Voutilainen for work on the C++17 support.
       * A new power-of-two rehashing policy for use with the _Hashtable
!        internals, thanks to François Dumont.
  
    Fortran
  
--- 5689,5698 ----
            + std::as_const, std::not_fn,
              std::has_unique_object_representations, constexpr
              std::addressof.
!        Thanks to Daniel Krügler, Tim Shen, Edward Smith-Rowland, and Ville
         Voutilainen for work on the C++17 support.
       * A new power-of-two rehashing policy for use with the _Hashtable
!        internals, thanks to François Dumont.
  
    Fortran
  
*************** const int* get_address (unsigned idx)
*** 5859,5865 ****
  }
  
       * A new command-line option -Wmisspelled-isr has been added. It turns
!        off -- or turns into errors -- warnings that are reported for
         interrupt service routines (ISRs) which don't follow AVR-LibC's
         naming convention of prefixing ISR names with __vector.
       * __builtin_avr_nops(n) is a new [17]built-in function that inserts n
--- 5862,5868 ----
  }
  
       * A new command-line option -Wmisspelled-isr has been added. It turns
!        off — or turns into errors — warnings that are reported for
         interrupt service routines (ISRs) which don't follow AVR-LibC's
         naming convention of prefixing ISR names with __vector.
       * __builtin_avr_nops(n) is a new [17]built-in function that inserts n
*************** GCC 7.5
*** 6162,6169 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-7/porting_to.html
!    2. http://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/wiki/LRAIsDefault
     4. https://gcc.gnu.org/onlinedocs/gcc-7.1.0/libstdc++/manual/manual/profile_mode.html
     5. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
--- 6165,6172 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-7/porting_to.html
!    2. https://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/wiki/LRAIsDefault
     4. https://gcc.gnu.org/onlinedocs/gcc-7.1.0/libstdc++/manual/manual/profile_mode.html
     5. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
*************** References
*** 6197,6203 ****
    33. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-6/index.html
- 
                                GCC 6 Release Series
  
     (This release series is no longer supported.)
--- 6200,6205 ----
*************** References and Acknowledgements
*** 6260,6286 ****
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-6/changes.html
!    3. http://gcc.gnu.org/onlinedocs/6.5.0/
!    4. http://gcc.gnu.org/gcc-6/changes.html
!    5. http://gcc.gnu.org/onlinedocs/6.4.0/
!    6. http://gcc.gnu.org/gcc-6/changes.html
!    7. http://gcc.gnu.org/onlinedocs/6.3.0/
!    8. http://gcc.gnu.org/gcc-6/changes.html
!    9. http://gcc.gnu.org/onlinedocs/6.2.0/
!   10. http://gcc.gnu.org/gcc-6/changes.html
!   11. http://gcc.gnu.org/onlinedocs/6.1.0/
!   12. http://gcc.gnu.org/gcc-6/buildstat.html
!   13. http://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
--- 6262,6288 ----
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-6/changes.html
!    3. https://gcc.gnu.org/onlinedocs/6.5.0/
!    4. https://gcc.gnu.org/gcc-6/changes.html
!    5. https://gcc.gnu.org/onlinedocs/6.4.0/
!    6. https://gcc.gnu.org/gcc-6/changes.html
!    7. https://gcc.gnu.org/onlinedocs/6.3.0/
!    8. https://gcc.gnu.org/gcc-6/changes.html
!    9. https://gcc.gnu.org/onlinedocs/6.2.0/
!   10. https://gcc.gnu.org/gcc-6/changes.html
!   11. https://gcc.gnu.org/onlinedocs/6.1.0/
!   12. https://gcc.gnu.org/gcc-6/buildstat.html
!   13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. https://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/mirrors.html
!   17. https://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
*************** References
*** 6289,6295 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-6/changes.html
- 
                                GCC 6 Release Series
                          Changes, New Features, and Fixes
  
--- 6291,6296 ----
*************** Operating Systems
*** 7002,7009 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-6/porting_to.html
!    2. http://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/ml/gcc/2015-08/msg00101.html
     4. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71151
     5. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87822
--- 7003,7010 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-6/porting_to.html
!    2. https://gcc.gnu.org/onlinedocs/index.html#current
     3. https://gcc.gnu.org/ml/gcc/2015-08/msg00101.html
     4. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71151
     5. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87822
*************** References
*** 7036,7042 ****
    32. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-5/index.html
- 
                                GCC 5 Release Series
  
     (This release series is no longer supported.)
--- 7037,7042 ----
*************** References and Acknowledgements
*** 7099,7125 ****
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-5/changes.html
!    3. http://gcc.gnu.org/onlinedocs/5.5.0/
!    4. http://gcc.gnu.org/gcc-5/changes.html
!    5. http://gcc.gnu.org/onlinedocs/5.4.0/
!    6. http://gcc.gnu.org/gcc-5/changes.html
!    7. http://gcc.gnu.org/onlinedocs/5.3.0/
!    8. http://gcc.gnu.org/gcc-5/changes.html
!    9. http://gcc.gnu.org/onlinedocs/5.2.0/
!   10. http://gcc.gnu.org/gcc-5/changes.html
!   11. http://gcc.gnu.org/onlinedocs/5.1.0/
!   12. http://gcc.gnu.org/gcc-5/buildstat.html
!   13. http://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
--- 7099,7125 ----
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-5/changes.html
!    3. https://gcc.gnu.org/onlinedocs/5.5.0/
!    4. https://gcc.gnu.org/gcc-5/changes.html
!    5. https://gcc.gnu.org/onlinedocs/5.4.0/
!    6. https://gcc.gnu.org/gcc-5/changes.html
!    7. https://gcc.gnu.org/onlinedocs/5.3.0/
!    8. https://gcc.gnu.org/gcc-5/changes.html
!    9. https://gcc.gnu.org/onlinedocs/5.2.0/
!   10. https://gcc.gnu.org/gcc-5/changes.html
!   11. https://gcc.gnu.org/onlinedocs/5.1.0/
!   12. https://gcc.gnu.org/gcc-5/buildstat.html
!   13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. https://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/mirrors.html
!   17. https://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
*************** References
*** 7128,7134 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-5/changes.html
- 
                                GCC 5 Release Series
                          Changes, New Features, and Fixes
  
--- 7128,7133 ----
*************** New Targets and Target Specific Improvem
*** 7663,7669 ****
         Using -mcpu=cortex-a72 requires a version of GNU binutils that has
         support for the Cortex-A72.
       * The transitional options -mlra and -mno-lra have been removed. The
!        AArch64 backend now uses the local register allocator (LRA) only.
  
    ARM
  
--- 7662,7668 ----
         Using -mcpu=cortex-a72 requires a version of GNU binutils that has
         support for the Cortex-A72.
       * The transitional options -mlra and -mno-lra have been removed. The
!        AArch64 back end now uses the local register allocator (LRA) only.
  
    ARM
  
*************** New Targets and Target Specific Improvem
*** 7696,7702 ****
         -mtpcs-leaf-frame which are only applicable to the old ABI have
         been deprecated.
       * The transitional options -mlra and -mno-lra have been removed. The
!        ARM backend now uses the local register allocator (LRA) only.
  
    AVR
  
--- 7695,7701 ----
         -mtpcs-leaf-frame which are only applicable to the old ABI have
         been deprecated.
       * The transitional options -mlra and -mno-lra have been removed. The
!        ARM back end now uses the local register allocator (LRA) only.
  
    AVR
  
*************** Target Specific Changes
*** 8008,8033 ****
     provided this notice is preserved.
  
     These pages are [49]maintained by the GCC team. Last modified
!    2023-02-20.
  
  References
  
!    1. http://gcc.gnu.org/gcc-5/changes.html#libstdcxx
     2. https://gcc.gnu.org/onlinedocs/gcc/Spec-Files.html
     3. https://savannah.nongnu.org/bugs/?44574
!    4. https://gcc.gnu.org/wiki/Intel%20MPX%20support%20in%20the%20GCC%20compiler
     5. https://www.openmp.org/wp-content/uploads/OpenMP4.0.0.pdf
     6. https://www.openmp.org/wp-content/uploads/OpenMP4.0.0.Examples.pdf
     7. https://gcc.gnu.org/wiki/OpenACC
     8. https://gcc.gnu.org/install/configure.html
     9. https://isocpp.org/std/standing-documents/sd-6-sg10-feature-test-recommendations
!   10. http://gcc.gnu.org/projects/cxx1y.html
    11. https://isocpp.org/std/standing-documents/sd-6-sg10-feature-test-recommendations
!   12. http://gcc.gnu.org/projects/cxx1y.html
!   13. http://gcc.gnu.org/projects/cxx1y.html
!   14. http://gcc.gnu.org/projects/cxx1y.html
    15. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2013/n3639.html
!   16. http://gcc.gnu.org/onlinedocs/libstdc++/manual/using_dual_abi.html
    17. https://gcc.gnu.org/onlinedocs/gcc-5.1.0/libstdc++/manual/manual/status.html#status.iso.2011
    18. https://gcc.gnu.org/onlinedocs/gcc-5.1.0/libstdc++/manual/manual/status.html#status.iso.2014
    19. https://gcc.gnu.org/onlinedocs/gcc-5.1.0/libstdc++/manual/manual/status.html#status.iso.2014
--- 8007,8032 ----
     provided this notice is preserved.
  
     These pages are [49]maintained by the GCC team. Last modified
!    2024-06-08.
  
  References
  
!    1. https://gcc.gnu.org/gcc-5/changes.html#libstdcxx
     2. https://gcc.gnu.org/onlinedocs/gcc/Spec-Files.html
     3. https://savannah.nongnu.org/bugs/?44574
!    4. https://gcc.gnu.org/wiki/Intel MPX support in the GCC compiler
     5. https://www.openmp.org/wp-content/uploads/OpenMP4.0.0.pdf
     6. https://www.openmp.org/wp-content/uploads/OpenMP4.0.0.Examples.pdf
     7. https://gcc.gnu.org/wiki/OpenACC
     8. https://gcc.gnu.org/install/configure.html
     9. https://isocpp.org/std/standing-documents/sd-6-sg10-feature-test-recommendations
!   10. https://gcc.gnu.org/projects/cxx1y.html
    11. https://isocpp.org/std/standing-documents/sd-6-sg10-feature-test-recommendations
!   12. https://gcc.gnu.org/projects/cxx1y.html
!   13. https://gcc.gnu.org/projects/cxx1y.html
!   14. https://gcc.gnu.org/projects/cxx1y.html
    15. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2013/n3639.html
!   16. https://gcc.gnu.org/onlinedocs/libstdc++/manual/using_dual_abi.html
    17. https://gcc.gnu.org/onlinedocs/gcc-5.1.0/libstdc++/manual/manual/status.html#status.iso.2011
    18. https://gcc.gnu.org/onlinedocs/gcc-5.1.0/libstdc++/manual/manual/status.html#status.iso.2014
    19. https://gcc.gnu.org/onlinedocs/gcc-5.1.0/libstdc++/manual/manual/status.html#status.iso.2014
*************** References
*** 8063,8069 ****
    49. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.9/index.html
- 
                               GCC 4.9 Release Series
  
     (This release series is no longer supported.)
--- 8062,8067 ----
*************** References and Acknowledgements
*** 8126,8152 ****
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.9/changes.html
!    3. http://gcc.gnu.org/onlinedocs/4.9.4/
!    4. http://gcc.gnu.org/gcc-4.9/changes.html
!    5. http://gcc.gnu.org/onlinedocs/4.9.3/
!    6. http://gcc.gnu.org/gcc-4.9/changes.html
!    7. http://gcc.gnu.org/onlinedocs/4.9.2/
!    8. http://gcc.gnu.org/gcc-4.9/changes.html
!    9. http://gcc.gnu.org/onlinedocs/4.9.1/
!   10. http://gcc.gnu.org/gcc-4.9/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.9.0/
!   12. http://gcc.gnu.org/gcc-4.9/buildstat.html
    13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
--- 8124,8150 ----
     provided this notice is preserved.
  
     These pages are [23]maintained by the GCC team. Last modified
!    2024-05-30.
  
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.9/changes.html
!    3. https://gcc.gnu.org/onlinedocs/4.9.4/
!    4. https://gcc.gnu.org/gcc-4.9/changes.html
!    5. https://gcc.gnu.org/onlinedocs/4.9.3/
!    6. https://gcc.gnu.org/gcc-4.9/changes.html
!    7. https://gcc.gnu.org/onlinedocs/4.9.2/
!    8. https://gcc.gnu.org/gcc-4.9/changes.html
!    9. https://gcc.gnu.org/onlinedocs/4.9.1/
!   10. https://gcc.gnu.org/gcc-4.9/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.9.0/
!   12. https://gcc.gnu.org/gcc-4.9/buildstat.html
    13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. https://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/mirrors.html
!   17. https://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
*************** References
*** 8155,8161 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.9/changes.html
- 
                               GCC 4.9 Release Series
                          Changes, New Features, and Fixes
  
--- 8153,8158 ----
*************** New Languages and Language specific impr
*** 8269,8289 ****
         -fdiagnostics-color=never.
         Sample diagnostics output:
      $ g++ -fdiagnostics-color=always -S -Wall test.C
!     test.C: In function `int foo()':
      test.C:1:14: warning: no return statement in function returning non-void [-W
  return-type]
       int foo () { }
                    ^
      test.C:2:46: error: template instantiation depth exceeds maximum of 900 (use
!  -ftemplate-depth= to increase the maximum) instantiating `struct X<100>'
       template  struct X { static const int value = X::value; }; temp
  late struct X<1000>;
                                                    ^
!     test.C:2:46:   recursively required from `const int X<999>::value'
!     test.C:2:46:   required from `const int X<1000>::value'
      test.C:2:88:   required from here
  
!     test.C:2:46: error: incomplete type `X<100>' used in nested name specifier
  
       * With the new [7]#pragma GCC ivdep, the user can assert that there
         are no loop-carried dependencies which would prevent concurrent
--- 8266,8286 ----
         -fdiagnostics-color=never.
         Sample diagnostics output:
      $ g++ -fdiagnostics-color=always -S -Wall test.C
!     test.C: In function ‘int foo()’:
      test.C:1:14: warning: no return statement in function returning non-void [-W
  return-type]
       int foo () { }
                    ^
      test.C:2:46: error: template instantiation depth exceeds maximum of 900 (use
!  -ftemplate-depth= to increase the maximum) instantiating ‘struct X<100>’
       template  struct X { static const int value = X::value; }; temp
  late struct X<1000>;
                                                    ^
!     test.C:2:46:   recursively required from ‘const int X<999>::value’
!     test.C:2:46:   required from ‘const int X<1000>::value’
      test.C:2:88:   required from here
  
!     test.C:2:46: error: incomplete type ‘X<100>’ used in nested name specifier
  
       * With the new [7]#pragma GCC ivdep, the user can assert that there
         are no loop-carried dependencies which would prevent concurrent
*************** auto incr = [](auto x) { return x++; };
*** 8388,8395 ****
  // a functional object that will add two like-type objects
  auto add = []  (T a, T b) { return a + b; };
  
!      * G++ supports unconstrained generic functions as specified by §4.1.2
!        and §5.1.1 of [15]N3889: Concepts Lite Specification. Briefly, auto
         may be used as a type-specifier in a parameter declaration of any
         function declarator in order to introduce an implicit function
         template parameter, akin to generic lambdas.
--- 8385,8392 ----
  // a functional object that will add two like-type objects
  auto add = []  (T a, T b) { return a + b; };
  
!      * G++ supports unconstrained generic functions as specified by §4.1.2
!        and §5.1.1 of [15]N3889: Concepts Lite Specification. Briefly, auto
         may be used as a type-specifier in a parameter declaration of any
         function declarator in order to introduce an implicit function
         template parameter, akin to generic lambdas.
*************** auto incr(T x) { return x++; }
*** 8482,8488 ****
         be used as argument to ISO_C_BINDING's C_LOC and as actual argument
         to another NO_ARG_CHECK dummy argument; also the other constraints
         of TYPE(*) apply. The dummy arguments should be declared as scalar
!        or assumed-size variable of type type(*) (recommended) - or of type
         integer, real, complex or logical. With NO_ARG_CHECK, a pointer to
         the data without further type or shape information is passed,
         similar to C's void*. Note that also TS 29113's
--- 8479,8485 ----
         be used as argument to ISO_C_BINDING's C_LOC and as actual argument
         to another NO_ARG_CHECK dummy argument; also the other constraints
         of TYPE(*) apply. The dummy arguments should be declared as scalar
!        or assumed-size variable of type type(*) (recommended) – or of type
         integer, real, complex or logical. With NO_ARG_CHECK, a pointer to
         the data without further type or shape information is passed,
         similar to C's void*. Note that also TS 29113's
*************** New Targets and Target Specific Improvem
*** 8530,8544 ****
       * Coverage of more of the ISA including the SIMD extensions has been
         added. The Advanced SIMD intrinsics have also been improved.
       * The new local register allocator (LRA) is now on by default for the
!        AArch64 backend.
       * The REE (Redundant extension elimination) pass has now been enabled
!        by default for the AArch64 backend.
       * Tuning for the Cortex-A53 and Cortex-A57 has been improved.
       * Initial big.LITTLE tuning support for the combination of Cortex-A57
         and Cortex-A53 was added through the -mcpu=cortex-a57.cortex-a53
         option.
       * A number of structural changes have been made to both the ARM and
!        AArch64 backends to facilitate improved code-generation.
       * As of GCC 4.9.2 a workaround for the ARM Cortex-A53 erratum 835769
         has been added and can be enabled by giving the
         -mfix-cortex-a53-835769 option. Alternatively it can be enabled by
--- 8527,8541 ----
       * Coverage of more of the ISA including the SIMD extensions has been
         added. The Advanced SIMD intrinsics have also been improved.
       * The new local register allocator (LRA) is now on by default for the
!        AArch64 back end.
       * The REE (Redundant extension elimination) pass has now been enabled
!        by default for the AArch64 back end.
       * Tuning for the Cortex-A53 and Cortex-A57 has been improved.
       * Initial big.LITTLE tuning support for the combination of Cortex-A57
         and Cortex-A53 was added through the -mcpu=cortex-a57.cortex-a53
         option.
       * A number of structural changes have been made to both the ARM and
!        AArch64 back ends to facilitate improved code-generation.
       * As of GCC 4.9.2 a workaround for the ARM Cortex-A53 erratum 835769
         has been added and can be enabled by giving the
         -mfix-cortex-a53-835769 option. Alternatively it can be enabled by
*************** New Targets and Target Specific Improvem
*** 8579,8585 ****
         data segments to be relative to text segments has been added. This
         is on by default for all targets except VxWorks RTP.
       * A number of infrastructural changes have been made to both the ARM
!        and AArch64 backends to facilitate improved code-generation.
       * GCC now supports Cortex-A12 and the Cortex-R7 through the
         -mcpu=cortex-a12 and -mcpu=cortex-r7 options.
       * GCC now has tuning for the Cortex-A57 and Cortex-A53 through the
--- 8576,8582 ----
         data segments to be relative to text segments has been added. This
         is on by default for all targets except VxWorks RTP.
       * A number of infrastructural changes have been made to both the ARM
!        and AArch64 back ends to facilitate improved code-generation.
       * GCC now supports Cortex-A12 and the Cortex-R7 through the
         -mcpu=cortex-a12 and -mcpu=cortex-r7 options.
       * GCC now has tuning for the Cortex-A57 and Cortex-A53 through the
*************** New Targets and Target Specific Improvem
*** 8641,8654 ****
  
    MSP430
  
!      * A new command-line option -mcpu= has been added to the MSP430
!        backend. This option is used to specify the ISA to be used.
!        Accepted values are msp430 (the default), msp430x and msp430xv2.
!        The ISA is no longer deduced from the -mmcu= option as there are
!        far too many different MCU names. The -mmcu= option is still
!        supported, and this is still used to select linker scripts and
!        generate a C preprocessor symbol that will be recognised by the
!        msp430.h header file.
  
    NDS32
  
--- 8638,8651 ----
  
    MSP430
  
!      * A new command-line option -mcpu= has been added to the MSP430 back
!        end. This option is used to specify the ISA to be used. Accepted
!        values are msp430 (the default), msp430x and msp430xv2. The ISA is
!        no longer deduced from the -mmcu= option as there are far too many
!        different MCU names. The -mmcu= option is still supported, and this
!        is still used to select linker scripts and generate a C
!        preprocessor symbol that will be recognised by the msp430.h header
!        file.
  
    NDS32
  
*************** GCC 4.9.4
*** 8765,8771 ****
     provided this notice is preserved.
  
     These pages are [33]maintained by the GCC team. Last modified
!    2023-01-19.
  
  References
  
--- 8762,8768 ----
     provided this notice is preserved.
  
     These pages are [33]maintained by the GCC team. Last modified
!    2023-09-02.
  
  References
  
*************** References
*** 8776,8788 ****
     5. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Optimize-Options.html#index-fsimd-cost-model-908
     6. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Language-Independent-Options.html#index-fdiagnostics-color-252
     7. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Loop-Specific-Pragmas.html
!    8. http://gcc.gnu.org/projects/cxx1y.html
     9. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2013/n3638.html
!   10. http://gcc.gnu.org/projects/cxx1y.html
!   11. http://gcc.gnu.org/projects/cxx1y.html
!   12. http://gcc.gnu.org/projects/cxx1y.html
!   13. http://gcc.gnu.org/projects/cxx1y.html
!   14. http://gcc.gnu.org/projects/cxx1y.html
    15. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3889.pdf
    16. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/libstdc++/manual/manual/status.html#status.iso.2011
    17. https://gcc.gnu.org/onlinedocs/libstdc++/manual/status.html#status.iso.2014
--- 8773,8785 ----
     5. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Optimize-Options.html#index-fsimd-cost-model-908
     6. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Language-Independent-Options.html#index-fdiagnostics-color-252
     7. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Loop-Specific-Pragmas.html
!    8. https://gcc.gnu.org/projects/cxx1y.html
     9. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2013/n3638.html
!   10. https://gcc.gnu.org/projects/cxx1y.html
!   11. https://gcc.gnu.org/projects/cxx1y.html
!   12. https://gcc.gnu.org/projects/cxx1y.html
!   13. https://gcc.gnu.org/projects/cxx1y.html
!   14. https://gcc.gnu.org/projects/cxx1y.html
    15. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3889.pdf
    16. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/libstdc++/manual/manual/status.html#status.iso.2011
    17. https://gcc.gnu.org/onlinedocs/libstdc++/manual/status.html#status.iso.2014
*************** References
*** 8804,8810 ****
    33. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.8/index.html
- 
                               GCC 4.8 Release Series
  
     (This release series is no longer supported.)
--- 8801,8806 ----
*************** References and Acknowledgements
*** 8875,8898 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.8/changes.html
     3. https://gcc.gnu.org/onlinedocs/4.8.5/
!    4. http://gcc.gnu.org/gcc-4.8/changes.html
     5. https://gcc.gnu.org/onlinedocs/4.8.4/
!    6. http://gcc.gnu.org/gcc-4.8/changes.html
     7. https://gcc.gnu.org/onlinedocs/4.8.3/
!    8. http://gcc.gnu.org/gcc-4.8/changes.html
     9. https://gcc.gnu.org/onlinedocs/4.8.2/
!   10. http://gcc.gnu.org/gcc-4.8/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.8.1/
!   12. http://gcc.gnu.org/gcc-4.8/changes.html
    13. https://gcc.gnu.org/onlinedocs/4.8.0/
!   14. http://gcc.gnu.org/gcc-4.8/buildstat.html
    15. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   16. http://gcc.gnu.org/index.html
    17. mailto:gcc@gcc.gnu.org
!   18. http://gcc.gnu.org/mirrors.html
!   19. http://gcc.gnu.org/git.html
    20. https://gcc.gnu.org/onlinedocs/
    21. mailto:gcc-help@gcc.gnu.org
    22. mailto:gcc@gcc.gnu.org
--- 8871,8894 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.8/changes.html
     3. https://gcc.gnu.org/onlinedocs/4.8.5/
!    4. https://gcc.gnu.org/gcc-4.8/changes.html
     5. https://gcc.gnu.org/onlinedocs/4.8.4/
!    6. https://gcc.gnu.org/gcc-4.8/changes.html
     7. https://gcc.gnu.org/onlinedocs/4.8.3/
!    8. https://gcc.gnu.org/gcc-4.8/changes.html
     9. https://gcc.gnu.org/onlinedocs/4.8.2/
!   10. https://gcc.gnu.org/gcc-4.8/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.8.1/
!   12. https://gcc.gnu.org/gcc-4.8/changes.html
    13. https://gcc.gnu.org/onlinedocs/4.8.0/
!   14. https://gcc.gnu.org/gcc-4.8/buildstat.html
    15. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   16. https://gcc.gnu.org/index.html
    17. mailto:gcc@gcc.gnu.org
!   18. https://gcc.gnu.org/mirrors.html
!   19. https://gcc.gnu.org/git.html
    20. https://gcc.gnu.org/onlinedocs/
    21. mailto:gcc-help@gcc.gnu.org
    22. mailto:gcc@gcc.gnu.org
*************** References
*** 8901,8907 ****
    25. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.8/changes.html
- 
                               GCC 4.8 Release Series
                          Changes, New Features, and Fixes
  
--- 8897,8902 ----
*************** New Languages and Language specific impr
*** 9030,9037 ****
         diagnostics. Combined with the caret information, an example
         diagnostic showing these two features is:
  
! t.c:1:94: error: invalid operands to binary < (have `struct mystruct' and `float
! ')
   #define MYMAX(A,B)    __extension__ ({ __typeof__(A) __a = (A); __typeof__(B) _
  _b = (B); __a < __b ? __b : __a; })
  
--- 9025,9032 ----
         diagnostics. Combined with the caret information, an example
         diagnostic showing these two features is:
  
! t.c:1:94: error: invalid operands to binary < (have ‘struct mystruct’ and ‘float
! ’)
   #define MYMAX(A,B)    __extension__ ({ __typeof__(A) __a = (A); __typeof__(B) _
  _b = (B); __a < __b ? __b : __a; })
  
*************** int i = A().f();  // error, f() requires
*** 9155,9162 ****
              older versions except as noted below.
            + ABI: Some internal names (used in the assembler/object file)
              have changed for symbols declared in the specification part of
!             a module. If an affected module - or a file using it via use
!             association - is recompiled, the module and all files which
              directly use such symbols have to be recompiled as well. This
              change only affects the following kind of module symbols:
                 o Procedure pointers. Note: C-interoperable function
--- 9150,9157 ----
              older versions except as noted below.
            + ABI: Some internal names (used in the assembler/object file)
              have changed for symbols declared in the specification part of
!             a module. If an affected module – or a file using it via use
!             association – is recompiled, the module and all files which
              directly use such symbols have to be recompiled as well. This
              change only affects the following kind of module symbols:
                 o Procedure pointers. Note: C-interoperable function
*************** int i = A().f();  // error, f() requires
*** 9183,9189 ****
       * The [21]-Wcompare-reals command-line option has been added. When
         this is set, warnings are issued when comparing REAL or COMPLEX
         types for equality and inequality; consider replacing a == b by
!        abs(a-b) < eps with a suitable eps. -Wcompare-reals is enabled by
         -Wextra.
       * The [22]-Wtarget-lifetime command-line option has been added
         (enabled with -Wall), which warns if the pointer in a pointer
--- 9178,9184 ----
       * The [21]-Wcompare-reals command-line option has been added. When
         this is set, warnings are issued when comparing REAL or COMPLEX
         types for equality and inequality; consider replacing a == b by
!        abs(a−b) < eps with a suitable eps. -Wcompare-reals is enabled by
         -Wextra.
       * The [22]-Wtarget-lifetime command-line option has been added
         (enabled with -Wall), which warns if the pointer in a pointer
*************** int i = A().f();  // error, f() requires
*** 9195,9201 ****
         4.0e0).
         (For Fortran source code, consider replacing the "q" in
         floating-point literals by a kind parameter (e.g. 4.0e0_qp with a
!        suitable qp). Note that - in Fortran source code - replacing "q" by
         a simple "e" is not equivalent.)
       * The GFORTRAN_TMPDIR environment variable for specifying a
         non-default directory for files opened with STATUS="SCRATCH", is
--- 9190,9196 ----
         4.0e0).
         (For Fortran source code, consider replacing the "q" in
         floating-point literals by a kind parameter (e.g. 4.0e0_qp with a
!        suitable qp). Note that – in Fortran source code – replacing "q" by
         a simple "e" is not equivalent.)
       * The GFORTRAN_TMPDIR environment variable for specifying a
         non-default directory for files opened with STATUS="SCRATCH", is
*************** New Targets and Target Specific Improvem
*** 9290,9297 ****
      }
         The inline assembler in this example will generate code like
      mov r24, 8+7
!        provided c is allocated to R24 and val is allocated to R8...R15.
!        This works because the GNU assembler accepts plain register numbers
         without register prefix.
       * Static initializers with 3-byte symbols are supported now:
      extern const __memx char foo;
--- 9285,9292 ----
      }
         The inline assembler in this example will generate code like
      mov r24, 8+7
!        provided c is allocated to R24 and val is allocated to R8…R15. This
!        works because the GNU assembler accepts plain register numbers
         without register prefix.
       * Static initializers with 3-byte symbols are supported now:
      extern const __memx char foo;
*************** References
*** 9637,9649 ****
     6. https://github.com/google/sanitizers
     7. https://code.google.com/archive/p/data-race-test/wikis/ThreadSanitizer.wiki
     8. https://lkml.org/lkml/2006/11/28/239
!    9. http://gcc.gnu.org/gcc-4.8/cxx0x_status.html
!   10. http://gcc.gnu.org/gcc-4.8/cxx0x_status.html
!   11. http://gcc.gnu.org/gcc-4.8/cxx0x_status.html
    12. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2011/n3276.pdf
!   13. http://gcc.gnu.org/gcc-4.8/cxx0x_status.html
    14. https://www.open-std.org/JTC1/SC22/WG21/docs/papers/2012/n3386.html
!   15. http://gcc.gnu.org/projects/cxx1y.html
    16. https://gcc.gnu.org/onlinedocs/gcc-4.8.4/libstdc++/manual/manual/status.html#status.iso.2011
    17. https://gcc.gnu.org/onlinedocs/gfortran/BACKTRACE.html
    18. https://gcc.gnu.org/onlinedocs/gfortran/Error-and-Warning-Options.html
--- 9632,9644 ----
     6. https://github.com/google/sanitizers
     7. https://code.google.com/archive/p/data-race-test/wikis/ThreadSanitizer.wiki
     8. https://lkml.org/lkml/2006/11/28/239
!    9. https://gcc.gnu.org/gcc-4.8/cxx0x_status.html
!   10. https://gcc.gnu.org/gcc-4.8/cxx0x_status.html
!   11. https://gcc.gnu.org/gcc-4.8/cxx0x_status.html
    12. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2011/n3276.pdf
!   13. https://gcc.gnu.org/gcc-4.8/cxx0x_status.html
    14. https://www.open-std.org/JTC1/SC22/WG21/docs/papers/2012/n3386.html
!   15. https://gcc.gnu.org/projects/cxx1y.html
    16. https://gcc.gnu.org/onlinedocs/gcc-4.8.4/libstdc++/manual/manual/status.html#status.iso.2011
    17. https://gcc.gnu.org/onlinedocs/gfortran/BACKTRACE.html
    18. https://gcc.gnu.org/onlinedocs/gfortran/Error-and-Warning-Options.html
*************** References
*** 9674,9680 ****
    43. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.7/index.html
- 
                               GCC 4.7 Release Series
  
     (This release series is no longer supported.)
--- 9669,9674 ----
*************** References and Acknowledgements
*** 9742,9763 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.7/changes.html
     3. https://gcc.gnu.org/onlinedocs/4.7.4/
!    4. http://gcc.gnu.org/gcc-4.7/changes.html
     5. https://gcc.gnu.org/onlinedocs/4.7.3/
!    6. http://gcc.gnu.org/gcc-4.7/changes.html
     7. https://gcc.gnu.org/onlinedocs/4.7.2/
!    8. http://gcc.gnu.org/gcc-4.7/changes.html
     9. https://gcc.gnu.org/onlinedocs/4.7.1/
!   10. http://gcc.gnu.org/gcc-4.7/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.7.0/
!   12. http://gcc.gnu.org/gcc-4.7/buildstat.html
    13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
--- 9736,9757 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.7/changes.html
     3. https://gcc.gnu.org/onlinedocs/4.7.4/
!    4. https://gcc.gnu.org/gcc-4.7/changes.html
     5. https://gcc.gnu.org/onlinedocs/4.7.3/
!    6. https://gcc.gnu.org/gcc-4.7/changes.html
     7. https://gcc.gnu.org/onlinedocs/4.7.2/
!    8. https://gcc.gnu.org/gcc-4.7/changes.html
     9. https://gcc.gnu.org/onlinedocs/4.7.1/
!   10. https://gcc.gnu.org/gcc-4.7/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.7.0/
!   12. https://gcc.gnu.org/gcc-4.7/buildstat.html
    13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. https://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/mirrors.html
!   17. https://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
*************** References
*** 9766,9772 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.7/changes.html
- 
                               GCC 4.7 Release Series
                          Changes, New Features, and Fixes
  
--- 9760,9765 ----
*************** long double pi = 180.0_degrees;
*** 10097,10103 ****
  template  using Ptr = T*;
  Ptr ip;  // decltype(ip) is int*
  
!      * Thanks to Ville Voutilainen and Pedro Lamarão, G++ now implements
         [12]C++11 delegating constructors.
  
  struct A {
--- 10090,10096 ----
  template  using Ptr = T*;
  Ptr ip;  // decltype(ip) is int*
  
!      * Thanks to Ville Voutilainen and Pedro Lamarão, G++ now implements
         [12]C++11 delegating constructors.
  
  struct A {
*************** New Targets and Target Specific Improvem
*** 10291,10297 ****
  
       * GCC now supports the XMEGA architecture. This requires GNU binutils
         2.22 or later.
!      * Support for the [35]named address spaces __flash, __flash1, ...,
         __flash5 and __memx has been added. These address spaces locate
         read-only data in flash memory and allow reading from flash memory
         by means of ordinary C code, i.e. without the need of (inline)
--- 10284,10290 ----
  
       * GCC now supports the XMEGA architecture. This requires GNU binutils
         2.22 or later.
!      * Support for the [35]named address spaces __flash, __flash1, …,
         __flash5 and __memx has been added. These address spaces locate
         read-only data in flash memory and allow reading from flash memory
         by means of ordinary C code, i.e. without the need of (inline)
*************** void set_portb (uint8_t value)
*** 10335,10341 ****
         suitable to be used as operand in an I/O command. The address must
         be a constant integer known at compile time.
       * The inline assembler constraint "R" to represent integers in the
!        range -6 ... 5 has been removed without replacement.
       * Many optimizations to:
            + 64-bit integer arithmetic
            + Widening multiplication
--- 10328,10334 ----
         suitable to be used as operand in an I/O command. The address must
         be a constant integer known at compile time.
       * The inline assembler constraint "R" to represent integers in the
!        range −6 … 5 has been removed without replacement.
       * Many optimizations to:
            + 64-bit integer arithmetic
            + Widening multiplication
*************** void set_portb (uint8_t value)
*** 10347,10353 ****
            + If-else decision trees generated by switch instructions
            + Merging of data located in flash memory
            + New libgcc variants for devices with 8-bit wide stack pointer
!           + ...
       * Better documentation:
            + Handling of EIND and indirect jumps on devices with more than
              128 KiB of program memory.
--- 10340,10346 ----
            + If-else decision trees generated by switch instructions
            + Merging of data located in flash memory
            + New libgcc variants for devices with 8-bit wide stack pointer
!           + …
       * Better documentation:
            + Handling of EIND and indirect jumps on devices with more than
              128 KiB of program memory.
*************** References
*** 10568,10579 ****
     4. https://gcc.gnu.org/gcc-4.7/porting_to.html
     5. https://gcc.gnu.org/wiki/TransactionalMemory
     6. https://gcc.gnu.org/wiki/Atomic/GCCMM
!    7. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!    8. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!    9. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!   10. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!   11. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!   12. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
    13. https://gcc.gnu.org/PR14258
    14. https://gcc.gnu.org/PR35688
    15. https://gcc.gnu.org/onlinedocs/gcc-4.7.4/libstdc++/manual/manual/status.html#status.iso.2011
--- 10561,10572 ----
     4. https://gcc.gnu.org/gcc-4.7/porting_to.html
     5. https://gcc.gnu.org/wiki/TransactionalMemory
     6. https://gcc.gnu.org/wiki/Atomic/GCCMM
!    7. https://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!    8. https://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!    9. https://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!   10. https://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!   11. https://gcc.gnu.org/gcc-4.7/cxx0x_status.html
!   12. https://gcc.gnu.org/gcc-4.7/cxx0x_status.html
    13. https://gcc.gnu.org/PR14258
    14. https://gcc.gnu.org/PR35688
    15. https://gcc.gnu.org/onlinedocs/gcc-4.7.4/libstdc++/manual/manual/status.html#status.iso.2011
*************** References
*** 10599,10605 ****
    35. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gcc/Named-Address-Spaces.html
    36. http://www.nongnu.org/avr-libc/
    37. https://gcc.gnu.org/PR54461
!   38. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gcc/AVR-Built%5f002din-Functions.html
    39. https://sites.google.com/site/x32abi/
    40. https://dwarfstd.org/issues/100909.1.html
    41. https://dwarfstd.org/issues/100909.2.html
--- 10592,10598 ----
    35. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gcc/Named-Address-Spaces.html
    36. http://www.nongnu.org/avr-libc/
    37. https://gcc.gnu.org/PR54461
!   38. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gcc/AVR-Built_002din-Functions.html
    39. https://sites.google.com/site/x32abi/
    40. https://dwarfstd.org/issues/100909.1.html
    41. https://dwarfstd.org/issues/100909.2.html
*************** References
*** 10618,10624 ****
    54. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.6/index.html
- 
                               GCC 4.6 Release Series
  
     (This release series is no longer supported.)
--- 10611,10616 ----
*************** References and Acknowledgements
*** 10686,10707 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.6/changes.html
     3. https://gcc.gnu.org/onlinedocs/4.6.4/
!    4. http://gcc.gnu.org/gcc-4.6/changes.html
     5. https://gcc.gnu.org/onlinedocs/4.6.3/
!    6. http://gcc.gnu.org/gcc-4.6/changes.html
     7. https://gcc.gnu.org/onlinedocs/4.6.2/
!    8. http://gcc.gnu.org/gcc-4.6/changes.html
     9. https://gcc.gnu.org/onlinedocs/4.6.1/
!   10. http://gcc.gnu.org/gcc-4.6/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.6.0/
!   12. http://gcc.gnu.org/gcc-4.6/buildstat.html
    13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. http://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. http://gcc.gnu.org/mirrors.html
!   17. http://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
--- 10678,10699 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.6/changes.html
     3. https://gcc.gnu.org/onlinedocs/4.6.4/
!    4. https://gcc.gnu.org/gcc-4.6/changes.html
     5. https://gcc.gnu.org/onlinedocs/4.6.3/
!    6. https://gcc.gnu.org/gcc-4.6/changes.html
     7. https://gcc.gnu.org/onlinedocs/4.6.2/
!    8. https://gcc.gnu.org/gcc-4.6/changes.html
     9. https://gcc.gnu.org/onlinedocs/4.6.1/
!   10. https://gcc.gnu.org/gcc-4.6/changes.html
    11. https://gcc.gnu.org/onlinedocs/4.6.0/
!   12. https://gcc.gnu.org/gcc-4.6/buildstat.html
    13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   14. https://gcc.gnu.org/index.html
    15. mailto:gcc@gcc.gnu.org
!   16. https://gcc.gnu.org/mirrors.html
!   17. https://gcc.gnu.org/git.html
    18. https://gcc.gnu.org/onlinedocs/
    19. mailto:gcc-help@gcc.gnu.org
    20. mailto:gcc@gcc.gnu.org
*************** References
*** 10710,10716 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.6/changes.html
- 
                               GCC 4.6 Release Series
                          Changes, New Features, and Fixes
  
--- 10702,10707 ----
*************** New Languages and Language specific impr
*** 11050,11056 ****
  
       * [12]Improved experimental support for the upcoming ISO C++
         standard, C++0x, including using constexpr and nullptr.
!      * Performance improvements to the [13]Debug Mode, thanks to François
         Dumont.
       * Atomic operations used for reference-counting are annotated so that
         they can be understood by race detectors such as Helgrind, see
--- 11041,11047 ----
  
       * [12]Improved experimental support for the upcoming ISO C++
         standard, C++0x, including using constexpr and nullptr.
!      * Performance improvements to the [13]Debug Mode, thanks to François
         Dumont.
       * Atomic operations used for reference-counting are annotated so that
         they can be understood by race detectors such as Helgrind, see
*************** New Languages and Language specific impr
*** 11105,11111 ****
              allocated (if unallocated) or reallocated (if the shape or
              type parameter is different). To avoid the small performance
              penalty, you can use a(:) = ... instead of a = ... for arrays
!             and character strings - or disable the feature using -std=f95
              or -fno-realloc-lhs.
            + Deferred type parameter: For scalar allocatable and pointer
              variables the character length can be deferred.
--- 11096,11102 ----
              allocated (if unallocated) or reallocated (if the shape or
              type parameter is different). To avoid the small performance
              penalty, you can use a(:) = ... instead of a = ... for arrays
!             and character strings – or disable the feature using -std=f95
              or -fno-realloc-lhs.
            + Deferred type parameter: For scalar allocatable and pointer
              variables the character length can be deferred.
*************** New Languages and Language specific impr
*** 11160,11166 ****
              be declared in a single PROCEDURE statement; implied-shape
              arrays are supported for named constants (PARAMETER). The
              transformational, three argument versions of BESSEL_JN and
!             BESSEL_YN were added - the elemental, two-argument version had
              been added in GCC 4.4; note that the transformational
              functions use a recurrence algorithm.
  
--- 11151,11157 ----
              be declared in a single PROCEDURE statement; implied-shape
              arrays are supported for named constants (PARAMETER). The
              transformational, three argument versions of BESSEL_JN and
!             BESSEL_YN were added – the elemental, two-argument version had
              been added in GCC 4.4; note that the transformational
              functions use a recurrence algorithm.
  
*************** New Targets and Target Specific Improvem
*** 11290,11296 ****
         and store multiples.
       * Several enhancements were committed to improve SIMD code generation
         for NEON by adding support for widening instructions, misaligned
!        loads and stores, vector conditionals and support for 64 bit
         arithmetic.
       * Support was added for the Faraday cores fa526, fa606te, fa626te,
         fmp626te, fmp626 and fa726te and can be used with the respective
--- 11281,11287 ----
         and store multiples.
       * Several enhancements were committed to improve SIMD code generation
         for NEON by adding support for widening instructions, misaligned
!        loads and stores, vector conditionals and support for 64-bit
         arithmetic.
       * Support was added for the Faraday cores fa526, fa606te, fa626te,
         fmp626te, fmp626 and fa726te and can be used with the respective
*************** New Targets and Target Specific Improvem
*** 11396,11404 ****
         instructions.
       * The GCC compiler on AIX now defaults to a process layout with a
         larger data space allowing larger programs to be compiled.
!      * The GCC long double type on AIX 6.1 and above has reverted to 64
!        bit double precision, matching the AIX XL compiler default, because
!        of missing C99 symbols required by the GCC runtime.
       * The default processor scheduling model and tuning for PowerPC64
         GNU/Linux and for AIX 6.1 and above now is POWER7.
       * Starting with GCC 4.6.1, vectors of type vector long long or vector
--- 11387,11395 ----
         instructions.
       * The GCC compiler on AIX now defaults to a process layout with a
         larger data space allowing larger programs to be compiled.
!      * The GCC long double type on AIX 6.1 and above has reverted to
!        64-bit double precision, matching the AIX XL compiler default,
!        because of missing C99 symbols required by the GCC runtime.
       * The default processor scheduling model and tuning for PowerPC64
         GNU/Linux and for AIX 6.1 and above now is POWER7.
       * Starting with GCC 4.6.1, vectors of type vector long long or vector
*************** GCC 4.6.4
*** 11605,11621 ****
     provided this notice is preserved.
  
     These pages are [28]maintained by the GCC team. Last modified
!    2023-01-18.
  
  References
  
     1. https://sourceware.org/bugzilla/show_bug.cgi?id=10401
!    2. http://gcc.gnu.org/gcc-4.5/changes.html
!    3. http://gcc.gnu.org/gcc-4.5/changes.html#obsoleted
!    4. http://gcc.gnu.org/gcc-4.6/porting_to.html
!    5. http://gcc.gnu.org/projects/lto/whopr.pdf
     6. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#Warning-Options
!    7. http://gcc.gnu.org/gcc-4.6/cxx0x_status.html
     8. https://gcc.gnu.org/PR43145
     9. https://gcc.gnu.org/PR43680
    10. https://gcc.gnu.org/PR33558
--- 11596,11612 ----
     provided this notice is preserved.
  
     These pages are [28]maintained by the GCC team. Last modified
!    2024-05-17.
  
  References
  
     1. https://sourceware.org/bugzilla/show_bug.cgi?id=10401
!    2. https://gcc.gnu.org/gcc-4.5/changes.html
!    3. https://gcc.gnu.org/gcc-4.5/changes.html#obsoleted
!    4. https://gcc.gnu.org/gcc-4.6/porting_to.html
!    5. https://gcc.gnu.org/projects/lto/whopr.pdf
     6. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#Warning-Options
!    7. https://gcc.gnu.org/gcc-4.6/cxx0x_status.html
     8. https://gcc.gnu.org/PR43145
     9. https://gcc.gnu.org/PR43680
    10. https://gcc.gnu.org/PR33558
*************** References
*** 11639,11645 ****
    28. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.5/index.html
- 
                               GCC 4.5 Release Series
  
     (This release series is no longer supported.)
--- 11630,11635 ----
*************** References and Acknowledgements
*** 11707,11723 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.5/changes.html
!    3. http://gcc.gnu.org/gcc-4.5/changes.html
!    4. http://gcc.gnu.org/gcc-4.5/changes.html
!    5. http://gcc.gnu.org/gcc-4.5/changes.html
!    6. http://gcc.gnu.org/gcc-4.5/changes.html
!    7. http://gcc.gnu.org/gcc-4.5/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. http://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. http://gcc.gnu.org/mirrors.html
!   12. http://gcc.gnu.org/git.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
--- 11697,11713 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.5/changes.html
!    3. https://gcc.gnu.org/gcc-4.5/changes.html
!    4. https://gcc.gnu.org/gcc-4.5/changes.html
!    5. https://gcc.gnu.org/gcc-4.5/changes.html
!    6. https://gcc.gnu.org/gcc-4.5/changes.html
!    7. https://gcc.gnu.org/gcc-4.5/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. https://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. https://gcc.gnu.org/mirrors.html
!   12. https://gcc.gnu.org/git.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
*************** References
*** 11726,11732 ****
    18. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.5/changes.html
- 
                               GCC 4.5 Release Series
                          Changes, New Features, and Fixes
  
--- 11716,11721 ----
*************** New Languages and Language specific impr
*** 11963,11969 ****
         defined ([12]DR 757).
       * Labels may now have attributes, as has been permitted for a while
         in C. This is only permitted when the label definition and the
!        attribute specifier is followed by a semicolon--i.e., the label
         applies to an empty statement. The only useful attribute for a
         label is unused.
       * G++ now implements [13]DR 176. Previously G++ did not support using
--- 11952,11958 ----
         defined ([12]DR 757).
       * Labels may now have attributes, as has been permitted for a while
         in C. This is only permitted when the label definition and the
!        attribute specifier is followed by a semicolon—i.e., the label
         applies to an empty statement. The only useful attribute for a
         label is unused.
       * G++ now implements [13]DR 176. Previously G++ did not support using
*************** vector-size: improvement = 3: call stack
*** 12045,12051 ****
  
    Fortran
  
!      * The COMMON default padding has been changed - instead of adding the
         padding before a variable it is now added afterwards, which
         increases the compatibility with other vendors and helps to obtain
         the correct output in some cases. Cf. also the -falign-commons
--- 12034,12040 ----
  
    Fortran
  
!      * The COMMON default padding has been changed – instead of adding the
         padding before a variable it is now added afterwards, which
         increases the compatibility with other vendors and helps to obtain
         the correct output in some cases. Cf. also the -falign-commons
*************** GCC 4.5.4
*** 12374,12400 ****
     provided this notice is preserved.
  
     These pages are [32]maintained by the GCC team. Last modified
!    2023-01-15.
  
  References
  
!    1. https://www.multiprecision.org/mpc/
     2. https://gcc.gnu.org/install/prerequisites.html
     3. https://gcc.gnu.org/ml/gcc/2010-01/msg00510.html
!    4. http://gcc.gnu.org/gcc-4.4/changes.html#obsoleted
!    5. http://gcc.gnu.org/gcc-4.5/changes.html#x86
     6. https://gcc.gnu.org/PR30789
     7. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-flto-801
     8. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-fwhopr-802
     9. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-fwhole-program-800
    10. https://gcc.gnu.org/onlinedocs/gcc/Restricted-Pointers.html
!   11. http://gcc.gnu.org/gcc-4.5/cxx0x_status.html
    12. https://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#757
    13. https://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#176
    14. https://gcc.gnu.org/onlinedocs/libstdc++/manual/profile_mode.html
    15. https://gcc.gnu.org/onlinedocs/libstdc++/manual/status.html#status.iso.tr24733
    16. https://sourceware.org/gdb/wiki/STLSupport
!   17. http://gcc.gnu.org/gcc-4.4/changes.html
    18. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html
    19. https://gcc.gnu.org/onlinedocs/gfortran/Mixed-Language-Programming.html
    20. https://gcc.gnu.org/onlinedocs/gfortran/GNU-Fortran-Compiler-Directives.html
--- 12363,12389 ----
     provided this notice is preserved.
  
     These pages are [32]maintained by the GCC team. Last modified
!    2023-07-30.
  
  References
  
!    1. https://www.multiprecision.org/
     2. https://gcc.gnu.org/install/prerequisites.html
     3. https://gcc.gnu.org/ml/gcc/2010-01/msg00510.html
!    4. https://gcc.gnu.org/gcc-4.4/changes.html#obsoleted
!    5. https://gcc.gnu.org/gcc-4.5/changes.html#x86
     6. https://gcc.gnu.org/PR30789
     7. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-flto-801
     8. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-fwhopr-802
     9. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-fwhole-program-800
    10. https://gcc.gnu.org/onlinedocs/gcc/Restricted-Pointers.html
!   11. https://gcc.gnu.org/gcc-4.5/cxx0x_status.html
    12. https://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#757
    13. https://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#176
    14. https://gcc.gnu.org/onlinedocs/libstdc++/manual/profile_mode.html
    15. https://gcc.gnu.org/onlinedocs/libstdc++/manual/status.html#status.iso.tr24733
    16. https://sourceware.org/gdb/wiki/STLSupport
!   17. https://gcc.gnu.org/gcc-4.4/changes.html
    18. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html
    19. https://gcc.gnu.org/onlinedocs/gfortran/Mixed-Language-Programming.html
    20. https://gcc.gnu.org/onlinedocs/gfortran/GNU-Fortran-Compiler-Directives.html
*************** References
*** 12412,12418 ****
    32. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.4/index.html
- 
                               GCC 4.4 Release Series
  
     This release series is no longer maintained.
--- 12401,12406 ----
*************** References and Acknowledgements
*** 12489,12508 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.4/changes.html
!    3. http://gcc.gnu.org/gcc-4.4/changes.html
!    4. http://gcc.gnu.org/gcc-4.4/changes.html
!    5. http://gcc.gnu.org/gcc-4.4/changes.html
!    6. http://gcc.gnu.org/gcc-4.4/changes.html
!    7. http://gcc.gnu.org/gcc-4.4/changes.html
!    8. http://gcc.gnu.org/gcc-4.4/changes.html
!    9. http://gcc.gnu.org/gcc-4.4/changes.html
!   10. http://gcc.gnu.org/gcc-4.4/buildstat.html
    11. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   12. http://gcc.gnu.org/index.html
    13. mailto:gcc@gcc.gnu.org
!   14. http://gcc.gnu.org/mirrors.html
!   15. http://gcc.gnu.org/git.html
    16. https://gcc.gnu.org/onlinedocs/
    17. mailto:gcc-help@gcc.gnu.org
    18. mailto:gcc@gcc.gnu.org
--- 12477,12496 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.4/changes.html
!    3. https://gcc.gnu.org/gcc-4.4/changes.html
!    4. https://gcc.gnu.org/gcc-4.4/changes.html
!    5. https://gcc.gnu.org/gcc-4.4/changes.html
!    6. https://gcc.gnu.org/gcc-4.4/changes.html
!    7. https://gcc.gnu.org/gcc-4.4/changes.html
!    8. https://gcc.gnu.org/gcc-4.4/changes.html
!    9. https://gcc.gnu.org/gcc-4.4/changes.html
!   10. https://gcc.gnu.org/gcc-4.4/buildstat.html
    11. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   12. https://gcc.gnu.org/index.html
    13. mailto:gcc@gcc.gnu.org
!   14. https://gcc.gnu.org/mirrors.html
!   15. https://gcc.gnu.org/git.html
    16. https://gcc.gnu.org/onlinedocs/
    17. mailto:gcc-help@gcc.gnu.org
    18. mailto:gcc@gcc.gnu.org
*************** References
*** 12511,12517 ****
    21. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.4/changes.html
- 
                               GCC 4.4 Release Series
                          Changes, New Features, and Fixes
  
--- 12499,12504 ----
*************** GCC 4.4.7
*** 13118,13129 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-4.4/changes.html#4.4.7
!    2. http://gcc.gnu.org/gcc-4.3/changes.html#obsoleted
!    3. http://gcc.gnu.org/gcc-4.4/porting_to.html
     4. https://gcc.gnu.org/wiki/Graphite
     5. https://www.open-std.org/jtc1/sc22/wg14/www/docs/n1040.pdf
!    6. http://gcc.gnu.org/gcc-4.4/cxx0x_status.html
     7. https://gcc.gnu.org/onlinedocs/gfortran/Preprocessing-Options.html
     8. https://gcc.gnu.org/onlinedocs/gfortran/Error-and-Warning-Options.html#index-g_t_0040code_007bWarray-temporaries_007d-125
     9. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfcheck-array-temporaries_007d-221
--- 13105,13116 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-4.4/changes.html#4.4.7
!    2. https://gcc.gnu.org/gcc-4.3/changes.html#obsoleted
!    3. https://gcc.gnu.org/gcc-4.4/porting_to.html
     4. https://gcc.gnu.org/wiki/Graphite
     5. https://www.open-std.org/jtc1/sc22/wg14/www/docs/n1040.pdf
!    6. https://gcc.gnu.org/gcc-4.4/cxx0x_status.html
     7. https://gcc.gnu.org/onlinedocs/gfortran/Preprocessing-Options.html
     8. https://gcc.gnu.org/onlinedocs/gfortran/Error-and-Warning-Options.html#index-g_t_0040code_007bWarray-temporaries_007d-125
     9. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfcheck-array-temporaries_007d-221
*************** References
*** 13143,13149 ****
    23. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.3/index.html
- 
                               GCC 4.3 Release Series
  
     (This release series is no longer supported.)
--- 13130,13135 ----
*************** References and Acknowledgements
*** 13217,13235 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.3/changes.html
!    3. http://gcc.gnu.org/gcc-4.3/changes.html
!    4. http://gcc.gnu.org/gcc-4.3/changes.html
!    5. http://gcc.gnu.org/gcc-4.3/changes.html
!    6. http://gcc.gnu.org/gcc-4.3/changes.html
!    7. http://gcc.gnu.org/gcc-4.3/changes.html
!    8. http://gcc.gnu.org/gcc-4.3/changes.html
!    9. http://gcc.gnu.org/gcc-4.3/buildstat.html
    10. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   11. http://gcc.gnu.org/index.html
    12. mailto:gcc@gcc.gnu.org
!   13. http://gcc.gnu.org/mirrors.html
!   14. http://gcc.gnu.org/git.html
    15. https://gcc.gnu.org/onlinedocs/
    16. mailto:gcc-help@gcc.gnu.org
    17. mailto:gcc@gcc.gnu.org
--- 13203,13221 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.3/changes.html
!    3. https://gcc.gnu.org/gcc-4.3/changes.html
!    4. https://gcc.gnu.org/gcc-4.3/changes.html
!    5. https://gcc.gnu.org/gcc-4.3/changes.html
!    6. https://gcc.gnu.org/gcc-4.3/changes.html
!    7. https://gcc.gnu.org/gcc-4.3/changes.html
!    8. https://gcc.gnu.org/gcc-4.3/changes.html
!    9. https://gcc.gnu.org/gcc-4.3/buildstat.html
    10. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   11. https://gcc.gnu.org/index.html
    12. mailto:gcc@gcc.gnu.org
!   13. https://gcc.gnu.org/mirrors.html
!   14. https://gcc.gnu.org/git.html
    15. https://gcc.gnu.org/onlinedocs/
    16. mailto:gcc-help@gcc.gnu.org
    17. mailto:gcc@gcc.gnu.org
*************** References
*** 13238,13244 ****
    20. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.3/changes.html
- 
                               GCC 4.3 Release Series
                          Changes, New Features, and Fixes
  
--- 13224,13229 ----
*************** GCC 4.3.6
*** 14021,14036 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-4.3/changes.html#4.3.5
     2. https://gmplib.org/
     3. https://www.mpfr.org/
     4. https://gcc.gnu.org/install/prerequisites.html
     5. https://gcc.gnu.org/ml/gcc-announce/2001/msg00000.html
     6. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#Warning-Options
!    7. http://gcc.gnu.org/gcc-4.3/porting_to.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html
!    9. http://gcc.gnu.org/gcc-4.3/cxx0x_status.html
!   10. http://gcc.gnu.org/gcc-4.3/cxx0x_status.html
    11. https://gcc.gnu.org/onlinedocs/libstdc++/manual/parallel_mode.html
    12. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#Code-Gen-Options
    13. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfinit-local-zero_007d-167
--- 14006,14021 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-4.3/changes.html#4.3.5
     2. https://gmplib.org/
     3. https://www.mpfr.org/
     4. https://gcc.gnu.org/install/prerequisites.html
     5. https://gcc.gnu.org/ml/gcc-announce/2001/msg00000.html
     6. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#Warning-Options
!    7. https://gcc.gnu.org/gcc-4.3/porting_to.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html
!    9. https://gcc.gnu.org/gcc-4.3/cxx0x_status.html
!   10. https://gcc.gnu.org/gcc-4.3/cxx0x_status.html
    11. https://gcc.gnu.org/onlinedocs/libstdc++/manual/parallel_mode.html
    12. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#Code-Gen-Options
    13. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfinit-local-zero_007d-167
*************** References
*** 14053,14059 ****
    30. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.2/index.html
- 
                               GCC 4.2 Release Series
  
     (This release series is no longer supported.)
--- 14038,14043 ----
*************** References and Acknowledgements
*** 14121,14137 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.2/changes.html
!    3. http://gcc.gnu.org/gcc-4.2/changes.html
!    4. http://gcc.gnu.org/gcc-4.2/changes.html
!    5. http://gcc.gnu.org/gcc-4.2/changes.html
!    6. http://gcc.gnu.org/gcc-4.2/changes.html
!    7. http://gcc.gnu.org/gcc-4.2/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. http://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. http://gcc.gnu.org/mirrors.html
!   12. http://gcc.gnu.org/git.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
--- 14105,14121 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.2/changes.html
!    3. https://gcc.gnu.org/gcc-4.2/changes.html
!    4. https://gcc.gnu.org/gcc-4.2/changes.html
!    5. https://gcc.gnu.org/gcc-4.2/changes.html
!    6. https://gcc.gnu.org/gcc-4.2/changes.html
!    7. https://gcc.gnu.org/gcc-4.2/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. https://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. https://gcc.gnu.org/mirrors.html
!   12. https://gcc.gnu.org/git.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
*************** References
*** 14140,14146 ****
    18. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.2/changes.html
- 
                               GCC 4.2 Release Series
                          Changes, New Features, and Fixes
  
--- 14124,14129 ----
*************** Other significant improvements
*** 14448,14454 ****
  
  References
  
!    1. http://gcc.gnu.org/projects/gomp/
     2. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html
     3. https://gcc.gnu.org/onlinedocs/libstdc++/ext/pb_ds/index.html
     4. https://gcc.gnu.org/onlinedocs/gfortran/Runtime-Options.html
--- 14431,14437 ----
  
  References
  
!    1. https://gcc.gnu.org/projects/gomp/
     2. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html
     3. https://gcc.gnu.org/onlinedocs/libstdc++/ext/pb_ds/index.html
     4. https://gcc.gnu.org/onlinedocs/gfortran/Runtime-Options.html
*************** References
*** 14461,14467 ****
    11. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.1/index.html
- 
                               GCC 4.1 Release Series
  
     (This release series is no longer supported.)
--- 14444,14449 ----
*************** References and Acknowledgements
*** 14523,14537 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.1/changes.html#4.1.2
!    3. http://gcc.gnu.org/gcc-4.1/changes.html
!    4. http://gcc.gnu.org/gcc-4.1/changes.html
!    5. http://gcc.gnu.org/gcc-4.1/buildstat.html
     6. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    7. http://gcc.gnu.org/index.html
     8. mailto:gcc@gcc.gnu.org
!    9. http://gcc.gnu.org/mirrors.html
!   10. http://gcc.gnu.org/git.html
    11. https://gcc.gnu.org/onlinedocs/
    12. mailto:gcc-help@gcc.gnu.org
    13. mailto:gcc@gcc.gnu.org
--- 14505,14519 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.1/changes.html#4.1.2
!    3. https://gcc.gnu.org/gcc-4.1/changes.html
!    4. https://gcc.gnu.org/gcc-4.1/changes.html
!    5. https://gcc.gnu.org/gcc-4.1/buildstat.html
     6. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    7. https://gcc.gnu.org/index.html
     8. mailto:gcc@gcc.gnu.org
!    9. https://gcc.gnu.org/mirrors.html
!   10. https://gcc.gnu.org/git.html
    11. https://gcc.gnu.org/onlinedocs/
    12. mailto:gcc-help@gcc.gnu.org
    13. mailto:gcc@gcc.gnu.org
*************** References
*** 14540,14546 ****
    16. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.1/changes.html
- 
                               GCC 4.1 Release Series
                          Changes, New Features, and Fixes
  
--- 14522,14527 ----
*************** GCC 4.1.2
*** 15081,15087 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-4.1/changes.html#4.1.2
     2. https://gcc.gnu.org/ml/java/2005-05/msg00260.html
     3. https://developer.classpath.org/doc/
     4. https://gcc.gnu.org/onlinedocs/gcc-4.1.0/gcc/Atomic-Builtins.html
--- 15062,15068 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-4.1/changes.html#4.1.2
     2. https://gcc.gnu.org/ml/java/2005-05/msg00260.html
     3. https://developer.classpath.org/doc/
     4. https://gcc.gnu.org/onlinedocs/gcc-4.1.0/gcc/Atomic-Builtins.html
*************** References
*** 15094,15100 ****
    11. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.0/index.html
- 
                               GCC 4.0 Release Series
  
     (This release series is no longer supported.)
--- 15075,15080 ----
*************** References and Acknowledgements
*** 15162,15178 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-4.0/changes.html#4.0.4
!    3. http://gcc.gnu.org/gcc-4.0/changes.html#4.0.3
!    4. http://gcc.gnu.org/gcc-4.0/changes.html#4.0.2
!    5. http://gcc.gnu.org/gcc-4.0/changes.html#4.0.1
!    6. http://gcc.gnu.org/gcc-4.0/changes.html
!    7. http://gcc.gnu.org/gcc-4.0/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. http://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. http://gcc.gnu.org/mirrors.html
!   12. http://gcc.gnu.org/git.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
--- 15142,15158 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-4.0/changes.html#4.0.4
!    3. https://gcc.gnu.org/gcc-4.0/changes.html#4.0.3
!    4. https://gcc.gnu.org/gcc-4.0/changes.html#4.0.2
!    5. https://gcc.gnu.org/gcc-4.0/changes.html#4.0.1
!    6. https://gcc.gnu.org/gcc-4.0/changes.html
!    7. https://gcc.gnu.org/gcc-4.0/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. https://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. https://gcc.gnu.org/mirrors.html
!   12. https://gcc.gnu.org/git.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
*************** References
*** 15181,15187 ****
    18. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-4.0/changes.html
- 
                               GCC 4.0 Release Series
                          Changes, New Features, and Fixes
  
--- 15161,15166 ----
*************** GCC 4.0.4
*** 15687,15701 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-4.0/changes.html#4.0.4
     2. https://www.cl.cam.ac.uk/~mgk25/ucs/quotes.html
!    3. http://gcc.gnu.org/projects/tree-ssa/
!    4. http://gcc.gnu.org/projects/tree-ssa/vectorization.html
!    5. http://gcc.gnu.org/news/sms.html
     6. https://www.akkadia.org/drepper/dsohowto.pdf
!    7. http://gcc.gnu.org/gcc-4.0/changes.html#visibility
     8. https://itanium-cxx-abi.github.io/cxx-abi/
!    9. http://gcc.gnu.org/fortran/
    10. https://gcc.gnu.org/install/
    11. https://gcc.gnu.org/wiki/Visibility
    12. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.0.1
--- 15666,15680 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-4.0/changes.html#4.0.4
     2. https://www.cl.cam.ac.uk/~mgk25/ucs/quotes.html
!    3. https://gcc.gnu.org/projects/tree-ssa/
!    4. https://gcc.gnu.org/projects/tree-ssa/vectorization.html
!    5. https://gcc.gnu.org/news/sms.html
     6. https://www.akkadia.org/drepper/dsohowto.pdf
!    7. https://gcc.gnu.org/gcc-4.0/changes.html#visibility
     8. https://itanium-cxx-abi.github.io/cxx-abi/
!    9. https://gcc.gnu.org/fortran/
    10. https://gcc.gnu.org/install/
    11. https://gcc.gnu.org/wiki/Visibility
    12. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.0.1
*************** References
*** 15710,15716 ****
    21. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.4/index.html
- 
                               GCC 3.4 Release Series
  
     (This release series is no longer supported.)
--- 15689,15694 ----
*************** References and Acknowledgements
*** 15789,15809 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-3.4/changes.html
     3. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    4. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.6
!    5. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.5
!    6. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.4
!    7. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.3
!    8. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.2
!    9. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.1
!   10. http://gcc.gnu.org/gcc-3.4/changes.html
!   11. http://gcc.gnu.org/gcc-3.4/buildstat.html
    12. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   13. http://gcc.gnu.org/index.html
    14. mailto:gcc@gcc.gnu.org
!   15. http://gcc.gnu.org/mirrors.html
!   16. http://gcc.gnu.org/git.html
    17. https://gcc.gnu.org/onlinedocs/
    18. mailto:gcc-help@gcc.gnu.org
    19. mailto:gcc@gcc.gnu.org
--- 15767,15787 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-3.4/changes.html
     3. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    4. https://gcc.gnu.org/gcc-3.4/changes.html#3.4.6
!    5. https://gcc.gnu.org/gcc-3.4/changes.html#3.4.5
!    6. https://gcc.gnu.org/gcc-3.4/changes.html#3.4.4
!    7. https://gcc.gnu.org/gcc-3.4/changes.html#3.4.3
!    8. https://gcc.gnu.org/gcc-3.4/changes.html#3.4.2
!    9. https://gcc.gnu.org/gcc-3.4/changes.html#3.4.1
!   10. https://gcc.gnu.org/gcc-3.4/changes.html
!   11. https://gcc.gnu.org/gcc-3.4/buildstat.html
    12. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   13. https://gcc.gnu.org/index.html
    14. mailto:gcc@gcc.gnu.org
!   15. https://gcc.gnu.org/mirrors.html
!   16. https://gcc.gnu.org/git.html
    17. https://gcc.gnu.org/onlinedocs/
    18. mailto:gcc-help@gcc.gnu.org
    19. mailto:gcc@gcc.gnu.org
*************** References
*** 15812,15818 ****
    22. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.4/changes.html
- 
                               GCC 3.4 Release Series
                          Changes, New Features, and Fixes
  
--- 15790,15795 ----
*************** GCC 3.4.6
*** 17576,17593 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.6
!    2. http://gcc.gnu.org/gcc-3.4/changes.html#cplusplus
!    3. http://gcc.gnu.org/gcc-3.3/changes.html#obsolete_systems
!    4. http://gcc.gnu.org/gcc-3.4/changes.html#obsolete_systems
!    5. http://gcc.gnu.org/gcc-3.4/mips-abi.html
!    6. http://gcc.gnu.org/gcc-3.4/sparc-abi.html
     7. https://www.boost.org/
     8. https://gcc.gnu.org/PR11953
     9. https://gcc.gnu.org/PR8361
!   10. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Other-Builtins.html#Other%20Builtins
    11. https://www.open-std.org/jtc1/sc22/wg21/docs/cwg_closed.html#209
!   12. http://gcc.gnu.org/bugs/#cxx_rvalbind
    13. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Objective-C-Dialect-Options.html
    14. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Objective-C-Dialect-Options.html
    15. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Objective-C-Dialect-Options.html
--- 17553,17570 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-3.4/changes.html#3.4.6
!    2. https://gcc.gnu.org/gcc-3.4/changes.html#cplusplus
!    3. https://gcc.gnu.org/gcc-3.3/changes.html#obsolete_systems
!    4. https://gcc.gnu.org/gcc-3.4/changes.html#obsolete_systems
!    5. https://gcc.gnu.org/gcc-3.4/mips-abi.html
!    6. https://gcc.gnu.org/gcc-3.4/sparc-abi.html
     7. https://www.boost.org/
     8. https://gcc.gnu.org/PR11953
     9. https://gcc.gnu.org/PR8361
!   10. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Other-Builtins.html#Other Builtins
    11. https://www.open-std.org/jtc1/sc22/wg21/docs/cwg_closed.html#209
!   12. https://gcc.gnu.org/bugs/#cxx_rvalbind
    13. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Objective-C-Dialect-Options.html
    14. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Objective-C-Dialect-Options.html
    15. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Objective-C-Dialect-Options.html
*************** References
*** 17598,17607 ****
    20. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gccint/Processor-pipeline-description.html
    21. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gccint/Comparison-of-the-two-descriptions.html
    22. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gccint/Processor-pipeline-description.html
!   23. http://gcc.gnu.org/gcc-3.4/mips-abi.html
!   24. http://gcc.gnu.org/gcc-3.4/powerpc-abi.html
!   25. http://gcc.gnu.org/gcc-3.4/sparc-abi.html
!   26. https://gcc.gnu.org/bugzilla/buglist.cgi?short_desc_type=notregexp&short_desc=%5C%5B3%5C.4.*%5BRr%5Degression&target_milestone=3.4.0&bug_status=RESOLVED&resolution=FIXED
    27. https://gcc.gnu.org/PR10129
    28. https://gcc.gnu.org/PR14576
    29. https://gcc.gnu.org/PR14760
--- 17575,17584 ----
    20. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gccint/Processor-pipeline-description.html
    21. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gccint/Comparison-of-the-two-descriptions.html
    22. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gccint/Processor-pipeline-description.html
!   23. https://gcc.gnu.org/gcc-3.4/mips-abi.html
!   24. https://gcc.gnu.org/gcc-3.4/powerpc-abi.html
!   25. https://gcc.gnu.org/gcc-3.4/sparc-abi.html
!   26. https://gcc.gnu.org/bugzilla/buglist.cgi?short_desc_type=notregexp&short_desc=\[3\.4.*[Rr]egression&target_milestone=3.4.0&bug_status=RESOLVED&resolution=FIXED
    27. https://gcc.gnu.org/PR10129
    28. https://gcc.gnu.org/PR14576
    29. https://gcc.gnu.org/PR14760
*************** References
*** 17994,18000 ****
   416. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.3/index.html
- 
                               GCC 3.3 Release Series
  
     (This release series is no longer supported.)
--- 17971,17976 ----
*************** References and Acknowledgements
*** 18073,18092 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-3.3/changes.html
     3. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    4. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.6
!    5. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.5
!    6. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.4
!    7. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.3
!    8. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.2
!    9. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.1
!   10. http://gcc.gnu.org/gcc-3.3/changes.html
!   11. http://gcc.gnu.org/gcc-3.3/buildstat.html
    12. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   13. http://gcc.gnu.org/index.html
    14. mailto:gcc@gcc.gnu.org
!   15. http://gcc.gnu.org/mirrors.html
    16. https://gcc.gnu.org/onlinedocs/
    17. mailto:gcc-help@gcc.gnu.org
    18. mailto:gcc@gcc.gnu.org
--- 18049,18068 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-3.3/changes.html
     3. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    4. https://gcc.gnu.org/gcc-3.3/changes.html#3.3.6
!    5. https://gcc.gnu.org/gcc-3.3/changes.html#3.3.5
!    6. https://gcc.gnu.org/gcc-3.3/changes.html#3.3.4
!    7. https://gcc.gnu.org/gcc-3.3/changes.html#3.3.3
!    8. https://gcc.gnu.org/gcc-3.3/changes.html#3.3.2
!    9. https://gcc.gnu.org/gcc-3.3/changes.html#3.3.1
!   10. https://gcc.gnu.org/gcc-3.3/changes.html
!   11. https://gcc.gnu.org/gcc-3.3/buildstat.html
    12. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!   13. https://gcc.gnu.org/index.html
    14. mailto:gcc@gcc.gnu.org
!   15. https://gcc.gnu.org/mirrors.html
    16. https://gcc.gnu.org/onlinedocs/
    17. mailto:gcc-help@gcc.gnu.org
    18. mailto:gcc@gcc.gnu.org
*************** References
*** 18095,18101 ****
    21. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.3/changes.html
- 
                               GCC 3.3 Release Series
                          Changes, New Features, and Fixes
  
--- 18071,18076 ----
*************** GCC 3.3.6
*** 19447,19458 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.6
!    2. http://gcc.gnu.org/gcc-3.1/changes.html#obsolete_systems
!    3. http://gcc.gnu.org/gcc-3.3/changes.html#obsolete_systems
!    4. http://gcc.gnu.org/gcc-3.3/changes.html#nonnull_attribute
!    5. http://gcc.gnu.org/news/dfa.html
!    6. http://gcc.gnu.org/c99status.html
     7. https://gcc.gnu.org/onlinedocs/gcc-3.3.6/g77/News.html
     8. https://gcc.gnu.org/PR10140
     9. https://gcc.gnu.org/PR10198
--- 19422,19433 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-3.3/changes.html#3.3.6
!    2. https://gcc.gnu.org/gcc-3.1/changes.html#obsolete_systems
!    3. https://gcc.gnu.org/gcc-3.3/changes.html#obsolete_systems
!    4. https://gcc.gnu.org/gcc-3.3/changes.html#nonnull_attribute
!    5. https://gcc.gnu.org/news/dfa.html
!    6. https://gcc.gnu.org/c99status.html
     7. https://gcc.gnu.org/onlinedocs/gcc-3.3.6/g77/News.html
     8. https://gcc.gnu.org/PR10140
     9. https://gcc.gnu.org/PR10198
*************** References
*** 20005,20011 ****
   556. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.2/index.html
- 
                               GCC 3.2 Release Series
  
     (This release series is no longer supported.)
--- 19980,19985 ----
*************** References and Acknowledgements
*** 20078,20093 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-3.2/changes.html
!    3. http://gcc.gnu.org/gcc-3.2/changes.html#3.2.3
!    4. http://gcc.gnu.org/gcc-3.2/changes.html#3.2.2
!    5. http://gcc.gnu.org/gcc-3.2/changes.html#3.2.1
!    6. http://gcc.gnu.org/gcc-3.2/changes.html#3.2
!    7. http://gcc.gnu.org/gcc-3.2/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. http://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. http://gcc.gnu.org/mirrors.html
    12. https://gcc.gnu.org/onlinedocs/
    13. mailto:gcc-help@gcc.gnu.org
    14. mailto:gcc@gcc.gnu.org
--- 20052,20067 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-3.2/changes.html
!    3. https://gcc.gnu.org/gcc-3.2/changes.html#3.2.3
!    4. https://gcc.gnu.org/gcc-3.2/changes.html#3.2.2
!    5. https://gcc.gnu.org/gcc-3.2/changes.html#3.2.1
!    6. https://gcc.gnu.org/gcc-3.2/changes.html#3.2
!    7. https://gcc.gnu.org/gcc-3.2/buildstat.html
     8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    9. https://gcc.gnu.org/index.html
    10. mailto:gcc@gcc.gnu.org
!   11. https://gcc.gnu.org/mirrors.html
    12. https://gcc.gnu.org/onlinedocs/
    13. mailto:gcc-help@gcc.gnu.org
    14. mailto:gcc@gcc.gnu.org
*************** References
*** 20096,20102 ****
    17. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.2/changes.html
- 
                               GCC 3.2 Release Series
                          Changes, New Features, and Fixes
  
--- 20070,20075 ----
*************** GCC 3.2
*** 20700,20708 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-3.2/changes.html#3.2.3
!    2. http://gcc.gnu.org/gcc-3.1/changes.html
!    3. http://gcc.gnu.org/gcc-3.2/c++-abi.html
     4. https://gcc.gnu.org/PR3782
     5. https://gcc.gnu.org/PR6440
     6. https://gcc.gnu.org/PR7050
--- 20673,20681 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-3.2/changes.html#3.2.3
!    2. https://gcc.gnu.org/gcc-3.1/changes.html
!    3. https://gcc.gnu.org/gcc-3.2/c++-abi.html
     4. https://gcc.gnu.org/PR3782
     5. https://gcc.gnu.org/PR6440
     6. https://gcc.gnu.org/PR7050
*************** References
*** 20953,20959 ****
   251. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.1/index.html
- 
                                      GCC 3.1
  
     (This release series is no longer supported.)
--- 20926,20931 ----
*************** References
*** 21007,21018 ****
  
     1. http://www.gnu.org/
     2. http://www.gnu.org/
!    3. http://gcc.gnu.org/gcc-3.1/buildstat.html
!    4. http://gcc.gnu.org/gcc-3.1/changes.html
     5. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    6. http://gcc.gnu.org/index.html
     7. mailto:gcc@gcc.gnu.org
!    8. http://gcc.gnu.org/mirrors.html
     9. https://gcc.gnu.org/onlinedocs/
    10. mailto:gcc-help@gcc.gnu.org
    11. mailto:gcc@gcc.gnu.org
--- 20979,20990 ----
  
     1. http://www.gnu.org/
     2. http://www.gnu.org/
!    3. https://gcc.gnu.org/gcc-3.1/buildstat.html
!    4. https://gcc.gnu.org/gcc-3.1/changes.html
     5. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    6. https://gcc.gnu.org/index.html
     7. mailto:gcc@gcc.gnu.org
!    8. https://gcc.gnu.org/mirrors.html
     9. https://gcc.gnu.org/onlinedocs/
    10. mailto:gcc-help@gcc.gnu.org
    11. mailto:gcc@gcc.gnu.org
*************** References
*** 21021,21027 ****
    14. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.1/changes.html
- 
                               GCC 3.1 Release Series
                          Changes, New Features, and Fixes
  
--- 20993,20998 ----
*************** New Targets and Target Specific Improvem
*** 21239,21245 ****
            + For those targets that support it, -mfpmath=sse will cause the
              compiler to generate SSE/SSE2 instructions for floating point
              math instead of x87 instructions. Usually, this will lead to
!             quicker code -- especially on the Pentium 4. Note that only
              scalar floating point instructions are used and GCC does not
              exploit SIMD features yet.
            + Prefetch support has been added to the Pentium III, Pentium 4,
--- 21210,21216 ----
            + For those targets that support it, -mfpmath=sse will cause the
              compiler to generate SSE/SSE2 instructions for floating point
              math instead of x87 instructions. Usually, this will lead to
!             quicker code — especially on the Pentium 4. Note that only
              scalar floating point instructions are used and GCC does not
              exploit SIMD features yet.
            + Prefetch support has been added to the Pentium III, Pentium 4,
*************** Documentation improvements
*** 21360,21368 ****
  References
  
     1. https://gcc.gnu.org/ml/gcc/2002-07/msg01208.html
!    2. http://gcc.gnu.org/news/profiledriven.html
!    3. http://gcc.gnu.org/benchmarks/
!    4. http://gcc.gnu.org/c99status.html
     5. https://gcc.gnu.org/onlinedocs/libstdc++/faq.html
     6. https://gcc.gnu.org/onlinedocs/gcc-3.1.1/g77/News.html
     7. https://www.adacore.com/
--- 21331,21339 ----
  References
  
     1. https://gcc.gnu.org/ml/gcc/2002-07/msg01208.html
!    2. https://gcc.gnu.org/news/profiledriven.html
!    3. https://gcc.gnu.org/benchmarks/
!    4. https://gcc.gnu.org/c99status.html
     5. https://gcc.gnu.org/onlinedocs/libstdc++/faq.html
     6. https://gcc.gnu.org/onlinedocs/gcc-3.1.1/g77/News.html
     7. https://www.adacore.com/
*************** References
*** 21374,21380 ****
    13. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.0/index.html
- 
                                     GCC 3.0.4
  
     (This release series is no longer supported.)
--- 21345,21350 ----
*************** Previous 3.0.x Releases
*** 21434,21446 ****
  References
  
     1. http://www.gnu.org/
!    2. http://gcc.gnu.org/gcc-3.0/features.html
!    3. http://gcc.gnu.org/gcc-3.0/buildstat.html
     4. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    5. http://gcc.gnu.org/gcc-3.0/caveats.html
!    6. http://gcc.gnu.org/index.html
     7. mailto:gcc@gcc.gnu.org
!    8. http://gcc.gnu.org/mirrors.html
     9. https://gcc.gnu.org/onlinedocs/
    10. mailto:gcc-help@gcc.gnu.org
    11. mailto:gcc@gcc.gnu.org
--- 21404,21416 ----
  References
  
     1. http://www.gnu.org/
!    2. https://gcc.gnu.org/gcc-3.0/features.html
!    3. https://gcc.gnu.org/gcc-3.0/buildstat.html
     4. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    5. https://gcc.gnu.org/gcc-3.0/caveats.html
!    6. https://gcc.gnu.org/index.html
     7. mailto:gcc@gcc.gnu.org
!    8. https://gcc.gnu.org/mirrors.html
     9. https://gcc.gnu.org/onlinedocs/
    10. mailto:gcc-help@gcc.gnu.org
    11. mailto:gcc@gcc.gnu.org
*************** References
*** 21449,21455 ****
    14. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.0/features.html
- 
                                GCC 3.0 New Features
  
  Additional changes in GCC 3.0.4
--- 21419,21424 ----
*************** Other significant improvements
*** 21625,21641 ****
  References
  
     1. http://www.netbsd.org/
!    2. http://gcc.gnu.org/news/reorder.html
!    3. http://gcc.gnu.org/news/ssa.html
!    4. http://gcc.gnu.org/news/null.html
!    5. http://gcc.gnu.org/news/unify.html
!    6. http://gcc.gnu.org/gcc-3.0/c++features.html
!    7. http://gcc.gnu.org/news/inlining.html
!    8. http://gcc.gnu.org/news/dependencies.html
!    9. http://gcc.gnu.org/c99status.html
    10. https://gcc.gnu.org/onlinedocs/gcc-3.4.6/g77/News.html
!   11. http://gcc.gnu.org/gcc-3.0/libgcc.html
!   12. http://gcc.gnu.org/gcc-2.95/features.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
--- 21594,21610 ----
  References
  
     1. http://www.netbsd.org/
!    2. https://gcc.gnu.org/news/reorder.html
!    3. https://gcc.gnu.org/news/ssa.html
!    4. https://gcc.gnu.org/news/null.html
!    5. https://gcc.gnu.org/news/unify.html
!    6. https://gcc.gnu.org/gcc-3.0/c++features.html
!    7. https://gcc.gnu.org/news/inlining.html
!    8. https://gcc.gnu.org/news/dependencies.html
!    9. https://gcc.gnu.org/c99status.html
    10. https://gcc.gnu.org/onlinedocs/gcc-3.4.6/g77/News.html
!   11. https://gcc.gnu.org/gcc-3.0/libgcc.html
!   12. https://gcc.gnu.org/gcc-2.95/features.html
    13. https://gcc.gnu.org/onlinedocs/
    14. mailto:gcc-help@gcc.gnu.org
    15. mailto:gcc@gcc.gnu.org
*************** References
*** 21644,21650 ****
    18. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-3.0/caveats.html
- 
                                  GCC 3.0 Caveats
  
       * -fstrict-aliasing is now part of -O2 and higher optimization
--- 21613,21618 ----
*************** References
*** 21704,21710 ****
     7. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-2.95/index.html
- 
                                      GCC 2.95
  
     (This release series is no longer supported.)
--- 21672,21677 ----
*************** References and Acknowledgements
*** 21777,21790 ****
  
  References
  
!    1. http://gcc.gnu.org/gcc-2.95/regress.html
!    2. http://gcc.gnu.org/gcc-2.95/othertest.html
!    3. http://gcc.gnu.org/gcc-2.95/features.html
!    4. http://gcc.gnu.org/gcc-2.95/buildstat.html
     5. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    6. http://gcc.gnu.org/gcc-2.95/caveats.html
!    7. http://gcc.gnu.org/mirrors.html
!    8. http://gcc.gnu.org/index.html
     9. mailto:gcc@gcc.gnu.org
    10. https://gcc.gnu.org/onlinedocs/
    11. mailto:gcc-help@gcc.gnu.org
--- 21744,21757 ----
  
  References
  
!    1. https://gcc.gnu.org/gcc-2.95/regress.html
!    2. https://gcc.gnu.org/gcc-2.95/othertest.html
!    3. https://gcc.gnu.org/gcc-2.95/features.html
!    4. https://gcc.gnu.org/gcc-2.95/buildstat.html
     5. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    6. https://gcc.gnu.org/gcc-2.95/caveats.html
!    7. https://gcc.gnu.org/mirrors.html
!    8. https://gcc.gnu.org/index.html
     9. mailto:gcc@gcc.gnu.org
    10. https://gcc.gnu.org/onlinedocs/
    11. mailto:gcc-help@gcc.gnu.org
*************** References
*** 21794,21800 ****
    15. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-2.95/features.html
- 
                               GCC 2.95 New Features
  
       * General Optimizer Improvements:
--- 21761,21766 ----
*************** http://gcc.gnu.org/gcc-2.95/features.htm
*** 21823,21829 ****
            + More support for various pragmas which appear in vendor
              include files
       * New Targets and Target Specific Improvements
!           + [14]SPARC backend rewrite.
            + -mschedule=8000 will optimize code for PA8000 class
              processors; -mpa-risc-2-0 will generate code for PA2.0
              processors
--- 21789,21795 ----
            + More support for various pragmas which appear in vendor
              include files
       * New Targets and Target Specific Improvements
!           + [14]SPARC back end rewrite.
            + -mschedule=8000 will optimize code for PA8000 class
              processors; -mpa-risc-2-0 will generate code for PA2.0
              processors
*************** Additional Changes in GCC 2.95.2
*** 21963,21969 ****
       * Platform specific bugfixes and improvements
            + Work around bug in Sun V5.0 compilers which caused bootstrap
              comparison failures on SPARC targets.
!           + Fix SPARC backend bug which caused aborts in final.c.
            + Fix sparc-hal-solaris2* configuration fragments.
            + Fix bug in sparc block profiling.
            + Fix obscure code generation bug for the PARISC targets.
--- 21929,21935 ----
       * Platform specific bugfixes and improvements
            + Work around bug in Sun V5.0 compilers which caused bootstrap
              comparison failures on SPARC targets.
!           + Fix SPARC back end bug which caused aborts in final.c.
            + Fix sparc-hal-solaris2* configuration fragments.
            + Fix bug in sparc block profiling.
            + Fix obscure code generation bug for the PARISC targets.
*************** Additional Changes in GCC 2.95.3
*** 22038,22063 ****
     provided this notice is preserved.
  
     These pages are [22]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
!    1. http://gcc.gnu.org/news/spill.html
!    2. http://gcc.gnu.org/news/lcm.html
!    3. http://gcc.gnu.org/news/cprop.html
!    4. http://gcc.gnu.org/news/cfg.html
!    5. http://gcc.gnu.org/news/dse.html
!    6. http://gcc.gnu.org/news/hoist.html
!    7. http://gcc.gnu.org/news/alias.html
!    8. http://gcc.gnu.org/gcc-2.95/c++features.html
     9. https://gcc.gnu.org/onlinedocs/gcc-3.4.6/g77/News.html
!   10. http://gcc.gnu.org/news/gcj-announce.txt
!   11. http://gcc.gnu.org/news/javaannounce.html
!   12. http://gcc.gnu.org/c99status.html
!   13. http://gcc.gnu.org/news/chill.html
!   14. http://gcc.gnu.org/news/sparc.html
!   15. http://gcc.gnu.org/news/egcs-vcg.html
!   16. http://gcc.gnu.org/egcs-1.0/features-2.8.html
    17. https://gcc.gnu.org/onlinedocs/
    18. mailto:gcc-help@gcc.gnu.org
    19. mailto:gcc@gcc.gnu.org
--- 22004,22029 ----
     provided this notice is preserved.
  
     These pages are [22]maintained by the GCC team. Last modified
!    2023-09-02.
  
  References
  
!    1. https://gcc.gnu.org/news/spill.html
!    2. https://gcc.gnu.org/news/lcm.html
!    3. https://gcc.gnu.org/news/cprop.html
!    4. https://gcc.gnu.org/news/cfg.html
!    5. https://gcc.gnu.org/news/dse.html
!    6. https://gcc.gnu.org/news/hoist.html
!    7. https://gcc.gnu.org/news/alias.html
!    8. https://gcc.gnu.org/gcc-2.95/c++features.html
     9. https://gcc.gnu.org/onlinedocs/gcc-3.4.6/g77/News.html
!   10. https://gcc.gnu.org/news/gcj-announce.txt
!   11. https://gcc.gnu.org/news/javaannounce.html
!   12. https://gcc.gnu.org/c99status.html
!   13. https://gcc.gnu.org/news/chill.html
!   14. https://gcc.gnu.org/news/sparc.html
!   15. https://gcc.gnu.org/news/egcs-vcg.html
!   16. https://gcc.gnu.org/egcs-1.0/features-2.8.html
    17. https://gcc.gnu.org/onlinedocs/
    18. mailto:gcc-help@gcc.gnu.org
    19. mailto:gcc@gcc.gnu.org
*************** References
*** 22066,22072 ****
    22. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/gcc-2.95/caveats.html
- 
                                  GCC 2.95 Caveats
  
       * GCC 2.95 will issue an error for invalid asm statements that had
--- 22032,22037 ----
*************** References
*** 22134,22140 ****
     7. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/egcs-1.1/index.html
- 
                                      EGCS 1.1
  
     September 3, 1998: We are pleased to announce the release of EGCS 1.1.
--- 22099,22104 ----
*************** http://gcc.gnu.org/egcs-1.1/index.html
*** 22161,22167 ****
       * Vastly improved [4]C++ compiler and integrated C++ runtime
         libraries.
       * Fixes for the /tmp symlink race security problems.
!      * New targets including mips16, arm-thumb and 64 bit PowerPC.
       * Improvements to GNU Fortran (g77) compiler and runtime library made
         since g77 version 0.5.23.
  
--- 22125,22131 ----
       * Vastly improved [4]C++ compiler and integrated C++ runtime
         libraries.
       * Fixes for the /tmp symlink race security problems.
!      * New targets including mips16, arm-thumb and 64-bit PowerPC.
       * Improvements to GNU Fortran (g77) compiler and runtime library made
         since g77 version 0.5.23.
  
*************** http://gcc.gnu.org/egcs-1.1/index.html
*** 22205,22211 ****
            + Fix a few arm code generation bugs.
            + Fixincludes will fix additional broken SCO OpenServer header
              files.
!           + Fix a m68k backend bug which caused invalid offsets in reg+d
              addresses.
            + Fix problems with 64bit AIX 4.3 support.
            + Fix handling of long longs for varargs/stdarg functions on the
--- 22169,22175 ----
            + Fix a few arm code generation bugs.
            + Fixincludes will fix additional broken SCO OpenServer header
              files.
!           + Fix a m68k back end bug which caused invalid offsets in reg+d
              addresses.
            + Fix problems with 64bit AIX 4.3 support.
            + Fix handling of long longs for varargs/stdarg functions on the
*************** http://gcc.gnu.org/egcs-1.1/index.html
*** 22342,22360 ****
     provided this notice is preserved.
  
     These pages are [15]maintained by the GCC team. Last modified
!    2023-01-21.
  
  References
  
!    1. http://gcc.gnu.org/egcs-1.1/egcs-1.1-test.html
!    2. http://gcc.gnu.org/news/gcse.html
!    3. http://gcc.gnu.org/news/alias.html
!    4. http://gcc.gnu.org/egcs-1.1/c++features.html
!    5. http://gcc.gnu.org/egcs-1.1/features.html
!    6. http://gcc.gnu.org/egcs-1.1/buildstat.html
     7. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    8. http://gcc.gnu.org/egcs-1.1/caveats.html
!    9. http://gcc.gnu.org/mirrors.html
    10. https://gcc.gnu.org/onlinedocs/
    11. mailto:gcc-help@gcc.gnu.org
    12. mailto:gcc@gcc.gnu.org
--- 22306,22324 ----
     provided this notice is preserved.
  
     These pages are [15]maintained by the GCC team. Last modified
!    2024-05-18.
  
  References
  
!    1. https://gcc.gnu.org/egcs-1.1/egcs-1.1-test.html
!    2. https://gcc.gnu.org/news/gcse.html
!    3. https://gcc.gnu.org/news/alias.html
!    4. https://gcc.gnu.org/egcs-1.1/c++features.html
!    5. https://gcc.gnu.org/egcs-1.1/features.html
!    6. https://gcc.gnu.org/egcs-1.1/buildstat.html
     7. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
!    8. https://gcc.gnu.org/egcs-1.1/caveats.html
!    9. https://gcc.gnu.org/mirrors.html
    10. https://gcc.gnu.org/onlinedocs/
    11. mailto:gcc-help@gcc.gnu.org
    12. mailto:gcc@gcc.gnu.org
*************** References
*** 22363,22369 ****
    15. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/egcs-1.1/features.html
- 
                               EGCS 1.1 new features
  
       * Integrated GNU Fortran (g77) compiler and runtime library with
--- 22327,22332 ----
*************** http://gcc.gnu.org/egcs-1.1/features.htm
*** 22418,22424 ****
              Intel recommendations now. Various improvements throughout the
              x86 port to improve performance on Pentium processors
              (including improved epilogue sequences for Pentium chips and
!             backend improvements which should help register allocation on
              all x86 variants. Conditional move support has been fixed and
              enabled for PPro processors. The x86 port also better supports
              64bit operations now. Unixware 7, a System V Release 5 target,
--- 22381,22387 ----
              Intel recommendations now. Various improvements throughout the
              x86 port to improve performance on Pentium processors
              (including improved epilogue sequences for Pentium chips and
!             back end improvements which should help register allocation on
              all x86 variants. Conditional move support has been fixed and
              enabled for PPro processors. The x86 port also better supports
              64bit operations now. Unixware 7, a System V Release 5 target,
*************** http://gcc.gnu.org/egcs-1.1/features.htm
*** 22441,22454 ****
     provided this notice is preserved.
  
     These pages are [10]maintained by the GCC team. Last modified
!    2022-10-26.
  
  References
  
!    1. http://gcc.gnu.org/egcs-1.1/c++features.html
!    2. http://gcc.gnu.org/news/gcse.html
!    3. http://gcc.gnu.org/news/alias.html
!    4. http://gcc.gnu.org/egcs-1.0/features-2.8.html
     5. https://gcc.gnu.org/onlinedocs/
     6. mailto:gcc-help@gcc.gnu.org
     7. mailto:gcc@gcc.gnu.org
--- 22404,22417 ----
     provided this notice is preserved.
  
     These pages are [10]maintained by the GCC team. Last modified
!    2023-09-02.
  
  References
  
!    1. https://gcc.gnu.org/egcs-1.1/c++features.html
!    2. https://gcc.gnu.org/news/gcse.html
!    3. https://gcc.gnu.org/news/alias.html
!    4. https://gcc.gnu.org/egcs-1.0/features-2.8.html
     5. https://gcc.gnu.org/onlinedocs/
     6. mailto:gcc-help@gcc.gnu.org
     7. mailto:gcc@gcc.gnu.org
*************** References
*** 22457,22463 ****
    10. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/egcs-1.1/caveats.html
- 
                                  EGCS 1.1 Caveats
  
       * EGCS has an integrated libstdc++, but does not have an integrated
--- 22420,22425 ----
*************** References
*** 22507,22513 ****
     6. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/egcs-1.0/index.html
- 
                                      EGCS 1.0
  
     December 3, 1997: We are pleased to announce the release of EGCS 1.0.
--- 22469,22474 ----
*************** http://gcc.gnu.org/egcs-1.0/index.html
*** 22616,22622 ****
            + Add missing entries to g77 lang-options.
            + Fix problem with -fpedantic in the g77 compiler.
            + Fix "backspace" problem with g77 on alphas.
!           + Fix x86 backend problem with Fortran literals and -fpic.
            + Fix some of the problems with negative subscripts for g77 on
              alphas.
            + Fixes for Fortran builds on cygwin32/mingw32.
--- 22577,22583 ----
            + Add missing entries to g77 lang-options.
            + Fix problem with -fpedantic in the g77 compiler.
            + Fix "backspace" problem with g77 on alphas.
!           + Fix x86 back end problem with Fortran literals and -fpic.
            + Fix some of the problems with negative subscripts for g77 on
              alphas.
            + Fixes for Fortran builds on cygwin32/mingw32.
*************** http://gcc.gnu.org/egcs-1.0/index.html
*** 22691,22704 ****
     provided this notice is preserved.
  
     These pages are [10]maintained by the GCC team. Last modified
!    2023-01-21.
  
  References
  
!    1. http://gcc.gnu.org/egcs-1.0/features.html
!    2. http://gcc.gnu.org/egcs-1.0/buildstat.html
!    3. http://gcc.gnu.org/egcs-1.0/caveats.html
!    4. http://gcc.gnu.org/mirrors.html
     5. https://gcc.gnu.org/onlinedocs/
     6. mailto:gcc-help@gcc.gnu.org
     7. mailto:gcc@gcc.gnu.org
--- 22652,22665 ----
     provided this notice is preserved.
  
     These pages are [10]maintained by the GCC team. Last modified
!    2023-09-02.
  
  References
  
!    1. https://gcc.gnu.org/egcs-1.0/features.html
!    2. https://gcc.gnu.org/egcs-1.0/buildstat.html
!    3. https://gcc.gnu.org/egcs-1.0/caveats.html
!    4. https://gcc.gnu.org/mirrors.html
     5. https://gcc.gnu.org/onlinedocs/
     6. mailto:gcc-help@gcc.gnu.org
     7. mailto:gcc@gcc.gnu.org
*************** References
*** 22707,22713 ****
    10. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/egcs-1.0/features.html
- 
                                 EGCS 1.0 features
  
       * Core compiler is based on the gcc2 development tree from Aug 2,
--- 22668,22673 ----
*************** http://gcc.gnu.org/egcs-1.0/features.htm
*** 22761,22768 ****
  
  References
  
!    1. http://gcc.gnu.org/egcs-1.0/features-2.8.html
!    2. http://gcc.gnu.org/egcs-1.0/c++features.html
     3. https://gcc.gnu.org/onlinedocs/
     4. mailto:gcc-help@gcc.gnu.org
     5. mailto:gcc@gcc.gnu.org
--- 22721,22728 ----
  
  References
  
!    1. https://gcc.gnu.org/egcs-1.0/features-2.8.html
!    2. https://gcc.gnu.org/egcs-1.0/c++features.html
     3. https://gcc.gnu.org/onlinedocs/
     4. mailto:gcc-help@gcc.gnu.org
     5. mailto:gcc@gcc.gnu.org
*************** References
*** 22771,22777 ****
     8. https://gcc.gnu.org/about.html
  ======================================================================
  http://gcc.gnu.org/egcs-1.0/caveats.html
- 
                                  EGCS 1.0 Caveats
  
       * EGCS has an integrated libstdc++, but does not have an integrated
--- 22731,22736 ----
diff -Nrcpad gcc-12.3.0/c++tools/ChangeLog gcc-12.4.0/c++tools/ChangeLog
*** gcc-12.3.0/c++tools/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/c++tools/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/config/ChangeLog gcc-12.4.0/config/ChangeLog
*** gcc-12.3.0/config/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/config/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/configure gcc-12.4.0/configure
*** gcc-12.3.0/configure	Mon May  8 12:14:39 2023
--- gcc-12.4.0/configure	Thu Jun 20 08:10:28 2024
*************** fi
*** 8646,8652 ****
  # Check whether --enable-host-shared was given.
  if test "${enable_host_shared+set}" = set; then :
    enableval=$enable_host_shared; host_shared=$enableval
!  case $target in
     x86_64-*-darwin* | aarch64-*-darwin*)
       if test x$host_shared != xyes ; then
         # PIC is the default, and actually cannot be switched off.
--- 8646,8652 ----
  # Check whether --enable-host-shared was given.
  if test "${enable_host_shared+set}" = set; then :
    enableval=$enable_host_shared; host_shared=$enableval
!  case $host in
     x86_64-*-darwin* | aarch64-*-darwin*)
       if test x$host_shared != xyes ; then
         # PIC is the default, and actually cannot be switched off.
diff -Nrcpad gcc-12.3.0/configure.ac gcc-12.4.0/configure.ac
*** gcc-12.3.0/configure.ac	Mon May  8 12:14:39 2023
--- gcc-12.4.0/configure.ac	Thu Jun 20 08:08:05 2024
*************** AC_ARG_ENABLE(host-shared,
*** 1918,1924 ****
  [AS_HELP_STRING([--enable-host-shared],
  		[build host code as shared libraries])],
  [host_shared=$enableval
!  case $target in
     x86_64-*-darwin* | aarch64-*-darwin*)
       if test x$host_shared != xyes ; then
         # PIC is the default, and actually cannot be switched off.
--- 1918,1924 ----
  [AS_HELP_STRING([--enable-host-shared],
  		[build host code as shared libraries])],
  [host_shared=$enableval
!  case $host in
     x86_64-*-darwin* | aarch64-*-darwin*)
       if test x$host_shared != xyes ; then
         # PIC is the default, and actually cannot be switched off.
diff -Nrcpad gcc-12.3.0/contrib/ChangeLog gcc-12.4.0/contrib/ChangeLog
*** gcc-12.3.0/contrib/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/contrib/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/contrib/header-tools/ChangeLog gcc-12.4.0/contrib/header-tools/ChangeLog
*** gcc-12.3.0/contrib/header-tools/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/contrib/header-tools/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/contrib/reghunt/ChangeLog gcc-12.4.0/contrib/reghunt/ChangeLog
*** gcc-12.3.0/contrib/reghunt/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/contrib/reghunt/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/contrib/regression/ChangeLog gcc-12.4.0/contrib/regression/ChangeLog
*** gcc-12.3.0/contrib/regression/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/contrib/regression/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/fixincludes/ChangeLog gcc-12.4.0/fixincludes/ChangeLog
*** gcc-12.3.0/fixincludes/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/fixincludes/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,34 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-04-04  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-01-21  Iain Sandoe  
+ 
+ 	* fixincl.x: Regenerate.
+ 	* inclhack.def (darwin_objc_runtime_1): New hack.
+ 	* tests/base/objc/runtime.h: New file.
+ 
+ 2024-04-04  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-01-21  Iain Sandoe  
+ 
+ 	PR target/107568
+ 	* fixincl.x: Regenerate.
+ 	* inclhack.def: Add a fix for MacOS13 SDK function deprecations
+ 	in stdio.h.
+ 	* tests/base/stdio.h (__deprecated_msg): New test.
+ 
+ 2023-12-11  Rainer Orth  
+ 
+ 	* inclhack.def (darwin_flt_eval_method): Handle macOS 14 guard
+ 	variant.
+ 	* fixincl.x: Regenerate.
+ 	* tests/base/math.h [DARWIN_FLT_EVAL_METHOD_CHECK]: Update test.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/fixincludes/fixincl.x gcc-12.4.0/fixincludes/fixincl.x
*** gcc-12.3.0/fixincludes/fixincl.x	Mon May  8 12:14:39 2023
--- gcc-12.4.0/fixincludes/fixincl.x	Thu Jun 20 08:08:05 2024
***************
*** 2,12 ****
   *
   * DO NOT EDIT THIS FILE   (fixincl.x)
   *
!  * It has been AutoGen-ed  February 27, 2022 at 07:47:03 PM by AutoGen 5.18.16
   * From the definitions    inclhack.def
   * and the template file   fixincl
   */
! /* DO NOT SVN-MERGE THIS FILE, EITHER Sun Feb 27 19:47:03 UTC 2022
   *
   * You must regenerate it.  Use the ./genfixes script.
   *
--- 2,12 ----
   *
   * DO NOT EDIT THIS FILE   (fixincl.x)
   *
!  * It has been AutoGen-ed  March 30, 2024 at 04:03:59 PM by AutoGen 5.18.7
   * From the definitions    inclhack.def
   * and the template file   fixincl
   */
! /* DO NOT SVN-MERGE THIS FILE, EITHER Sat Mar 30 16:03:59 GMT 2024
   *
   * You must regenerate it.  Use the ./genfixes script.
   *
***************
*** 15,21 ****
   * certain ANSI-incompatible system header files which are fixed to work
   * correctly with ANSI C and placed in a directory that GNU C will search.
   *
!  * This file contains 267 fixup descriptions.
   *
   * See README for more information.
   *
--- 15,21 ----
   * certain ANSI-incompatible system header files which are fixed to work
   * correctly with ANSI C and placed in a directory that GNU C will search.
   *
!  * This file contains 269 fixup descriptions.
   *
   * See README for more information.
   *
*************** int vfscanf(FILE *, const char *, __buil
*** 2610,2615 ****
--- 2610,2655 ----
  
  /* * * * * * * * * * * * * * * * * * * * * * * * * *
   *
+  *  Description of Apple_Local_Stdio_Fn_Deprecation fix
+  */
+ tSCC zApple_Local_Stdio_Fn_DeprecationName[] =
+      "apple_local_stdio_fn_deprecation";
+ 
+ /*
+  *  File name selection pattern
+  */
+ tSCC zApple_Local_Stdio_Fn_DeprecationList[] =
+   "stdio.h\0";
+ /*
+  *  Machine/OS name selection pattern
+  */
+ tSCC* apzApple_Local_Stdio_Fn_DeprecationMachs[] = {
+         "*-*-*darwin2*",
+         (const char*)NULL };
+ 
+ /*
+  *  content selection pattern - do fix if pattern found
+  */
+ tSCC zApple_Local_Stdio_Fn_DeprecationSelect0[] =
+        "__deprecated_msg([^\n\
+ ]*)$";
+ 
+ #define    APPLE_LOCAL_STDIO_FN_DEPRECATION_TEST_CT  1
+ static tTestDesc aApple_Local_Stdio_Fn_DeprecationTests[] = {
+   { TT_EGREP,    zApple_Local_Stdio_Fn_DeprecationSelect0, (regex_t*)NULL }, };
+ 
+ /*
+  *  Fix Command Arguments for Apple_Local_Stdio_Fn_Deprecation
+  */
+ static const char* apzApple_Local_Stdio_Fn_DeprecationPatch[] = {
+     "format",
+     "#if defined(__APPLE_LOCAL_DEPRECATIONS)\n\
+ %0\n\
+ #endif",
+     (char*)NULL };
+ 
+ /* * * * * * * * * * * * * * * * * * * * * * * * * *
+  *
   *  Description of Ctrl_Quotes_Def fix
   */
  tSCC zCtrl_Quotes_DefName[] =
*************** static const char* apzDarwin_Os_Trace_2P
*** 3046,3051 ****
--- 3086,3138 ----
  
  /* * * * * * * * * * * * * * * * * * * * * * * * * *
   *
+  *  Description of Darwin_Objc_Runtime_1 fix
+  */
+ tSCC zDarwin_Objc_Runtime_1Name[] =
+      "darwin_objc_runtime_1";
+ 
+ /*
+  *  File name selection pattern
+  */
+ tSCC zDarwin_Objc_Runtime_1List[] =
+   "objc/runtime.h\0";
+ /*
+  *  Machine/OS name selection pattern
+  */
+ tSCC* apzDarwin_Objc_Runtime_1Machs[] = {
+         "*-*-darwin2*",
+         (const char*)NULL };
+ 
+ /*
+  *  content selection pattern - do fix if pattern found
+  */
+ tSCC zDarwin_Objc_Runtime_1Select0[] =
+        "OBJC_EXPORT void.*\n\
+ objc_enumerateClasses.*\n\
+ .*\n\
+ .*\n\
+ .*\n\
+ .*void \\(\\^ _Nonnull block.*\n\
+ .*\n\
+ .*\n\
+ .*OBJC_REFINED_FOR_SWIFT.*";
+ 
+ #define    DARWIN_OBJC_RUNTIME_1_TEST_CT  1
+ static tTestDesc aDarwin_Objc_Runtime_1Tests[] = {
+   { TT_EGREP,    zDarwin_Objc_Runtime_1Select0, (regex_t*)NULL }, };
+ 
+ /*
+  *  Fix Command Arguments for Darwin_Objc_Runtime_1
+  */
+ static const char* apzDarwin_Objc_Runtime_1Patch[] = {
+     "format",
+     "#if __BLOCKS__\n\
+ %0\n\
+ #endif",
+     (char*)NULL };
+ 
+ /* * * * * * * * * * * * * * * * * * * * * * * * * *
+  *
   *  Description of Darwin_Os_Trace_3 fix
   */
  tSCC zDarwin_Os_Trace_3Name[] =
*************** tSCC* apzDarwin_Flt_Eval_MethodMachs[] =
*** 3587,3593 ****
   *  content selection pattern - do fix if pattern found
   */
  tSCC zDarwin_Flt_Eval_MethodSelect0[] =
!        "^#if __FLT_EVAL_METHOD__ == 0$";
  
  #define    DARWIN_FLT_EVAL_METHOD_TEST_CT  1
  static tTestDesc aDarwin_Flt_Eval_MethodTests[] = {
--- 3674,3680 ----
   *  content selection pattern - do fix if pattern found
   */
  tSCC zDarwin_Flt_Eval_MethodSelect0[] =
!        "^#if __FLT_EVAL_METHOD__ == 0( \\|\\| __FLT_EVAL_METHOD__ == -1)?$";
  
  #define    DARWIN_FLT_EVAL_METHOD_TEST_CT  1
  static tTestDesc aDarwin_Flt_Eval_MethodTests[] = {
*************** static tTestDesc aDarwin_Flt_Eval_Method
*** 3598,3604 ****
   */
  static const char* apzDarwin_Flt_Eval_MethodPatch[] = {
      "format",
!     "#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16",
      (char*)NULL };
  
  /* * * * * * * * * * * * * * * * * * * * * * * * * *
--- 3685,3691 ----
   */
  static const char* apzDarwin_Flt_Eval_MethodPatch[] = {
      "format",
!     "%0 || __FLT_EVAL_METHOD__ == 16",
      (char*)NULL };
  
  /* * * * * * * * * * * * * * * * * * * * * * * * * *
*************** static const char* apzX11_SprintfPatch[]
*** 10872,10880 ****
   *
   *  List of all fixes
   */
! #define REGEX_COUNT          305
  #define MACH_LIST_SIZE_LIMIT 187
! #define FIX_COUNT            267
  
  /*
   *  Enumerate the fixes
--- 10959,10967 ----
   *
   *  List of all fixes
   */
! #define REGEX_COUNT          307
  #define MACH_LIST_SIZE_LIMIT 187
! #define FIX_COUNT            269
  
  /*
   *  Enumerate the fixes
*************** typedef enum {
*** 10941,10946 ****
--- 11028,11034 ----
      BROKEN_CABS_FIXIDX,
      BROKEN_NAN_FIXIDX,
      BSD_STDIO_ATTRS_CONFLICT_FIXIDX,
+     APPLE_LOCAL_STDIO_FN_DEPRECATION_FIXIDX,
      CTRL_QUOTES_DEF_FIXIDX,
      CTRL_QUOTES_USE_FIXIDX,
      CXX_UNREADY_FIXIDX,
*************** typedef enum {
*** 10952,10957 ****
--- 11040,11046 ----
      DARWIN_LONGJMP_NORETURN_FIXIDX,
      DARWIN_OS_TRACE_1_FIXIDX,
      DARWIN_OS_TRACE_2_FIXIDX,
+     DARWIN_OBJC_RUNTIME_1_FIXIDX,
      DARWIN_OS_TRACE_3_FIXIDX,
      DARWIN_OS_BASE_1_FIXIDX,
      DARWIN_DISPATCH_OBJECT_1_FIXIDX,
*************** tFixDesc fixDescList[ FIX_COUNT ] = {
*** 11455,11460 ****
--- 11544,11554 ----
       BSD_STDIO_ATTRS_CONFLICT_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
       aBsd_Stdio_Attrs_ConflictTests,   apzBsd_Stdio_Attrs_ConflictPatch, 0 },
  
+   {  zApple_Local_Stdio_Fn_DeprecationName,    zApple_Local_Stdio_Fn_DeprecationList,
+      apzApple_Local_Stdio_Fn_DeprecationMachs,
+      APPLE_LOCAL_STDIO_FN_DEPRECATION_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
+      aApple_Local_Stdio_Fn_DeprecationTests,   apzApple_Local_Stdio_Fn_DeprecationPatch, 0 },
+ 
    {  zCtrl_Quotes_DefName,    zCtrl_Quotes_DefList,
       apzCtrl_Quotes_DefMachs,
       CTRL_QUOTES_DEF_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
*************** tFixDesc fixDescList[ FIX_COUNT ] = {
*** 11510,11515 ****
--- 11604,11614 ----
       DARWIN_OS_TRACE_2_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
       aDarwin_Os_Trace_2Tests,   apzDarwin_Os_Trace_2Patch, 0 },
  
+   {  zDarwin_Objc_Runtime_1Name,    zDarwin_Objc_Runtime_1List,
+      apzDarwin_Objc_Runtime_1Machs,
+      DARWIN_OBJC_RUNTIME_1_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
+      aDarwin_Objc_Runtime_1Tests,   apzDarwin_Objc_Runtime_1Patch, 0 },
+ 
    {  zDarwin_Os_Trace_3Name,    zDarwin_Os_Trace_3List,
       apzDarwin_Os_Trace_3Machs,
       DARWIN_OS_TRACE_3_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
diff -Nrcpad gcc-12.3.0/fixincludes/inclhack.def gcc-12.4.0/fixincludes/inclhack.def
*** gcc-12.3.0/fixincludes/inclhack.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/fixincludes/inclhack.def	Thu Jun 20 08:08:05 2024
*************** fix = {
*** 1269,1274 ****
--- 1269,1286 ----
      test_text = '#define  vfscanf	__svfscanf';
  };
  
+ fix = {
+     hackname  = apple_local_stdio_fn_deprecation;
+     mach      = "*-*-*darwin2*";
+     files     = stdio.h;
+     select    = "__deprecated_msg([^\n]*)$";
+     c_fix     = format;
+     c_fix_arg = "#if defined(__APPLE_LOCAL_DEPRECATIONS)\n"
+                 "%0\n"
+                 "#endif";
+     test_text = '__deprecated_msg("This function is provided for compat...")';
+ };
+ 
  /*
   *  Fix various macros used to define ioctl numbers.
   *  The traditional syntax was:
*************** fix = {
*** 1480,1485 ****
--- 1492,1532 ----
  };
  
  /*
+  *  macOSX 13.0 SDK objc/runtime.h uses Apple Blocks extension without a guard.
+  */
+ 
+ fix = {
+   hackname  = darwin_objc_runtime_1;
+   mach      = "*-*-darwin2*";
+   files     = objc/runtime.h;
+   select    =   <<- _EOSelect_
+ 	OBJC_EXPORT void.*
+ 	objc_enumerateClasses.*
+ 	.*
+ 	.*
+ 	.*
+ 	.*void \(\^ _Nonnull block.*
+ 	.*
+ 	.*
+ 	.*OBJC_REFINED_FOR_SWIFT.*
+ 	_EOSelect_;
+   c_fix     = format;
+   c_fix_arg = "#if __BLOCKS__\n%0\n#endif";
+   test_text = <<- _OBJC_RUNTIME_1
+ OBJC_EXPORT void
+ objc_enumerateClasses(const void * _Nullable image,
+                       const char * _Nullable namePrefix,
+                       Protocol * _Nullable conformingTo,
+                       Class _Nullable subclassing,
+                       void (^ _Nonnull block)(Class _Nonnull aClass, BOOL * _Nonnull stop)
+                       OBJC_NOESCAPE)
+ OBJC_AVAILABLE(13.0, 16.0, 16.0, 9.0, 7.0)
+ OBJC_REFINED_FOR_SWIFT;
+ _OBJC_RUNTIME_1;
+ };
+ 
+ 
+ /*
   *  In Mac OS X 10.1[012] , need to guard users of
   *  os_trace_payload_t typedef, too.
   */
*************** fix = {
*** 1772,1781 ****
      hackname  = darwin_flt_eval_method;
      mach      = "*-*-darwin*";
      files     = math.h;
!     select    = "^#if __FLT_EVAL_METHOD__ == 0$";
      c_fix     = format;
!     c_fix_arg = "#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16";
!     test_text = "#if __FLT_EVAL_METHOD__ == 0";
  };
  
  /*
--- 1819,1829 ----
      hackname  = darwin_flt_eval_method;
      mach      = "*-*-darwin*";
      files     = math.h;
!     select    = "^#if __FLT_EVAL_METHOD__ == 0( \\|\\| __FLT_EVAL_METHOD__ == -1)?$";
      c_fix     = format;
!     c_fix_arg = "%0 || __FLT_EVAL_METHOD__ == 16";
!     test_text = "#if __FLT_EVAL_METHOD__ == 0\n"
!                "#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == -1";
  };
  
  /*
diff -Nrcpad gcc-12.3.0/fixincludes/tests/base/math.h gcc-12.4.0/fixincludes/tests/base/math.h
*** gcc-12.3.0/fixincludes/tests/base/math.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/fixincludes/tests/base/math.h	Thu Jun 20 08:08:05 2024
***************
*** 32,37 ****
--- 32,38 ----
  
  #if defined( DARWIN_FLT_EVAL_METHOD_CHECK )
  #if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16
+ #if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == -1 || __FLT_EVAL_METHOD__ == 16
  #endif  /* DARWIN_FLT_EVAL_METHOD_CHECK */
  
  
diff -Nrcpad gcc-12.3.0/fixincludes/tests/base/objc/runtime.h gcc-12.4.0/fixincludes/tests/base/objc/runtime.h
*** gcc-12.3.0/fixincludes/tests/base/objc/runtime.h	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/fixincludes/tests/base/objc/runtime.h	Thu Jun 20 08:08:05 2024
***************
*** 0 ****
--- 1,24 ----
+ /*  DO NOT EDIT THIS FILE.
+ 
+     It has been auto-edited by fixincludes from:
+ 
+ 	"fixinc/tests/inc/objc/runtime.h"
+ 
+     This had to be done to correct non-standard usages in the
+     original, manufacturer supplied header file.  */
+ 
+ 
+ 
+ #if defined( DARWIN_OBJC_RUNTIME_1_CHECK )
+ #if __BLOCKS__
+ OBJC_EXPORT void
+ objc_enumerateClasses(const void * _Nullable image,
+                       const char * _Nullable namePrefix,
+                       Protocol * _Nullable conformingTo,
+                       Class _Nullable subclassing,
+                       void (^ _Nonnull block)(Class _Nonnull aClass, BOOL * _Nonnull stop)
+                       OBJC_NOESCAPE)
+ OBJC_AVAILABLE(13.0, 16.0, 16.0, 9.0, 7.0)
+ OBJC_REFINED_FOR_SWIFT;
+ #endif
+ #endif  /* DARWIN_OBJC_RUNTIME_1_CHECK */
diff -Nrcpad gcc-12.3.0/fixincludes/tests/base/stdio.h gcc-12.4.0/fixincludes/tests/base/stdio.h
*** gcc-12.3.0/fixincludes/tests/base/stdio.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/fixincludes/tests/base/stdio.h	Thu Jun 20 08:08:05 2024
*************** int vfscanf(FILE *, const char *, __buil
*** 41,46 ****
--- 41,53 ----
  #endif  /* BSD_STDIO_ATTRS_CONFLICT_CHECK */
  
  
+ #if defined( APPLE_LOCAL_STDIO_FN_DEPRECATION_CHECK )
+ #if defined(__APPLE_LOCAL_DEPRECATIONS)
+ __deprecated_msg("This function is provided for compat...")
+ #endif
+ #endif  /* APPLE_LOCAL_STDIO_FN_DEPRECATION_CHECK */
+ 
+ 
  #if defined( HPUX10_STDIO_DECLARATIONS_CHECK )
  #  define _iob __iob
  
diff -Nrcpad gcc-12.3.0/gcc/BASE-VER gcc-12.4.0/gcc/BASE-VER
*** gcc-12.3.0/gcc/BASE-VER	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/BASE-VER	Thu Jun 20 08:09:01 2024
***************
*** 1 ****
! 12.3.0
--- 1 ----
! 12.4.0
diff -Nrcpad gcc-12.3.0/gcc/ChangeLog gcc-12.4.0/gcc/ChangeLog
*** gcc-12.3.0/gcc/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,3109 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-12  Alex Coplan  
+ 
+ 	Backported from master:
+ 	2024-05-03  Alex Coplan  
+ 
+ 	PR rtl-optimization/114924
+ 	* cfgrtl.cc (duplicate_insn_chain): When updating MEM_EXPRs,
+ 	don't strip (e.g.) ARRAY_REFs from the final MEM_EXPR.
+ 
+ 2024-06-12  Vladimir N. Makarov  
+ 
+ 	Backported from master:
+ 	2023-09-25  Vladimir N. Makarov  
+ 
+ 	PR middle-end/111497
+ 	* lra-constraints.cc (lra_constraints): Copy substituted
+ 	equivalence.
+ 	* lra.cc (lra): Change comment for calling unshare_all_rtl_again.
+ 
+ 2024-06-12  Richard Biener  
+ 
+ 	Backported from master:
+ 	2022-12-05  Richard Biener  
+ 
+ 	PR middle-end/40635
+ 	* tree-into-ssa.cc (rewrite_update_phi_arguments): Only
+ 	update the argument when the reaching definition is different
+ 	from the current argument.  Keep an existing argument
+ 	location.
+ 
+ 2024-06-12  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-02-19  Richard Biener  
+ 
+ 	PR rtl-optimization/54052
+ 	* rtl-ssa/blocks.cc (function_info::place_phis): Filter
+ 	local defs by LR_OUT.
+ 
+ 2024-06-12  Torbjörn SVENSSON  
+ 
+ 	Backported from master:
+ 	2024-06-12  Torbjörn SVENSSON  
+ 		    Yvan ROUX  
+ 
+ 	PR target/115253
+ 	* config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear):
+ 	Sign extend for Thumb1.
+ 	(thumb1_expand_prologue): Add zero/sign extend.
+ 
+ 2024-06-11  Francois-Xavier Coudert  
+ 
+ 	Backported from master:
+ 	2024-03-07  Francois-Xavier Coudert  
+ 
+ 	PR middle-end/111632
+ 	* system.h: Include safe-ctype.h after C++ standard headers.
+ 
+ 2024-06-11  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2024-05-20  Andrew Pinski  
+ 
+ 	PR tree-optimization/115143
+ 	* tree-ssa-phiopt.cc (minmax_replacement): Check for empty
+ 	phi nodes for middle bbs for the case where middle bb is not empty.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-06-04  Jakub Jelinek  
+ 
+ 	PR tree-optimization/115337
+ 	* fold-const.cc (tree_call_nonnegative_warnv_p) :
+ 	If fn is CFN_CLZ, use CLZ_DEFINED_VALUE_AT.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-06-04  Jakub Jelinek  
+ 
+ 	PR middle-end/108789
+ 	* builtins.cc (fold_builtin_arith_overflow): For ovf_only,
+ 	don't call save_expr and don't build REALPART_EXPR, otherwise
+ 	set TREE_SIDE_EFFECTS on call before calling save_expr.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-06-03  Jakub Jelinek  
+ 
+ 	PR target/115324
+ 	* config/rs6000/rs6000-gen-builtins.cc (write_decls): Remove
+ 	GTY markup from struct bifdata and struct ovlddata and remove their
+ 	fntype members.  Change next member in struct ovlddata and
+ 	first_instance member of struct ovldrecord to have int type rather
+ 	than struct ovlddata *.  Remove GTY markup from rs6000_builtin_info
+ 	and rs6000_instance_info arrays, declare new
+ 	rs6000_builtin_info_fntype and rs6000_instance_info_fntype arrays,
+ 	which have GTY markup.
+ 	(write_bif_static_init): Adjust for the above changes.
+ 	(write_ovld_static_init): Likewise.
+ 	(write_init_bif_table): Likewise.
+ 	(write_init_ovld_table): Likewise.
+ 	* config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Likewise.
+ 	* config/rs6000/rs6000-c.cc (find_instance): Likewise.  Make static.
+ 	(altivec_resolve_overloaded_builtin): Adjust for the above changes.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-05-15  Jakub Jelinek  
+ 
+ 	PR rtl-optimization/114902
+ 	PR rtl-optimization/115092
+ 	* combine.cc (simplify_compare_const): Don't optimize
+ 	GE op0 SIGNED_MIN or LT op0 SIGNED_MIN into NE op0 const0_rtx or
+ 	EQ op0 const0_rtx.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-05-07  Jakub Jelinek  
+ 
+ 	PR sanitizer/114956
+ 	* tree-inline.cc: Include asan.h.
+ 	(copy_bb): Remove also .ASAN_MARK calls if id->dst_fn has asan/hwasan
+ 	sanitization disabled.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-30  Jakub Jelinek  
+ 
+ 	PR tree-optimization/114876
+ 	* gimple-ssa-sprintf.cc (format_character): For min == 0 && max == 0,
+ 	set max, likely and unlikely members to 1 rather than 0.  Remove
+ 	useless res.knownrange = true;.  Formatting fixes.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-25  Jakub Jelinek  
+ 
+ 	PR fortran/114825
+ 	* tree-nested.cc (get_debug_decl): New function.
+ 	(get_nonlocal_debug_decl): Use it.
+ 	(get_local_debug_decl): Likewise.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-19  Jakub Jelinek  
+ 
+ 	PR rtl-optimization/114768
+ 	* rtlanal.cc (set_noop_p): Don't return true for MEM <- MEM
+ 	sets if src has side-effects or for stores into ZERO_EXTRACT
+ 	if ZERO_EXTRACT operand has side-effects.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-18  Jakub Jelinek  
+ 
+ 	PR middle-end/114753
+ 	* internal-fn.cc (expand_mul_overflow): Save flag_trapv and
+ 	temporarily clear it for the duration of the function, then
+ 	restore previous value.
+ 	(expand_vector_ubsan_overflow): Likewise.
+ 	(expand_arith_overflow): Likewise.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-15  Jakub Jelinek  
+ 
+ 	PR c++/114634
+ 	* attribs.cc (diag_attr_exclusions): Set attrs[1] to NULL_TREE for
+ 	decls with NULL TREE_TYPE.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-11  Jakub Jelinek  
+ 
+ 	PR middle-end/110027
+ 	* asan.cc (asan_emit_stack_protection): Assert offsets[0] is
+ 	zero if there is no stack protect guard, otherwise
+ 	-ASAN_RED_ZONE_SIZE.  If alignb > ASAN_RED_ZONE_SIZE and there is
+ 	stack pointer guard, take the ASAN_RED_ZONE_SIZE bytes allocated at
+ 	the top of the stack into account when computing base_align_bias.
+ 	Recompute use_after_return_class from asan_frame_size + base_align_bias
+ 	and set to -1 if that would overflow to 11.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-05  Jakub Jelinek  
+ 
+ 	PR tree-optimization/114566
+ 	* tree-vect-loop.cc (update_epilogue_loop_vinfo): Don't clear
+ 	base_misaligned.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-04  Jakub Jelinek  
+ 
+ 	PR c++/114537
+ 	* fold-const.cc (native_encode_initializer): Look through
+ 	NON_LVALUE_EXPR if val is INTEGER_CST.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-03-14  Jakub Jelinek  
+ 
+ 	PR middle-end/113907
+ 	* ipa-icf.cc (sem_item_optimizer::merge_classes): Reset
+ 	SSA_NAME_RANGE_INFO and SSA_NAME_PTR_INFO on successfully ICF merged
+ 	functions.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-03-14  Jakub Jelinek  
+ 
+ 	PR target/114310
+ 	* config/aarch64/aarch64.cc (aarch64_expand_compare_and_swap): For
+ 	TImode force newval into a register.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-03-07  Jakub Jelinek  
+ 
+ 	PR rtl-optimization/110079
+ 	* bb-reorder.cc (fix_crossing_unconditional_branches): Don't adjust
+ 	asm goto.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-03-04  Jakub Jelinek  
+ 
+ 	PR target/114184
+ 	* config/i386/i386-expand.cc (ix86_expand_move): If XFmode op1
+ 	is SUBREG of CONSTANT_P, force the SUBREG_REG into memory or
+ 	register.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-02-12  Jakub Jelinek  
+ 
+ 	PR c++/113674
+ 	* attribs.cc (extract_attribute_substring): Remove.
+ 	(lookup_scoped_attribute_spec): Don't call it.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-02-03  Jakub Jelinek  
+ 
+ 	* ggc-common.cc (gt_pch_save): Allow addr to be equal to
+ 	mmi.preferred_base + mmi.size - sizeof (void *).
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-01-30  Jakub Jelinek  
+ 
+ 	PR tree-optimization/113603
+ 	* tree-ssa-strlen.cc (strlen_pass::handle_store): After
+ 	count_nonzero_bytes call refetch si using get_strinfo in case it
+ 	has been unshared in the meantime.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-01-25  Jakub Jelinek  
+ 
+ 	* doc/generic.texi (VECTOR_CST): Fix typo - petterns -> patterns.
+ 	* doc/rtl.texi (CONST_VECTOR): Likewise.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-01-18  Jakub Jelinek  
+ 
+ 	PR target/113122
+ 	* config/i386/i386.cc (x86_function_profiler): Add -masm=intel
+ 	support.  Add missing space after , in emitted assembly in some
+ 	cases.  Formatting fixes.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-01-16  Jakub Jelinek  
+ 
+ 	PR tree-optimization/113372
+ 	PR middle-end/90348
+ 	PR middle-end/110115
+ 	PR middle-end/111422
+ 	* cfgexpand.cc (add_scope_conflicts_2): New function.
+ 	(add_scope_conflicts_1): Use it.
+ 
+ 2024-06-11  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-21  Richard Biener  
+ 
+ 	PR tree-optimization/111070
+ 	* tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
+ 	an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
+ 
+ 2024-06-07  Jan Hubicka  
+ 
+ 	Backported from master:
+ 	2023-12-29  Jan Hubicka  
+ 
+ 	* config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS,
+ 	X86_TUNE_AVOID_256FMA_CHAINS): Enable for znver4 and Core.
+ 
+ 2024-06-04  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-11-28  Richard Biener  
+ 
+ 	PR middle-end/112732
+ 	* tree.cc (build_opaque_vector_type): Reset TYPE_ALIAS_SET
+ 	of the newly built type.
+ 
+ 2024-06-04  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-06-26  Richard Biener  
+ 
+ 	PR tree-optimization/110381
+ 	* tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
+ 	Materialize permutes before fold-left reductions.
+ 
+ 2024-06-04  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-02-14  Richard Biener  
+ 
+ 	PR tree-optimization/113910
+ 	* bitmap.cc (bitmap_hash): Mix the full element "hash" to
+ 	the hashval_t hash.
+ 
+ 2024-06-04  Richard Sandiford  
+ 
+ 	Backported from master:
+ 	2024-01-29  Richard Sandiford  
+ 
+ 	PR target/113281
+ 	* tree-vect-patterns.cc (vect_recog_over_widening_pattern): Remove
+ 	workaround for right shifts.
+ 	(vect_truncatable_operation_p): Handle NEGATE_EXPR and BIT_NOT_EXPR.
+ 	(vect_determine_precisions_from_range): Be more selective about
+ 	which codes can be narrowed based on their input and output ranges.
+ 	For shifts, require at least one more bit of precision than the
+ 	maximum shift amount.
+ 
+ 2024-06-04  Richard Sandiford  
+ 
+ 	Backported from master:
+ 	2024-05-24  Richard Sandiford  
+ 
+ 	PR tree-optimization/115192
+ 	* tree-data-ref.cc (create_intersect_range_checks): Take the
+ 	alignment of the access sizes into account.
+ 
+ 2024-06-03  Uros Bizjak  
+ 
+ 	Backported from master:
+ 	2024-05-31  Uros Bizjak  
+ 
+ 	PR target/115297
+ 	* config/alpha/alpha.md (si3): Wrap DImode
+ 	operands 3 and 4 with truncate:SI RTX.
+ 	(*divmodsi_internal_er): Ditto for operands 1 and 2.
+ 	(*divmodsi_internal_er_1): Ditto.
+ 	(*divmodsi_internal): Ditto.
+ 	* config/alpha/constraints.md ("b"): Correct register
+ 	number in the description.
+ 
+ 2024-05-30  YunQiang Su  
+ 
+ 	Backported from master:
+ 	2024-05-29  YunQiang Su  
+ 
+ 	* config/mips/mips.cc(mips16_gp_pseudo_reg): Mark
+ 	MIPS16_PIC_TEMP and MIPS_PROLOGUE_TEMP clobbered.
+ 	(mips_emit_call_insn): Mark MIPS16_PIC_TEMP and
+ 	MIPS_PROLOGUE_TEMP clobbered if MIPS16 and CALL_CLOBBERED_GP.
+ 
+ 2024-05-28  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-05-22  Jakub Jelinek  
+ 
+ 	PR sanitizer/115172
+ 	* ubsan.cc (instrument_bool_enum_load): If rhs is not in generic
+ 	address space, use qualified version of utype with the right
+ 	address space.  Formatting fix.
+ 
+ 2024-05-28  Martin Jambor  
+ 
+ 	Backported from master:
+ 	2024-05-14  Martin Jambor  
+ 
+ 	PR ipa/113907
+ 	* ipa-prop.h (ipa_jump_functions_equivalent_p): Declare.
+ 	(values_equal_for_ipcp_p): Likewise.
+ 	* ipa-prop.cc (ipa_agg_pass_through_jf_equivalent_p): New function.
+ 	(ipa_agg_jump_functions_equivalent_p): Likewise.
+ 	(ipa_jump_functions_equivalent_p): Likewise.
+ 	* ipa-cp.cc (values_equal_for_ipcp_p): Make function public.
+ 	* ipa-icf-gimple.cc: Include alloc-pool.h, symbol-summary.h, sreal.h,
+ 	ipa-cp.h and ipa-prop.h.
+ 	(func_checker::compare_gimple_call): Comapre jump functions.
+ 
+ 2024-05-17  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-01-31  Richard Biener  
+ 
+ 	PR middle-end/110176
+ 	* match.pd (zext (bool) <= (int) 4294967295u): Make sure
+ 	to match INTEGER_CST only without outstanding conversion.
+ 
+ 2024-05-17  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-17  Richard Biener  
+ 
+ 	PR tree-optimization/111039
+ 	* tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
+ 	SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
+ 
+ 2024-05-17  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-11-20  Richard Biener  
+ 
+ 	PR tree-optimization/112281
+ 	* tree-loop-distribution.cc
+ 	(loop_distribution::pg_add_dependence_edges): For = in the
+ 	innermost common loop record a partition conflict.
+ 
+ 2024-05-17  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-11-13  Richard Biener  
+ 
+ 	PR tree-optimization/112495
+ 	* tree-data-ref.cc (runtime_alias_check_p): Reject checks
+ 	between different address spaces.
+ 
+ 2024-05-17  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-01-11  Richard Biener  
+ 
+ 	PR tree-optimization/112505
+ 	* tree-vect-loop.cc (vectorizable_induction): Reject
+ 	bit-precision induction.
+ 
+ 2024-05-17  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-01-23  Richard Biener  
+ 
+ 	PR debug/112718
+ 	* dwarf2out.cc (dwarf2out_finish): Reset all type units
+ 	for the fat part of an LTO compile.
+ 
+ 2024-05-17  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-12-14  Richard Biener  
+ 
+ 	PR tree-optimization/112793
+ 	* tree-vect-slp.cc (vect_schedule_slp_node): Already
+ 	code-generated constant/external nodes are OK.
+ 
+ 2024-05-16  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-02-22  Richard Biener  
+ 
+ 	PR tree-optimization/114027
+ 	* tree-vect-loop.cc (vecctorizable_reduction): Use optimized
+ 	condition reduction classification only for single-element
+ 	chains.
+ 
+ 2024-05-16  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-05-08  Richard Biener  
+ 
+ 	PR tree-optimization/114375
+ 	* tree-vect-slp.cc (vect_build_slp_tree_2): Compute the
+ 	load permutation for masked loads but reject it when any
+ 	such is necessary.
+ 	* tree-vect-stmts.cc (vectorizable_load): Reject masked
+ 	VMAT_ELEMENTWISE and VMAT_STRIDED_SLP as those are not
+ 	supported.
+ 
+ 2024-05-16  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-03-21  Richard Biener  
+ 
+ 	PR tree-optimization/114231
+ 	* tree-vect-slp.cc (vect_analyze_slp): Lookup patterns when
+ 	processing a BB SLP root.
+ 
+ 2024-05-16  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-05-06  Richard Biener  
+ 
+ 	PR middle-end/114734
+ 	* internal-fn.cc (expand_call_mem_ref): Use
+ 	get_gimple_for_ssa_name to get at the def stmt of the address
+ 	argument to honor SSA coalescing constraints.
+ 
+ 2024-05-16  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-04-09  Richard Biener  
+ 
+ 	PR lto/114655
+ 	* lto-wrapper.cc (merge_flto_options): Add force argument.
+ 	(merge_and_complain): Do not force here.
+ 	(run_gcc): But here to make the link-time -flto option override
+ 	any compile-time one.
+ 
+ 2024-05-16  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-05-03  Richard Biener  
+ 
+ 	PR gcov-profile/114715
+ 	* gimplify.cc (gimplify_switch_expr): Set the location of the
+ 	GIMPLE switch.
+ 
+ 2024-05-15  Martin Jambor  
+ 
+ 	Backported from master:
+ 	2024-04-08  Martin Jambor  
+ 
+ 	PR ipa/108007
+ 	PR ipa/112616
+ 	* cgraph.h (cgraph_edge): Add a parameter to
+ 	redirect_call_stmt_to_callee.
+ 	* ipa-param-manipulation.h (ipa_param_adjustments): Add a
+ 	parameter to modify_call.
+ 	(ipa_release_ssas_in_hash): Declare.
+ 	* cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
+ 	parameter killed_ssas, pass it to padjs->modify_call.
+ 	* ipa-param-manipulation.cc (purge_all_uses): New function.
+ 	(ipa_param_adjustments::modify_call): New parameter killed_ssas.
+ 	Instead of substituting uses, invoke purge_all_uses.  If
+ 	hash of killed SSAs has not been provided, create a temporary one
+ 	and release SSAs that have been added to it.
+ 	(compare_ssa_versions): New function.
+ 	(ipa_release_ssas_in_hash): Likewise.
+ 	* tree-inline.cc (redirect_all_calls): Create
+ 	id->killed_new_ssa_names earlier, pass it to edge redirection,
+ 	adjust a comment.
+ 	(copy_body): Release SSAs in id->killed_new_ssa_names.
+ 
+ 2024-05-15  Martin Jambor  
+ 
+ 	Backported from master:
+ 	2024-04-05  Martin Jambor  
+ 
+ 	PR ipa/114247
+ 	* ipa-param-manipulation.cc (ipa_param_adjustments::modify_call):
+ 	Force values obtined through pass-through maps to the expected
+ 	split type.
+ 
+ 2024-05-13  Andrew MacLeod  
+ 
+ 	PR tree-optimization/111009
+ 	* range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
+ 	* value-range.h (contains_zero_p): New.
+ 
+ 2024-05-09  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2023-09-25  Andrew Pinski  
+ 
+ 	PR tree-optimization/110386
+ 	* gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
+ 
+ 2024-05-08  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2024-02-22  Andrew Pinski  
+ 
+ 	PR tree-optimization/109804
+ 	* gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle
+ 	DEMANGLE_COMPONENT_UNNAMED_TYPE.
+ 
+ 2024-05-08  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2023-09-10  Andrew Pinski  
+ 
+ 	PR tree-optimization/111331
+ 	* tree-ssa-phiopt.cc (minmax_replacement):
+ 	Fix the LE/GE comparison for the
+ 	`(a CMP CST1) ? max : a` optimization.
+ 
+ 2024-05-08  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2024-03-11  Andrew Pinski  
+ 
+ 	PR middle-end/95351
+ 	* fold-const.cc (merge_truthop_with_opposite_arm): Use
+ 	the type of the operands of the comparison and not the type
+ 	of the comparison.
+ 
+ 2024-05-07  Georg-Johann Lay  
+ 
+ 	* config/avr/avr-mcus.def: Add new MCUs (copy from gcc-13).
+ 	* doc/avr-mmcu.texi: Rebuild.
+ 
+ 2024-05-07  Georg-Johann Lay  
+ 
+ 	Backported from master:
+ 	2024-05-06  Georg-Johann Lay  
+ 
+ 	PR ipa/92606
+ 	* config/avr/avr.cc (avr_option_override): Set
+ 	flag_ipa_icf_variables = 0.
+ 
+ 2024-05-02  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-04-10  Richard Biener  
+ 
+ 	PR tree-optimization/114672
+ 	* tree-ssa-math-opts.cc (convert_plusminus_to_widen): Only
+ 	allow mode-precision results.
+ 
+ 2024-05-02  Will Schmidt  
+ 
+ 	Backported from master:
+ 	2024-04-12  Will Schmidt  
+ 		    Peter Bergner  
+ 
+ 	PR target/101865
+ 	* config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported): Use
+ 	TARGET_POWER8.
+ 	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use
+ 	OPTION_MASK_POWER8.
+ 	* config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_POWER8.
+ 	(ISA_2_7_MASKS_SERVER): Likewise.
+ 	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Update
+ 	comment.  Use OPTION_MASK_POWER8 and TARGET_POWER8.
+ 	* config/rs6000/rs6000.h (TARGET_SYNC_HI_QI): Use TARGET_POWER8.
+ 	* config/rs6000/rs6000.md (define_attr "isa"): Add p8.
+ 	(define_attr "enabled"): Handle it.
+ 	(define_insn "prefetch"): Use TARGET_POWER8.
+ 	* config/rs6000/rs6000.opt (mpower8-internal): New.
+ 
+ 2024-05-02  Peter Bergner  
+ 
+ 	Backported from master:
+ 	2024-04-10  Peter Bergner  
+ 
+ 	PR target/101865
+ 	* config/rs6000/rs6000.h (TARGET_DIRECT_MOVE): Define.
+ 	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Replace
+ 	OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR.  Delete redundant
+ 	OPTION_MASK_DIRECT_MOVE usage.  Delete TARGET_DIRECT_MOVE dead code.
+ 	(rs6000_opt_masks): Neuter the "direct-move" option.
+ 	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Replace
+ 	OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR.  Delete useless
+ 	comment.
+ 	* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete
+ 	OPTION_MASK_DIRECT_MOVE.
+ 	(OTHER_P8_VECTOR_MASKS): Likewise.
+ 	(POWERPC_MASKS): Likewise.
+ 	* config/rs6000/rs6000.opt (mdirect-move): Remove Mask and Var.
+ 
+ 2024-05-01  Jeevitha  
+ 
+ 	Backported from master:
+ 	2024-03-07  Jeevitha Palanisamy  
+ 
+ 	PR target/113950
+ 	* config/rs6000/vsx.md (vsx_splat_): Correct assignment to operand1
+ 	and simplify else if with else.
+ 
+ 2024-04-30  Joe Ramsay  
+ 
+ 	Backported from master:
+ 	2024-03-15  Joe Ramsay  
+ 
+ 	* match.pd: Fix truncation pattern for -fno-signed-zeroes
+ 
+ 2024-04-30  Yang Yujie  
+ 
+ 	Backported from master:
+ 	2023-12-12  Yang Yujie  
+ 
+ 	PR target/114848
+ 	* config/loongarch/loongarch.cc: Do not restore the saved eh_return
+ 	data registers ($r4-$r7) for a normal return of a function that calls
+ 	__builtin_eh_return elsewhere.
+ 	* config/loongarch/loongarch-protos.h: Same.
+ 	* config/loongarch/loongarch.md: Same.
+ 
+ 2024-04-26  Richard Ball  
+ 
+ 	PR target/114272
+ 	* config/aarch64/aarch64-cores.def (AARCH64_CORE):
+ 	Change SCHEDULER_IDENT from cortexa55 to cortexa53
+ 	for Cortex-A510.
+ 
+ 2024-04-25  Richard Ball  
+ 
+ 	Backported from master:
+ 	2024-04-25  Richard Ball  
+ 
+ 	PR target/114837
+ 	* config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear):
+ 	Add zero/sign extend.
+ 	(arm_expand_prologue): Add zero/sign extend.
+ 
+ 2024-04-25  Kewen Lin  
+ 	    Andrew Pinski  
+ 
+ 	PR target/88309
+ 	* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Fix
+ 	wrong align passed to function build_aligned_type.
+ 	* tree-ssa-loop-prefetch.cc (is_miss_rate_acceptable): Add an
+ 	assertion to ensure align_unit should be positive.
+ 	* tree.cc (build_qualified_type): Update function comments.
+ 
+ 2024-04-23  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-03-26  Jakub Jelinek  
+ 
+ 	PR sanitizer/111736
+ 	* tsan.cc (instrument_expr): Punt on non-generic address space
+ 	accesses.
+ 
+ 2024-04-23  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-03-22  Jakub Jelinek  
+ 
+ 	PR sanitizer/111736
+ 	* ubsan.cc (ubsan_expand_null_ifn, instrument_mem_ref): Avoid
+ 	SANITIZE_NULL instrumentation for non-generic address spaces
+ 	for which targetm.addr_space.zero_address_valid (as) is true.
+ 
+ 2024-04-23  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-03-21  Richard Biener  
+ 
+ 	PR tree-optimization/111736
+ 	* asan.cc (instrument_derefs): Do not instrument accesses
+ 	to non-generic address-spaces.
+ 
+ 2024-04-23  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-12-05  Richard Biener  
+ 
+ 	PR sanitizer/111736
+ 	* asan.cc (asan_protect_global): Do not protect globals
+ 	in non-generic address-space.
+ 
+ 2024-04-22  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-09-04  Iain Sandoe  
+ 
+ 	* config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
+ 	all 32b Darwin PowerPC cases.
+ 
+ 2024-04-22  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-04-02  Iain Sandoe  
+ 
+ 	* config/darwin.cc (darwin_override_options): Update the
+ 	clang major version value in the dsymutil check.
+ 
+ 2024-04-21  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-04-02  Iain Sandoe  
+ 
+ 	* config/darwin.cc (darwin_override_options): Reduce the debug
+ 	level to 2 if dsymutil cannot handle .macinfo sections.
+ 
+ 2024-04-19  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-10-25  Iain Sandoe  
+ 
+ 	* config/darwin.cc (darwin_override_options): Handle fPIE.
+ 
+ 2024-04-19  Iain Sandoe  
+ 
+ 	* config/darwin.h (LINK_COMMAND_SPEC_A): Handle weak crts
+ 	before other objects. (REAL_LIBGCC_SPEC): Remove weak crts
+ 	from here.  (DARWIN_WEAK_CRTS): New.
+ 
+ 2024-04-19  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-01-28  Iain Sandoe  
+ 
+ 	* config/darwin.cc (darwin_build_constant_cfstring): Prevent over-
+ 	alignment of CFString constants by setting DECL_USER_ALIGN.
+ 
+ 2024-04-19  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-01-18  Iain Sandoe  
+ 
+ 	* config/darwin.cc (darwin_objc1_section): Use the correct
+ 	meta-data version for constant strings.
+ 	(machopic_select_section): Assert if we fail to handle CFString
+ 	sections as Obejctive-C meta-data or drectly.
+ 
+ 2024-04-19  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-01-18  Iain Sandoe  
+ 
+ 	PR target/105522
+ 	* config/darwin.cc (machopic_select_section): Handle C and C++
+ 	CFStrings.
+ 	(darwin_rename_builtins): Move this out of the CFString code.
+ 	(darwin_libc_has_function): Likewise.
+ 	(darwin_build_constant_cfstring): Create an anonymous var to
+ 	hold each CFString.
+ 	* config/darwin.h (ASM_OUTPUT_LABELREF): Handle constant
+ 	CFstrings.
+ 
+ 2024-04-19  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-10-26  Iain Sandoe  
+ 
+ 	* config/darwin.h
+ 	(darwin_label_is_anonymous_local_objc_name): Make metadata names
+ 	linker-visibile for GNU objective C.
+ 
+ 2024-04-18  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-10-18  Iain Sandoe  
+ 
+ 	* config.in: Regenerate.
+ 	* config/darwin.cc (darwin_file_start): Add assembler directives
+ 	for the target OS version, where these are supported by the
+ 	assembler.
+ 	(darwin_override_options): Check for building >= macOS 10.14.
+ 	* configure: Regenerate.
+ 	* configure.ac: Check for assembler support of .build_version
+ 	directives.
+ 
+ 2024-04-18  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-09-10  Iain Sandoe  
+ 
+ 	* config/darwin.cc (darwin_function_section): Place unlikely
+ 	executed global init code into the standard cold section.
+ 
+ 2024-04-18  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-09-04  Iain Sandoe  
+ 
+ 	* config/darwin-sections.def (static_init_section): Add the
+ 	__TEXT,__StaticInit section.
+ 	* config/darwin.cc (darwin_function_section): Use the static init
+ 	section for global initializers, to match other platform toolchains.
+ 
+ 2024-04-18  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-09-04  Iain Sandoe  
+ 
+ 	* config/darwin-sections.def (darwin_exception_section): Move to
+ 	the __TEXT segment.
+ 	* config/darwin.cc (darwin_emit_except_table_label): Align before
+ 	the exception table label.
+ 	* config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
+ 	relative 4byte relocs.
+ 
+ 2024-04-18  Rainer Orth  
+ 
+ 	Backported from master:
+ 	2023-08-17  Rainer Orth  
+ 
+ 	* configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
+ 	output.
+ 	* configure: Regenerate.
+ 
+ 2024-04-18  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-09-18  Iain Sandoe  
+ 
+ 	* configure: Regenerate.
+ 	* configure.ac: Handle explict disable of stdlib option, set
+ 	defaults for Darwin.
+ 
+ 2024-04-18  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-09-20  Iain Sandoe  
+ 
+ 	* config/darwin.h:
+ 	(SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
+ 	specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
+ 
+ 2024-04-15  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-04-05  Richard Biener  
+ 
+ 	PR middle-end/114599
+ 	PR gcov-profile/114115
+ 	* symtab.cc (ifunc_ref_map): Do not use auto_bitmap.
+ 	(is_caller_ifunc_resolver): Optimize bitmap_bit_p/bitmap_set_bit
+ 	pair.
+ 	(symtab_node::check_ifunc_callee_symtab_nodes): Properly
+ 	allocate ifunc_ref_map here.
+ 
+ 2024-04-15  H.J. Lu  
+ 
+ 	Backported from master:
+ 	2024-04-03  H.J. Lu  
+ 
+ 	PR tree-optimization/114115
+ 	* cgraph.h (symtab_node): Add check_ifunc_callee_symtab_nodes.
+ 	(cgraph_node): Add called_by_ifunc_resolver.
+ 	* cgraphunit.cc (symbol_table::compile): Call
+ 	symtab_node::check_ifunc_callee_symtab_nodes.
+ 	* symtab.cc (check_ifunc_resolver): New.
+ 	(ifunc_ref_map): Likewise.
+ 	(is_caller_ifunc_resolver): Likewise.
+ 	(symtab_node::check_ifunc_callee_symtab_nodes): Likewise.
+ 	* tree-profile.cc (gimple_gen_ic_func_profiler): Disable indirect
+ 	call profiling for IFUNC resolvers and their callees.
+ 
+ 2024-04-15  Tamar Christina  
+ 
+ 	* config/aarch64/aarch64.h (AARCH64_ARCH): Remove LS64 from
+ 	Armv8.7-a.
+ 
+ 2024-04-15  Tamar Christina  
+ 
+ 	PR tree-optimization/113552
+ 	* config/aarch64/aarch64.cc
+ 	(aarch64_simd_clone_compute_vecsize_and_simdlen): Block simdlen 1.
+ 
+ 2024-04-12  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-09-27  Iain Sandoe  
+ 
+ 	PR target/111610
+ 	* configure: Regenerate.
+ 	* configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
+ 
+ 2024-04-12  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-09-18  Iain Sandoe  
+ 
+ 	* config/darwin-protos.h (enum darwin_external_toolchain): New.
+ 	* config/darwin.cc (DSYMUTIL_VERSION): New.
+ 	(darwin_override_options): Choose the default debug DWARF version
+ 	depending on the configured dsymutil version.
+ 
+ 2024-04-12  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2022-05-03  Iain Sandoe  
+ 
+ 	* config/darwin.cc (darwin_label_is_anonymous_local_objc_name): Make
+ 	protocol class methods linker-visible.
+ 
+ 2024-04-11  Kito Cheng  
+ 
+ 	Backported from master:
+ 	2024-02-29  Kito Cheng  
+ 
+ 	PR target/114130
+ 	* config/riscv/sync.md (atomic_compare_and_swap): Sign
+ 	extend the expected value if needed.
+ 
+ 2024-04-04  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-07-13  Iain Sandoe  
+ 
+ 	PR target/110624
+ 	* config/darwin.h (DARWIN_PLATFORM_ID): New.
+ 	(LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
+ 	and SDK data to the static linker.
+ 
+ 2024-04-02  Qing Zhao  
+ 
+ 	Backported from master:
+ 	2023-09-15  Qing Zhao  
+ 
+ 	PR tree-optimization/111407
+ 	* tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
+ 	when one of the operands is subject to abnormal coalescing.
+ 
+ 2024-04-01  Lulu Cheng  
+ 
+ 	Backported from master:
+ 	2024-01-11  Lulu Cheng  
+ 
+ 	PR target/113233
+ 	* config/loongarch/genopts/loongarch.opt.in: Mark options with
+ 	the "Save" property.
+ 	* config/loongarch/loongarch-opts.cc
+ 	(loongarch_update_gcc_opt_status): Update the value of the
+ 	la_target to global_options.
+ 	* config/loongarch/loongarch-opts.h
+ 	(loongarch_update_gcc_opt_status): Add a function declaration.
+ 	* config/loongarch/loongarch.cc
+ 	(loongarch_option_override_internal): Call the function
+ 	loongarch_update_gcc_opt_status.
+ 	(loongarch_option_save): New functions.
+ 	(loongarch_option_restore): Likewise.
+ 	(TARGET_OPTION_SAVE): Define macro.
+ 	(TARGET_OPTION_RESTORE): Likewise.
+ 	* config/loongarch/loongarch.opt: Regenerate.
+ 
+ 2024-03-27  Richard Sandiford  
+ 
+ 	Backported from master:
+ 	2024-03-05  Richard Sandiford  
+ 
+ 	PR sanitizer/97696
+ 	* asan.cc (asan_expand_mark_ifn): Allow the length to be a poly_int.
+ 
+ 2024-03-26  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-04  Richard Biener  
+ 
+ 	PR tree-optimization/110838
+ 	* match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
+ 	the arithmetic right-shift case to non-negative operands.
+ 
+ 2024-03-26  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-07-27  Richard Biener  
+ 
+ 	PR tree-optimization/91838
+ 	* gimple-match-head.cc: Include attribs.h and asan.h.
+ 	* generic-match-head.cc: Likewise.
+ 	* match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
+ 
+ 2024-03-17  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-07-02  Iain Sandoe  
+ 
+ 	PR target/108743
+ 	* config/darwin.opt: Add fconstant-cfstrings alias to
+ 	mconstant-cfstrings.
+ 	* doc/invoke.texi: Amend invocation descriptions to reflect
+ 	that the fconstant-cfstrings is a target-option alias and to
+ 	add the missing mconstant-cfstrings option description to the
+ 	Darwin section.
+ 
+ 2024-03-17  Iain Sandoe  
+ 
+ 	* config/i386/darwin.h (ENDFILE_SPEC): Fix whitespace.
+ 
+ 2024-03-14  liuhongt  
+ 
+ 	Backported from master:
+ 	2024-03-14  liuhongt  
+ 
+ 	* config/i386/i386-features.cc
+ 	(general_scalar_chain::convert_op): Handle REG_EH_REGION note.
+ 	(convert_scalars_to_vector): Ditto.
+ 	* config/i386/i386-features.h (class scalar_chain): New
+ 	memeber control_flow_insns.
+ 
+ 2024-03-09  Lulu Cheng  
+ 
+ 	Backported from master:
+ 	2024-03-09  Lulu Cheng  
+ 
+ 	* config/loongarch/sync.md (atomic_cas_value_strong):
+ 	In loongarch64, a sign extension operation is added when
+ 	operands[2] is a register operand and the mode is SImode.
+ 
+ 2024-03-03  Oleg Endo  
+ 
+ 	PR target/101737
+ 	* config/sh/sh.cc (sh_is_nott_insn): Handle case where the input
+ 	is not an insn, but e.g. a code label.
+ 
+ 2024-03-01  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-02-06  Richard Biener  
+ 
+ 	PR tree-optimization/110221
+ 	* tree-vect-slp.cc (vect_schedule_slp_node): When loop
+ 	masking / len is applied make sure to not schedule
+ 	intenal defs outside of the loop.
+ 
+ 2024-02-27  Eric Botcazou  
+ 
+ 	* tree-ssa-dse.cc (compute_trims): Fix description.  Return early
+ 	if either ref->offset is not byte aligned or ref->size is not known
+ 	to be equal to ref->max_size.
+ 	(maybe_trim_complex_store): Fix description.
+ 	(maybe_trim_constructor_store): Likewise.
+ 	(maybe_trim_partially_dead_store): Likewise.
+ 
+ 2024-02-27  Jeevitha  
+ 
+ 	Backported from master:
+ 	2023-08-31  Jeevitha Palanisamy  
+ 
+ 	PR target/110411
+ 	* config/rs6000/mma.md (define_insn_and_split movoo): Disallow
+ 	AltiVec address operands.
+ 	(define_insn_and_split movxo): Likewise.
+ 	* config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
+ 	redundant mode size check.
+ 
+ 2024-02-27  H.J. Lu  
+ 
+ 	Backported from master:
+ 	2024-02-26  H.J. Lu  
+ 
+ 	PR target/114098
+ 	* config/i386/amxtileintrin.h (_tile_loadconfig): Use
+ 	__builtin_ia32_ldtilecfg.
+ 	(_tile_storeconfig): Use __builtin_ia32_sttilecfg.
+ 	* config/i386/i386-builtin.def (BDESC): Add
+ 	__builtin_ia32_ldtilecfg and __builtin_ia32_sttilecfg.
+ 	* config/i386/i386-expand.cc (ix86_expand_builtin): Handle
+ 	IX86_BUILTIN_LDTILECFG and IX86_BUILTIN_STTILECFG.
+ 	* config/i386/i386.md (ldtilecfg): New pattern.
+ 	(sttilecfg): Likewise.
+ 
+ 2024-02-23  Richard Earnshaw  
+ 
+ 	Backported from master:
+ 	2024-02-23  Richard Earnshaw  
+ 
+ 	PR target/108120
+ 	* config/arm/neon.md (div3): Rename from div3.
+ 	Gate with ARM_HAVE_NEON__ARITH.
+ 
+ 2024-02-22  Xi Ruoyao  
+ 
+ 	Backported from master:
+ 	2023-10-31  Xi Ruoyao  
+ 
+ 	PR target/112299
+ 	* config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0
+ 	if not defined yet.
+ 
+ 2024-02-22  Xi Ruoyao  
+ 
+ 	Backported from master:
+ 	2023-11-14  Xi Ruoyao  
+ 
+ 	PR target/112330
+ 	* config/loongarch/genopts/loongarch.opt.in: Add
+ 	-m[no]-pass-relax-to-as.  Change the default of -m[no]-relax to
+ 	account conditional branch relaxation support status.
+ 	* config/loongarch/loongarch.opt: Regenerate.
+ 	* configure.ac (gcc_cv_as_loongarch_cond_branch_relax): Check if
+ 	the assembler supports conditional branch relaxation.
+ 	* configure: Regenerate.
+ 	* config.in: Regenerate.  Note that there are some unrelated
+ 	changes introduced by r14-5424 (which does not contain a
+ 	config.in regeneration).
+ 	* config/loongarch/loongarch-opts.h
+ 	(HAVE_AS_COND_BRANCH_RELAXATION): Define to 0 if not defined.
+ 	* config/loongarch/loongarch.h (ASM_MRELAX_DEFAULT): Define.
+ 	(ASM_MRELAX_SPEC): Define.
+ 	(ASM_SPEC): Use ASM_MRELAX_SPEC instead of "%{mno-relax}".
+ 	* doc/invoke.texi: Document -m[no-]relax and
+ 	-m[no-]pass-mrelax-to-as for LoongArch.
+ 
+ 2024-02-22  Lulu Cheng  
+ 
+ 	Backported from master:
+ 	2023-09-20  Lulu Cheng  
+ 
+ 	* config.in: Regenerate.
+ 	* config/loongarch/genopts/loongarch.opt.in: Add compilation option
+ 	mrelax. And set the initial value of explicit-relocs according to the
+ 	detection status.
+ 	* config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
+ 	--no-relax option to the linker.
+ 	* config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
+ 	* config/loongarch/loongarch.opt: Regenerate.
+ 	* configure: Regenerate.
+ 	* configure.ac: Add detection of support for binutils relax function.
+ 
+ 2024-02-22  Lulu Cheng  
+ 
+ 	Backported from master:
+ 	2023-10-17  Lulu Cheng  
+ 		    Chenghua Xu  
+ 
+ 	* config/loongarch/loongarch.h (ASM_OUTPUT_ALIGN_WITH_NOP):
+ 	Delete.
+ 
+ 2024-02-19  Andre Vieira  
+ 
+ 	Backported from master:
+ 	2023-12-20  Andre Vieira  
+ 
+ 	PR target/112787
+ 	* tree-vect-generic.cc (type_for_widest_vector_mode): Change function to
+ 	use original vector type and check widest vector mode has at most the
+ 	same number of elements.
+ 	(get_compute_type): Pass original vector type rather than the element
+ 	type to type_for_widest_vector_mode and remove now obsolete check for
+ 	the number of elements.
+ 
+ 2024-02-15  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-02-15  Jakub Jelinek  
+ 
+ 	PR middle-end/113921
+ 	* cfgrtl.h (prepend_insn_to_edge): New declaration.
+ 	* cfgrtl.cc (insert_insn_on_edge): Clarify behavior in function
+ 	comment.
+ 	(prepend_insn_to_edge): New function.
+ 	* cfgexpand.cc (expand_asm_stmt): Use prepend_insn_to_edge instead of
+ 	insert_insn_on_edge.
+ 
+ 2024-02-14  Alex Coplan  
+ 
+ 	Backported from master:
+ 	2024-02-07  Alex Coplan  
+ 
+ 	PR target/111677
+ 	* config/aarch64/aarch64.cc (aarch64_reg_save_mode): Use
+ 	V16QImode for the full 16-byte FPR saves in the vector PCS case.
+ 	(aarch64_gen_storewb_pair): Handle V16QImode.
+ 	(aarch64_gen_loadwb_pair): Likewise.
+ 	(aarch64_gen_load_pair): Likewise.
+ 	* config/aarch64/aarch64.md (loadwb_pair_):
+ 	Rename to ...
+ 	(loadwb_pair_): ... this, extending to
+ 	V16QImode.
+ 	(storewb_pair_): Rename to ...
+ 	(storewb_pair_): ... this, extending to
+ 	V16QImode.
+ 	* config/aarch64/iterators.md (TX_V16QI): New.
+ 
+ 2024-02-14  Richard Biener  
+ 
+ 	PR tree-optimization/113896
+ 	* tree-vect-slp.cc (vect_optimize_slp): Permute
+ 	SLP_TREE_SCALAR_STMTS when eliding a permuation in a
+ 	VEC_PERM node we need to preserve because it wraps an
+ 	extern vector.
+ 
+ 2024-02-08  Georg-Johann Lay  
+ 
+ 	Backported from master:
+ 	2024-02-08  Georg-Johann Lay  
+ 
+ 	PR target/113824
+ 	* config/avr/avr-mcus.def (ata5797): Move from avr5 to avr4.
+ 	* doc/avr-mmcu.texi: Rebuild.
+ 
+ 2024-02-05  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2023-06-02  Jason Merrill  
+ 
+ 	PR c++/95226
+ 	PR c++/109359
+ 	* varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
+ 	(initializer_constant_valid_p_1): Compare float precision.
+ 
+ 2024-02-05  Xi Ruoyao  
+ 
+ 	Backported from master:
+ 	2024-02-05  Xi Ruoyao  
+ 
+ 	* config/mips/mips-msa.md (neg2): Add missing mode for
+ 	neg.
+ 
+ 2024-02-05  Xi Ruoyao  
+ 
+ 	Backported from master:
+ 	2024-02-05  Xi Ruoyao  
+ 
+ 	* config/mips/mips-msa.md (elmsgnbit): New define_mode_attr.
+ 	(neg2): Change the mode iterator from MSA to IMSA because
+ 	in FP arithmetic we cannot use (0 - x) for -x.
+ 	(neg2): New define_insn to implement FP vector negation,
+ 	using a bnegi instruction to negate the sign bit.
+ 
+ 2024-02-02  Martin Jambor  
+ 
+ 	Backported from master:
+ 	2024-01-24  Martin Jambor  
+ 
+ 	PR tree-optimization/110422
+ 	* tree-sra.cc (scan_function): Disqualify bases of operands of asm
+ 	gotos.
+ 
+ 2024-02-01  John David Anglin  
+ 
+ 	* config/pa/pa.md (atomic_storedi_1): Fix bug in
+ 	alternative 1.
+ 
+ 2024-01-26  Wilco Dijkstra  
+ 
+ 	Backported from master:
+ 	2024-01-16  Wilco Dijkstra  
+ 
+ 	* config/aarch64/aarch64-cores.def (AARCH64_CORE): Add 'cobalt-100' CPU.
+ 	* config/aarch64/aarch64-tune.md: Regenerated.
+ 	* doc/invoke.texi (-mcpu): Add cobalt-100 core.
+ 
+ 2024-01-25  Georg-Johann Lay  
+ 
+ 	Backported from master:
+ 	2024-01-25  Georg-Johann Lay  
+ 
+ 	PR target/113601
+ 	* config/avr/avr-mcus.def (atmega3208, atmega3209): Fix data_section_start.
+ 
+ 2024-01-16  Georg-Johann Lay  
+ 
+ 	Backported from master:
+ 	2024-01-15  Georg-Johann Lay  
+ 
+ 	PR target/107201
+ 	* config/avr/avr.h (EXTRA_SPEC_FUNCTIONS): Add no-devlib, avr_no_devlib.
+ 	* config/avr/driver-avr.cc (avr_no_devlib): New function.
+ 	(avr_devicespecs_file): Use it to remove -nodevicelib from the
+ 	options for cores only.
+ 	* config/avr/avr-arch.h (avr_get_parch): New prototype.
+ 	* config/avr/avr-devices.cc (avr_get_parch): New function.
+ 
+ 2024-01-15  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2024-01-15  Andrew Pinski  
+ 
+ 	PR target/113156
+ 	* config/avr/avr.opt (-mdouble, -mlong-double): Add "Save" flag.
+ 	(-mbranch-cost): Set "Optimization" flag.
+ 
+ 2024-01-12  Georg-Johann Lay  
+ 
+ 	Backported from master:
+ 	2024-01-12  Georg-Johann Lay  
+ 
+ 	* config/avr/avr.cc (avr_handle_addr_attribute): Move "..." from
+ 	format string to %s argument.
+ 
+ 2024-01-08  Georg-Johann Lay  
+ 
+ 	Backported from master:
+ 	2024-01-08  Georg-Johann Lay  
+ 
+ 	PR target/112952
+ 	* config/avr/avr.cc (avr_handle_addr_attribute): Also print valid
+ 	range when diagnosing attribute "io" and "io_low" are out of range.
+ 	(avr_eval_addr_attrib): Don't ICE on empty address at that place.
+ 	(avr_insert_attributes): Reject if attribute "address", "io" or "io_low"
+ 	in contexts other than static storage.
+ 	(avr_asm_output_aligned_decl_common): Move output of decls with
+ 	attribute "address", "io", and "io_low" to...
+ 	(avr_output_addr_attrib): ...this new function.
+ 	(avr_asm_asm_output_aligned_bss): Remove output for decls with
+ 	attribute "address", "io", and "io_low".
+ 	(avr_encode_section_info): Rectify handling of decls with attribute
+ 	"address", "io", and "io_low".
+ 
+ 2023-12-19  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-12-19  Jakub Jelinek  
+ 
+ 	PR target/112816
+ 	* config/i386/mmx.md (signbitv2sf2): Force operands[1] into a REG.
+ 
+ 2023-12-18  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-12-18  Jakub Jelinek  
+ 
+ 	PR tree-optimization/113013
+ 	* tree-object-size.cc (alloc_object_size): Return size_unknown if
+ 	corresponding argument(s) don't have integral type or have integral
+ 	type with higher precision than sizetype.  Don't check arg1 >= 0
+ 	uselessly.  Compare argument indexes against gimple_call_num_args
+ 	in unsigned type rather than int.  Formatting fixes.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-11-29  Jakub Jelinek  
+ 
+ 	PR middle-end/112733
+ 	* fold-const.cc (multiple_of_p): Pass SIGNED rather than
+ 	UNSIGNED for wi::multiple_of_p on widest_int arguments.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-12-05  Jakub Jelinek  
+ 
+ 	PR target/112845
+ 	* config/i386/i386.md (movabsq $(i32 << shift), r64 peephole2): FAIL
+ 	if the new immediate is ix86_endbr_immediate_operand.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-12-04  Jakub Jelinek  
+ 
+ 	PR target/112837
+ 	* config/i386/i386.cc (ix86_elim_entry_set_got): Before checking
+ 	for UNSPEC_SET_GOT check that SET_SRC is UNSPEC.  Use SET_SRC and
+ 	SET_DEST macros instead of XEXP, rename vec variable to set.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-12-04  Jakub Jelinek  
+ 
+ 	PR target/112816
+ 	* config/i386/sse.md (signbit2): Force operands[1] into a REG.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-11-25  Jakub Jelinek  
+ 
+ 	PR target/111408
+ 	* config/i386/i386.md (*jcc_bt_mask): Add (const_int 0) as
+ 	expected second operand of bt_comparison_operator.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-11-13  Jakub Jelinek  
+ 
+ 	PR tree-optimization/111967
+ 	* gimple-range-cache.cc (block_range_cache::set_bb_range): Grow
+ 	m_ssa_ranges to num_ssa_names rather than num_ssa_names + 1.
+ 	(block_range_cache::dump): Iterate from 1 rather than 0.  Don't use
+ 	ssa_name (x) unless m_ssa_ranges[x] is non-NULL.  Iterate to
+ 	m_ssa_ranges.length () rather than num_ssa_names.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-11-09  Jakub Jelinek  
+ 
+ 	PR c/112339
+ 	* attribs.cc (attribute_ignored_p): Only return true for
+ 	attr_namespace_ignored_p if as is NULL.
+ 	(decl_attributes): Never add ignored attributes.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-07-19  Jakub Jelinek  
+ 
+ 	PR tree-optimization/110731
+ 	* wide-int.cc (wi::divmod_internal): Always unpack dividend and
+ 	divisor as UNSIGNED regardless of sgn.
+ 
+ 2023-12-15  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-24  Richard Biener  
+ 
+ 	PR debug/111080
+ 	* dwarf2out.cc (prune_unused_types_walk): Handle
+ 	DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
+ 	DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
+ 	and DW_TAG_dynamic_type as to only output them when referenced.
+ 
+ 2023-12-15  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-25  Richard Biener  
+ 
+ 	PR tree-optimization/111137
+ 	* tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
+ 	Properly handle grouped stores from other SLP instances.
+ 
+ 2023-12-15  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-25  Richard Biener  
+ 
+ 	* tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
+ 	Split out from vect_slp_analyze_node_dependences, remove
+ 	dead code.
+ 	(vect_slp_analyze_load_dependences): Split out from
+ 	vect_slp_analyze_node_dependences, adjust comments.  Process
+ 	queued stores before any disambiguation.
+ 	(vect_slp_analyze_node_dependences): Remove.
+ 	(vect_slp_analyze_instance_dependence): Adjust.
+ 
+ 2023-12-12  liuhongt  
+ 
+ 	Backported from master:
+ 	2023-12-12  liuhongt  
+ 
+ 	PR target/112891
+ 	* config/i386/i386.cc (ix86_avx_u128_mode_after): Return
+ 	AVX_U128_ANY if callee_abi doesn't clobber all_sse_regs to
+ 	align with ix86_avx_u128_mode_needed.
+ 	(ix86_avx_u128_mode_needed): Return AVX_U128_ClEAN for
+ 	sibling_call.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-10-23  Richard Biener  
+ 
+ 	PR tree-optimization/111917
+ 	* tree-ssa-loop-unswitch.cc (hoist_guard): Always insert
+ 	new conditional after last stmt.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-10-17  Richard Biener  
+ 
+ 	PR middle-end/111818
+ 	* tree-ssa.cc (maybe_optimize_var): When clearing
+ 	DECL_NOT_GIMPLE_REG_P always rewrite into SSA.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-09-28  Richard Biener  
+ 
+ 	PR tree-optimization/111614
+ 	* tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
+ 	convert the first vector when required.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-10-12  Richard Biener  
+ 
+ 	PR tree-optimization/111764
+ 	* tree-vect-loop.cc (check_reduction_path): Remove the attempt
+ 	to allow x + x via special-casing of assigns.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-10-20  Richard Biener  
+ 
+ 	PR tree-optimization/111445
+ 	* tree-scalar-evolution.cc (simple_iv_with_niters):
+ 	Add missing check for a sign-conversion.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-18  Richard Biener  
+ 
+ 	PR tree-optimization/111019
+ 	* tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
+ 	also scrap base and offset in case the ref is indirect.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-03  Richard Biener  
+ 
+ 	PR tree-optimization/110702
+ 	* tree-ssa-loop-ivopts.cc (rewrite_use_address): When
+ 	we created a NULL pointer based access rewrite that to
+ 	a LEA.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-07-06  Richard Biener  
+ 
+ 	PR tree-optimization/110556
+ 	* tree-ssa-tail-merge.cc (gimple_equal_p): Check
+ 	assign code and all operands of non-stores.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-07-06  Richard Biener  
+ 
+ 	PR tree-optimization/110515
+ 	* tree-ssa-pre.cc (compute_avail): Make code dealing
+ 	with hoisting loads with different alias-sets more
+ 	robust.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-06-20  Richard Biener  
+ 
+ 	PR debug/110295
+ 	* dwarf2out.cc (process_scope_var): Continue processing
+ 	the decl after setting a parent in case the existing DIE
+ 	was in limbo.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-05-31  Richard Biener  
+ 
+ 	PR ipa/109983
+ 	PR tree-optimization/109143
+ 	* tree-ssa-structalias.cc (struct topo_info): Remove.
+ 	(init_topo_info): Likewise.
+ 	(free_topo_info): Likewise.
+ 	(compute_topo_order): Simplify API, put the component
+ 	with ESCAPED last so it's processed first.
+ 	(topo_visit): Adjust.
+ 	(solve_graph): Likewise.
+ 
+ 2023-11-24  Uros Bizjak  
+ 
+ 	Backported from master:
+ 	2023-11-23  Uros Bizjak  
+ 
+ 	PR target/112672
+ 	* config/i386/i386.md (parityhi2):
+ 	Use temporary register in the call to gen_parityhi2_cmp.
+ 
+ 2023-11-22  Maciej W. Rozycki  
+ 
+ 	Backported from master:
+ 	2023-11-22  Maciej W. Rozycki  
+ 
+ 	PR target/111815
+ 	* config/vax/vax.cc (index_term_p): Only accept the index scaler
+ 	as the RHS operand to ASHIFT.
+ 
+ 2023-11-20  Lulu Cheng  
+ 
+ 	Backported from master:
+ 	2023-11-20  Lulu Cheng  
+ 
+ 	* config/loongarch/gnu-user.h (MUSL_ABI_SPEC): Modify suffix.
+ 
+ 2023-11-20  Peng Fan  
+ 
+ 	Backported from master:
+ 	2023-04-21  Peng Fan  
+ 
+ 	* config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
+ 
+ 2023-11-16  Xi Ruoyao  
+ 
+ 	Backported from master:
+ 	2023-11-15  Xi Ruoyao  
+ 
+ 	* config/loongarch/loongarch.cc
+ 	(loongarch_memmodel_needs_release_fence): Remove.
+ 	(loongarch_cas_failure_memorder_needs_acquire): New static
+ 	function.
+ 	(loongarch_print_operand): Redefine 'G' for the barrier on CAS
+ 	failure.
+ 	* config/loongarch/sync.md (atomic_cas_value_strong):
+ 	Remove the redundant barrier before the LL instruction, and
+ 	emit an acquire barrier on failure if needed by
+ 	failure_memorder.
+ 	(atomic_cas_value_cmp_and_7_): Likewise.
+ 	(atomic_cas_value_add_7_): Remove the unnecessary barrier
+ 	before the LL instruction.
+ 	(atomic_cas_value_sub_7_): Likewise.
+ 	(atomic_cas_value_and_7_): Likewise.
+ 	(atomic_cas_value_xor_7_): Likewise.
+ 	(atomic_cas_value_or_7_): Likewise.
+ 	(atomic_cas_value_nand_7_): Likewise.
+ 	(atomic_cas_value_exchange_7_): Likewise.
+ 
+ 2023-11-15  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-11-06  Kewen Lin  
+ 
+ 	PR target/111828
+ 	* config.in: Regenerate.
+ 	* config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Guard
+ 	inline asm handling under !HAVE_AS_POWER10_HTM.
+ 	* configure: Regenerate.
+ 	* configure.ac: Detect assembler support for HTM insns at power10.
+ 
+ 2023-11-10  liuhongt  
+ 
+ 	Backported from master:
+ 	2023-11-10  liuhongt  
+ 
+ 	PR target/112443
+ 	* config/i386/sse.md (*avx2_pcmp3_4): Fix swap condition
+ 	from LT to GT since there's not in the pattern.
+ 	(*avx2_pcmp3_5): Ditto.
+ 
+ 2023-11-06  John David Anglin  
+ 
+ 	* config/pa/pa.cc (pa_asm_trampoline_template): Fix typo.
+ 
+ 2023-10-26  Lulu Cheng  
+ 
+ 	Backported from master:
+ 	2023-10-23  Lulu Cheng  
+ 
+ 	* config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition.
+ 
+ 2023-10-26  chenxiaolong  
+ 
+ 	Backported from master:
+ 	2023-10-25  chenxiaolong  
+ 
+ 	* config/loongarch/loongarch.md (get_thread_pointer):Adds the
+ 	instruction template corresponding to the __builtin_thread_pointer
+ 	function.
+ 	* doc/extend.texi:Add the __builtin_thread_pointer function support
+ 	description to the documentation.
+ 
+ 2023-10-26  liuhongt  
+ 
+ 	Backported from master:
+ 	2023-07-06  liuhongt  
+ 
+ 	PR target/110170
+ 	* config/i386/i386.md (movdf_internal): Disparage slightly for
+ 	2 alternatives (r,v) and (v,r) by adding constraint modifier
+ 	'?'.
+ 
+ 2023-10-23  Oleg Endo  
+ 
+ 	PR target/111001
+ 	* config/sh/sh_treg_combine.cc (sh_treg_combine::record_set_of_reg):
+ 	Skip over nop move insns.
+ 
+ 2023-10-23  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-10-12  Kewen Lin  
+ 
+ 	PR target/111367
+ 	* config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed
+ 	instruction emission and incorporate to stack_protect_set.
+ 	(stack_protect_setdi): Rename to ...
+ 	(stack_protect_set): ... this, adjust constraint.
+ 	(stack_protect_testsi): Support prefixed instruction emission and
+ 	incorporate to stack_protect_test.
+ 	(stack_protect_testdi): Rename to ...
+ 	(stack_protect_test): ... this, adjust constraint.
+ 
+ 2023-10-20  Oleg Endo  
+ 
+ 	PR target/101177
+ 	* config/sh/sh.md (unnamed split pattern): Fix comparison of
+ 	find_regno_note result.
+ 
+ 2023-10-19  Richard Sandiford  
+ 
+ 	Backported from master:
+ 	2023-09-07  Richard Sandiford  
+ 
+ 	PR target/111528
+ 	* lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
+ 	rather than gen_rtx_PLUS.
+ 
+ 2023-10-16  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-09-25  Kewen Lin  
+ 
+ 	PR target/111380
+ 	* config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
+ 	target_option_default_node when the callee has no option
+ 	attributes, also simplify the existing code accordingly.
+ 
+ 2023-10-16  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-09-25  Kewen Lin  
+ 
+ 	PR target/111366
+ 	* config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
+ 	empty inline asm.
+ 
+ 2023-10-07  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2023-10-06  Andrew Pinski  
+ 
+ 	PR middle-end/111699
+ 	* match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
+ 	(v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE.
+ 
+ 2023-10-02  Pat Haugen  
+ 
+ 	Backported from master:
+ 	2023-09-19  Pat Haugen  
+ 
+ 	* config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
+ 	modulo instruction is disabled.
+ 	* config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
+ 	* config/rs6000/rs6000.md (mod3, *mod3): Check it.
+ 	(define_expand umod3): New.
+ 	(define_insn umod3): Rename to *umod3 and check if the modulo
+ 	instruction is disabled.
+ 	(umodti3, modti3): Check if the modulo instruction is disabled.
+ 
+ 2023-09-29  Wilco Dijkstra  
+ 
+ 	Backported from master:
+ 	2023-09-28  Wilco Dijkstra  
+ 
+ 	PR target/111121
+ 	* config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
+ 	(movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
+ 	* config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
+ 	for memmove.
+ 	* config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
+ 	function.
+ 
+ 2023-09-26  Eric Botcazou  
+ 
+ 	* gimple-range-gori.cc (gori_compute::logical_combine): Add missing
+ 	return statement in the varying case.
+ 
+ 2023-09-20  Richard Sandiford  
+ 
+ 	Backported from master:
+ 	2023-09-15  Richard Sandiford  
+ 
+ 	PR target/111411
+ 	* config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
+ 	the lower memory access to a mem-pair operand.
+ 
+ 2023-09-20  Richard Sandiford  
+ 
+ 	Backported from master:
+ 	2023-08-31  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.md (untyped_call): Emit a call_value
+ 	rather than a call.  List each possible destination register
+ 	in the call pattern.
+ 
+ 2023-09-12  Uros Bizjak  
+ 
+ 	PR target/111340
+ 	* config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
+ 	Call output_addr_const for CASE_CONST_SCALAR_INT.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
+ 	New function.
+ 	(aarch64_layout_frame): Use it to decide whether locals should
+ 	go above or below the saved registers.
+ 	(aarch64_expand_prologue): Update stack layout comment.
+ 	Emit a stack tie after the final adjustment.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
+ 	(aarch64_frame::below_hard_fp_saved_regs_size): Delete.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
+ 	(aarch64_frame::hard_fp_save_and_probe): New fields.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
+ 	Rather than asserting that a leaf function saves LR, instead assert
+ 	that a leaf function saves something.
+ 	(aarch64_get_separate_components): Prevent the chosen probe
+ 	registers from being individually shrink-wrapped.
+ 	(aarch64_allocate_and_probe_stack_space): Remove workaround for
+ 	probe registers that aren't at the bottom of the previous allocation.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
+ 	Always probe the residual allocation at offset 1024, asserting
+ 	that that is in range.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
+ 	the LR save slot is in the first 16 bytes of the register save area.
+ 	Only form STP/LDP push/pop candidates if both registers are valid.
+ 	(aarch64_allocate_and_probe_stack_space): Remove workaround for
+ 	when LR was not in the first 16 bytes.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
+ 	Don't probe final allocations that are exactly 1KiB in size (after
+ 	unprobed space above the final allocation has been deducted).
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
+ 	calculation of initial_adjust for frames in which all saves
+ 	are SVE saves.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
+ 	the allocation of the top of the frame.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame): Add comment above
+ 	reg_offset.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
+ 	from the bottom of the frame, rather than the bottom of the saved
+ 	register area.  Measure reg_offset from the bottom of the frame
+ 	rather than the bottom of the saved register area.
+ 	(aarch64_save_callee_saves): Update accordingly.
+ 	(aarch64_restore_callee_saves): Likewise.
+ 	(aarch64_get_separate_components): Likewise.
+ 	(aarch64_process_components): Likewise.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
+ 	to...
+ 	(aarch64_frame::bytes_above_hard_fp): ...this.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame)
+ 	(aarch64_expand_prologue): Update accordingly.
+ 	(aarch64_initial_elimination_offset): Likewise.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
+ 	(aarch64_frame::bytes_above_locals): ...this.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame)
+ 	(aarch64_initial_elimination_offset): Update accordingly.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
+ 	calculation of chain_offset into the emit_frame_chain block.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
+ 	callee_offset handling.
+ 	(aarch64_save_callee_saves): Replace the start_offset parameter
+ 	with a bytes_below_sp parameter.
+ 	(aarch64_restore_callee_saves): Likewise.
+ 	(aarch64_expand_prologue): Update accordingly.
+ 	(aarch64_expand_epilogue): Likewise.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
+ 	field.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
+ 	(aarch64_expand_epilogue): Use it instead of
+ 	below_hard_fp_saved_regs_size.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
+ 	field.
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
+ 	and use it instead of crtl->outgoing_args_size.
+ 	(aarch64_get_separate_components): Use bytes_below_saved_regs instead
+ 	of outgoing_args_size.
+ 	(aarch64_process_components): Likewise.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
+ 	allocate the frame in one go if there are no saved registers.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
+ 	chain_offset rather than callee_offset.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
+ 	a local shorthand for cfun->machine->frame.
+ 	(aarch64_restore_callee_saves, aarch64_get_separate_components):
+ 	(aarch64_process_components): Likewise.
+ 	(aarch64_allocate_and_probe_stack_space): Likewise.
+ 	(aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
+ 	(aarch64_layout_frame): Use existing shorthand for one more case.
+ 
+ 2023-09-12  Haochen Gui  
+ 
+ 	Backported from master:
+ 	2023-08-31  Haochen Gui  
+ 
+ 	PR target/96762
+ 	* config/rs6000/rs6000-string.cc (expand_block_move): Call vector
+ 	load/store with length only on 64-bit Power10.
+ 
+ 2023-09-11  liuhongt  
+ 
+ 	Backported from master:
+ 	2023-09-11  liuhongt  
+ 
+ 	PR target/111306
+ 	PR target/111335
+ 	* config/i386/sse.md (int_comm): New int_attr.
+ 	(fma__):
+ 	Remove % for Complex conjugate operations since they're not
+ 	commutative.
+ 	(fma___pair): Ditto.
+ 	(___mask): Ditto.
+ 	(cmul3): Ditto.
+ 
+ 2023-09-01  Tobias Burnus  
+ 
+ 	Backported from master:
+ 	2023-08-19  Tobias Burnus  
+ 
+ 	PR middle-end/111017
+ 	* omp-expand.cc (expand_omp_for_init_vars): Pass after=true
+ 	to expand_omp_build_cond for 'factor != 0' condition, resulting
+ 	in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
+ 
+ 2023-09-01  Lulu Cheng  
+ 
+ 	Backported from master:
+ 	2023-09-01  Lulu Cheng  
+ 		    Guo Jie  
+ 
+ 	PR target/110484
+ 	* config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
+ 	frame_pointer_needed to determine whether to use the $fp register.
+ 
+ 2023-08-30  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-08-30  Jakub Jelinek  
+ 
+ 	PR tree-optimization/110914
+ 	* tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
+ 	adjust_last_stmt unless len is known constant.
+ 
+ 2023-08-30  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-08-30  Jakub Jelinek  
+ 
+ 	PR tree-optimization/111015
+ 	* gimple-ssa-store-merging.cc
+ 	(imm_store_chain_info::output_merged_store): Use wi::mask and
+ 	wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
+ 	build_int_cst to build BIT_AND_EXPR mask.
+ 
+ 2023-08-19  Guo Jie  
+ 
+ 	Backported from master:
+ 	2023-08-19  Guo Jie  
+ 		    Lulu Cheng  
+ 
+ 	* config/loongarch/t-loongarch: Add loongarch-driver.h into
+ 	TM_H. Add loongarch-def.h and loongarch-tune.h into
+ 	OPTIONS_H_EXTRA.
+ 
+ 2023-08-16  liuhongt  
+ 
+ 	Backported from master:
+ 	2023-08-16  liuhongt  
+ 
+ 	* config/i386/i386-builtins.cc
+ 	(ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
+ 	* config/i386/i386-options.cc (parse_mtune_ctrl_str):
+ 	Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
+ 	8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
+ 	* config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
+ 	for use_scatter_8parts
+ 	* config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
+ 	(TARGET_USE_GATHER_8PARTS): .. this.
+ 	(TARGET_USE_SCATTER): Rename to ..
+ 	(TARGET_USE_SCATTER_8PARTS): .. this.
+ 	* config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
+ 	(X86_TUNE_USE_GATHER_8PARTS): .. this.
+ 	(X86_TUNE_USE_SCATTER): Rename to
+ 	(X86_TUNE_USE_SCATTER_8PARTS): .. this.
+ 	* config/i386/i386.opt: Add new options mgather, mscatter.
+ 
+ 2023-08-16  liuhongt  
+ 
+ 	Backported from master:
+ 	2023-08-16  liuhongt  
+ 
+ 	* config/i386/i386-options.cc (m_GDS): New macro.
+ 	* config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
+ 	enable for m_GDS.
+ 	(X86_TUNE_USE_GATHER_4PARTS): Ditto.
+ 	(X86_TUNE_USE_GATHER): Ditto.
+ 
+ 2023-08-09  liuhongt  
+ 
+ 	* common/config/i386/cpuinfo.h (get_available_features): Check
+ 	max_subleaf_level for valid subleaf before use CPUID.
+ 
+ 2023-08-01  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-07-26  Kewen Lin  
+ 
+ 	PR target/110741
+ 	* config/rs6000/vsx.md (define_insn xxeval): Correct vsx
+ 	operands output with "x".
+ 
+ 2023-07-14  Uros Bizjak  
+ 
+ 	Backported from master:
+ 	2023-07-14  Uros Bizjak  
+ 
+ 	PR target/110206
+ 	* fwprop.cc (contains_paradoxical_subreg_p): Move to ...
+ 	* rtlanal.cc (contains_paradoxical_subreg_p): ... here.
+ 	* rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
+ 	* cprop.cc (try_replace_reg): Do not set REG_EQUAL note
+ 	when the original source contains a paradoxical subreg.
+ 
+ 2023-07-14  Oleg Endo  
+ 
+ 	PR target/101469
+ 	* config/sh/sh.md (peephole2): Handle case where eliminated reg
+ 	is also	used by the address of the following memory operand.
+ 
+ 2023-07-13  Uros Bizjak  
+ 
+ 	Backported from master:
+ 	2023-07-13  Uros Bizjak  
+ 
+ 	PR target/106966
+ 	* config/alpha/alpha.cc (alpha_emit_set_long_const):
+ 	Always use DImode when constructing long const.
+ 
+ 2023-07-08  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-07-08  Jonathan Wakely  
+ 
+ 	PR c++/110595
+ 	* doc/invoke.texi (Warning Options): Fix typo.
+ 
+ 2023-07-05  Michael Meissner  
+ 
+ 	Backported from master:
+ 	2023-06-23   Michael Meissner  
+ 		    Aaron Sawdey   
+ 
+ 	PR target/105325
+ 	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
+ 	allowed prefixed lwa to be generated.
+ 	* config/rs6000/fusion.md: Regenerate.
+ 	* config/rs6000/predicates.md (ds_form_mem_operand): Delete.
+ 	* config/rs6000/rs6000.md (prefixed attribute): Add support for load
+ 	plus compare immediate fused insns.
+ 	(maybe_prefixed): Likewise.
+ 
+ 2023-07-05  Segher Boessenkool  
+ 
+ 	Backported from master:
+ 	2023-06-06  Segher Boessenkool  
+ 
+ 	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
+ 	split out from...
+ 	(gen_ld_cmpi_p10): ... this.
+ 
+ 2023-07-04  Cui, Lili  
+ 
+ 	* common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
+ 	from Rocketlake, remove model value 0xbf from Alderlake.
+ 
+ 2023-06-30  Eric Botcazou  
+ 
+ 	* gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
+ 	(fold_nonarray_ctor_reference): Likewise.  Specifically deal
+ 	with integral bit-fields.
+ 	(fold_ctor_reference): Make sure that the constructor uses the
+ 	native storage order.
+ 
+ 2023-06-29  liuhongt  
+ 
+ 	PR rtl-optimization/110237
+ 	* config/i386/sse.md (_store_mask): Refine with
+ 	UNSPEC_MASKMOV.
+ 	(maskstore_store_mask): New define_insn, it's renamed
+ 	from original _store_mask.
+ 
+ 2023-06-29  liuhongt  
+ 
+ 	PR target/110309
+ 	* config/i386/sse.md (maskload):
+ 	Refine pattern with UNSPEC_MASKLOAD.
+ 	(maskload): Ditto.
+ 	(*_load_mask): Extend mode iterator to
+ 	VI12HF_AVX512VL.
+ 	(*_load): Ditto.
+ 
+ 2023-06-29  Hongyu Wang  
+ 
+ 	Backported from master:
+ 	2023-06-26  Hongyu Wang  
+ 
+ 	* config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
+ 	Override tune_string with arch_string if tune_string is not
+ 	explicitly specified.
+ 
+ 2023-06-28  Thomas Schwinge  
+ 
+ 	Backported from master:
+ 	2023-06-02  Thomas Schwinge  
+ 
+ 	PR testsuite/66005
+ 	* doc/install.texi: Document (optional) Perl usage for parallel
+ 	testing of libgomp.
+ 
+ 2023-06-28  liuhongt  
+ 
+ 	* config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
+ 	Move flag_expensive_optimizations && !optimize_size to ..
+ 	* config/i386/i386-options.cc (ix86_option_override_internal):
+ 	.. this, it makes -mvzeroupper independent of optimization
+ 	level, but still keeps the behavior of architecture
+ 	tuning(emit_vzeroupper) unchanged.
+ 
+ 2023-06-27  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2023-06-27  Andrew Pinski  
+ 
+ 	PR middle-end/110420
+ 	PR middle-end/103979
+ 	PR middle-end/98619
+ 	* gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
+ 
+ 2023-06-23  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-06-19  Richard Biener  
+ 
+ 	PR tree-optimization/110298
+ 	* tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
+ 	Clear number of iterations info before cleaning up the CFG.
+ 
+ 2023-06-23  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-06-09  Richard Biener  
+ 
+ 	PR middle-end/110182
+ 	* match.pd (two conversions in a row): Use element_precision
+ 	to DTRT for VECTOR_TYPE.
+ 
+ 2023-06-22  Alex Coplan  
+ 
+ 	Backported from master:
+ 	2023-06-07  Alex Coplan  
+ 
+ 	PR target/110132
+ 	* config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
+ 	New. Use it ...
+ 	(aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
+ 	names for builtins.
+ 	(aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
+ 	setup if in_lto_p, just like we do for SVE.
+ 	* config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
+ 	(__arm_st64b): Delete.
+ 	(__arm_st64bv): Delete.
+ 	(__arm_st64bv0): Delete.
+ 
+ 2023-06-22  Alex Coplan  
+ 
+ 	Backported from master:
+ 	2023-06-07  Alex Coplan  
+ 
+ 	PR target/110100
+ 	* config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
+ 	Use input operand for the destination address.
+ 	* config/aarch64/aarch64.md (st64b): Fix constraint on address
+ 	operand.
+ 
+ 2023-06-22  Alex Coplan  
+ 
+ 	Backported from master:
+ 	2023-06-07  Alex Coplan  
+ 
+ 	PR target/110100
+ 	* config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
+ 	Replace eight consecutive spaces with tabs.
+ 	(aarch64_init_ls64_builtins): Likewise.
+ 	(aarch64_expand_builtin_ls64): Likewise.
+ 	* config/aarch64/aarch64.md (ld64b): Likewise.
+ 	(st64b): Likewise.
+ 	(st64bv): Likewise
+ 	(st64bv0): Likewise.
+ 
+ 2023-06-20  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-06-12  Kewen Lin  
+ 
+ 	PR target/109932
+ 	* config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
+ 	__builtin_unpack_vector_int128): Move from stanza power7 to vsx.
+ 
+ 2023-06-20  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-06-12  Kewen Lin  
+ 
+ 	PR target/110011
+ 	* config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
+ 	floating constant itself for real_to_target call.
+ 
+ 2023-06-15  Lulu Cheng  
+ 
+ 	Backported from master:
+ 	2023-06-15  Lulu Cheng  
+ 		    Andrew Pinski  
+ 
+ 	PR target/110136
+ 	* config/loongarch/loongarch.md: Modify the register constraints for template
+ 	"jumptable" and "indirect_jump" from "r" to "e".
+ 
+ 2023-06-12  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-06-12  Richard Biener  
+ 
+ 	PR middle-end/110200
+ 	* genmatch.cc (expr::gen_transform): Put braces around
+ 	the if arm for the (convert ...) short-cut.
+ 
+ 2023-06-10  Georg-Johann Lay  
+ 
+ 	PR target/109650
+ 	PR target/92729
+ 	Backport from 2023-05-10 master r14-1688.
+ 	* config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
+ 	* config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
+ 	(avr_pass_data_ifelse): New pass_data for it.
+ 	(make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
+ 	(avr_canonicalize_comparison, avr_out_plus_set_ZN)
+ 	(avr_out_cmp_ext): New functions.
+ 	(compare_condtition): Make sure REG_CC dies in the branch insn.
+ 	(avr_rtx_costs_1): Add computation of cbranch costs.
+ 	(avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
+ 	[ADJUST_LEN_CMP_SEXT]Handle them.
+ 	(TARGET_CANONICALIZE_COMPARISON): New define.
+ 	(avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
+ 	(avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
+ 	(TARGET_MACHINE_DEPENDENT_REORG): Remove define.
+ 	* config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
+ 	(make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
+ 	(avr_out_cmp_zext): New Protos
+ 	* config/avr/avr.md (branch, difficult_branch): Don't split insns.
+ 	(*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
+ 	(*swapped_tst, *add.for.eqne.): New insns.
+ 	(*cbranch4): Rename to cbranch4_insn.
+ 	(define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
+ 	(define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
+ 	Add new RTL peepholes for decrement-and-branch and *swapped_tst.
+ 	Rework signtest-and-branch peepholes for *sbrx_branch.
+ 	(adjust_len) [add_set_ZN, cmp_zext]: New.
+ 	(QIPSI): New mode iterator.
+ 	(ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
+ 	(gelt): New code iterator.
+ 	(gelt_eqne): New code attribute.
+ 	(rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
+ 	(branch_unspec, *negated_tst, *reversed_tst)
+ 	(*cmpqi_sign_extend): Remove insns.
+ 	(define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
+ 	* config/avr/avr-dimode.md (cbranch4): Canonicalize comparisons.
+ 	* config/avr/predicates.md (scratch_or_d_register_operand): New.
+ 	* config/avr/constraints.md (Yxx): New constraint.
+ 
+ 2023-06-09  Jeevitha Palanisamy  
+ 
+ 	Backported from master:
+ 	2023-06-06  Jeevitha Palanisamy  
+ 
+ 	PR target/106907
+ 	* config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
+ 	duplicate expression.
+ 
+ 2023-06-09  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-06-02  Iain Sandoe  
+ 
+ 	PR target/110044
+ 	* config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
+ 	Make sure that we do not have a cap on field alignment before altering
+ 	the struct layout based on the type alignment of the first entry.
+ 
+ 2023-06-09  liuhongt  
+ 
+ 	PR target/110108
+ 	* config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
+ 	view_convert_expr mask to signed type when folding pblendvb
+ 	builtins.
+ 
+ 2023-06-08  Alex Coplan  
+ 
+ 	Backported from master:
+ 	2023-05-25  Alex Coplan  
+ 
+ 	PR target/109800
+ 	* config/arm/arm.md (movdf): Generate temporary pseudo in DImode
+ 	instead of DFmode.
+ 	* config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
+ 	lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
+ 	DFmode as an rvalue.
+ 
+ 2023-06-08  Kyrylo Tkachov  
+ 
+ 	Backported from master:
+ 	2023-05-24  Kyrylo Tkachov  
+ 
+ 	PR target/109939
+ 	* config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
+ 	qualifier_none for the return operand.
+ 
+ 2023-06-02  Georg-Johann Lay  
+ 
+ 	PR target/110088
+ 	* config/avr/avr.md: Add an RTL peephole to optimize operations on
+ 	non-LD_REGS after a move from LD_REGS.
+ 	(piaop): New code iterator.
+ 
+ 2023-06-01  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-06-01  Jonathan Wakely  
+ 
+ 	PR target/109954
+ 	* doc/invoke.texi (x86 Options): Fix description of -m32 option.
+ 
+ 2023-05-30  Andreas Schwab  
+ 
+ 	PR target/110036
+ 	* config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
+ 	match libsanitizer.
+ 
+ 2023-05-25  Georg-Johann Lay  
+ 
+ 	PR target/104327
+ 	* config/avr/avr.cc (avr_can_inline_p): New static function.
+ 	(TARGET_CAN_INLINE_P): Define to that function.
+ 
+ 2023-05-25  Georg-Johann Lay  
+ 
+ 	PR target/82931
+ 	* config/avr/avr.md (*movbitqi.0): Rename to *movbit.0-6.
+ 	Handle any bit position and use mode QISI.
+ 	* config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
+ 	of 2 insns for bit-transfer of respective style.
+ 
+ 2023-05-23  Georg-Johann Lay  
+ 
+ 	* config/avr/avr.cc (avr_insn_cost): New static function.
+ 	(TARGET_INSN_COST): Define to that function.
+ 
+ 2023-05-22   Michael Meissner  
+ 
+ 	PR target/70243
+ 	* config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
+ 	(vsx_nfmsv4sf4): Do not generate vnmsubfp.  Back port from master
+ 	04/10/2023 change.
+ 
+ 2023-05-22  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-05-21  Jakub Jelinek  
+ 
+ 	PR tree-optimization/109505
+ 	* match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
+ 	Combine successive equal operations with constants,
+ 	(A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
+ 	CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
+ 	operands.
+ 
+ 2023-05-22  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-05-17  Kewen Lin  
+ 
+ 	* tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
+ 	suggested unroll factor once the previous analysis fails.
+ 
+ 2023-05-20  Triffid Hunter  
+ 
+ 	PR target/105753
+ 	Backport from 2023-05-20 https://gcc.gnu.org/r14-1016
+ 	* config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
+ 	Remove superfluous "parallel" in insn pattern.
+ 	([u]divmod4): Tidy code.  Use gcc_unreachable() instead of
+ 	printing error text to assembly.
+ 
+ 2023-05-18  Alexandre Oliva  
+ 
+ 	* config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
+ 	after vmsr and vmrs, and lower the case of P0.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	* config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
+ 	(__ARM_mve_coerce1): Remove.
+ 	(__ARM_mve_coerce2): Remove.
+ 	(__ARM_mve_coerce3): Remove.
+ 	(__ARM_mve_coerce_i_scalar): New.
+ 	(__ARM_mve_coerce_s8_ptr): New.
+ 	(__ARM_mve_coerce_u8_ptr): New.
+ 	(__ARM_mve_coerce_s16_ptr): New.
+ 	(__ARM_mve_coerce_u16_ptr): New.
+ 	(__ARM_mve_coerce_s32_ptr): New.
+ 	(__ARM_mve_coerce_u32_ptr): New.
+ 	(__ARM_mve_coerce_s64_ptr): New.
+ 	(__ARM_mve_coerce_u64_ptr): New.
+ 	(__ARM_mve_coerce_f_scalar): New.
+ 	(__ARM_mve_coerce_f16_ptr): New.
+ 	(__ARM_mve_coerce_f32_ptr): New.
+ 	(__arm_vst4q): Change _coerce_ overloads.
+ 	(__arm_vbicq): Change _coerce_ overloads.
+ 	(__arm_vmulq): Change _coerce_ overloads.
+ 	(__arm_vcmpeqq): Change _coerce_ overloads.
+ 	(__arm_vcmpneq): Change _coerce_ overloads.
+ 	(__arm_vmaxnmavq): Change _coerce_ overloads.
+ 	(__arm_vmaxnmvq): Change _coerce_ overloads.
+ 	(__arm_vminnmavq): Change _coerce_ overloads.
+ 	(__arm_vsubq): Change _coerce_ overloads.
+ 	(__arm_vminnmvq): Change _coerce_ overloads.
+ 	(__arm_vrshlq): Change _coerce_ overloads.
+ 	(__arm_vqsubq): Change _coerce_ overloads.
+ 	(__arm_vqdmulltq): Change _coerce_ overloads.
+ 	(__arm_vqdmullbq): Change _coerce_ overloads.
+ 	(__arm_vqdmulhq): Change _coerce_ overloads.
+ 	(__arm_vqaddq): Change _coerce_ overloads.
+ 	(__arm_vhaddq): Change _coerce_ overloads.
+ 	(__arm_vhsubq): Change _coerce_ overloads.
+ 	(__arm_vqdmlashq): Change _coerce_ overloads.
+ 	(__arm_vqrdmlahq): Change _coerce_ overloads.
+ 	(__arm_vmlasq): Change _coerce_ overloads.
+ 	(__arm_vqdmlahq): Change _coerce_ overloads.
+ 	(__arm_vmaxnmavq_p): Change _coerce_ overloads.
+ 	(__arm_vmaxnmvq_p): Change _coerce_ overloads.
+ 	(__arm_vminnmavq_p): Change _coerce_ overloads.
+ 	(__arm_vminnmvq_p): Change _coerce_ overloads.
+ 	(__arm_vfmasq_m): Change _coerce_ overloads.
+ 	(__arm_vld1q): Change _coerce_ overloads.
+ 	(__arm_vld1q_z): Change _coerce_ overloads.
+ 	(__arm_vld2q): Change _coerce_ overloads.
+ 	(__arm_vld4q): Change _coerce_ overloads.
+ 	(__arm_vldrhq_gather_offset): Change _coerce_ overloads.
+ 	(__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
+ 	(__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
+ 	(__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
+ 	(__arm_vldrwq_gather_offset): Change _coerce_ overloads.
+ 	(__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
+ 	(__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
+ 	(__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
+ 	(__arm_vst1q_p): Change _coerce_ overloads.
+ 	(__arm_vst2q): Change _coerce_ overloads.
+ 	(__arm_vst1q): Change _coerce_ overloads.
+ 	(__arm_vstrhq): Change _coerce_ overloads.
+ 	(__arm_vstrhq_p): Change _coerce_ overloads.
+ 	(__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
+ 	(__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
+ 	(__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
+ 	(__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
+ 	(__arm_vstrwq_p): Change _coerce_ overloads.
+ 	(__arm_vstrwq): Change _coerce_ overloads.
+ 	(__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
+ 	(__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
+ 	(__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
+ 	(__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
+ 	(__arm_vsetq_lane): Change _coerce_ overloads.
+ 	(__arm_vcmpneq_m): Change _coerce_ overloads.
+ 	(__arm_vldrbq_gather_offset): Change _coerce_ overloads.
+ 	(__arm_vdwdupq_x_u8): Change _coerce_ overloads.
+ 	(__arm_vdwdupq_x_u16): Change _coerce_ overloads.
+ 	(__arm_vdwdupq_x_u32): Change _coerce_ overloads.
+ 	(__arm_viwdupq_x_u8): Change _coerce_ overloads.
+ 	(__arm_viwdupq_x_u16): Change _coerce_ overloads.
+ 	(__arm_viwdupq_x_u32): Change _coerce_ overloads.
+ 	(__arm_vidupq_x_u8): Change _coerce_ overloads.
+ 	(__arm_vddupq_x_u8): Change _coerce_ overloads.
+ 	(__arm_vidupq_x_u16): Change _coerce_ overloads.
+ 	(__arm_vddupq_x_u16): Change _coerce_ overloads.
+ 	(__arm_vidupq_x_u32): Change _coerce_ overloads.
+ 	(__arm_vddupq_x_u32): Change _coerce_ overloads.
+ 	(__arm_vhaddq_x): Change _coerce_ overloads.
+ 	(__arm_vhsubq_x): Change _coerce_ overloads.
+ 	(__arm_vldrdq_gather_offset): Change _coerce_ overloads.
+ 	(__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
+ 	(__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
+ 	(__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
+ 	(__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
+ 	(__arm_vqrdmlahq_m): Change _coerce_ overloads.
+ 	(__arm_vqrdmlashq_m): Change _coerce_ overloads.
+ 	(__arm_vqdmlashq_m): Change _coerce_ overloads.
+ 	(__arm_vmlaldavaxq_p): Change _coerce_ overloads.
+ 	(__arm_vmlasq_m): Change _coerce_ overloads.
+ 	(__arm_vqdmulhq_m): Change _coerce_ overloads.
+ 	(__arm_vqdmulltq_m): Change _coerce_ overloads.
+ 	(__arm_vidupq_u16): Change _coerce_ overloads.
+ 	(__arm_vidupq_u32): Change _coerce_ overloads.
+ 	(__arm_vidupq_u8): Change _coerce_ overloads.
+ 	(__arm_vddupq_u16): Change _coerce_ overloads.
+ 	(__arm_vddupq_u32): Change _coerce_ overloads.
+ 	(__arm_vddupq_u8): Change _coerce_ overloads.
+ 	(__arm_viwdupq_m): Change _coerce_ overloads.
+ 	(__arm_viwdupq_u16): Change _coerce_ overloads.
+ 	(__arm_viwdupq_u32): Change _coerce_ overloads.
+ 	(__arm_viwdupq_u8): Change _coerce_ overloads.
+ 	(__arm_vdwdupq_m): Change _coerce_ overloads.
+ 	(__arm_vdwdupq_u16): Change _coerce_ overloads.
+ 	(__arm_vdwdupq_u32): Change _coerce_ overloads.
+ 	(__arm_vdwdupq_u8): Change _coerce_ overloads.
+ 	(__arm_vaddlvaq): Change _coerce_ overloads.
+ 	(__arm_vaddlvaq_p): Change _coerce_ overloads.
+ 	(__arm_vaddvaq): Change _coerce_ overloads.
+ 	(__arm_vaddvaq_p): Change _coerce_ overloads.
+ 	(__arm_vcmphiq_m): Change _coerce_ overloads.
+ 	(__arm_vmladavaq_p): Change _coerce_ overloads.
+ 	(__arm_vmladavaxq): Change _coerce_ overloads.
+ 	(__arm_vmlaldavaxq): Change _coerce_ overloads.
+ 	(__arm_vstrbq): Change _coerce_ overloads.
+ 	(__arm_vstrbq_p): Change _coerce_ overloads.
+ 	(__arm_vrmlaldavhaq_p): Change _coerce_ overloads.
+ 	(__arm_vstrbq_scatter_offset): Change _coerce_ overloads.
+ 	(__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
+ 	(__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
+ 	(__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
+ 	(__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
+ 	(__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	* config/arm/arm_mve.h (__arm_vbicq): Change coerce on
+ 	scalar constant.
+ 	(__arm_vmvnq_m): Likewise.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	* config/arm/arm_mve.h (__arm_vorrq): Add _n variant.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	Backported from master:
+ 	2023-05-18  Stam Markianos-Wright  
+ 
+ 	* config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
+ 	(__arm_vadcq_u32): Likewise.
+ 	(__arm_vadcq_m_s32): Likewise.
+ 	(__arm_vadcq_m_u32): Likewise.
+ 	(__arm_vsbcq_s32): Likewise.
+ 	(__arm_vsbcq_u32): Likewise.
+ 	(__arm_vsbcq_m_s32): Likewise.
+ 	(__arm_vsbcq_m_u32): Likewise.
+ 	* config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	* config/arm/mve.md (mve_vrndq_m_f, mve_vrev64q_f)
+ 	(mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
+ 	(mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_)
+ 	(mve_vrev64q_, mve_vcvtq_from_f_)
+ 	(mve_vmovltq_, mve_vmovlbq_)
+ 	(mve_vcvtpq_, mve_vcvtnq_)
+ 	(mve_vcvtmq_, mve_vcvtaq_)
+ 	(mve_vmvnq_n_, mve_vrev16q_v16qi)
+ 	(mve_vctpqhi, mve_vbrsrq_n_f)
+ 	(mve_vbrsrq_n_, mve_vandq_f, mve_vbicq_f)
+ 	(mve_vbicq_n_, mve_vctpq_mhi)
+ 	(mve_vcvtbq_f16_f32v8hf, mve_vcvttq_f16_f32v8hf)
+ 	(mve_veorq_f, mve_vmlaldavxq_s, mve_vmlsldavq_s)
+ 	(mve_vmlsldavxq_s, mve_vornq_f, mve_vorrq_f)
+ 	(mve_vrmlaldavhxq_sv4si, mve_vbicq_m_n_)
+ 	(mve_vcvtq_m_to_f_, mve_vshlcq_)
+ 	(mve_vmvnq_m_, mve_vpselq_)
+ 	(mve_vcvtbq_m_f16_f32v8hf, mve_vcvtbq_m_f32_f16v4sf)
+ 	(mve_vcvttq_m_f16_f32v8hf, mve_vcvttq_m_f32_f16v4sf)
+ 	(mve_vmlaldavq_p_, mve_vmlsldavaq_s)
+ 	(mve_vmlsldavaxq_s, mve_vmlsldavq_p_s)
+ 	(mve_vmlsldavxq_p_s, mve_vmvnq_m_n_)
+ 	(mve_vorrq_m_n_, mve_vpselq_f)
+ 	(mve_vrev32q_m_fv8hf, mve_vrev32q_m_)
+ 	(mve_vrev64q_m_f, mve_vrmlaldavhaxq_sv4si)
+ 	(mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhaxq_sv4si)
+ 	(mve_vrmlsldavhq_p_sv4si, mve_vrmlsldavhxq_p_sv4si)
+ 	(mve_vrev16q_m_v16qi, mve_vrmlaldavhq_p_v4si)
+ 	(mve_vrmlsldavhaq_sv4si, mve_vandq_m_)
+ 	(mve_vbicq_m_, mve_veorq_m_)
+ 	(mve_vornq_m_, mve_vorrq_m_)
+ 	(mve_vandq_m_f, mve_vbicq_m_f, mve_veorq_m_f)
+ 	(mve_vornq_m_f, mve_vorrq_m_f)
+ 	(mve_vstrdq_scatter_shifted_offset_p_v2di_insn)
+ 	(mve_vstrdq_scatter_shifted_offset_v2di_insn)
+ 	(mve_vstrdq_scatter_base_wb_p_v2di) : Fix spacing and
+ 	capitalization in the emitted asm.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	* config/arm/constraints.md (mve_vldrd_immediate): Move it to
+ 	predicates.md.
+ 	(Ri): Move constraint definition from predicates.md.
+ 	(Rl): Define new constraint.
+ 	* config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_v4si): Add
+ 	missing constraint.
+ 	(mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
+ 	for op 1, use mve_vstrw_immediate predicate and Rl constraint for
+ 	op 2. Fix asm output spacing.
+ 	(mve_vstrdq_scatter_base_wb_p_v2di): Add missing constraint.
+ 	* config/arm/predicates.md (Ri) Move constraint to constraints.md
+ 	(mve_vldrd_immediate): Move it from
+ 	constraints.md.
+ 	(mve_vstrw_immediate): New predicate.
+ 
+ 2023-05-18  Murray Steele  
+ 
+ 	Backported from master:
+ 	2023-01-18  Murray Steele  
+ 
+ 	PR target/108442
+ 	* config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
+ 	function.
+ 	(__arm_vst1q_p_s8): Likewise.
+ 	(__arm_vld1q_z_u8): Likewise.
+ 	(__arm_vld1q_z_s8): Likewise.
+ 	(__arm_vst1q_p_u16): Likewise.
+ 	(__arm_vst1q_p_s16): Likewise.
+ 	(__arm_vld1q_z_u16): Likewise.
+ 	(__arm_vld1q_z_s16): Likewise.
+ 	(__arm_vst1q_p_u32): Likewise.
+ 	(__arm_vst1q_p_s32): Likewise.
+ 	(__arm_vld1q_z_u32): Likewise.
+ 	(__arm_vld1q_z_s32): Likewise.
+ 	(__arm_vld1q_z_f16): Likewise.
+ 	(__arm_vst1q_p_f16): Likewise.
+ 	(__arm_vld1q_z_f32): Likewise.
+ 	(__arm_vst1q_p_f32): Likewise.
+ 
+ 2023-05-18  Andre Vieira  
+ 
+ 	Backported from master:
+ 	2023-01-24  Andre Vieira  
+ 
+ 	PR target/108177
+ 	* config/arm/mve.md (mve_vstrbq_p_, mve_vstrhq_p_fv8hf,
+ 	mve_vstrhq_p_, mve_vstrwq_p_v4si): Add memory operand
+ 	as input operand.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	Backported from master:
+ 	2023-04-04  Stam Markianos-Wright  
+ 
+ 	* config/arm/mve.md (mve_vcvtq_n_to_f_): Swap operands.
+ 	(mve_vcreateq_f): Swap operands.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	Backported from master:
+ 	2023-01-16  Stam Markianos-Wright  
+ 
+ 	PR target/96795
+ 	PR target/107515
+ 	* config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
+ 	(__ARM_mve_coerce3): Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* config/arm/mve.md (mve_vqnegq_s): Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* config/arm/mve.md (mve_vqabsq_s): Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* config/arm/mve.md (mve_vnegq_f, mve_vnegq_s):
+ 	Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* config/arm/mve.md (@mve_vclzq_s): Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* config/arm/mve.md (mve_vclsq_s): Fix spacing.
+ 
+ 2023-05-18  Christophe Lyon  
+ 
+ 	Backported from master:
+ 	2023-02-03  Christophe Lyon  
+ 
+ 	* config/arm/mve.md (mve_vabavq_p_): Add length
+ 	attribute.
+ 	(mve_vqshluq_m_n_s): Likewise.
+ 	(mve_vshlq_m_): Likewise.
+ 	(mve_vsriq_m_n_): Likewise.
+ 	(mve_vsubq_m_): Likewise.
+ 
+ 2023-05-18  Christophe Lyon  
+ 
+ 	Backported from master:
+ 	2022-10-03  Christophe Lyon  
+ 
+ 	* config/arm/mve.md (mve_vrev64q_m_): Add early
+ 	clobber.
+ 	(mve_vrev64q_m_f): Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* config/arm/mve.md (mve_vrmlaldavhq_v4si,
+ 	mve_vrmlaldavhaq_v4si): Fix spacing vs tabs.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* config/arm/mve.md (mve_vmlaldavaq_)
+ 	(mve_vmlaldavaxq_s, mve_vmlaldavaxq_p_): Fix
+ 	spacing vs tabs.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* config/arm/mve.md (mve_vsubq_n_f): Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* config/arm/mve.md (mve_vaddlvq_p_v4si)
+ 	(mve_vaddq_n_, mve_vaddvaq_)
+ 	(mve_vaddlvaq_v4si, mve_vaddq_n_f)
+ 	(mve_vaddlvaq_p_v4si, mve_vaddq, mve_vaddq_f):
+ 	Fix spacing.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	Backported from master:
+ 	2022-11-28  Stam Markianos-Wright  
+ 
+ 	* config/arm/arm_mve.h (__arm_vsubq_x FP): New overloads.
+ 	(__arm_vsubq_x Integer): New.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	Backported from master:
+ 	2022-11-28  Stam Markianos-Wright  
+ 
+ 	PR target/107515
+ 	* config/arm/arm_mve.h (__ARM_mve_typeid): Add float types.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	Backported from master:
+ 	2022-11-28  Stam Markianos-Wright  
+ 
+ 	PR target/96795
+ 	* config/arm/arm_mve.h (__arm_vaddq): Fix Overloading.
+ 	(__arm_vmulq): Likewise.
+ 	(__arm_vcmpeqq): Likewise.
+ 	(__arm_vcmpneq): Likewise.
+ 	(__arm_vmaxnmavq): Likewise.
+ 	(__arm_vmaxnmvq): Likewise.
+ 	(__arm_vminnmavq): Likewise.
+ 	(__arm_vsubq): Likewise.
+ 	(__arm_vminnmvq): Likewise.
+ 	(__arm_vrshlq): Likewise.
+ 	(__arm_vqsubq): Likewise.
+ 	(__arm_vqdmulltq): Likewise.
+ 	(__arm_vqdmullbq): Likewise.
+ 	(__arm_vqdmulhq): Likewise.
+ 	(__arm_vqaddq): Likewise.
+ 	(__arm_vhaddq): Likewise.
+ 	(__arm_vhsubq): Likewise.
+ 	(__arm_vqdmlashq): Likewise.
+ 	(__arm_vqrdmlahq): Likewise.
+ 	(__arm_vmlasq): Likewise.
+ 	(__arm_vqdmlahq): Likewise.
+ 	(__arm_vmaxnmavq_p): Likewise.
+ 	(__arm_vmaxnmvq_p): Likewise.
+ 	(__arm_vminnmavq_p): Likewise.
+ 	(__arm_vminnmvq_p): Likewise.
+ 	(__arm_vfmasq_m): Likewise.
+ 	(__arm_vsetq_lane): Likewise.
+ 	(__arm_vcmpneq_m): Likewise.
+ 	(__arm_vhaddq_x): Likewise.
+ 	(__arm_vhsubq_x): Likewise.
+ 	(__arm_vqrdmlashq_m): Likewise.
+ 	(__arm_vqdmlashq_m): Likewise.
+ 	(__arm_vmlaldavaxq_p): Likewise.
+ 	(__arm_vmlasq_m): Likewise.
+ 	(__arm_vqdmulhq_m): Likewise.
+ 	(__arm_vqdmulltq_m): Likewise.
+ 	(__arm_viwdupq_m): Likewise.
+ 	(__arm_viwdupq_u16): Likewise.
+ 	(__arm_viwdupq_u32): Likewise.
+ 	(__arm_viwdupq_u8): Likewise.
+ 	(__arm_vdwdupq_m): Likewise.
+ 	(__arm_vdwdupq_u16): Likewise.
+ 	(__arm_vdwdupq_u32): Likewise.
+ 	(__arm_vdwdupq_u8): Likewise.
+ 	(__arm_vaddlvaq): Likewise.
+ 	(__arm_vaddlvaq_p): Likewise.
+ 	(__arm_vaddvaq): Likewise.
+ 	(__arm_vaddvaq_p): Likewise.
+ 	(__arm_vcmphiq_m): Likewise.
+ 	(__arm_vmladavaq_p): Likewise.
+ 	(__arm_vmladavaxq): Likewise.
+ 	(__arm_vmlaldavaxq): Likewise.
+ 	(__arm_vrmlaldavhaq_p): Likewise.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	Backported from master:
+ 	2022-11-28  Stam Markianos-Wright  
+ 
+ 	PR target/96795
+ 	* config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Change types.
+ 	(__arm_vaddq_m_n_s32): Likewise.
+ 	(__arm_vaddq_m_n_s16): Likewise.
+ 	(__arm_vaddq_m_n_u8): Likewise.
+ 	(__arm_vaddq_m_n_u32): Likewise.
+ 	(__arm_vaddq_m_n_u16): Likewise.
+ 	(__arm_vaddq_m): Fix Overloading.
+ 	(__ARM_mve_coerce3): New.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* config/arm/mve.md (mve_vabsq_f): Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* config/arm/mve.md (@mve_vcmpq_): Fix
+ 	spacing.
+ 	* config/arm/arm_mve.h (__arm_vcmpgtq_m, __arm_vcmpleq_m)
+ 	(__arm_vcmpltq_m, __arm_vcmpneq_m): Add missing defines.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* config/arm/mve.md (mve_vdupq_n_f)
+ 	(mve_vdupq_n_, mve_vdupq_m_n_)
+ 	(mve_vdupq_m_n_f): Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* config/arm/mve.md (mve_vdwdupq_m_wb_u_insn): Fix spacing.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* config/arm/mve.md (mve_vddupq_u_insn): Fix 'vddup.u'
+ 	spacing.
+ 	(mve_vddupq_m_wb_u_insn): Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Fix
+ 	'vmsr' spacing and reg capitalization.
+ 
+ 2023-05-15  liuhongt  
+ 
+ 	* config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
+ 	whenever -mdaz-ftz is specified. Don't link crtfastmath.o
+ 	when -mno-daz-ftz is specified.
+ 	* config/i386/darwin.h (ENDFILE_SPEC): Ditto.
+ 	* config/i386/gnu-user-common.h
+ 	(GNU_USER_TARGET_MATHFILE_SPEC): Ditto.
+ 	* config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
+ 	* config/i386/i386.opt (mdaz-ftz): New option.
+ 	* doc/invoke.texi (x86 options): Document mftz-daz.
+ 
+ 2023-05-09  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-05-09  Jakub Jelinek  
+ 
+ 	PR tree-optimization/109778
+ 	* wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
+ 	wi::zext (x, width) rather than x if width != precision, rather
+ 	than using wi::zext (right, width) after the shift.
+ 	* tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
+ 	of wi::lrotate or wi::rrotate.
+ 
+ 2023-05-09  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-04-26  Kewen Lin  
+ 
+ 	PR target/108758
+ 	* config/rs6000/rs6000-builtins.def
+ 	(__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
+ 	__builtin_vsx_scalar_cmp_exp_qp_lt,
+ 	__builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
+ 	to power9-vector.
+ 
+ 2023-05-09  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-04-26  Kewen Lin  
+ 
+ 	PR target/109069
+ 	* config/rs6000/altivec.md (sldoi_to_mov): Replace predicate
+ 	easy_vector_constant with const_vector_each_byte_same, add
+ 	handlings in preparation for !easy_vector_constant, and update
+ 	VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
+ 	* config/rs6000/predicates.md (const_vector_each_byte_same): New
+ 	predicate.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/DATESTAMP gcc-12.4.0/gcc/DATESTAMP
*** gcc-12.3.0/gcc/DATESTAMP	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/DATESTAMP	Thu Jun 20 08:08:05 2024
***************
*** 1 ****
! 20230508
--- 1 ----
! 20240620
diff -Nrcpad gcc-12.3.0/gcc/ada/ChangeLog gcc-12.4.0/gcc/ada/ChangeLog
*** gcc-12.3.0/gcc/ada/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/ada/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,60 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-10  Eric Botcazou  
+ 
+ 	PR ada/114708
+ 	* exp_util.adb (Finalize_Address): Add guard for incomplete types.
+ 
+ 2024-03-07  Eric Botcazou  
+ 
+ 	PR ada/113979
+ 	* exp_ch4.adb (Expand_N_Allocator): In the subtype indication case,
+ 	remove call to Apply_Predicate_Check.
+ 
+ 2024-02-26  Eric Botcazou  
+ 
+ 	PR ada/113893
+ 	* exp_ch7.adb (Build_Anonymous_Master): Do not build the master
+ 	for a local designated type.
+ 	* exp_util.adb (Build_Allocate_Deallocate_Proc): Force Needs_Fin
+ 	to false if no finalization master is attached to an access type
+ 	and assert that it is anonymous in this case.
+ 	* sem_res.adb (Resolve_Allocator): Mention that the object might
+ 	not be finalized at all in the warning given when the type is an
+ 	anonymous access-to-controlled type.
+ 
+ 2024-01-09  Steve Baird  
+ 
+ 	PR ada/104354
+ 	* libgnat/s-rident.ads: Define a new restriction,
+ 	No_Task_Hierarchy_Implicit. This is like the No_Task_Hierarchy
+ 	restriction, but with the difference that setting this restriction
+ 	does not mean the H.6(6) post-compilation check is satisified.
+ 	* exp_ch6.adb (Add_Task_Actuals_To_Build_In_Place_Call): If it is
+ 	known that the function result cannot have tasks, then pass in a
+ 	null literal for the activation chain actual parameter. This
+ 	avoids generating a reference to an entity that
+ 	Build_Activation_Chain_Entity may have chosen not to generate a
+ 	declaration for.
+ 	* gnatbind.adb (List_Applicable_Restrictions): Do not list the
+ 	No_Task_Hierarchy_Implicit restriction.
+ 	* restrict.adb: Special treatment for the
+ 	No_Task_Hierarchy_Implicit restriction in functions
+ 	Get_Restriction_Id and Restriction_Active. The former is needed to
+ 	disallow the (unlikely) case that a user tries to explicitly
+ 	reference the No_Task_Hierarchy_Implicit restriction.
+ 	* sem_prag.adb (Analyze_Pragma): If a Sequential
+ 	Partition_Elaboration_Policy is specified (and the
+ 	No_Task_Hierarchy restriction is not already enabled), then enable
+ 	the No_Task_Hierarchy_Implicit restriction.
+ 
+ 2023-11-16  Eric Botcazou  
+ 
+ 	* gcc-interface/decl.cc (gnat_to_gnu_subprog_type): Also create a
+ 	TYPE_DECL for the return type built for the CI/CO mechanism.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/ada/exp_ch4.adb gcc-12.4.0/gcc/ada/exp_ch4.adb
*** gcc-12.3.0/gcc/ada/exp_ch4.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/exp_ch4.adb	Thu Jun 20 08:08:06 2024
*************** package body Exp_Ch4 is
*** 4823,4830 ****
           if Is_Array_Type (Dtyp) and then not No_Initialization (N) then
              Apply_Constraint_Check (Expression (N), Dtyp, No_Sliding => True);
  
-             Apply_Predicate_Check (Expression (N), Dtyp);
- 
              if Nkind (Expression (N)) = N_Raise_Constraint_Error then
                 Rewrite (N, New_Copy (Expression (N)));
                 Set_Etype (N, PtrT);
--- 4823,4828 ----
diff -Nrcpad gcc-12.3.0/gcc/ada/exp_ch6.adb gcc-12.4.0/gcc/ada/exp_ch6.adb
*** gcc-12.3.0/gcc/ada/exp_ch6.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/exp_ch6.adb	Thu Jun 20 08:08:06 2024
*************** package body Exp_Ch6 is
*** 630,636 ****
  
        --  Create the actual which is a pointer to the current activation chain
  
!       if No (Chain) then
           Chain_Actual :=
             Make_Attribute_Reference (Loc,
               Prefix         => Make_Identifier (Loc, Name_uChain),
--- 630,639 ----
  
        --  Create the actual which is a pointer to the current activation chain
  
!       if Restriction_Active (No_Task_Hierarchy) then
!          Chain_Actual := Make_Null (Loc);
! 
!       elsif No (Chain) then
           Chain_Actual :=
             Make_Attribute_Reference (Loc,
               Prefix         => Make_Identifier (Loc, Name_uChain),
diff -Nrcpad gcc-12.3.0/gcc/ada/exp_ch7.adb gcc-12.4.0/gcc/ada/exp_ch7.adb
*** gcc-12.3.0/gcc/ada/exp_ch7.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/exp_ch7.adb	Thu Jun 20 08:08:06 2024
*************** package body Exp_Ch7 is
*** 796,801 ****
--- 796,802 ----
        Desig_Typ : Entity_Id;
        FM_Id     : Entity_Id;
        Priv_View : Entity_Id;
+       Scop      : Entity_Id;
        Unit_Decl : Node_Id;
        Unit_Id   : Entity_Id;
  
*************** package body Exp_Ch7 is
*** 834,839 ****
--- 835,852 ----
           Desig_Typ := Priv_View;
        end if;
  
+       --  For a designated type not declared at library level, we cannot create
+       --  a finalization collection attached to an outer unit since this would
+       --  generate dangling references to the dynamic scope through access-to-
+       --  procedure values designating the local Finalize_Address primitive.
+ 
+       Scop := Enclosing_Dynamic_Scope (Desig_Typ);
+       if Scop /= Standard_Standard
+         and then Scope_Depth (Scop) > Scope_Depth (Unit_Id)
+       then
+          return;
+       end if;
+ 
        --  Determine whether the current semantic unit already has an anonymous
        --  master which services the designated type.
  
diff -Nrcpad gcc-12.3.0/gcc/ada/exp_util.adb gcc-12.4.0/gcc/ada/exp_util.adb
*** gcc-12.3.0/gcc/ada/exp_util.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/exp_util.adb	Thu Jun 20 08:08:06 2024
*************** package body Exp_Util is
*** 859,864 ****
--- 859,874 ----
          Needs_Finalization (Desig_Typ)
            and then not No_Heap_Finalization (Ptr_Typ);
  
+       --  The allocation/deallocation of a controlled object must be associated
+       --  with an attachment to/detachment from a finalization master, but the
+       --  implementation cannot guarantee this property for every anonymous
+       --  access tyoe, see Build_Anonymous_Collection.
+ 
+       if Needs_Fin and then No (Finalization_Master (Ptr_Typ)) then
+          pragma Assert (Ekind (Ptr_Typ) = E_Anonymous_Access_Type);
+          Needs_Fin := False;
+       end if;
+ 
        if Needs_Fin then
  
           --  Do nothing if the access type may never allocate / deallocate
*************** package body Exp_Util is
*** 868,878 ****
              return;
           end if;
  
-          --  The allocation / deallocation of a controlled object must be
-          --  chained on / detached from a finalization master.
- 
-          pragma Assert (Present (Finalization_Master (Ptr_Typ)));
- 
        --  The only other kind of allocation / deallocation supported by this
        --  routine is on / from a subpool.
  
--- 878,883 ----
*************** package body Exp_Util is
*** 5861,5866 ****
--- 5866,5877 ----
  
        Utyp := Underlying_Type (Base_Type (Utyp));
  
+       --  Handle incomplete types
+ 
+       if No (Utyp) then
+          return Empty;
+       end if;
+ 
        --  Deal with untagged derivation of private views. If the parent is
        --  now known to be protected, the finalization routine is the one
        --  defined on the corresponding record of the ancestor (corresponding
diff -Nrcpad gcc-12.3.0/gcc/ada/gcc-interface/decl.cc gcc-12.4.0/gcc/ada/gcc-interface/decl.cc
*** gcc-12.3.0/gcc/ada/gcc-interface/decl.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/gcc-interface/decl.cc	Thu Jun 20 08:08:06 2024
*************** gnat_to_gnu_subprog_type (Entity_Id gnat
*** 6207,6212 ****
--- 6207,6218 ----
  
  	  if (debug_info_p)
  	    rest_of_record_type_compilation (gnu_cico_return_type);
+ 
+ 	  /* Declare it now since it will never be declared otherwise.  This
+ 	     is necessary to ensure that its subtrees are properly marked.  */
+ 	  create_type_decl (TYPE_NAME (gnu_cico_return_type),
+ 			    gnu_cico_return_type,
+ 			    true, debug_info_p, gnat_subprog);
  	}
  
        gnu_return_type = gnu_cico_return_type;
diff -Nrcpad gcc-12.3.0/gcc/ada/gnatbind.adb gcc-12.4.0/gcc/ada/gnatbind.adb
*** gcc-12.3.0/gcc/ada/gnatbind.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/gnatbind.adb	Thu Jun 20 08:08:06 2024
*************** procedure Gnatbind is
*** 214,219 ****
--- 214,222 ----
           No_Specification_Of_Aspect      => False,
           --  Requires a parameter value, not a count
  
+          No_Task_Hierarchy_Implicit      => False,
+          --  A compiler implementation artifact, not a documented restriction
+ 
           No_Use_Of_Attribute             => False,
           --  Requires a parameter value, not a count
  
diff -Nrcpad gcc-12.3.0/gcc/ada/libgnat/s-rident.ads gcc-12.4.0/gcc/ada/libgnat/s-rident.ads
*** gcc-12.3.0/gcc/ada/libgnat/s-rident.ads	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/libgnat/s-rident.ads	Thu Jun 20 08:08:06 2024
*************** package System.Rident is
*** 106,112 ****
        No_Dispatching_Calls,                      -- GNAT
        No_Dynamic_Accessibility_Checks,           -- GNAT
        No_Dynamic_Attachment,                     -- Ada 2012 (RM E.7(10/3))
!       No_Dynamic_CPU_Assignment,                 -- Ada 202x (RM D.7(10/3))
        No_Dynamic_Priorities,                     -- (RM D.9(9))
        No_Enumeration_Maps,                       -- GNAT
        No_Entry_Calls_In_Elaboration_Code,        -- GNAT
--- 106,112 ----
        No_Dispatching_Calls,                      -- GNAT
        No_Dynamic_Accessibility_Checks,           -- GNAT
        No_Dynamic_Attachment,                     -- Ada 2012 (RM E.7(10/3))
!       No_Dynamic_CPU_Assignment,                 -- Ada 2022 (RM D.7(10/3))
        No_Dynamic_Priorities,                     -- (RM D.9(9))
        No_Enumeration_Maps,                       -- GNAT
        No_Entry_Calls_In_Elaboration_Code,        -- GNAT
*************** package System.Rident is
*** 150,157 ****
        No_Task_Attributes_Package,                -- GNAT
        No_Task_At_Interrupt_Priority,             -- GNAT
        No_Task_Hierarchy,                         -- (RM D.7(3), H.4(3))
!       No_Task_Termination,                       -- GNAT (Ravenscar)
!       No_Tasks_Unassigned_To_CPU,                -- Ada 202x (D.7(10.10/4))
        No_Tasking,                                -- GNAT
        No_Terminate_Alternatives,                 -- (RM D.7(6))
        No_Unchecked_Access,                       -- (RM H.4(18))
--- 150,158 ----
        No_Task_Attributes_Package,                -- GNAT
        No_Task_At_Interrupt_Priority,             -- GNAT
        No_Task_Hierarchy,                         -- (RM D.7(3), H.4(3))
!       No_Task_Hierarchy_Implicit,                -- GNAT
!       No_Task_Termination,                       -- Ada 2005 (D.7(15.1/2))
!       No_Tasks_Unassigned_To_CPU,                -- Ada 2022 (D.7(10.10/4))
        No_Tasking,                                -- GNAT
        No_Terminate_Alternatives,                 -- (RM D.7(6))
        No_Unchecked_Access,                       -- (RM H.4(18))
diff -Nrcpad gcc-12.3.0/gcc/ada/restrict.adb gcc-12.4.0/gcc/ada/restrict.adb
*** gcc-12.3.0/gcc/ada/restrict.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/restrict.adb	Thu Jun 20 08:08:06 2024
*************** package body Restrict is
*** 886,892 ****
           declare
              S : constant String := Restriction_Id'Image (J);
           begin
!             if S = Name_Buffer (1 .. Name_Len) then
                 return J;
              end if;
           end;
--- 886,895 ----
           declare
              S : constant String := Restriction_Id'Image (J);
           begin
!             if S = Name_Buffer (1 .. Name_Len)
!               --  users cannot name the N_T_H_Implicit restriction
!               and then J /= No_Task_Hierarchy_Implicit
!             then
                 return J;
              end if;
           end;
*************** package body Restrict is
*** 1093,1099 ****
  
     function Restriction_Active (R : All_Restrictions) return Boolean is
     begin
!       return Restrictions.Set (R) and then not Restriction_Warnings (R);
     end Restriction_Active;
  
     --------------------------------
--- 1096,1107 ----
  
     function Restriction_Active (R : All_Restrictions) return Boolean is
     begin
!       if Restrictions.Set (R) and then not Restriction_Warnings (R) then
!          return True;
!       else
!          return R = No_Task_Hierarchy
!            and then Restriction_Active (No_Task_Hierarchy_Implicit);
!       end if;
     end Restriction_Active;
  
     --------------------------------
diff -Nrcpad gcc-12.3.0/gcc/ada/sem_prag.adb gcc-12.4.0/gcc/ada/sem_prag.adb
*** gcc-12.3.0/gcc/ada/sem_prag.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/sem_prag.adb	Thu Jun 20 08:08:06 2024
*************** package body Sem_Prag is
*** 21102,21107 ****
--- 21102,21126 ----
                 if Partition_Elaboration_Policy_Sloc /= System_Location then
                    Partition_Elaboration_Policy_Sloc := Loc;
                 end if;
+ 
+                if PEP_Val = Name_Sequential
+                  and then not Restriction_Active (No_Task_Hierarchy)
+                then
+                   --  RM H.6(6) guarantees that No_Task_Hierarchy will be
+                   --  set eventually, so take advantage of that knowledge now.
+                   --  But we have to do this in a tricky way. If we simply
+                   --  set the No_Task_Hierarchy restriction here, then the
+                   --  assumption that the restriction will be set eventually
+                   --  becomes a self-fulfilling prophecy; the binder can
+                   --  then mistakenly conclude that the H.6(6) rule is
+                   --  satisified in cases where the post-compilation check
+                   --  should fail. So we invent a new restriction,
+                   --  No_Task_Hierarchy_Implicit, which is treated specially
+                   --  in the function Restriction_Active.
+ 
+                   Set_Restriction (No_Task_Hierarchy_Implicit, N);
+                   pragma Assert (Restriction_Active (No_Task_Hierarchy));
+                end if;
              end if;
           end PEP;
  
diff -Nrcpad gcc-12.3.0/gcc/ada/sem_res.adb gcc-12.4.0/gcc/ada/sem_res.adb
*** gcc-12.3.0/gcc/ada/sem_res.adb	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ada/sem_res.adb	Thu Jun 20 08:08:06 2024
*************** package body Sem_Res is
*** 5691,5709 ****
                 Set_Is_Dynamic_Coextension (N, False);
                 Set_Is_Static_Coextension  (N, False);
  
!                --  Anonymous access-to-controlled objects are not finalized on
!                --  time because this involves run-time ownership and currently
!                --  this property is not available. In rare cases the object may
!                --  not be finalized at all. Warn on potential issues involving
!                --  anonymous access-to-controlled objects.
  
                 if Ekind (Typ) = E_Anonymous_Access_Type
                   and then Is_Controlled_Active (Desig_T)
                 then
                    Error_Msg_N
!                     ("??object designated by anonymous access object might "
                       & "not be finalized until its enclosing library unit "
!                      & "goes out of scope", N);
                    Error_Msg_N ("\use named access type instead", N);
                 end if;
              end if;
--- 5691,5709 ----
                 Set_Is_Dynamic_Coextension (N, False);
                 Set_Is_Static_Coextension  (N, False);
  
!                --  Objects allocated through anonymous access types are not
!                --  finalized on time because this involves run-time ownership
!                --  and currently this property is not available. In rare cases
!                --  the object might not be finalized at all. Warn on potential
!                --  issues involving anonymous access-to-controlled types.
  
                 if Ekind (Typ) = E_Anonymous_Access_Type
                   and then Is_Controlled_Active (Desig_T)
                 then
                    Error_Msg_N
!                     ("??object designated by anonymous access value might "
                       & "not be finalized until its enclosing library unit "
!                      & "goes out of scope, or not be finalized at all", N);
                    Error_Msg_N ("\use named access type instead", N);
                 end if;
              end if;
diff -Nrcpad gcc-12.3.0/gcc/analyzer/ChangeLog gcc-12.4.0/gcc/analyzer/ChangeLog
*** gcc-12.3.0/gcc/analyzer/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/analyzer/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/asan.cc gcc-12.4.0/gcc/asan.cc
*** gcc-12.3.0/gcc/asan.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/asan.cc	Thu Jun 20 08:08:06 2024
*************** asan_emit_stack_protection (rtx base, rt
*** 1869,1887 ****
      }
    str_cst = asan_pp_string (&asan_pp);
  
    /* Emit the prologue sequence.  */
    if (asan_frame_size > 32 && asan_frame_size <= 65536 && pbase
        && param_asan_use_after_return)
      {
        use_after_return_class = floor_log2 (asan_frame_size - 1) - 5;
        /* __asan_stack_malloc_N guarantees alignment
  	 N < 6 ? (64 << N) : 4096 bytes.  */
        if (alignb > (use_after_return_class < 6
  		    ? (64U << use_after_return_class) : 4096U))
  	use_after_return_class = -1;
!       else if (alignb > ASAN_RED_ZONE_SIZE && (asan_frame_size & (alignb - 1)))
! 	base_align_bias = ((asan_frame_size + alignb - 1)
! 			   & ~(alignb - HOST_WIDE_INT_1)) - asan_frame_size;
      }
  
    /* Align base if target is STRICT_ALIGNMENT.  */
--- 1869,1907 ----
      }
    str_cst = asan_pp_string (&asan_pp);
  
+   gcc_checking_assert (offsets[0] == (crtl->stack_protect_guard
+ 				      ? -ASAN_RED_ZONE_SIZE : 0));
    /* Emit the prologue sequence.  */
    if (asan_frame_size > 32 && asan_frame_size <= 65536 && pbase
        && param_asan_use_after_return)
      {
+       HOST_WIDE_INT adjusted_frame_size = asan_frame_size;
+       /* The stack protector guard is allocated at the top of the frame
+ 	 and cfgexpand.cc then uses align_frame_offset (ASAN_RED_ZONE_SIZE);
+ 	 while in that case we can still use asan_frame_size, we need to take
+ 	 that into account when computing base_align_bias.  */
+       if (alignb > ASAN_RED_ZONE_SIZE && crtl->stack_protect_guard)
+ 	adjusted_frame_size += ASAN_RED_ZONE_SIZE;
        use_after_return_class = floor_log2 (asan_frame_size - 1) - 5;
        /* __asan_stack_malloc_N guarantees alignment
  	 N < 6 ? (64 << N) : 4096 bytes.  */
        if (alignb > (use_after_return_class < 6
  		    ? (64U << use_after_return_class) : 4096U))
  	use_after_return_class = -1;
!       else if (alignb > ASAN_RED_ZONE_SIZE
! 	       && (adjusted_frame_size & (alignb - 1)))
! 	{
! 	  base_align_bias
! 	    = ((adjusted_frame_size + alignb - 1)
! 	       & ~(alignb - HOST_WIDE_INT_1)) - adjusted_frame_size;
! 	  use_after_return_class
! 	    = floor_log2 (asan_frame_size + base_align_bias - 1) - 5;
! 	  if (use_after_return_class > 10)
! 	    {
! 	      base_align_bias = 0;
! 	      use_after_return_class = -1;
! 	    }
! 	}
      }
  
    /* Align base if target is STRICT_ALIGNMENT.  */
*************** asan_protect_global (tree decl, bool ign
*** 2251,2256 ****
--- 2271,2278 ----
        || (DECL_SECTION_NAME (decl) != NULL
  	  && !symtab_node::get (decl)->implicit_section
  	  && !section_sanitized_p (DECL_SECTION_NAME (decl)))
+       /* Don't protect variables in non-generic address-space.  */
+       || !ADDR_SPACE_GENERIC_P (TYPE_ADDR_SPACE (TREE_TYPE (decl)))
        || DECL_SIZE (decl) == 0
        || ASAN_RED_ZONE_SIZE * BITS_PER_UNIT > MAX_OFILE_ALIGNMENT
        || TREE_CODE (DECL_SIZE_UNIT (decl)) != INTEGER_CST
*************** instrument_derefs (gimple_stmt_iterator
*** 2710,2715 ****
--- 2732,2741 ----
    if (VAR_P (inner) && DECL_HARD_REGISTER (inner))
      return;
  
+   /* Accesses to non-generic address-spaces should not be instrumented.  */
+   if (!ADDR_SPACE_GENERIC_P (TYPE_ADDR_SPACE (TREE_TYPE (inner))))
+     return;
+ 
    poly_int64 decl_size;
    if ((VAR_P (inner) || TREE_CODE (inner) == RESULT_DECL)
        && offset == NULL_TREE
*************** asan_expand_mark_ifn (gimple_stmt_iterat
*** 3746,3754 ****
      }
    tree len = gimple_call_arg (g, 2);
  
!   gcc_assert (tree_fits_shwi_p (len));
!   unsigned HOST_WIDE_INT size_in_bytes = tree_to_shwi (len);
!   gcc_assert (size_in_bytes);
  
    g = gimple_build_assign (make_ssa_name (pointer_sized_int_node),
  			   NOP_EXPR, base);
--- 3772,3778 ----
      }
    tree len = gimple_call_arg (g, 2);
  
!   gcc_assert (poly_int_tree_p (len));
  
    g = gimple_build_assign (make_ssa_name (pointer_sized_int_node),
  			   NOP_EXPR, base);
*************** asan_expand_mark_ifn (gimple_stmt_iterat
*** 3757,3765 ****
    tree base_addr = gimple_assign_lhs (g);
  
    /* Generate direct emission if size_in_bytes is small.  */
!   if (size_in_bytes
!       <= (unsigned)param_use_after_scope_direct_emission_threshold)
      {
        const unsigned HOST_WIDE_INT shadow_size
  	= shadow_mem_size (size_in_bytes);
        const unsigned int shadow_align
--- 3781,3790 ----
    tree base_addr = gimple_assign_lhs (g);
  
    /* Generate direct emission if size_in_bytes is small.  */
!   unsigned threshold = param_use_after_scope_direct_emission_threshold;
!   if (tree_fits_uhwi_p (len) && tree_to_uhwi (len) <= threshold)
      {
+       unsigned HOST_WIDE_INT size_in_bytes = tree_to_uhwi (len);
        const unsigned HOST_WIDE_INT shadow_size
  	= shadow_mem_size (size_in_bytes);
        const unsigned int shadow_align
diff -Nrcpad gcc-12.3.0/gcc/attribs.cc gcc-12.4.0/gcc/attribs.cc
*** gcc-12.3.0/gcc/attribs.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/attribs.cc	Thu Jun 20 08:08:06 2024
*************** static const struct attribute_spec empty
*** 109,123 ****
    { NULL, 0, 0, false, false, false, false, NULL, NULL }
  };
  
- /* Return base name of the attribute.  Ie '__attr__' is turned into 'attr'.
-    To avoid need for copying, we simply return length of the string.  */
- 
- static void
- extract_attribute_substring (struct substring *str)
- {
-   canonicalize_attr_name (str->str, str->length);
- }
- 
  /* Insert an array of attributes ATTRIBUTES into a namespace.  This
     array must be NULL terminated.  NS is the name of attribute
     namespace.  IGNORED_P is true iff all unknown attributes in this
--- 109,114 ----
*************** lookup_scoped_attribute_spec (const_tree
*** 409,415 ****
  
    attr.str = IDENTIFIER_POINTER (name);
    attr.length = IDENTIFIER_LENGTH (name);
-   extract_attribute_substring (&attr);
    return attrs->attribute_hash->find_with_hash (&attr,
  						substring_hash (attr.str,
  							       	attr.length));
--- 400,405 ----
*************** diag_attr_exclusions (tree last_decl, tr
*** 489,495 ****
    if (DECL_P (node))
      {
        attrs[0] = DECL_ATTRIBUTES (node);
!       attrs[1] = TYPE_ATTRIBUTES (TREE_TYPE (node));
      }
    else
      {
--- 479,490 ----
    if (DECL_P (node))
      {
        attrs[0] = DECL_ATTRIBUTES (node);
!       if (TREE_TYPE (node))
! 	attrs[1] = TYPE_ATTRIBUTES (TREE_TYPE (node));
!       else
! 	/* TREE_TYPE can be NULL e.g. while processing attributes on
! 	   enumerators.  */
! 	attrs[1] = NULL_TREE;
      }
    else
      {
*************** attribute_ignored_p (tree attr)
*** 578,586 ****
      return false;
    if (tree ns = get_attribute_namespace (attr))
      {
-       if (attr_namespace_ignored_p (ns))
- 	return true;
        const attribute_spec *as = lookup_attribute_spec (TREE_PURPOSE (attr));
        if (as && as->max_length == -2)
  	return true;
      }
--- 573,581 ----
      return false;
    if (tree ns = get_attribute_namespace (attr))
      {
        const attribute_spec *as = lookup_attribute_spec (TREE_PURPOSE (attr));
+       if (as == NULL && attr_namespace_ignored_p (ns))
+ 	return true;
        if (as && as->max_length == -2)
  	return true;
      }
*************** decl_attributes (tree *node, tree attrib
*** 851,857 ****
  	    }
  	}
  
!       if (no_add_attrs)
  	continue;
  
        if (spec->handler != NULL)
--- 846,855 ----
  	    }
  	}
  
!       if (no_add_attrs
! 	  /* Don't add attributes registered just for -Wno-attributes=foo::bar
! 	     purposes.  */
! 	  || attribute_ignored_p (attr))
  	continue;
  
        if (spec->handler != NULL)
diff -Nrcpad gcc-12.3.0/gcc/bb-reorder.cc gcc-12.4.0/gcc/bb-reorder.cc
*** gcc-12.3.0/gcc/bb-reorder.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/bb-reorder.cc	Thu Jun 20 08:08:06 2024
*************** fix_crossing_unconditional_branches (voi
*** 2266,2272 ****
  	  /* Make sure the jump is not already an indirect or table jump.  */
  
  	  if (!computed_jump_p (last_insn)
! 	      && !tablejump_p (last_insn, NULL, NULL))
  	    {
  	      /* We have found a "crossing" unconditional branch.  Now
  		 we must convert it to an indirect jump.  First create
--- 2266,2273 ----
  	  /* Make sure the jump is not already an indirect or table jump.  */
  
  	  if (!computed_jump_p (last_insn)
! 	      && !tablejump_p (last_insn, NULL, NULL)
! 	      && asm_noperands (PATTERN (last_insn)) < 0)
  	    {
  	      /* We have found a "crossing" unconditional branch.  Now
  		 we must convert it to an indirect jump.  First create
diff -Nrcpad gcc-12.3.0/gcc/bitmap.cc gcc-12.4.0/gcc/bitmap.cc
*** gcc-12.3.0/gcc/bitmap.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/bitmap.cc	Thu Jun 20 08:08:06 2024
*************** bitmap_hash (const_bitmap head)
*** 2673,2679 ****
        for (ix = 0; ix != BITMAP_ELEMENT_WORDS; ix++)
  	hash ^= ptr->bits[ix];
      }
!   return (hashval_t)hash;
  }
  
  
--- 2673,2679 ----
        for (ix = 0; ix != BITMAP_ELEMENT_WORDS; ix++)
  	hash ^= ptr->bits[ix];
      }
!   return iterative_hash (&hash, sizeof (hash), 0);
  }
  
  
diff -Nrcpad gcc-12.3.0/gcc/builtins.cc gcc-12.4.0/gcc/builtins.cc
*** gcc-12.3.0/gcc/builtins.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/builtins.cc	Thu Jun 20 08:08:06 2024
*************** fold_builtin_arith_overflow (location_t
*** 9180,9186 ****
        tree ctype = build_complex_type (type);
        tree call = build_call_expr_internal_loc (loc, ifn, ctype, 2,
  						arg0, arg1);
!       tree tgt = save_expr (call);
        intres = build1_loc (loc, REALPART_EXPR, type, tgt);
        ovfres = build1_loc (loc, IMAGPART_EXPR, type, tgt);
        ovfres = fold_convert_loc (loc, boolean_type_node, ovfres);
--- 9180,9200 ----
        tree ctype = build_complex_type (type);
        tree call = build_call_expr_internal_loc (loc, ifn, ctype, 2,
  						arg0, arg1);
!       tree tgt;
!       if (ovf_only)
! 	{
! 	  tgt = call;
! 	  intres = NULL_TREE;
! 	}
!       else
! 	{
! 	  /* Force SAVE_EXPR even for calls which satisfy tree_invariant_p_1,
! 	     as while the call itself is const, the REALPART_EXPR store is
! 	     certainly not.  And in any case, we want just one call,
! 	     not multiple and trying to CSE them later.  */
! 	  TREE_SIDE_EFFECTS (call) = 1;
! 	  tgt = save_expr (call);
! 	}
        intres = build1_loc (loc, REALPART_EXPR, type, tgt);
        ovfres = build1_loc (loc, IMAGPART_EXPR, type, tgt);
        ovfres = fold_convert_loc (loc, boolean_type_node, ovfres);
diff -Nrcpad gcc-12.3.0/gcc/c/ChangeLog gcc-12.4.0/gcc/c/ChangeLog
*** gcc-12.3.0/gcc/c/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/c/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,17 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-06-06  Jakub Jelinek  
+ 
+ 	PR c/114493
+ 	* c-decl.cc (c_fixup_may_alias): New function.
+ 	(finish_struct): Call it if "may_alias" attribute is
+ 	specified.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/c/c-decl.cc gcc-12.4.0/gcc/c/c-decl.cc
*** gcc-12.3.0/gcc/c/c-decl.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c/c-decl.cc	Thu Jun 20 08:08:06 2024
*************** finish_incomplete_vars (tree incomplete_
*** 8699,8704 ****
--- 8699,8715 ----
      }
  }
  
+ /* TYPE is a struct or union that we're applying may_alias to after the body is
+    parsed.  Fixup any POINTER_TO types.  */
+ 
+ static void
+ c_fixup_may_alias (tree type)
+ {
+   for (tree t = TYPE_POINTER_TO (type); t; t = TYPE_NEXT_PTR_TO (t))
+     for (tree v = TYPE_MAIN_VARIANT (t); v; v = TYPE_NEXT_VARIANT (v))
+       TYPE_REF_CAN_ALIAS_ALL (v) = true;
+ }
+ 
  /* Fill in the fields of a RECORD_TYPE or UNION_TYPE node, T.
     LOC is the location of the RECORD_TYPE or UNION_TYPE's definition.
     FIELDLIST is a chain of FIELD_DECL nodes for the fields.
*************** finish_struct (location_t loc, tree t, t
*** 8973,8978 ****
--- 8984,8993 ----
        warning_at (loc, 0, "union cannot be made transparent");
      }
  
+   if (lookup_attribute ("may_alias", TYPE_ATTRIBUTES (t)))
+     for (x = TYPE_MAIN_VARIANT (t); x; x = TYPE_NEXT_VARIANT (x))
+       c_fixup_may_alias (x);
+ 
    tree incomplete_vars = C_TYPE_INCOMPLETE_VARS (TYPE_MAIN_VARIANT (t));
    for (x = TYPE_MAIN_VARIANT (t); x; x = TYPE_NEXT_VARIANT (x))
      {
diff -Nrcpad gcc-12.3.0/gcc/c-family/ChangeLog gcc-12.4.0/gcc/c-family/ChangeLog
*** gcc-12.3.0/gcc/c-family/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/c-family/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,71 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-02-22  Jakub Jelinek  
+ 
+ 	PR c/114007
+ 	* c-lex.cc (c_common_has_attribute): Parse 2 CPP_COLONs with
+ 	the first one with COLON_SCOPE flag the same as CPP_SCOPE but
+ 	ensure 0 is returned then.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-01-09  Jakub Jelinek  
+ 
+ 	PR c/113262
+ 	* c-attribs.cc (handle_copy_attribute): Don't use
+ 	DECL_SOURCE_LOCATION (decl) if decl is not DECL_P, use input_location
+ 	instead.  Formatting fixes.
+ 
+ 2024-05-08  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2024-05-07  Andrew Pinski  
+ 
+ 	PR c++/89224
+ 	* c-common.cc (convert_vector_to_array_for_subscript): Call build_qualified_type
+ 	for the inner type.
+ 
+ 2024-01-27  Lewis Hyatt  
+ 
+ 	PR preprocessor/105608
+ 	* c-pch.cc (c_common_read_pch): Start a new line map before asking
+ 	libcpp to restore macros defined prior to reading the PCH, instead
+ 	of afterward.
+ 
+ 2023-12-15  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-31  Richard Biener  
+ 
+ 	PR middle-end/111253
+ 	* c-pretty-print.cc (c_pretty_printer::primary_expression):
+ 	Only dump gimple_assign_single_p SSA def RHS.
+ 
+ 2023-05-19  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-05-15  Patrick Palka  
+ 
+ 	* c-cppbuiltin.cc (c_cpp_builtins): Predefine __cpp_auto_cast
+ 	for C++23.
+ 
+ 2023-05-09  Martin Uecker  
+ 
+ 	Backported from master:
+ 	2023-02-18  Martin Uecker  
+ 
+ 	PR c/105660
+ 	* c-attribs.cc (append_access_attr): Use order of arguments when
+ 	construction string.
+ 	(append_access_attr_idxs): Rename and make static.
+ 	* c-warn.cc (warn_parm_array_mismatch): Add assertion.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/c-family/c-attribs.cc gcc-12.4.0/gcc/c-family/c-attribs.cc
*** gcc-12.3.0/gcc/c-family/c-attribs.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c-family/c-attribs.cc	Thu Jun 20 08:08:06 2024
*************** handle_copy_attribute (tree *node, tree
*** 2820,2832 ****
    if (ref == error_mark_node)
      return NULL_TREE;
  
    if (TREE_CODE (ref) == STRING_CST)
      {
        /* Explicitly handle this case since using a string literal
  	 as an argument is a likely mistake.  */
!       error_at (DECL_SOURCE_LOCATION (decl),
! 		"%qE attribute argument cannot be a string",
! 		name);
        return NULL_TREE;
      }
  
--- 2820,2833 ----
    if (ref == error_mark_node)
      return NULL_TREE;
  
+   location_t loc = input_location;
+   if (DECL_P (decl))
+     loc = DECL_SOURCE_LOCATION (decl);
    if (TREE_CODE (ref) == STRING_CST)
      {
        /* Explicitly handle this case since using a string literal
  	 as an argument is a likely mistake.  */
!       error_at (loc, "%qE attribute argument cannot be a string", name);
        return NULL_TREE;
      }
  
*************** handle_copy_attribute (tree *node, tree
*** 2837,2846 ****
        /* Similar to the string case, since some function attributes
  	 accept literal numbers as arguments (e.g., alloc_size or
  	 nonnull) using one here is a likely mistake.  */
!       error_at (DECL_SOURCE_LOCATION (decl),
! 		"%qE attribute argument cannot be a constant arithmetic "
! 		"expression",
! 		name);
        return NULL_TREE;
      }
  
--- 2838,2845 ----
        /* Similar to the string case, since some function attributes
  	 accept literal numbers as arguments (e.g., alloc_size or
  	 nonnull) using one here is a likely mistake.  */
!       error_at (loc, "%qE attribute argument cannot be a constant arithmetic "
! 		"expression", name);
        return NULL_TREE;
      }
  
*************** handle_copy_attribute (tree *node, tree
*** 2848,2859 ****
      {
        /* Another possible mistake (but indirect self-references aren't
  	 and diagnosed and shouldn't be).  */
!       if (warning_at (DECL_SOURCE_LOCATION (decl), OPT_Wattributes,
  		      "%qE attribute ignored on a redeclaration "
! 		      "of the referenced symbol",
! 		      name))
! 	inform (DECL_SOURCE_LOCATION (node[1]),
! 		"previous declaration here");
        return NULL_TREE;
      }
  
--- 2847,2857 ----
      {
        /* Another possible mistake (but indirect self-references aren't
  	 and diagnosed and shouldn't be).  */
!       if (warning_at (loc, OPT_Wattributes,
  		      "%qE attribute ignored on a redeclaration "
! 		      "of the referenced symbol", name)
! 	  && DECL_P (node[1]))
! 	inform (DECL_SOURCE_LOCATION (node[1]), "previous declaration here");
        return NULL_TREE;
      }
  
*************** handle_copy_attribute (tree *node, tree
*** 2873,2879 ****
  	ref = TREE_OPERAND (ref, 1);
        else
  	break;
!     } while (!DECL_P (ref));
  
    /* For object pointer expressions, consider those to be requests
       to copy from their type, such as in:
--- 2871,2878 ----
  	ref = TREE_OPERAND (ref, 1);
        else
  	break;
!     }
!   while (!DECL_P (ref));
  
    /* For object pointer expressions, consider those to be requests
       to copy from their type, such as in:
*************** handle_copy_attribute (tree *node, tree
*** 2905,2912 ****
  	     to a variable, or variable attributes to a function.  */
  	  if (warning (OPT_Wattributes,
  		       "%qE attribute ignored on a declaration of "
! 		       "a different kind than referenced symbol",
! 		       name)
  	      && DECL_P (ref))
  	    inform (DECL_SOURCE_LOCATION (ref),
  		    "symbol %qD referenced by %qD declared here", ref, decl);
--- 2904,2910 ----
  	     to a variable, or variable attributes to a function.  */
  	  if (warning (OPT_Wattributes,
  		       "%qE attribute ignored on a declaration of "
! 		       "a different kind than referenced symbol", name)
  	      && DECL_P (ref))
  	    inform (DECL_SOURCE_LOCATION (ref),
  		    "symbol %qD referenced by %qD declared here", ref, decl);
*************** handle_copy_attribute (tree *node, tree
*** 2956,2964 ****
      }
    else if (!TYPE_P (decl))
      {
!       error_at (DECL_SOURCE_LOCATION (decl),
! 		"%qE attribute must apply to a declaration",
! 		name);
        return NULL_TREE;
      }
  
--- 2954,2960 ----
      }
    else if (!TYPE_P (decl))
      {
!       error_at (loc, "%qE attribute must apply to a declaration", name);
        return NULL_TREE;
      }
  
*************** append_access_attr (tree node[3], tree a
*** 4624,4645 ****
    rdwr_map cur_idxs;
    init_attr_rdwr_indices (&cur_idxs, attrs);
  
    std::string spec;
!   for (auto it = new_idxs.begin (); it != new_idxs.end (); ++it)
      {
!       const auto &newaxsref = *it;
  
        /* The map has two equal entries for each pointer argument that
  	 has an associated size argument.  Process just the entry for
  	 the former.  */
!       if ((unsigned)newaxsref.first != newaxsref.second.ptrarg)
  	continue;
  
!       const attr_access* const cura = cur_idxs.get (newaxsref.first);
        if (!cura)
  	{
  	  /* The new attribute needs to be added.  */
! 	  tree str = newaxsref.second.to_internal_string ();
  	  spec += TREE_STRING_POINTER (str);
  	  continue;
  	}
--- 4620,4646 ----
    rdwr_map cur_idxs;
    init_attr_rdwr_indices (&cur_idxs, attrs);
  
+   tree args = TYPE_ARG_TYPES (node[0]);
+   int argpos = 0;
    std::string spec;
!   for (tree arg = args; arg; arg = TREE_CHAIN (arg), argpos++)
      {
!       const attr_access* const newa = new_idxs.get (argpos);
! 
!       if (!newa)
! 	continue;
  
        /* The map has two equal entries for each pointer argument that
  	 has an associated size argument.  Process just the entry for
  	 the former.  */
!       if ((unsigned)argpos != newa->ptrarg)
  	continue;
  
!       const attr_access* const cura = cur_idxs.get (argpos);
        if (!cura)
  	{
  	  /* The new attribute needs to be added.  */
! 	  tree str = newa->to_internal_string ();
  	  spec += TREE_STRING_POINTER (str);
  	  continue;
  	}
*************** append_access_attr (tree node[3], tree a
*** 4647,4653 ****
        /* The new access spec refers to an array/pointer argument for
  	 which an access spec already exists.  Check and diagnose any
  	 conflicts.  If no conflicts are found, merge the two.  */
-       const attr_access* const newa = &newaxsref.second;
  
        if (!attrstr)
  	{
--- 4648,4653 ----
*************** append_access_attr (tree node[3], tree a
*** 4782,4788 ****
  	continue;
  
        /* Merge the CURA and NEWA.  */
!       attr_access merged = newaxsref.second;
  
        /* VLA seen in a declaration takes precedence.  */
        if (cura->minsize == HOST_WIDE_INT_M1U)
--- 4782,4788 ----
  	continue;
  
        /* Merge the CURA and NEWA.  */
!       attr_access merged = *newa;
  
        /* VLA seen in a declaration takes precedence.  */
        if (cura->minsize == HOST_WIDE_INT_M1U)
*************** append_access_attr (tree node[3], tree a
*** 4808,4816 ****
  
  /* Convenience wrapper for the above.  */
  
! tree
! append_access_attr (tree node[3], tree attrs, const char *attrstr,
! 		    char code, HOST_WIDE_INT idxs[2])
  {
    char attrspec[80];
    int n = sprintf (attrspec, "%c%u", code, (unsigned) idxs[0] - 1);
--- 4808,4816 ----
  
  /* Convenience wrapper for the above.  */
  
! static tree
! append_access_attr_idxs (tree node[3], tree attrs, const char *attrstr,
! 			 char code, HOST_WIDE_INT idxs[2])
  {
    char attrspec[80];
    int n = sprintf (attrspec, "%c%u", code, (unsigned) idxs[0] - 1);
*************** handle_access_attribute (tree node[3], t
*** 5101,5107 ****
       attributes specified on previous declarations of the same type
       and if not, concatenate the two.  */
    const char code = attr_access::mode_chars[mode];
!   tree new_attrs = append_access_attr (node, attrs, attrstr, code, idxs);
    if (!new_attrs)
      return NULL_TREE;
  
--- 5101,5107 ----
       attributes specified on previous declarations of the same type
       and if not, concatenate the two.  */
    const char code = attr_access::mode_chars[mode];
!   tree new_attrs = append_access_attr_idxs (node, attrs, attrstr, code, idxs);
    if (!new_attrs)
      return NULL_TREE;
  
*************** handle_access_attribute (tree node[3], t
*** 5114,5120 ****
      {
        /* Repeat for the previously declared type.  */
        attrs = TYPE_ATTRIBUTES (TREE_TYPE (node[1]));
!       new_attrs = append_access_attr (node, attrs, attrstr, code, idxs);
        if (!new_attrs)
  	return NULL_TREE;
  
--- 5114,5120 ----
      {
        /* Repeat for the previously declared type.  */
        attrs = TYPE_ATTRIBUTES (TREE_TYPE (node[1]));
!       new_attrs = append_access_attr_idxs (node, attrs, attrstr, code, idxs);
        if (!new_attrs)
  	return NULL_TREE;
  
diff -Nrcpad gcc-12.3.0/gcc/c-family/c-common.cc gcc-12.4.0/gcc/c-family/c-common.cc
*** gcc-12.3.0/gcc/c-family/c-common.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c-family/c-common.cc	Thu Jun 20 08:08:06 2024
*************** convert_vector_to_array_for_subscript (l
*** 8511,8516 ****
--- 8511,8517 ----
    if (gnu_vector_type_p (TREE_TYPE (*vecp)))
      {
        tree type = TREE_TYPE (*vecp);
+       tree newitype;
  
        ret = !lvalue_p (*vecp);
  
*************** convert_vector_to_array_for_subscript (l
*** 8525,8532 ****
  	 for function parameters.  */
        c_common_mark_addressable_vec (*vecp);
  
        *vecp = build1 (VIEW_CONVERT_EXPR,
! 		      build_array_type_nelts (TREE_TYPE (type),
  					      TYPE_VECTOR_SUBPARTS (type)),
  		      *vecp);
      }
--- 8526,8537 ----
  	 for function parameters.  */
        c_common_mark_addressable_vec (*vecp);
  
+       /* Make sure qualifiers are copied from the vector type to the new element
+ 	 of the array type.  */
+       newitype = build_qualified_type (TREE_TYPE (type), TYPE_QUALS (type));
+ 
        *vecp = build1 (VIEW_CONVERT_EXPR,
! 		      build_array_type_nelts (newitype,
  					      TYPE_VECTOR_SUBPARTS (type)),
  		      *vecp);
      }
diff -Nrcpad gcc-12.3.0/gcc/c-family/c-cppbuiltin.cc gcc-12.4.0/gcc/c-family/c-cppbuiltin.cc
*** gcc-12.3.0/gcc/c-family/c-cppbuiltin.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c-family/c-cppbuiltin.cc	Thu Jun 20 08:08:06 2024
*************** c_cpp_builtins (cpp_reader *pfile)
*** 1080,1085 ****
--- 1080,1086 ----
  	  cpp_define (pfile, "__cpp_if_consteval=202106L");
  	  cpp_define (pfile, "__cpp_constexpr=202110L");
  	  cpp_define (pfile, "__cpp_multidimensional_subscript=202110L");
+ 	  cpp_define (pfile, "__cpp_auto_cast=202110L");
  	}
        if (flag_concepts)
          {
diff -Nrcpad gcc-12.3.0/gcc/c-family/c-lex.cc gcc-12.4.0/gcc/c-family/c-lex.cc
*** gcc-12.3.0/gcc/c-family/c-lex.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c-family/c-lex.cc	Thu Jun 20 08:08:06 2024
*************** c_common_has_attribute (cpp_reader *pfil
*** 327,335 ****
        do
  	nxt_token = cpp_peek_token (pfile, idx++);
        while (nxt_token->type == CPP_PADDING);
!       if (nxt_token->type == CPP_SCOPE)
  	{
- 	  have_scope = true;
  	  get_token_no_padding (pfile); // Eat scope.
  	  nxt_token = get_token_no_padding (pfile);
  	  if (nxt_token->type == CPP_NAME)
--- 327,354 ----
        do
  	nxt_token = cpp_peek_token (pfile, idx++);
        while (nxt_token->type == CPP_PADDING);
!       if (!c_dialect_cxx ()
! 	  && nxt_token->type == CPP_COLON
! 	  && (nxt_token->flags & COLON_SCOPE) != 0)
! 	{
! 	  const cpp_token *prev_token = nxt_token;
! 	  do
! 	    nxt_token = cpp_peek_token (pfile, idx++);
! 	  while (nxt_token->type == CPP_PADDING);
! 	  if (nxt_token->type == CPP_COLON)
! 	    {
! 	      /* __has_attribute (vendor::attr) in -std=c17 etc. modes.
! 		 :: isn't CPP_SCOPE but 2 CPP_COLON tokens, where the
! 		 first one should have COLON_SCOPE flag to distinguish
! 		 it from : :.  */
! 	      have_scope = true;
! 	      get_token_no_padding (pfile); // Eat first colon.
! 	    }
! 	  else
! 	    nxt_token = prev_token;
! 	}
!       if (nxt_token->type == CPP_SCOPE || have_scope)
  	{
  	  get_token_no_padding (pfile); // Eat scope.
  	  nxt_token = get_token_no_padding (pfile);
  	  if (nxt_token->type == CPP_NAME)
*************** c_common_has_attribute (cpp_reader *pfil
*** 359,364 ****
--- 378,392 ----
  			 "attribute identifier required after scope");
  	      attr_name = NULL_TREE;
  	    }
+ 	  if (have_scope)
+ 	    {
+ 	      /* The parser in this case won't be able to parse
+ 		 [[vendor::attr]], so ensure 0 is returned.  */
+ 	      result = 0;
+ 	      attr_name = NULL_TREE;
+ 	    }
+ 	  else
+ 	    have_scope = true;
  	}
        else
  	{
diff -Nrcpad gcc-12.3.0/gcc/c-family/c-pch.cc gcc-12.4.0/gcc/c-family/c-pch.cc
*** gcc-12.3.0/gcc/c-family/c-pch.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c-family/c-pch.cc	Thu Jun 20 08:08:06 2024
*************** c_common_read_pch (cpp_reader *pfile, co
*** 342,347 ****
--- 342,349 ----
    gt_pch_restore (f);
    cpp_set_line_map (pfile, line_table);
    rebuild_location_adhoc_htab (line_table);
+   line_table->trace_includes = saved_trace_includes;
+   linemap_add (line_table, LC_ENTER, 0, saved_loc.file, saved_loc.line);
  
    timevar_push (TV_PCH_CPP_RESTORE);
    if (cpp_read_state (pfile, name, f, smd) != 0)
*************** c_common_read_pch (cpp_reader *pfile, co
*** 355,363 ****
  
    fclose (f);
  
-   line_table->trace_includes = saved_trace_includes;
-   linemap_add (line_table, LC_ENTER, 0, saved_loc.file, saved_loc.line);
- 
    /* Give the front end a chance to take action after a PCH file has
       been loaded.  */
    if (lang_post_pch_load)
--- 357,362 ----
diff -Nrcpad gcc-12.3.0/gcc/c-family/c-pretty-print.cc gcc-12.4.0/gcc/c-family/c-pretty-print.cc
*** gcc-12.3.0/gcc/c-family/c-pretty-print.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c-family/c-pretty-print.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 33,38 ****
--- 33,41 ----
  #include "langhooks.h"
  #include "options.h"
  #include "internal-fn.h"
+ #include "function.h"
+ #include "basic-block.h"
+ #include "gimple.h"
  
  /* The pretty-printer code is primarily designed to closely follow
     (GNU) C and C++ grammars.  That is to be contrasted with spaghetti
*************** c_pretty_printer::primary_expression (tr
*** 1363,1374 ****
  	  else
  	    primary_expression (var);
  	}
!       else
  	{
  	  /* Print only the right side of the GIMPLE assignment.  */
  	  gimple *def_stmt = SSA_NAME_DEF_STMT (e);
  	  pp_gimple_stmt_1 (this, def_stmt, 0, TDF_RHS_ONLY);
  	}
        break;
  
      default:
--- 1366,1379 ----
  	  else
  	    primary_expression (var);
  	}
!       else if (gimple_assign_single_p (SSA_NAME_DEF_STMT (e)))
  	{
  	  /* Print only the right side of the GIMPLE assignment.  */
  	  gimple *def_stmt = SSA_NAME_DEF_STMT (e);
  	  pp_gimple_stmt_1 (this, def_stmt, 0, TDF_RHS_ONLY);
  	}
+       else
+ 	expression (e);
        break;
  
      default:
diff -Nrcpad gcc-12.3.0/gcc/c-family/c-warn.cc gcc-12.4.0/gcc/c-family/c-warn.cc
*** gcc-12.3.0/gcc/c-family/c-warn.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/c-family/c-warn.cc	Thu Jun 20 08:08:06 2024
*************** warn_parm_array_mismatch (location_t ori
*** 3628,3633 ****
--- 3628,3635 ----
        for (tree newvbl = newa->size, curvbl = cura->size; newvbl;
  	   newvbl = TREE_CHAIN (newvbl), curvbl = TREE_CHAIN (curvbl))
  	{
+ 	  gcc_assert (curvbl);
+ 
  	  tree newpos = TREE_PURPOSE (newvbl);
  	  tree curpos = TREE_PURPOSE (curvbl);
  
diff -Nrcpad gcc-12.3.0/gcc/cfgexpand.cc gcc-12.4.0/gcc/cfgexpand.cc
*** gcc-12.3.0/gcc/cfgexpand.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cfgexpand.cc	Thu Jun 20 08:08:06 2024
*************** visit_conflict (gimple *, tree op, tree,
*** 571,576 ****
--- 571,596 ----
    return false;
  }
  
+ /* Helper function for add_scope_conflicts_1.  For USE on
+    a stmt, if it is a SSA_NAME and in its SSA_NAME_DEF_STMT is known to be
+    based on some ADDR_EXPR, invoke VISIT on that ADDR_EXPR.  */
+ 
+ static inline void
+ add_scope_conflicts_2 (tree use, bitmap work,
+ 		       walk_stmt_load_store_addr_fn visit)
+ {
+   if (TREE_CODE (use) == SSA_NAME
+       && (POINTER_TYPE_P (TREE_TYPE (use))
+ 	  || INTEGRAL_TYPE_P (TREE_TYPE (use))))
+     {
+       gimple *g = SSA_NAME_DEF_STMT (use);
+       if (is_gimple_assign (g))
+ 	if (tree op = gimple_assign_rhs1 (g))
+ 	  if (TREE_CODE (op) == ADDR_EXPR)
+ 	    visit (g, TREE_OPERAND (op, 0), op, work);
+     }
+ }
+ 
  /* Helper routine for add_scope_conflicts, calculating the active partitions
     at the end of BB, leaving the result in WORK.  We're called to generate
     conflicts when FOR_CONFLICT is true, otherwise we're just tracking
*************** add_scope_conflicts_1 (basic_block bb, b
*** 583,588 ****
--- 603,610 ----
    edge_iterator ei;
    gimple_stmt_iterator gsi;
    walk_stmt_load_store_addr_fn visit;
+   use_operand_p use_p;
+   ssa_op_iter iter;
  
    bitmap_clear (work);
    FOR_EACH_EDGE (e, ei, bb->preds)
*************** add_scope_conflicts_1 (basic_block bb, b
*** 593,599 ****
--- 615,624 ----
    for (gsi = gsi_start_phis (bb); !gsi_end_p (gsi); gsi_next (&gsi))
      {
        gimple *stmt = gsi_stmt (gsi);
+       gphi *phi = as_a  (stmt);
        walk_stmt_load_store_addr_ops (stmt, work, NULL, NULL, visit);
+       FOR_EACH_PHI_ARG (use_p, phi, iter, SSA_OP_USE)
+ 	add_scope_conflicts_2 (USE_FROM_PTR (use_p), work, visit);
      }
    for (gsi = gsi_after_labels (bb); !gsi_end_p (gsi); gsi_next (&gsi))
      {
*************** add_scope_conflicts_1 (basic_block bb, b
*** 613,620 ****
  	}
        else if (!is_gimple_debug (stmt))
  	{
! 	  if (for_conflict
! 	      && visit == visit_op)
  	    {
  	      /* If this is the first real instruction in this BB we need
  	         to add conflicts for everything live at this point now.
--- 638,644 ----
  	}
        else if (!is_gimple_debug (stmt))
  	{
! 	  if (for_conflict && visit == visit_op)
  	    {
  	      /* If this is the first real instruction in this BB we need
  	         to add conflicts for everything live at this point now.
*************** add_scope_conflicts_1 (basic_block bb, b
*** 634,639 ****
--- 658,665 ----
  	      visit = visit_conflict;
  	    }
  	  walk_stmt_load_store_addr_ops (stmt, work, visit, visit, visit);
+ 	  FOR_EACH_SSA_USE_OPERAND (use_p, stmt, iter, SSA_OP_USE)
+ 	    add_scope_conflicts_2 (USE_FROM_PTR (use_p), work, visit);
  	}
      }
  }
*************** expand_asm_stmt (gasm *stmt)
*** 3635,3641 ****
  		emit_insn (copy_insn (PATTERN (curr)));
  	      rtx_insn *copy = get_insns ();
  	      end_sequence ();
! 	      insert_insn_on_edge (copy, e);
  	    }
  	}
      }
--- 3661,3667 ----
  		emit_insn (copy_insn (PATTERN (curr)));
  	      rtx_insn *copy = get_insns ();
  	      end_sequence ();
! 	      prepend_insn_to_edge (copy, e);
  	    }
  	}
      }
diff -Nrcpad gcc-12.3.0/gcc/cfgrtl.cc gcc-12.4.0/gcc/cfgrtl.cc
*** gcc-12.3.0/gcc/cfgrtl.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cfgrtl.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 25,31 ****
       - CFG-aware instruction chain manipulation
  	 delete_insn, delete_insn_chain
       - Edge splitting and committing to edges
! 	 insert_insn_on_edge, commit_edge_insertions
       - CFG updating after insn simplification
  	 purge_dead_edges, purge_all_dead_edges
       - CFG fixing after coarse manipulation
--- 25,31 ----
       - CFG-aware instruction chain manipulation
  	 delete_insn, delete_insn_chain
       - Edge splitting and committing to edges
! 	 insert_insn_on_edge, prepend_insn_to_edge, commit_edge_insertions
       - CFG updating after insn simplification
  	 purge_dead_edges, purge_all_dead_edges
       - CFG fixing after coarse manipulation
*************** rtl_split_edge (edge edge_in)
*** 1967,1973 ****
  
  /* Queue instructions for insertion on an edge between two basic blocks.
     The new instructions and basic blocks (if any) will not appear in the
!    CFG until commit_edge_insertions is called.  */
  
  void
  insert_insn_on_edge (rtx pattern, edge e)
--- 1967,1974 ----
  
  /* Queue instructions for insertion on an edge between two basic blocks.
     The new instructions and basic blocks (if any) will not appear in the
!    CFG until commit_edge_insertions is called.  If there are already
!    queued instructions on the edge, PATTERN is appended to them.  */
  
  void
  insert_insn_on_edge (rtx pattern, edge e)
*************** insert_insn_on_edge (rtx pattern, edge e
*** 1987,1992 ****
--- 1988,2012 ----
    end_sequence ();
  }
  
+ /* Like insert_insn_on_edge, but if there are already queued instructions
+    on the edge, PATTERN is prepended to them.  */
+ 
+ void
+ prepend_insn_to_edge (rtx pattern, edge e)
+ {
+   /* We cannot insert instructions on an abnormal critical edge.
+      It will be easier to find the culprit if we die now.  */
+   gcc_assert (!((e->flags & EDGE_ABNORMAL) && EDGE_CRITICAL_P (e)));
+ 
+   start_sequence ();
+ 
+   emit_insn (pattern);
+   emit_insn (e->insns.r);
+ 
+   e->insns.r = get_insns ();
+   end_sequence ();
+ }
+ 
  /* Update the CFG for the instructions queued on edge E.  */
  
  void
*************** duplicate_insn_chain (rtx_insn *from, rt
*** 4354,4365 ****
  			   since MEM_EXPR is shared so make a copy and
  			   walk to the subtree again.  */
  			tree new_expr = unshare_expr (MEM_EXPR (*iter));
  			if (TREE_CODE (new_expr) == WITH_SIZE_EXPR)
  			  new_expr = TREE_OPERAND (new_expr, 0);
  			while (handled_component_p (new_expr))
  			  new_expr = TREE_OPERAND (new_expr, 0);
  			MR_DEPENDENCE_CLIQUE (new_expr) = newc;
! 			set_mem_expr (const_cast  (*iter), new_expr);
  		      }
  		  }
  	    }
--- 4374,4386 ----
  			   since MEM_EXPR is shared so make a copy and
  			   walk to the subtree again.  */
  			tree new_expr = unshare_expr (MEM_EXPR (*iter));
+ 			tree orig_new_expr = new_expr;
  			if (TREE_CODE (new_expr) == WITH_SIZE_EXPR)
  			  new_expr = TREE_OPERAND (new_expr, 0);
  			while (handled_component_p (new_expr))
  			  new_expr = TREE_OPERAND (new_expr, 0);
  			MR_DEPENDENCE_CLIQUE (new_expr) = newc;
! 			set_mem_expr (const_cast  (*iter), orig_new_expr);
  		      }
  		  }
  	    }
diff -Nrcpad gcc-12.3.0/gcc/cfgrtl.h gcc-12.4.0/gcc/cfgrtl.h
*** gcc-12.3.0/gcc/cfgrtl.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cfgrtl.h	Thu Jun 20 08:08:06 2024
*************** extern edge try_redirect_by_replacing_ju
*** 38,43 ****
--- 38,44 ----
  extern void emit_barrier_after_bb (basic_block bb);
  extern basic_block force_nonfallthru_and_redirect (edge, basic_block, rtx);
  extern void insert_insn_on_edge (rtx, edge);
+ extern void prepend_insn_to_edge (rtx, edge);
  extern void commit_one_edge_insertion (edge e);
  extern void commit_edge_insertions (void);
  extern void print_rtl_with_bb (FILE *, const rtx_insn *, dump_flags_t);
diff -Nrcpad gcc-12.3.0/gcc/cgraph.cc gcc-12.4.0/gcc/cgraph.cc
*** gcc-12.3.0/gcc/cgraph.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cgraph.cc	Thu Jun 20 08:08:06 2024
*************** cgraph_edge::redirect_callee (cgraph_nod
*** 1403,1413 ****
     speculative indirect call, remove "speculative" of the indirect call and
     also redirect stmt to it's final direct target.
  
     It is up to caller to iteratively transform each "speculative"
     direct call as appropriate.  */
  
  gimple *
! cgraph_edge::redirect_call_stmt_to_callee (cgraph_edge *e)
  {
    tree decl = gimple_call_fndecl (e->call_stmt);
    gcall *new_stmt;
--- 1403,1419 ----
     speculative indirect call, remove "speculative" of the indirect call and
     also redirect stmt to it's final direct target.
  
+    When called from within tree-inline, KILLED_SSAs has to contain the pointer
+    to killed_new_ssa_names within the copy_body_data structure and SSAs
+    discovered to be useless (if LHS is removed) will be added to it, otherwise
+    it needs to be NULL.
+ 
     It is up to caller to iteratively transform each "speculative"
     direct call as appropriate.  */
  
  gimple *
! cgraph_edge::redirect_call_stmt_to_callee (cgraph_edge *e,
! 					   hash_set  *killed_ssas)
  {
    tree decl = gimple_call_fndecl (e->call_stmt);
    gcall *new_stmt;
*************** cgraph_edge::redirect_call_stmt_to_calle
*** 1528,1534 ****
  	remove_stmt_from_eh_lp (e->call_stmt);
  
        tree old_fntype = gimple_call_fntype (e->call_stmt);
!       new_stmt = padjs->modify_call (e, false);
        cgraph_node *origin = e->callee;
        while (origin->clone_of)
  	origin = origin->clone_of;
--- 1534,1540 ----
  	remove_stmt_from_eh_lp (e->call_stmt);
  
        tree old_fntype = gimple_call_fntype (e->call_stmt);
!       new_stmt = padjs->modify_call (e, false, killed_ssas);
        cgraph_node *origin = e->callee;
        while (origin->clone_of)
  	origin = origin->clone_of;
diff -Nrcpad gcc-12.3.0/gcc/cgraph.h gcc-12.4.0/gcc/cgraph.h
*** gcc-12.3.0/gcc/cgraph.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cgraph.h	Thu Jun 20 08:08:06 2024
*************** public:
*** 476,481 ****
--- 476,484 ----
       Return NULL if there's no such node.  */
    static symtab_node *get_for_asmname (const_tree asmname);
  
+   /* Check symbol table for callees of IFUNC resolvers.  */
+   static void check_ifunc_callee_symtab_nodes (void);
+ 
    /* Verify symbol table for internal consistency.  */
    static DEBUG_FUNCTION void verify_symtab_nodes (void);
  
*************** struct GTY((tag ("SYMTAB_FUNCTION"))) cg
*** 892,898 ****
        versionable (false), can_change_signature (false),
        redefined_extern_inline (false), tm_may_enter_irr (false),
        ipcp_clone (false), declare_variant_alt (false),
!       calls_declare_variant_alt (false), m_uid (uid), m_summary_id (-1)
    {}
  
    /* Remove the node from cgraph and all inline clones inlined into it.
--- 895,903 ----
        versionable (false), can_change_signature (false),
        redefined_extern_inline (false), tm_may_enter_irr (false),
        ipcp_clone (false), declare_variant_alt (false),
!       calls_declare_variant_alt (false),
!       called_by_ifunc_resolver (false),
!       m_uid (uid), m_summary_id (-1)
    {}
  
    /* Remove the node from cgraph and all inline clones inlined into it.
*************** struct GTY((tag ("SYMTAB_FUNCTION"))) cg
*** 1491,1496 ****
--- 1496,1503 ----
    unsigned declare_variant_alt : 1;
    /* True if the function calls declare_variant_alt functions.  */
    unsigned calls_declare_variant_alt : 1;
+   /* Set if the function is called by an IFUNC resolver.  */
+   unsigned called_by_ifunc_resolver : 1;
  
  private:
    /* Unique id of the node.  */
*************** public:
*** 1833,1841 ****
       speculative indirect call, remove "speculative" of the indirect call and
       also redirect stmt to it's final direct target.
  
       It is up to caller to iteratively transform each "speculative"
       direct call as appropriate.  */
!   static gimple *redirect_call_stmt_to_callee (cgraph_edge *e);
  
    /* Create clone of edge in the node N represented
       by CALL_EXPR the callgraph.  */
--- 1840,1855 ----
       speculative indirect call, remove "speculative" of the indirect call and
       also redirect stmt to it's final direct target.
  
+      When called from within tree-inline, KILLED_SSAs has to contain the
+      pointer to killed_new_ssa_names within the copy_body_data structure and
+      SSAs discovered to be useless (if LHS is removed) will be added to it,
+      otherwise it needs to be NULL.
+ 
       It is up to caller to iteratively transform each "speculative"
       direct call as appropriate.  */
!   static gimple *redirect_call_stmt_to_callee (cgraph_edge *e,
! 					       hash_set 
! 					       *killed_ssas = nullptr);
  
    /* Create clone of edge in the node N represented
       by CALL_EXPR the callgraph.  */
diff -Nrcpad gcc-12.3.0/gcc/cgraphunit.cc gcc-12.4.0/gcc/cgraphunit.cc
*** gcc-12.3.0/gcc/cgraphunit.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cgraphunit.cc	Thu Jun 20 08:08:06 2024
*************** symbol_table::compile (void)
*** 2265,2270 ****
--- 2265,2272 ----
  
    symtab_node::checking_verify_symtab_nodes ();
  
+   symtab_node::check_ifunc_callee_symtab_nodes ();
+ 
    timevar_push (TV_CGRAPHOPT);
    if (pre_ipa_mem_report)
      dump_memory_report ("Memory consumption before IPA");
diff -Nrcpad gcc-12.3.0/gcc/combine.cc gcc-12.4.0/gcc/combine.cc
*** gcc-12.3.0/gcc/combine.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/combine.cc	Thu Jun 20 08:08:06 2024
*************** simplify_compare_const (enum rtx_code co
*** 11789,11796 ****
       `and'ed with that bit), we can replace this with a comparison
       with zero.  */
    if (const_op
!       && (code == EQ || code == NE || code == GE || code == GEU
! 	  || code == LT || code == LTU)
        && is_a  (mode, &int_mode)
        && GET_MODE_PRECISION (int_mode) - 1 < HOST_BITS_PER_WIDE_INT
        && pow2p_hwi (const_op & GET_MODE_MASK (int_mode))
--- 11789,11798 ----
       `and'ed with that bit), we can replace this with a comparison
       with zero.  */
    if (const_op
!       && (code == EQ || code == NE || code == GEU || code == LTU
! 	  /* This optimization is incorrect for signed >= INT_MIN or
! 	     < INT_MIN, those are always true or always false.  */
! 	  || ((code == GE || code == LT) && const_op > 0))
        && is_a  (mode, &int_mode)
        && GET_MODE_PRECISION (int_mode) - 1 < HOST_BITS_PER_WIDE_INT
        && pow2p_hwi (const_op & GET_MODE_MASK (int_mode))
diff -Nrcpad gcc-12.3.0/gcc/common/config/i386/cpuinfo.h gcc-12.4.0/gcc/common/config/i386/cpuinfo.h
*** gcc-12.3.0/gcc/common/config/i386/cpuinfo.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/common/config/i386/cpuinfo.h	Thu Jun 20 08:08:06 2024
*************** get_intel_cpu (struct __processor_model
*** 435,441 ****
        cpu_model->__cpu_subtype = INTEL_COREI7_SKYLAKE;
        break;
      case 0xa7:
-     case 0xa8:
        /* Rocket Lake.  */
        cpu = "rocketlake";
        CHECK___builtin_cpu_is ("corei7");
--- 435,440 ----
*************** get_intel_cpu (struct __processor_model
*** 508,514 ****
        break;
      case 0x97:
      case 0x9a:
-     case 0xbf:
        /* Alder Lake.  */
        cpu = "alderlake";
        CHECK___builtin_cpu_is ("corei7");
--- 507,512 ----
*************** get_available_features (struct __process
*** 649,655 ****
    /* Get Advanced Features at level 7 (eax = 7, ecx = 0/1). */
    if (max_cpuid_level >= 7)
      {
!       __cpuid_count (7, 0, eax, ebx, ecx, edx);
        if (ebx & bit_BMI)
  	set_feature (FEATURE_BMI);
        if (ebx & bit_SGX)
--- 647,655 ----
    /* Get Advanced Features at level 7 (eax = 7, ecx = 0/1). */
    if (max_cpuid_level >= 7)
      {
!       unsigned int max_subleaf_level;
! 
!       __cpuid_count (7, 0, max_subleaf_level, ebx, ecx, edx);
        if (ebx & bit_BMI)
  	set_feature (FEATURE_BMI);
        if (ebx & bit_SGX)
*************** get_available_features (struct __process
*** 761,778 ****
  	    set_feature (FEATURE_AVX512FP16);
  	}
  
!       __cpuid_count (7, 1, eax, ebx, ecx, edx);
!       if (eax & bit_HRESET)
! 	set_feature (FEATURE_HRESET);
!       if (avx_usable)
! 	{
! 	  if (eax & bit_AVXVNNI)
! 	    set_feature (FEATURE_AVXVNNI);
! 	}
!       if (avx512_usable)
  	{
! 	  if (eax & bit_AVX512BF16)
! 	    set_feature (FEATURE_AVX512BF16);
  	}
      }
  
--- 761,781 ----
  	    set_feature (FEATURE_AVX512FP16);
  	}
  
!       if (max_subleaf_level >= 1)
  	{
! 	  __cpuid_count (7, 1, eax, ebx, ecx, edx);
! 	  if (eax & bit_HRESET)
! 	    set_feature (FEATURE_HRESET);
! 	  if (avx_usable)
! 	    {
! 	      if (eax & bit_AVXVNNI)
! 		set_feature (FEATURE_AVXVNNI);
! 	    }
! 	  if (avx512_usable)
! 	    {
! 	      if (eax & bit_AVX512BF16)
! 		set_feature (FEATURE_AVX512BF16);
! 	    }
  	}
      }
  
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/aarch64-builtins.cc gcc-12.4.0/gcc/config/aarch64/aarch64-builtins.cc
*** gcc-12.3.0/gcc/config/aarch64/aarch64-builtins.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/aarch64-builtins.cc	Thu Jun 20 08:08:06 2024
*************** aarch64_general_add_builtin (const char
*** 751,756 ****
--- 751,766 ----
  			       NULL, attrs);
  }
  
+ static tree
+ aarch64_general_simulate_builtin (const char *name, tree fntype,
+ 				  unsigned int code,
+ 				  tree attrs = NULL_TREE)
+ {
+   code = (code << AARCH64_BUILTIN_SHIFT) | AARCH64_BUILTIN_GENERAL;
+   return simulate_builtin_function_decl (input_location, name, fntype,
+ 					 code, NULL, attrs);
+ }
+ 
  static const char *
  aarch64_mangle_builtin_scalar_type (const_tree type)
  {
*************** aarch64_init_ls64_builtins_types (void)
*** 1634,1644 ****
    gcc_assert (TYPE_ALIGN (array_type) == 64);
  
    tree field = build_decl (input_location, FIELD_DECL,
!                            get_identifier ("val"), array_type);
  
    ls64_arm_data_t = lang_hooks.types.simulate_record_decl (input_location,
!                          tuple_type_name,
!                          make_array_slice (&field, 1));
  
    gcc_assert (TYPE_MODE (ls64_arm_data_t) == V8DImode);
    gcc_assert (TYPE_MODE_RAW (ls64_arm_data_t) == TYPE_MODE (ls64_arm_data_t));
--- 1644,1654 ----
    gcc_assert (TYPE_ALIGN (array_type) == 64);
  
    tree field = build_decl (input_location, FIELD_DECL,
! 			   get_identifier ("val"), array_type);
  
    ls64_arm_data_t = lang_hooks.types.simulate_record_decl (input_location,
! 			 tuple_type_name,
! 			 make_array_slice (&field, 1));
  
    gcc_assert (TYPE_MODE (ls64_arm_data_t) == V8DImode);
    gcc_assert (TYPE_MODE_RAW (ls64_arm_data_t) == TYPE_MODE (ls64_arm_data_t));
*************** aarch64_init_ls64_builtins (void)
*** 1651,1673 ****
    aarch64_init_ls64_builtins_types ();
  
    ls64_builtins_data data[4] = {
!     {"__builtin_aarch64_ld64b", AARCH64_LS64_BUILTIN_LD64B,
       build_function_type_list (ls64_arm_data_t,
!                                const_ptr_type_node, NULL_TREE)},
!     {"__builtin_aarch64_st64b", AARCH64_LS64_BUILTIN_ST64B,
       build_function_type_list (void_type_node, ptr_type_node,
!                                ls64_arm_data_t, NULL_TREE)},
!     {"__builtin_aarch64_st64bv", AARCH64_LS64_BUILTIN_ST64BV,
       build_function_type_list (uint64_type_node, ptr_type_node,
!                                ls64_arm_data_t, NULL_TREE)},
!     {"__builtin_aarch64_st64bv0", AARCH64_LS64_BUILTIN_ST64BV0,
       build_function_type_list (uint64_type_node, ptr_type_node,
!                                ls64_arm_data_t, NULL_TREE)},
    };
  
    for (size_t i = 0; i < ARRAY_SIZE (data); ++i)
      aarch64_builtin_decls[data[i].code]
!       = aarch64_general_add_builtin (data[i].name, data[i].type, data[i].code);
  }
  
  static void
--- 1661,1684 ----
    aarch64_init_ls64_builtins_types ();
  
    ls64_builtins_data data[4] = {
!     {"__arm_ld64b", AARCH64_LS64_BUILTIN_LD64B,
       build_function_type_list (ls64_arm_data_t,
! 			       const_ptr_type_node, NULL_TREE)},
!     {"__arm_st64b", AARCH64_LS64_BUILTIN_ST64B,
       build_function_type_list (void_type_node, ptr_type_node,
! 			       ls64_arm_data_t, NULL_TREE)},
!     {"__arm_st64bv", AARCH64_LS64_BUILTIN_ST64BV,
       build_function_type_list (uint64_type_node, ptr_type_node,
! 			       ls64_arm_data_t, NULL_TREE)},
!     {"__arm_st64bv0", AARCH64_LS64_BUILTIN_ST64BV0,
       build_function_type_list (uint64_type_node, ptr_type_node,
! 			       ls64_arm_data_t, NULL_TREE)},
    };
  
    for (size_t i = 0; i < ARRAY_SIZE (data); ++i)
      aarch64_builtin_decls[data[i].code]
!       = aarch64_general_simulate_builtin (data[i].name, data[i].type,
! 					  data[i].code);
  }
  
  static void
*************** aarch64_general_init_builtins (void)
*** 1800,1805 ****
--- 1811,1819 ----
  
    if (TARGET_MEMTAG)
      aarch64_init_memtag_builtins ();
+ 
+   if (in_lto_p)
+     handle_arm_acle_h ();
  }
  
  /* Implement TARGET_BUILTIN_DECL for the AARCH64_BUILTIN_GENERAL group.  */
*************** aarch64_expand_builtin_ls64 (int fcode,
*** 2281,2320 ****
      {
      case AARCH64_LS64_BUILTIN_LD64B:
        {
!         rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
!         create_output_operand (&ops[0], target, V8DImode);
!         create_input_operand (&ops[1], op0, DImode);
!         expand_insn (CODE_FOR_ld64b, 2, ops);
!         return ops[0].value;
        }
      case AARCH64_LS64_BUILTIN_ST64B:
        {
!         rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
!         rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
!         create_output_operand (&ops[0], op0, DImode);
!         create_input_operand (&ops[1], op1, V8DImode);
!         expand_insn (CODE_FOR_st64b, 2, ops);
!         return const0_rtx;
        }
      case AARCH64_LS64_BUILTIN_ST64BV:
        {
!         rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
!         rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
!         create_output_operand (&ops[0], target, DImode);
!         create_input_operand (&ops[1], op0, DImode);
!         create_input_operand (&ops[2], op1, V8DImode);
!         expand_insn (CODE_FOR_st64bv, 3, ops);
!         return ops[0].value;
        }
      case AARCH64_LS64_BUILTIN_ST64BV0:
        {
!         rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
!         rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
!         create_output_operand (&ops[0], target, DImode);
!         create_input_operand (&ops[1], op0, DImode);
!         create_input_operand (&ops[2], op1, V8DImode);
!         expand_insn (CODE_FOR_st64bv0, 3, ops);
!         return ops[0].value;
        }
      }
  
--- 2295,2334 ----
      {
      case AARCH64_LS64_BUILTIN_LD64B:
        {
! 	rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
! 	create_output_operand (&ops[0], target, V8DImode);
! 	create_input_operand (&ops[1], op0, DImode);
! 	expand_insn (CODE_FOR_ld64b, 2, ops);
! 	return ops[0].value;
        }
      case AARCH64_LS64_BUILTIN_ST64B:
        {
! 	rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
! 	rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
! 	create_input_operand (&ops[0], op0, DImode);
! 	create_input_operand (&ops[1], op1, V8DImode);
! 	expand_insn (CODE_FOR_st64b, 2, ops);
! 	return const0_rtx;
        }
      case AARCH64_LS64_BUILTIN_ST64BV:
        {
! 	rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
! 	rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
! 	create_output_operand (&ops[0], target, DImode);
! 	create_input_operand (&ops[1], op0, DImode);
! 	create_input_operand (&ops[2], op1, V8DImode);
! 	expand_insn (CODE_FOR_st64bv, 3, ops);
! 	return ops[0].value;
        }
      case AARCH64_LS64_BUILTIN_ST64BV0:
        {
! 	rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
! 	rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
! 	create_output_operand (&ops[0], target, DImode);
! 	create_input_operand (&ops[1], op0, DImode);
! 	create_input_operand (&ops[2], op1, V8DImode);
! 	expand_insn (CODE_FOR_st64bv0, 3, ops);
! 	return ops[0].value;
        }
      }
  
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/aarch64-cores.def gcc-12.4.0/gcc/config/aarch64/aarch64-cores.def
*** gcc-12.3.0/gcc/config/aarch64/aarch64-cores.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/aarch64-cores.def	Thu Jun 20 08:08:06 2024
*************** AARCH64_CORE("cortex-r82", cortexr82, co
*** 164,170 ****
  /* Armv9.0-A Architecture Processors.  */
  
  /* Arm ('A') cores. */
! AARCH64_CORE("cortex-a510",  cortexa510, cortexa55, 9A,  AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG
   | AARCH64_FL_I8MM | AARCH64_FL_BF16, cortexa53, 0x41, 0xd46, -1)
  
  AARCH64_CORE("cortex-a710",  cortexa710, cortexa57, 9A,  AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG | AARCH64_FL_I8MM | AARCH64_FL_BF16, neoversen2, 0x41, 0xd47, -1)
--- 164,170 ----
  /* Armv9.0-A Architecture Processors.  */
  
  /* Arm ('A') cores. */
! AARCH64_CORE("cortex-a510",  cortexa510, cortexa53, 9A,  AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG
   | AARCH64_FL_I8MM | AARCH64_FL_BF16, cortexa53, 0x41, 0xd46, -1)
  
  AARCH64_CORE("cortex-a710",  cortexa710, cortexa57, 9A,  AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG | AARCH64_FL_I8MM | AARCH64_FL_BF16, neoversen2, 0x41, 0xd47, -1)
*************** AARCH64_CORE("cortex-a710",  cortexa710,
*** 172,177 ****
--- 172,178 ----
  AARCH64_CORE("cortex-x2",  cortexx2, cortexa57, 9A,  AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG | AARCH64_FL_I8MM | AARCH64_FL_BF16, neoversen2, 0x41, 0xd48, -1)
  
  AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG | AARCH64_FL_PROFILE, neoversen2, 0x41, 0xd49, -1)
+ AARCH64_CORE("cobalt-100",   cobalt100, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG | AARCH64_FL_PROFILE, neoversen2, 0x6d, 0xd49, -1)
  
  AARCH64_CORE("demeter", demeter, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG | AARCH64_FL_PROFILE, neoversev2, 0x41, 0xd4f, -1)
  AARCH64_CORE("neoverse-v2", neoversev2, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG | AARCH64_FL_PROFILE, neoversev2, 0x41, 0xd4f, -1)
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/aarch64-protos.h gcc-12.4.0/gcc/config/aarch64/aarch64-protos.h
*** gcc-12.3.0/gcc/config/aarch64/aarch64-protos.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/aarch64-protos.h	Thu Jun 20 08:08:06 2024
*************** bool aarch64_emit_approx_div (rtx, rtx,
*** 781,786 ****
--- 781,787 ----
  bool aarch64_emit_approx_sqrt (rtx, rtx, bool);
  tree aarch64_vector_load_decl (tree);
  void aarch64_expand_call (rtx, rtx, rtx, bool);
+ bool aarch64_expand_cpymem_mops (rtx *, bool);
  bool aarch64_expand_cpymem (rtx *);
  bool aarch64_expand_setmem (rtx *);
  bool aarch64_float_const_zero_rtx_p (rtx);
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/aarch64-tune.md gcc-12.4.0/gcc/config/aarch64/aarch64-tune.md
*** gcc-12.3.0/gcc/config/aarch64/aarch64-tune.md	Mon May  8 12:15:24 2023
--- gcc-12.4.0/gcc/config/aarch64/aarch64-tune.md	Thu Jun 20 08:10:28 2024
***************
*** 1,5 ****
  ;; -*- buffer-read-only: t -*-
  ;; Generated automatically by gentune.sh from aarch64-cores.def
  (define_attr "tune"
! 	"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexx2,neoversen2,demeter,neoversev2"
  	(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
--- 1,5 ----
  ;; -*- buffer-read-only: t -*-
  ;; Generated automatically by gentune.sh from aarch64-cores.def
  (define_attr "tune"
! 	"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexx2,neoversen2,cobalt100,demeter,neoversev2"
  	(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/aarch64.cc gcc-12.4.0/gcc/config/aarch64/aarch64.cc
*** gcc-12.3.0/gcc/config/aarch64/aarch64.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/aarch64.cc	Thu Jun 20 08:08:06 2024
*************** aarch64_reg_save_mode (unsigned int regn
*** 4135,4141 ****
        case ARM_PCS_SIMD:
  	/* The vector PCS saves the low 128 bits (which is the full
  	   register on non-SVE targets).  */
! 	return TFmode;
  
        case ARM_PCS_SVE:
  	/* Use vectors of DImode for registers that need frame
--- 4135,4141 ----
        case ARM_PCS_SIMD:
  	/* The vector PCS saves the low 128 bits (which is the full
  	   register on non-SVE targets).  */
! 	return V16QImode;
  
        case ARM_PCS_SVE:
  	/* Use vectors of DImode for registers that need frame
*************** aarch64_needs_frame_chain (void)
*** 8133,8150 ****
    return aarch64_use_frame_pointer;
  }
  
  /* Mark the registers that need to be saved by the callee and calculate
     the size of the callee-saved registers area and frame record (both FP
     and LR may be omitted).  */
  static void
  aarch64_layout_frame (void)
  {
-   poly_int64 offset = 0;
    int regno, last_fp_reg = INVALID_REGNUM;
    machine_mode vector_save_mode = aarch64_reg_save_mode (V8_REGNUM);
    poly_int64 vector_save_size = GET_MODE_SIZE (vector_save_mode);
    bool frame_related_fp_reg_p = false;
    aarch64_frame &frame = cfun->machine->frame;
  
    frame.emit_frame_chain = aarch64_needs_frame_chain ();
  
--- 8133,8164 ----
    return aarch64_use_frame_pointer;
  }
  
+ /* Return true if the current function should save registers above
+    the locals area, rather than below it.  */
+ 
+ static bool
+ aarch64_save_regs_above_locals_p ()
+ {
+   /* When using stack smash protection, make sure that the canary slot
+      comes between the locals and the saved registers.  Otherwise,
+      it would be possible for a carefully sized smash attack to change
+      the saved registers (particularly LR and FP) without reaching the
+      canary.  */
+   return crtl->stack_protect_guard;
+ }
+ 
  /* Mark the registers that need to be saved by the callee and calculate
     the size of the callee-saved registers area and frame record (both FP
     and LR may be omitted).  */
  static void
  aarch64_layout_frame (void)
  {
    int regno, last_fp_reg = INVALID_REGNUM;
    machine_mode vector_save_mode = aarch64_reg_save_mode (V8_REGNUM);
    poly_int64 vector_save_size = GET_MODE_SIZE (vector_save_mode);
    bool frame_related_fp_reg_p = false;
    aarch64_frame &frame = cfun->machine->frame;
+   poly_int64 top_of_locals = -1;
  
    frame.emit_frame_chain = aarch64_needs_frame_chain ();
  
*************** aarch64_layout_frame (void)
*** 8211,8221 ****
  	&& !crtl->abi->clobbers_full_reg_p (regno))
        frame.reg_offset[regno] = SLOT_REQUIRED;
  
!   /* With stack-clash, LR must be saved in non-leaf functions.  The saving of
!      LR counts as an implicit probe which allows us to maintain the invariant
!      described in the comment at expand_prologue.  */
!   gcc_assert (crtl->is_leaf
! 	      || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED));
  
    /* Now assign stack slots for the registers.  Start with the predicate
       registers, since predicate LDR and STR have a relatively small
--- 8225,8242 ----
  	&& !crtl->abi->clobbers_full_reg_p (regno))
        frame.reg_offset[regno] = SLOT_REQUIRED;
  
!   bool regs_at_top_p = aarch64_save_regs_above_locals_p ();
! 
!   poly_int64 offset = crtl->outgoing_args_size;
!   gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT));
!   if (regs_at_top_p)
!     {
!       offset += get_frame_size ();
!       offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
!       top_of_locals = offset;
!     }
!   frame.bytes_below_saved_regs = offset;
!   frame.sve_save_and_probe = INVALID_REGNUM;
  
    /* Now assign stack slots for the registers.  Start with the predicate
       registers, since predicate LDR and STR have a relatively small
*************** aarch64_layout_frame (void)
*** 8223,8233 ****
    for (regno = P0_REGNUM; regno <= P15_REGNUM; regno++)
      if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
        {
  	frame.reg_offset[regno] = offset;
  	offset += BYTES_PER_SVE_PRED;
        }
  
!   if (maybe_ne (offset, 0))
      {
        /* If we have any vector registers to save above the predicate registers,
  	 the offset of the vector register save slots need to be a multiple
--- 8244,8257 ----
    for (regno = P0_REGNUM; regno <= P15_REGNUM; regno++)
      if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
        {
+ 	if (frame.sve_save_and_probe == INVALID_REGNUM)
+ 	  frame.sve_save_and_probe = regno;
  	frame.reg_offset[regno] = offset;
  	offset += BYTES_PER_SVE_PRED;
        }
  
!   poly_int64 saved_prs_size = offset - frame.bytes_below_saved_regs;
!   if (maybe_ne (saved_prs_size, 0))
      {
        /* If we have any vector registers to save above the predicate registers,
  	 the offset of the vector register save slots need to be a multiple
*************** aarch64_layout_frame (void)
*** 8245,8254 ****
  	offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
        else
  	{
! 	  if (known_le (offset, vector_save_size))
! 	    offset = vector_save_size;
! 	  else if (known_le (offset, vector_save_size * 2))
! 	    offset = vector_save_size * 2;
  	  else
  	    gcc_unreachable ();
  	}
--- 8269,8278 ----
  	offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
        else
  	{
! 	  if (known_le (saved_prs_size, vector_save_size))
! 	    offset = frame.bytes_below_saved_regs + vector_save_size;
! 	  else if (known_le (saved_prs_size, vector_save_size * 2))
! 	    offset = frame.bytes_below_saved_regs + vector_save_size * 2;
  	  else
  	    gcc_unreachable ();
  	}
*************** aarch64_layout_frame (void)
*** 8259,8292 ****
      for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
        if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
  	{
  	  frame.reg_offset[regno] = offset;
  	  offset += vector_save_size;
  	}
  
    /* OFFSET is now the offset of the hard frame pointer from the bottom
       of the callee save area.  */
!   bool saves_below_hard_fp_p = maybe_ne (offset, 0);
!   frame.below_hard_fp_saved_regs_size = offset;
    if (frame.emit_frame_chain)
      {
        /* FP and LR are placed in the linkage record.  */
!       frame.reg_offset[R29_REGNUM] = offset;
!       frame.wb_push_candidate1 = R29_REGNUM;
!       frame.reg_offset[R30_REGNUM] = offset + UNITS_PER_WORD;
!       frame.wb_push_candidate2 = R30_REGNUM;
!       offset += 2 * UNITS_PER_WORD;
      }
  
    for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++)
      if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
!       {
! 	frame.reg_offset[regno] = offset;
! 	if (frame.wb_push_candidate1 == INVALID_REGNUM)
! 	  frame.wb_push_candidate1 = regno;
! 	else if (frame.wb_push_candidate2 == INVALID_REGNUM)
! 	  frame.wb_push_candidate2 = regno;
! 	offset += UNITS_PER_WORD;
!       }
  
    poly_int64 max_int_offset = offset;
    offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
--- 8283,8335 ----
      for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
        if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
  	{
+ 	  if (frame.sve_save_and_probe == INVALID_REGNUM)
+ 	    frame.sve_save_and_probe = regno;
  	  frame.reg_offset[regno] = offset;
  	  offset += vector_save_size;
  	}
  
    /* OFFSET is now the offset of the hard frame pointer from the bottom
       of the callee save area.  */
!   auto below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs;
!   bool saves_below_hard_fp_p = maybe_ne (below_hard_fp_saved_regs_size, 0);
!   gcc_assert (!saves_below_hard_fp_p
! 	      || (frame.sve_save_and_probe != INVALID_REGNUM
! 		  && known_eq (frame.reg_offset[frame.sve_save_and_probe],
! 			       frame.bytes_below_saved_regs)));
! 
!   frame.bytes_below_hard_fp = offset;
!   frame.hard_fp_save_and_probe = INVALID_REGNUM;
! 
!   auto allocate_gpr_slot = [&](unsigned int regno)
!     {
!       if (frame.hard_fp_save_and_probe == INVALID_REGNUM)
! 	frame.hard_fp_save_and_probe = regno;
!       frame.reg_offset[regno] = offset;
!       if (frame.wb_push_candidate1 == INVALID_REGNUM)
! 	frame.wb_push_candidate1 = regno;
!       else if (frame.wb_push_candidate2 == INVALID_REGNUM)
! 	frame.wb_push_candidate2 = regno;
!       offset += UNITS_PER_WORD;
!     };
! 
    if (frame.emit_frame_chain)
      {
        /* FP and LR are placed in the linkage record.  */
!       allocate_gpr_slot (R29_REGNUM);
!       allocate_gpr_slot (R30_REGNUM);
      }
+   else if (flag_stack_clash_protection
+ 	   && known_eq (frame.reg_offset[R30_REGNUM], SLOT_REQUIRED))
+     /* Put the LR save slot first, since it makes a good choice of probe
+        for stack clash purposes.  The idea is that the link register usually
+        has to be saved before a call anyway, and so we lose little by
+        stopping it from being individually shrink-wrapped.  */
+     allocate_gpr_slot (R30_REGNUM);
  
    for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++)
      if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
!       allocate_gpr_slot (regno);
  
    poly_int64 max_int_offset = offset;
    offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
*************** aarch64_layout_frame (void)
*** 8295,8300 ****
--- 8338,8345 ----
    for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
      if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED))
        {
+ 	if (frame.hard_fp_save_and_probe == INVALID_REGNUM)
+ 	  frame.hard_fp_save_and_probe = regno;
  	/* If there is an alignment gap between integer and fp callee-saves,
  	   allocate the last fp register to it if possible.  */
  	if (regno == last_fp_reg
*************** aarch64_layout_frame (void)
*** 8317,8346 ****
  
    offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
  
!   frame.saved_regs_size = offset;
! 
!   poly_int64 varargs_and_saved_regs_size = offset + frame.saved_varargs_size;
! 
!   poly_int64 above_outgoing_args
!     = aligned_upper_bound (varargs_and_saved_regs_size
! 			   + get_frame_size (),
! 			   STACK_BOUNDARY / BITS_PER_UNIT);
  
!   frame.hard_fp_offset
!     = above_outgoing_args - frame.below_hard_fp_saved_regs_size;
  
!   /* Both these values are already aligned.  */
!   gcc_assert (multiple_p (crtl->outgoing_args_size,
! 			  STACK_BOUNDARY / BITS_PER_UNIT));
!   frame.frame_size = above_outgoing_args + crtl->outgoing_args_size;
  
!   frame.locals_offset = frame.saved_varargs_size;
  
    frame.initial_adjust = 0;
    frame.final_adjust = 0;
    frame.callee_adjust = 0;
    frame.sve_callee_adjust = 0;
-   frame.callee_offset = 0;
  
    frame.wb_pop_candidate1 = frame.wb_push_candidate1;
    frame.wb_pop_candidate2 = frame.wb_push_candidate2;
--- 8362,8397 ----
  
    offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
  
!   auto saved_regs_size = offset - frame.bytes_below_saved_regs;
!   gcc_assert (known_eq (saved_regs_size, below_hard_fp_saved_regs_size)
! 	      || (frame.hard_fp_save_and_probe != INVALID_REGNUM
! 		  && known_eq (frame.reg_offset[frame.hard_fp_save_and_probe],
! 			       frame.bytes_below_hard_fp)));
  
!   /* With stack-clash, a register must be saved in non-leaf functions.
!      The saving of the bottommost register counts as an implicit probe,
!      which allows us to maintain the invariant described in the comment
!      at expand_prologue.  */
!   gcc_assert (crtl->is_leaf || maybe_ne (saved_regs_size, 0));
  
!   if (!regs_at_top_p)
!     {
!       offset += get_frame_size ();
!       offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
!       top_of_locals = offset;
!     }
!   offset += frame.saved_varargs_size;
!   gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT));
!   frame.frame_size = offset;
  
!   frame.bytes_above_hard_fp = frame.frame_size - frame.bytes_below_hard_fp;
!   gcc_assert (known_ge (top_of_locals, 0));
!   frame.bytes_above_locals = frame.frame_size - top_of_locals;
  
    frame.initial_adjust = 0;
    frame.final_adjust = 0;
    frame.callee_adjust = 0;
    frame.sve_callee_adjust = 0;
  
    frame.wb_pop_candidate1 = frame.wb_push_candidate1;
    frame.wb_pop_candidate2 = frame.wb_push_candidate2;
*************** aarch64_layout_frame (void)
*** 8351,8357 ****
    frame.is_scs_enabled
      = (!crtl->calls_eh_return
         && sanitize_flags_p (SANITIZE_SHADOW_CALL_STACK)
!        && known_ge (cfun->machine->frame.reg_offset[LR_REGNUM], 0));
  
    /* When shadow call stack is enabled, the scs_pop in the epilogue will
       restore x30, and we don't need to pop x30 again in the traditional
--- 8402,8408 ----
    frame.is_scs_enabled
      = (!crtl->calls_eh_return
         && sanitize_flags_p (SANITIZE_SHADOW_CALL_STACK)
!        && known_ge (frame.reg_offset[LR_REGNUM], 0));
  
    /* When shadow call stack is enabled, the scs_pop in the epilogue will
       restore x30, and we don't need to pop x30 again in the traditional
*************** aarch64_layout_frame (void)
*** 8371,8445 ****
       max_push_offset to 0, because no registers are popped at this time,
       so callee_adjust cannot be adjusted.  */
    HOST_WIDE_INT max_push_offset = 0;
!   if (frame.wb_pop_candidate2 != INVALID_REGNUM)
!     max_push_offset = 512;
!   else if (frame.wb_pop_candidate1 != INVALID_REGNUM)
!     max_push_offset = 256;
  
!   HOST_WIDE_INT const_size, const_outgoing_args_size, const_fp_offset;
    HOST_WIDE_INT const_saved_regs_size;
!   if (frame.frame_size.is_constant (&const_size)
!       && const_size < max_push_offset
!       && known_eq (frame.hard_fp_offset, const_size))
      {
!       /* Simple, small frame with no outgoing arguments:
  
  	 stp reg1, reg2, [sp, -frame_size]!
  	 stp reg3, reg4, [sp, 16]  */
        frame.callee_adjust = const_size;
      }
!   else if (crtl->outgoing_args_size.is_constant (&const_outgoing_args_size)
! 	   && frame.saved_regs_size.is_constant (&const_saved_regs_size)
! 	   && const_outgoing_args_size + const_saved_regs_size < 512
! 	   /* We could handle this case even with outgoing args, provided
! 	      that the number of args left us with valid offsets for all
! 	      predicate and vector save slots.  It's such a rare case that
! 	      it hardly seems worth the effort though.  */
! 	   && (!saves_below_hard_fp_p || const_outgoing_args_size == 0)
  	   && !(cfun->calls_alloca
! 		&& frame.hard_fp_offset.is_constant (&const_fp_offset)
! 		&& const_fp_offset < max_push_offset))
      {
!       /* Frame with small outgoing arguments:
  
  	 sub sp, sp, frame_size
! 	 stp reg1, reg2, [sp, outgoing_args_size]
! 	 stp reg3, reg4, [sp, outgoing_args_size + 16]  */
        frame.initial_adjust = frame.frame_size;
-       frame.callee_offset = const_outgoing_args_size;
      }
    else if (saves_below_hard_fp_p
! 	   && known_eq (frame.saved_regs_size,
! 			frame.below_hard_fp_saved_regs_size))
      {
        /* Frame in which all saves are SVE saves:
  
! 	 sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size
  	 save SVE registers relative to SP
! 	 sub sp, sp, outgoing_args_size  */
!       frame.initial_adjust = (frame.hard_fp_offset
! 			      + frame.below_hard_fp_saved_regs_size);
!       frame.final_adjust = crtl->outgoing_args_size;
      }
!   else if (frame.hard_fp_offset.is_constant (&const_fp_offset)
! 	   && const_fp_offset < max_push_offset)
      {
!       /* Frame with large outgoing arguments or SVE saves, but with
! 	 a small local area:
  
  	 stp reg1, reg2, [sp, -hard_fp_offset]!
  	 stp reg3, reg4, [sp, 16]
  	 [sub sp, sp, below_hard_fp_saved_regs_size]
  	 [save SVE registers relative to SP]
! 	 sub sp, sp, outgoing_args_size  */
!       frame.callee_adjust = const_fp_offset;
!       frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size;
!       frame.final_adjust = crtl->outgoing_args_size;
      }
    else
      {
!       /* Frame with large local area and outgoing arguments or SVE saves,
! 	 using frame pointer:
  
  	 sub sp, sp, hard_fp_offset
  	 stp x29, x30, [sp, 0]
--- 8422,8497 ----
       max_push_offset to 0, because no registers are popped at this time,
       so callee_adjust cannot be adjusted.  */
    HOST_WIDE_INT max_push_offset = 0;
!   if (frame.wb_pop_candidate1 != INVALID_REGNUM)
!     {
!       if (frame.wb_pop_candidate2 != INVALID_REGNUM)
! 	max_push_offset = 512;
!       else
! 	max_push_offset = 256;
!     }
  
!   HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp;
    HOST_WIDE_INT const_saved_regs_size;
!   if (known_eq (saved_regs_size, 0))
!     frame.initial_adjust = frame.frame_size;
!   else if (frame.frame_size.is_constant (&const_size)
! 	   && const_size < max_push_offset
! 	   && known_eq (frame.bytes_above_hard_fp, const_size))
      {
!       /* Simple, small frame with no data below the saved registers.
  
  	 stp reg1, reg2, [sp, -frame_size]!
  	 stp reg3, reg4, [sp, 16]  */
        frame.callee_adjust = const_size;
      }
!   else if (frame.bytes_below_saved_regs.is_constant (&const_below_saved_regs)
! 	   && saved_regs_size.is_constant (&const_saved_regs_size)
! 	   && const_below_saved_regs + const_saved_regs_size < 512
! 	   /* We could handle this case even with data below the saved
! 	      registers, provided that that data left us with valid offsets
! 	      for all predicate and vector save slots.  It's such a rare
! 	      case that it hardly seems worth the effort though.  */
! 	   && (!saves_below_hard_fp_p || const_below_saved_regs == 0)
  	   && !(cfun->calls_alloca
! 		&& frame.bytes_above_hard_fp.is_constant (&const_above_fp)
! 		&& const_above_fp < max_push_offset))
      {
!       /* Frame with small area below the saved registers:
  
  	 sub sp, sp, frame_size
! 	 stp reg1, reg2, [sp, bytes_below_saved_regs]
! 	 stp reg3, reg4, [sp, bytes_below_saved_regs + 16]  */
        frame.initial_adjust = frame.frame_size;
      }
    else if (saves_below_hard_fp_p
! 	   && known_eq (saved_regs_size, below_hard_fp_saved_regs_size))
      {
        /* Frame in which all saves are SVE saves:
  
! 	 sub sp, sp, frame_size - bytes_below_saved_regs
  	 save SVE registers relative to SP
! 	 sub sp, sp, bytes_below_saved_regs  */
!       frame.initial_adjust = frame.frame_size - frame.bytes_below_saved_regs;
!       frame.final_adjust = frame.bytes_below_saved_regs;
      }
!   else if (frame.bytes_above_hard_fp.is_constant (&const_above_fp)
! 	   && const_above_fp < max_push_offset)
      {
!       /* Frame with large area below the saved registers, or with SVE saves,
! 	 but with a small area above:
  
  	 stp reg1, reg2, [sp, -hard_fp_offset]!
  	 stp reg3, reg4, [sp, 16]
  	 [sub sp, sp, below_hard_fp_saved_regs_size]
  	 [save SVE registers relative to SP]
! 	 sub sp, sp, bytes_below_saved_regs  */
!       frame.callee_adjust = const_above_fp;
!       frame.sve_callee_adjust = below_hard_fp_saved_regs_size;
!       frame.final_adjust = frame.bytes_below_saved_regs;
      }
    else
      {
!       /* General case:
  
  	 sub sp, sp, hard_fp_offset
  	 stp x29, x30, [sp, 0]
*************** aarch64_layout_frame (void)
*** 8447,8456 ****
  	 stp reg3, reg4, [sp, 16]
  	 [sub sp, sp, below_hard_fp_saved_regs_size]
  	 [save SVE registers relative to SP]
! 	 sub sp, sp, outgoing_args_size  */
!       frame.initial_adjust = frame.hard_fp_offset;
!       frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size;
!       frame.final_adjust = crtl->outgoing_args_size;
      }
  
    /* Make sure the individual adjustments add up to the full frame size.  */
--- 8499,8527 ----
  	 stp reg3, reg4, [sp, 16]
  	 [sub sp, sp, below_hard_fp_saved_regs_size]
  	 [save SVE registers relative to SP]
! 	 sub sp, sp, bytes_below_saved_regs  */
!       frame.initial_adjust = frame.bytes_above_hard_fp;
!       frame.sve_callee_adjust = below_hard_fp_saved_regs_size;
!       frame.final_adjust = frame.bytes_below_saved_regs;
!     }
! 
!   /* The frame is allocated in pieces, with each non-final piece
!      including a register save at offset 0 that acts as a probe for
!      the following piece.  In addition, the save of the bottommost register
!      acts as a probe for callees and allocas.  Roll back any probes that
!      aren't needed.
! 
!      A probe isn't needed if it is associated with the final allocation
!      (including callees and allocas) that happens before the epilogue is
!      executed.  */
!   if (crtl->is_leaf
!       && !cfun->calls_alloca
!       && known_eq (frame.final_adjust, 0))
!     {
!       if (maybe_ne (frame.sve_callee_adjust, 0))
! 	frame.sve_save_and_probe = INVALID_REGNUM;
!       else
! 	frame.hard_fp_save_and_probe = INVALID_REGNUM;
      }
  
    /* Make sure the individual adjustments add up to the full frame size.  */
*************** aarch64_gen_storewb_pair (machine_mode m
*** 8531,8536 ****
--- 8602,8611 ----
        return gen_storewb_pairtf_di (base, base, reg, reg2,
  				    GEN_INT (-adjustment),
  				    GEN_INT (UNITS_PER_VREG - adjustment));
+     case E_V16QImode:
+       return gen_storewb_pairv16qi_di (base, base, reg, reg2,
+ 				       GEN_INT (-adjustment),
+ 				       GEN_INT (UNITS_PER_VREG - adjustment));
      default:
        gcc_unreachable ();
      }
*************** aarch64_gen_loadwb_pair (machine_mode mo
*** 8576,8581 ****
--- 8651,8660 ----
      case E_TFmode:
        return gen_loadwb_pairtf_di (base, base, reg, reg2, GEN_INT (adjustment),
  				   GEN_INT (UNITS_PER_VREG));
+     case E_V16QImode:
+       return gen_loadwb_pairv16qi_di (base, base, reg, reg2,
+ 				      GEN_INT (adjustment),
+ 				      GEN_INT (UNITS_PER_VREG));
      default:
        gcc_unreachable ();
      }
*************** aarch64_gen_load_pair (machine_mode mode
*** 8659,8664 ****
--- 8738,8746 ----
      case E_V4SImode:
        return gen_load_pairv4siv4si (reg1, mem1, reg2, mem2);
  
+     case E_V16QImode:
+       return gen_load_pairv16qiv16qi (reg1, mem1, reg2, mem2);
+ 
      default:
        gcc_unreachable ();
      }
*************** aarch64_add_cfa_expression (rtx_insn *in
*** 8754,8768 ****
  }
  
  /* Emit code to save the callee-saved registers from register number START
!    to LIMIT to the stack at the location starting at offset START_OFFSET,
!    skipping any write-back candidates if SKIP_WB is true.  HARD_FP_VALID_P
!    is true if the hard frame pointer has been set up.  */
  
  static void
! aarch64_save_callee_saves (poly_int64 start_offset,
  			   unsigned start, unsigned limit, bool skip_wb,
  			   bool hard_fp_valid_p)
  {
    rtx_insn *insn;
    unsigned regno;
    unsigned regno2;
--- 8836,8852 ----
  }
  
  /* Emit code to save the callee-saved registers from register number START
!    to LIMIT to the stack.  The stack pointer is currently BYTES_BELOW_SP
!    bytes above the bottom of the static frame.  Skip any write-back
!    candidates if SKIP_WB is true.  HARD_FP_VALID_P is true if the hard
!    frame pointer has been set up.  */
  
  static void
! aarch64_save_callee_saves (poly_int64 bytes_below_sp,
  			   unsigned start, unsigned limit, bool skip_wb,
  			   bool hard_fp_valid_p)
  {
+   aarch64_frame &frame = cfun->machine->frame;
    rtx_insn *insn;
    unsigned regno;
    unsigned regno2;
*************** aarch64_save_callee_saves (poly_int64 st
*** 8777,8784 ****
        bool frame_related_p = aarch64_emit_cfi_for_reg_p (regno);
  
        if (skip_wb
! 	  && (regno == cfun->machine->frame.wb_push_candidate1
! 	      || regno == cfun->machine->frame.wb_push_candidate2))
  	continue;
  
        if (cfun->machine->reg_is_wrapped_separately[regno])
--- 8861,8868 ----
        bool frame_related_p = aarch64_emit_cfi_for_reg_p (regno);
  
        if (skip_wb
! 	  && (regno == frame.wb_push_candidate1
! 	      || regno == frame.wb_push_candidate2))
  	continue;
  
        if (cfun->machine->reg_is_wrapped_separately[regno])
*************** aarch64_save_callee_saves (poly_int64 st
*** 8786,8792 ****
  
        machine_mode mode = aarch64_reg_save_mode (regno);
        reg = gen_rtx_REG (mode, regno);
!       offset = start_offset + cfun->machine->frame.reg_offset[regno];
        rtx base_rtx = stack_pointer_rtx;
        poly_int64 sp_offset = offset;
  
--- 8870,8876 ----
  
        machine_mode mode = aarch64_reg_save_mode (regno);
        reg = gen_rtx_REG (mode, regno);
!       offset = frame.reg_offset[regno] - bytes_below_sp;
        rtx base_rtx = stack_pointer_rtx;
        poly_int64 sp_offset = offset;
  
*************** aarch64_save_callee_saves (poly_int64 st
*** 8797,8805 ****
        else if (GP_REGNUM_P (regno)
  	       && (!offset.is_constant (&const_offset) || const_offset >= 512))
  	{
! 	  gcc_assert (known_eq (start_offset, 0));
! 	  poly_int64 fp_offset
! 	    = cfun->machine->frame.below_hard_fp_saved_regs_size;
  	  if (hard_fp_valid_p)
  	    base_rtx = hard_frame_pointer_rtx;
  	  else
--- 8881,8887 ----
        else if (GP_REGNUM_P (regno)
  	       && (!offset.is_constant (&const_offset) || const_offset >= 512))
  	{
! 	  poly_int64 fp_offset = frame.bytes_below_hard_fp - bytes_below_sp;
  	  if (hard_fp_valid_p)
  	    base_rtx = hard_frame_pointer_rtx;
  	  else
*************** aarch64_save_callee_saves (poly_int64 st
*** 8821,8828 ****
  	  && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit
  	  && !cfun->machine->reg_is_wrapped_separately[regno2]
  	  && known_eq (GET_MODE_SIZE (mode),
! 		       cfun->machine->frame.reg_offset[regno2]
! 		       - cfun->machine->frame.reg_offset[regno]))
  	{
  	  rtx reg2 = gen_rtx_REG (mode, regno2);
  	  rtx mem2;
--- 8903,8909 ----
  	  && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit
  	  && !cfun->machine->reg_is_wrapped_separately[regno2]
  	  && known_eq (GET_MODE_SIZE (mode),
! 		       frame.reg_offset[regno2] - frame.reg_offset[regno]))
  	{
  	  rtx reg2 = gen_rtx_REG (mode, regno2);
  	  rtx mem2;
*************** aarch64_save_callee_saves (poly_int64 st
*** 8864,8877 ****
  }
  
  /* Emit code to restore the callee registers from register number START
!    up to and including LIMIT.  Restore from the stack offset START_OFFSET,
!    skipping any write-back candidates if SKIP_WB is true.  Write the
!    appropriate REG_CFA_RESTORE notes into CFI_OPS.  */
  
  static void
! aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start,
  			      unsigned limit, bool skip_wb, rtx *cfi_ops)
  {
    unsigned regno;
    unsigned regno2;
    poly_int64 offset;
--- 8945,8960 ----
  }
  
  /* Emit code to restore the callee registers from register number START
!    up to and including LIMIT.  The stack pointer is currently BYTES_BELOW_SP
!    bytes above the bottom of the static frame.  Skip any write-back
!    candidates if SKIP_WB is true.  Write the appropriate REG_CFA_RESTORE
!    notes into CFI_OPS.  */
  
  static void
! aarch64_restore_callee_saves (poly_int64 bytes_below_sp, unsigned start,
  			      unsigned limit, bool skip_wb, rtx *cfi_ops)
  {
+   aarch64_frame &frame = cfun->machine->frame;
    unsigned regno;
    unsigned regno2;
    poly_int64 offset;
*************** aarch64_restore_callee_saves (poly_int64
*** 8888,8900 ****
        rtx reg, mem;
  
        if (skip_wb
! 	  && (regno == cfun->machine->frame.wb_pop_candidate1
! 	      || regno == cfun->machine->frame.wb_pop_candidate2))
  	continue;
  
        machine_mode mode = aarch64_reg_save_mode (regno);
        reg = gen_rtx_REG (mode, regno);
!       offset = start_offset + cfun->machine->frame.reg_offset[regno];
        rtx base_rtx = stack_pointer_rtx;
        if (mode == VNx2DImode && BYTES_BIG_ENDIAN)
  	aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg,
--- 8971,8983 ----
        rtx reg, mem;
  
        if (skip_wb
! 	  && (regno == frame.wb_pop_candidate1
! 	      || regno == frame.wb_pop_candidate2))
  	continue;
  
        machine_mode mode = aarch64_reg_save_mode (regno);
        reg = gen_rtx_REG (mode, regno);
!       offset = frame.reg_offset[regno] - bytes_below_sp;
        rtx base_rtx = stack_pointer_rtx;
        if (mode == VNx2DImode && BYTES_BIG_ENDIAN)
  	aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg,
*************** aarch64_restore_callee_saves (poly_int64
*** 8905,8912 ****
  	  && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit
  	  && !cfun->machine->reg_is_wrapped_separately[regno2]
  	  && known_eq (GET_MODE_SIZE (mode),
! 		       cfun->machine->frame.reg_offset[regno2]
! 		       - cfun->machine->frame.reg_offset[regno]))
  	{
  	  rtx reg2 = gen_rtx_REG (mode, regno2);
  	  rtx mem2;
--- 8988,8994 ----
  	  && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit
  	  && !cfun->machine->reg_is_wrapped_separately[regno2]
  	  && known_eq (GET_MODE_SIZE (mode),
! 		       frame.reg_offset[regno2] - frame.reg_offset[regno]))
  	{
  	  rtx reg2 = gen_rtx_REG (mode, regno2);
  	  rtx mem2;
*************** offset_12bit_unsigned_scaled_p (machine_
*** 9011,9016 ****
--- 9093,9099 ----
  static sbitmap
  aarch64_get_separate_components (void)
  {
+   aarch64_frame &frame = cfun->machine->frame;
    sbitmap components = sbitmap_alloc (LAST_SAVED_REGNUM + 1);
    bitmap_clear (components);
  
*************** aarch64_get_separate_components (void)
*** 9027,9046 ****
  	if (mode == VNx2DImode && BYTES_BIG_ENDIAN)
  	  continue;
  
! 	poly_int64 offset = cfun->machine->frame.reg_offset[regno];
! 
! 	/* If the register is saved in the first SVE save slot, we use
! 	   it as a stack probe for -fstack-clash-protection.  */
! 	if (flag_stack_clash_protection
! 	    && maybe_ne (cfun->machine->frame.below_hard_fp_saved_regs_size, 0)
! 	    && known_eq (offset, 0))
! 	  continue;
  
  	/* Get the offset relative to the register we'll use.  */
  	if (frame_pointer_needed)
! 	  offset -= cfun->machine->frame.below_hard_fp_saved_regs_size;
! 	else
! 	  offset += crtl->outgoing_args_size;
  
  	/* Check that we can access the stack slot of the register with one
  	   direct load with no adjustments needed.  */
--- 9110,9120 ----
  	if (mode == VNx2DImode && BYTES_BIG_ENDIAN)
  	  continue;
  
! 	poly_int64 offset = frame.reg_offset[regno];
  
  	/* Get the offset relative to the register we'll use.  */
  	if (frame_pointer_needed)
! 	  offset -= frame.bytes_below_hard_fp;
  
  	/* Check that we can access the stack slot of the register with one
  	   direct load with no adjustments needed.  */
*************** aarch64_get_separate_components (void)
*** 9057,9067 ****
    /* If the spare predicate register used by big-endian SVE code
       is call-preserved, it must be saved in the main prologue
       before any saves that use it.  */
!   if (cfun->machine->frame.spare_pred_reg != INVALID_REGNUM)
!     bitmap_clear_bit (components, cfun->machine->frame.spare_pred_reg);
  
!   unsigned reg1 = cfun->machine->frame.wb_push_candidate1;
!   unsigned reg2 = cfun->machine->frame.wb_push_candidate2;
    /* If registers have been chosen to be stored/restored with
       writeback don't interfere with them to avoid having to output explicit
       stack adjustment instructions.  */
--- 9131,9141 ----
    /* If the spare predicate register used by big-endian SVE code
       is call-preserved, it must be saved in the main prologue
       before any saves that use it.  */
!   if (frame.spare_pred_reg != INVALID_REGNUM)
!     bitmap_clear_bit (components, frame.spare_pred_reg);
  
!   unsigned reg1 = frame.wb_push_candidate1;
!   unsigned reg2 = frame.wb_push_candidate2;
    /* If registers have been chosen to be stored/restored with
       writeback don't interfere with them to avoid having to output explicit
       stack adjustment instructions.  */
*************** aarch64_get_separate_components (void)
*** 9072,9077 ****
--- 9146,9158 ----
  
    bitmap_clear_bit (components, LR_REGNUM);
    bitmap_clear_bit (components, SP_REGNUM);
+   if (flag_stack_clash_protection)
+     {
+       if (frame.sve_save_and_probe != INVALID_REGNUM)
+ 	bitmap_clear_bit (components, frame.sve_save_and_probe);
+       if (frame.hard_fp_save_and_probe != INVALID_REGNUM)
+ 	bitmap_clear_bit (components, frame.hard_fp_save_and_probe);
+     }
  
    return components;
  }
*************** aarch64_get_next_set_bit (sbitmap bmp, u
*** 9170,9175 ****
--- 9251,9257 ----
  static void
  aarch64_process_components (sbitmap components, bool prologue_p)
  {
+   aarch64_frame &frame = cfun->machine->frame;
    rtx ptr_reg = gen_rtx_REG (Pmode, frame_pointer_needed
  			     ? HARD_FRAME_POINTER_REGNUM
  			     : STACK_POINTER_REGNUM);
*************** aarch64_process_components (sbitmap comp
*** 9184,9194 ****
        machine_mode mode = aarch64_reg_save_mode (regno);
        
        rtx reg = gen_rtx_REG (mode, regno);
!       poly_int64 offset = cfun->machine->frame.reg_offset[regno];
        if (frame_pointer_needed)
! 	offset -= cfun->machine->frame.below_hard_fp_saved_regs_size;
!       else
! 	offset += crtl->outgoing_args_size;
  
        rtx addr = plus_constant (Pmode, ptr_reg, offset);
        rtx mem = gen_frame_mem (mode, addr);
--- 9266,9274 ----
        machine_mode mode = aarch64_reg_save_mode (regno);
        
        rtx reg = gen_rtx_REG (mode, regno);
!       poly_int64 offset = frame.reg_offset[regno];
        if (frame_pointer_needed)
! 	offset -= frame.bytes_below_hard_fp;
  
        rtx addr = plus_constant (Pmode, ptr_reg, offset);
        rtx mem = gen_frame_mem (mode, addr);
*************** aarch64_process_components (sbitmap comp
*** 9211,9224 ****
  	  break;
  	}
  
!       poly_int64 offset2 = cfun->machine->frame.reg_offset[regno2];
        /* The next register is not of the same class or its offset is not
  	 mergeable with the current one into a pair.  */
        if (aarch64_sve_mode_p (mode)
  	  || !satisfies_constraint_Ump (mem)
  	  || GP_REGNUM_P (regno) != GP_REGNUM_P (regno2)
  	  || (crtl->abi->id () == ARM_PCS_SIMD && FP_REGNUM_P (regno))
! 	  || maybe_ne ((offset2 - cfun->machine->frame.reg_offset[regno]),
  		       GET_MODE_SIZE (mode)))
  	{
  	  insn = emit_insn (set);
--- 9291,9304 ----
  	  break;
  	}
  
!       poly_int64 offset2 = frame.reg_offset[regno2];
        /* The next register is not of the same class or its offset is not
  	 mergeable with the current one into a pair.  */
        if (aarch64_sve_mode_p (mode)
  	  || !satisfies_constraint_Ump (mem)
  	  || GP_REGNUM_P (regno) != GP_REGNUM_P (regno2)
  	  || (crtl->abi->id () == ARM_PCS_SIMD && FP_REGNUM_P (regno))
! 	  || maybe_ne ((offset2 - frame.reg_offset[regno]),
  		       GET_MODE_SIZE (mode)))
  	{
  	  insn = emit_insn (set);
*************** aarch64_process_components (sbitmap comp
*** 9240,9248 ****
        /* REGNO2 can be saved/restored in a pair with REGNO.  */
        rtx reg2 = gen_rtx_REG (mode, regno2);
        if (frame_pointer_needed)
! 	offset2 -= cfun->machine->frame.below_hard_fp_saved_regs_size;
!       else
! 	offset2 += crtl->outgoing_args_size;
        rtx addr2 = plus_constant (Pmode, ptr_reg, offset2);
        rtx mem2 = gen_frame_mem (mode, addr2);
        rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2)
--- 9320,9326 ----
        /* REGNO2 can be saved/restored in a pair with REGNO.  */
        rtx reg2 = gen_rtx_REG (mode, regno2);
        if (frame_pointer_needed)
! 	offset2 -= frame.bytes_below_hard_fp;
        rtx addr2 = plus_constant (Pmode, ptr_reg, offset2);
        rtx mem2 = gen_frame_mem (mode, addr2);
        rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2)
*************** aarch64_stack_clash_protection_alloca_pr
*** 9316,9325 ****
     registers.  If POLY_SIZE is not large enough to require a probe this function
     will only adjust the stack.  When allocating the stack space
     FRAME_RELATED_P is then used to indicate if the allocation is frame related.
!    FINAL_ADJUSTMENT_P indicates whether we are allocating the outgoing
!    arguments.  If we are then we ensure that any allocation larger than the ABI
!    defined buffer needs a probe so that the invariant of having a 1KB buffer is
!    maintained.
  
     We emit barriers after each stack adjustment to prevent optimizations from
     breaking the invariant that we never drop the stack more than a page.  This
--- 9394,9403 ----
     registers.  If POLY_SIZE is not large enough to require a probe this function
     will only adjust the stack.  When allocating the stack space
     FRAME_RELATED_P is then used to indicate if the allocation is frame related.
!    FINAL_ADJUSTMENT_P indicates whether we are allocating the area below
!    the saved registers.  If we are then we ensure that any allocation
!    larger than the ABI defined buffer needs a probe so that the
!    invariant of having a 1KB buffer is maintained.
  
     We emit barriers after each stack adjustment to prevent optimizations from
     breaking the invariant that we never drop the stack more than a page.  This
*************** aarch64_allocate_and_probe_stack_space (
*** 9335,9379 ****
  					bool frame_related_p,
  					bool final_adjustment_p)
  {
    HOST_WIDE_INT guard_size
      = 1 << param_stack_clash_protection_guard_size;
    HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD;
    HOST_WIDE_INT min_probe_threshold
      = (final_adjustment_p
!        ? guard_used_by_caller
         : guard_size - guard_used_by_caller);
!   /* When doing the final adjustment for the outgoing arguments, take into
!      account any unprobed space there is above the current SP.  There are
!      two cases:
! 
!      - When saving SVE registers below the hard frame pointer, we force
!        the lowest save to take place in the prologue before doing the final
!        adjustment (i.e. we don't allow the save to be shrink-wrapped).
!        This acts as a probe at SP, so there is no unprobed space.
! 
!      - When there are no SVE register saves, we use the store of the link
!        register as a probe.  We can't assume that LR was saved at position 0
!        though, so treat any space below it as unprobed.  */
!   if (final_adjustment_p
!       && known_eq (cfun->machine->frame.below_hard_fp_saved_regs_size, 0))
!     {
!       poly_int64 lr_offset = cfun->machine->frame.reg_offset[LR_REGNUM];
!       if (known_ge (lr_offset, 0))
! 	min_probe_threshold -= lr_offset.to_constant ();
!       else
! 	gcc_assert (!flag_stack_clash_protection || known_eq (poly_size, 0));
!     }
! 
!   poly_int64 frame_size = cfun->machine->frame.frame_size;
  
    /* We should always have a positive probe threshold.  */
    gcc_assert (min_probe_threshold > 0);
  
    if (flag_stack_clash_protection && !final_adjustment_p)
      {
!       poly_int64 initial_adjust = cfun->machine->frame.initial_adjust;
!       poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust;
!       poly_int64 final_adjust = cfun->machine->frame.final_adjust;
  
        if (known_eq (frame_size, 0))
  	{
--- 9413,9438 ----
  					bool frame_related_p,
  					bool final_adjustment_p)
  {
+   aarch64_frame &frame = cfun->machine->frame;
    HOST_WIDE_INT guard_size
      = 1 << param_stack_clash_protection_guard_size;
    HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD;
+   HOST_WIDE_INT byte_sp_alignment = STACK_BOUNDARY / BITS_PER_UNIT;
+   gcc_assert (multiple_p (poly_size, byte_sp_alignment));
    HOST_WIDE_INT min_probe_threshold
      = (final_adjustment_p
!        ? guard_used_by_caller + byte_sp_alignment
         : guard_size - guard_used_by_caller);
!   poly_int64 frame_size = frame.frame_size;
  
    /* We should always have a positive probe threshold.  */
    gcc_assert (min_probe_threshold > 0);
  
    if (flag_stack_clash_protection && !final_adjustment_p)
      {
!       poly_int64 initial_adjust = frame.initial_adjust;
!       poly_int64 sve_callee_adjust = frame.sve_callee_adjust;
!       poly_int64 final_adjust = frame.final_adjust;
  
        if (known_eq (frame_size, 0))
  	{
*************** aarch64_allocate_and_probe_stack_space (
*** 9527,9533 ****
    /* Handle any residuals.  Residuals of at least MIN_PROBE_THRESHOLD have to
       be probed.  This maintains the requirement that each page is probed at
       least once.  For initial probing we probe only if the allocation is
!      more than GUARD_SIZE - buffer, and for the outgoing arguments we probe
       if the amount is larger than buffer.  GUARD_SIZE - buffer + buffer ==
       GUARD_SIZE.  This works that for any allocation that is large enough to
       trigger a probe here, we'll have at least one, and if they're not large
--- 9586,9592 ----
    /* Handle any residuals.  Residuals of at least MIN_PROBE_THRESHOLD have to
       be probed.  This maintains the requirement that each page is probed at
       least once.  For initial probing we probe only if the allocation is
!      more than GUARD_SIZE - buffer, and below the saved registers we probe
       if the amount is larger than buffer.  GUARD_SIZE - buffer + buffer ==
       GUARD_SIZE.  This works that for any allocation that is large enough to
       trigger a probe here, we'll have at least one, and if they're not large
*************** aarch64_allocate_and_probe_stack_space (
*** 9537,9552 ****
       are still safe.  */
    if (residual)
      {
!       HOST_WIDE_INT residual_probe_offset = guard_used_by_caller;
        /* If we're doing final adjustments, and we've done any full page
  	 allocations then any residual needs to be probed.  */
        if (final_adjustment_p && rounded_size != 0)
  	min_probe_threshold = 0;
-       /* If doing a small final adjustment, we always probe at offset 0.
- 	 This is done to avoid issues when LR is not at position 0 or when
- 	 the final adjustment is smaller than the probing offset.  */
-       else if (final_adjustment_p && rounded_size == 0)
- 	residual_probe_offset = 0;
  
        aarch64_sub_sp (temp1, temp2, residual, frame_related_p);
        if (residual >= min_probe_threshold)
--- 9596,9607 ----
       are still safe.  */
    if (residual)
      {
!       gcc_assert (guard_used_by_caller + byte_sp_alignment <= size);
! 
        /* If we're doing final adjustments, and we've done any full page
  	 allocations then any residual needs to be probed.  */
        if (final_adjustment_p && rounded_size != 0)
  	min_probe_threshold = 0;
  
        aarch64_sub_sp (temp1, temp2, residual, frame_related_p);
        if (residual >= min_probe_threshold)
*************** aarch64_allocate_and_probe_stack_space (
*** 9557,9564 ****
  		     HOST_WIDE_INT_PRINT_DEC " bytes, probing will be required."
  		     "\n", residual);
  
! 	    emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx,
! 					     residual_probe_offset));
  	  emit_insn (gen_blockage ());
  	}
      }
--- 9612,9619 ----
  		     HOST_WIDE_INT_PRINT_DEC " bytes, probing will be required."
  		     "\n", residual);
  
! 	  emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx,
! 					   guard_used_by_caller));
  	  emit_insn (gen_blockage ());
  	}
      }
*************** aarch64_epilogue_uses (int regno)
*** 9596,9615 ****
  	|  for register varargs         |
  	|                               |
  	+-------------------------------+
! 	|  local variables              | <-- frame_pointer_rtx
  	|                               |
  	+-------------------------------+
! 	|  padding                      | \
! 	+-------------------------------+  |
! 	|  callee-saved registers       |  | frame.saved_regs_size
! 	+-------------------------------+  |
! 	|  LR'                          |  |
! 	+-------------------------------+  |
! 	|  FP'                          |  |
! 	+-------------------------------+  |<- hard_frame_pointer_rtx (aligned)
! 	|  SVE vector registers         |  | \
! 	+-------------------------------+  |  | below_hard_fp_saved_regs_size
! 	|  SVE predicate registers      | /  /
  	+-------------------------------+
  	|  dynamic allocation           |
  	+-------------------------------+
--- 9651,9674 ----
  	|  for register varargs         |
  	|                               |
  	+-------------------------------+
! 	|  local variables (1)          | <-- frame_pointer_rtx
  	|                               |
  	+-------------------------------+
! 	|  padding (1)                  |
! 	+-------------------------------+
! 	|  callee-saved registers       |
! 	+-------------------------------+
! 	|  LR'                          |
! 	+-------------------------------+
! 	|  FP'                          |
! 	+-------------------------------+ <-- hard_frame_pointer_rtx (aligned)
! 	|  SVE vector registers         |
! 	+-------------------------------+
! 	|  SVE predicate registers      |
! 	+-------------------------------+
! 	|  local variables (2)          |
! 	+-------------------------------+
! 	|  padding (2)                  |
  	+-------------------------------+
  	|  dynamic allocation           |
  	+-------------------------------+
*************** aarch64_epilogue_uses (int regno)
*** 9620,9625 ****
--- 9679,9687 ----
  	+-------------------------------+
  	|                               | <-- stack_pointer_rtx (aligned)
  
+    The regions marked (1) and (2) are mutually exclusive.  (2) is used
+    when aarch64_save_regs_above_locals_p is true.
+ 
     Dynamic stack allocations via alloca() decrease stack_pointer_rtx
     but leave frame_pointer_rtx and hard_frame_pointer_rtx
     unchanged.
*************** aarch64_epilogue_uses (int regno)
*** 9634,9641 ****
     When probing is needed, we emit a probe at the start of the prologue
     and every PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE bytes thereafter.
  
!    We have to track how much space has been allocated and the only stores
!    to the stack we track as implicit probes are the FP/LR stores.
  
     For outgoing arguments we probe if the size is larger than 1KB, such that
     the ABI specified buffer is maintained for the next callee.
--- 9696,9703 ----
     When probing is needed, we emit a probe at the start of the prologue
     and every PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE bytes thereafter.
  
!    We can also use register saves as probes.  These are stored in
!    sve_save_and_probe and hard_fp_save_and_probe.
  
     For outgoing arguments we probe if the size is larger than 1KB, such that
     the ABI specified buffer is maintained for the next callee.
*************** aarch64_epilogue_uses (int regno)
*** 9662,9678 ****
  void
  aarch64_expand_prologue (void)
  {
!   poly_int64 frame_size = cfun->machine->frame.frame_size;
!   poly_int64 initial_adjust = cfun->machine->frame.initial_adjust;
!   HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust;
!   poly_int64 final_adjust = cfun->machine->frame.final_adjust;
!   poly_int64 callee_offset = cfun->machine->frame.callee_offset;
!   poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust;
!   poly_int64 below_hard_fp_saved_regs_size
!     = cfun->machine->frame.below_hard_fp_saved_regs_size;
!   unsigned reg1 = cfun->machine->frame.wb_push_candidate1;
!   unsigned reg2 = cfun->machine->frame.wb_push_candidate2;
!   bool emit_frame_chain = cfun->machine->frame.emit_frame_chain;
    rtx_insn *insn;
  
    if (flag_stack_clash_protection && known_eq (callee_adjust, 0))
--- 9724,9738 ----
  void
  aarch64_expand_prologue (void)
  {
!   aarch64_frame &frame = cfun->machine->frame;
!   poly_int64 frame_size = frame.frame_size;
!   poly_int64 initial_adjust = frame.initial_adjust;
!   HOST_WIDE_INT callee_adjust = frame.callee_adjust;
!   poly_int64 final_adjust = frame.final_adjust;
!   poly_int64 sve_callee_adjust = frame.sve_callee_adjust;
!   unsigned reg1 = frame.wb_push_candidate1;
!   unsigned reg2 = frame.wb_push_candidate2;
!   bool emit_frame_chain = frame.emit_frame_chain;
    rtx_insn *insn;
  
    if (flag_stack_clash_protection && known_eq (callee_adjust, 0))
*************** aarch64_expand_prologue (void)
*** 9703,9709 ****
      }
  
    /* Push return address to shadow call stack.  */
!   if (cfun->machine->frame.is_scs_enabled)
      emit_insn (gen_scs_push ());
  
    if (flag_stack_usage_info)
--- 9763,9769 ----
      }
  
    /* Push return address to shadow call stack.  */
!   if (frame.is_scs_enabled)
      emit_insn (gen_scs_push ());
  
    if (flag_stack_usage_info)
*************** aarch64_expand_prologue (void)
*** 9740,9760 ****
    if (callee_adjust != 0)
      aarch64_push_regs (reg1, reg2, callee_adjust);
  
!   /* The offset of the frame chain record (if any) from the current SP.  */
!   poly_int64 chain_offset = (initial_adjust + callee_adjust
! 			     - cfun->machine->frame.hard_fp_offset);
!   gcc_assert (known_ge (chain_offset, 0));
! 
!   /* The offset of the bottom of the save area from the current SP.  */
!   poly_int64 saved_regs_offset = chain_offset - below_hard_fp_saved_regs_size;
  
    if (emit_frame_chain)
      {
        if (callee_adjust == 0)
  	{
  	  reg1 = R29_REGNUM;
  	  reg2 = R30_REGNUM;
! 	  aarch64_save_callee_saves (saved_regs_offset, reg1, reg2,
  				     false, false);
  	}
        else
--- 9800,9820 ----
    if (callee_adjust != 0)
      aarch64_push_regs (reg1, reg2, callee_adjust);
  
!   /* The offset of the current SP from the bottom of the static frame.  */
!   poly_int64 bytes_below_sp = frame_size - initial_adjust - callee_adjust;
  
    if (emit_frame_chain)
      {
+       /* The offset of the frame chain record (if any) from the current SP.  */
+       poly_int64 chain_offset = (initial_adjust + callee_adjust
+ 				 - frame.bytes_above_hard_fp);
+       gcc_assert (known_ge (chain_offset, 0));
+ 
        if (callee_adjust == 0)
  	{
  	  reg1 = R29_REGNUM;
  	  reg2 = R30_REGNUM;
! 	  aarch64_save_callee_saves (bytes_below_sp, reg1, reg2,
  				     false, false);
  	}
        else
*************** aarch64_expand_prologue (void)
*** 9779,9786 ****
  	     implicit.  */
  	  if (!find_reg_note (insn, REG_CFA_ADJUST_CFA, NULL_RTX))
  	    {
! 	      rtx src = plus_constant (Pmode, stack_pointer_rtx,
! 				       callee_offset);
  	      add_reg_note (insn, REG_CFA_ADJUST_CFA,
  			    gen_rtx_SET (hard_frame_pointer_rtx, src));
  	    }
--- 9839,9845 ----
  	     implicit.  */
  	  if (!find_reg_note (insn, REG_CFA_ADJUST_CFA, NULL_RTX))
  	    {
! 	      rtx src = plus_constant (Pmode, stack_pointer_rtx, chain_offset);
  	      add_reg_note (insn, REG_CFA_ADJUST_CFA,
  			    gen_rtx_SET (hard_frame_pointer_rtx, src));
  	    }
*************** aarch64_expand_prologue (void)
*** 9795,9801 ****
        emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx));
      }
  
!   aarch64_save_callee_saves (saved_regs_offset, R0_REGNUM, R30_REGNUM,
  			     callee_adjust != 0 || emit_frame_chain,
  			     emit_frame_chain);
    if (maybe_ne (sve_callee_adjust, 0))
--- 9854,9860 ----
        emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx));
      }
  
!   aarch64_save_callee_saves (bytes_below_sp, R0_REGNUM, R30_REGNUM,
  			     callee_adjust != 0 || emit_frame_chain,
  			     emit_frame_chain);
    if (maybe_ne (sve_callee_adjust, 0))
*************** aarch64_expand_prologue (void)
*** 9805,9822 ****
        aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx,
  					      sve_callee_adjust,
  					      !frame_pointer_needed, false);
!       saved_regs_offset += sve_callee_adjust;
      }
!   aarch64_save_callee_saves (saved_regs_offset, P0_REGNUM, P15_REGNUM,
  			     false, emit_frame_chain);
!   aarch64_save_callee_saves (saved_regs_offset, V0_REGNUM, V31_REGNUM,
  			     callee_adjust != 0 || emit_frame_chain,
  			     emit_frame_chain);
  
    /* We may need to probe the final adjustment if it is larger than the guard
       that is assumed by the called.  */
    aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, final_adjust,
  					  !frame_pointer_needed, true);
  }
  
  /* Return TRUE if we can use a simple_return insn.
--- 9864,9884 ----
        aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx,
  					      sve_callee_adjust,
  					      !frame_pointer_needed, false);
!       bytes_below_sp -= sve_callee_adjust;
      }
!   aarch64_save_callee_saves (bytes_below_sp, P0_REGNUM, P15_REGNUM,
  			     false, emit_frame_chain);
!   aarch64_save_callee_saves (bytes_below_sp, V0_REGNUM, V31_REGNUM,
  			     callee_adjust != 0 || emit_frame_chain,
  			     emit_frame_chain);
  
    /* We may need to probe the final adjustment if it is larger than the guard
       that is assumed by the called.  */
+   gcc_assert (known_eq (bytes_below_sp, final_adjust));
    aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, final_adjust,
  					  !frame_pointer_needed, true);
+   if (emit_frame_chain && maybe_ne (final_adjust, 0))
+     emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx));
  }
  
  /* Return TRUE if we can use a simple_return insn.
*************** aarch64_use_return_insn_p (void)
*** 9845,9860 ****
  void
  aarch64_expand_epilogue (bool for_sibcall)
  {
!   poly_int64 initial_adjust = cfun->machine->frame.initial_adjust;
!   HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust;
!   poly_int64 final_adjust = cfun->machine->frame.final_adjust;
!   poly_int64 callee_offset = cfun->machine->frame.callee_offset;
!   poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust;
!   poly_int64 below_hard_fp_saved_regs_size
!     = cfun->machine->frame.below_hard_fp_saved_regs_size;
!   unsigned reg1 = cfun->machine->frame.wb_pop_candidate1;
!   unsigned reg2 = cfun->machine->frame.wb_pop_candidate2;
!   unsigned int last_gpr = (cfun->machine->frame.is_scs_enabled
  			   ? R29_REGNUM : R30_REGNUM);
    rtx cfi_ops = NULL;
    rtx_insn *insn;
--- 9907,9921 ----
  void
  aarch64_expand_epilogue (bool for_sibcall)
  {
!   aarch64_frame &frame = cfun->machine->frame;
!   poly_int64 initial_adjust = frame.initial_adjust;
!   HOST_WIDE_INT callee_adjust = frame.callee_adjust;
!   poly_int64 final_adjust = frame.final_adjust;
!   poly_int64 sve_callee_adjust = frame.sve_callee_adjust;
!   poly_int64 bytes_below_hard_fp = frame.bytes_below_hard_fp;
!   unsigned reg1 = frame.wb_pop_candidate1;
!   unsigned reg2 = frame.wb_pop_candidate2;
!   unsigned int last_gpr = (frame.is_scs_enabled
  			   ? R29_REGNUM : R30_REGNUM);
    rtx cfi_ops = NULL;
    rtx_insn *insn;
*************** aarch64_expand_epilogue (bool for_sibcal
*** 9888,9894 ****
    /* We need to add memory barrier to prevent read from deallocated stack.  */
    bool need_barrier_p
      = maybe_ne (get_frame_size ()
! 		+ cfun->machine->frame.saved_varargs_size, 0);
  
    /* Emit a barrier to prevent loads from a deallocated stack.  */
    if (maybe_gt (final_adjust, crtl->outgoing_args_size)
--- 9949,9955 ----
    /* We need to add memory barrier to prevent read from deallocated stack.  */
    bool need_barrier_p
      = maybe_ne (get_frame_size ()
! 		+ frame.saved_varargs_size, 0);
  
    /* Emit a barrier to prevent loads from a deallocated stack.  */
    if (maybe_gt (final_adjust, crtl->outgoing_args_size)
*************** aarch64_expand_epilogue (bool for_sibcal
*** 9909,9915 ****
         is restored on the instruction doing the writeback.  */
      aarch64_add_offset (Pmode, stack_pointer_rtx,
  			hard_frame_pointer_rtx,
! 			-callee_offset - below_hard_fp_saved_regs_size,
  			tmp1_rtx, tmp0_rtx, callee_adjust == 0);
    else
       /* The case where we need to re-use the register here is very rare, so
--- 9970,9976 ----
         is restored on the instruction doing the writeback.  */
      aarch64_add_offset (Pmode, stack_pointer_rtx,
  			hard_frame_pointer_rtx,
! 			-bytes_below_hard_fp + final_adjust,
  			tmp1_rtx, tmp0_rtx, callee_adjust == 0);
    else
       /* The case where we need to re-use the register here is very rare, so
*************** aarch64_expand_epilogue (bool for_sibcal
*** 9919,9927 ****
  
    /* Restore the vector registers before the predicate registers,
       so that we can use P4 as a temporary for big-endian SVE frames.  */
!   aarch64_restore_callee_saves (callee_offset, V0_REGNUM, V31_REGNUM,
  				callee_adjust != 0, &cfi_ops);
!   aarch64_restore_callee_saves (callee_offset, P0_REGNUM, P15_REGNUM,
  				false, &cfi_ops);
    if (maybe_ne (sve_callee_adjust, 0))
      aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true);
--- 9980,9988 ----
  
    /* Restore the vector registers before the predicate registers,
       so that we can use P4 as a temporary for big-endian SVE frames.  */
!   aarch64_restore_callee_saves (final_adjust, V0_REGNUM, V31_REGNUM,
  				callee_adjust != 0, &cfi_ops);
!   aarch64_restore_callee_saves (final_adjust, P0_REGNUM, P15_REGNUM,
  				false, &cfi_ops);
    if (maybe_ne (sve_callee_adjust, 0))
      aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true);
*************** aarch64_expand_epilogue (bool for_sibcal
*** 9929,9935 ****
    /* When shadow call stack is enabled, the scs_pop in the epilogue will
       restore x30, we don't need to restore x30 again in the traditional
       way.  */
!   aarch64_restore_callee_saves (callee_offset - sve_callee_adjust,
  				R0_REGNUM, last_gpr,
  				callee_adjust != 0, &cfi_ops);
  
--- 9990,9996 ----
    /* When shadow call stack is enabled, the scs_pop in the epilogue will
       restore x30, we don't need to restore x30 again in the traditional
       way.  */
!   aarch64_restore_callee_saves (final_adjust + sve_callee_adjust,
  				R0_REGNUM, last_gpr,
  				callee_adjust != 0, &cfi_ops);
  
*************** aarch64_expand_epilogue (bool for_sibcal
*** 9969,9975 ****
      }
  
    /* Pop return address from shadow call stack.  */
!   if (cfun->machine->frame.is_scs_enabled)
      {
        machine_mode mode = aarch64_reg_save_mode (R30_REGNUM);
        rtx reg = gen_rtx_REG (mode, R30_REGNUM);
--- 10030,10036 ----
      }
  
    /* Pop return address from shadow call stack.  */
!   if (frame.is_scs_enabled)
      {
        machine_mode mode = aarch64_reg_save_mode (R30_REGNUM);
        rtx reg = gen_rtx_REG (mode, R30_REGNUM);
*************** aarch64_can_eliminate (const int from AT
*** 12564,12587 ****
  poly_int64
  aarch64_initial_elimination_offset (unsigned from, unsigned to)
  {
    if (to == HARD_FRAME_POINTER_REGNUM)
      {
        if (from == ARG_POINTER_REGNUM)
! 	return cfun->machine->frame.hard_fp_offset;
  
        if (from == FRAME_POINTER_REGNUM)
! 	return cfun->machine->frame.hard_fp_offset
! 	       - cfun->machine->frame.locals_offset;
      }
  
    if (to == STACK_POINTER_REGNUM)
      {
        if (from == FRAME_POINTER_REGNUM)
! 	  return cfun->machine->frame.frame_size
! 		 - cfun->machine->frame.locals_offset;
      }
  
!   return cfun->machine->frame.frame_size;
  }
  
  
--- 12625,12648 ----
  poly_int64
  aarch64_initial_elimination_offset (unsigned from, unsigned to)
  {
+   aarch64_frame &frame = cfun->machine->frame;
+ 
    if (to == HARD_FRAME_POINTER_REGNUM)
      {
        if (from == ARG_POINTER_REGNUM)
! 	return frame.bytes_above_hard_fp;
  
        if (from == FRAME_POINTER_REGNUM)
! 	return frame.bytes_above_hard_fp - frame.bytes_above_locals;
      }
  
    if (to == STACK_POINTER_REGNUM)
      {
        if (from == FRAME_POINTER_REGNUM)
! 	return frame.frame_size - frame.bytes_above_locals;
      }
  
!   return frame.frame_size;
  }
  
  
*************** aarch64_expand_compare_and_swap (rtx ope
*** 22949,22954 ****
--- 23010,23017 ----
          rval = copy_to_mode_reg (r_mode, oldval);
        else
  	emit_move_insn (rval, gen_lowpart (r_mode, oldval));
+       if (mode == TImode)
+ 	newval = force_reg (mode, newval);
  
        emit_insn (gen_aarch64_compare_and_swap_lse (mode, rval, mem,
  						   newval, mod_s));
*************** aarch64_copy_one_block_and_progress_poin
*** 24686,24695 ****
    *dst = aarch64_progress_pointer (*dst);
  }
  
! /* Expand a cpymem using the MOPS extension.  OPERANDS are taken
!    from the cpymem pattern.  Return true iff we succeeded.  */
! static bool
! aarch64_expand_cpymem_mops (rtx *operands)
  {
    if (!TARGET_MOPS)
      return false;
--- 24749,24759 ----
    *dst = aarch64_progress_pointer (*dst);
  }
  
! /* Expand a cpymem/movmem using the MOPS extension.  OPERANDS are taken
!    from the cpymem/movmem pattern.  IS_MEMMOVE is true if this is a memmove
!    rather than memcpy.  Return true iff we succeeded.  */
! bool
! aarch64_expand_cpymem_mops (rtx *operands, bool is_memmove = false)
  {
    if (!TARGET_MOPS)
      return false;
*************** aarch64_expand_cpymem_mops (rtx *operand
*** 24701,24708 ****
    rtx dst_mem = replace_equiv_address (operands[0], dst_addr);
    rtx src_mem = replace_equiv_address (operands[1], src_addr);
    rtx sz_reg = copy_to_mode_reg (DImode, operands[2]);
!   emit_insn (gen_aarch64_cpymemdi (dst_mem, src_mem, sz_reg));
! 
    return true;
  }
  
--- 24765,24774 ----
    rtx dst_mem = replace_equiv_address (operands[0], dst_addr);
    rtx src_mem = replace_equiv_address (operands[1], src_addr);
    rtx sz_reg = copy_to_mode_reg (DImode, operands[2]);
!   if (is_memmove)
!     emit_insn (gen_aarch64_movmemdi (dst_mem, src_mem, sz_reg));
!   else
!     emit_insn (gen_aarch64_cpymemdi (dst_mem, src_mem, sz_reg));
    return true;
  }
  
*************** aarch64_operands_ok_for_ldpstp (rtx *ope
*** 25981,25991 ****
    gcc_assert (known_eq (GET_MODE_SIZE (GET_MODE (mem_1)),
  			GET_MODE_SIZE (GET_MODE (mem_2))));
  
!   /* One of the memory accesses must be a mempair operand.
!      If it is not the first one, they need to be swapped by the
!      peephole.  */
!   if (!aarch64_mem_pair_operand (mem_1, GET_MODE (mem_1))
!        && !aarch64_mem_pair_operand (mem_2, GET_MODE (mem_2)))
      return false;
  
    if (REG_P (reg_1) && FP_REGNUM_P (REGNO (reg_1)))
--- 26047,26055 ----
    gcc_assert (known_eq (GET_MODE_SIZE (GET_MODE (mem_1)),
  			GET_MODE_SIZE (GET_MODE (mem_2))));
  
!   /* The lower memory access must be a mem-pair operand.  */
!   rtx lower_mem = reversed ? mem_2 : mem_1;
!   if (!aarch64_mem_pair_operand (lower_mem, GET_MODE (lower_mem)))
      return false;
  
    if (REG_P (reg_1) && FP_REGNUM_P (REGNO (reg_1)))
*************** aarch64_simd_clone_compute_vecsize_and_s
*** 26836,26842 ****
  					tree base_type, int num)
  {
    tree t, ret_type;
!   unsigned int elt_bits, count;
    unsigned HOST_WIDE_INT const_simdlen;
    poly_uint64 vec_bits;
  
--- 26900,26906 ----
  					tree base_type, int num)
  {
    tree t, ret_type;
!   unsigned int elt_bits, count = 0;
    unsigned HOST_WIDE_INT const_simdlen;
    poly_uint64 vec_bits;
  
*************** aarch64_simd_clone_compute_vecsize_and_s
*** 26904,26911 ****
    elt_bits = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type));
    if (known_eq (clonei->simdlen, 0U))
      {
!       count = 2;
!       vec_bits = (num == 0 ? 64 : 128);
        clonei->simdlen = exact_div (vec_bits, elt_bits);
      }
    else
--- 26968,26984 ----
    elt_bits = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type));
    if (known_eq (clonei->simdlen, 0U))
      {
!       /* We don't support simdlen == 1.  */
!       if (known_eq (elt_bits, 64))
! 	{
! 	  count = 1;
! 	  vec_bits = 128;
! 	}
!       else
! 	{
! 	  count = 2;
! 	  vec_bits = (num == 0 ? 64 : 128);
! 	}
        clonei->simdlen = exact_div (vec_bits, elt_bits);
      }
    else
*************** aarch64_simd_clone_compute_vecsize_and_s
*** 26923,26928 ****
--- 26996,27002 ----
  	  return 0;
  	}
      }
+ 
    clonei->vecsize_int = vec_bits;
    clonei->vecsize_float = vec_bits;
    return count;
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/aarch64.h gcc-12.4.0/gcc/config/aarch64/aarch64.h
*** gcc-12.3.0/gcc/config/aarch64/aarch64.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/aarch64.h	Thu Jun 20 08:08:06 2024
*************** extern unsigned aarch64_architecture_ver
*** 268,274 ****
    (AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_V8_6 | AARCH64_FL_FPSIMD \
     | AARCH64_FL_I8MM | AARCH64_FL_BF16)
  #define AARCH64_FL_FOR_ARCH8_7			\
!   (AARCH64_FL_FOR_ARCH8_6 | AARCH64_FL_V8_7 | AARCH64_FL_LS64)
  #define AARCH64_FL_FOR_ARCH8_8			\
    (AARCH64_FL_FOR_ARCH8_7 | AARCH64_FL_V8_8 | AARCH64_FL_MOPS)
  
--- 268,274 ----
    (AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_V8_6 | AARCH64_FL_FPSIMD \
     | AARCH64_FL_I8MM | AARCH64_FL_BF16)
  #define AARCH64_FL_FOR_ARCH8_7			\
!   (AARCH64_FL_FOR_ARCH8_6 | AARCH64_FL_V8_7)
  #define AARCH64_FL_FOR_ARCH8_8			\
    (AARCH64_FL_FOR_ARCH8_7 | AARCH64_FL_V8_8 | AARCH64_FL_MOPS)
  
*************** extern enum aarch64_processor aarch64_tu
*** 860,865 ****
--- 860,868 ----
  #ifdef HAVE_POLY_INT_H
  struct GTY (()) aarch64_frame
  {
+   /* The offset from the bottom of the static frame (the bottom of the
+      outgoing arguments) of each register save slot, or -2 if no save is
+      needed.  */
    poly_int64 reg_offset[LAST_SAVED_REGNUM + 1];
  
    /* The number of extra stack bytes taken up by register varargs.
*************** struct GTY (()) aarch64_frame
*** 868,892 ****
       STACK_BOUNDARY.  */
    HOST_WIDE_INT saved_varargs_size;
  
!   /* The size of the callee-save registers with a slot in REG_OFFSET.  */
!   poly_int64 saved_regs_size;
  
!   /* The size of the callee-save registers with a slot in REG_OFFSET that
!      are saved below the hard frame pointer.  */
!   poly_int64 below_hard_fp_saved_regs_size;
  
!   /* Offset from the base of the frame (incomming SP) to the
!      top of the locals area.  This value is always a multiple of
       STACK_BOUNDARY.  */
!   poly_int64 locals_offset;
  
!   /* Offset from the base of the frame (incomming SP) to the
!      hard_frame_pointer.  This value is always a multiple of
       STACK_BOUNDARY.  */
!   poly_int64 hard_fp_offset;
  
!   /* The size of the frame.  This value is the offset from base of the
!      frame (incomming SP) to the stack_pointer.  This value is always
       a multiple of STACK_BOUNDARY.  */
    poly_int64 frame_size;
  
--- 871,898 ----
       STACK_BOUNDARY.  */
    HOST_WIDE_INT saved_varargs_size;
  
!   /* The number of bytes between the bottom of the static frame (the bottom
!      of the outgoing arguments) and the bottom of the register save area.
!      This value is always a multiple of STACK_BOUNDARY.  */
!   poly_int64 bytes_below_saved_regs;
  
!   /* The number of bytes between the bottom of the static frame (the bottom
!      of the outgoing arguments) and the hard frame pointer.  This value is
!      always a multiple of STACK_BOUNDARY.  */
!   poly_int64 bytes_below_hard_fp;
  
!   /* The number of bytes between the top of the locals area and the top
!      of the frame (the incomming SP).  This value is always a multiple of
       STACK_BOUNDARY.  */
!   poly_int64 bytes_above_locals;
  
!   /* The number of bytes between the hard_frame_pointer and the top of
!      the frame (the incomming SP).  This value is always a multiple of
       STACK_BOUNDARY.  */
!   poly_int64 bytes_above_hard_fp;
  
!   /* The size of the frame, i.e. the number of bytes between the bottom
!      of the outgoing arguments and the incoming SP.  This value is always
       a multiple of STACK_BOUNDARY.  */
    poly_int64 frame_size;
  
*************** struct GTY (()) aarch64_frame
*** 897,906 ****
       It is zero when no push is used.  */
    HOST_WIDE_INT callee_adjust;
  
-   /* The offset from SP to the callee-save registers after initial_adjust.
-      It may be non-zero if no push is used (ie. callee_adjust == 0).  */
-   poly_int64 callee_offset;
- 
    /* The size of the stack adjustment before saving or after restoring
       SVE registers.  */
    poly_int64 sve_callee_adjust;
--- 903,908 ----
*************** struct GTY (()) aarch64_frame
*** 948,953 ****
--- 950,963 ----
       This is the register they should use.  */
    unsigned spare_pred_reg;
  
+   /* An SVE register that is saved below the hard frame pointer and that acts
+      as a probe for later allocations, or INVALID_REGNUM if none.  */
+   unsigned sve_save_and_probe;
+ 
+   /* A register that is saved at the hard frame pointer and that acts
+      as a probe for later allocations, or INVALID_REGNUM if none.  */
+   unsigned hard_fp_save_and_probe;
+ 
    bool laid_out;
  
    /* True if shadow call stack should be enabled for the current function.  */
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/aarch64.md gcc-12.4.0/gcc/config/aarch64/aarch64.md
*** gcc-12.3.0/gcc/config/aarch64/aarch64.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/aarch64.md	Thu Jun 20 08:08:06 2024
***************
*** 1159,1167 ****
  {
    int i;
  
    /* Untyped calls always use the default ABI.  It's only possible to use
       ABI variants if we know the type of the target function.  */
!   emit_call_insn (gen_call (operands[0], const0_rtx, const0_rtx));
  
    for (i = 0; i < XVECLEN (operands[2], 0); i++)
      {
--- 1159,1185 ----
  {
    int i;
  
+   /* Generate a PARALLEL that contains all of the register results.
+      The offsets are somewhat arbitrary, since we don't know the
+      actual return type.  The main thing we need to avoid is having
+      overlapping byte ranges, since those might give the impression
+      that two registers are known to have data in common.  */
+   rtvec rets = rtvec_alloc (XVECLEN (operands[2], 0));
+   poly_int64 offset = 0;
+   for (i = 0; i < XVECLEN (operands[2], 0); i++)
+     {
+       rtx reg = SET_SRC (XVECEXP (operands[2], 0, i));
+       gcc_assert (REG_P (reg));
+       rtx offset_rtx = gen_int_mode (offset, Pmode);
+       rtx piece = gen_rtx_EXPR_LIST (VOIDmode, reg, offset_rtx);
+       RTVEC_ELT (rets, i) = piece;
+       offset += GET_MODE_SIZE (GET_MODE (reg));
+     }
+   rtx ret = gen_rtx_PARALLEL (VOIDmode, rets);
+ 
    /* Untyped calls always use the default ABI.  It's only possible to use
       ABI variants if we know the type of the target function.  */
!   emit_call_insn (gen_call_value (ret, operands[0], const0_rtx, const0_rtx));
  
    for (i = 0; i < XVECLEN (operands[2], 0); i++)
      {
***************
*** 1627,1633 ****
  }
  )
  
! (define_insn "aarch64_movmemdi"
    [(parallel [
     (set (match_operand:DI 2 "register_operand" "+&r") (const_int 0))
     (clobber (match_operand:DI 0 "register_operand" "+&r"))
--- 1645,1666 ----
  }
  )
  
! (define_expand "aarch64_movmemdi"
!   [(parallel
!      [(set (match_operand 2) (const_int 0))
!       (clobber (match_dup 3))
!       (clobber (match_dup 4))
!       (clobber (reg:CC CC_REGNUM))
!       (set (match_operand 0)
! 	   (unspec:BLK [(match_operand 1) (match_dup 2)] UNSPEC_MOVMEM))])]
!   "TARGET_MOPS"
!   {
!     operands[3] = XEXP (operands[0], 0);
!     operands[4] = XEXP (operands[1], 0);
!   }
! )
! 
! (define_insn "*aarch64_movmemdi"
    [(parallel [
     (set (match_operand:DI 2 "register_operand" "+&r") (const_int 0))
     (clobber (match_operand:DI 0 "register_operand" "+&r"))
***************
*** 1660,1676 ****
         && INTVAL (sz_reg) < aarch64_mops_memmove_size_threshold)
       FAIL;
  
!    rtx addr_dst = XEXP (operands[0], 0);
!    rtx addr_src = XEXP (operands[1], 0);
! 
!    if (!REG_P (sz_reg))
!      sz_reg = force_reg (DImode, sz_reg);
!    if (!REG_P (addr_dst))
!      addr_dst = force_reg (DImode, addr_dst);
!    if (!REG_P (addr_src))
!      addr_src = force_reg (DImode, addr_src);
!    emit_insn (gen_aarch64_movmemdi (addr_dst, addr_src, sz_reg));
!    DONE;
  }
  )
  
--- 1693,1701 ----
         && INTVAL (sz_reg) < aarch64_mops_memmove_size_threshold)
       FAIL;
  
!   if (aarch64_expand_cpymem_mops (operands, true))
!     DONE;
!   FAIL;
  }
  )
  
***************
*** 1849,1865 ****
    [(set_attr "type" "neon_load1_2reg")]
  )
  
! (define_insn "loadwb_pair_"
    [(parallel
      [(set (match_operand:P 0 "register_operand" "=k")
!           (plus:P (match_operand:P 1 "register_operand" "0")
!                   (match_operand:P 4 "aarch64_mem_pair_offset" "n")))
!      (set (match_operand:TX 2 "register_operand" "=w")
!           (mem:TX (match_dup 1)))
!      (set (match_operand:TX 3 "register_operand" "=w")
!           (mem:TX (plus:P (match_dup 1)
  			  (match_operand:P 5 "const_int_operand" "n"))))])]
!   "TARGET_SIMD && INTVAL (operands[5]) == GET_MODE_SIZE (mode)"
    "ldp\\t%q2, %q3, [%1], %4"
    [(set_attr "type" "neon_ldp_q")]
  )
--- 1874,1891 ----
    [(set_attr "type" "neon_load1_2reg")]
  )
  
! (define_insn "loadwb_pair_"
    [(parallel
      [(set (match_operand:P 0 "register_operand" "=k")
! 	  (plus:P (match_operand:P 1 "register_operand" "0")
! 		  (match_operand:P 4 "aarch64_mem_pair_offset" "n")))
!      (set (match_operand:TX_V16QI 2 "register_operand" "=w")
! 	  (mem:TX_V16QI (match_dup 1)))
!      (set (match_operand:TX_V16QI 3 "register_operand" "=w")
! 	  (mem:TX_V16QI (plus:P (match_dup 1)
  			  (match_operand:P 5 "const_int_operand" "n"))))])]
!   "TARGET_SIMD
!    && known_eq (INTVAL (operands[5]), GET_MODE_SIZE (mode))"
    "ldp\\t%q2, %q3, [%1], %4"
    [(set_attr "type" "neon_ldp_q")]
  )
***************
*** 1898,1917 ****
    [(set_attr "type" "neon_store1_2reg")]
  )
  
! (define_insn "storewb_pair_"
    [(parallel
      [(set (match_operand:P 0 "register_operand" "=&k")
!           (plus:P (match_operand:P 1 "register_operand" "0")
!                   (match_operand:P 4 "aarch64_mem_pair_offset" "n")))
!      (set (mem:TX (plus:P (match_dup 0)
  			  (match_dup 4)))
!           (match_operand:TX 2 "register_operand" "w"))
!      (set (mem:TX (plus:P (match_dup 0)
  			  (match_operand:P 5 "const_int_operand" "n")))
!           (match_operand:TX 3 "register_operand" "w"))])]
    "TARGET_SIMD
!    && INTVAL (operands[5])
!       == INTVAL (operands[4]) + GET_MODE_SIZE (mode)"
    "stp\\t%q2, %q3, [%0, %4]!"
    [(set_attr "type" "neon_stp_q")]
  )
--- 1924,1943 ----
    [(set_attr "type" "neon_store1_2reg")]
  )
  
! (define_insn "storewb_pair_"
    [(parallel
      [(set (match_operand:P 0 "register_operand" "=&k")
! 	  (plus:P (match_operand:P 1 "register_operand" "0")
! 		  (match_operand:P 4 "aarch64_mem_pair_offset" "n")))
!      (set (mem:TX_V16QI (plus:P (match_dup 0)
  			  (match_dup 4)))
! 	  (match_operand:TX_V16QI 2 "register_operand" "w"))
!      (set (mem:TX_V16QI (plus:P (match_dup 0)
  			  (match_operand:P 5 "const_int_operand" "n")))
! 	  (match_operand:TX_V16QI 3 "register_operand" "w"))])]
    "TARGET_SIMD
!    && known_eq (INTVAL (operands[5]),
! 		INTVAL (operands[4]) + GET_MODE_SIZE (mode))"
    "stp\\t%q2, %q3, [%0, %4]!"
    [(set_attr "type" "neon_stp_q")]
  )
***************
*** 7668,7676 ****
  ;; Load/Store 64-bit (LS64) instructions.
  (define_insn "ld64b"
    [(set (match_operand:V8DI 0 "register_operand" "=r")
!         (unspec_volatile:V8DI
!           [(mem:V8DI (match_operand:DI 1 "register_operand" "r"))]
!             UNSPEC_LD64B)
    )]
    "TARGET_LS64"
    "ld64b\\t%0, [%1]"
--- 7694,7702 ----
  ;; Load/Store 64-bit (LS64) instructions.
  (define_insn "ld64b"
    [(set (match_operand:V8DI 0 "register_operand" "=r")
! 	(unspec_volatile:V8DI
! 	  [(mem:V8DI (match_operand:DI 1 "register_operand" "r"))]
! 	    UNSPEC_LD64B)
    )]
    "TARGET_LS64"
    "ld64b\\t%0, [%1]"
***************
*** 7678,7686 ****
  )
  
  (define_insn "st64b"
!   [(set (mem:V8DI (match_operand:DI 0 "register_operand" "=r"))
!         (unspec_volatile:V8DI [(match_operand:V8DI 1 "register_operand" "r")]
!             UNSPEC_ST64B)
    )]
    "TARGET_LS64"
    "st64b\\t%1, [%0]"
--- 7704,7712 ----
  )
  
  (define_insn "st64b"
!   [(set (mem:V8DI (match_operand:DI 0 "register_operand" "r"))
! 	(unspec_volatile:V8DI [(match_operand:V8DI 1 "register_operand" "r")]
! 	    UNSPEC_ST64B)
    )]
    "TARGET_LS64"
    "st64b\\t%1, [%0]"
***************
*** 7689,7698 ****
  
  (define_insn "st64bv"
    [(set (match_operand:DI 0 "register_operand" "=r")
!         (unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV_RET))
     (set (mem:V8DI (match_operand:DI 1 "register_operand" "r"))
!         (unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")]
!             UNSPEC_ST64BV)
    )]
    "TARGET_LS64"
    "st64bv\\t%0, %2, [%1]"
--- 7715,7724 ----
  
  (define_insn "st64bv"
    [(set (match_operand:DI 0 "register_operand" "=r")
! 	(unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV_RET))
     (set (mem:V8DI (match_operand:DI 1 "register_operand" "r"))
! 	(unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")]
! 	    UNSPEC_ST64BV)
    )]
    "TARGET_LS64"
    "st64bv\\t%0, %2, [%1]"
***************
*** 7701,7710 ****
  
  (define_insn "st64bv0"
    [(set (match_operand:DI 0 "register_operand" "=r")
!         (unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV0_RET))
     (set (mem:V8DI (match_operand:DI 1 "register_operand" "r"))
!         (unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")]
!             UNSPEC_ST64BV0)
    )]
    "TARGET_LS64"
    "st64bv0\\t%0, %2, [%1]"
--- 7727,7736 ----
  
  (define_insn "st64bv0"
    [(set (match_operand:DI 0 "register_operand" "=r")
! 	(unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV0_RET))
     (set (mem:V8DI (match_operand:DI 1 "register_operand" "r"))
! 	(unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")]
! 	    UNSPEC_ST64BV0)
    )]
    "TARGET_LS64"
    "st64bv0\\t%0, %2, [%1]"
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/arm_acle.h gcc-12.4.0/gcc/config/aarch64/arm_acle.h
*** gcc-12.3.0/gcc/config/aarch64/arm_acle.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/arm_acle.h	Thu Jun 20 08:08:06 2024
*************** __ttest (void)
*** 270,309 ****
  #endif
  
  #ifdef __ARM_FEATURE_LS64
- #pragma GCC push_options
- #pragma GCC target ("+nothing+ls64")
- 
  typedef __arm_data512_t data512_t;
- 
- __extension__ extern __inline data512_t
- __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
- __arm_ld64b (const void *__addr)
- {
-   return __builtin_aarch64_ld64b (__addr);
- }
- 
- __extension__ extern __inline void
- __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
- __arm_st64b (void *__addr, data512_t __value)
- {
-   __builtin_aarch64_st64b (__addr, __value);
- }
- 
- __extension__ extern __inline uint64_t
- __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
- __arm_st64bv (void *__addr, data512_t __value)
- {
-   return __builtin_aarch64_st64bv (__addr, __value);
- }
- 
- __extension__ extern __inline uint64_t
- __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
- __arm_st64bv0 (void *__addr, data512_t __value)
- {
-   return __builtin_aarch64_st64bv0 (__addr, __value);
- }
- 
- #pragma GCC pop_options
  #endif
  
  #pragma GCC push_options
--- 270,276 ----
diff -Nrcpad gcc-12.3.0/gcc/config/aarch64/iterators.md gcc-12.4.0/gcc/config/aarch64/iterators.md
*** gcc-12.3.0/gcc/config/aarch64/iterators.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/aarch64/iterators.md	Thu Jun 20 08:08:06 2024
***************
*** 303,308 ****
--- 303,311 ----
  
  (define_mode_iterator TX [TI TF])
  
+ ;; TX plus V16QImode.
+ (define_mode_iterator TX_V16QI [TI TF V16QI])
+ 
  ;; Advanced SIMD opaque structure modes.
  (define_mode_iterator VSTRUCT [OI CI XI])
  
diff -Nrcpad gcc-12.3.0/gcc/config/alpha/alpha.cc gcc-12.4.0/gcc/config/alpha/alpha.cc
*** gcc-12.3.0/gcc/config/alpha/alpha.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/alpha/alpha.cc	Thu Jun 20 08:08:06 2024
*************** static rtx
*** 2070,2075 ****
--- 2070,2077 ----
  alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1)
  {
    HOST_WIDE_INT d1, d2, d3, d4;
+   machine_mode mode = GET_MODE (target);
+   rtx orig_target = target;
  
    /* Decompose the entire word */
  
*************** alpha_emit_set_long_const (rtx target, H
*** 2082,2087 ****
--- 2084,2092 ----
    d4 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000;
    gcc_assert (c1 == d4);
  
+   if (mode != DImode)
+     target = gen_lowpart (DImode, target);
+ 
    /* Construct the high word */
    if (d4)
      {
*************** alpha_emit_set_long_const (rtx target, H
*** 2101,2107 ****
    if (d1)
      emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d1)));
  
!   return target;
  }
  
  /* Given an integral CONST_INT or CONST_VECTOR, return the low 64 bits.  */
--- 2106,2112 ----
    if (d1)
      emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d1)));
  
!   return orig_target;
  }
  
  /* Given an integral CONST_INT or CONST_VECTOR, return the low 64 bits.  */
diff -Nrcpad gcc-12.3.0/gcc/config/alpha/alpha.md gcc-12.4.0/gcc/config/alpha/alpha.md
*** gcc-12.3.0/gcc/config/alpha/alpha.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/alpha/alpha.md	Thu Jun 20 08:08:06 2024
***************
*** 756,762 ****
  	(sign_extend:DI (match_operand:SI 2 "nonimmediate_operand")))
     (parallel [(set (match_dup 5)
  		   (sign_extend:DI
! 		    (any_divmod:SI (match_dup 3) (match_dup 4))))
  	      (clobber (reg:DI 23))
  	      (clobber (reg:DI 28))])
     (set (match_operand:SI 0 "nonimmediate_operand")
--- 756,763 ----
  	(sign_extend:DI (match_operand:SI 2 "nonimmediate_operand")))
     (parallel [(set (match_dup 5)
  		   (sign_extend:DI
! 		    (any_divmod:SI (truncate:SI (match_dup 3))
! 				   (truncate:SI (match_dup 4)))))
  	      (clobber (reg:DI 23))
  	      (clobber (reg:DI 28))])
     (set (match_operand:SI 0 "nonimmediate_operand")
***************
*** 782,790 ****
  
  (define_insn_and_split "*divmodsi_internal_er"
    [(set (match_operand:DI 0 "register_operand" "=c")
! 	(sign_extend:DI (match_operator:SI 3 "divmod_operator"
! 			[(match_operand:DI 1 "register_operand" "a")
! 			 (match_operand:DI 2 "register_operand" "b")])))
     (clobber (reg:DI 23))
     (clobber (reg:DI 28))]
    "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF"
--- 783,792 ----
  
  (define_insn_and_split "*divmodsi_internal_er"
    [(set (match_operand:DI 0 "register_operand" "=c")
! 	(sign_extend:DI
! 	 (match_operator:SI 3 "divmod_operator"
! 	  [(truncate:SI (match_operand:DI 1 "register_operand" "a"))
! 	   (truncate:SI (match_operand:DI 2 "register_operand" "b"))])))
     (clobber (reg:DI 23))
     (clobber (reg:DI 28))]
    "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF"
***************
*** 826,833 ****
  (define_insn "*divmodsi_internal_er_1"
    [(set (match_operand:DI 0 "register_operand" "=c")
  	(sign_extend:DI (match_operator:SI 3 "divmod_operator"
!                         [(match_operand:DI 1 "register_operand" "a")
!                          (match_operand:DI 2 "register_operand" "b")])))
     (use (match_operand:DI 4 "register_operand" "c"))
     (use (match_operand 5 "const_int_operand"))
     (clobber (reg:DI 23))
--- 828,835 ----
  (define_insn "*divmodsi_internal_er_1"
    [(set (match_operand:DI 0 "register_operand" "=c")
  	(sign_extend:DI (match_operator:SI 3 "divmod_operator"
! 	 [(truncate:SI (match_operand:DI 1 "register_operand" "a"))
! 	  (truncate:SI (match_operand:DI 2 "register_operand" "b"))])))
     (use (match_operand:DI 4 "register_operand" "c"))
     (use (match_operand 5 "const_int_operand"))
     (clobber (reg:DI 23))
***************
*** 839,847 ****
  
  (define_insn "*divmodsi_internal"
    [(set (match_operand:DI 0 "register_operand" "=c")
! 	(sign_extend:DI (match_operator:SI 3 "divmod_operator"
! 			[(match_operand:DI 1 "register_operand" "a")
! 			 (match_operand:DI 2 "register_operand" "b")])))
     (clobber (reg:DI 23))
     (clobber (reg:DI 28))]
    "TARGET_ABI_OSF"
--- 841,850 ----
  
  (define_insn "*divmodsi_internal"
    [(set (match_operand:DI 0 "register_operand" "=c")
! 	(sign_extend:DI
! 	 (match_operator:SI 3 "divmod_operator"
! 	  [(truncate:SI (match_operand:DI 1 "register_operand" "a"))
! 	   (truncate:SI (match_operand:DI 2 "register_operand" "b"))])))
     (clobber (reg:DI 23))
     (clobber (reg:DI 28))]
    "TARGET_ABI_OSF"
diff -Nrcpad gcc-12.3.0/gcc/config/alpha/constraints.md gcc-12.4.0/gcc/config/alpha/constraints.md
*** gcc-12.3.0/gcc/config/alpha/constraints.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/alpha/constraints.md	Thu Jun 20 08:08:06 2024
***************
*** 27,33 ****
   "General register 24, input to division routine")
  
  (define_register_constraint "b" "R25_REG"
!  "General register 24, input to division routine")
  
  (define_register_constraint "c" "R27_REG"
   "General register 27, function call address")
--- 27,33 ----
   "General register 24, input to division routine")
  
  (define_register_constraint "b" "R25_REG"
!  "General register 25, input to division routine")
  
  (define_register_constraint "c" "R27_REG"
   "General register 27, function call address")
diff -Nrcpad gcc-12.3.0/gcc/config/arm/arm-builtins.cc gcc-12.4.0/gcc/config/arm/arm-builtins.cc
*** gcc-12.3.0/gcc/config/arm/arm-builtins.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/arm-builtins.cc	Thu Jun 20 08:08:06 2024
*************** arm_binop_imm_qualifiers[SIMD_MAX_BUILTI
*** 97,103 ****
  /* T (T, unsigned immediate).  */
  static enum arm_type_qualifiers
  arm_sat_binop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
!   = { qualifier_unsigned, qualifier_none, qualifier_unsigned_immediate };
  #define SAT_BINOP_UNSIGNED_IMM_QUALIFIERS \
    (arm_sat_binop_imm_qualifiers)
  
--- 97,103 ----
  /* T (T, unsigned immediate).  */
  static enum arm_type_qualifiers
  arm_sat_binop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
!   = { qualifier_none, qualifier_none, qualifier_unsigned_immediate };
  #define SAT_BINOP_UNSIGNED_IMM_QUALIFIERS \
    (arm_sat_binop_imm_qualifiers)
  
diff -Nrcpad gcc-12.3.0/gcc/config/arm/arm.cc gcc-12.4.0/gcc/config/arm/arm.cc
*** gcc-12.3.0/gcc/config/arm/arm.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/arm.cc	Thu Jun 20 08:08:06 2024
*************** cmse_nonsecure_call_inline_register_clea
*** 18989,18994 ****
--- 18989,19026 ----
  	  end_sequence ();
  	  emit_insn_before (seq, insn);
  
+ 	  /* The AAPCS requires the callee to widen integral types narrower
+ 	     than 32 bits to the full width of the register; but when handling
+ 	     calls to non-secure space, we cannot trust the callee to have
+ 	     correctly done so.  So forcibly re-widen the result here.  */
+ 	  tree ret_type = TREE_TYPE (fntype);
+ 	  if ((TREE_CODE (ret_type) == INTEGER_TYPE
+ 	      || TREE_CODE (ret_type) == ENUMERAL_TYPE
+ 	      || TREE_CODE (ret_type) == BOOLEAN_TYPE)
+ 	      && known_lt (GET_MODE_SIZE (TYPE_MODE (ret_type)), 4))
+ 	    {
+ 	      rtx ret_reg = gen_rtx_REG (TYPE_MODE (ret_type), R0_REGNUM);
+ 	      rtx si_reg = gen_rtx_REG (SImode, R0_REGNUM);
+ 	      rtx extend;
+ 	      if (TYPE_UNSIGNED (ret_type))
+ 		extend = gen_rtx_SET (si_reg, gen_rtx_ZERO_EXTEND (SImode,
+ 								   ret_reg));
+ 	      else
+ 		{
+ 		  /* Signed-extension is a special case because of
+ 		     thumb1_extendhisi2.  */
+ 		  if (TARGET_THUMB1
+ 		      && known_eq (GET_MODE_SIZE (TYPE_MODE (ret_type)), 2))
+ 		    extend = gen_thumb1_extendhisi2 (si_reg, ret_reg);
+ 		  else
+ 		    extend = gen_rtx_SET (si_reg,
+ 					  gen_rtx_SIGN_EXTEND (SImode,
+ 							       ret_reg));
+ 		}
+ 	      emit_insn_after (extend, insn);
+ 	    }
+ 
+ 
  	  if (TARGET_HAVE_FPCXT_CMSE)
  	    {
  	      rtx_insn *last, *pop_insn, *after = insn;
*************** arm_expand_prologue (void)
*** 23397,23402 ****
--- 23429,23479 ----
  
    ip_rtx = gen_rtx_REG (SImode, IP_REGNUM);
  
+   /* The AAPCS requires the callee to widen integral types narrower
+      than 32 bits to the full width of the register; but when handling
+      calls to non-secure space, we cannot trust the callee to have
+      correctly done so.  So forcibly re-widen the result here.  */
+   if (IS_CMSE_ENTRY (func_type))
+     {
+       function_args_iterator args_iter;
+       CUMULATIVE_ARGS args_so_far_v;
+       cumulative_args_t args_so_far;
+       bool first_param = true;
+       tree arg_type;
+       tree fndecl = current_function_decl;
+       tree fntype = TREE_TYPE (fndecl);
+       arm_init_cumulative_args (&args_so_far_v, fntype, NULL_RTX, fndecl);
+       args_so_far = pack_cumulative_args (&args_so_far_v);
+       FOREACH_FUNCTION_ARGS (fntype, arg_type, args_iter)
+ 	{
+ 	  rtx arg_rtx;
+ 
+ 	  if (VOID_TYPE_P (arg_type))
+ 	    break;
+ 
+ 	  function_arg_info arg (arg_type, /*named=*/true);
+ 	  if (!first_param)
+ 	    /* We should advance after processing the argument and pass
+ 	       the argument we're advancing past.  */
+ 	    arm_function_arg_advance (args_so_far, arg);
+ 	  first_param = false;
+ 	  arg_rtx = arm_function_arg (args_so_far, arg);
+ 	  gcc_assert (REG_P (arg_rtx));
+ 	  if ((TREE_CODE (arg_type) == INTEGER_TYPE
+ 	      || TREE_CODE (arg_type) == ENUMERAL_TYPE
+ 	      || TREE_CODE (arg_type) == BOOLEAN_TYPE)
+ 	      && known_lt (GET_MODE_SIZE (GET_MODE (arg_rtx)), 4))
+ 	    {
+ 	      if (TYPE_UNSIGNED (arg_type))
+ 		emit_set_insn (gen_rtx_REG (SImode, REGNO (arg_rtx)),
+ 			       gen_rtx_ZERO_EXTEND (SImode, arg_rtx));
+ 	      else
+ 		emit_set_insn (gen_rtx_REG (SImode, REGNO (arg_rtx)),
+ 			       gen_rtx_SIGN_EXTEND (SImode, arg_rtx));
+ 	    }
+ 	}
+     }
+ 
    if (IS_STACKALIGN (func_type))
      {
        rtx r0, r1;
*************** thumb1_expand_prologue (void)
*** 26878,26883 ****
--- 26955,27012 ----
    live_regs_mask = offsets->saved_regs_mask;
    lr_needs_saving = live_regs_mask & (1 << LR_REGNUM);
  
+   /* The AAPCS requires the callee to widen integral types narrower
+      than 32 bits to the full width of the register; but when handling
+      calls to non-secure space, we cannot trust the callee to have
+      correctly done so.  So forcibly re-widen the result here.  */
+   if (IS_CMSE_ENTRY (func_type))
+     {
+       function_args_iterator args_iter;
+       CUMULATIVE_ARGS args_so_far_v;
+       cumulative_args_t args_so_far;
+       bool first_param = true;
+       tree arg_type;
+       tree fndecl = current_function_decl;
+       tree fntype = TREE_TYPE (fndecl);
+       arm_init_cumulative_args (&args_so_far_v, fntype, NULL_RTX, fndecl);
+       args_so_far = pack_cumulative_args (&args_so_far_v);
+       FOREACH_FUNCTION_ARGS (fntype, arg_type, args_iter)
+ 	{
+ 	  rtx arg_rtx;
+ 
+ 	  if (VOID_TYPE_P (arg_type))
+ 	    break;
+ 
+ 	  function_arg_info arg (arg_type, /*named=*/true);
+ 	  if (!first_param)
+ 	    /* We should advance after processing the argument and pass
+ 	       the argument we're advancing past.  */
+ 	    arm_function_arg_advance (args_so_far, arg);
+ 	  first_param = false;
+ 	  arg_rtx = arm_function_arg (args_so_far, arg);
+ 	  gcc_assert (REG_P (arg_rtx));
+ 	  if ((TREE_CODE (arg_type) == INTEGER_TYPE
+ 	      || TREE_CODE (arg_type) == ENUMERAL_TYPE
+ 	      || TREE_CODE (arg_type) == BOOLEAN_TYPE)
+ 	      && known_lt (GET_MODE_SIZE (GET_MODE (arg_rtx)), 4))
+ 	    {
+ 	      rtx res_reg = gen_rtx_REG (SImode, REGNO (arg_rtx));
+ 	      if (TYPE_UNSIGNED (arg_type))
+ 		emit_set_insn (res_reg, gen_rtx_ZERO_EXTEND (SImode, arg_rtx));
+ 	      else
+ 		{
+ 		  /* Signed-extension is a special case because of
+ 		     thumb1_extendhisi2.  */
+ 		  if (known_eq (GET_MODE_SIZE (GET_MODE (arg_rtx)), 2))
+ 		    emit_insn (gen_thumb1_extendhisi2 (res_reg, arg_rtx));
+ 		  else
+ 		    emit_set_insn (res_reg,
+ 				   gen_rtx_SIGN_EXTEND (SImode, arg_rtx));
+ 		}
+ 	    }
+ 	}
+     }
+ 
    /* Extract a mask of the ones we can give to the Thumb's push instruction.  */
    l_mask = live_regs_mask & 0x40ff;
    /* Then count how many other high registers will need to be pushed.  */
diff -Nrcpad gcc-12.3.0/gcc/config/arm/arm.md gcc-12.4.0/gcc/config/arm/arm.md
*** gcc-12.3.0/gcc/config/arm/arm.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/arm.md	Thu Jun 20 08:08:06 2024
***************
*** 7466,7472 ****
        && !arm_const_double_rtx (operands[1])
        && !(TARGET_VFP_DOUBLE && vfp3_const_double_rtx (operands[1])))
      {
!       rtx clobreg = gen_reg_rtx (DFmode);
        emit_insn (gen_no_literal_pool_df_immediate (operands[0], operands[1],
  						   clobreg));
        DONE;
--- 7466,7472 ----
        && !arm_const_double_rtx (operands[1])
        && !(TARGET_VFP_DOUBLE && vfp3_const_double_rtx (operands[1])))
      {
!       rtx clobreg = gen_reg_rtx (DImode);
        emit_insn (gen_no_literal_pool_df_immediate (operands[0], operands[1],
  						   clobreg));
        DONE;
diff -Nrcpad gcc-12.3.0/gcc/config/arm/arm_mve.h gcc-12.4.0/gcc/config/arm/arm_mve.h
*** gcc-12.3.0/gcc/config/arm/arm_mve.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/arm_mve.h	Thu Jun 20 08:08:06 2024
*************** __arm_vabdq_m_u16 (uint16x8_t __inactive
*** 9675,9716 ****
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_sv16qi (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_sv4si (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_sv8hi (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, int __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_uv16qi (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, int __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_uv4si (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, int __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_uv8hi (__inactive, __a, __b, __p);
  }
--- 9675,9716 ----
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_sv16qi (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_sv4si (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_sv8hi (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_uv16qi (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_uv4si (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
  {
    return __builtin_mve_vaddq_m_n_uv8hi (__inactive, __a, __b, __p);
  }
*************** __extension__ extern __inline int32x4_t
*** 16055,16061 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    int32x4_t __res = __builtin_mve_vadcq_sv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16055,16061 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    int32x4_t __res = __builtin_mve_vadcq_sv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline uint32x4_t
*** 16065,16071 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    uint32x4_t __res = __builtin_mve_vadcq_uv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16065,16071 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    uint32x4_t __res = __builtin_mve_vadcq_uv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline int32x4_t
*** 16075,16081 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    int32x4_t __res = __builtin_mve_vadcq_m_sv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16075,16081 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    int32x4_t __res = __builtin_mve_vadcq_m_sv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline uint32x4_t
*** 16085,16091 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    uint32x4_t __res =  __builtin_mve_vadcq_m_uv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16085,16091 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vadcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    uint32x4_t __res =  __builtin_mve_vadcq_m_uv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline int32x4_t
*** 16131,16137 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    int32x4_t __res = __builtin_mve_vsbcq_sv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16131,16137 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    int32x4_t __res = __builtin_mve_vsbcq_sv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline uint32x4_t
*** 16141,16147 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    uint32x4_t __res =  __builtin_mve_vsbcq_uv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16141,16147 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    uint32x4_t __res =  __builtin_mve_vsbcq_uv4si (__a, __b);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline int32x4_t
*** 16151,16157 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    int32x4_t __res = __builtin_mve_vsbcq_m_sv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16151,16157 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    int32x4_t __res = __builtin_mve_vsbcq_m_sv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline uint32x4_t
*** 16161,16167 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29));
    uint32x4_t __res = __builtin_mve_vsbcq_m_uv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
--- 16161,16167 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vsbcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p)
  {
!   __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29));
    uint32x4_t __res = __builtin_mve_vsbcq_m_uv4si (__inactive, __a, __b, __p);
    *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u;
    return __res;
*************** __extension__ extern __inline void
*** 16171,16184 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_u8 (uint8_t * __addr, uint8x16_t __value, mve_pred16_t __p)
  {
!   return vstrbq_p_u8 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_s8 (int8_t * __addr, int8x16_t __value, mve_pred16_t __p)
  {
!   return vstrbq_p_s8 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
--- 16171,16184 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_u8 (uint8_t * __addr, uint8x16_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrbq_p_u8 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_s8 (int8_t * __addr, int8x16_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrbq_p_s8 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
*************** __extension__ extern __inline uint8x16_t
*** 16203,16216 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_u8 (uint8_t const *__base, mve_pred16_t __p)
  {
!   return vldrbq_z_u8 ( __base, __p);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_s8 (int8_t const *__base, mve_pred16_t __p)
  {
!   return vldrbq_z_s8 ( __base, __p);
  }
  
  __extension__ extern __inline int8x16x2_t
--- 16203,16216 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_u8 (uint8_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrbq_z_u8 ( __base, __p);
  }
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_s8 (int8_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrbq_z_s8 ( __base, __p);
  }
  
  __extension__ extern __inline int8x16x2_t
*************** __extension__ extern __inline void
*** 16253,16266 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_u16 (uint16_t * __addr, uint16x8_t __value, mve_pred16_t __p)
  {
!   return vstrhq_p_u16 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_s16 (int16_t * __addr, int16x8_t __value, mve_pred16_t __p)
  {
!   return vstrhq_p_s16 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
--- 16253,16266 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_u16 (uint16_t * __addr, uint16x8_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrhq_p_u16 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_s16 (int16_t * __addr, int16x8_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrhq_p_s16 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
*************** __extension__ extern __inline uint16x8_t
*** 16285,16298 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_u16 (uint16_t const *__base, mve_pred16_t __p)
  {
!   return vldrhq_z_u16 ( __base, __p);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_s16 (int16_t const *__base, mve_pred16_t __p)
  {
!   return vldrhq_z_s16 ( __base, __p);
  }
  
  __extension__ extern __inline int16x8x2_t
--- 16285,16298 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_u16 (uint16_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrhq_z_u16 ( __base, __p);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_s16 (int16_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrhq_z_s16 ( __base, __p);
  }
  
  __extension__ extern __inline int16x8x2_t
*************** __extension__ extern __inline void
*** 16335,16348 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_u32 (uint32_t * __addr, uint32x4_t __value, mve_pred16_t __p)
  {
!   return vstrwq_p_u32 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_s32 (int32_t * __addr, int32x4_t __value, mve_pred16_t __p)
  {
!   return vstrwq_p_s32 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
--- 16335,16348 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_u32 (uint32_t * __addr, uint32x4_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrwq_p_u32 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_s32 (int32_t * __addr, int32x4_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrwq_p_s32 (__addr, __value, __p);
  }
  
  __extension__ extern __inline void
*************** __extension__ extern __inline uint32x4_t
*** 16367,16380 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_u32 (uint32_t const *__base, mve_pred16_t __p)
  {
!   return vldrwq_z_u32 ( __base, __p);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_s32 (int32_t const *__base, mve_pred16_t __p)
  {
!   return vldrwq_z_s32 ( __base, __p);
  }
  
  __extension__ extern __inline int32x4x2_t
--- 16367,16380 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_u32 (uint32_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrwq_z_u32 ( __base, __p);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_s32 (int32_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrwq_z_s32 ( __base, __p);
  }
  
  __extension__ extern __inline int32x4x2_t
*************** __extension__ extern __inline float16x8_
*** 19837,19843 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_f16 (float16_t const *__base, mve_pred16_t __p)
  {
!   return vldrhq_z_f16 (__base, __p);
  }
  
  __extension__ extern __inline void
--- 19837,19843 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_f16 (float16_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrhq_z_f16 (__base, __p);
  }
  
  __extension__ extern __inline void
*************** __extension__ extern __inline void
*** 19853,19859 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_f16 (float16_t * __addr, float16x8_t __value, mve_pred16_t __p)
  {
!   return vstrhq_p_f16 (__addr, __value, __p);
  }
  
  __extension__ extern __inline float32x4x4_t
--- 19853,19859 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_f16 (float16_t * __addr, float16x8_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrhq_p_f16 (__addr, __value, __p);
  }
  
  __extension__ extern __inline float32x4x4_t
*************** __extension__ extern __inline float32x4_
*** 19878,19884 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_f32 (float32_t const *__base, mve_pred16_t __p)
  {
!   return vldrwq_z_f32 (__base, __p);
  }
  
  __extension__ extern __inline void
--- 19878,19884 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vld1q_z_f32 (float32_t const *__base, mve_pred16_t __p)
  {
!   return __arm_vldrwq_z_f32 (__base, __p);
  }
  
  __extension__ extern __inline void
*************** __extension__ extern __inline void
*** 19894,19900 ****
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_f32 (float32_t * __addr, float32x4_t __value, mve_pred16_t __p)
  {
!   return vstrwq_p_f32 (__addr, __value, __p);
  }
  
  __extension__ extern __inline float16x8_t
--- 19894,19900 ----
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
  __arm_vst1q_p_f32 (float32_t * __addr, float32x4_t __value, mve_pred16_t __p)
  {
!   return __arm_vstrwq_p_f32 (__addr, __value, __p);
  }
  
  __extension__ extern __inline float16x8_t
*************** __arm_vabdq_m (uint16x8_t __inactive, ui
*** 26417,26458 ****
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (int8x16_t __inactive, int8x16_t __a, int __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_s8 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (int32x4_t __inactive, int32x4_t __a, int __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_s32 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (int16x8_t __inactive, int16x8_t __a, int __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_s16 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (uint8x16_t __inactive, uint8x16_t __a, int __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_u8 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (uint32x4_t __inactive, uint32x4_t __a, int __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_u32 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (uint16x8_t __inactive, uint16x8_t __a, int __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_u16 (__inactive, __a, __b, __p);
  }
--- 26417,26458 ----
  
  __extension__ extern __inline int8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_s8 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_s32 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline int16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_s16 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint8x16_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_u8 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint32x4_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_u32 (__inactive, __a, __b, __p);
  }
  
  __extension__ extern __inline uint16x8_t
  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
! __arm_vaddq_m (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
  {
   return __arm_vaddq_m_n_u16 (__inactive, __a, __b, __p);
  }
*************** enum {
*** 35582,35594 ****
  	short: __ARM_mve_type_int_n, \
  	int: __ARM_mve_type_int_n, \
  	long: __ARM_mve_type_int_n, \
- 	double: __ARM_mve_type_fp_n, \
  	long long: __ARM_mve_type_int_n, \
  	unsigned char: __ARM_mve_type_int_n, \
  	unsigned short: __ARM_mve_type_int_n, \
  	unsigned int: __ARM_mve_type_int_n, \
  	unsigned long: __ARM_mve_type_int_n, \
  	unsigned long long: __ARM_mve_type_int_n, \
  	default: __ARM_mve_unsupported_type))
  #else
  #define __ARM_mve_typeid(x) _Generic(x, \
--- 35582,35610 ----
  	short: __ARM_mve_type_int_n, \
  	int: __ARM_mve_type_int_n, \
  	long: __ARM_mve_type_int_n, \
  	long long: __ARM_mve_type_int_n, \
+ 	_Float16: __ARM_mve_type_fp_n, \
+ 	__fp16: __ARM_mve_type_fp_n, \
+ 	float: __ARM_mve_type_fp_n, \
+ 	double: __ARM_mve_type_fp_n, \
  	unsigned char: __ARM_mve_type_int_n, \
  	unsigned short: __ARM_mve_type_int_n, \
  	unsigned int: __ARM_mve_type_int_n, \
  	unsigned long: __ARM_mve_type_int_n, \
  	unsigned long long: __ARM_mve_type_int_n, \
+ 	signed char*: __ARM_mve_type_int8_t_ptr, \
+ 	short*: __ARM_mve_type_int16_t_ptr, \
+ 	int*: __ARM_mve_type_int32_t_ptr, \
+ 	long*: __ARM_mve_type_int32_t_ptr, \
+ 	long long*: __ARM_mve_type_int64_t_ptr, \
+ 	_Float16*: __ARM_mve_type_float16_t_ptr, \
+ 	__fp16*: __ARM_mve_type_float16_t_ptr, \
+ 	float*: __ARM_mve_type_float32_t_ptr, \
+ 	unsigned char*: __ARM_mve_type_uint8_t_ptr, \
+ 	unsigned short*: __ARM_mve_type_uint16_t_ptr, \
+ 	unsigned int*: __ARM_mve_type_uint32_t_ptr, \
+ 	unsigned long*: __ARM_mve_type_uint32_t_ptr, \
+ 	unsigned long long*: __ARM_mve_type_uint64_t_ptr, \
  	default: __ARM_mve_unsupported_type))
  #else
  #define __ARM_mve_typeid(x) _Generic(x, \
*************** enum {
*** 35647,35676 ****
  	unsigned int: __ARM_mve_type_int_n, \
  	unsigned long: __ARM_mve_type_int_n, \
  	unsigned long long: __ARM_mve_type_int_n, \
  	default: __ARM_mve_unsupported_type))
  #endif /* MVE Floating point.  */
  
  extern void *__ARM_undef;
  #define __ARM_mve_coerce(param, type) \
      _Generic(param, type: param, default: *(type *)__ARM_undef)
! #define __ARM_mve_coerce1(param, type) \
!     _Generic(param, type: param, const type: param, default: *(type *)__ARM_undef)
! #define __ARM_mve_coerce2(param, type) \
!     _Generic(param, type: param, float16_t: param, float32_t: param, default: *(type *)__ARM_undef)
  
  #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point.  */
  
  #define __arm_vst4q(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce(__p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce(__p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce(__p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce(__p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x4_t]: __arm_vst4q_f16 (__ARM_mve_coerce(__p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x4_t]: __arm_vst4q_f32 (__ARM_mve_coerce(__p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x4_t)));})
  
  #define __arm_vrndxq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 35663,35729 ----
  	unsigned int: __ARM_mve_type_int_n, \
  	unsigned long: __ARM_mve_type_int_n, \
  	unsigned long long: __ARM_mve_type_int_n, \
+ 	signed char*: __ARM_mve_type_int8_t_ptr, \
+ 	short*: __ARM_mve_type_int16_t_ptr, \
+ 	int*: __ARM_mve_type_int32_t_ptr, \
+ 	long*: __ARM_mve_type_int32_t_ptr, \
+ 	long long*: __ARM_mve_type_int64_t_ptr, \
+ 	unsigned char*: __ARM_mve_type_uint8_t_ptr, \
+ 	unsigned short*: __ARM_mve_type_uint16_t_ptr, \
+ 	unsigned int*: __ARM_mve_type_uint32_t_ptr, \
+ 	unsigned long*: __ARM_mve_type_uint32_t_ptr, \
+ 	unsigned long long*: __ARM_mve_type_uint64_t_ptr, \
  	default: __ARM_mve_unsupported_type))
  #endif /* MVE Floating point.  */
  
  extern void *__ARM_undef;
  #define __ARM_mve_coerce(param, type) \
      _Generic(param, type: param, default: *(type *)__ARM_undef)
! #define __ARM_mve_coerce_i_scalar(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, int8_t: param, int16_t: param, int32_t: param, int64_t: param, uint8_t: param, uint16_t: param, uint32_t: param, uint64_t: param, default: *(type *)__ARM_undef))
! 
! #define __ARM_mve_coerce_s8_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, signed char*: param, default: *(type *)__ARM_undef))
! #define __ARM_mve_coerce_u8_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, unsigned char*: param, default: *(type *)__ARM_undef))
! 
! #define __ARM_mve_coerce_s16_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, short*: param, default: *(type *)__ARM_undef))
! #define __ARM_mve_coerce_u16_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, unsigned short*: param, default: *(type *)__ARM_undef))
! 
! #define __ARM_mve_coerce_s32_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, int*: param, long*: param, default: *(type *)__ARM_undef))
! #define __ARM_mve_coerce_u32_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, unsigned int*: param, unsigned long*: param, default: *(type *)__ARM_undef))
! 
! #define __ARM_mve_coerce_s64_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, long long*: param, default: *(type *)__ARM_undef))
! #define __ARM_mve_coerce_u64_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, unsigned long long*: param, default: *(type *)__ARM_undef))
! 
! #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point.  */
! #define __ARM_mve_coerce_f_scalar(param, type) \
!     _Generic(param, type: param, const type: param, __fp16: param, default: _Generic (param, _Float16: param, float16_t: param, float32_t: param, default: *(type *)__ARM_undef))
! #define __ARM_mve_coerce_f16_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, __fp16*: param, _Float16*: param, default: *(type *)__ARM_undef))
! #define __ARM_mve_coerce_f32_ptr(param, type) \
!     _Generic(param, type: param, const type: param, default: _Generic (param, float*: param, default: *(type *)__ARM_undef))
! #endif
  
  #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point.  */
  
  #define __arm_vst4q(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce_s16_ptr(__p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce_u16_ptr(__p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x4_t]: __arm_vst4q_f16 (__ARM_mve_coerce_f16_ptr(__p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x4_t]: __arm_vst4q_f32 (__ARM_mve_coerce_f32_ptr(__p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x4_t)));})
  
  #define __arm_vrndxq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 35847,35852 ****
--- 35900,35909 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vorrq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vorrq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));})
  
*************** extern void *__ARM_undef;
*** 35871,35886 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_f16 (__ARM_mve_coerce(p0, float16x8_t), __ARM_mve_coerce(p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_f32 (__ARM_mve_coerce(p0, float32x4_t), __ARM_mve_coerce(p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));})
  
  #define __arm_vandq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 35928,35943 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));})
  
  #define __arm_vandq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 35897,35906 ****
  #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1 (__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1 (__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1 (__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1 (__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 35954,35963 ----
  #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 35925,35938 ****
  #define __arm_vmulq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 35982,35995 ----
  #define __arm_vmulq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 35957,35970 ****
  #define __arm_vcmpeqq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpeqq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpeqq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpeqq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36014,36027 ----
  #define __arm_vcmpeqq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpeqq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpeqq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpeqq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 35995,36010 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpeqq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpeqq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));})
  
  #define __arm_vcmpgtq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36052,36067 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpeqq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpeqq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));})
  
  #define __arm_vcmpgtq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36012,36024 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgtq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgtq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));})
  
  #define __arm_vcmpleq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36069,36081 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgtq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgtq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));})
  
  #define __arm_vcmpleq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36028,36038 ****
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpleq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpleq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));})
  
  #define __arm_vcmpltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36085,36095 ----
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpleq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpleq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));})
  
  #define __arm_vcmpltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36040,36064 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpltq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpltq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));})
  
  #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36097,36121 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpltq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpltq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));})
  
  #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 36113,36120 ****
  #define __arm_vmaxnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vmaxnmq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36170,36177 ----
  #define __arm_vmaxnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vmaxnmq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36125,36138 ****
  #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vminnmaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36182,36195 ----
  #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vminnmaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36143,36150 ****
  #define __arm_vminnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vbrsrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 36200,36207 ----
  #define __arm_vminnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vbrsrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 36166,36179 ****
  #define __arm_vsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36223,36236 ----
  #define __arm_vsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 36186,36193 ****
  #define __arm_vminnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 36243,36250 ----
  #define __arm_vminnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 36242,36253 ****
  #define __arm_vrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36299,36310 ----
  #define __arm_vrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 36278,36289 ****
  #define __arm_vqsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36335,36346 ----
  #define __arm_vqsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 36334,36345 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vqrdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36391,36402 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vqrdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36347,36355 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vmlaldavxq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36404,36412 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vmlaldavxq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36382,36389 ****
  #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
--- 36439,36446 ----
  #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
*************** extern void *__ARM_undef;
*** 36396,36412 ****
  #define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
  #define __arm_vqdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
--- 36453,36469 ----
  #define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
  #define __arm_vqdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
*************** extern void *__ARM_undef;
*** 36414,36425 ****
  #define __arm_vqaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36471,36482 ----
  #define __arm_vqaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 36452,36463 ****
  #define __arm_vhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36509,36520 ----
  #define __arm_vhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 36482,36493 ****
  #define __arm_vhsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 36539,36550 ----
  #define __arm_vhsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 36630,36641 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
  
  #define __arm_vsriq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36687,36698 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vsriq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36714,36757 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
! 	    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vqdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
! 	    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vmlasq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
  
  #define __arm_vqdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vqrdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 36771,36814 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
! 	    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
! 	    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vmlasq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqrdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36941,36951 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgtq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgtq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
--- 36998,37008 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgtq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgtq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
*************** extern void *__ARM_undef;
*** 36957,36967 ****
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpleq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpleq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));})
  
  #define __arm_vcmpltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37014,37024 ----
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpleq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpleq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));})
  
  #define __arm_vcmpltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36971,36981 ****
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpltq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpltq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));})
  
  #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37028,37038 ----
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpltq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpltq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));})
  
  #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 36988,37001 ****
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpneq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpneq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));})
  
  #define __arm_vcvtbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37045,37058 ----
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpneq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpneq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));})
  
  #define __arm_vcvtbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37049,37056 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmaq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmaq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t)));})
  
--- 37106,37113 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmaq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmaq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t)));})
  
*************** extern void *__ARM_undef;
*** 37065,37072 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double)));})
  
  #define __arm_vmaxnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37122,37129 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double)));})
  
  #define __arm_vmaxnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37089,37102 ****
  #define __arm_vmaxnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vmaxnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vminnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37146,37159 ----
  #define __arm_vmaxnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vmaxnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vminnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37107,37120 ****
  #define __arm_vminnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vminnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vrndnq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37164,37177 ----
  #define __arm_vminnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vminnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vrndnq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37176,37188 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgeq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgeq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));})
  
  #define __arm_vrshrnbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37233,37245 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgeq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgeq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));})
  
  #define __arm_vrshrnbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37283,37293 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgeq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgeq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
--- 37340,37350 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgeq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgeq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
*************** extern void *__ARM_undef;
*** 37316,37329 ****
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vandq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37373,37386 ----
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vandq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37464,37478 ****
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmaq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmaq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vfmasq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vfmsq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37521,37535 ----
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmaq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmaq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vfmasq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vfmsq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37507,37520 ****
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmulq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmulq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37564,37577 ----
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmulq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmulq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37541,37554 ****
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vsubq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vsubq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vorrq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 37598,37611 ----
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vsubq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vsubq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vorrq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 37565,37800 ****
  
  #define __arm_vld1q(p0) (\
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce1(p0, uint32_t *)), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_f16 (__ARM_mve_coerce1(p0, float16_t *)), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_f32 (__ARM_mve_coerce1(p0, float32_t *))))
  
  #define __arm_vld1q_z(p0,p1) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce1(p0, int8_t *), p1), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce1(p0, int16_t *), p1), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce1(p0, uint8_t *), p1), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_z_f16 (__ARM_mve_coerce1(p0, float16_t *), p1), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_z_f32 (__ARM_mve_coerce1(p0, float32_t *), p1)))
  
  #define __arm_vld2q(p0) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce1(p0, uint32_t *)), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld2q_f16 (__ARM_mve_coerce1(p0, float16_t *)), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld2q_f32 (__ARM_mve_coerce1(p0, float32_t *))))
  
  #define __arm_vld4q(p0) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce1(p0, uint32_t *)), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld4q_f16 (__ARM_mve_coerce1(p0, float16_t *)), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld4q_f32 (__ARM_mve_coerce1(p0, float32_t *))))
  
  #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));})
  
  #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
  
  #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));})
  
  #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
  
  #define __arm_vldrwq_gather_offset(p0,p1) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_f32 (__ARM_mve_coerce1(p0, float32_t *), p1)))
  
  #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_z_f32 (__ARM_mve_coerce1(p0, float32_t *), p1, p2)))
  
  #define __arm_vldrwq_gather_shifted_offset(p0,p1) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_f32 (__ARM_mve_coerce1(p0, float32_t *), p1)))
  
  #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_f32 (__ARM_mve_coerce1(p0, float32_t *), p1, p2)))
  
  #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_p_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x2_t]: __arm_vst2q_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x2_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x2_t]: __arm_vst2q_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x2_t)));})
  
  #define __arm_vst1q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)));})
  
  #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_p_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrwq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
--- 37622,37857 ----
  
  #define __arm_vld1q(p0) (\
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *)), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *))))
  
  #define __arm_vld1q_z(p0,p1) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), p1), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), p1), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), p1), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), p1), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1)))
  
  #define __arm_vld2q(p0) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld2q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *)), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld2q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *))))
  
  #define __arm_vld4q(p0) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)), \
!   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld4q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *)), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld4q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *))))
  
  #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));})
  
  #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
  
  #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));})
  
  #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
  
  #define __arm_vldrwq_gather_offset(p0,p1) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1)))
  
  #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1, p2)))
  
  #define __arm_vldrwq_gather_shifted_offset(p0,p1) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1)))
  
  #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ( \
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1, p2)))
  
  #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x2_t]: __arm_vst2q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x2_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x2_t]: __arm_vst2q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x2_t)));})
  
  #define __arm_vst1q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)));})
  
  #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));})
  
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));})
  
  #define __arm_vstrwq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
*************** extern void *__ARM_undef;
*** 37811,37854 ****
  #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_f32 (__ARM_mve_coerce(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t)));})
  
  #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_p_f32 (__ARM_mve_coerce(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));})
  
  #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));})
  
  #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 37868,37911 ----
  #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_f32 (__ARM_mve_coerce_f32_ptr(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t)));})
  
  #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_p_f32 (__ARM_mve_coerce_f32_ptr(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));})
  
  #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \
!   int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));})
  
  #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 38021,38039 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vandq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
--- 38078,38096 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vandq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
*************** extern void *__ARM_undef;
*** 38156,38174 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmulq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmulq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
--- 38213,38231 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmulq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmulq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
*************** extern void *__ARM_undef;
*** 38254,38263 ****
  #define __arm_vsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vsubq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vsubq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));})
  
  #define __arm_vcmulq_rot90_x(p1,p2,p3)  ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
--- 38311,38332 ----
  #define __arm_vsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
+   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
+   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
+   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
+   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
+   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
+   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vsubq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
    int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vsubq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \
!   int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \
!   int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));})
  
  #define __arm_vcmulq_rot90_x(p1,p2,p3)  ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
*************** extern void *__ARM_undef;
*** 38281,38296 ****
  #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int64x2_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint64x2_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vsetq_lane_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vsetq_lane_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #else /* MVE Integer.  */
  
--- 38350,38365 ----
  #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int64x2_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint64x2_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vsetq_lane_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
!   int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vsetq_lane_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
  
  #else /* MVE Integer.  */
  
*************** extern void *__ARM_undef;
*** 38306,38317 ****
  
  #define __arm_vst4q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)));})
  
  #define __arm_vabsq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 38375,38386 ----
  
  #define __arm_vst4q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)));})
  
  #define __arm_vabsq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 38408,38419 ****
  #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38477,38488 ----
  #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38440,38451 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));})
  
  #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 38509,38520 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 38459,38470 ****
  #define __arm_vrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38528,38539 ----
  #define __arm_vrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38495,38506 ****
  #define __arm_vqsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38564,38575 ----
  #define __arm_vqsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38569,38580 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vqrdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 38638,38649 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vqrdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 38582,38597 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vqdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
--- 38651,38666 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vqdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
*************** extern void *__ARM_undef;
*** 38599,38610 ****
  #define __arm_vqaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38668,38679 ----
  #define __arm_vqaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38620,38626 ****
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vorrq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vornq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 38689,38699 ----
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vorrq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vornq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 38635,38646 ****
  #define __arm_vmulq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38708,38719 ----
  #define __arm_vmulq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38715,38726 ****
  #define __arm_vhsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38788,38799 ----
  #define __arm_vhsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38745,38756 ****
  #define __arm_vhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38818,38829 ----
  #define __arm_vhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38800,38809 ****
  #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1 (__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1 (__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1 (__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1 (__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
--- 38873,38882 ----
  #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
*************** extern void *__ARM_undef;
*** 38820,38831 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int)));})
  
  #define __arm_vandq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 38893,38904 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vandq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 38856,38867 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));})
  
  #define __arm_vqmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 38929,38940 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vqmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 38942,38957 ****
  #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
  #define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
--- 39015,39030 ----
  #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
  #define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
  
*************** extern void *__ARM_undef;
*** 38961,38969 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vcmpgtq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39034,39042 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vcmpgtq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 38971,38979 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vcmpleq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39044,39052 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vcmpleq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 38981,38989 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vcmpltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39054,39062 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vcmpltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 38991,39010 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));})
  
  #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
--- 39064,39083 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
*************** extern void *__ARM_undef;
*** 39029,39040 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2));})
  
  #define __arm_vbicq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 39102,39113 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));})
  
  #define __arm_vbicq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 39144,39168 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vqdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vqrdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39217,39241 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqrdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 39225,39233 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));})
  
  #define __arm_vdupq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39298,39353 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));})
! 
! 
! #define __arm_vcmpgtq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
!   __typeof(p1) __p1 = (p1); \
!   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));})
! 
! #define __arm_vcmpleq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
!   __typeof(p1) __p1 = (p1); \
!   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));})
! 
! #define __arm_vcmpltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
!   __typeof(p1) __p1 = (p1); \
!   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));})
! 
! #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
!   __typeof(p1) __p1 = (p1); \
!   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpneq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));})
  
  #define __arm_vdupq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 39250,39272 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
  
  #define __arm_vmlasq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
  
  #define __arm_vnegq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39370,39392 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vmlasq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vnegq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 39291,39299 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
  
  #define __arm_vqdmlsdhq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39411,39419 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));})
  
  #define __arm_vqdmlsdhq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 39456,39467 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 39576,39587 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 39561,39572 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 39681,39692 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 39594,39605 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 39714,39725 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 39611,39622 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 39731,39742 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 39631,39642 ****
  
  #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrwq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
--- 39751,39762 ----
  
  #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrwq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
*************** extern void *__ARM_undef;
*** 39645,39788 ****
  
  #define __arm_vld1q(p0) (\
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce1(p0, uint32_t *))))
  
  #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vldrwq_gather_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1));})
  
  #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vldrwq_gather_shifted_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1));})
  
  #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vst1q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)));})
  
  #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  
  #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vstrdq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
--- 39765,39908 ----
  
  #define __arm_vld1q(p0) (\
    _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *))))
  
  #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vldrwq_gather_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vldrwq_gather_shifted_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vst1q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)));})
  
  #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  
  #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vstrdq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
*************** extern void *__ARM_undef;
*** 39797,39854 ****
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 39917,39974 ----
  #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 39953,39967 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
  
  #define __arm_vcaddq_rot270_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
--- 40073,40087 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vcaddq_rot270_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
*************** extern void *__ARM_undef;
*** 40055,40069 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
  
  #define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
--- 40175,40189 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
*************** extern void *__ARM_undef;
*** 40147,40175 ****
    int (*)[__ARM_mve_type_uint32x4_t]: __arm_vbrsrq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
  
  #define __arm_vld1q_z(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce1(p0, int8_t *), p1), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce1(p0, int16_t *), p1), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce1(p0, uint8_t *), p1), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1)))
  
  #define __arm_vld2q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce1(p0, uint32_t *))))
  
  
  #define __arm_vld4q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce1(p0, uint32_t *))))
  
  #define __arm_vgetq_lane(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 40267,40311 ----
    int (*)[__ARM_mve_type_uint32x4_t]: __arm_vbrsrq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
  
  #define __arm_vld1q_z(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), p1), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), p1), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), p1), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1)))
  
  #define __arm_vld2q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *))))
  
  
  #define __arm_vld4q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \
!   int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \
!   int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \
!   int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *))))
! 
! #define __arm_vsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
!   __typeof(p2) __p2 = (p2); \
!   _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vgetq_lane(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 40185,40198 ****
  #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int64x2_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint64x2_t), p2));})
  
  #endif /* MVE Integer.  */
  
--- 40321,40334 ----
  #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int64x2_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint64x2_t), p2));})
  
  #endif /* MVE Integer.  */
  
*************** extern void *__ARM_undef;
*** 40303,40364 ****
  #define __arm_vdwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vdwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vdwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vidupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u8 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u8 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vidupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u16 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u16 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vidupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u32 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u32 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vshrq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
--- 40439,40500 ----
  #define __arm_vdwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vdwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vdwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vidupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u8 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u8 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vidupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u16 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u16 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vidupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u32 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u32 ((uint32_t) __p1, p2, p3), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vshrq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
*************** extern void *__ARM_undef;
*** 40372,40383 ****
  #define __arm_vhaddq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u8( __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u16( __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u32( __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 40508,40519 ----
  #define __arm_vhaddq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u8( __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u16( __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u32( __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 40402,40413 ****
  #define __arm_vhsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 40538,40549 ----
  #define __arm_vhsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 40447,40466 ****
    int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_wb_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
  
  #define __arm_vldrdq_gather_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_s64 (__ARM_mve_coerce1(p0, int64_t *), p1), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1)))
  
  #define __arm_vldrdq_gather_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_z_s64 (__ARM_mve_coerce1(p0, int64_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_z_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1, p2)))
  
  #define __arm_vldrdq_gather_shifted_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_s64 (__ARM_mve_coerce1(p0, int64_t *), p1), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1)))
  
  #define __arm_vldrdq_gather_shifted_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_s64 (__ARM_mve_coerce1(p0, int64_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1, p2)))
  
  #define __arm_vadciq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 40583,40602 ----
    int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_wb_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
  
  #define __arm_vldrdq_gather_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1)))
  
  #define __arm_vldrdq_gather_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_z_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_z_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1, p2)))
  
  #define __arm_vldrdq_gather_shifted_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1)))
  
  #define __arm_vldrdq_gather_shifted_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1, p2), \
!   int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1, p2)))
  
  #define __arm_vadciq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 40516,40551 ****
  
  #define __arm_vldrbq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_s8 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_s16 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_u8 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_u16 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vqrdmlahq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
  
  #define __arm_vqrdmlashq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
  
  #define __arm_vqdmlashq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
  
  #define __arm_vqrshlq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 40652,40687 ----
  
  #define __arm_vldrbq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_s16 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_s32 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_u16 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_u32 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vqrdmlahq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vqrdmlashq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vqdmlashq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vqrshlq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 40646,40657 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 40782,40793 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 40666,40674 ****
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
  
  #define __arm_vqrdmlsdhxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 40802,40810 ----
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vqrdmlsdhxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 40794,40810 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_p_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_p_u16 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vmlaldavaxq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_p_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
  
  #define __arm_vmlsldavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 40930,40946 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vmlaldavaxq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
  
  #define __arm_vmlsldavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 40874,40883 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmvnq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmvnq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmvnq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1(__p1, int) , p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1(__p1, int) , p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1(__p1, int) , p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1(__p1, int) , p2));})
  
  #define __arm_vorrq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 41010,41019 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmvnq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmvnq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmvnq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2));})
  
  #define __arm_vorrq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 40943,40954 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 41079,41090 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 40982,40993 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vhsubq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vhsubq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vhsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
  
  #define __arm_vmaxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 41118,41129 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vhsubq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vhsubq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vhsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vmaxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41015,41037 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
  
  #define __arm_vmlasq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));})
  
  #define __arm_vmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 41151,41173 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vmlasq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41077,41088 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
--- 41213,41224 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
*************** extern void *__ARM_undef;
*** 41094,41110 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
  
  #define __arm_vqdmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
--- 41230,41246 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vqdmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
*************** extern void *__ARM_undef;
*** 41115,41129 ****
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
  
  #define __arm_vqdmulltq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
!   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
  
--- 41251,41265 ----
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));})
  
  #define __arm_vqdmulltq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
!   int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \
    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
    int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
  
*************** extern void *__ARM_undef;
*** 41189,41197 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
  
  #define __arm_vmullbq_poly_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 41325,41333 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
  
  #define __arm_vmullbq_poly_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41202,41213 ****
  
  #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8(__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16(__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32(__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8(__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16(__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32(__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vidupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
--- 41338,41349 ----
  
  #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8(__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16(__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32(__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8(__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16(__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32(__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vidupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41215,41223 ****
   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \
!  int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
--- 41351,41359 ----
   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \
!  int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vddupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41225,41313 ****
   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \
!  int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vidupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u16 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
  
  #define __arm_vidupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u32 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
  
  #define __arm_vidupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u8 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
  
  #define __arm_vddupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u16 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
  
  #define __arm_vddupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u32 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
  
  #define __arm_vddupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u8 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1));})
  
  #define __arm_viwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u16 (__ARM_mve_coerce(__p0, uint32_t), p1, (const int) p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1, (const int) p2));})
  
  #define __arm_viwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u32 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
  
  #define __arm_viwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u8 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vdwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vdwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u16 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vdwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u32 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vdwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u8 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vshlcq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 41361,41449 ----
   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \
   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \
!  int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \
!  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));})
  
  #define __arm_vidupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u16 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_vidupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u32 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_vidupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u8 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_vddupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u16 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_vddupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u32 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_vddupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
    int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u8 ((uint32_t) __p0, p1), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
  
  #define __arm_viwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_viwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u16 (__ARM_mve_coerce_i_scalar(__p0, int), p1, (const int) p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, (const int) p2));})
  
  #define __arm_viwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u32 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));})
  
  #define __arm_viwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u8 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vdwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));})
  
  #define __arm_vdwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u16 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vdwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u32 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vdwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
!   int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u8 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \
!   int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));})
  
  #define __arm_vshlcq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 41343,41356 ****
  #define __arm_vaddlvaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vaddlvaq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vaddlvq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 41479,41492 ----
  #define __arm_vaddlvaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vaddlvaq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vaddlvq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 41365,41386 ****
  #define __arm_vaddvaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vaddvaq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_p_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_p_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vaddvq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
--- 41501,41522 ----
  #define __arm_vaddvaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vaddvaq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_p_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vaddvq(p0) ({ __typeof(p0) __p0 = (p0); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
*************** extern void *__ARM_undef;
*** 41406,41414 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpcsq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpcsq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpcsq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));})
  
  #define __arm_vcmpcsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 41542,41550 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpcsq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpcsq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpcsq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vcmpcsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41416,41424 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpcsq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpcsq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpcsq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2));})
  
  #define __arm_vcmphiq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 41552,41560 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpcsq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpcsq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpcsq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));})
  
  #define __arm_vcmphiq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41426,41441 ****
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmphiq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmphiq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmphiq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));})
  
  #define __arm_vcmphiq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmphiq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmphiq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmphiq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
--- 41562,41577 ----
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmphiq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmphiq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmphiq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));})
  
  #define __arm_vcmphiq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
!   int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \
    int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmphiq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
    int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmphiq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
    int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmphiq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
*************** extern void *__ARM_undef;
*** 41532,41565 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vmladavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vmladavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaxq_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaxq_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaxq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vmladavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 41668,41701 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vmladavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vmladavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaxq_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaxq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaxq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vmladavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41602,41618 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_u16 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vmlaldavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
  
  #define __arm_vmlaldavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
--- 41738,41754 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vmlaldavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
  
  #define __arm_vmlaldavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
*************** extern void *__ARM_undef;
*** 41776,41797 ****
  
  #define __arm_vstrbq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_s16 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_s32 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_u16 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_u32 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrbq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_p_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_p_s16 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_p_s32 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_p_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_p_u16 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_p_u32 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vstrdq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
--- 41912,41933 ----
  
  #define __arm_vstrbq(p0,p1) ({ __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_s16 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_s32 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_u16 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_u32 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
  
  #define __arm_vstrbq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_p_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_p_s16 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_p_s32 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_p_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_p_u16 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_p_u32 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
  
  #define __arm_vstrdq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \
*************** extern void *__ARM_undef;
*** 41807,41867 ****
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vrmlaldavhaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrbq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_s16 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_s32 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_u16 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_u32 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrbq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_p_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_p_s16 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_p_s32 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_p_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_p_u16 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_p_u32 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrdq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_p_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_p_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));})
  
  #define __arm_vstrdq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
  
  #define __arm_vstrdq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));})
  
  #define __arm_vstrdq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
  
  #endif /* __cplusplus  */
  #endif /* __ARM_FEATURE_MVE  */
--- 41943,42003 ----
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vrmlaldavhaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrbq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_s16 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_s32 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_u16 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_u32 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));})
  
  #define __arm_vstrbq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p1) __p1 = (p1); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_p_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_p_s16 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
!   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_p_s32 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_p_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_p_u16 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \
!   int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_p_u32 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));})
  
  #define __arm_vstrdq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_p_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_p_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));})
  
  #define __arm_vstrdq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
  
  #define __arm_vstrdq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));})
  
  #define __arm_vstrdq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
    __typeof(p2) __p2 = (p2); \
    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \
!   int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \
!   int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));})
  
  #endif /* __cplusplus  */
  #endif /* __ARM_FEATURE_MVE  */
diff -Nrcpad gcc-12.3.0/gcc/config/arm/constraints.md gcc-12.4.0/gcc/config/arm/constraints.md
*** gcc-12.3.0/gcc/config/arm/constraints.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/constraints.md	Thu Jun 20 08:08:06 2024
***************
*** 102,111 ****
         (match_test "TARGET_HAVE_MVE && ((ival == 1) || (ival == 2)
  				       || (ival == 4) || (ival == 8))")))
  
- ;; True if the immediate is multiple of 8 and in range of -/+ 1016 for MVE.
- (define_predicate "mve_vldrd_immediate"
-   (match_test "satisfies_constraint_Ri (op)"))
- 
  (define_register_constraint "t" "TARGET_32BIT ? VFP_LO_REGS : NO_REGS"
   "The VFP registers @code{s0}-@code{s31}.")
  
--- 102,107 ----
***************
*** 566,571 ****
--- 562,583 ----
   (match_code "symbol_ref")
  )
  
+ ;; True if the immediate is the range +/- 1016 and multiple of 8 for MVE.
+ (define_constraint "Ri"
+   "@internal In Thumb-2 state a constant is multiple of 8 and in range
+    of -/+ 1016 for MVE"
+   (and (match_code "const_int")
+        (match_test "TARGET_HAVE_MVE && (-1016 <= ival) && (ival <= 1016)
+ 		    && ((ival % 8) == 0)")))
+ 
+ ;; True if the immediate is multiple of 2 and in range of -/+ 252 for MVE.
+ (define_constraint "Rl"
+   "@internal In Thumb-2 state a constant is multiple of 2 and in range
+    of -/+ 252 for MVE"
+   (and (match_code "const_int")
+        (match_test "TARGET_HAVE_MVE && (-252 <= ival) && (ival <= 252)
+ 		    && ((ival % 2) == 0)")))
+ 
  (define_memory_constraint "Uz"
   "@internal
    A memory access that is accessible as an LDC/STC operand"
diff -Nrcpad gcc-12.3.0/gcc/config/arm/mve.md gcc-12.4.0/gcc/config/arm/mve.md
*** gcc-12.3.0/gcc/config/arm/mve.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/mve.md	Thu Jun 20 08:08:06 2024
***************
*** 134,140 ****
  	 VRNDQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vrintzt.f%# %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 134,140 ----
  	 VRNDQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vrintzt.f%#\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 232,238 ****
  	 VREV64Q_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vrev64.%# %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 232,238 ----
  	 VREV64Q_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vrev64.%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 245,251 ****
  	(neg:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vneg.f%#  %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 245,251 ----
  	(neg:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vneg.f%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 259,265 ****
  	 VDUPQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vdup.%#   %q0, %1"
    [(set_attr "type" "mve_move")
  ])
  
--- 259,265 ----
  	 VDUPQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vdup.%#\t%q0, %1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 272,278 ****
  	(abs:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vabs.f%#  %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 272,278 ----
  	(abs:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vabs.f%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 286,292 ****
  	 VREV32Q_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vrev32.16 %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  ;;
--- 286,292 ----
  	 VREV32Q_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vrev32.16\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  ;;
***************
*** 299,305 ****
  	 VCVTTQ_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtt.f32.f16 %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 299,305 ----
  	 VCVTTQ_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtt.f32.f16\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 313,319 ****
  	 VCVTBQ_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtb.f32.f16 %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 313,319 ----
  	 VCVTBQ_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtb.f32.f16\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 327,333 ****
  	 VCVTQ_TO_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvt.f%#.%#       %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 327,333 ----
  	 VCVTQ_TO_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvt.f%#.%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 341,347 ****
  	 VREV64Q))
    ]
    "TARGET_HAVE_MVE"
!   "vrev64.%# %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 341,347 ----
  	 VREV64Q))
    ]
    "TARGET_HAVE_MVE"
!   "vrev64.%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 355,361 ****
  	 VCVTQ_FROM_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvt.%#.f%#       %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  ;; [vqnegq_s])
--- 355,361 ----
  	 VCVTQ_FROM_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvt.%#.f%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  ;; [vqnegq_s])
***************
*** 367,373 ****
  	 VQNEGQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vqneg.s%# %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 367,373 ----
  	 VQNEGQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vqneg.s%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 381,387 ****
  	 VQABSQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vqabs.s%# %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 381,387 ----
  	 VQABSQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vqabs.s%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 394,400 ****
  	(neg:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vneg.s%#  %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 394,400 ----
  	(neg:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vneg.s%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 428,434 ****
  	 VDUPQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vdup.%#   %q0, %1"
    [(set_attr "type" "mve_move")
  ])
  
--- 428,434 ----
  	 VDUPQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vdup.%#\t%q0, %1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 441,447 ****
  	(clz:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vclz.i%#  %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  (define_expand "mve_vclzq_u"
--- 441,447 ----
  	(clz:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vclz.i%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  (define_expand "mve_vclzq_u"
***************
*** 462,468 ****
  	 VCLSQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vcls.s%#  %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 462,468 ----
  	 VCLSQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vcls.s%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 517,523 ****
  	 VMOVLTQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmovlt.%#   %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 517,523 ----
  	 VMOVLTQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmovlt.%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 531,537 ****
  	 VMOVLBQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmovlb.%#   %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 531,537 ----
  	 VMOVLBQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmovlb.%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 545,551 ****
  	 VCVTPQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtp.%#.f%#      %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 545,551 ----
  	 VCVTPQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtp.%#.f%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 559,565 ****
  	 VCVTNQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtn.%#.f%#      %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 559,565 ----
  	 VCVTNQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtn.%#.f%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 573,579 ****
  	 VCVTMQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtm.%#.f%#      %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 573,579 ----
  	 VCVTMQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtm.%#.f%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 587,593 ****
  	 VCVTAQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvta.%#.f%#      %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 587,593 ----
  	 VCVTAQ))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvta.%#.f%#\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 601,607 ****
  	 VMVNQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vmvn.i%#  %q0, %1"
    [(set_attr "type" "mve_move")
  ])
  
--- 601,607 ----
  	 VMVNQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vmvn.i%#\t%q0, %1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 615,621 ****
  	 VREV16Q))
    ]
    "TARGET_HAVE_MVE"
!   "vrev16.8 %q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 615,621 ----
  	 VREV16Q))
    ]
    "TARGET_HAVE_MVE"
!   "vrev16.8\t%q0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 629,635 ****
  	 VADDLVQ))
    ]
    "TARGET_HAVE_MVE"
!   "vaddlv.32 %Q0, %R0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
--- 629,635 ----
  	 VADDLVQ))
    ]
    "TARGET_HAVE_MVE"
!   "vaddlv.32\t%Q0, %R0, %q1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 643,649 ****
  	VCTPQ))
    ]
    "TARGET_HAVE_MVE"
!   "vctp. %1"
    [(set_attr "type" "mve_move")
  ])
  
--- 643,649 ----
  	VCTPQ))
    ]
    "TARGET_HAVE_MVE"
!   "vctp.\t%1"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 672,678 ****
  	 VSUBQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vsub.f  %q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
--- 672,678 ----
  	 VSUBQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vsub.f\t%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 687,693 ****
  	 VBRSRQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vbrsr.  %q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
--- 687,693 ----
  	 VBRSRQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vbrsr.\t%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 716,722 ****
  	 VCREATEQ_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vmov %q0[2], %q0[0], %Q2, %Q1\;vmov %q0[3], %q0[1], %R2, %R1"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 716,722 ----
  	 VCREATEQ_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vmov %q0[2], %q0[0], %Q1, %Q2\;vmov %q0[3], %q0[1], %R1, %R2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 731,737 ****
  	 VCREATEQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmov %q0[2], %q0[0], %Q2, %Q1\;vmov %q0[3], %q0[1], %R2, %R1"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 731,737 ----
  	 VCREATEQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmov %q0[2], %q0[0], %Q1, %Q2\;vmov %q0[3], %q0[1], %R1, %R2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 810,816 ****
  	 VADDLVQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vaddlvt.32 %Q0, %R0, %q1"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 810,816 ----
  	 VADDLVQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vaddlvt.32\t%Q0, %R0, %q1"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 824,830 ****
  		    (match_operand:MVE_2 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vcmp.%#  , %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 824,830 ----
  		    (match_operand:MVE_2 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vcmp.%#\t, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 873,879 ****
  	 VADDQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vadd.i%#	%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
--- 873,879 ----
  	 VADDQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vadd.i%#\t%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 888,894 ****
  	 VADDVAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vaddva.%#	%0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 888,894 ----
  	 VADDVAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vaddva.%#\t%0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 969,975 ****
  	 VBRSRQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vbrsr.%#	%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
--- 969,975 ----
  	 VBRSRQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vbrsr.%#\t%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 1828,1834 ****
  	 VADDLVAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vaddlva.32 %Q0, %R0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 1828,1834 ----
  	 VADDLVAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vaddlva.32\t%Q0, %R0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 1843,1849 ****
  	 VADDQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vadd.f%#	%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
--- 1843,1849 ----
  	 VADDQ_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vadd.f%#\t%q0, %q1, %2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 1857,1863 ****
  		   (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vand %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 1857,1863 ----
  		   (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vand\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 1871,1877 ****
  			      (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vbic %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 1871,1877 ----
  			      (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vbic\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 1886,1892 ****
  	 VBICQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vbic.i%#	%q0, %2"
    [(set_attr "type" "mve_move")
  ])
  
--- 1886,1892 ----
  	 VBICQ_N))
    ]
    "TARGET_HAVE_MVE"
!   "vbic.i%#\t%q0, %2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 1960,1966 ****
  	 VCTPQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vctpt. %1"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 1960,1966 ----
  	 VCTPQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vctpt.\t%1"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 1975,1981 ****
  	 VCVTBQ_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtb.f16.f32 %q0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 1975,1981 ----
  	 VCVTBQ_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtb.f16.f32\t%q0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 1990,1996 ****
  	 VCVTTQ_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtt.f16.f32 %q0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 1990,1996 ----
  	 VCVTTQ_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vcvtt.f16.f32\t%q0, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2004,2010 ****
  		   (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "veor %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2004,2010 ----
  		   (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "veor\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2152,2158 ****
  	 VMLALDAVXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlaldavx.s%# %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2152,2158 ----
  	 VMLALDAVXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlaldavx.s%#\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2167,2173 ****
  	 VMLSLDAVQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldav.s%# %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2167,2173 ----
  	 VMLSLDAVQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldav.s%#\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2182,2188 ****
  	 VMLSLDAVXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldavx.s%# %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2182,2188 ----
  	 VMLSLDAVXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldavx.s%#\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2255,2261 ****
  		   (match_operand:MVE_0 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vorn %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2255,2261 ----
  		   (match_operand:MVE_0 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vorn\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2269,2275 ****
  		   (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vorr %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2269,2275 ----
  		   (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vorr\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2419,2425 ****
  	 VRMLALDAVHXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavhx.s32 %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2419,2425 ----
  	 VRMLALDAVHXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavhx.s32\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2538,2544 ****
  	 VRMLALDAVHQ))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavh.32 %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 2538,2544 ----
  	 VRMLALDAVHQ))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavh.32\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2554,2560 ****
  	 VBICQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vbict.i%#	%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
--- 2554,2560 ----
  	 VBICQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vbict.i%#\t%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
***************
*** 2599,2605 ****
  	 VCVTQ_M_TO_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvtt.f%#.%#	 %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
--- 2599,2605 ----
  	 VCVTQ_M_TO_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvtt.f%#.%#\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
***************
*** 2644,2650 ****
  	 VRMLALDAVHAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavha.32 %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 2644,2650 ----
  	 VRMLALDAVHAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavha.32\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 2707,2713 ****
  		   (match_dup 4)]
  	VSHLCQ))]
   "TARGET_HAVE_MVE"
!  "vshlc %q0, %1, %4")
  
  ;;
  ;; [vabsq_m_s])
--- 2707,2713 ----
  		   (match_dup 4)]
  	VSHLCQ))]
   "TARGET_HAVE_MVE"
!  "vshlc\t%q0, %1, %4")
  
  ;;
  ;; [vabsq_m_s])
***************
*** 3041,3047 ****
  	 VDUPQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vdupt.%#	%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 3041,3047 ----
  	 VDUPQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vdupt.%#\t%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 3265,3271 ****
  	 VMVNQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmvnt %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 3265,3271 ----
  	 VMVNQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmvnt\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 3297,3303 ****
  	 VPSELQ))
    ]
    "TARGET_HAVE_MVE"
!   "vpsel %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 3297,3303 ----
  	 VPSELQ))
    ]
    "TARGET_HAVE_MVE"
!   "vpsel\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 3498,3504 ****
  ;;
  (define_insn "mve_vrev64q_m_"
    [
!    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
  	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
  		       (match_operand:MVE_2 2 "s_register_operand" "w")
  		       (match_operand: 3 "vpr_register_operand" "Up")]
--- 3498,3504 ----
  ;;
  (define_insn "mve_vrev64q_m_"
    [
!    (set (match_operand:MVE_2 0 "s_register_operand" "=&w")
  	(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
  		       (match_operand:MVE_2 2 "s_register_operand" "w")
  		       (match_operand: 3 "vpr_register_operand" "Up")]
***************
*** 3712,3718 ****
  	 VADDLVAQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vaddlvat.32 %Q0, %R0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
--- 3712,3718 ----
  	 VADDLVAQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vaddlvat.32\t%Q0, %R0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
***************
*** 3922,3928 ****
  	 VCVTBQ_M_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvtbt.f16.f32 %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 3922,3928 ----
  	 VCVTBQ_M_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvtbt.f16.f32\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 3938,3944 ****
  	 VCVTBQ_M_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvtbt.f32.f16 %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 3938,3944 ----
  	 VCVTBQ_M_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvtbt.f32.f16\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 3954,3960 ****
  	 VCVTTQ_M_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvttt.f16.f32 %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 3954,3960 ----
  	 VCVTTQ_M_F16_F32))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvttt.f16.f32\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 3970,3976 ****
  	 VCVTTQ_M_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvttt.f32.f16 %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 3970,3976 ----
  	 VCVTTQ_M_F32_F16))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vcvttt.f32.f16\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 3986,3992 ****
  	 VDUPQ_M_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vdupt.%#	%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 3986,3992 ----
  	 VDUPQ_M_N_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vdupt.%#\t%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4158,4164 ****
  	 VMLALDAVAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmlaldava.%# %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 4158,4164 ----
  	 VMLALDAVAQ))
    ]
    "TARGET_HAVE_MVE"
!   "vmlaldava.%#\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4174,4180 ****
  	 VMLALDAVAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlaldavax.s%# %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 4174,4180 ----
  	 VMLALDAVAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlaldavax.s%#\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4190,4196 ****
  	 VMLALDAVQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlaldavt.%# %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4190,4196 ----
  	 VMLALDAVQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlaldavt.%#\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4221,4227 ****
  	 VMLSLDAVAQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldava.s%# %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 4221,4227 ----
  	 VMLSLDAVAQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldava.s%#\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4237,4243 ****
  	 VMLSLDAVAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldavax.s%# %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 4237,4243 ----
  	 VMLSLDAVAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vmlsldavax.s%#\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4253,4259 ****
  	 VMLSLDAVQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlsldavt.s%# %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4253,4259 ----
  	 VMLSLDAVQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlsldavt.s%#\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4269,4275 ****
  	 VMLSLDAVXQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlsldavxt.s%# %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
--- 4269,4275 ----
  	 VMLSLDAVXQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlsldavxt.s%#\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
***************
*** 4346,4352 ****
  	 VMVNQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmvnt.i%#	%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
--- 4346,4352 ----
  	 VMVNQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmvnt.i%#\t%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
***************
*** 4377,4383 ****
  	 VORRQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vorrt.i%#	%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
--- 4377,4383 ----
  	 VORRQ_M_N))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vorrt.i%#\t%q0, %2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  ;;
***************
*** 4392,4398 ****
  	 VPSELQ_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpsel %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 4392,4398 ----
  	 VPSELQ_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpsel\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4568,4574 ****
  	 VREV32Q_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vrev32t.16 %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4568,4574 ----
  	 VREV32Q_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vrev32t.16\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4584,4590 ****
  	 VREV32Q_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrev32t.%#	%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4584,4590 ----
  	 VREV32Q_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrev32t.%#\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4593,4606 ****
  ;;
  (define_insn "mve_vrev64q_m_f"
    [
!    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
  	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
  		       (match_operand:MVE_0 2 "s_register_operand" "w")
  		       (match_operand: 3 "vpr_register_operand" "Up")]
  	 VREV64Q_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vrev64t.%#	%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4593,4606 ----
  ;;
  (define_insn "mve_vrev64q_m_f"
    [
!    (set (match_operand:MVE_0 0 "s_register_operand" "=&w")
  	(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
  		       (match_operand:MVE_0 2 "s_register_operand" "w")
  		       (match_operand: 3 "vpr_register_operand" "Up")]
  	 VREV64Q_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vrev64t.%#\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4616,4622 ****
  	 VRMLALDAVHAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavhax.s32 %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 4616,4622 ----
  	 VRMLALDAVHAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlaldavhax.s32\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4632,4638 ****
  	 VRMLALDAVHXQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlaldavhxt.s32 %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4632,4638 ----
  	 VRMLALDAVHXQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlaldavhxt.s32\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4648,4654 ****
  	 VRMLSLDAVHAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlsldavhax.s32 %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 4648,4654 ----
  	 VRMLSLDAVHAXQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlsldavhax.s32\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4664,4670 ****
  	 VRMLSLDAVHQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlsldavht.s32 %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4664,4670 ----
  	 VRMLSLDAVHQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlsldavht.s32\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4680,4686 ****
  	 VRMLSLDAVHXQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlsldavhxt.s32 %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4680,4686 ----
  	 VRMLSLDAVHXQ_P_S))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlsldavhxt.s32\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4905,4911 ****
  	 VREV16Q_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrev16t.8 %q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4905,4911 ----
  	 VREV16Q_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrev16t.8\t%q0, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4937,4943 ****
  	 VRMLALDAVHQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlaldavht.32 %Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 4937,4943 ----
  	 VRMLALDAVHQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vrmlaldavht.32\t%Q0, %R0, %q1, %q2"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 4953,4959 ****
  	 VRMLSLDAVHAQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlsldavha.s32 %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
--- 4953,4959 ----
  	 VRMLSLDAVHAQ_S))
    ]
    "TARGET_HAVE_MVE"
!   "vrmlsldavha.s32\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 4972,4978 ****
    "TARGET_HAVE_MVE"
    "vpst\;vabavt.%#\t%0, %q2, %q3"
    [(set_attr "type" "mve_move")
! ])
  
  ;;
  ;; [vqshluq_m_n_s])
--- 4972,4978 ----
    "TARGET_HAVE_MVE"
    "vpst\;vabavt.%#\t%0, %q2, %q3"
    [(set_attr "type" "mve_move")
!    (set_attr "length" "8")])
  
  ;;
  ;; [vqshluq_m_n_s])
***************
*** 4988,4994 ****
    ]
    "TARGET_HAVE_MVE"
    "vpst\n\tvqshlut.s%#\t%q0, %q2, %3"
!   [(set_attr "type" "mve_move")])
  
  ;;
  ;; [vshlq_m_s, vshlq_m_u])
--- 4988,4995 ----
    ]
    "TARGET_HAVE_MVE"
    "vpst\n\tvqshlut.s%#\t%q0, %q2, %3"
!   [(set_attr "type" "mve_move")
!    (set_attr "length" "8")])
  
  ;;
  ;; [vshlq_m_s, vshlq_m_u])
***************
*** 5004,5010 ****
    ]
    "TARGET_HAVE_MVE"
    "vpst\;vshlt.%#\t%q0, %q2, %q3"
!   [(set_attr "type" "mve_move")])
  
  ;;
  ;; [vsriq_m_n_s, vsriq_m_n_u])
--- 5005,5012 ----
    ]
    "TARGET_HAVE_MVE"
    "vpst\;vshlt.%#\t%q0, %q2, %q3"
!   [(set_attr "type" "mve_move")
!    (set_attr "length" "8")])
  
  ;;
  ;; [vsriq_m_n_s, vsriq_m_n_u])
***************
*** 5020,5026 ****
    ]
    "TARGET_HAVE_MVE"
    "vpst\;vsrit.%#\t%q0, %q2, %3"
!   [(set_attr "type" "mve_move")])
  
  ;;
  ;; [vsubq_m_u, vsubq_m_s])
--- 5022,5029 ----
    ]
    "TARGET_HAVE_MVE"
    "vpst\;vsrit.%#\t%q0, %q2, %3"
!   [(set_attr "type" "mve_move")
!    (set_attr "length" "8")])
  
  ;;
  ;; [vsubq_m_u, vsubq_m_s])
***************
*** 5036,5042 ****
    ]
    "TARGET_HAVE_MVE"
    "vpst\;vsubt.i%#\t%q0, %q2, %q3"
!   [(set_attr "type" "mve_move")])
  
  ;;
  ;; [vcvtq_m_n_to_f_u, vcvtq_m_n_to_f_s])
--- 5039,5046 ----
    ]
    "TARGET_HAVE_MVE"
    "vpst\;vsubt.i%#\t%q0, %q2, %q3"
!   [(set_attr "type" "mve_move")
!    (set_attr "length" "8")])
  
  ;;
  ;; [vcvtq_m_n_to_f_u, vcvtq_m_n_to_f_s])
***************
*** 5118,5124 ****
  	 VANDQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vandt %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 5122,5128 ----
  	 VANDQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vandt\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 5135,5141 ****
  	 VBICQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vbict %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 5139,5145 ----
  	 VBICQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vbict\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 5203,5209 ****
  	 VEORQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;veort %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 5207,5213 ----
  	 VEORQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;veort\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 5458,5464 ****
  	 VORNQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vornt %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 5462,5468 ----
  	 VORNQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vornt\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 5475,5481 ****
  	 VORRQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vorrt %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 5479,5485 ----
  	 VORRQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vorrt\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 6121,6127 ****
  	 VMLALDAVAXQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlaldavaxt.%# %Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 6125,6131 ----
  	 VMLALDAVAXQ_P))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vmlaldavaxt.%#\t%Q0, %R0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 6647,6653 ****
  	 VANDQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vandt %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 6651,6657 ----
  	 VANDQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vandt\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 6664,6670 ****
  	 VBICQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vbict %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 6668,6674 ----
  	 VBICQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vbict\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 6868,6874 ****
  	 VEORQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;veort %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 6872,6878 ----
  	 VEORQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;veort\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 7021,7027 ****
  	 VORNQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vornt %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 7025,7031 ----
  	 VORNQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vornt\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 7038,7044 ****
  	 VORRQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vorrt %q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 7042,7048 ----
  	 VORRQ_M_F))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vpst\;vorrt\t%q0, %q2, %q3"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 7265,7279 ****
  }
    [(set_attr "length" "8")])
  
- ;;
- ;; [vstrbq_p_s vstrbq_p_u]
- ;;
  (define_insn "mve_vstrbq_p_"
    [(set (match_operand: 0 "mve_memory_operand" "=Ux")
! 	(unspec: [(match_operand:MVE_2 1 "s_register_operand" "w")
! 			      (match_operand: 2 "vpr_register_operand" "Up")]
! 	 VSTRBQ))
!   ]
    "TARGET_HAVE_MVE"
  {
     rtx ops[2];
--- 7269,7281 ----
  }
    [(set_attr "length" "8")])
  
  (define_insn "mve_vstrbq_p_"
    [(set (match_operand: 0 "mve_memory_operand" "=Ux")
! 	(unspec:
! 	 [(match_operand:MVE_2 1 "s_register_operand" "w")
! 	  (match_operand: 2 "vpr_register_operand" "Up")
! 	  (match_dup 0)]
! 	 VSTRBQ))]
    "TARGET_HAVE_MVE"
  {
     rtx ops[2];
***************
*** 8072,8081 ****
  ;;
  (define_insn "mve_vstrhq_p_fv8hf"
    [(set (match_operand:V8HI 0 "mve_memory_operand" "=Ux")
! 	(unspec:V8HI [(match_operand:V8HF 1 "s_register_operand" "w")
! 		      (match_operand:V8BI 2 "vpr_register_operand" "Up")]
! 	 VSTRHQ_F))
!   ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
  {
     rtx ops[2];
--- 8074,8084 ----
  ;;
  (define_insn "mve_vstrhq_p_fv8hf"
    [(set (match_operand:V8HI 0 "mve_memory_operand" "=Ux")
! 	(unspec:V8HI
! 	 [(match_operand:V8HF 1 "s_register_operand" "w")
! 	  (match_operand:V8BI 2 "vpr_register_operand" "Up")
! 	  (match_dup 0)]
! 	 VSTRHQ_F))]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
  {
     rtx ops[2];
***************
*** 8092,8099 ****
  ;;
  (define_insn "mve_vstrhq_p_"
    [(set (match_operand: 0 "mve_memory_operand" "=Ux")
! 	(unspec: [(match_operand:MVE_6 1 "s_register_operand" "w")
! 			      (match_operand: 2 "vpr_register_operand" "Up")]
  	 VSTRHQ))
    ]
    "TARGET_HAVE_MVE"
--- 8095,8104 ----
  ;;
  (define_insn "mve_vstrhq_p_"
    [(set (match_operand: 0 "mve_memory_operand" "=Ux")
! 	(unspec:
! 	 [(match_operand:MVE_6 1 "s_register_operand" "w")
! 	  (match_operand: 2 "vpr_register_operand" "Up")
! 	  (match_dup 0)]
  	 VSTRHQ))
    ]
    "TARGET_HAVE_MVE"
***************
*** 8271,8280 ****
  ;;
  (define_insn "mve_vstrwq_p_fv4sf"
    [(set (match_operand:V4SI 0 "mve_memory_operand" "=Ux")
! 	(unspec:V4SI [(match_operand:V4SF 1 "s_register_operand" "w")
! 		      (match_operand: 2 "vpr_register_operand" "Up")]
! 	 VSTRWQ_F))
!   ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
  {
     rtx ops[2];
--- 8276,8286 ----
  ;;
  (define_insn "mve_vstrwq_p_fv4sf"
    [(set (match_operand:V4SI 0 "mve_memory_operand" "=Ux")
! 	(unspec:V4SI
! 	 [(match_operand:V4SF 1 "s_register_operand" "w")
! 	  (match_operand: 2 "vpr_register_operand" "Up")
! 	  (match_dup 0)]
! 	 VSTRWQ_F))]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
  {
     rtx ops[2];
***************
*** 8291,8300 ****
  ;;
  (define_insn "mve_vstrwq_p_v4si"
    [(set (match_operand:V4SI 0 "mve_memory_operand" "=Ux")
! 	(unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "w")
! 		      (match_operand:V4BI 2 "vpr_register_operand" "Up")]
! 	 VSTRWQ))
!   ]
    "TARGET_HAVE_MVE"
  {
     rtx ops[2];
--- 8297,8307 ----
  ;;
  (define_insn "mve_vstrwq_p_v4si"
    [(set (match_operand:V4SI 0 "mve_memory_operand" "=Ux")
! 	(unspec:V4SI
! 	 [(match_operand:V4SI 1 "s_register_operand" "w")
! 	  (match_operand:V4BI 2 "vpr_register_operand" "Up")
! 	  (match_dup 0)]
! 	 VSTRWQ))]
    "TARGET_HAVE_MVE"
  {
     rtx ops[2];
***************
*** 8478,8484 ****
  	   (match_operand:HI 3 "vpr_register_operand" "Up")]
  	  VSTRDSSOQ))]
    "TARGET_HAVE_MVE"
!   "vpst\;vstrdt.64\t%q2, [%0, %q1, UXTW #3]"
    [(set_attr "length" "8")])
  
  ;;
--- 8485,8491 ----
  	   (match_operand:HI 3 "vpr_register_operand" "Up")]
  	  VSTRDSSOQ))]
    "TARGET_HAVE_MVE"
!   "vpst\;vstrdt.64\t%q2, [%0, %q1, uxtw #3]"
    [(set_attr "length" "8")])
  
  ;;
***************
*** 8507,8513 ****
  	   (match_operand:V2DI 2 "s_register_operand" "w")]
  	  VSTRDSSOQ))]
    "TARGET_HAVE_MVE"
!   "vstrd.64\t%q2, [%0, %q1, UXTW #3]"
    [(set_attr "length" "4")])
  
  ;;
--- 8514,8520 ----
  	   (match_operand:V2DI 2 "s_register_operand" "w")]
  	  VSTRDSSOQ))]
    "TARGET_HAVE_MVE"
!   "vstrd.64\t%q2, [%0, %q1, uxtw #3]"
    [(set_attr "length" "4")])
  
  ;;
***************
*** 8923,8929 ****
  		    (match_operand:MVE_2 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vadd.i%#  %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 8930,8936 ----
  		    (match_operand:MVE_2 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE"
!   "vadd.i%#\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 8937,8943 ****
  		    (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vadd.f%# %q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
--- 8944,8950 ----
  		    (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
!   "vadd.f%#\t%q0, %q1, %q2"
    [(set_attr "type" "mve_move")
  ])
  
***************
*** 9038,9044 ****
         (minus:SI (match_dup 2)
  		 (match_operand:SI 4 "immediate_operand" "i")))]
   "TARGET_HAVE_MVE"
!  "vddup.u%#  %q0, %1, %3")
  
  ;;
  ;; [vddupq_m_n_u])
--- 9045,9051 ----
         (minus:SI (match_dup 2)
  		 (match_operand:SI 4 "immediate_operand" "i")))]
   "TARGET_HAVE_MVE"
!  "vddup.u%#\t%q0, %1, %3")
  
  ;;
  ;; [vddupq_m_n_u])
***************
*** 9074,9080 ****
         (minus:SI (match_dup 3)
  		 (match_operand:SI 6 "immediate_operand" "i")))]
   "TARGET_HAVE_MVE"
!  "vpst\;\tvddupt.u%#\t%q0, %2, %4"
   [(set_attr "length""8")])
  
  ;;
--- 9081,9087 ----
         (minus:SI (match_dup 3)
  		 (match_operand:SI 6 "immediate_operand" "i")))]
   "TARGET_HAVE_MVE"
!  "vpst\;vddupt.u%#\t%q0, %2, %4"
   [(set_attr "length""8")])
  
  ;;
***************
*** 9190,9196 ****
  	 VDWDUPQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;\tvdwdupt.u%#\t%q2, %3, %R4, %5"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
--- 9197,9203 ----
  	 VDWDUPQ_M))
    ]
    "TARGET_HAVE_MVE"
!   "vpst\;vdwdupt.u%#\t%q2, %3, %R4, %5"
    [(set_attr "type" "mve_move")
     (set_attr "length""8")])
  
***************
*** 9345,9351 ****
  		[(match_operand:V4SI 1 "s_register_operand" "0")
  		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
  		 (match_operand:V4SI 3 "s_register_operand" "w")
! 		 (match_operand:V4BI 4 "vpr_register_operand")]
  	VSTRWSBWBQ))
     (set (match_operand:V4SI 0 "s_register_operand" "=w")
  	(unspec:V4SI [(match_dup 1) (match_dup 2)]
--- 9352,9358 ----
  		[(match_operand:V4SI 1 "s_register_operand" "0")
  		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
  		 (match_operand:V4SI 3 "s_register_operand" "w")
! 		 (match_operand:V4BI 4 "vpr_register_operand" "Up")]
  	VSTRWSBWBQ))
     (set (match_operand:V4SI 0 "s_register_operand" "=w")
  	(unspec:V4SI [(match_dup 1) (match_dup 2)]
***************
*** 9394,9402 ****
   [(set (mem:BLK (scratch))
         (unspec:BLK
  		[(match_operand:V4SI 1 "s_register_operand" "0")
! 		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
  		 (match_operand:V4SF 3 "s_register_operand" "w")
! 		 (match_operand:V4BI 4 "vpr_register_operand")]
  	VSTRWQSBWB_F))
     (set (match_operand:V4SI 0 "s_register_operand" "=w")
  	(unspec:V4SI [(match_dup 1) (match_dup 2)]
--- 9401,9409 ----
   [(set (mem:BLK (scratch))
         (unspec:BLK
  		[(match_operand:V4SI 1 "s_register_operand" "0")
! 		 (match_operand:SI 2 "mve_vstrw_immediate" "Rl")
  		 (match_operand:V4SF 3 "s_register_operand" "w")
! 		 (match_operand:V4BI 4 "vpr_register_operand" "Up")]
  	VSTRWQSBWB_F))
     (set (match_operand:V4SI 0 "s_register_operand" "=w")
  	(unspec:V4SI [(match_dup 1) (match_dup 2)]
***************
*** 9408,9414 ****
     ops[0] = operands[1];
     ops[1] = operands[2];
     ops[2] = operands[3];
!    output_asm_insn ("vpst\;\tvstrwt.u32\t%q2, [%q0, %1]!",ops);
     return "";
  }
    [(set_attr "length" "8")])
--- 9415,9421 ----
     ops[0] = operands[1];
     ops[1] = operands[2];
     ops[2] = operands[3];
!    output_asm_insn ("vpst\;vstrwt.u32\t%q2, [%q0, %1]!",ops);
     return "";
  }
    [(set_attr "length" "8")])
***************
*** 9447,9453 ****
  		[(match_operand:V2DI 1 "s_register_operand" "0")
  		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
  		 (match_operand:V2DI 3 "s_register_operand" "w")
! 		 (match_operand:HI 4 "vpr_register_operand")]
  	 VSTRDSBWBQ))
     (set (match_operand:V2DI 0 "s_register_operand" "=w")
  	(unspec:V2DI [(match_dup 1) (match_dup 2)]
--- 9454,9460 ----
  		[(match_operand:V2DI 1 "s_register_operand" "0")
  		 (match_operand:SI 2 "mve_vldrd_immediate" "Ri")
  		 (match_operand:V2DI 3 "s_register_operand" "w")
! 		 (match_operand:HI 4 "vpr_register_operand" "Up")]
  	 VSTRDSBWBQ))
     (set (match_operand:V2DI 0 "s_register_operand" "=w")
  	(unspec:V2DI [(match_dup 1) (match_dup 2)]
***************
*** 9459,9465 ****
     ops[0] = operands[1];
     ops[1] = operands[2];
     ops[2] = operands[3];
!    output_asm_insn ("vpst;vstrdt.u64\t%q2, [%q0, %1]!",ops);
     return "";
  }
    [(set_attr "length" "8")])
--- 9466,9472 ----
     ops[0] = operands[1];
     ops[1] = operands[2];
     ops[2] = operands[3];
!    output_asm_insn ("vpst\;vstrdt.u64\t%q2, [%q0, %1]!",ops);
     return "";
  }
    [(set_attr "length" "8")])
***************
*** 9768,9774 ****
  
  (define_insn "get_fpscr_nzcvqc"
   [(set (match_operand:SI 0 "register_operand" "=r")
!    (unspec:SI [(reg:SI VFPCC_REGNUM)] UNSPEC_GET_FPSCR_NZCVQC))]
   "TARGET_HAVE_MVE"
   "vmrs\\t%0, FPSCR_nzcvqc"
    [(set_attr "type" "mve_move")])
--- 9775,9781 ----
  
  (define_insn "get_fpscr_nzcvqc"
   [(set (match_operand:SI 0 "register_operand" "=r")
!    (unspec_volatile:SI [(reg:SI VFPCC_REGNUM)] UNSPEC_GET_FPSCR_NZCVQC))]
   "TARGET_HAVE_MVE"
   "vmrs\\t%0, FPSCR_nzcvqc"
    [(set_attr "type" "mve_move")])
diff -Nrcpad gcc-12.3.0/gcc/config/arm/neon.md gcc-12.4.0/gcc/config/arm/neon.md
*** gcc-12.3.0/gcc/config/arm/neon.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/neon.md	Thu Jun 20 08:08:06 2024
***************
*** 504,514 ****
     Enabled with -funsafe-math-optimizations -freciprocal-math
     and disabled for -Os since it increases code size .  */
  
! (define_expand "div3"
    [(set (match_operand:VCVTF 0 "s_register_operand")
          (div:VCVTF (match_operand:VCVTF 1 "s_register_operand")
  		  (match_operand:VCVTF 2 "s_register_operand")))]
!   "TARGET_NEON && !optimize_size
     && flag_reciprocal_math"
    {
      rtx rec = gen_reg_rtx (mode);
--- 504,514 ----
     Enabled with -funsafe-math-optimizations -freciprocal-math
     and disabled for -Os since it increases code size .  */
  
! (define_expand "div3"
    [(set (match_operand:VCVTF 0 "s_register_operand")
          (div:VCVTF (match_operand:VCVTF 1 "s_register_operand")
  		  (match_operand:VCVTF 2 "s_register_operand")))]
!   "ARM_HAVE_NEON__ARITH && !optimize_size
     && flag_reciprocal_math"
    {
      rtx rec = gen_reg_rtx (mode);
diff -Nrcpad gcc-12.3.0/gcc/config/arm/predicates.md gcc-12.4.0/gcc/config/arm/predicates.md
*** gcc-12.3.0/gcc/config/arm/predicates.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/predicates.md	Thu Jun 20 08:08:06 2024
***************
*** 73,85 ****
  (define_predicate "mve_imm_selective_upto_8"
    (match_test "satisfies_constraint_Rg (op)"))
  
! ;; True if the immediate is the range +/- 1016 and multiple of 8 for MVE.
! (define_constraint "Ri"
!   "@internal In Thumb-2 state a constant is multiple of 8 and in range
!    of -/+ 1016 for MVE"
!   (and (match_code "const_int")
!        (match_test "TARGET_HAVE_MVE && (-1016 <= ival) && (ival <= 1016)
! 		    && ((ival % 8) == 0)")))
  
  ; Predicate for stack protector guard's address in
  ; stack_protect_combined_set_insn and stack_protect_combined_test_insn patterns
--- 73,85 ----
  (define_predicate "mve_imm_selective_upto_8"
    (match_test "satisfies_constraint_Rg (op)"))
  
! ;; True if the immediate is multiple of 8 and in range of -/+ 1016 for MVE.
! (define_predicate "mve_vldrd_immediate"
!   (match_test "satisfies_constraint_Ri (op)"))
! 
! ;; True if the immediate is multiple of 2 and in range of -/+ 252 for MVE.
! (define_predicate "mve_vstrw_immediate"
!   (match_test "satisfies_constraint_Rl (op)"))
  
  ; Predicate for stack protector guard's address in
  ; stack_protect_combined_set_insn and stack_protect_combined_test_insn patterns
diff -Nrcpad gcc-12.3.0/gcc/config/arm/vfp.md gcc-12.4.0/gcc/config/arm/vfp.md
*** gcc-12.3.0/gcc/config/arm/vfp.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/arm/vfp.md	Thu Jun 20 08:08:06 2024
***************
*** 105,113 ****
      case 8:
        return "vmov%?.f32\t%0, %1\t%@ int";
      case 9:
!       return "vmsr%?\t P0, %1\t@ movhi";
      case 10:
!       return "vmrs%?\t %0, P0\t@ movhi";
      default:
        gcc_unreachable ();
      }
--- 105,113 ----
      case 8:
        return "vmov%?.f32\t%0, %1\t%@ int";
      case 9:
!       return "vmsr%?\tp0, %1\t@ movhi";
      case 10:
!       return "vmrs%?\t%0, p0\t@ movhi";
      default:
        gcc_unreachable ();
      }
***************
*** 209,217 ****
      case 8:
        return "vmov%?.f32\t%0, %1\t%@ int";
      case 9:
!       return "vmsr%?\t P0, %1\t%@ movhi";
      case 10:
!       return "vmrs%?\t%0, P0\t%@ movhi";
      default:
        gcc_unreachable ();
      }
--- 209,217 ----
      case 8:
        return "vmov%?.f32\t%0, %1\t%@ int";
      case 9:
!       return "vmsr%?\tp0, %1\t%@ movhi";
      case 10:
!       return "vmrs%?\t%0, p0\t%@ movhi";
      default:
        gcc_unreachable ();
      }
***************
*** 312,320 ****
      case 12: case 13:
        return output_move_vfp (operands);
      case 14:
!       return \"vmsr\\t P0, %1\";
      case 15:
!       return \"vmrs\\t %0, P0\";
      case 16:
        return \"mcr\\tp10, 7, %1, cr1, cr0, 0\\t @SET_FPSCR\";
      case 17:
--- 312,320 ----
      case 12: case 13:
        return output_move_vfp (operands);
      case 14:
!       return \"vmsr\\tp0, %1\";
      case 15:
!       return \"vmrs\\t%0, p0\";
      case 16:
        return \"mcr\\tp10, 7, %1, cr1, cr0, 0\\t @SET_FPSCR\";
      case 17:
***************
*** 2138,2144 ****
  (define_insn_and_split "no_literal_pool_df_immediate"
    [(set (match_operand:DF 0 "s_register_operand" "=w")
  	(match_operand:DF 1 "const_double_operand" "F"))
!    (clobber (match_operand:DF 2 "s_register_operand" "=r"))]
    "arm_disable_literal_pool
     && TARGET_VFP_BASE
     && !arm_const_double_rtx (operands[1])
--- 2138,2144 ----
  (define_insn_and_split "no_literal_pool_df_immediate"
    [(set (match_operand:DF 0 "s_register_operand" "=w")
  	(match_operand:DF 1 "const_double_operand" "F"))
!    (clobber (match_operand:DI 2 "s_register_operand" "=r"))]
    "arm_disable_literal_pool
     && TARGET_VFP_BASE
     && !arm_const_double_rtx (operands[1])
***************
*** 2153,2160 ****
    unsigned HOST_WIDE_INT ival = zext_hwi (buf[order], 32);
    ival |= (zext_hwi (buf[1 - order], 32) << 32);
    rtx cst = gen_int_mode (ival, DImode);
!   emit_move_insn (simplify_gen_subreg (DImode, operands[2], DFmode, 0), cst);
!   emit_move_insn (operands[0], operands[2]);
    DONE;
  }
  )
--- 2153,2161 ----
    unsigned HOST_WIDE_INT ival = zext_hwi (buf[order], 32);
    ival |= (zext_hwi (buf[1 - order], 32) << 32);
    rtx cst = gen_int_mode (ival, DImode);
!   emit_move_insn (operands[2], cst);
!   emit_move_insn (operands[0],
! 		  simplify_gen_subreg (DFmode, operands[2], DImode, 0));
    DONE;
  }
  )
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr-arch.h gcc-12.4.0/gcc/config/avr/avr-arch.h
*** gcc-12.3.0/gcc/config/avr/avr-arch.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr-arch.h	Thu Jun 20 08:08:06 2024
*************** typedef struct
*** 195,200 ****
--- 195,201 ----
  
  extern const avr_arch_t avr_arch_types[];
  extern const avr_arch_t *avr_arch;
+ extern const avr_arch_t *avr_get_parch (const char *mcu);
  
  extern const avr_mcu_t avr_mcu_types[];
  
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr-devices.cc gcc-12.4.0/gcc/config/avr/avr-devices.cc
*** gcc-12.3.0/gcc/config/avr/avr-devices.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr-devices.cc	Thu Jun 20 08:08:06 2024
*************** avr_inform_core_architectures (void)
*** 153,156 ****
--- 153,172 ----
    free (archs);
  }
  
+ 
+ /* When MCU names a core arch like "avr5", then return a pointer to the
+    respective entry in avr_arch_types[].  Otherwise, return NULL.  */
+ 
+ const avr_arch_t *
+ avr_get_parch (const char *mcu)
+ {
+   for (size_t i = 0; i < ARRAY_SIZE (avr_arch_types); ++i)
+     {
+       if (strcmp (mcu, avr_arch_types[i].name) == 0)
+ 	return & avr_arch_types[i];
+     }
+ 
+   return NULL;
+ }
+ 
  #endif // IN_GEN_AVR_MMCU_TEXI
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr-dimode.md gcc-12.4.0/gcc/config/avr/avr-dimode.md
*** gcc-12.3.0/gcc/config/avr/avr-dimode.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr-dimode.md	Thu Jun 20 08:08:06 2024
***************
*** 455,466 ****
  (define_expand "cbranch4"
    [(set (pc)
          (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(match_operand:ALL8 1 "register_operand"  "")
!                          (match_operand:ALL8 2 "nonmemory_operand" "")])
!          (label_ref (match_operand 3 "" ""))
!          (pc)))]
    "avr_have_dimode"
     {
      rtx acc_a = gen_rtx_REG (mode, ACC_A);
  
      avr_fix_inputs (operands, 1 << 2, regmask (mode, ACC_A));
--- 455,472 ----
  (define_expand "cbranch4"
    [(set (pc)
          (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(match_operand:ALL8 1 "register_operand")
!                          (match_operand:ALL8 2 "nonmemory_operand")])
!                       (label_ref (match_operand 3))
!                       (pc)))]
    "avr_have_dimode"
     {
+     int icode = (int) GET_CODE (operands[0]);
+ 
+     targetm.canonicalize_comparison (&icode, &operands[1], &operands[2], false);
+     operands[0] = gen_rtx_fmt_ee ((enum rtx_code) icode,
+                                   VOIDmode, operands[1], operands[2]);
+ 
      rtx acc_a = gen_rtx_REG (mode, ACC_A);
  
      avr_fix_inputs (operands, 1 << 2, regmask (mode, ACC_A));
***************
*** 490,497 ****
          (if_then_else (match_operator 0 "ordered_comparison_operator"
                          [(reg:ALL8 ACC_A)
                           (reg:ALL8 ACC_B)])
!          (label_ref (match_operand 1 "" ""))
!          (pc)))]
    "avr_have_dimode"
    "#"
    "&& reload_completed"
--- 496,503 ----
          (if_then_else (match_operator 0 "ordered_comparison_operator"
                          [(reg:ALL8 ACC_A)
                           (reg:ALL8 ACC_B)])
!                       (label_ref (match_operand 1))
!                       (pc)))]
    "avr_have_dimode"
    "#"
    "&& reload_completed"
***************
*** 544,551 ****
          (if_then_else (match_operator 0 "ordered_comparison_operator"
                          [(reg:ALL8 ACC_A)
                           (match_operand:ALL8 1 "const_operand" "n Ynn")])
!          (label_ref (match_operand 2 "" ""))
!          (pc)))
     (clobber (match_scratch:QI 3 "=&d"))]
    "avr_have_dimode
     && !s8_operand (operands[1], VOIDmode)"
--- 550,557 ----
          (if_then_else (match_operator 0 "ordered_comparison_operator"
                          [(reg:ALL8 ACC_A)
                           (match_operand:ALL8 1 "const_operand" "n Ynn")])
!                       (label_ref (match_operand 2 "" ""))
!                       (pc)))
     (clobber (match_scratch:QI 3 "=&d"))]
    "avr_have_dimode
     && !s8_operand (operands[1], VOIDmode)"
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr-mcus.def gcc-12.4.0/gcc/config/avr/avr-mcus.def
*** gcc-12.3.0/gcc/config/avr/avr-mcus.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr-mcus.def	Thu Jun 20 08:08:06 2024
*************** AVR_MCU ("attiny167",        ARCH_AVR35,
*** 138,146 ****
  AVR_MCU ("attiny1634",       ARCH_AVR35, AVR_ISA_NONE, "__AVR_ATtiny1634__",       0x0100, 0x0, 0x4000, 0)
  /* Enhanced, <= 8K.  */
  AVR_MCU ("avr4",             ARCH_AVR4, AVR_ISA_NONE,  NULL,                       0x0060, 0x0, 0x2000, 0)
  AVR_MCU ("ata6285",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA6285__",          0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("ata6286",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA6286__",          0x0100, 0x0, 0x2000, 0)
! AVR_MCU ("ata6289",          ARCH_AVR4, AVR_ISA_NONE, "__AVR_ATA6289__",           0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("ata6612c",         ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA6612C__",         0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("atmega8",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATmega8__",          0x0060, 0x0, 0x2000, 0)
  AVR_MCU ("atmega8a",         ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATmega8A__",         0x0060, 0x0, 0x2000, 0)
--- 138,147 ----
  AVR_MCU ("attiny1634",       ARCH_AVR35, AVR_ISA_NONE, "__AVR_ATtiny1634__",       0x0100, 0x0, 0x4000, 0)
  /* Enhanced, <= 8K.  */
  AVR_MCU ("avr4",             ARCH_AVR4, AVR_ISA_NONE,  NULL,                       0x0060, 0x0, 0x2000, 0)
+ AVR_MCU ("ata5795",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA5795__",          0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("ata6285",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA6285__",          0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("ata6286",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA6286__",          0x0100, 0x0, 0x2000, 0)
! AVR_MCU ("ata6289",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA6289__",          0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("ata6612c",         ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATA6612C__",         0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("atmega8",          ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATmega8__",          0x0060, 0x0, 0x2000, 0)
  AVR_MCU ("atmega8a",         ARCH_AVR4, AVR_ISA_NONE,  "__AVR_ATmega8A__",         0x0060, 0x0, 0x2000, 0)
*************** AVR_MCU ("at90pwm3b",        ARCH_AVR4,
*** 165,177 ****
  AVR_MCU ("at90pwm81",        ARCH_AVR4, AVR_ISA_NONE,  "__AVR_AT90PWM81__",        0x0100, 0x0, 0x2000, 0)
  /* Enhanced, > 8K, <= 64K.  */
  AVR_MCU ("avr5",             ARCH_AVR5, AVR_ISA_NONE, NULL,                        0x0060, 0x0, 0x4000, 0)
! AVR_MCU ("ata5702m322",      ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5702M322__",       0x0200, 0x0, 0x10000, 0)
  AVR_MCU ("ata5782",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5782__",           0x0200, 0x8000, 0xd000, 0)
  AVR_MCU ("ata5790",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5790__",           0x0100, 0x0, 0x4000, 0)
  AVR_MCU ("ata5790n",         ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5790N__",          0x0100, 0x0, 0x4000, 0)
  AVR_MCU ("ata5791",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5791__",           0x0100, 0x0, 0x4000, 0)
- AVR_MCU ("ata5795",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5795__",           0x0100, 0x0, 0x2000, 0)
  AVR_MCU ("ata5831",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5831__",           0x0200, 0x8000, 0xd000, 0)
  AVR_MCU ("ata6613c",         ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA6613C__",          0x0100, 0x0, 0x4000, 0)
  AVR_MCU ("ata6614q",         ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA6614Q__",          0x0100, 0x0, 0x8000, 0)
  AVR_MCU ("ata8210",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA8210__",           0x0200, 0x8000, 0xd000, 0)
--- 166,180 ----
  AVR_MCU ("at90pwm81",        ARCH_AVR4, AVR_ISA_NONE,  "__AVR_AT90PWM81__",        0x0100, 0x0, 0x2000, 0)
  /* Enhanced, > 8K, <= 64K.  */
  AVR_MCU ("avr5",             ARCH_AVR5, AVR_ISA_NONE, NULL,                        0x0060, 0x0, 0x4000, 0)
! AVR_MCU ("ata5700m322",      ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5700M322__",       0x0200, 0x8000, 0x10000, 0)
! AVR_MCU ("ata5702m322",      ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5702M322__",       0x0200, 0x8000, 0x10000, 0)
  AVR_MCU ("ata5782",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5782__",           0x0200, 0x8000, 0xd000, 0)
+ AVR_MCU ("ata5787",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5787__",           0x0200, 0x8000, 0xd200, 0)
  AVR_MCU ("ata5790",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5790__",           0x0100, 0x0, 0x4000, 0)
  AVR_MCU ("ata5790n",         ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5790N__",          0x0100, 0x0, 0x4000, 0)
  AVR_MCU ("ata5791",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5791__",           0x0100, 0x0, 0x4000, 0)
  AVR_MCU ("ata5831",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5831__",           0x0200, 0x8000, 0xd000, 0)
+ AVR_MCU ("ata5835",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA5835__",           0x0200, 0x8000, 0xd200, 0)
  AVR_MCU ("ata6613c",         ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA6613C__",          0x0100, 0x0, 0x4000, 0)
  AVR_MCU ("ata6614q",         ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA6614Q__",          0x0100, 0x0, 0x8000, 0)
  AVR_MCU ("ata8210",          ARCH_AVR5, AVR_ISA_NONE, "__AVR_ATA8210__",           0x0200, 0x8000, 0xd000, 0)
*************** AVR_MCU ("atmega2560",       ARCH_AVR6,
*** 291,297 ****
  AVR_MCU ("atmega2561",       ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega2561__",        0x0200, 0x0, 0x40000, 0)
  AVR_MCU ("atmega256rfr2",    ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega256RFR2__",     0x0200, 0x0, 0x40000, 0)
  AVR_MCU ("atmega2564rfr2",   ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega2564RFR2__",    0x0200, 0x0, 0x40000, 0)
! /* Xmega, 16K <= Flash < 64K, RAM <= 64K */
  AVR_MCU ("avrxmega2",        ARCH_AVRXMEGA2, AVR_ISA_NONE, NULL,                   0x2000, 0x0, 0x9000, 0)
  AVR_MCU ("atxmega8e5",       ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_ATxmega8E5__",   0x2000, 0x0, 0x2800, 0)
  AVR_MCU ("atxmega16a4",      ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_ATxmega16A4__",  0x2000, 0x0, 0x5000, 0)
--- 294,300 ----
  AVR_MCU ("atmega2561",       ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega2561__",        0x0200, 0x0, 0x40000, 0)
  AVR_MCU ("atmega256rfr2",    ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega256RFR2__",     0x0200, 0x0, 0x40000, 0)
  AVR_MCU ("atmega2564rfr2",   ARCH_AVR6, AVR_ISA_NONE, "__AVR_ATmega2564RFR2__",    0x0200, 0x0, 0x40000, 0)
! /* Xmega, 16K <= Flash <= 64K, RAM <= 64K */
  AVR_MCU ("avrxmega2",        ARCH_AVRXMEGA2, AVR_ISA_NONE, NULL,                   0x2000, 0x0, 0x9000, 0)
  AVR_MCU ("atxmega8e5",       ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_ATxmega8E5__",   0x2000, 0x0, 0x2800, 0)
  AVR_MCU ("atxmega16a4",      ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_ATxmega16A4__",  0x2000, 0x0, 0x5000, 0)
*************** AVR_MCU ("atxmega16c4",      ARCH_AVRXME
*** 306,311 ****
--- 309,331 ----
  AVR_MCU ("atxmega32a4u",     ARCH_AVRXMEGA2, AVR_ISA_RMW,  "__AVR_ATxmega32A4U__", 0x2000, 0x0, 0x9000, 0)
  AVR_MCU ("atxmega32c4",      ARCH_AVRXMEGA2, AVR_ISA_RMW,  "__AVR_ATxmega32C4__",  0x2000, 0x0, 0x9000, 0)
  AVR_MCU ("atxmega32e5",      ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_ATxmega32E5__",  0x2000, 0x0, 0x9000, 0)
+ AVR_MCU ("avr64da28",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DA28__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64da32",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DA32__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64da48",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DA48__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64da64",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DA64__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64db28",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB28__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64db32",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB32__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64db48",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB48__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64db64",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB64__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64dd14",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD14__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64dd20",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD20__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64dd28",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD28__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64dd32",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD32__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64du28",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DU28__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64du32",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DU32__",    0x6000, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64ea28",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64EA28__",    0x6800, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64ea32",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64EA32__",    0x6800, 0x0, 0x10000, 0)
+ AVR_MCU ("avr64ea48",        ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64EA48__",    0x6800, 0x0, 0x10000, 0)
  /* Xmega, Flash + RAM < 64K, flash visible in RAM address space */
  AVR_MCU ("avrxmega3",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  NULL,                  0x3f00, 0x0, 0x8000, 0)
  AVR_MCU ("attiny202",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny202__",   0x3f80, 0x0, 0x800,  0x8000)
*************** AVR_MCU ("attiny214",        ARCH_AVRXME
*** 324,329 ****
--- 344,350 ----
  AVR_MCU ("attiny412",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny412__",   0x3f00, 0x0, 0x1000, 0x8000)
  AVR_MCU ("attiny414",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny414__",   0x3f00, 0x0, 0x1000, 0x8000)
  AVR_MCU ("attiny416",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny416__",   0x3f00, 0x0, 0x1000, 0x8000)
+ AVR_MCU ("attiny416auto",    ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny416AUTO__", 0x3f00, 0x0, 0x1000, 0x8000)
  AVR_MCU ("attiny417",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny417__",   0x3f00, 0x0, 0x1000, 0x8000)
  AVR_MCU ("attiny814",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny814__",   0x3e00, 0x0, 0x2000, 0x8000)
  AVR_MCU ("attiny816",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny816__",   0x3e00, 0x0, 0x2000, 0x8000)
*************** AVR_MCU ("attiny1617",       ARCH_AVRXME
*** 334,347 ****
  AVR_MCU ("attiny3214",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3214__",  0x3800, 0x0, 0x8000, 0x8000)
  AVR_MCU ("attiny3216",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3216__",  0x3800, 0x0, 0x8000, 0x8000)
  AVR_MCU ("attiny3217",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3217__",  0x3800, 0x0, 0x8000, 0x8000)
  AVR_MCU ("atmega808",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATmega808__",   0x3c00, 0x0, 0x2000, 0x4000)
  AVR_MCU ("atmega809",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATmega809__",   0x3c00, 0x0, 0x2000, 0x4000)
  AVR_MCU ("atmega1608",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega1608__",  0x3800, 0x0, 0x4000, 0x4000)
  AVR_MCU ("atmega1609",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega1609__",  0x3800, 0x0, 0x4000, 0x4000)
! AVR_MCU ("atmega3208",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega3208__",  0x3800, 0x0, 0x8000, 0x4000)
! AVR_MCU ("atmega3209",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega3209__",  0x3800, 0x0, 0x8000, 0x4000)
  AVR_MCU ("atmega4808",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega4808__",  0x2800, 0x0, 0xc000, 0x4000)
  AVR_MCU ("atmega4809",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega4809__",  0x2800, 0x0, 0xc000, 0x4000)
  /* Xmega, 64K < Flash <= 128K, RAM <= 64K */
  AVR_MCU ("avrxmega4",        ARCH_AVRXMEGA4, AVR_ISA_NONE, NULL,                   0x2000, 0x0, 0x11000, 0)
  AVR_MCU ("atxmega64a3",      ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_ATxmega64A3__",  0x2000, 0x0, 0x11000, 0)
--- 355,412 ----
  AVR_MCU ("attiny3214",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3214__",  0x3800, 0x0, 0x8000, 0x8000)
  AVR_MCU ("attiny3216",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3216__",  0x3800, 0x0, 0x8000, 0x8000)
  AVR_MCU ("attiny3217",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3217__",  0x3800, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("attiny424",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny424__",   0x3e00, 0x0, 0x1000, 0x8000)
+ AVR_MCU ("attiny426",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny426__",   0x3e00, 0x0, 0x1000, 0x8000)
+ AVR_MCU ("attiny427",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny427__",   0x3e00, 0x0, 0x1000, 0x8000)
+ AVR_MCU ("attiny824",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny824__",   0x3c00, 0x0, 0x2000, 0x8000)
+ AVR_MCU ("attiny826",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny826__",   0x3c00, 0x0, 0x2000, 0x8000)
+ AVR_MCU ("attiny827",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny827__",   0x3c00, 0x0, 0x2000, 0x8000)
+ AVR_MCU ("attiny1624",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny1624__",  0x3800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("attiny1626",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny1626__",  0x3800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("attiny1627",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny1627__",  0x3800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("attiny3224",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3224__",  0x3400, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("attiny3226",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3226__",  0x3400, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("attiny3227",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATtiny3227__",  0x3400, 0x0, 0x8000, 0x8000)
  AVR_MCU ("atmega808",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATmega808__",   0x3c00, 0x0, 0x2000, 0x4000)
  AVR_MCU ("atmega809",        ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATmega809__",   0x3c00, 0x0, 0x2000, 0x4000)
  AVR_MCU ("atmega1608",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega1608__",  0x3800, 0x0, 0x4000, 0x4000)
  AVR_MCU ("atmega1609",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega1609__",  0x3800, 0x0, 0x4000, 0x4000)
! AVR_MCU ("atmega3208",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega3208__",  0x3000, 0x0, 0x8000, 0x4000)
! AVR_MCU ("atmega3209",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega3209__",  0x3000, 0x0, 0x8000, 0x4000)
  AVR_MCU ("atmega4808",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega4808__",  0x2800, 0x0, 0xc000, 0x4000)
  AVR_MCU ("atmega4809",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_ATmega4809__",  0x2800, 0x0, 0xc000, 0x4000)
+ AVR_MCU ("avr16dd14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DD14__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16dd20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DD20__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16dd28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DD28__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16dd32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DD32__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16du14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DU14__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16du20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DU20__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16du28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DU28__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16du32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DU32__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr32da28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DA28__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32da32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DA32__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32da48",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DA48__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32db28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DB28__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32db32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DB32__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32db48",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DB48__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32dd14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DD14__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32dd20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DD20__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32dd28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DD28__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32dd32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DD32__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32du14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DU14__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32du20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DU20__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32du28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DU28__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32du32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DU32__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr16eb14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EB14__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16eb20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EB20__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16eb28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EB28__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16eb32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EB32__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16ea28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EA28__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16ea32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EA32__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16ea48",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EA48__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr32ea28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EA28__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32ea32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EA32__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32ea48",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EA48__",   0x7000, 0x0, 0x8000, 0x8000)
  /* Xmega, 64K < Flash <= 128K, RAM <= 64K */
  AVR_MCU ("avrxmega4",        ARCH_AVRXMEGA4, AVR_ISA_NONE, NULL,                   0x2000, 0x0, 0x11000, 0)
  AVR_MCU ("atxmega64a3",      ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_ATxmega64A3__",  0x2000, 0x0, 0x11000, 0)
*************** AVR_MCU ("atxmega64b1",      ARCH_AVRXME
*** 352,357 ****
--- 417,430 ----
  AVR_MCU ("atxmega64b3",      ARCH_AVRXMEGA4, AVR_ISA_RMW,  "__AVR_ATxmega64B3__",  0x2000, 0x0, 0x11000, 0)
  AVR_MCU ("atxmega64c3",      ARCH_AVRXMEGA4, AVR_ISA_RMW,  "__AVR_ATxmega64C3__",  0x2000, 0x0, 0x11000, 0)
  AVR_MCU ("atxmega64d4",      ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_ATxmega64D4__",  0x2000, 0x0, 0x11000, 0)
+ AVR_MCU ("avr128da28",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DA28__",   0x4000, 0x0, 0x20000, 0)
+ AVR_MCU ("avr128da32",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DA32__",   0x4000, 0x0, 0x20000, 0)
+ AVR_MCU ("avr128da48",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DA48__",   0x4000, 0x0, 0x20000, 0)
+ AVR_MCU ("avr128da64",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DA64__",   0x4000, 0x0, 0x20000, 0)
+ AVR_MCU ("avr128db28",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DB28__",   0x4000, 0x0, 0x20000, 0)
+ AVR_MCU ("avr128db32",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DB32__",   0x4000, 0x0, 0x20000, 0)
+ AVR_MCU ("avr128db48",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DB48__",   0x4000, 0x0, 0x20000, 0)
+ AVR_MCU ("avr128db64",       ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_AVR128DB64__",   0x4000, 0x0, 0x20000, 0)
  /* Xmega, 64K < Flash <= 128K, RAM > 64K */
  AVR_MCU ("avrxmega5",        ARCH_AVRXMEGA5, AVR_ISA_NONE, NULL,                   0x2000, 0x0, 0x11000, 0)
  AVR_MCU ("atxmega64a1",      ARCH_AVRXMEGA5, AVR_ISA_NONE, "__AVR_ATxmega64A1__",  0x2000, 0x0, 0x11000, 0)
*************** AVR_MCU ("attiny4",          ARCH_AVRTIN
*** 388,393 ****
--- 461,468 ----
  AVR_MCU ("attiny5",          ARCH_AVRTINY, AVR_ISA_LDS,  "__AVR_ATtiny5__",        0x0040, 0x0, 0x200, 0)
  AVR_MCU ("attiny9",          ARCH_AVRTINY, AVR_ISA_LDS,  "__AVR_ATtiny9__",        0x0040, 0x0, 0x400, 0)
  AVR_MCU ("attiny10",         ARCH_AVRTINY, AVR_ISA_LDS,  "__AVR_ATtiny10__",       0x0040, 0x0, 0x400, 0)
+ AVR_MCU ("attiny102",        ARCH_AVRTINY, AVR_ISA_LDS,  "__AVR_ATtiny102__",      0x0040, 0x0, 0x400, 0)
+ AVR_MCU ("attiny104",        ARCH_AVRTINY, AVR_ISA_LDS,  "__AVR_ATtiny104__",      0x0040, 0x0, 0x400, 0)
  AVR_MCU ("attiny20",         ARCH_AVRTINY, AVR_ISA_LDS,  "__AVR_ATtiny20__",       0x0040, 0x0, 0x800, 0)
  AVR_MCU ("attiny40",         ARCH_AVRTINY, AVR_ISA_NONE, "__AVR_ATtiny40__",       0x0040, 0x0, 0x1000, 0)
  /* Assembler only.  */
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr-passes.def gcc-12.4.0/gcc/config/avr/avr-passes.def
*** gcc-12.3.0/gcc/config/avr/avr-passes.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr-passes.def	Thu Jun 20 08:08:06 2024
*************** INSERT_PASS_BEFORE (pass_free_cfg, 1, av
*** 43,45 ****
--- 43,65 ----
     insns withaout any insns in between.  */
  
  INSERT_PASS_AFTER (pass_expand, 1, avr_pass_casesi);
+ 
+ /* If-else decision trees generated for switch / case may produce sequences
+    like
+ 
+       SREG = compare (reg, val);
+ 	  if (SREG == 0)  goto label1;
+       SREG = compare (reg, 1 + val);
+ 	  if (SREG >= 0)  goto label2;
+ 
+    which can be optimized to
+ 
+       SREG = compare (reg, val);
+ 	  if (SREG == 0)  goto label1;
+ 	  if (SREG >= 0)  goto label2;
+ 
+    The optimal place for such a pass would be directly after expand, but
+    it's not possible for a jump insn to target more than one code label.
+    Hence, run a mini pass right before split2 which introduces REG_CC.  */
+ 
+ INSERT_PASS_BEFORE (pass_split_after_reload, 1, avr_pass_ifelse);
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr-protos.h gcc-12.4.0/gcc/config/avr/avr-protos.h
*** gcc-12.3.0/gcc/config/avr/avr-protos.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr-protos.h	Thu Jun 20 08:08:06 2024
*************** extern const char *ret_cond_branch (rtx
*** 58,63 ****
--- 58,65 ----
  extern const char *avr_out_movpsi (rtx_insn *, rtx*, int*);
  extern const char *avr_out_sign_extend (rtx_insn *, rtx*, int*);
  extern const char *avr_out_insert_notbit (rtx_insn *, rtx*, rtx, int*);
+ extern const char *avr_out_plus_set_ZN (rtx*, int*);
+ extern const char *avr_out_cmp_ext (rtx*, enum rtx_code, int*);
  
  extern const char *ashlqi3_out (rtx_insn *insn, rtx operands[], int *len);
  extern const char *ashlhi3_out (rtx_insn *insn, rtx operands[], int *len);
*************** extern int jump_over_one_insn_p (rtx_ins
*** 112,119 ****
  
  extern void avr_final_prescan_insn (rtx_insn *insn, rtx *operand,
  				    int num_operands);
- extern int avr_simplify_comparison_p (machine_mode mode,
- 				      RTX_CODE op, rtx x);
  extern RTX_CODE avr_normalize_condition (RTX_CODE condition);
  extern void out_shift_with_cnt (const char *templ, rtx_insn *insn,
  				rtx operands[], int *len, int t_len);
--- 114,119 ----
*************** extern rtx tmp_reg_rtx;
*** 145,150 ****
--- 145,151 ----
  extern rtx zero_reg_rtx;
  extern rtx all_regs_rtx[32];
  extern rtx rampz_rtx;
+ extern rtx cc_reg_rtx;
  
  #endif /* RTX_CODE */
  
*************** class rtl_opt_pass;
*** 160,165 ****
--- 161,167 ----
  extern rtl_opt_pass *make_avr_pass_pre_proep (gcc::context *);
  extern rtl_opt_pass *make_avr_pass_recompute_notes (gcc::context *);
  extern rtl_opt_pass *make_avr_pass_casesi (gcc::context *);
+ extern rtl_opt_pass *make_avr_pass_ifelse (gcc::context *);
  
  /* From avr-log.cc */
  
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr.cc gcc-12.4.0/gcc/config/avr/avr.cc
*** gcc-12.3.0/gcc/config/avr/avr.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr.cc	Thu Jun 20 08:08:06 2024
*************** public:
*** 359,364 ****
--- 359,399 ----
    }
  }; // avr_pass_casesi
  
+ 
+ static const pass_data avr_pass_data_ifelse =
+ {
+   RTL_PASS,      // type
+   "",            // name (will be patched)
+   OPTGROUP_NONE, // optinfo_flags
+   TV_DF_SCAN,    // tv_id
+   0,             // properties_required
+   0,             // properties_provided
+   0,             // properties_destroyed
+   0,             // todo_flags_start
+   TODO_df_finish | TODO_df_verify // todo_flags_finish
+ };
+ 
+ class avr_pass_ifelse : public rtl_opt_pass
+ {
+ public:
+   avr_pass_ifelse (gcc::context *ctxt, const char *name)
+     : rtl_opt_pass (avr_pass_data_ifelse, ctxt)
+   {
+     this->name = name;
+   }
+ 
+   void avr_rest_of_handle_ifelse (function*);
+ 
+   virtual bool gate (function*) { return optimize > 0; }
+ 
+   virtual unsigned int execute (function *func)
+   {
+     avr_rest_of_handle_ifelse (func);
+ 
+     return 0;
+   }
+ }; // avr_pass_ifelse
+ 
  } // anon namespace
  
  rtl_opt_pass*
*************** make_avr_pass_casesi (gcc::context *ctxt
*** 373,378 ****
--- 408,419 ----
    return new avr_pass_casesi (ctxt, "avr-casesi");
  }
  
+ rtl_opt_pass*
+ make_avr_pass_ifelse (gcc::context *ctxt)
+ {
+   return new avr_pass_ifelse (ctxt, "avr-ifelse");
+ }
+ 
  
  /* Make one parallel insn with all the patterns from insns i[0]..i[5].  */
  
*************** avr_pass_casesi::avr_rest_of_handle_case
*** 686,691 ****
--- 727,1030 ----
  }
  
  
+ /* A helper for the next method.  Suppose we have two conditional branches
+ 
+       if (reg  xval1) goto label1;
+       if (reg  xval2) goto label2;
+ 
+    If the second comparison is redundant and there is a code  such
+    that the sequence can be performed as
+ 
+       REG_CC = compare (reg, xval1);
+       if (REG_CC  0)  goto label1;
+       if (REG_CC  0)   goto label2;
+ 
+    then return .  Otherwise, return UNKNOWN.
+    xval1 and xval2 are CONST_INT, and mode is the scalar int mode in which
+    the comparison will be carried out.  reverse_cond1 can be set to reverse
+    condition cond1.  This is useful if the second comparison does not follow
+    the first one, but is located after label1 like in:
+ 
+       if (reg  xval1) goto label1;
+       ...
+       label1:
+       if (reg  xval2) goto label2;  */
+ 
+ static enum rtx_code
+ avr_redundant_compare (enum rtx_code cond1, rtx xval1,
+ 		       enum rtx_code cond2, rtx xval2,
+ 		       machine_mode mode, bool reverse_cond1)
+ {
+   HOST_WIDE_INT ival1 = INTVAL (xval1);
+   HOST_WIDE_INT ival2 = INTVAL (xval2);
+ 
+   unsigned HOST_WIDE_INT mask = GET_MODE_MASK (mode);
+   unsigned HOST_WIDE_INT uval1 = mask & UINTVAL (xval1);
+   unsigned HOST_WIDE_INT uval2 = mask & UINTVAL (xval2);
+ 
+   if (reverse_cond1)
+     cond1 = reverse_condition (cond1);
+ 
+   if (cond1 == EQ)
+     {
+       ////////////////////////////////////////////////
+       // A sequence like
+       //    if (reg == val)  goto label1;
+       //    if (reg > val)   goto label2;
+       // can be re-written using the same, simple comparison like in:
+       //    REG_CC = compare (reg, val)
+       //    if (REG_CC == 0)  goto label1;
+       //    if (REG_CC >= 0)  goto label2;
+       if (ival1 == ival2
+ 	  && (cond2 == GT || cond2 == GTU))
+ 	return avr_normalize_condition (cond2);
+ 
+       // Similar, but the input sequence is like
+       //    if (reg == val)  goto label1;
+       //    if (reg >= val)  goto label2;
+       if (ival1 == ival2
+ 	  && (cond2 == GE || cond2 == GEU))
+ 	return cond2;
+ 
+       // Similar, but the input sequence is like
+       //    if (reg == val)      goto label1;
+       //    if (reg >= val + 1)  goto label2;
+       if ((cond2 == GE && ival2 == 1 + ival1)
+ 	  || (cond2 == GEU && uval2 == 1 + uval1))
+ 	return cond2;
+ 
+       // Similar, but the input sequence is like
+       //    if (reg == val)      goto label1;
+       //    if (reg >  val - 1)  goto label2;
+       if ((cond2 == GT && ival2 == ival1 - 1)
+ 	  || (cond2 == GTU && uval2 == uval1 - 1))
+ 	return avr_normalize_condition (cond2);
+ 
+       /////////////////////////////////////////////////////////
+       // A sequence like
+       //    if (reg == val)      goto label1;
+       //    if (reg < 1 + val)   goto label2;
+       // can be re-written as
+       //    REG_CC = compare (reg, val)
+       //    if (REG_CC == 0)  goto label1;
+       //    if (REG_CC < 0)   goto label2;
+       if ((cond2 == LT && ival2 == 1 + ival1)
+ 	  || (cond2 == LTU && uval2 == 1 + uval1))
+ 	return cond2;
+ 
+       // Similar, but with an input sequence like
+       //    if (reg == val)   goto label1;
+       //    if (reg <= val)   goto label2;
+       if (ival1 == ival2
+ 	  && (cond2 == LE || cond2 == LEU))
+ 	return avr_normalize_condition (cond2);
+ 
+       // Similar, but with an input sequence like
+       //    if (reg == val)  goto label1;
+       //    if (reg < val)   goto label2;
+       if (ival1 == ival2
+ 	  && (cond2 == LT || cond2 == LTU))
+ 	return cond2;
+ 
+       // Similar, but with an input sequence like
+       //    if (reg == val)      goto label1;
+       //    if (reg <= val - 1)  goto label2;
+       if ((cond2 == LE && ival2 == ival1 - 1)
+ 	  || (cond2 == LEU && uval2 == uval1 - 1))
+ 	return avr_normalize_condition (cond2);
+ 
+     } // cond1 == EQ
+ 
+   return UNKNOWN;
+ }
+ 
+ 
+ /* If-else decision trees generated for switch / case may produce sequences
+    like
+ 
+       SREG = compare (reg, val);
+ 	  if (SREG == 0)  goto label1;
+       SREG = compare (reg, 1 + val);
+ 	  if (SREG >= 0)  goto label2;
+ 
+    which can be optimized to
+ 
+       SREG = compare (reg, val);
+ 	  if (SREG == 0)  goto label1;
+ 	  if (SREG >= 0)  goto label2;
+ 
+    The optimal place for such a pass would be directly after expand, but
+    it's not possible for a jump insn to target more than one code label.
+    Hence, run a mini pass right before split2 which introduces REG_CC.  */
+ 
+ void
+ avr_pass_ifelse::avr_rest_of_handle_ifelse (function*)
+ {
+   rtx_insn *next_insn;
+ 
+   for (rtx_insn *insn = get_insns(); insn; insn = next_insn)
+     {
+       next_insn = next_nonnote_nondebug_insn (insn);
+ 
+       if (! next_insn)
+ 	break;
+ 
+       // Search for two cbranch insns.  The first one is a cbranch.
+       // Filter for "cbranch4_insn" with mode in QI, HI, PSI, SI.
+ 
+       if (! JUMP_P (insn))
+ 	continue;
+ 
+       int icode1 = recog_memoized (insn);
+ 
+       if (icode1 != CODE_FOR_cbranchqi4_insn
+ 	  && icode1 != CODE_FOR_cbranchhi4_insn
+ 	  && icode1 != CODE_FOR_cbranchpsi4_insn
+ 	  && icode1 != CODE_FOR_cbranchsi4_insn)
+ 	continue;
+ 
+       rtx_jump_insn *insn1 = as_a (insn);
+       rtx_jump_insn *insn2 = nullptr;
+       bool follow_label1 = false;
+ 
+       // Extract the operands of the first insn:
+       // $0 = comparison operator ($1, $2)
+       // $1 = reg
+       // $2 = reg or const_int
+       // $3 = code_label
+       // $4 = optional SCRATCH for HI, PSI, SI cases.
+ 
+       const auto &op = recog_data.operand;
+ 
+       extract_insn (insn1);
+       rtx xop1[5] = { op[0], op[1], op[2], op[3], op[4] };
+       int n_operands = recog_data.n_operands;
+ 
+       // For now, we can optimize cbranches that follow an EQ cbranch,
+       // and cbranches that follow the label of a NE cbranch.
+ 
+       if (GET_CODE (xop1[0]) == EQ
+ 	  && JUMP_P (next_insn)
+ 	  && recog_memoized (next_insn) == icode1)
+ 	{
+ 	  // The 2nd cbranch insn follows insn1, i.e. is located in the
+ 	  // fallthrough path of insn1.
+ 
+ 	  insn2 = as_a (next_insn);
+ 	}
+       else if (GET_CODE (xop1[0]) == NE)
+ 	{
+ 	  // insn1 might branch to a label followed by a cbranch.
+ 
+ 	  rtx target1 = JUMP_LABEL (insn1);
+ 	  rtx_insn *code_label1 = JUMP_LABEL_AS_INSN (insn1);
+ 	  rtx_insn *next = next_nonnote_nondebug_insn (code_label1);
+ 	  rtx_insn *barrier = prev_nonnote_nondebug_insn (code_label1);
+ 
+ 	  if (// Target label of insn1 is used exactly once and
+ 	      // is not a fallthru, i.e. is preceded by a barrier.
+ 	      LABEL_NUSES (target1) == 1
+ 	      && barrier
+ 	      && BARRIER_P (barrier)
+ 	      // Following the target label is a cbranch of the same kind.
+ 	      && next
+ 	      && JUMP_P (next)
+ 	      && recog_memoized (next) == icode1)
+ 	    {
+ 	      follow_label1 = true;
+ 	      insn2 = as_a (next);
+ 	    }
+ 	}
+ 
+       if (! insn2)
+ 	continue;
+ 
+       // Also extract operands of insn2, and filter for REG + CONST_INT
+       // comparsons against the same register.
+ 
+       extract_insn (insn2);
+       rtx xop2[5] = { op[0], op[1], op[2], op[3], op[4] };
+ 
+       if (! rtx_equal_p (xop1[1], xop2[1])
+ 	  || ! CONST_INT_P (xop1[2])
+ 	  || ! CONST_INT_P (xop2[2]))
+ 	continue;
+ 
+       machine_mode mode = GET_MODE (xop1[1]);
+       enum rtx_code code1 = GET_CODE (xop1[0]);
+       enum rtx_code code2 = GET_CODE (xop2[0]);
+ 
+       code2 = avr_redundant_compare (code1, xop1[2], code2, xop2[2],
+ 				     mode, follow_label1);
+       if (code2 == UNKNOWN)
+ 	continue;
+ 
+       //////////////////////////////////////////////////////
+       // Found a replacement.
+ 
+       if (dump_file)
+ 	{
+ 	  fprintf (dump_file, "\n;; Found chain of jump_insn %d and"
+ 		   " jump_insn %d, follow_label1=%d:\n",
+ 		   INSN_UID (insn1), INSN_UID (insn2), follow_label1);
+ 	  print_rtl_single (dump_file, PATTERN (insn1));
+ 	  print_rtl_single (dump_file, PATTERN (insn2));
+ 	}
+ 
+       if (! follow_label1)
+ 	next_insn = next_nonnote_nondebug_insn (insn2);
+ 
+       // Pop the new branch conditions and the new comparison.
+       // Prematurely split into compare + branch so that we can drop
+       // the 2nd comparison.  The following pass, split2, splits all
+       // insns for REG_CC, and it should still work as usual even when
+       // there are already some REG_CC insns around.
+ 
+       rtx xcond1 = gen_rtx_fmt_ee (code1, VOIDmode, cc_reg_rtx, const0_rtx);
+       rtx xcond2 = gen_rtx_fmt_ee (code2, VOIDmode, cc_reg_rtx, const0_rtx);
+       rtx xpat1 = gen_branch (xop1[3], xcond1);
+       rtx xpat2 = gen_branch (xop2[3], xcond2);
+       rtx xcompare = NULL_RTX;
+ 
+       if (mode == QImode)
+ 	{
+ 	  gcc_assert (n_operands == 4);
+ 	  xcompare = gen_cmpqi3 (xop1[1], xop1[2]);
+ 	}
+       else
+ 	{
+ 	  gcc_assert (n_operands == 5);
+ 	  rtx (*gen_cmp)(rtx,rtx,rtx)
+ 	    = mode == HImode  ? gen_gen_comparehi
+ 	    : mode == PSImode ? gen_gen_comparepsi
+ 	    : gen_gen_comparesi; // SImode
+ 	  xcompare = gen_cmp (xop1[1], xop1[2], xop1[4]);
+ 	}
+ 
+       // Emit that stuff.
+ 
+       rtx_insn *cmp = emit_insn_before (xcompare, insn1);
+       rtx_jump_insn *branch1 = emit_jump_insn_before (xpat1, insn1);
+       rtx_jump_insn *branch2 = emit_jump_insn_before (xpat2, insn2);
+ 
+       JUMP_LABEL (branch1) = xop1[3];
+       JUMP_LABEL (branch2) = xop2[3];
+       // delete_insn() decrements LABEL_NUSES when deleting a JUMP_INSN, but
+       // when we pop a new JUMP_INSN, do it by hand.
+       ++LABEL_NUSES (xop1[3]);
+       ++LABEL_NUSES (xop2[3]);
+ 
+       delete_insn (insn1);
+       delete_insn (insn2);
+ 
+       // As a side effect, also recog the new insns.
+       gcc_assert (valid_insn_p (cmp));
+       gcc_assert (valid_insn_p (branch1));
+       gcc_assert (valid_insn_p (branch2));
+     } // loop insns
+ }
+ 
+ 
  /* Set `avr_arch' as specified by `-mmcu='.
     Return true on success.  */
  
*************** avr_option_override (void)
*** 756,761 ****
--- 1095,1110 ----
        flag_omit_frame_pointer = 0;
      }
  
+   /* Disable flag_delete_null_pointer_checks if zero is a valid address. */
+   if (targetm.addr_space.zero_address_valid (ADDR_SPACE_GENERIC))
+     flag_delete_null_pointer_checks = 0;
+ 
+   /* PR ipa/92606: Inter-procedural analysis optimizes data across
+      address-spaces and PROGMEM.  As of v14, the PROGMEM part is
+      still not fixed (and there is still no target hook as proposed
+      in PR92932).  Just disable respective bogus optimization.  */
+   flag_ipa_icf_variables = 0;
+ 
    if (flag_pic == 1)
      warning (OPT_fpic, "%<-fpic%> is not supported");
    if (flag_pic == 2)
*************** avr_no_gccisr_function_p (tree func)
*** 1019,1024 ****
--- 1368,1386 ----
    return avr_lookup_function_attribute1 (func, "no_gccisr");
  }
  
+ 
+ /* Implement `TARGET_CAN_INLINE_P'.  */
+ /* Some options like -mgas_isr_prologues depend on optimization level,
+    and the inliner might think that due to different options, inlining
+    is not permitted; see PR104327.  */
+ 
+ static bool
+ avr_can_inline_p (tree /* caller */, tree /* callee */)
+ {
+   // No restrictions whatsoever.
+   return true;
+ }
+ 
  /* Implement `TARGET_SET_CURRENT_FUNCTION'.  */
  /* Sanity cheching for above function attributes.  */
  
*************** avr_asm_final_postscan_insn (FILE *strea
*** 3173,3200 ****
  }
  
  
- /* Return 0 if undefined, 1 if always true or always false.  */
- 
- int
- avr_simplify_comparison_p (machine_mode mode, RTX_CODE op, rtx x)
- {
-   unsigned int max = (mode == QImode ? 0xff :
-                       mode == HImode ? 0xffff :
-                       mode == PSImode ? 0xffffff :
-                       mode == SImode ? 0xffffffff : 0);
-   if (max && op && CONST_INT_P (x))
-     {
-       if (unsigned_condition (op) != op)
-         max >>= 1;
- 
-       if (max != (INTVAL (x) & max)
-           && INTVAL (x) != 0xff)
-         return 1;
-     }
-   return 0;
- }
- 
- 
  /* Worker function for `FUNCTION_ARG_REGNO_P'.  */
  /* Returns nonzero if REGNO is the number of a hard
     register in which function arguments are sometimes passed.  */
--- 3535,3540 ----
*************** avr_frame_pointer_required_p (void)
*** 5677,5705 ****
            || get_frame_size () > 0);
  }
  
! /* Returns the condition of compare insn INSN, or UNKNOWN.  */
  
  static RTX_CODE
  compare_condition (rtx_insn *insn)
  {
!   rtx_insn *next = next_real_insn (insn);
  
!   if (next && JUMP_P (next))
      {
!       rtx pat = PATTERN (next);
!       if (GET_CODE (pat) == PARALLEL)
!         pat = XVECEXP (pat, 0, 0);
!       rtx src = SET_SRC (pat);
! 
!       if (IF_THEN_ELSE == GET_CODE (src))
!         return GET_CODE (XEXP (src, 0));
      }
  
    return UNKNOWN;
  }
  
  
! /* Returns true iff INSN is a tst insn that only tests the sign.  */
  
  static bool
  compare_sign_p (rtx_insn *insn)
--- 6017,6052 ----
            || get_frame_size () > 0);
  }
  
! 
! /* Returns the condition of the branch following INSN, where INSN is some
!    comparison.  If the next insn is not a branch or the condition code set
!    by INSN might be used by more insns than the next one, return UNKNOWN.
!    For now, just look at the next insn, which misses some opportunities like
!    following jumps.  */
  
  static RTX_CODE
  compare_condition (rtx_insn *insn)
  {
!   rtx set;
!   rtx_insn *next = next_real_nondebug_insn (insn);
  
!   if (next
!       && JUMP_P (next)
!       // If SREG does not die in the next insn, it is used in more than one
!       // branch.  This can happen due to pass .avr-ifelse optimizations.
!       && dead_or_set_regno_p (next, REG_CC)
!       // Branches are (set (pc) (if_then_else (COND (...)))).
!       && (set = single_set (next))
!       && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
      {
!       return GET_CODE (XEXP (SET_SRC (set), 0));
      }
  
    return UNKNOWN;
  }
  
  
! /* Returns true if INSN is a tst insn that only tests the sign.  */
  
  static bool
  compare_sign_p (rtx_insn *insn)
*************** compare_sign_p (rtx_insn *insn)
*** 5709,5731 ****
  }
  
  
! /* Returns true iff the next insn is a JUMP_INSN with a condition
!    that needs to be swapped (GT, GTU, LE, LEU).  */
  
  static bool
! compare_diff_p (rtx_insn *insn)
  {
    RTX_CODE cond = compare_condition (insn);
!   return (cond == GT || cond == GTU || cond == LE || cond == LEU) ? cond : 0;
  }
  
- /* Returns true iff INSN is a compare insn with the EQ or NE condition.  */
  
! static bool
! compare_eq_p (rtx_insn *insn)
  {
!   RTX_CODE cond = compare_condition (insn);
!   return (cond == EQ || cond == NE);
  }
  
  
--- 6056,6150 ----
  }
  
  
! /* Returns true if INSN is a compare insn with the EQ or NE condition.  */
  
  static bool
! compare_eq_p (rtx_insn *insn)
  {
    RTX_CODE cond = compare_condition (insn);
!   return (cond == EQ || cond == NE);
  }
  
  
! /* Implement `TARGET_CANONICALIZE_COMPARISON'.  */
! /* Basically tries to convert "difficult" comparisons like GT[U]
!    and LE[U] to simple ones.  Some asymmetric comparisons can be
!    transformed to EQ or NE against zero.  */
! 
! static void
! avr_canonicalize_comparison (int *icode, rtx *op0, rtx *op1, bool op0_fixed)
  {
!   enum rtx_code code = (enum rtx_code) *icode;
!   machine_mode mode = GET_MODE (*op0);
! 
!   bool signed_p = code == GT || code == LE;
!   bool unsigned_p = code == GTU || code == LEU;
!   bool difficult_p = signed_p || unsigned_p;
! 
!   if (// Only do integers and fixed-points.
!       (! SCALAR_INT_MODE_P (mode)
!        && ! ALL_SCALAR_FIXED_POINT_MODE_P (mode))
!       // Only do comparisons against a register.
!       || ! register_operand (*op0, mode))
!     return;
! 
!   // Canonicalize "difficult" reg-reg comparisons.
! 
!   if (! op0_fixed
!       && difficult_p
!       && register_operand (*op1, mode))
!     {
!       std::swap (*op0, *op1);
!       *icode = (int) swap_condition (code);
!       return;
!     }
! 
!   // Canonicalize comparisons against compile-time constants.
! 
!   if (CONST_INT_P (*op1)
!       || CONST_FIXED_P (*op1))
!     {
!       // INT_MODE of the same size.
!       scalar_int_mode imode = int_mode_for_mode (mode).require ();
! 
!       unsigned HOST_WIDE_INT mask = GET_MODE_MASK (imode);
!       unsigned HOST_WIDE_INT maxval = signed_p ? mask >> 1 : mask;
! 
!       // Convert value *op1 to imode.
!       rtx xval = simplify_gen_subreg (imode, *op1, mode, 0);
! 
!       // Canonicalize difficult comparisons against const.
!       if (difficult_p
! 	  && (UINTVAL (xval) & mask) != maxval)
! 	{
! 	  // Convert *op0 > *op1  to *op0 >= 1 + *op1.
! 	  // Convert *op0 <= *op1 to *op0 <  1 + *op1.
! 	  xval = simplify_binary_operation (PLUS, imode, xval, const1_rtx);
! 
! 	  // Convert value back to its original mode.
! 	  *op1 = simplify_gen_subreg (mode, xval, imode, 0);
! 
! 	  // Map  >  to  >=  and  <=  to  <.
! 	  *icode = (int) avr_normalize_condition (code);
! 
! 	  return;
! 	}
! 
!       // Some asymmetric comparisons can be turned into EQ or NE.
!       if (code == LTU && xval == const1_rtx)
! 	{
! 	  *icode = (int) EQ;
! 	  *op1 = CONST0_RTX (mode);
! 	  return;
! 	}
! 
!       if (code == GEU && xval == const1_rtx)
! 	{
! 	  *icode = (int) NE;
! 	  *op1 = CONST0_RTX (mode);
! 	  return;
! 	}
!     }
  }
  
  
*************** avr_out_tstsi (rtx_insn *insn, rtx *op,
*** 6018,6023 ****
--- 6437,6504 ----
  }
  
  
+ /* Output a comparison of a zero- or sign-extended register against a
+    plain register.  CODE is SIGN_EXTEND or ZERO_EXTEND.  Return "".
+ 
+    PLEN != 0: Set *PLEN to the code length in words. Don't output anything.
+    PLEN == 0: Print instructions.  */
+ 
+ const char*
+ avr_out_cmp_ext (rtx xop[], enum rtx_code code, int *plen)
+ {
+   // The smaller reg is the one that's to be extended.  Get its index as z.
+   int z = GET_MODE_SIZE (GET_MODE (xop[1])) < GET_MODE_SIZE (GET_MODE (xop[0]));
+   rtx zreg = xop[z];
+   rtx reg = xop[1 - z];
+   machine_mode mode = GET_MODE (reg);
+   machine_mode zmode = GET_MODE (zreg);
+   rtx zex;
+ 
+   if (plen)
+     *plen = 0;
+ 
+   // zex holds the extended bytes above zreg.  This is 0 for ZERO_EXTEND,
+   // and 0 or -1 for SIGN_EXTEND.
+ 
+   if (code == SIGN_EXTEND)
+     {
+       // Sign-extend the high-byte of zreg to tmp_reg.
+       int zmsb = GET_MODE_SIZE (zmode) - 1;
+       rtx xzmsb = simplify_gen_subreg (QImode, zreg, zmode, zmsb);
+ 
+       avr_asm_len ("mov __tmp_reg__,%0" CR_TAB
+ 		   "rol __tmp_reg__"    CR_TAB
+ 		   "sbc __tmp_reg__,__tmp_reg__", &xzmsb, plen, 3);
+       zex = tmp_reg_rtx;
+     }
+   else if (code == ZERO_EXTEND)
+     {
+       zex = zero_reg_rtx;
+     }
+   else
+     gcc_unreachable();
+ 
+   // Now output n_bytes bytes of the very comparison.
+ 
+   int n_bytes = GET_MODE_SIZE (mode);
+ 
+   avr_asm_len ("cp %0,%1", xop, plen, 1);
+ 
+   for (int b = 1; b < n_bytes; ++b)
+     {
+       rtx regs[2];
+       regs[1 - z] = simplify_gen_subreg (QImode, reg, mode, b);
+       regs[z] = (b < GET_MODE_SIZE (zmode)
+ 		 ? simplify_gen_subreg (QImode, zreg, zmode, b)
+ 		 : zex);
+ 
+       avr_asm_len ("cpc %0,%1", regs, plen, 1);
+     }
+ 
+   return "";
+ }
+ 
+ 
  /* Generate asm equivalent for various shifts.  This only handles cases
     that are not already carefully hand-optimized in ?sh??i3_out.
  
*************** avr_out_plus (rtx insn, rtx *xop, int *p
*** 8160,8165 ****
--- 8641,8762 ----
  }
  
  
+ /* Output an instruction sequence for addition of REG in XOP[0] and CONST_INT
+    in XOP[1] in such a way that SREG.Z and SREG.N are set according to the
+    result.  XOP[2] might be a d-regs clobber register.  If XOP[2] is SCRATCH,
+    then the addition can be performed without a clobber reg.  Return "".
+ 
+    If PLEN == NULL, then output the instructions.
+    If PLEN != NULL, then set *PLEN to the length of the sequence in words. */
+ 
+ const char*
+ avr_out_plus_set_ZN (rtx *xop, int *plen)
+ {
+   if (plen)
+     *plen = 0;
+ 
+   // Register to compare and value to compare against.
+   rtx xreg = xop[0];
+   rtx xval = xop[1];
+ 
+   machine_mode mode = GET_MODE (xreg);
+ 
+   // Number of bytes to operate on.
+   int n_bytes = GET_MODE_SIZE (mode);
+ 
+   if (n_bytes == 1)
+     {
+       if (INTVAL (xval) == 1)
+ 	return avr_asm_len ("inc %0", xop, plen, 1);
+ 
+       if (INTVAL (xval) == -1)
+ 	return avr_asm_len ("dec %0", xop, plen, 1);
+     }
+ 
+   if (n_bytes == 2
+       && test_hard_reg_class (ADDW_REGS, xreg)
+       && IN_RANGE (INTVAL (xval), 1, 63))
+     {
+       // Add 16-bit value in [1..63] to a w register.
+       return avr_asm_len ("adiw %0, %1", xop, plen, 1);
+     }
+ 
+   // Addition won't work; subtract the negative of XVAL instead.
+   xval = simplify_unary_operation (NEG, mode, xval, mode);
+ 
+   // Value (0..0xff) held in clobber register xop[2] or -1 if unknown.
+   int clobber_val = -1;
+ 
+   // [0] = Current sub-register.
+   // [1] = Current partial xval.
+   // [2] = 8-bit clobber d-register or SCRATCH.
+   rtx op[3];
+   op[2] = xop[2];
+ 
+   // Work byte-wise from LSB to MSB.  The lower two bytes might be
+   // SBIW'ed in one go.
+   for (int i = 0; i < n_bytes; ++i)
+     {
+       op[0] = simplify_gen_subreg (QImode, xreg, mode, i);
+ 
+       if (i == 0
+ 	  && n_bytes >= 2
+ 	  && test_hard_reg_class (ADDW_REGS, op[0]))
+ 	{
+ 	  op[1] = simplify_gen_subreg (HImode, xval, mode, 0);
+ 	  if (IN_RANGE (INTVAL (op[1]), 0, 63))
+ 	    {
+ 	      // SBIW can handle the lower 16 bits.
+ 	      avr_asm_len ("sbiw %0, %1", op, plen, 1);
+ 
+ 	      // Next byte has already been handled: Skip it.
+ 	      ++i;
+ 	      continue;
+ 	    }
+ 	}
+ 
+       op[1] = simplify_gen_subreg (QImode, xval, mode, i);
+ 
+       if (test_hard_reg_class (LD_REGS, op[0]))
+ 	{
+ 	  // d-regs can subtract immediates.
+ 	  avr_asm_len (i == 0
+ 		       ? "subi %0, %1"
+ 		       : "sbci %0, %1", op, plen, 1);
+ 	}
+       else
+ 	{
+ 	  int val8 = 0xff & INTVAL (op[1]);
+ 	  if (val8 == 0)
+ 	    {
+ 	      // Any register can subtract 0.
+ 	      avr_asm_len (i == 0
+ 			   ? "sub %0, __zero_reg__"
+ 			   : "sbc %0, __zero_reg__", op, plen, 1);
+ 	    }
+ 	  else
+ 	    {
+ 	      // Use d-register to hold partial xval.
+ 
+ 	      if (val8 != clobber_val)
+ 		{
+ 		  // Load partial xval to QI clobber reg and memoize for later.
+ 		  gcc_assert (REG_P (op[2]));
+ 		  avr_asm_len ("ldi %2, %1", op, plen, 1);
+ 		  clobber_val = val8;
+ 		}
+ 
+ 	      avr_asm_len (i == 0
+ 			   ? "sub %0, %2"
+ 			   : "sbc %0, %2", op, plen, 1);
+ 	    }
+ 	}
+     } // Loop bytes.
+ 
+   return "";
+ }
+ 
+ 
  /* Output bit operation (IOR, AND, XOR) with register XOP[0] and compile
     time constant XOP[2]:
  
*************** avr_adjust_insn_length (rtx_insn *insn,
*** 9291,9296 ****
--- 9888,9895 ----
      case ADJUST_LEN_TSTSI: avr_out_tstsi (insn, op, &len); break;
      case ADJUST_LEN_COMPARE: avr_out_compare (insn, op, &len); break;
      case ADJUST_LEN_COMPARE64: avr_out_compare64 (insn, op, &len); break;
+     case ADJUST_LEN_CMP_UEXT: avr_out_cmp_ext (op, ZERO_EXTEND, &len); break;
+     case ADJUST_LEN_CMP_SEXT: avr_out_cmp_ext (op, SIGN_EXTEND, &len); break;
  
      case ADJUST_LEN_LSHRQI: lshrqi3_out (insn, op, &len); break;
      case ADJUST_LEN_LSHRHI: lshrhi3_out (insn, op, &len); break;
*************** avr_adjust_insn_length (rtx_insn *insn,
*** 9311,9316 ****
--- 9910,9916 ----
      case ADJUST_LEN_CALL: len = AVR_HAVE_JMP_CALL ? 2 : 1; break;
  
      case ADJUST_LEN_INSERT_BITS: avr_out_insert_bits (op, &len); break;
+     case ADJUST_LEN_ADD_SET_ZN: avr_out_plus_set_ZN (op, &len); break;
  
      case ADJUST_LEN_INSV_NOTBIT:
        avr_out_insert_notbit (insn, op, NULL_RTX, &len);
*************** avr_handle_addr_attribute (tree *node, t
*** 9640,9645 ****
--- 10240,10249 ----
  			   int flags ATTRIBUTE_UNUSED, bool *no_add)
  {
    bool io_p = startswith (IDENTIFIER_POINTER (name), "io");
+   HOST_WIDE_INT io_start = avr_arch->sfr_offset;
+   HOST_WIDE_INT io_end = strcmp (IDENTIFIER_POINTER (name), "io_low") == 0
+     ? io_start + 0x1f
+     : io_start + 0x3f;
    location_t loc = DECL_SOURCE_LOCATION (*node);
  
    if (!VAR_P (*node))
*************** avr_handle_addr_attribute (tree *node, t
*** 9663,9674 ****
  	}
        else if (io_p
  	       && (!tree_fits_shwi_p (arg)
! 		   || !(strcmp (IDENTIFIER_POINTER (name), "io_low") == 0
! 			? low_io_address_operand : io_address_operand)
! 			 (GEN_INT (TREE_INT_CST_LOW (arg)), QImode)))
  	{
! 	  warning_at (loc, OPT_Wattributes, "%qE attribute address "
! 		      "out of range", name);
  	  *no_add = true;
  	}
        else
--- 10267,10276 ----
  	}
        else if (io_p
  	       && (!tree_fits_shwi_p (arg)
! 		   || ! IN_RANGE (TREE_INT_CST_LOW (arg), io_start, io_end)))
  	{
! 	  warning_at (loc, OPT_Wattributes, "%qE attribute address out of range"
! 		      " 0x%x%s0x%x", name, (int) io_start, "...", (int) io_end);
  	  *no_add = true;
  	}
        else
*************** avr_handle_addr_attribute (tree *node, t
*** 9694,9699 ****
--- 10296,10307 ----
      warning_at (loc, OPT_Wattributes, "%qE attribute on non-volatile variable",
  		name);
  
+   // Optimizers must not draw any conclusions from "static int addr;" etc.
+   // because the contents of `addr' are not given by its initializer but
+   // by the contents at the address as specified by the attribute.
+   if (VAR_P (*node) && ! *no_add)
+     TREE_THIS_VOLATILE (*node) = 1;
+ 
    return NULL_TREE;
  }
  
*************** avr_eval_addr_attrib (rtx x)
*** 9711,9717 ****
  	  attr = lookup_attribute ("io", DECL_ATTRIBUTES (decl));
            if (!attr || !TREE_VALUE (attr))
              attr = lookup_attribute ("io_low", DECL_ATTRIBUTES (decl));
- 	  gcc_assert (attr);
  	}
        if (!attr || !TREE_VALUE (attr))
  	attr = lookup_attribute ("address", DECL_ATTRIBUTES (decl));
--- 10319,10324 ----
*************** avr_pgm_check_var_decl (tree node)
*** 9958,9963 ****
--- 10565,10581 ----
  static void
  avr_insert_attributes (tree node, tree *attributes)
  {
+   if (VAR_P (node)
+       && ! TREE_STATIC (node)
+       && ! DECL_EXTERNAL (node))
+     {
+       const char *names[] = { "io", "io_low", "address", NULL };
+       for (const char **p = names; *p; ++p)
+ 	if (lookup_attribute (*p, *attributes))
+ 	  error ("variable %q+D with attribute %qs must be located in "
+ 		 "static storage", node, *p);
+     }
+ 
    avr_pgm_check_var_decl (node);
  
    if (TARGET_MAIN_IS_OS_TASK
*************** avr_insert_attributes (tree node, tree *
*** 10018,10054 ****
  /* Track need of __do_clear_bss.  */
  
  void
! avr_asm_output_aligned_decl_common (FILE * stream,
!                                     tree decl,
!                                     const char *name,
!                                     unsigned HOST_WIDE_INT size,
!                                     unsigned int align, bool local_p)
  {
-   rtx mem = decl == NULL_TREE ? NULL_RTX : DECL_RTL (decl);
-   rtx symbol;
- 
-   if (mem != NULL_RTX && MEM_P (mem)
-       && SYMBOL_REF_P ((symbol = XEXP (mem, 0)))
-       && (SYMBOL_REF_FLAGS (symbol) & (SYMBOL_FLAG_IO | SYMBOL_FLAG_ADDRESS)))
-     {
-       if (!local_p)
- 	{
- 	  fprintf (stream, "\t.globl\t");
- 	  assemble_name (stream, name);
- 	  fprintf (stream, "\n");
- 	}
-       if (SYMBOL_REF_FLAGS (symbol) & SYMBOL_FLAG_ADDRESS)
- 	{
- 	  assemble_name (stream, name);
- 	  fprintf (stream, " = %ld\n",
- 		   (long) INTVAL (avr_eval_addr_attrib (symbol)));
- 	}
-       else if (local_p)
- 	error_at (DECL_SOURCE_LOCATION (decl),
- 		  "static IO declaration for %q+D needs an address", decl);
-       return;
-     }
- 
    /* __gnu_lto_slim is just a marker for the linker injected by toplev.cc.
       There is no need to trigger __do_clear_bss code for them.  */
  
--- 10636,10646 ----
  /* Track need of __do_clear_bss.  */
  
  void
! avr_asm_output_aligned_decl_common (FILE *stream, tree /* decl */,
! 				    const char *name,
! 				    unsigned HOST_WIDE_INT size,
! 				    unsigned int align, bool local_p)
  {
    /* __gnu_lto_slim is just a marker for the linker injected by toplev.cc.
       There is no need to trigger __do_clear_bss code for them.  */
  
*************** avr_asm_output_aligned_decl_common (FILE
*** 10061,10066 ****
--- 10653,10661 ----
      ASM_OUTPUT_ALIGNED_COMMON (stream, name, size, align);
  }
  
+ 
+ /* Implement `ASM_OUTPUT_ALIGNED_BSS'.  */
+ 
  void
  avr_asm_asm_output_aligned_bss (FILE *file, tree decl, const char *name,
  				unsigned HOST_WIDE_INT size, int align,
*************** avr_asm_asm_output_aligned_bss (FILE *fi
*** 10068,10087 ****
  				  (FILE *, tree, const char *,
  				   unsigned HOST_WIDE_INT, int))
  {
!   rtx mem = decl == NULL_TREE ? NULL_RTX : DECL_RTL (decl);
!   rtx symbol;
  
!   if (mem != NULL_RTX && MEM_P (mem)
!       && SYMBOL_REF_P ((symbol = XEXP (mem, 0)))
!       && (SYMBOL_REF_FLAGS (symbol) & (SYMBOL_FLAG_IO | SYMBOL_FLAG_ADDRESS)))
!     {
!       if (!(SYMBOL_REF_FLAGS (symbol) & SYMBOL_FLAG_ADDRESS))
! 	error_at (DECL_SOURCE_LOCATION (decl),
! 		  "IO definition for %q+D needs an address", decl);
!       avr_asm_output_aligned_decl_common (file, decl, name, size, align, false);
!     }
!   else
!     default_func (file, decl, name, size, align);
  }
  
  
--- 10663,10672 ----
  				  (FILE *, tree, const char *,
  				   unsigned HOST_WIDE_INT, int))
  {
!   if (!startswith (name, "__gnu_lto"))
!     avr_need_clear_bss_p = true;
  
!   default_func (file, decl, name, size, align);
  }
  
  
*************** avr_output_progmem_section_asm_op (const
*** 10120,10125 ****
--- 10705,10762 ----
  }
  
  
+ /* A noswitch section callback to output symbol definitions for
+    attributes "io", "io_low" and "address".  */
+ 
+ static bool
+ avr_output_addr_attrib (tree decl, const char *name,
+ 			unsigned HOST_WIDE_INT /* size */,
+ 			unsigned HOST_WIDE_INT /* align */)
+ {
+   gcc_assert (DECL_RTL_SET_P (decl));
+ 
+   FILE *stream = asm_out_file;
+   bool local_p = ! DECL_WEAK (decl) && ! TREE_PUBLIC (decl);
+   rtx symbol, mem = DECL_RTL (decl);
+ 
+   if (mem != NULL_RTX && MEM_P (mem)
+       && SYMBOL_REF_P ((symbol = XEXP (mem, 0)))
+       && (SYMBOL_REF_FLAGS (symbol) & (SYMBOL_FLAG_IO | SYMBOL_FLAG_ADDRESS)))
+     {
+       if (! local_p)
+ 	{
+ 	  fprintf (stream, "\t%s\t", DECL_WEAK (decl) ? ".weak" : ".globl");
+ 	  assemble_name (stream, name);
+ 	  fprintf (stream, "\n");
+ 	}
+ 
+       if (SYMBOL_REF_FLAGS (symbol) & SYMBOL_FLAG_ADDRESS)
+ 	{
+ 	  assemble_name (stream, name);
+ 	  fprintf (stream, " = %ld\n",
+ 		   (long) INTVAL (avr_eval_addr_attrib (symbol)));
+ 	}
+       else if (local_p)
+ 	{
+ 	  const char *names[] = { "io", "io_low", "address", NULL };
+ 	  for (const char **p = names; *p; ++p)
+ 	    if (lookup_attribute (*p, DECL_ATTRIBUTES (decl)))
+ 	      {
+ 		error ("static attribute %qs declaration for %q+D needs an "
+ 		       "address", *p, decl);
+ 		break;
+ 	      }
+ 	}
+ 
+       return true;
+     }
+ 
+   gcc_unreachable();
+ 
+   return false;
+ }
+ 
+ 
  /* Implement `TARGET_ASM_INIT_SECTIONS'.  */
  
  static void
*************** avr_asm_init_sections (void)
*** 10135,10140 ****
--- 10772,10778 ----
      readonly_data_section->unnamed.callback = avr_output_data_section_asm_op;
    data_section->unnamed.callback = avr_output_data_section_asm_op;
    bss_section->unnamed.callback = avr_output_bss_section_asm_op;
+   tls_comm_section->noswitch.callback = avr_output_addr_attrib;
  }
  
  
*************** avr_encode_section_info (tree decl, rtx
*** 10311,10325 ****
  
        tree io_low_attr = lookup_attribute ("io_low", attr);
        tree io_attr = lookup_attribute ("io", attr);
  
        if (io_low_attr
  	  && TREE_VALUE (io_low_attr) && TREE_VALUE (TREE_VALUE (io_low_attr)))
! 	addr_attr = io_attr;
        else if (io_attr
  	       && TREE_VALUE (io_attr) && TREE_VALUE (TREE_VALUE (io_attr)))
  	addr_attr = io_attr;
        else
! 	addr_attr = lookup_attribute ("address", attr);
        if (io_low_attr
  	  || (io_attr && addr_attr
                && low_io_address_operand
--- 10949,10965 ----
  
        tree io_low_attr = lookup_attribute ("io_low", attr);
        tree io_attr = lookup_attribute ("io", attr);
+       tree address_attr = lookup_attribute ("address", attr);
  
        if (io_low_attr
  	  && TREE_VALUE (io_low_attr) && TREE_VALUE (TREE_VALUE (io_low_attr)))
! 	addr_attr = io_low_attr;
        else if (io_attr
  	       && TREE_VALUE (io_attr) && TREE_VALUE (TREE_VALUE (io_attr)))
  	addr_attr = io_attr;
        else
! 	addr_attr = address_attr;
! 
        if (io_low_attr
  	  || (io_attr && addr_attr
                && low_io_address_operand
*************** avr_encode_section_info (tree decl, rtx
*** 10334,10339 ****
--- 10974,11009 ----
  	 don't use the exact value for constant propagation.  */
        if (addr_attr && !DECL_EXTERNAL (decl))
  	SYMBOL_REF_FLAGS (sym) |= SYMBOL_FLAG_ADDRESS;
+ 
+       if (io_attr || io_low_attr || address_attr)
+ 	{
+ 	  if (DECL_INITIAL (decl))
+ 	    {
+ 	      /* Initializers are not yet parsed in TARGET_INSERT_ATTRIBUTES,
+ 		 hence deny initializers now.  The values of symbols with an
+ 		 address attribute are determined by the attribute, not by
+ 		 some initializer.  */
+ 
+ 	      error ("variable %q+D with attribute %qs must not have an "
+ 		     "initializer", decl,
+ 		     io_low_attr ? "io_low" : io_attr ? "io" : "address");
+ 	    }
+ 	  else
+ 	    {
+ 	      /* PR112952: The only way to output a variable declaration in a
+ 		 custom manner is by means of a noswitch section callback.
+ 		 There are only three noswitch sections: comm_section,
+ 		 lcomm_section and tls_comm_section.  And there is no way to
+ 		 wire a custom noswitch section to a decl.  As lcomm_section
+ 		 is bypassed with -fdata-sections -fno-common, there is no
+ 		 other way than making use of tls_comm_section.  As we are
+ 		 using that section anyway, also use it in the public case.  */
+ 
+ 	      DECL_COMMON (decl) = 1;
+ 	      set_decl_section_name (decl, (const char*) nullptr);
+ 	      set_decl_tls_model (decl, (tls_model) 2);
+ 	    }
+ 	}
      }
  
    if (AVR_TINY
*************** avr_mul_highpart_cost (rtx x, int)
*** 10607,10612 ****
--- 11277,11334 ----
  }
  
  
+ /* Return the expected cost of a conditional branch like
+    (set (pc)
+ 	(if_then_else (X)
+ 		      (label_ref *)
+ 		      (pc)))
+    where X is some comparison operator.  */
+ 
+ static int
+ avr_cbranch_cost (rtx x)
+ {
+   bool difficult_p = difficult_comparison_operator (x, VOIDmode);
+ 
+   if (reload_completed)
+     {
+       // After reload, we basically just have plain branches.
+       return COSTS_N_INSNS (1 + difficult_p);
+     }
+ 
+   rtx xreg = XEXP (x, 0);
+   rtx xval = XEXP (x, 1);
+   machine_mode mode = GET_MODE (xreg);
+   if (mode == VOIDmode)
+     mode = GET_MODE (xval);
+   int size = GET_MODE_SIZE (mode);
+ 
+   if (GET_CODE (xreg) == ZERO_EXTEND
+       || GET_CODE (xval) == ZERO_EXTEND)
+     {
+       // *cbranch..0/1, code = zero_extend.
+       return COSTS_N_INSNS (size + 1);
+     }
+ 
+   if (GET_CODE (xreg) == SIGN_EXTEND
+       || GET_CODE (xval) == SIGN_EXTEND)
+     {
+       // *cbranch..0/1, code = sign_extend.
+       // Make it a bit cheaper than it actually is (less reg pressure).
+       return COSTS_N_INSNS (size + 1 + 1);
+     }
+ 
+   bool reg_p = register_operand (xreg, mode);
+   bool reg_or_0_p = reg_or_0_operand (xval, mode);
+ 
+   return COSTS_N_INSNS (size
+ 			// For the branch
+ 			+ 1 + difficult_p
+ 			// Combine might propagate constants other than zero
+ 			// into the 2nd operand.  Make that more expensive.
+ 			+ 1 * (!reg_p || !reg_or_0_p));
+ }
+ 
+ 
  /* Mutually recursive subroutine of avr_rtx_cost for calculating the
     cost of an RTX operand given its context.  X is the rtx of the
     operand, MODE is its mode, and OUTER is the rtx_code of this
*************** avr_rtx_costs_1 (rtx x, machine_mode mod
*** 10844,10849 ****
--- 11566,11580 ----
              *total += COSTS_N_INSNS (1);
            return true;
          }
+       if (IOR == code
+           && AND == GET_CODE (XEXP (x, 0))
+           && AND == GET_CODE (XEXP (x, 1))
+           && single_zero_operand (XEXP (XEXP (x, 0), 1), mode))
+         {
+           // Open-coded bit transfer.
+           *total = COSTS_N_INSNS (2);
+           return true;
+         }
        *total = COSTS_N_INSNS (GET_MODE_SIZE (mode));
        *total += avr_operand_rtx_cost (XEXP (x, 0), mode, code, 0, speed);
        if (!CONST_INT_P (XEXP (x, 1)))
*************** avr_rtx_costs_1 (rtx x, machine_mode mod
*** 11490,11495 ****
--- 12221,12235 ----
          }
        break;
  
+     case IF_THEN_ELSE:
+       if (outer_code == SET
+ 	  && XEXP (x, 2) == pc_rtx
+ 	  && ordered_comparison_operator (XEXP (x, 0), VOIDmode))
+ 	{
+ 	  *total = avr_cbranch_cost (XEXP (x, 0));
+ 	  return true;
+ 	}
+ 
      default:
        break;
      }
*************** avr_rtx_costs (rtx x, machine_mode mode,
*** 11515,11520 ****
--- 12255,12306 ----
  }
  
  
+ /* Implement `TARGET_INSN_COST'.  */
+ /* For some insns, it is not enough to look at the cost of the SET_SRC.
+    In that case, have a look at the entire insn, e.g. during insn combine.  */
+ 
+ static int
+ avr_insn_cost (rtx_insn *insn, bool speed)
+ {
+   const int unknown_cost = -1;
+   int cost = unknown_cost;
+ 
+   rtx set = single_set (insn);
+ 
+   if (set
+       && ZERO_EXTRACT == GET_CODE (SET_DEST (set)))
+     {
+       // Try find anything that would flip the extracted bit.
+       bool not_bit_p = false;
+ 
+       subrtx_iterator::array_type array;
+       FOR_EACH_SUBRTX (iter, array, SET_SRC (set), NONCONST)
+ 	{
+ 	  enum rtx_code code = GET_CODE (*iter);
+ 	  not_bit_p |= code == NOT || code == XOR || code == GE;
+ 	}
+ 
+       // Don't go too deep into the analysis.  In almost all cases,
+       // using BLD/BST is the best we can do for single-bit moves,
+       // even considering CSE.
+       cost = COSTS_N_INSNS (2 + not_bit_p);
+     }
+ 
+   if (cost != unknown_cost)
+     {
+       if (avr_log.rtx_costs)
+ 	avr_edump ("\n%? (%s) insn_cost=%d\n%r\n",
+ 		   speed ? "speed" : "size", cost, insn);
+       return cost;
+     }
+ 
+   // Resort to what rtlanal.cc::insn_cost() implements as a default
+   // when targetm.insn_cost() is not implemented.
+ 
+   return pattern_cost (PATTERN (insn), speed);
+ }
+ 
+ 
  /* Implement `TARGET_ADDRESS_COST'.  */
  
  static int
*************** avr_normalize_condition (RTX_CODE condit
*** 11602,11882 ****
      }
  }
  
- /* Helper function for `avr_reorg'.  */
- 
- static rtx
- avr_compare_pattern (rtx_insn *insn)
- {
-   rtx pattern = single_set (insn);
- 
-   if (pattern
-       && NONJUMP_INSN_P (insn)
-       && REG_P (SET_DEST (pattern))
-       && REGNO (SET_DEST (pattern)) == REG_CC
-       && GET_CODE (SET_SRC (pattern)) == COMPARE)
-     {
-       machine_mode mode0 = GET_MODE (XEXP (SET_SRC (pattern), 0));
-       machine_mode mode1 = GET_MODE (XEXP (SET_SRC (pattern), 1));
- 
-       /* The 64-bit comparisons have fixed operands ACC_A and ACC_B.
-          They must not be swapped, thus skip them.  */
- 
-       if ((mode0 == VOIDmode || GET_MODE_SIZE (mode0) <= 4)
-           && (mode1 == VOIDmode || GET_MODE_SIZE (mode1) <= 4))
-         return pattern;
-     }
- 
-   return NULL_RTX;
- }
- 
- /* Helper function for `avr_reorg'.  */
- 
- /* Expansion of switch/case decision trees leads to code like
- 
-        REG_CC = compare (Reg, Num)
-        if (REG_CC == 0)
-          goto L1
- 
-        REG_CC = compare (Reg, Num)
-        if (REG_CC > 0)
-          goto L2
- 
-    The second comparison is superfluous and can be deleted.
-    The second jump condition can be transformed from a
-    "difficult" one to a "simple" one because "REG_CC > 0" and
-    "REG_CC >= 0" will have the same effect here.
- 
-    This function relies on the way switch/case is being expaned
-    as binary decision tree.  For example code see PR 49903.
- 
-    Return TRUE if optimization performed.
-    Return FALSE if nothing changed.
- 
-    INSN1 is a comparison, i.e. avr_compare_pattern != 0.
- 
-    We don't want to do this in text peephole because it is
-    tedious to work out jump offsets there and the second comparison
-    might have been transormed by `avr_reorg'.
- 
-    RTL peephole won't do because peephole2 does not scan across
-    basic blocks.  */
- 
- static bool
- avr_reorg_remove_redundant_compare (rtx_insn *insn1)
- {
-   rtx comp1, ifelse1, xcond1;
-   rtx_insn *branch1;
-   rtx comp2, ifelse2, xcond2;
-   rtx_insn *branch2, *insn2;
-   enum rtx_code code;
-   rtx_insn *jump;
-   rtx target, cond;
- 
-   /* Look out for:  compare1 - branch1 - compare2 - branch2  */
- 
-   branch1 = next_nonnote_nondebug_insn (insn1);
-   if (!branch1 || !JUMP_P (branch1))
-     return false;
- 
-   insn2 = next_nonnote_nondebug_insn (branch1);
-   if (!insn2 || !avr_compare_pattern (insn2))
-     return false;
- 
-   branch2 = next_nonnote_nondebug_insn (insn2);
-   if (!branch2 || !JUMP_P (branch2))
-     return false;
- 
-   comp1 = avr_compare_pattern (insn1);
-   comp2 = avr_compare_pattern (insn2);
-   xcond1 = single_set (branch1);
-   xcond2 = single_set (branch2);
- 
-   if (!comp1 || !comp2
-       || !rtx_equal_p (comp1, comp2)
-       || !xcond1 || SET_DEST (xcond1) != pc_rtx
-       || !xcond2 || SET_DEST (xcond2) != pc_rtx
-       || IF_THEN_ELSE != GET_CODE (SET_SRC (xcond1))
-       || IF_THEN_ELSE != GET_CODE (SET_SRC (xcond2)))
-     {
-       return false;
-     }
- 
-   comp1 = SET_SRC (comp1);
-   ifelse1 = SET_SRC (xcond1);
-   ifelse2 = SET_SRC (xcond2);
- 
-   /* comp is COMPARE now and ifelse is IF_THEN_ELSE.  */
- 
-   if (EQ != GET_CODE (XEXP (ifelse1, 0))
-       || !REG_P (XEXP (comp1, 0))
-       || !CONST_INT_P (XEXP (comp1, 1))
-       || XEXP (ifelse1, 2) != pc_rtx
-       || XEXP (ifelse2, 2) != pc_rtx
-       || LABEL_REF != GET_CODE (XEXP (ifelse1, 1))
-       || LABEL_REF != GET_CODE (XEXP (ifelse2, 1))
-       || !COMPARISON_P (XEXP (ifelse2, 0))
-       || REG_CC != REGNO (XEXP (XEXP (ifelse1, 0), 0))
-       || REG_CC != REGNO (XEXP (XEXP (ifelse2, 0), 0))
-       || const0_rtx != XEXP (XEXP (ifelse1, 0), 1)
-       || const0_rtx != XEXP (XEXP (ifelse2, 0), 1))
-     {
-       return false;
-     }
- 
-   /* We filtered the insn sequence to look like
- 
-         (set (reg:CC cc)
-              (compare (reg:M N)
-                       (const_int VAL)))
-         (set (pc)
-              (if_then_else (eq (reg:CC cc)
-                                (const_int 0))
-                            (label_ref L1)
-                            (pc)))
- 
-         (set (reg:CC cc)
-              (compare (reg:M N)
-                       (const_int VAL)))
-         (set (pc)
-              (if_then_else (CODE (reg:CC cc)
-                                  (const_int 0))
-                            (label_ref L2)
-                            (pc)))
-   */
- 
-   code = GET_CODE (XEXP (ifelse2, 0));
- 
-   /* Map GT/GTU to GE/GEU which is easier for AVR.
-      The first two instructions compare/branch on EQ
-      so we may replace the difficult
- 
-         if (x == VAL)   goto L1;
-         if (x > VAL)    goto L2;
- 
-      with easy
- 
-          if (x == VAL)   goto L1;
-          if (x >= VAL)   goto L2;
- 
-      Similarly, replace LE/LEU by LT/LTU.  */
- 
-   switch (code)
-     {
-     case EQ:
-     case LT:  case LTU:
-     case GE:  case GEU:
-       break;
- 
-     case LE:  case LEU:
-     case GT:  case GTU:
-       code = avr_normalize_condition (code);
-       break;
- 
-     default:
-       return false;
-     }
- 
-   /* Wrap the branches into UNSPECs so they won't be changed or
-      optimized in the remainder.  */
- 
-   target = XEXP (XEXP (ifelse1, 1), 0);
-   cond = XEXP (ifelse1, 0);
-   jump = emit_jump_insn_after (gen_branch_unspec (target, cond), insn1);
- 
-   JUMP_LABEL (jump) = JUMP_LABEL (branch1);
- 
-   target = XEXP (XEXP (ifelse2, 1), 0);
-   cond = gen_rtx_fmt_ee (code, VOIDmode, cc_reg_rtx, const0_rtx);
-   jump = emit_jump_insn_after (gen_branch_unspec (target, cond), insn2);
- 
-   JUMP_LABEL (jump) = JUMP_LABEL (branch2);
- 
-   /* The comparisons in insn1 and insn2 are exactly the same;
-      insn2 is superfluous so delete it.  */
- 
-   delete_insn (insn2);
-   delete_insn (branch1);
-   delete_insn (branch2);
- 
-   return true;
- }
- 
- 
- /* Implement `TARGET_MACHINE_DEPENDENT_REORG'.  */
- /* Optimize conditional jumps.  */
- 
- static void
- avr_reorg (void)
- {
-   rtx_insn *insn = get_insns();
- 
-   for (insn = next_real_insn (insn); insn; insn = next_real_insn (insn))
-     {
-       rtx pattern = avr_compare_pattern (insn);
- 
-       if (!pattern)
-         continue;
- 
-       if (optimize
-           && avr_reorg_remove_redundant_compare (insn))
-         {
-           continue;
-         }
- 
-       if (compare_diff_p (insn))
- 	{
-           /* Now we work under compare insn with difficult branch.  */
- 
- 	  rtx_insn *next = next_real_insn (insn);
-           rtx pat = PATTERN (next);
-           if (GET_CODE (pat) == PARALLEL)
-             pat = XVECEXP (pat, 0, 0);
- 
-           pattern = SET_SRC (pattern);
- 
-           if (true_regnum (XEXP (pattern, 0)) >= 0
-               && true_regnum (XEXP (pattern, 1)) >= 0)
-             {
-               rtx x = XEXP (pattern, 0);
-               rtx src = SET_SRC (pat);
-               rtx t = XEXP (src, 0);
-               PUT_CODE (t, swap_condition (GET_CODE (t)));
-               XEXP (pattern, 0) = XEXP (pattern, 1);
-               XEXP (pattern, 1) = x;
-               INSN_CODE (next) = -1;
-             }
-           else if (true_regnum (XEXP (pattern, 0)) >= 0
-                    && XEXP (pattern, 1) == const0_rtx)
-             {
-               /* This is a tst insn, we can reverse it.  */
-               rtx src = SET_SRC (pat);
-               rtx t = XEXP (src, 0);
- 
-               PUT_CODE (t, swap_condition (GET_CODE (t)));
-               XEXP (pattern, 1) = XEXP (pattern, 0);
-               XEXP (pattern, 0) = const0_rtx;
-               INSN_CODE (next) = -1;
-               INSN_CODE (insn) = -1;
-             }
-           else if (true_regnum (XEXP (pattern, 0)) >= 0
-                    && CONST_INT_P (XEXP (pattern, 1)))
-             {
-               rtx x = XEXP (pattern, 1);
-               rtx src = SET_SRC (pat);
-               rtx t = XEXP (src, 0);
-               machine_mode mode = GET_MODE (XEXP (pattern, 0));
- 
-               if (avr_simplify_comparison_p (mode, GET_CODE (t), x))
-                 {
-                   XEXP (pattern, 1) = gen_int_mode (INTVAL (x) + 1, mode);
-                   PUT_CODE (t, avr_normalize_condition (GET_CODE (t)));
-                   INSN_CODE (next) = -1;
-                   INSN_CODE (insn) = -1;
-                 }
-             }
-         }
-     }
- }
  
  /* Returns register number for function return value.*/
  
--- 12388,12393 ----
*************** avr_float_lib_compare_returns_bool (mach
*** 14572,14577 ****
--- 15083,15090 ----
  #undef  TARGET_ASM_FINAL_POSTSCAN_INSN
  #define TARGET_ASM_FINAL_POSTSCAN_INSN avr_asm_final_postscan_insn
  
+ #undef  TARGET_INSN_COST
+ #define TARGET_INSN_COST avr_insn_cost
  #undef  TARGET_REGISTER_MOVE_COST
  #define TARGET_REGISTER_MOVE_COST avr_register_move_cost
  #undef  TARGET_MEMORY_MOVE_COST
*************** avr_float_lib_compare_returns_bool (mach
*** 14580,14587 ****
  #define TARGET_RTX_COSTS avr_rtx_costs
  #undef  TARGET_ADDRESS_COST
  #define TARGET_ADDRESS_COST avr_address_cost
- #undef  TARGET_MACHINE_DEPENDENT_REORG
- #define TARGET_MACHINE_DEPENDENT_REORG avr_reorg
  #undef  TARGET_FUNCTION_ARG
  #define TARGET_FUNCTION_ARG avr_function_arg
  #undef  TARGET_FUNCTION_ARG_ADVANCE
--- 15093,15098 ----
*************** avr_float_lib_compare_returns_bool (mach
*** 14711,14716 ****
--- 15222,15233 ----
  #undef  TARGET_MD_ASM_ADJUST
  #define TARGET_MD_ASM_ADJUST avr_md_asm_adjust
  
+ #undef  TARGET_CAN_INLINE_P
+ #define TARGET_CAN_INLINE_P avr_can_inline_p
+ 
+ #undef  TARGET_CANONICALIZE_COMPARISON
+ #define TARGET_CANONICALIZE_COMPARISON avr_canonicalize_comparison
+ 
  struct gcc_target targetm = TARGET_INITIALIZER;
  
  
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr.h gcc-12.4.0/gcc/config/avr/avr.h
*** gcc-12.3.0/gcc/config/avr/avr.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr.h	Thu Jun 20 08:08:06 2024
*************** typedef struct avr_args
*** 500,508 ****
--- 500,510 ----
  
  extern const char *avr_devicespecs_file (int, const char**);
  extern const char *avr_double_lib (int, const char**);
+ extern const char *avr_no_devlib (int, const char**);
  
  #define EXTRA_SPEC_FUNCTIONS                            \
    { "double-lib", avr_double_lib },                     \
+   { "no-devlib", avr_no_devlib },                       \
    { "device-specs-file", avr_devicespecs_file },
  
  /* Driver self specs has lmited functionality w.r.t. '%s' for dynamic specs.
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr.md gcc-12.4.0/gcc/config/avr/avr.md
*** gcc-12.3.0/gcc/config/avr/avr.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr.md	Thu Jun 20 08:08:06 2024
***************
*** 77,83 ****
     UNSPEC_FMULS
     UNSPEC_FMULSU
     UNSPEC_COPYSIGN
-    UNSPEC_IDENTITY
     UNSPEC_INSERT_BITS
     UNSPEC_ROUND
     ])
--- 77,82 ----
***************
*** 165,170 ****
--- 164,170 ----
     ashlsi, ashrsi, lshrsi,
     ashlpsi, ashrpsi, lshrpsi,
     insert_bits, insv_notbit, insv_notbit_0, insv_notbit_7,
+    add_set_ZN, cmp_uext, cmp_sext,
     no"
    (const_string "no"))
  
***************
*** 251,261 ****
--- 251,273 ----
  (define_mode_iterator QIHI2 [QI HI])
  (define_mode_iterator QISI  [QI HI PSI SI])
  (define_mode_iterator QIDI  [QI HI PSI SI DI])
+ (define_mode_iterator QIPSI [QI HI PSI])
  (define_mode_iterator HISI  [HI PSI SI])
  
+ ;; Ordered integral and fixed-point modes of specific sizes.
  (define_mode_iterator ALL1 [QI QQ UQQ])
  (define_mode_iterator ALL2 [HI HQ UHQ HA UHA])
  (define_mode_iterator ALL4 [SI SQ USQ SA USA])
+ (define_mode_iterator ALL234 [HI SI PSI
+                               HQ UHQ HA UHA
+                               SQ USQ SA USA])
+ 
+ ;; Ordered signed integral and signed fixed-point modes of specific sizes.
+ (define_mode_iterator ALLs1 [QI QQ])
+ (define_mode_iterator ALLs2 [HI HQ HA])
+ (define_mode_iterator ALLs4 [SI SQ SA])
+ (define_mode_iterator ALLs234 [HI SI PSI
+                                HQ HA SQ SA])
  
  ;; All supported move-modes
  (define_mode_iterator MOVMODE [QI QQ UQQ
***************
*** 273,287 ****
                                 SQ USQ SA USA])
  
  ;; Define code iterators
! ;; Define two incarnations so that we can build the cross product.
  (define_code_iterator any_extend  [sign_extend zero_extend])
  (define_code_iterator any_extend2 [sign_extend zero_extend])
  (define_code_iterator any_extract [sign_extract zero_extract])
  (define_code_iterator any_shiftrt [lshiftrt ashiftrt])
  
  (define_code_iterator bitop [xor ior and])
  (define_code_iterator xior [xor ior])
  (define_code_iterator eqne [eq ne])
  
  (define_code_iterator ss_addsub [ss_plus ss_minus])
  (define_code_iterator us_addsub [us_plus us_minus])
--- 285,301 ----
                                 SQ USQ SA USA])
  
  ;; Define code iterators
! ;; Define two incarnations so that we can build the cartesian product.
  (define_code_iterator any_extend  [sign_extend zero_extend])
  (define_code_iterator any_extend2 [sign_extend zero_extend])
  (define_code_iterator any_extract [sign_extract zero_extract])
  (define_code_iterator any_shiftrt [lshiftrt ashiftrt])
  
+ (define_code_iterator piaop [plus ior and])
  (define_code_iterator bitop [xor ior and])
  (define_code_iterator xior [xor ior])
  (define_code_iterator eqne [eq ne])
+ (define_code_iterator gelt [ge lt])
  
  (define_code_iterator ss_addsub [ss_plus ss_minus])
  (define_code_iterator us_addsub [us_plus us_minus])
***************
*** 309,314 ****
--- 323,332 ----
    [(ss_minus "") (us_minus "")
     (ss_plus "%") (us_plus "%")])
  
+ (define_code_attr gelt_eqne
+   [(ge "eq")
+    (lt "ne")])
+ 
  ;; Map RTX code to its standard insn name
  (define_code_attr code_stdname
    [(ashift   "ashl")
***************
*** 1529,1537 ****
    "#"
    "&& reload_completed"
    [(parallel [(set (match_dup 0)
!                    (plus:HI
!                      (zero_extend:HI (match_dup 1))
!                      (zero_extend:HI (match_dup 2))))
                (clobber (reg:CC REG_CC))])])
  
  
--- 1547,1554 ----
    "#"
    "&& reload_completed"
    [(parallel [(set (match_dup 0)
!                    (plus:HI (zero_extend:HI (match_dup 1))
!                             (zero_extend:HI (match_dup 2))))
                (clobber (reg:CC REG_CC))])])
  
  
***************
*** 2152,2158 ****
  (define_expand "mulqi3_call"
    [(set (reg:QI 24) (match_operand:QI 1 "register_operand" ""))
     (set (reg:QI 22) (match_operand:QI 2 "register_operand" ""))
!    (parallel [(set (reg:QI 24) (mult:QI (reg:QI 24) (reg:QI 22)))
                (clobber (reg:QI 22))])
     (set (match_operand:QI 0 "register_operand" "") (reg:QI 24))]
    ""
--- 2169,2176 ----
  (define_expand "mulqi3_call"
    [(set (reg:QI 24) (match_operand:QI 1 "register_operand" ""))
     (set (reg:QI 22) (match_operand:QI 2 "register_operand" ""))
!    (parallel [(set (reg:QI 24)
!                    (mult:QI (reg:QI 24) (reg:QI 22)))
                (clobber (reg:QI 22))])
     (set (match_operand:QI 0 "register_operand" "") (reg:QI 24))]
    ""
***************
*** 2166,2177 ****
    "!AVR_HAVE_MUL"
    "#"
    "&& reload_completed"
!   [(parallel [(set (reg:QI 24) (mult:QI (reg:QI 24) (reg:QI 22)))
                (clobber (reg:QI 22))
                (clobber (reg:CC REG_CC))])])
  
  (define_insn "*mulqi3_call"
!   [(set (reg:QI 24) (mult:QI (reg:QI 24) (reg:QI 22)))
     (clobber (reg:QI 22))
     (clobber (reg:CC REG_CC))]
    "!AVR_HAVE_MUL && reload_completed"
--- 2184,2197 ----
    "!AVR_HAVE_MUL"
    "#"
    "&& reload_completed"
!   [(parallel [(set (reg:QI 24)
!                    (mult:QI (reg:QI 24) (reg:QI 22)))
                (clobber (reg:QI 22))
                (clobber (reg:CC REG_CC))])])
  
  (define_insn "*mulqi3_call"
!   [(set (reg:QI 24)
!         (mult:QI (reg:QI 24) (reg:QI 22)))
     (clobber (reg:QI 22))
     (clobber (reg:CC REG_CC))]
    "!AVR_HAVE_MUL && reload_completed"
***************
*** 2307,2313 ****
    [(set (match_operand:PSI 0 "register_operand"                         "=r")
          (plus:PSI (lshiftrt:PSI (match_operand:PSI 1 "register_operand"  "r")
                                  (const_int 23))
!                  (match_operand:PSI 2 "register_operand"                 "0")))
     (clobber (reg:CC REG_CC))]
    "reload_completed"
    "mov __tmp_reg__,%C1\;lsl __tmp_reg__
--- 2327,2333 ----
    [(set (match_operand:PSI 0 "register_operand"                         "=r")
          (plus:PSI (lshiftrt:PSI (match_operand:PSI 1 "register_operand"  "r")
                                  (const_int 23))
!                   (match_operand:PSI 2 "register_operand"                "0")))
     (clobber (reg:CC REG_CC))]
    "reload_completed"
    "mov __tmp_reg__,%C1\;lsl __tmp_reg__
***************
*** 2433,2439 ****
    [(set (match_operand:HI 0 "register_operand"                         "=r")
          (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "a"))
                   (zero_extend:HI (match_operand:QI 2 "register_operand" "a"))))
!     (clobber (reg:CC REG_CC))]
    "AVR_HAVE_MUL && reload_completed"
    "mulsu %1,%2
  	movw %0,r0
--- 2453,2459 ----
    [(set (match_operand:HI 0 "register_operand"                         "=r")
          (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "a"))
                   (zero_extend:HI (match_operand:QI 2 "register_operand" "a"))))
!    (clobber (reg:CC REG_CC))]
    "AVR_HAVE_MUL && reload_completed"
    "mulsu %1,%2
  	movw %0,r0
***************
*** 3088,3094 ****
    [(parallel [(set (match_dup 0)
                     (mult:HI (zero_extend:HI (match_dup 1))
                              (match_dup 2)))
!                (clobber (reg:CC REG_CC))])])
  
  (define_insn "*muluqihi3"
    [(set (match_operand:HI 0 "register_operand"                        "=&r")
--- 3108,3114 ----
    [(parallel [(set (match_dup 0)
                     (mult:HI (zero_extend:HI (match_dup 1))
                              (match_dup 2)))
!               (clobber (reg:CC REG_CC))])])
  
  (define_insn "*muluqihi3"
    [(set (match_operand:HI 0 "register_operand"                        "=&r")
***************
*** 3706,3722 ****
  ;;    CSE has problems to operate on hard regs.
  ;;
  (define_insn_and_split "divmodqi4"
!   [(set (match_operand:QI 0 "pseudo_register_operand" "")
!         (div:QI (match_operand:QI 1 "pseudo_register_operand" "")
!                 (match_operand:QI 2 "pseudo_register_operand" "")))
!    (set (match_operand:QI 3 "pseudo_register_operand" "")
          (mod:QI (match_dup 1) (match_dup 2)))
     (clobber (reg:QI 22))
     (clobber (reg:QI 23))
     (clobber (reg:QI 24))
     (clobber (reg:QI 25))]
    ""
!   "this divmodqi4 pattern should have been splitted;"
    ""
    [(set (reg:QI 24) (match_dup 1))
     (set (reg:QI 22) (match_dup 2))
--- 3726,3742 ----
  ;;    CSE has problems to operate on hard regs.
  ;;
  (define_insn_and_split "divmodqi4"
!   [(set (match_operand:QI 0 "pseudo_register_operand")
!         (div:QI (match_operand:QI 1 "pseudo_register_operand")
!                 (match_operand:QI 2 "pseudo_register_operand")))
!    (set (match_operand:QI 3 "pseudo_register_operand")
          (mod:QI (match_dup 1) (match_dup 2)))
     (clobber (reg:QI 22))
     (clobber (reg:QI 23))
     (clobber (reg:QI 24))
     (clobber (reg:QI 25))]
    ""
!   { gcc_unreachable(); }
    ""
    [(set (reg:QI 24) (match_dup 1))
     (set (reg:QI 22) (match_dup 2))
***************
*** 3752,3768 ****
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodqi4"
!  [(set (match_operand:QI 0 "pseudo_register_operand" "")
!        (udiv:QI (match_operand:QI 1 "pseudo_register_operand" "")
!                 (match_operand:QI 2 "pseudo_register_operand" "")))
!        (set (match_operand:QI 3 "pseudo_register_operand" "")
!             (umod:QI (match_dup 1) (match_dup 2)))
!        (clobber (reg:QI 22))
!        (clobber (reg:QI 23))
!        (clobber (reg:QI 24))
!        (clobber (reg:QI 25))]
    ""
!   "this udivmodqi4 pattern should have been splitted;"
    ""
    [(set (reg:QI 24) (match_dup 1))
     (set (reg:QI 22) (match_dup 2))
--- 3772,3788 ----
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodqi4"
!  [(set (match_operand:QI 0 "pseudo_register_operand")
!        (udiv:QI (match_operand:QI 1 "pseudo_register_operand")
!                 (match_operand:QI 2 "pseudo_register_operand")))
!   (set (match_operand:QI 3 "pseudo_register_operand")
!        (umod:QI (match_dup 1) (match_dup 2)))
!   (clobber (reg:QI 22))
!   (clobber (reg:QI 23))
!   (clobber (reg:QI 24))
!   (clobber (reg:QI 25))]
    ""
!   { gcc_unreachable(); }
    ""
    [(set (reg:QI 24) (match_dup 1))
     (set (reg:QI 22) (match_dup 2))
***************
*** 3794,3810 ****
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "divmodhi4"
!   [(set (match_operand:HI 0 "pseudo_register_operand" "")
!         (div:HI (match_operand:HI 1 "pseudo_register_operand" "")
!                 (match_operand:HI 2 "pseudo_register_operand" "")))
!    (set (match_operand:HI 3 "pseudo_register_operand" "")
          (mod:HI (match_dup 1) (match_dup 2)))
     (clobber (reg:QI 21))
     (clobber (reg:HI 22))
     (clobber (reg:HI 24))
     (clobber (reg:HI 26))]
    ""
!   "this should have been splitted;"
    ""
    [(set (reg:HI 24) (match_dup 1))
     (set (reg:HI 22) (match_dup 2))
--- 3814,3830 ----
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "divmodhi4"
!   [(set (match_operand:HI 0 "pseudo_register_operand")
!         (div:HI (match_operand:HI 1 "pseudo_register_operand")
!                 (match_operand:HI 2 "pseudo_register_operand")))
!    (set (match_operand:HI 3 "pseudo_register_operand")
          (mod:HI (match_dup 1) (match_dup 2)))
     (clobber (reg:QI 21))
     (clobber (reg:HI 22))
     (clobber (reg:HI 24))
     (clobber (reg:HI 26))]
    ""
!   { gcc_unreachable(); }
    ""
    [(set (reg:HI 24) (match_dup 1))
     (set (reg:HI 22) (match_dup 2))
***************
*** 3840,3856 ****
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodhi4"
!   [(set (match_operand:HI 0 "pseudo_register_operand" "")
!         (udiv:HI (match_operand:HI 1 "pseudo_register_operand" "")
!                  (match_operand:HI 2 "pseudo_register_operand" "")))
!    (set (match_operand:HI 3 "pseudo_register_operand" "")
          (umod:HI (match_dup 1) (match_dup 2)))
     (clobber (reg:QI 21))
     (clobber (reg:HI 22))
     (clobber (reg:HI 24))
     (clobber (reg:HI 26))]
    ""
!   "this udivmodhi4 pattern should have been splitted.;"
    ""
    [(set (reg:HI 24) (match_dup 1))
     (set (reg:HI 22) (match_dup 2))
--- 3860,3876 ----
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodhi4"
!   [(set (match_operand:HI 0 "pseudo_register_operand")
!         (udiv:HI (match_operand:HI 1 "pseudo_register_operand")
!                  (match_operand:HI 2 "pseudo_register_operand")))
!    (set (match_operand:HI 3 "pseudo_register_operand")
          (umod:HI (match_dup 1) (match_dup 2)))
     (clobber (reg:QI 21))
     (clobber (reg:HI 22))
     (clobber (reg:HI 24))
     (clobber (reg:HI 26))]
    ""
!   { gcc_unreachable(); }
    ""
    [(set (reg:HI 24) (match_dup 1))
     (set (reg:HI 22) (match_dup 2))
***************
*** 3925,3931 ****
    [(parallel [(set (match_dup 0)
                     (mult:PSI (zero_extend:PSI (match_dup 1))
                               (zero_extend:PSI (match_dup 2))))
!                (clobber (reg:CC REG_CC))])])
  
  (define_insn "*umulqihipsi3"
    [(set (match_operand:PSI 0 "register_operand"                         "=&r")
--- 3945,3951 ----
    [(parallel [(set (match_dup 0)
                     (mult:PSI (zero_extend:PSI (match_dup 1))
                               (zero_extend:PSI (match_dup 2))))
!               (clobber (reg:CC REG_CC))])])
  
  (define_insn "*umulqihipsi3"
    [(set (match_operand:PSI 0 "register_operand"                         "=&r")
***************
*** 4091,4104 ****
  ;; implementation works the other way round.
  
  (define_insn_and_split "divmodpsi4"
!   [(parallel [(set (match_operand:PSI 0 "pseudo_register_operand" "")
!                    (div:PSI (match_operand:PSI 1 "pseudo_register_operand" "")
!                             (match_operand:PSI 2 "pseudo_register_operand" "")))
!               (set (match_operand:PSI 3 "pseudo_register_operand" "")
!                    (mod:PSI (match_dup 1)
!                             (match_dup 2)))
!               (clobber (reg:DI 18))
!               (clobber (reg:QI 26))])]
    ""
    { gcc_unreachable(); }
    ""
--- 4111,4124 ----
  ;; implementation works the other way round.
  
  (define_insn_and_split "divmodpsi4"
!   [(set (match_operand:PSI 0 "pseudo_register_operand")
!         (div:PSI (match_operand:PSI 1 "pseudo_register_operand")
!                  (match_operand:PSI 2 "pseudo_register_operand")))
!    (set (match_operand:PSI 3 "pseudo_register_operand")
!         (mod:PSI (match_dup 1)
!                  (match_dup 2)))
!    (clobber (reg:DI 18))
!    (clobber (reg:QI 26))]
    ""
    { gcc_unreachable(); }
    ""
***************
*** 4140,4153 ****
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodpsi4"
!   [(parallel [(set (match_operand:PSI 0 "pseudo_register_operand" "")
!                    (udiv:PSI (match_operand:PSI 1 "pseudo_register_operand" "")
!                              (match_operand:PSI 2 "pseudo_register_operand" "")))
!               (set (match_operand:PSI 3 "pseudo_register_operand" "")
!                    (umod:PSI (match_dup 1)
!                              (match_dup 2)))
!               (clobber (reg:DI 18))
!               (clobber (reg:QI 26))])]
    ""
    { gcc_unreachable(); }
    ""
--- 4160,4173 ----
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodpsi4"
!   [(set (match_operand:PSI 0 "pseudo_register_operand")
!         (udiv:PSI (match_operand:PSI 1 "pseudo_register_operand")
!                   (match_operand:PSI 2 "pseudo_register_operand")))
!    (set (match_operand:PSI 3 "pseudo_register_operand")
!         (umod:PSI (match_dup 1)
!                   (match_dup 2)))
!    (clobber (reg:DI 18))
!    (clobber (reg:QI 26))]
    ""
    { gcc_unreachable(); }
    ""
***************
*** 4191,4207 ****
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  
  (define_insn_and_split "divmodsi4"
!   [(parallel [(set (match_operand:SI 0 "pseudo_register_operand" "")
!                    (div:SI (match_operand:SI 1 "pseudo_register_operand" "")
!                            (match_operand:SI 2 "pseudo_register_operand" "")))
!               (set (match_operand:SI 3 "pseudo_register_operand" "")
!                    (mod:SI (match_dup 1) (match_dup 2)))
!               (clobber (reg:SI 18))
!               (clobber (reg:SI 22))
!               (clobber (reg:HI 26))
!               (clobber (reg:HI 30))])]
    ""
!   "this divmodsi4 pattern should have been splitted;"
    ""
    [(set (reg:SI 22) (match_dup 1))
     (set (reg:SI 18) (match_dup 2))
--- 4211,4228 ----
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  
  (define_insn_and_split "divmodsi4"
!   [(set (match_operand:SI 0 "pseudo_register_operand")
!         (div:SI (match_operand:SI 1 "pseudo_register_operand")
!                 (match_operand:SI 2 "pseudo_register_operand")))
!    (set (match_operand:SI 3 "pseudo_register_operand")
!         (mod:SI (match_dup 1)
! 	        (match_dup 2)))
!    (clobber (reg:SI 18))
!    (clobber (reg:SI 22))
!    (clobber (reg:HI 26))
!    (clobber (reg:HI 30))]
    ""
!   { gcc_unreachable(); }
    ""
    [(set (reg:SI 22) (match_dup 1))
     (set (reg:SI 18) (match_dup 2))
***************
*** 4237,4253 ****
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodsi4"
!   [(parallel [(set (match_operand:SI 0 "pseudo_register_operand" "")
!                    (udiv:SI (match_operand:SI 1 "pseudo_register_operand" "")
!                            (match_operand:SI 2 "pseudo_register_operand" "")))
!               (set (match_operand:SI 3 "pseudo_register_operand" "")
!                    (umod:SI (match_dup 1) (match_dup 2)))
!               (clobber (reg:SI 18))
!               (clobber (reg:SI 22))
!               (clobber (reg:HI 26))
!               (clobber (reg:HI 30))])]
    ""
!   "this udivmodsi4 pattern should have been splitted;"
    ""
    [(set (reg:SI 22) (match_dup 1))
     (set (reg:SI 18) (match_dup 2))
--- 4258,4275 ----
    [(set_attr "type" "xcall")])
  
  (define_insn_and_split "udivmodsi4"
!   [(set (match_operand:SI 0 "pseudo_register_operand")
!         (udiv:SI (match_operand:SI 1 "pseudo_register_operand")
!                  (match_operand:SI 2 "pseudo_register_operand")))
!    (set (match_operand:SI 3 "pseudo_register_operand")
!         (umod:SI (match_dup 1)
!                  (match_dup 2)))
!    (clobber (reg:SI 18))
!    (clobber (reg:SI 22))
!    (clobber (reg:HI 26))
!    (clobber (reg:HI 30))]
    ""
!   { gcc_unreachable(); }
    ""
    [(set (reg:SI 22) (match_dup 1))
     (set (reg:SI 18) (match_dup 2))
***************
*** 4712,4718 ****
    [(parallel [(set (match_operand:HISI 0 "register_operand")
                     (bitop:HISI (match_dup 0)
                                 (match_operand:HISI 1 "register_operand")))
!               (clobber (scratch:QI))])]
    "optimize
     && reload_completed"
    [(const_int 1)]
--- 4734,4741 ----
    [(parallel [(set (match_operand:HISI 0 "register_operand")
                     (bitop:HISI (match_dup 0)
                                 (match_operand:HISI 1 "register_operand")))
!               (clobber (scratch:QI))
!               (clobber (reg:CC REG_CC))])]
    "optimize
     && reload_completed"
    [(const_int 1)]
***************
*** 4726,4731 ****
--- 4749,4791 ----
      DONE;
    })
  
+ ;; If  $0 = $0  const  requires a QI scratch, and d-reg $1 dies after
+ ;; the first insn, then we can replace
+ ;;    $0 = $1
+ ;;    $0 = $0  const
+ ;; by
+ ;;    $1 = $1  const
+ ;;    $0 = $1
+ ;; This transorms constraint alternative "r,0,n,&d" of the first operation
+ ;; to alternative "d,0,n,X".
+ ;; "*addhi3_clobber"  "*addpsi3"  "*addsi3"
+ ;; "*addhq3"  "*adduhq3"  "*addha3"  "*adduha3"
+ ;; "*addsq3"  "*addusq3"  "*addsa3"  "*addusa3"
+ ;; "*iorhi3"  "*iorpsi3"  "*iorsi3"
+ ;; "*andhi3"  "*andpsi3"  "*andsi3"
+ (define_peephole2
+   [(parallel [(set (match_operand:ORDERED234 0 "register_operand")
+                    (match_operand:ORDERED234 1 "d_register_operand"))
+               (clobber (reg:CC REG_CC))])
+    (parallel [(set (match_dup 0)
+                    (piaop:ORDERED234 (match_dup 0)
+                                      (match_operand:ORDERED234 2 "const_operand")))
+               ; A d-reg as scratch tells that this insn is expensive, and
+               ; that $0 is not a d-register: l-reg or something like SI:14 etc.
+               (clobber (match_operand:QI 3 "d_register_operand"))
+               (clobber (reg:CC REG_CC))])]
+   "peep2_reg_dead_p (1, operands[1])"
+   [(parallel [(set (match_dup 1)
+                    (piaop:ORDERED234 (match_dup 1)
+                                      (match_dup 2)))
+               (clobber (scratch:QI))
+               (clobber (reg:CC REG_CC))])
+    ; Unfortunately, the following insn misses a REG_DEAD note for $1,
+    ; so this peep2 works only once.
+    (parallel [(set (match_dup 0)
+                    (match_dup 1))
+               (clobber (reg:CC REG_CC))])])
+ 
  
  ;; swap swap swap swap swap swap swap swap swap swap swap swap swap swap swap
  ;; swap
***************
*** 5684,5690 ****
  ;; "lshrha3"  "lshruha3"
  (define_insn_and_split "lshr3"
    [(set (match_operand:ALL2 0 "register_operand"                "=r,r,r,r,r,r,r")
!         (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand"    "0,0,0,r,0,0,0")
                         (match_operand:QI 2 "nop_general_operand" "r,L,P,O,K,n,Qm")))]
    ""
    "#"
--- 5744,5750 ----
  ;; "lshrha3"  "lshruha3"
  (define_insn_and_split "lshr3"
    [(set (match_operand:ALL2 0 "register_operand"                "=r,r,r,r,r,r,r")
!         (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand"  "0,0,0,r,0,0,0")
                         (match_operand:QI 2 "nop_general_operand" "r,L,P,O,K,n,Qm")))]
    ""
    "#"
***************
*** 5696,5702 ****
  
  (define_insn "*lshr3"
    [(set (match_operand:ALL2 0 "register_operand"                "=r,r,r,r,r,r,r")
!         (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand"    "0,0,0,r,0,0,0")
                         (match_operand:QI 2 "nop_general_operand" "r,L,P,O,K,n,Qm")))
     (clobber (reg:CC REG_CC))]
    "reload_completed"
--- 5756,5762 ----
  
  (define_insn "*lshr3"
    [(set (match_operand:ALL2 0 "register_operand"                "=r,r,r,r,r,r,r")
!         (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand"  "0,0,0,r,0,0,0")
                         (match_operand:QI 2 "nop_general_operand" "r,L,P,O,K,n,Qm")))
     (clobber (reg:CC REG_CC))]
    "reload_completed"
***************
*** 6449,6528 ****
  ;;<=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=>
  ;; compare
  
! ; Optimize negated tests into reverse compare if overflow is undefined.
! (define_insn "*negated_tstqi"
!   [(set (reg:CC REG_CC)
!         (compare:CC (neg:QI (match_operand:QI 0 "register_operand" "r"))
!                  (const_int 0)))]
!   "reload_completed && !flag_wrapv && !flag_trapv"
!   "cp __zero_reg__,%0"
!   [(set_attr "length" "1")])
! 
! (define_insn "*reversed_tstqi"
    [(set (reg:CC REG_CC)
!         (compare:CC (const_int 0)
!                  (match_operand:QI 0 "register_operand" "r")))]
    "reload_completed"
!   "cp __zero_reg__,%0"
! [(set_attr "length" "2")])
  
- (define_insn "*negated_tsthi"
-   [(set (reg:CC REG_CC)
-         (compare:CC (neg:HI (match_operand:HI 0 "register_operand" "r"))
-                  (const_int 0)))]
-   "reload_completed && !flag_wrapv && !flag_trapv"
-   "cp __zero_reg__,%A0
- 	cpc __zero_reg__,%B0"
- [(set_attr "length" "2")])
  
! ;; Leave here the clobber used by the cmphi pattern for simplicity, even
! ;; though it is unused, because this pattern is synthesized by avr_reorg.
! (define_insn "*reversed_tsthi"
    [(set (reg:CC REG_CC)
!         (compare:CC (const_int 0)
!                  (match_operand:HI 0 "register_operand" "r")))
!    (clobber (match_scratch:QI 1 "=X"))]
    "reload_completed"
!   "cp __zero_reg__,%A0
! 	cpc __zero_reg__,%B0"
! [(set_attr "length" "2")])
  
- (define_insn "*negated_tstpsi"
-   [(set (reg:CC REG_CC)
-         (compare:CC (neg:PSI (match_operand:PSI 0 "register_operand" "r"))
-                  (const_int 0)))]
-   "reload_completed && !flag_wrapv && !flag_trapv"
-   "cp __zero_reg__,%A0\;cpc __zero_reg__,%B0\;cpc __zero_reg__,%C0"
-   [(set_attr "length" "3")])
  
! (define_insn "*reversed_tstpsi"
    [(set (reg:CC REG_CC)
          (compare:CC (const_int 0)
!                  (match_operand:PSI 0 "register_operand" "r")))
!    (clobber (match_scratch:QI 1 "=X"))]
    "reload_completed"
    "cp __zero_reg__,%A0\;cpc __zero_reg__,%B0\;cpc __zero_reg__,%C0"
    [(set_attr "length" "3")])
  
- (define_insn "*negated_tstsi"
-   [(set (reg:CC REG_CC)
-         (compare:CC (neg:SI (match_operand:SI 0 "register_operand" "r"))
-                  (const_int 0)))]
-   "reload_completed && !flag_wrapv && !flag_trapv"
-   "cp __zero_reg__,%A0
- 	cpc __zero_reg__,%B0
- 	cpc __zero_reg__,%C0
- 	cpc __zero_reg__,%D0"
-   [(set_attr "length" "4")])
  
! ;; "*reversed_tstsi"
! ;; "*reversed_tstsq" "*reversed_tstusq"
! ;; "*reversed_tstsa" "*reversed_tstusa"
! (define_insn "*reversed_tst"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALL4 0 "const0_operand"   "Y00")
!                  (match_operand:ALL4 1 "register_operand" "r")))
!    (clobber (match_scratch:QI 2 "=X"))]
    "reload_completed"
    "cp __zero_reg__,%A1
  	cpc __zero_reg__,%B1
--- 6509,6549 ----
  ;;<=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=>
  ;; compare
  
! ;; "*swapped_tstqi"  "*swapped_tstqq"
! (define_insn "*swapped_tst"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALLs1 0 "const0_operand"   "Y00")
!                     (match_operand:ALLs1 1 "register_operand" "r")))]
    "reload_completed"
!   "cp __zero_reg__,%1"
! [(set_attr "length" "1")])
  
  
! ;; "*swapped_tsthi"  "*swapped_tsthq"  "*swapped_tstha"
! (define_insn "*swapped_tst"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALLs2 0 "const0_operand"   "Y00")
!                     (match_operand:ALLs2 1 "register_operand" "r")))]
    "reload_completed"
!   "cp __zero_reg__,%A1
! 	cpc __zero_reg__,%B1"
!   [(set_attr "length" "2")])
  
  
! (define_insn "*swapped_tstpsi"
    [(set (reg:CC REG_CC)
          (compare:CC (const_int 0)
!                     (match_operand:PSI 0 "register_operand" "r")))]
    "reload_completed"
    "cp __zero_reg__,%A0\;cpc __zero_reg__,%B0\;cpc __zero_reg__,%C0"
    [(set_attr "length" "3")])
  
  
! ;; "*swapped_tstsi"  "*swapped_tstsq"  "*swapped_tstsa"
! (define_insn "*swapped_tst"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALLs4 0 "const0_operand"   "Y00")
!                     (match_operand:ALLs4 1 "register_operand" "r")))]
    "reload_completed"
    "cp __zero_reg__,%A1
  	cpc __zero_reg__,%B1
***************
*** 6536,6573 ****
  (define_insn "cmp3"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL1 0 "register_operand"  "r  ,r,d")
!                  (match_operand:ALL1 1 "nonmemory_operand" "Y00,r,i")))]
    "reload_completed"
    "@
! 	tst %0
  	cp %0,%1
  	cpi %0,lo8(%1)"
    [(set_attr "length" "1,1,1")])
  
- (define_insn "*cmpqi_sign_extend"
-   [(set (reg:CC REG_CC)
-         (compare:CC (sign_extend:HI (match_operand:QI 0 "register_operand" "d"))
-                  (match_operand:HI 1 "s8_operand"                       "n")))]
-   "reload_completed"
-   "cpi %0,lo8(%1)"
-   [(set_attr "length" "1")])
- 
  
! (define_insn "*cmphi.zero-extend.0"
    [(set (reg:CC REG_CC)
!         (compare:CC (zero_extend:HI (match_operand:QI 0 "register_operand" "r"))
!                  (match_operand:HI 1 "register_operand" "r")))]
!   "reload_completed"
!   "cp %0,%A1\;cpc __zero_reg__,%B1"
!   [(set_attr "length" "2")])
  
! (define_insn "*cmphi.zero-extend.1"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:HI 0 "register_operand" "r")
!                  (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))))]
!   "reload_completed"
!   "cp %A0,%1\;cpc %B0,__zero_reg__"
!   [(set_attr "length" "2")])
  
  ;; "cmphi3"
  ;; "cmphq3" "cmpuhq3"
--- 6557,6596 ----
  (define_insn "cmp3"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL1 0 "register_operand"  "r  ,r,d")
!                     (match_operand:ALL1 1 "nonmemory_operand" "Y00,r,i")))]
    "reload_completed"
    "@
! 	cp %0, __zero_reg__
  	cp %0,%1
  	cpi %0,lo8(%1)"
    [(set_attr "length" "1,1,1")])
  
  
! ;; May be generated by "*cbranch..0/1".
! (define_insn "*cmp..0"
    [(set (reg:CC REG_CC)
!         (compare:CC (any_extend:HISI (match_operand:QIPSI 0 "register_operand" "r"))
!                     (match_operand:HISI 1 "register_operand" "r")))]
!   "reload_completed
!    && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)"
!   {
!     return avr_out_cmp_ext (operands, , nullptr);
!   }
!   [(set_attr "adjust_len" "cmp_ext")])
  
! ;; Swapped version of the above.
! ;; May be generated by "*cbranch..0/1".
! (define_insn "*cmp..1"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:HISI 0 "register_operand" "r")
!                     (any_extend:HISI (match_operand:QIPSI 1 "register_operand" "r"))))]
!   "reload_completed
!    && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)"
!   {
!     return avr_out_cmp_ext (operands, , nullptr);
!   }
!   [(set_attr "adjust_len" "cmp_ext")])
! 
  
  ;; "cmphi3"
  ;; "cmphq3" "cmpuhq3"
***************
*** 6575,6582 ****
  (define_insn "cmp3"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL2 0 "register_operand"  "!w  ,r  ,r,d ,r  ,d,r")
!                  (match_operand:ALL2 1 "nonmemory_operand"  "Y00,Y00,r,s ,s  ,M,n Ynn")))
!    (clobber (match_scratch:QI 2                            "=X  ,X  ,X,&d,&d ,X,&d"))]
    "reload_completed"
    {
      switch (which_alternative)
--- 6598,6605 ----
  (define_insn "cmp3"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL2 0 "register_operand"  "!w  ,r  ,r,d ,r  ,d,r")
!                     (match_operand:ALL2 1 "nonmemory_operand"  "Y00,Y00,r,s ,s  ,M,n Ynn")))
!    (clobber (match_scratch:QI 2                               "=X  ,X  ,X,&d,&d ,X,&d"))]
    "reload_completed"
    {
      switch (which_alternative)
***************
*** 6603,6616 ****
  
      return avr_out_compare (insn, operands, NULL);
    }
!   [(set_attr "length" "1,2,2,3,4,2,4")
     (set_attr "adjust_len" "tsthi,tsthi,*,*,*,compare,compare")])
  
  (define_insn "*cmppsi"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:PSI 0 "register_operand"  "r,r,d ,r  ,d,r")
!                  (match_operand:PSI 1 "nonmemory_operand" "L,r,s ,s  ,M,n")))
!    (clobber (match_scratch:QI 2                          "=X,X,&d,&d ,X,&d"))]
    "reload_completed"
    {
      switch (which_alternative)
--- 6626,6639 ----
  
      return avr_out_compare (insn, operands, NULL);
    }
!   [(set_attr "length" "2,2,2,3,4,2,4")
     (set_attr "adjust_len" "tsthi,tsthi,*,*,*,compare,compare")])
  
  (define_insn "*cmppsi"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:PSI 0 "register_operand"  "r,r,d ,r  ,d,r")
!                     (match_operand:PSI 1 "nonmemory_operand" "L,r,s ,s  ,M,n")))
!    (clobber (match_scratch:QI 2                             "=X,X,&d,&d ,X,&d"))]
    "reload_completed"
    {
      switch (which_alternative)
***************
*** 6641,6648 ****
  (define_insn "*cmp"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL4 0 "register_operand"  "r  ,r ,d,r ,r")
!                  (match_operand:ALL4 1 "nonmemory_operand" "Y00,r ,M,M ,n Ynn")))
!    (clobber (match_scratch:QI 2                           "=X  ,X ,X,&d,&d"))]
    "reload_completed"
    {
      if (0 == which_alternative)
--- 6664,6671 ----
  (define_insn "*cmp"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL4 0 "register_operand"  "r  ,r ,d,r ,r")
!                     (match_operand:ALL4 1 "nonmemory_operand" "Y00,r ,M,M ,n Ynn")))
!    (clobber (match_scratch:QI 2                              "=X  ,X ,X,&d,&d"))]
    "reload_completed"
    {
      if (0 == which_alternative)
***************
*** 6656,6661 ****
--- 6679,6691 ----
     (set_attr "adjust_len" "tstsi,*,compare,compare,compare")])
  
  
+ ;; A helper for avr_pass_ifelse::avr_rest_of_handle_ifelse().
+ (define_expand "gen_compare"
+   [(parallel [(set (reg:CC REG_CC)
+                    (compare:CC (match_operand:HISI 0 "register_operand")
+                                (match_operand:HISI 1 "const_int_operand")))
+               (clobber (match_operand:QI 2 "scratch_operand"))])])
+ 
  ;; ----------------------------------------------------------------------
  ;; JUMP INSTRUCTIONS
  ;; ----------------------------------------------------------------------
***************
*** 6664,6716 ****
  (define_expand "cbranch4"
    [(set (pc)
          (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(match_operand:ALL1 1 "register_operand" "")
!                          (match_operand:ALL1 2 "nonmemory_operand" "")])
!          (label_ref (match_operand 3 "" ""))
!          (pc)))])
  
  (define_expand "cbranch4"
    [(parallel
       [(set (pc)
!            (if_then_else
!              (match_operator 0 "ordered_comparison_operator"
!                [(match_operand:ORDERED234 1 "register_operand" "")
!                 (match_operand:ORDERED234 2 "nonmemory_operand" "")])
!              (label_ref (match_operand 3 "" ""))
!              (pc)))
!       (clobber (match_scratch:QI 4 ""))])])
  
! ;; "*cbranchqi4"
! ;; "*cbranchqq4"  "*cbranchuqq4"
! (define_insn_and_split "*cbranch4"
    [(set (pc)
          (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(match_operand:ALL1 1 "register_operand" "r  ,r,d")
                           (match_operand:ALL1 2 "nonmemory_operand" "Y00,r,i")])
!          (label_ref (match_operand 3 "" ""))
!          (pc)))]
     ""
     "#"
     "reload_completed"
     [(set (reg:CC REG_CC)
!                     (compare:CC (match_dup 1) (match_dup 2)))
      (set (pc)
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))]
!    "")
  
! ;; "*cbranchsi4"  "*cbranchsq4"  "*cbranchusq4"  "*cbranchsa4"  "*cbranchusa4"
! (define_insn_and_split "*cbranch4"
    [(set (pc)
!            (if_then_else
!              (match_operator 0 "ordered_comparison_operator"
!                [(match_operand:ALL4 1 "register_operand" "r  ,r ,d,r ,r")
!                 (match_operand:ALL4 2 "nonmemory_operand" "Y00,r ,M,M ,n Ynn")])
!              (label_ref (match_operand 3 "" ""))
!              (pc)))
!    (clobber (match_scratch:QI 4 "=X  ,X ,X,&d,&d"))]
     ""
     "#"
     "reload_completed"
--- 6694,6760 ----
  (define_expand "cbranch4"
    [(set (pc)
          (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(match_operand:ALL1 1 "register_operand")
!                          (match_operand:ALL1 2 "nonmemory_operand")])
!                       (label_ref (match_operand 3))
!                       (pc)))]
!   ""
!   {
!     int icode = (int) GET_CODE (operands[0]);
! 
!     targetm.canonicalize_comparison (&icode, &operands[1], &operands[2], false);
!     PUT_CODE (operands[0], (enum rtx_code) icode);
!   })
  
  (define_expand "cbranch4"
    [(parallel
       [(set (pc)
!            (if_then_else (match_operator 0 "ordered_comparison_operator"
!                            [(match_operand:ALL234 1 "register_operand")
!                             (match_operand:ALL234 2 "nonmemory_operand")])
!                          (label_ref (match_operand 3))
!                          (pc)))
!       (clobber (match_scratch:QI 4))])]
!   ""
!   {
!     int icode = (int) GET_CODE (operands[0]);
  
!     targetm.canonicalize_comparison (&icode, &operands[1], &operands[2], false);
!     PUT_CODE (operands[0], (enum rtx_code) icode);
!   })
! 
! 
! ;; "cbranchqi4_insn"
! ;; "cbranchqq4_insn"  "cbranchuqq4_insn"
! (define_insn_and_split "cbranch4_insn"
    [(set (pc)
          (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(match_operand:ALL1 1 "register_operand"  "r  ,r,d")
                           (match_operand:ALL1 2 "nonmemory_operand" "Y00,r,i")])
!                       (label_ref (match_operand 3))
!                       (pc)))]
     ""
     "#"
     "reload_completed"
     [(set (reg:CC REG_CC)
!          (compare:CC (match_dup 1) (match_dup 2)))
      (set (pc)
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))])
  
! ;; "cbranchsi4_insn"
! ;; "cbranchsq4_insn"  "cbranchusq4_insn"  "cbranchsa4_insn"  "cbranchusa4_insn"
! (define_insn_and_split "cbranch4_insn"
    [(set (pc)
!         (if_then_else
!          (match_operator 0 "ordered_comparison_operator"
!            [(match_operand:ALL4 1 "register_operand"  "r  ,r,d,r ,r")
!             (match_operand:ALL4 2 "nonmemory_operand" "Y00,r,M,M ,n Ynn")])
!          (label_ref (match_operand 3))
!          (pc)))
!    (clobber (match_scratch:QI 4                      "=X  ,X,X,&d,&d"))]
     ""
     "#"
     "reload_completed"
***************
*** 6721,6739 ****
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))]
!    "")
  
! ;; "*cbranchpsi4"
! (define_insn_and_split "*cbranchpsi4"
    [(set (pc)
!            (if_then_else
!              (match_operator 0 "ordered_comparison_operator"
!                [(match_operand:PSI 1 "register_operand" "r,r,d ,r  ,d,r")
!                 (match_operand:PSI 2 "nonmemory_operand" "L,r,s ,s  ,M,n")])
!              (label_ref (match_operand 3 "" ""))
!              (pc)))
!    (clobber (match_scratch:QI 4 "=X,X,&d,&d ,X,&d"))]
     ""
     "#"
     "reload_completed"
--- 6765,6782 ----
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))])
  
! ;; "cbranchpsi4_insn"
! (define_insn_and_split "cbranchpsi4_insn"
    [(set (pc)
!         (if_then_else
!          (match_operator 0 "ordered_comparison_operator"
!            [(match_operand:PSI 1 "register_operand"  "r,r,d ,r ,d,r")
!             (match_operand:PSI 2 "nonmemory_operand" "L,r,s ,s ,M,n")])
!          (label_ref (match_operand 3))
!          (pc)))
!    (clobber (match_scratch:QI 4                     "=X,X,&d,&d,X,&d"))]
     ""
     "#"
     "reload_completed"
***************
*** 6744,6762 ****
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))]
!    "")
  
! ;; "*cbranchhi4"  "*cbranchhq4"  "*cbranchuhq4"  "*cbranchha4"  "*cbranchuha4"
! (define_insn_and_split "*cbranch4"
    [(set (pc)
!            (if_then_else
!              (match_operator 0 "ordered_comparison_operator"
!                [(match_operand:ALL2 1 "register_operand" "!w  ,r  ,r,d ,r  ,d,r")
!                 (match_operand:ALL2 2 "nonmemory_operand" "Y00,Y00,r,s ,s  ,M,n Ynn")])
!              (label_ref (match_operand 3 "" ""))
!              (pc)))
!    (clobber (match_scratch:QI 4 "=X  ,X  ,X,&d,&d ,X,&d"))]
     ""
     "#"
     "reload_completed"
--- 6787,6805 ----
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))])
  
! ;; "cbranchhi4_insn"
! ;; "cbranchhq4_insn"  "cbranchuhq4_insn"  "cbranchha4_insn"  "cbranchuha4_insn"
! (define_insn_and_split "cbranch4_insn"
    [(set (pc)
!         (if_then_else
!          (match_operator 0 "ordered_comparison_operator"
!            [(match_operand:ALL2 1 "register_operand" "!w  ,r  ,r,d ,r ,d,r")
!             (match_operand:ALL2 2 "nonmemory_operand" "Y00,Y00,r,s ,s ,M,n Ynn")])
!          (label_ref (match_operand 3))
!          (pc)))
!    (clobber (match_scratch:QI 4                      "=X  ,X  ,X,&d,&d,X,&d"))]
     ""
     "#"
     "reload_completed"
***************
*** 6767,6774 ****
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))]
!    "")
  
  ;; Test a single bit in a QI/HI/SImode register.
  ;; Combine will create zero extract patterns for single bit tests.
--- 6810,6880 ----
           (if_then_else (match_op_dup 0
                           [(reg:CC REG_CC) (const_int 0)])
                         (label_ref (match_dup 3))
!                        (pc)))])
! 
! ;; Combiner pattern to compare sign- or zero-extended register against
! ;; a wider register, like comparing uint8_t against uint16_t.
! (define_insn_and_split "*cbranch..0"
!   [(set (pc)
!         (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(any_extend:HISI (match_operand:QIPSI 1 "register_operand" "r"))
!                          (match_operand:HISI 2 "register_operand" "r")])
!                       (label_ref (match_operand 3))
!                       (pc)))]
!   "optimize
!    && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)"
!   "#"
!   "&& reload_completed"
!   [; "*cmp..0"
!    (set (reg:CC REG_CC)
!         (compare:CC (match_dup 1)
!                     (match_dup 2)))
!    ; "branch"
!    (set (pc)
!         (if_then_else (match_op_dup 0 [(reg:CC REG_CC)
!                                        (const_int 0)])
!                       (label_ref (match_dup 3))
!                       (pc)))]
!   {
!     operands[1] = gen_rtx_ (mode, operands[1]);
!     if (difficult_comparison_operator (operands[0], VOIDmode))
!       {
!         PUT_CODE (operands[0], swap_condition (GET_CODE (operands[0])));
!         std::swap (operands[1], operands[2]);
!       }
!   })
! 
! ;; Same combiner pattern, but with swapped operands.
! (define_insn_and_split "*cbranch..0"
!   [(set (pc)
!         (if_then_else (match_operator 0 "ordered_comparison_operator"
!                         [(match_operand:HISI 1 "register_operand" "r")
!                          (any_extend:HISI (match_operand:QIPSI 2 "register_operand" "r"))])
!                       (label_ref (match_operand 3))
!                       (pc)))]
!   "optimize
!    && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)"
!   "#"
!   "&& reload_completed"
!   [; "*cmp..0"
!    (set (reg:CC REG_CC)
!         (compare:CC (match_dup 1)
!                     (match_dup 2)))
!    ; "branch"
!    (set (pc)
!         (if_then_else (match_op_dup 0 [(reg:CC REG_CC)
!                                        (const_int 0)])
!                       (label_ref (match_dup 3))
!                       (pc)))]
!   {
!     operands[2] = gen_rtx_ (mode, operands[2]);
!     if (difficult_comparison_operator (operands[0], VOIDmode))
!       {
!         PUT_CODE (operands[0], swap_condition (GET_CODE (operands[0])));
!         std::swap (operands[1], operands[2]);
!       }
!   })
! 
  
  ;; Test a single bit in a QI/HI/SImode register.
  ;; Combine will create zero extract patterns for single bit tests.
***************
*** 6842,6855 ****
    "#"
    "&& reload_completed"
    [(parallel [(set (pc)
!                    (if_then_else
!                    (match_op_dup 0
!                                  [(and:QISI
!                                    (match_dup 1)
!                                    (match_dup 2))
!                                   (const_int 0)])
!                    (label_ref (match_dup 3))
!                    (pc)))
                (clobber (reg:CC REG_CC))])])
  
  (define_insn "*sbrx_and_branch"
--- 6948,6958 ----
    "#"
    "&& reload_completed"
    [(parallel [(set (pc)
!                    (if_then_else (match_op_dup 0 [(and:QISI (match_dup 1)
!                                                             (match_dup 2))
!                                                   (const_int 0)])
!                                  (label_ref (match_dup 3))
!                                  (pc)))
                (clobber (reg:CC REG_CC))])])
  
  (define_insn "*sbrx_and_branch"
***************
*** 6878,7040 ****
                                      (const_int 2)
                                      (const_int 4))))])
  
- ;; Convert sign tests to bit 7/15/31 tests that match the above insns.
- (define_peephole2
-   [(set (reg:CC REG_CC) (compare:CC (match_operand:QI 0 "register_operand" "")
-                        (const_int 0)))
-    (parallel [(set (pc) (if_then_else (ge (reg:CC REG_CC) (const_int 0))
-                                       (label_ref (match_operand 1 "" ""))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])]
-   ""
-   [(parallel [(set (pc) (if_then_else (eq (zero_extract:HI (match_dup 0)
-                                                            (const_int 1)
-                                                            (const_int 7))
-                                           (const_int 0))
-                                       (label_ref (match_dup 1))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])])
- 
- (define_peephole2
-   [(set (reg:CC REG_CC) (compare:CC (match_operand:QI 0 "register_operand" "")
-                        (const_int 0)))
-    (parallel [(set (pc) (if_then_else (lt (reg:CC REG_CC) (const_int 0))
-                                       (label_ref (match_operand 1 "" ""))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])]
-   ""
-   [(parallel [(set (pc) (if_then_else (ne (zero_extract:HI (match_dup 0)
-                                                            (const_int 1)
-                                                            (const_int 7))
-                                           (const_int 0))
-                                       (label_ref (match_dup 1))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])])
- 
- (define_peephole2
-   [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:HI 0 "register_operand" "")
-                                   (const_int 0)))
-               (clobber (match_operand:HI 2 ""))])
-    (parallel [(set (pc) (if_then_else (ge (reg:CC REG_CC) (const_int 0))
-                                       (label_ref (match_operand 1 "" ""))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])]
-   ""
-   [(parallel [(set (pc) (if_then_else (eq (and:HI (match_dup 0) (const_int -32768))
-                                           (const_int 0))
-                                       (label_ref (match_dup 1))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])])
  
! (define_peephole2
!   [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:HI 0 "register_operand" "")
!                                   (const_int 0)))
!               (clobber (match_operand:HI 2 ""))])
!    (parallel [(set (pc) (if_then_else (lt (reg:CC REG_CC) (const_int 0))
!                                       (label_ref (match_operand 1 "" ""))
!                                       (pc)))
                (clobber (reg:CC REG_CC))])]
!   ""
!   [(parallel [(set (pc) (if_then_else (ne (and:HI (match_dup 0) (const_int -32768))
!                                           (const_int 0))
!                                       (label_ref (match_dup 1))
!                                       (pc)))
!               (clobber (reg:CC REG_CC))])])
  
! (define_peephole2
!   [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:SI 0 "register_operand" "")
!                                   (const_int 0)))
!               (clobber (match_operand:SI 2 ""))])
!    (parallel [(set (pc) (if_then_else (ge (reg:CC REG_CC) (const_int 0))
!                                       (label_ref (match_operand 1 "" ""))
!                                       (pc)))
!               (clobber (reg:CC REG_CC))])]
!   ""
!   [(parallel [(set (pc) (if_then_else (eq (and:SI (match_dup 0) (match_dup 2))
!                                           (const_int 0))
!                                       (label_ref (match_dup 1))
!                                       (pc)))
                (clobber (reg:CC REG_CC))])]
!   "operands[2] = gen_int_mode (-2147483647 - 1, SImode);")
  
- (define_peephole2
-   [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:SI 0 "register_operand" "")
-                                   (const_int 0)))
-               (clobber (match_operand:SI 2 ""))])
-    (parallel [(set (pc) (if_then_else (lt (reg:CC REG_CC) (const_int 0))
-                                       (label_ref (match_operand 1 "" ""))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])]
-   ""
-   [(parallel [(set (pc) (if_then_else (ne (and:SI (match_dup 0) (match_dup 2))
-                                           (const_int 0))
-                                       (label_ref (match_dup 1))
-                                       (pc)))
-               (clobber (reg:CC REG_CC))])]
-   "operands[2] = gen_int_mode (-2147483647 - 1, SImode);")
  
  ;; ************************************************************************
  ;; Implementation of conditional jumps here.
  ;;  Compare with 0 (test) jumps
  ;; ************************************************************************
  
! (define_insn_and_split "branch"
    [(set (pc)
          (if_then_else (match_operator 1 "simple_comparison_operator"
!                                       [(reg:CC REG_CC)
!                                        (const_int 0)])
!                       (label_ref (match_operand 0 "" ""))
                        (pc)))]
    "reload_completed"
-   "#"
-   "&& reload_completed"
-   [(parallel [(set (pc)
-                    (if_then_else (match_op_dup 1
-                                                [(reg:CC REG_CC)
-                                                 (const_int 0)])
-                                  (label_ref (match_dup 0))
-                                  (pc)))
-               (clobber (reg:CC REG_CC))])])
- 
- (define_insn "*branch"
-   [(set (pc)
-         (if_then_else (match_operator 1 "simple_comparison_operator"
-                                       [(reg:CC REG_CC)
-                                        (const_int 0)])
-                       (label_ref (match_operand 0 "" ""))
-                       (pc)))
-    (clobber (reg:CC REG_CC))]
-   "reload_completed"
-   {
-     return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0);
-   }
-   [(set_attr "type" "branch")])
- 
- 
- ;; Same as above but wrap SET_SRC so that this branch won't be transformed
- ;; or optimized in the remainder.
- 
- (define_insn "branch_unspec"
-   [(set (pc)
-         (unspec [(if_then_else (match_operator 1 "simple_comparison_operator"
-                                                [(reg:CC REG_CC)
-                                                 (const_int 0)])
-                                (label_ref (match_operand 0 "" ""))
-                                (pc))
-                  ] UNSPEC_IDENTITY))
-    (clobber (reg:CC REG_CC))]
-   "reload_completed"
    {
      return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0);
    }
    [(set_attr "type" "branch")])
  
- ;; ****************************************************************
- ;; AVR does not have following conditional jumps: LE,LEU,GT,GTU.
- ;; Convert them all to proper jumps.
- ;; ****************************************************************/
  
! (define_insn_and_split "difficult_branch"
    [(set (pc)
          (if_then_else (match_operator 1 "difficult_comparison_operator"
                          [(reg:CC REG_CC)
--- 6981,7057 ----
                                      (const_int 2)
                                      (const_int 4))))])
  
  
! ;; Convert sign tests to bit 7 tests that match the above insns.
! (define_peephole2 ; "*sbrx_branch"
!   [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALLs1 0 "register_operand")
!                     (match_operand:ALLs1 1 "const0_operand")))
!    (set (pc)
!         (if_then_else (gelt (reg:CC REG_CC)
!                             (const_int 0))
!                       (label_ref (match_operand 2))
!                       (pc)))]
!   "peep2_regno_dead_p (2, REG_CC)"
!   [(parallel [(set (pc)
!                    (if_then_else ( (zero_extract:HI (match_dup 0)
!                                                                (const_int 1)
!                                                                (match_dup 1))
!                                               (const_int 0))
!                                  (label_ref (match_dup 2))
!                                  (pc)))
                (clobber (reg:CC REG_CC))])]
!   {
!     operands[0] = avr_to_int_mode (operands[0]);
!     operands[1] = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
!   })
  
! ;; Convert sign tests to bit 15/23/31 tests that match the above insns.
! (define_peephole2 ; "*sbrx_branch"
!   [(parallel [(set (reg:CC REG_CC)
!                    (compare:CC (match_operand:ALLs234 0 "register_operand")
!                                (match_operand:ALLs234 1 "const0_operand")))
!               (clobber (match_operand:QI 3 "scratch_operand"))])
!    (set (pc)
!         (if_then_else (gelt (reg:CC REG_CC)
!                             (const_int 0))
!                       (label_ref (match_operand 2))
!                       (pc)))]
!   "peep2_regno_dead_p (2, REG_CC)"
!   [(parallel [(set (pc)
!                    (if_then_else ( (zero_extract:HI (match_dup 0)
!                                                                (const_int 1)
!                                                                (match_dup 1))
!                                               (const_int 0))
!                                  (label_ref (match_dup 2))
!                                  (pc)))
                (clobber (reg:CC REG_CC))])]
!   {
!     operands[0] = avr_to_int_mode (operands[0]);
!     operands[1] = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
!   })
  
  
  ;; ************************************************************************
  ;; Implementation of conditional jumps here.
  ;;  Compare with 0 (test) jumps
  ;; ************************************************************************
  
! (define_insn "branch"
    [(set (pc)
          (if_then_else (match_operator 1 "simple_comparison_operator"
!                         [(reg:CC REG_CC)
!                          (const_int 0)])
!                       (label_ref (match_operand 0))
                        (pc)))]
    "reload_completed"
    {
      return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0);
    }
    [(set_attr "type" "branch")])
  
  
! (define_insn "difficult_branch"
    [(set (pc)
          (if_then_else (match_operator 1 "difficult_comparison_operator"
                          [(reg:CC REG_CC)
***************
*** 7042,7136 ****
                        (label_ref (match_operand 0 "" ""))
                        (pc)))]
    "reload_completed"
-   "#"
-   "&& reload_completed"
-   [(parallel [(set (pc)
-                    (if_then_else (match_op_dup 1
-                                    [(reg:CC REG_CC)
-                                     (const_int 0)])
-                                  (label_ref (match_dup 0))
-                                  (pc)))
-               (clobber (reg:CC REG_CC))])])
- 
- (define_insn "*difficult_branch"
-   [(set (pc)
-         (if_then_else (match_operator 1 "difficult_comparison_operator"
-                         [(reg:CC REG_CC)
-                          (const_int 0)])
-                       (label_ref (match_operand 0 "" ""))
-                       (pc)))
-    (clobber (reg:CC REG_CC))]
-   "reload_completed"
    {
      return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0);
    }
    [(set_attr "type" "branch1")])
  
- ;; revers branch
- 
- (define_insn_and_split "rvbranch"
-   [(set (pc)
-         (if_then_else (match_operator 1 "simple_comparison_operator"
-                                       [(reg:CC REG_CC)
-                                        (const_int 0)])
-                       (pc)
-                       (label_ref (match_operand 0 "" ""))))]
-   "reload_completed"
-   "#"
-   "&& reload_completed"
-   [(parallel [(set (pc)
-                    (if_then_else (match_op_dup 1
-                                                [(reg:CC REG_CC)
-                                                 (const_int 0)])
-                                  (pc)
-                                  (label_ref (match_dup 0))))
-               (clobber (reg:CC REG_CC))])])
- 
- (define_insn "*rvbranch"
-   [(set (pc)
-         (if_then_else (match_operator 1 "simple_comparison_operator"
-                                       [(reg:CC REG_CC)
-                                        (const_int 0)])
-                       (pc)
-                       (label_ref (match_operand 0 "" ""))))
-    (clobber (reg:CC REG_CC))]
-   "reload_completed"
-   {
-     return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 1);
-   }
-   [(set_attr "type" "branch1")])
- 
- (define_insn_and_split "difficult_rvbranch"
-   [(set (pc)
-         (if_then_else (match_operator 1 "difficult_comparison_operator"
-                                       [(reg:CC REG_CC)
-                                        (const_int 0)])
-                       (pc)
-                       (label_ref (match_operand 0 "" ""))))]
-   "reload_completed"
-   "#"
-   "&& reload_completed"
-   [(parallel [(set (pc)
-                    (if_then_else (match_op_dup 1
-                                                [(reg:CC REG_CC)
-                                                 (const_int 0)])
-                                  (pc)
-                                  (label_ref (match_dup 0))))
-               (clobber (reg:CC REG_CC))])])
- 
- (define_insn "*difficult_rvbranch"
-   [(set (pc)
-         (if_then_else (match_operator 1 "difficult_comparison_operator"
-                                       [(reg:CC REG_CC)
-                                        (const_int 0)])
-                       (pc)
-                       (label_ref (match_operand 0 "" ""))))
-    (clobber (reg:CC REG_CC))]
-   "reload_completed"
-   {
-     return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 1);
-   }
-   [(set_attr "type" "branch")])
  
  ;; **************************************************************************
  ;; Unconditional and other jump instructions.
--- 7059,7069 ----
***************
*** 7656,7670 ****
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                             (const_int -1)))
!               (clobber (match_operand:QI 1 "d_register_operand" ""))])
!    (parallel [(set (pc)
!                    (if_then_else (eqne (reg:CC REG_CC)
!                                        (const_int 0))
!                                  (label_ref (match_operand 2 "" ""))
!                                  (pc)))
!               (clobber (reg:CC REG_CC))])]
!   ""
    {
      const char *op;
      int jump_mode;
--- 7589,7602 ----
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                                (const_int -1)))
!               (clobber (match_operand:QI 1 "scratch_or_d_register_operand"))])
!    (set (pc)
!         (if_then_else (eqne (reg:CC REG_CC)
!                             (const_int 0))
!                       (label_ref (match_operand 2))
!                       (pc)))]
!   "dead_or_set_regno_p (insn, REG_CC)"
    {
      const char *op;
      int jump_mode;
***************
*** 7700,7714 ****
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                             (const_int -1)))
                (clobber (match_operand:QI 1 "d_register_operand" ""))])
!    (parallel [(set (pc)
!                    (if_then_else (eqne (reg:CC REG_CC)
!                                        (const_int 0))
!                                  (label_ref (match_operand 2 "" ""))
!                                  (pc)))
!               (clobber (reg:CC REG_CC))])]
!   ""
    {
      const char *op;
      int jump_mode;
--- 7632,7645 ----
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                                (const_int -1)))
                (clobber (match_operand:QI 1 "d_register_operand" ""))])
!    (set (pc)
!         (if_then_else (eqne (reg:CC REG_CC)
!                             (const_int 0))
!                       (label_ref (match_operand 2))
!                       (pc)))]
!   "dead_or_set_regno_p (insn, REG_CC)"
    {
      const char *op;
      int jump_mode;
***************
*** 7742,7756 ****
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                             (const_int -1)))
!               (clobber (match_operand:QI 1 "d_register_operand" ""))])
!    (parallel [(set (pc)
!                    (if_then_else (eqne (reg:CC REG_CC)
!                                        (const_int 0))
!                                  (label_ref (match_operand 2 "" ""))
!                                  (pc)))
!               (clobber (reg:CC REG_CC))])]
!   ""
    {
      const char *op;
      int jump_mode;
--- 7673,7686 ----
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                                (const_int -1)))
!               (clobber (match_operand:QI 1 "scratch_or_d_register_operand"))])
!    (set (pc)
!         (if_then_else (eqne (reg:CC REG_CC)
!                             (const_int 0))
!                       (label_ref (match_operand 2))
!                       (pc)))]
!   "dead_or_set_regno_p (insn, REG_CC)"
    {
      const char *op;
      int jump_mode;
***************
*** 7784,7798 ****
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                             (const_int -1)))
                (clobber (match_operand:QI 1 "d_register_operand" ""))])
!    (parallel [(set (pc)
!                    (if_then_else (eqne (reg:CC REG_CC)
!                                        (const_int 0))
!                                  (label_ref (match_operand 2 "" ""))
!                                  (pc)))
!               (clobber (reg:CC REG_CC))])]
!   ""
    {
      const char *op;
      int jump_mode;
--- 7714,7727 ----
                (clobber (reg:CC REG_CC))])
     (parallel [(set (reg:CC REG_CC)
                     (compare:CC (match_dup 0)
!                                (const_int -1)))
                (clobber (match_operand:QI 1 "d_register_operand" ""))])
!    (set (pc)
!         (if_then_else (eqne (reg:CC REG_CC)
!                             (const_int 0))
!                       (label_ref (match_operand 2))
!                       (pc)))]
!   "dead_or_set_regno_p (insn, REG_CC)"
    {
      const char *op;
      int jump_mode;
***************
*** 7822,7835 ****
                (clobber (reg:CC REG_CC))])
     (set (reg:CC REG_CC)
          (compare:CC (match_dup 0)
!                  (const_int -1)))
!    (parallel [(set (pc)
!                    (if_then_else (eqne (reg:CC REG_CC)
!                                        (const_int 0))
!                                  (label_ref (match_operand 1 "" ""))
!                                  (pc)))
!               (clobber (reg:CC REG_CC))])]
!   ""
    {
      const char *op;
      int jump_mode;
--- 7751,7763 ----
                (clobber (reg:CC REG_CC))])
     (set (reg:CC REG_CC)
          (compare:CC (match_dup 0)
!                     (const_int -1)))
!    (set (pc)
!         (if_then_else (eqne (reg:CC REG_CC)
!                             (const_int 0))
!                       (label_ref (match_operand 1))
!                       (pc)))]
!   "dead_or_set_regno_p (insn, REG_CC)"
    {
      const char *op;
      int jump_mode;
***************
*** 7855,7868 ****
  (define_peephole ; "*cpse.eq"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL1 1 "register_operand" "r,r")
!                  (match_operand:ALL1 2 "reg_or_0_operand" "r,Y00")))
!    (parallel [(set (pc)
!                    (if_then_else (eq (reg:CC REG_CC)
!                                      (const_int 0))
!                                  (label_ref (match_operand 0 "" ""))
!                                  (pc)))
!               (clobber (reg:CC REG_CC))])]
!   "jump_over_one_insn_p (insn, operands[0])"
    "@
  	cpse %1,%2
  	cpse %1,__zero_reg__")
--- 7783,7796 ----
  (define_peephole ; "*cpse.eq"
    [(set (reg:CC REG_CC)
          (compare:CC (match_operand:ALL1 1 "register_operand" "r,r")
!                     (match_operand:ALL1 2 "reg_or_0_operand" "r,Y00")))
!    (set (pc)
!         (if_then_else (eq (reg:CC REG_CC)
!                           (const_int 0))
!                       (label_ref (match_operand 0))
!                       (pc)))]
!   "jump_over_one_insn_p (insn, operands[0])
!    && dead_or_set_regno_p (insn, REG_CC)"
    "@
  	cpse %1,%2
  	cpse %1,__zero_reg__")
***************
*** 7890,7905 ****
  
  (define_peephole ; "*cpse.ne"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALL1 1 "register_operand" "")
!                  (match_operand:ALL1 2 "reg_or_0_operand" "")))
!    (parallel [(set (pc)
!                    (if_then_else (ne (reg:CC REG_CC)
!                                      (const_int 0))
!                                  (label_ref (match_operand 0 "" ""))
!                                  (pc)))
!               (clobber (reg:CC REG_CC))])]
!   "!AVR_HAVE_JMP_CALL
!    || !TARGET_SKIP_BUG"
    {
      if (operands[2] == CONST0_RTX (mode))
        operands[2] = zero_reg_rtx;
--- 7818,7833 ----
  
  (define_peephole ; "*cpse.ne"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALL1 1 "register_operand")
!                     (match_operand:ALL1 2 "reg_or_0_operand")))
!    (set (pc)
!         (if_then_else (ne (reg:CC REG_CC)
!                           (const_int 0))
!                       (label_ref (match_operand 0))
!                       (pc)))]
!   "(!AVR_HAVE_JMP_CALL
!     || !TARGET_SKIP_BUG)
!    && dead_or_set_regno_p (insn, REG_CC)"
    {
      if (operands[2] == CONST0_RTX (mode))
        operands[2] = zero_reg_rtx;
***************
*** 8094,8100 ****
                                  (const_int 1)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (reg:CC REG_CC))])])
  
--- 8022,8028 ----
                                  (const_int 1)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                    (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (reg:CC REG_CC))])])
  
***************
*** 8126,8132 ****
                                  (const_int 2)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (reg:CC REG_CC))])]
    ""
--- 8054,8060 ----
                                  (const_int 2)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                    (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (reg:CC REG_CC))])]
    ""
***************
*** 8163,8169 ****
                                  (const_int 3)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (match_dup 3))
                (clobber (match_dup 4))
--- 8091,8097 ----
                                  (const_int 3)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                    (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (match_dup 3))
                (clobber (match_dup 4))
***************
*** 8206,8212 ****
                                  (const_int 4)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (match_dup 3))
                (clobber (match_dup 4))
--- 8134,8140 ----
                                  (const_int 4)]
                                 UNSPECV_DELAY_CYCLES)
                (set (match_dup 1)
!                    (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
                (clobber (match_dup 2))
                (clobber (match_dup 3))
                (clobber (match_dup 4))
***************
*** 9095,9110 ****
    "bst %3,0\;bld %0,%4"
    [(set_attr "length" "2")])
  
! ;; Move bit $3.0 into bit $0.0.
! ;; For bit 0, combiner generates slightly different pattern.
! (define_insn "*movbitqi.0"
!   [(set (match_operand:QI 0 "register_operand"                     "=r")
!         (ior:QI (and:QI (match_operand:QI 1 "register_operand"      "0")
!                         (match_operand:QI 2 "single_zero_operand"   "n"))
!                 (and:QI (match_operand:QI 3 "register_operand"      "r")
!                         (const_int 1))))]
!   "0 == exact_log2 (~INTVAL(operands[2]) & GET_MODE_MASK (QImode))"
!   "bst %3,0\;bld %0,0"
    [(set_attr "length" "2")])
  
  ;; Move bit $2.0 into bit $0.7.
--- 9023,9042 ----
    "bst %3,0\;bld %0,%4"
    [(set_attr "length" "2")])
  
! ;; Move bit $3.x into bit $0.x.
! (define_insn "*movbit.0-6"
!   [(set (match_operand:QISI 0 "register_operand"                       "=r")
!         (ior:QISI (and:QISI (match_operand:QISI 1 "register_operand"    "0")
!                             (match_operand:QISI 2 "single_zero_operand" "n"))
!                   (and:QISI (match_operand:QISI 3 "register_operand"    "r")
!                             (match_operand:QISI 4 "single_one_operand"  "n"))))]
!   "GET_MODE_MASK(mode)
!    == (GET_MODE_MASK(mode) & (INTVAL(operands[2]) ^ INTVAL(operands[4])))"
!   {
!     auto bitmask = GET_MODE_MASK (mode) & UINTVAL (operands[4]);
!     operands[4] = GEN_INT (exact_log2 (bitmask));
!     return "bst %T3%T4" CR_TAB "bld %T0%T4";
!   }
    [(set_attr "length" "2")])
  
  ;; Move bit $2.0 into bit $0.7.
***************
*** 9489,9494 ****
--- 9421,9678 ----
                (clobber (reg:CC REG_CC))])])
  
  
+ ;; Try optimize decrement-and-branch.  When we have an addition followed
+ ;; by a comparison of the result against zero, we can output the addition
+ ;; in such a way that SREG.N and SREG.Z are set according to the result.
+ 
+ ;; { -1, +1 } for QImode, otherwise the empty set.
+ (define_mode_attr p1m1 [(QI "N P")
+                         (HI "Yxx") (PSI "Yxx") (SI "Yxx")])
+ 
+ ;; FIXME: reload1.cc::do_output_reload() does not support output reloads
+ ;; for JUMP_INSNs, hence letting combine doing decrement-and-branch like
+ ;; the following might run into ICE.  Doing reloads by hand is too painful...
+ ;
+ ; (define_insn_and_split "*add.for.eqne..cbranch"
+ ;   [(set (pc)
+ ;         (if_then_else (eqne (match_operand:QISI 1 "register_operand"  "0")
+ ;                             (match_operand:QISI 2 "const_int_operand" "n"))
+ ;                       (label_ref (match_operand 4))
+ ;                       (pc)))
+ ;    (set (match_operand:QISI 0 "register_operand" "=r")
+ ;         (plus:QISI (match_dup 1)
+ ;                    (match_operand:QISI 3 "const_int_operand" "n")))]
+ ;   ;; No clobber for now as combine might not have one handy.
+ ;   ;; We pop a scatch in split1.
+ ;   "!reload_completed
+ ;    && const0_rtx == simplify_binary_operation (PLUS, mode,
+ ;                                                operands[2], operands[3])"
+ ;   { gcc_unreachable(); }
+ ;   "&& 1"
+ ;   [(parallel [(set (pc)
+ ;                    (if_then_else (eqne (match_dup 1)
+ ;                                        (match_dup 2))
+ ;                                  (label_ref (match_dup 4))
+ ;                                  (pc)))
+ ;               (set (match_dup 0)
+ ;                    (plus:QISI (match_dup 1)
+ ;                               (match_dup 3)))
+ ;               (clobber (scratch:QI))])])
+ ;
+ ;; ...Hence, stick with RTL peepholes for now.  Unfortunately, there is no
+ ;; canonical form, and if reload shuffles registers around, we might miss
+ ;; opportunities to match a decrement-and-branch.
+ ;; doloop_end doesn't reload either, so doloop_end also won't work.
+ 
+ (define_expand "gen_add_for__"
+   ; "*add.for.eqne."
+   [(parallel [(set (reg:CC REG_CC)
+                    (compare:CC (plus:QISI (match_operand:QISI 0 "register_operand")
+                                           (match_operand:QISI 1 "const_int_operand"))
+                                (const_int 0)))
+               (set (match_dup 0)
+                    (plus:QISI (match_dup 0)
+                               (match_dup 1)))
+               (clobber (match_operand:QI 3))])
+    ; "branch"
+    (set (pc)
+         (if_then_else (eqne (reg:CC REG_CC)
+                             (const_int 0))
+                       (label_ref (match_dup 2))
+                       (pc)))])
+ 
+ 
+ ;; 1/3: A version without clobber: d-reg or 8-bit adds +/-1.
+ (define_peephole2
+   [(parallel [(set (match_operand:QISI 0 "register_operand")
+                    (plus:QISI (match_dup 0)
+                               (match_operand:QISI 1 "const_int_operand")))
+               (clobber (reg:CC REG_CC))])
+    (set (reg:CC REG_CC)
+         (compare:CC (match_dup 0)
+                     (const_int 0)))
+    (set (pc)
+         (if_then_else (eqne (reg:CC REG_CC)
+                             (const_int 0))
+                       (label_ref (match_operand 2))
+                       (pc)))]
+   "peep2_regno_dead_p (3, REG_CC)
+    && (d_register_operand (operands[0], mode)
+        || (mode == QImode
+            && (INTVAL (operands[1]) == 1
+                || INTVAL (operands[1]) == -1)))"
+   [(scratch)]
+   {
+     emit (gen_gen_add_for__ (operands[0], operands[1], operands[2],
+           gen_rtx_SCRATCH (QImode)));
+     DONE;
+   })
+ 
+ ;; 2/3: A version with clobber from the insn.
+ (define_peephole2
+   [(parallel [(set (match_operand:QISI 0 "register_operand")
+                    (plus:QISI (match_dup 0)
+                               (match_operand:QISI 1 "const_int_operand")))
+               (clobber (match_operand:QI 3 "scratch_or_d_register_operand"))
+               (clobber (reg:CC REG_CC))])
+    (parallel [(set (reg:CC REG_CC)
+                    (compare:CC (match_dup 0)
+                                (const_int 0)))
+               (clobber (match_operand:QI 4 "scratch_or_d_register_operand"))])
+    (set (pc)
+         (if_then_else (eqne (reg:CC REG_CC)
+                             (const_int 0))
+                       (label_ref (match_operand 2))
+                       (pc)))]
+   "peep2_regno_dead_p (3, REG_CC)"
+   [(scratch)]
+   {
+     rtx scratch = REG_P (operands[3]) ? operands[3] : operands[4];
+ 
+     // We need either a d-register or a scratch register to clobber.
+     if (! REG_P (scratch)
+         && ! d_register_operand (operands[0], mode)
+         && ! (QImode == mode
+               && (INTVAL (operands[1]) == 1
+                   || INTVAL (operands[1]) == -1)))
+       {
+         FAIL;
+       }
+     emit (gen_gen_add_for__ (operands[0], operands[1], operands[2],
+           scratch));
+     DONE;
+   })
+ 
+ ;; 3/3 A version with a clobber from peephole2.
+ (define_peephole2
+   [(match_scratch:QI 3 "d")
+    (parallel [(set (match_operand:QISI 0 "register_operand")
+                    (plus:QISI (match_dup 0)
+                               (match_operand:QISI 1 "const_int_operand")))
+               (clobber (reg:CC REG_CC))])
+    (set (reg:CC REG_CC)
+         (compare:CC (match_dup 0)
+                     (const_int 0)))
+    (set (pc)
+         (if_then_else (eqne (reg:CC REG_CC)
+                             (const_int 0))
+                       (label_ref (match_operand 2))
+                       (pc)))]
+   "peep2_regno_dead_p (3, REG_CC)"
+   [(scratch)]
+   {
+     emit (gen_gen_add_for__ (operands[0], operands[1], operands[2],
+           operands[3]));
+     DONE;
+   })
+ 
+ ;; Result of the above three peepholes is an addition that also
+ ;; performs an EQ or NE comparison (of the result) against zero.
+ ;; FIXME: Using (match_dup 0) instead of operands[3/4] makes rnregs
+ ;; barf in regrename.cc::merge_overlapping_regs().  For now, use the
+ ;; fix from PR50788: Constrain as "0".
+ (define_insn "*add.for.eqne."
+   [(set (reg:CC REG_CC)
+         (compare:CC
+          (plus:QISI (match_operand:QISI 3 "register_operand"  "0,0     ,0")
+                     (match_operand:QISI 1 "const_int_operand" "n,,n"))
+          (const_int 0)))
+    (set (match_operand:QISI 0 "register_operand"             "=d,*r    ,r")
+         (plus:QISI (match_operand:QISI 4 "register_operand"   "0,0     ,0")
+                    (match_dup 1)))
+    (clobber (match_scratch:QI 2                              "=X,X     ,&d"))]
+   "reload_completed"
+   {
+     return avr_out_plus_set_ZN (operands, nullptr);
+   }
+   [(set_attr "adjust_len" "add_set_ZN")])
+ 
+ 
+ ;; Swapping both comparison and branch condition.  This can turn difficult
+ ;; branches to easy ones.  And in some cases, a comparison against one can
+ ;; be turned into a comparison against zero.
+ 
+ (define_peephole2 ; "*swapped_tst"
+   [(parallel [(set (reg:CC REG_CC)
+                    (compare:CC (match_operand:ALLs234 1 "register_operand")
+                                (match_operand:ALLs234 2 "const_operand")))
+               (clobber (match_operand:QI 3 "scratch_operand"))])
+    (set (pc)
+         (if_then_else (match_operator 0 "ordered_comparison_operator"
+                         [(reg:CC REG_CC)
+                          (const_int 0)])
+                       (label_ref (match_operand 4))
+                       (pc)))]
+   "peep2_regno_dead_p (2, REG_CC)"
+   [(set (reg:CC REG_CC)
+         (compare:CC (match_dup 2)
+                     (match_dup 1)))
+    ; "branch"
+    (set (pc)
+         (if_then_else (match_op_dup 0 [(reg:CC REG_CC)
+                                        (const_int 0)])
+                       (label_ref (match_dup 4))
+                       (pc)))]
+   {
+     rtx xval = avr_to_int_mode (operands[2]);
+     enum rtx_code code = GET_CODE (operands[0]);
+ 
+     if (code == GT && xval == const0_rtx)
+       code = LT;
+     else if (code == GE && xval == const1_rtx)
+       code = LT;
+     else if (code == LE && xval == const0_rtx)
+       code = GE;
+     else if (code == LT && xval == const1_rtx)
+       code = GE;
+     else
+       FAIL;
+ 
+     operands[2] = CONST0_RTX (mode);
+     PUT_CODE (operands[0], code);
+   })
+ 
+ ;; Same, but for 8-bit modes which have no scratch reg.
+ (define_peephole2 ; "*swapped_tst"
+   [(set (reg:CC REG_CC)
+         (compare:CC (match_operand:ALLs1 1 "register_operand")
+                     (match_operand:ALLs1 2 "const_operand")))
+    (set (pc)
+         (if_then_else (match_operator 0 "ordered_comparison_operator"
+                         [(reg:CC REG_CC)
+                          (const_int 0)])
+                       (label_ref (match_operand 4))
+                       (pc)))]
+   "peep2_regno_dead_p (2, REG_CC)"
+   [(set (reg:CC REG_CC)
+         (compare:CC (match_dup 2)
+                     (match_dup 1)))
+    ; "branch"
+    (set (pc)
+         (if_then_else (match_op_dup 0 [(reg:CC REG_CC)
+                                        (const_int 0)])
+                       (label_ref (match_dup 4))
+                       (pc)))]
+   {
+     rtx xval = avr_to_int_mode (operands[2]);
+     enum rtx_code code = GET_CODE (operands[0]);
+ 
+     if (code == GT && xval == const0_rtx)
+       code = LT;
+     else if (code == GE && xval == const1_rtx)
+       code = LT;
+     else if (code == LE && xval == const0_rtx)
+       code = GE;
+     else if (code == LT && xval == const1_rtx)
+       code = GE;
+     else
+       FAIL;
+ 
+     operands[2] = CONST0_RTX (mode);
+     PUT_CODE (operands[0], code);
+   })
+ 
+ 
  (define_expand "extzv"
    [(set (match_operand:QI 0 "register_operand" "")
          (zero_extract:QI (match_operand:QI 1 "register_operand"  "")
diff -Nrcpad gcc-12.3.0/gcc/config/avr/avr.opt gcc-12.4.0/gcc/config/avr/avr.opt
*** gcc-12.3.0/gcc/config/avr/avr.opt	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/avr.opt	Thu Jun 20 08:08:06 2024
*************** Target RejectNegative Joined Var(avr_mmc
*** 27,33 ****
  -mmcu=MCU	Select the target MCU.
  
  mgas-isr-prologues
! Target Var(avr_gasisr_prologues) UInteger Init(0)
  Allow usage of __gcc_isr pseudo instructions in ISR prologues and epilogues.
  
  mn-flash=
--- 27,33 ----
  -mmcu=MCU	Select the target MCU.
  
  mgas-isr-prologues
! Target Var(avr_gasisr_prologues) UInteger Init(0) Optimization
  Allow usage of __gcc_isr pseudo instructions in ISR prologues and epilogues.
  
  mn-flash=
*************** Target RejectNegative Mask(NO_INTERRUPTS
*** 61,71 ****
  Change the stack pointer without disabling interrupts.
  
  mbranch-cost=
! Target Joined RejectNegative UInteger Var(avr_branch_cost) Init(0)
  Set the branch costs for conditional branch instructions.  Reasonable values are small, non-negative integers.  The default branch cost is 0.
  
  mmain-is-OS_task
! Target Mask(MAIN_IS_OS_TASK)
  Treat main as if it had attribute OS_task.
  
  morder1
--- 61,71 ----
  Change the stack pointer without disabling interrupts.
  
  mbranch-cost=
! Target Joined RejectNegative UInteger Var(avr_branch_cost) Init(0) Optimization
  Set the branch costs for conditional branch instructions.  Reasonable values are small, non-negative integers.  The default branch cost is 0.
  
  mmain-is-OS_task
! Target Mask(MAIN_IS_OS_TASK) Optimization
  Treat main as if it had attribute OS_task.
  
  morder1
*************** Target Mask(ABSDATA)
*** 116,126 ****
  Assume that all data in static storage can be accessed by LDS / STS.  This option is only useful for reduced Tiny devices.
  
  mdouble=
! Target Joined RejectNegative Var(avr_double) Init(0) Enum(avr_bits_e)
  -mdouble=	Use  bits wide double type.
  
  mlong-double=
! Target Joined RejectNegative Var(avr_long_double) Init(0) Enum(avr_bits_e)
  -mlong-double=	Use  bits wide long double type.
  
  nodevicelib
--- 116,126 ----
  Assume that all data in static storage can be accessed by LDS / STS.  This option is only useful for reduced Tiny devices.
  
  mdouble=
! Target Joined RejectNegative Var(avr_double) Init(0) Enum(avr_bits_e) Save
  -mdouble=	Use  bits wide double type.
  
  mlong-double=
! Target Joined RejectNegative Var(avr_long_double) Init(0) Enum(avr_bits_e) Save
  -mlong-double=	Use  bits wide long double type.
  
  nodevicelib
diff -Nrcpad gcc-12.3.0/gcc/config/avr/constraints.md gcc-12.4.0/gcc/config/avr/constraints.md
*** gcc-12.3.0/gcc/config/avr/constraints.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/constraints.md	Thu Jun 20 08:08:06 2024
***************
*** 245,250 ****
--- 245,255 ----
  	    (match_test "INTVAL (avr_to_int_mode (op)) == -2"))
         (match_test "satisfies_constraint_Cm2 (op)")))
  
+ ;; Constraint that's the empty set.  Useful with mode and code iterators.
+ (define_constraint "Yxx"
+   "A constraints that is always false"
+   (match_test "false"))
+ 
  (define_constraint "Yx2"
    "Fixed-point or integer constant not in the range @minus{}2 @dots{} 2"
    (and (ior (match_code "const_int")
diff -Nrcpad gcc-12.3.0/gcc/config/avr/driver-avr.cc gcc-12.4.0/gcc/config/avr/driver-avr.cc
*** gcc-12.3.0/gcc/config/avr/driver-avr.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/avr/driver-avr.cc	Thu Jun 20 08:08:06 2024
*************** avr_devicespecs_file (int argc, const ch
*** 103,111 ****
        }
  
    return concat ("%{!nodevicespecs:-specs=device-specs", dir_separator_str,
! 				 "specs-", mmcu, "%s} %= 16 && REGNO (op) <= 31")))
  
+ (define_predicate "scratch_or_d_register_operand"
+   (ior (match_operand 0 "d_register_operand")
+        (and (match_code ("scratch"))
+             (match_operand 0 "scratch_operand"))))
+ 
  (define_predicate "even_register_operand"
    (and (match_code "reg")
         (and (match_test "REGNO (op) <= 31")
diff -Nrcpad gcc-12.3.0/gcc/config/darwin-protos.h gcc-12.4.0/gcc/config/darwin-protos.h
*** gcc-12.3.0/gcc/config/darwin-protos.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/darwin-protos.h	Thu Jun 20 08:08:06 2024
*************** extern void darwin_patch_builtins (void)
*** 129,132 ****
--- 129,143 ----
  extern void darwin_rename_builtins (void);
  extern bool darwin_libc_has_function (enum function_class fn_class, tree);
  
+ /* For this port, there are several possible sources for external toolchain
+    components (e.g. as, ld, dsymutil) and we have to alter the allowable
+    output in response to which version and source is in use.  */
+ enum darwin_external_toolchain {
+   DET_UNKNOWN=0,
+   CCTOOLS,
+   DWARFUTILS,
+   LLVM,
+   CLANG
+ };
+ 
  #endif /* CONFIG_DARWIN_PROTOS_H */
diff -Nrcpad gcc-12.3.0/gcc/config/darwin-sections.def gcc-12.4.0/gcc/config/darwin-sections.def
*** gcc-12.3.0/gcc/config/darwin-sections.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/darwin-sections.def	Thu Jun 20 08:08:06 2024
*************** DEF_SECTION (mod_init_section, 0, ".mod_
*** 98,103 ****
--- 98,105 ----
  DEF_SECTION (mod_term_section, 0, ".mod_term_func", 0)
  DEF_SECTION (constructor_section, 0, ".constructor", 0)
  DEF_SECTION (destructor_section, 0, ".destructor", 0)
+ DEF_SECTION (static_init_section, SECTION_CODE,
+ 	     ".section\t__TEXT,__StaticInit,regular,pure_instructions", 0)
  
  /* Objective-C ABI=0 (Original version) sections.  */
  DEF_SECTION (objc_class_section, 0, ".objc_class", 1)
*************** DEF_SECTION (machopic_picsymbol_stub3_se
*** 157,163 ****
  
  /* Exception-related.  */
  DEF_SECTION (darwin_exception_section, SECTION_NO_ANCHOR,
! 	     ".section __DATA,__gcc_except_tab", 0)
  DEF_SECTION (darwin_eh_frame_section, SECTION_NO_ANCHOR,
  	     ".section " EH_FRAME_SECTION_NAME ",__eh_frame"
  	     EH_FRAME_SECTION_ATTR, 0)
--- 159,165 ----
  
  /* Exception-related.  */
  DEF_SECTION (darwin_exception_section, SECTION_NO_ANCHOR,
! 	     ".section __TEXT,__gcc_except_tab", 0)
  DEF_SECTION (darwin_eh_frame_section, SECTION_NO_ANCHOR,
  	     ".section " EH_FRAME_SECTION_NAME ",__eh_frame"
  	     EH_FRAME_SECTION_ATTR, 0)
diff -Nrcpad gcc-12.3.0/gcc/config/darwin.cc gcc-12.4.0/gcc/config/darwin.cc
*** gcc-12.3.0/gcc/config/darwin.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/darwin.cc	Thu Jun 20 08:08:06 2024
*************** static bool ld_needs_eh_markers = false;
*** 114,119 ****
--- 114,132 ----
  /* Emit a section-start symbol for mod init and term sections.  */
  static bool ld_init_term_start_labels = false;
  
+ /* The source and version of dsymutil in use.  */
+ #ifndef DSYMUTIL_VERSION
+ # warning Darwin toolchain without a defined dsymutil.
+ # define DSYMUTIL_VERSION DET_UNKNOWN,0,0,0
+ #endif
+ 
+ struct {
+   darwin_external_toolchain kind; /* cctools, llvm, clang etc.  */
+   int major; /* version number.  */
+   int minor;
+   int tiny;
+ } dsymutil_version = {DSYMUTIL_VERSION};
+ 
  /* Section names.  */
  section * darwin_sections[NUM_DARWIN_SECTIONS];
  
*************** darwin_objc1_section (tree decl ATTRIBUT
*** 1586,1592 ****
    else if (startswith (p, "V1_CEXT"))
      return darwin_sections[objc1_class_ext_section];
  
!   else if (startswith (p, "V2_CSTR"))
      return darwin_sections[objc_constant_string_object_section];
  
    return base;
--- 1599,1605 ----
    else if (startswith (p, "V1_CEXT"))
      return darwin_sections[objc1_class_ext_section];
  
!   else if (startswith (p, "V1_CSTR"))
      return darwin_sections[objc_constant_string_object_section];
  
    return base;
*************** machopic_select_section (tree decl,
*** 1679,1685 ****
  	    base_section = darwin_sections[zobj_data_section];
  	}
        else if (ro)
! 	base_section = darwin_sections[const_data_section];
        else
  	base_section = data_section;
        break;
--- 1692,1707 ----
  	    base_section = darwin_sections[zobj_data_section];
  	}
        else if (ro)
! 	{
! 	  if (VAR_P (decl) && TREE_TYPE (decl)
! 	      && TREE_CODE (TREE_TYPE (decl)) == RECORD_TYPE
! 	      && DECL_NAME (decl)
! 	      && strncmp (IDENTIFIER_POINTER (DECL_NAME (decl)),
! 			  "__anon_cfstring", 15) == 0)
! 	   base_section = darwin_sections[cfstring_constant_object_section];
! 	  else
! 	    base_section = darwin_sections[const_data_section];
! 	}
        else
  	base_section = data_section;
        break;
*************** machopic_select_section (tree decl,
*** 1721,1727 ****
  	return base_section; /* GNU runtime is happy with it all in one pot.  */
      }
  
!   /* b) Constant string objects.  */
    if (TREE_CODE (decl) == CONSTRUCTOR
        && TREE_TYPE (decl)
        && TREE_CODE (TREE_TYPE (decl)) == RECORD_TYPE
--- 1743,1749 ----
  	return base_section; /* GNU runtime is happy with it all in one pot.  */
      }
  
!   /* b) Constructors for constant NSstring [but not CFString] objects.  */
    if (TREE_CODE (decl) == CONSTRUCTOR
        && TREE_TYPE (decl)
        && TREE_CODE (TREE_TYPE (decl)) == RECORD_TYPE
*************** machopic_select_section (tree decl,
*** 1744,1750 ****
  	    return darwin_sections[objc_string_object_section];
  	}
        else if (!strcmp (IDENTIFIER_POINTER (name), "__builtin_CFString"))
! 	return darwin_sections[cfstring_constant_object_section];
        else
  	return base_section;
      }
--- 1766,1776 ----
  	    return darwin_sections[objc_string_object_section];
  	}
        else if (!strcmp (IDENTIFIER_POINTER (name), "__builtin_CFString"))
! 	{
! 	  /* We should have handled __anon_cfstrings above.  */
! 	  gcc_checking_assert (0);
! 	  return darwin_sections[cfstring_constant_object_section];
! 	}
        else
  	return base_section;
      }
*************** darwin_label_is_anonymous_local_objc_nam
*** 1936,1941 ****
--- 1962,1969 ----
      }
    else if (startswith ((const char *)p, "ClassMethods"))
      return false;
+   else if (startswith ((const char *)p, "ClassProtocols"))
+     return false;
    else if (startswith ((const char *)p, "Instance"))
      {
        if (p[8] == 'I' || p[8] == 'M')
*************** darwin_emit_except_table_label (FILE *fi
*** 2230,2235 ****
--- 2258,2264 ----
  {
    char section_start_label[30];
  
+   fputs ("\t.p2align\t2\n", file);
    ASM_GENERATE_INTERNAL_LABEL (section_start_label, "GCC_except_table",
  			       except_table_label_num++);
    ASM_OUTPUT_LABEL (file, section_start_label);
*************** darwin_asm_output_dwarf_offset (FILE *fi
*** 3018,3024 ****
  void
  darwin_file_start (void)
  {
!   /* Nothing to do.  */
  }
  
  /* Called for the TARGET_ASM_FILE_END hook.
--- 3047,3081 ----
  void
  darwin_file_start (void)
  {
! #ifdef HAVE_AS_MMACOSX_VERSION_MIN_OPTION
!   /* This should not happen with a well-formed command line, but the user could
!      invoke cc1* directly without it.  */
!   if (!darwin_macosx_version_min)
!     return;
!   /* This assumes that the version passed has been validated in the driver.  */
!   unsigned maj, min, tiny;
!   int count = sscanf (darwin_macosx_version_min, "%u.%u.%u", &maj, &min, &tiny);
!   if (count < 0)
!     return;
!   if (count < 3)
!     tiny = 0;
!   if (count < 2)
!     min = 0;
!   const char *directive;
! #ifdef HAVE_AS_MACOS_BUILD_VERSION
!   /* We only handle macos, so far.  */
!   if (generating_for_darwin_version >= 18)
!     directive = "build_version macos, ";
!   else
! #endif
!     directive = "macosx_version_min ";
!   if (count > 2 && tiny != 0)
!     fprintf (asm_out_file, "\t.%s %u, %u, %u\n", directive, maj, min, tiny);
!   else if (count > 1)
!     fprintf (asm_out_file, "\t.%s %u, %u\n", directive, maj, min);
!   else
!      fprintf (asm_out_file, "\t.%s %u, 0\n", directive, maj);
! #endif
  }
  
  /* Called for the TARGET_ASM_FILE_END hook.
*************** darwin_override_options (void)
*** 3240,3246 ****
    /* Keep track of which (major) version we're generating code for.  */
    if (darwin_macosx_version_min)
      {
!       if (strverscmp (darwin_macosx_version_min, "10.7") >= 0)
  	generating_for_darwin_version = 11;
        else if (strverscmp (darwin_macosx_version_min, "10.6") >= 0)
  	generating_for_darwin_version = 10;
--- 3297,3307 ----
    /* Keep track of which (major) version we're generating code for.  */
    if (darwin_macosx_version_min)
      {
!       if (strverscmp (darwin_macosx_version_min, "10.14") >= 0)
! 	generating_for_darwin_version = 18;
!       else if (strverscmp (darwin_macosx_version_min, "10.8") >= 0)
! 	generating_for_darwin_version = 12;
!       else if (strverscmp (darwin_macosx_version_min, "10.7") >= 0)
  	generating_for_darwin_version = 11;
        else if (strverscmp (darwin_macosx_version_min, "10.6") >= 0)
  	generating_for_darwin_version = 10;
*************** darwin_override_options (void)
*** 3315,3328 ****
  		  global_options.x_flag_objc_abi);
      }
  
-   /* Don't emit DWARF3/4 unless specifically selected.  This is a
-      workaround for tool bugs.  */
-   if (!OPTION_SET_P (dwarf_strict))
-     dwarf_strict = 1;
    if (!OPTION_SET_P (dwarf_version))
!     dwarf_version = 2;
  
!   if (OPTION_SET_P (dwarf_split_debug_info))
      {
        inform (input_location,
  	      "%<-gsplit-dwarf%> is not supported on this platform, ignored");
--- 3376,3396 ----
  		  global_options.x_flag_objc_abi);
      }
  
    if (!OPTION_SET_P (dwarf_version))
!     {
!       /* External toolchains based on LLVM or clang 7+ have support for
! 	 dwarf-4.  */
!       if ((dsymutil_version.kind == LLVM && dsymutil_version.major >= 7)
! 	  || (dsymutil_version.kind == CLANG && dsymutil_version.major >= 700))
! 	dwarf_version = 4;
!       else if (dsymutil_version.kind == DWARFUTILS
! 	       && dsymutil_version.major >= 121)
! 	dwarf_version = 3;  /* From XC 6.4.  */
!       else
! 	dwarf_version = 2;  /* Older cannot safely exceed dwarf-2.  */
!     }
  
!   if (OPTION_SET_P (dwarf_split_debug_info) && dwarf_split_debug_info)
      {
        inform (input_location,
  	      "%<-gsplit-dwarf%> is not supported on this platform, ignored");
*************** darwin_override_options (void)
*** 3330,3335 ****
--- 3398,3421 ----
        OPTION_SET_P (dwarf_split_debug_info) = 0;
      }
  
+   /* Cases where dsymutil will exclude files with .macinfo sections; we are
+      better off forcing the debug level to 2 than completely excluding the
+      files.  If strict dwarf is set, then emit the macinfo anyway.  */
+   if (debug_info_level == DINFO_LEVEL_VERBOSE
+       && (!OPTION_SET_P (dwarf_strict) || dwarf_strict == 0)
+       && ((dsymutil_version.kind == CLANG && dsymutil_version.major >= 1500)
+ 	  || (dsymutil_version.kind == LLVM && dsymutil_version.major >= 15)))
+     {
+       inform (input_location,
+ 	      "%<-g3%> is not supported by the debug linker in use (set to 2)");
+       debug_info_level = DINFO_LEVEL_NORMAL;
+     }
+ 
+   /* Limit DWARF to the chosen version, the linker and debug linker might not
+      be able to consume newer structures.  */
+   if (!OPTION_SET_P (dwarf_strict))
+     dwarf_strict = 1;
+ 
    /* Do not allow unwind tables to be generated by default for m32.
       fnon-call-exceptions will override this, regardless of what we do.  */
    if (generating_for_darwin_version < 10
*************** darwin_override_options (void)
*** 3398,3405 ****
        && dwarf_debuginfo_p ())
      flag_var_tracking_uninit = flag_var_tracking;
  
!   /* Final check on PCI options; for Darwin these are not dependent on the PIE
!      ones, although PIE does require PIC to support it.  */
    if (MACHO_DYNAMIC_NO_PIC_P)
      {
        if (flag_pic)
--- 3484,3500 ----
        && dwarf_debuginfo_p ())
      flag_var_tracking_uninit = flag_var_tracking;
  
!   if (OPTION_SET_P (flag_pie) && flag_pie)
!     {
!       /* This is a little complicated, to match Xcode tools.
! 	 For Darwin, PIE requires PIC codegen, but otherwise is only a link-
! 	 time change.  For almost all Darwin, we do not report __PIE__; the
! 	 exception is Darwin12-17 and for 32b only.  */
!       flag_pie = generating_for_darwin_version >= 12 && !TARGET_64BIT ? 2 : 0;
!       flag_pic = 2; /* We always set this.  */
!     }
! 
!   /* Final check on PIC options.  */
    if (MACHO_DYNAMIC_NO_PIC_P)
      {
        if (flag_pic)
*************** darwin_patch_builtins (void)
*** 3504,3509 ****
--- 3599,3627 ----
  }
  #endif
  
+ void
+ darwin_rename_builtins (void)
+ {
+ }
+ 
+ /* Implementation for the TARGET_LIBC_HAS_FUNCTION hook.  */
+ 
+ bool
+ darwin_libc_has_function (enum function_class fn_class,
+ 			  tree type ATTRIBUTE_UNUSED)
+ {
+   if (fn_class == function_sincos && darwin_macosx_version_min)
+     return (strverscmp (darwin_macosx_version_min, "10.9") >= 0);
+ #if DARWIN_PPC && SUPPORT_DARWIN_LEGACY
+   if (fn_class == function_c99_math_complex
+       || fn_class == function_c99_misc)
+     return (TARGET_64BIT
+ 	    || (darwin_macosx_version_min &&
+ 		strverscmp (darwin_macosx_version_min, "10.3") >= 0));
+ #endif
+   return default_libc_has_function (fn_class, type);
+ }
+ 
  /*  CFStrings implementation.  */
  static GTY(()) tree cfstring_class_reference = NULL_TREE;
  static GTY(()) tree cfstring_type_node = NULL_TREE;
*************** typedef struct GTY ((for_user)) cfstring
*** 3521,3527 ****
    /* The string literal.  */
    tree literal;
    /* The resulting constant CFString.  */
!   tree constructor;
  } cfstring_descriptor;
  
  struct cfstring_hasher : ggc_ptr_hash
--- 3639,3645 ----
    /* The string literal.  */
    tree literal;
    /* The resulting constant CFString.  */
!   tree ccf_str;
  } cfstring_descriptor;
  
  struct cfstring_hasher : ggc_ptr_hash
*************** darwin_init_cfstring_builtins (unsigned
*** 3596,3602 ****
    /* Make a lang-specific section - dup_lang_specific_decl makes a new node
       in place of the existing, which may be NULL.  */
    DECL_LANG_SPECIFIC (cfsfun) = NULL;
!   (*lang_hooks.dup_lang_specific_decl) (cfsfun);
    set_decl_built_in_function (cfsfun, BUILT_IN_MD, darwin_builtin_cfstring);
    lang_hooks.builtin_function (cfsfun);
  
--- 3714,3720 ----
    /* Make a lang-specific section - dup_lang_specific_decl makes a new node
       in place of the existing, which may be NULL.  */
    DECL_LANG_SPECIFIC (cfsfun) = NULL;
!   lang_hooks.dup_lang_specific_decl (cfsfun);
    set_decl_built_in_function (cfsfun, BUILT_IN_MD, darwin_builtin_cfstring);
    lang_hooks.builtin_function (cfsfun);
  
*************** darwin_init_cfstring_builtins (unsigned
*** 3607,3613 ****
  
    TREE_PUBLIC (cfstring_class_reference) = 1;
    DECL_ARTIFICIAL (cfstring_class_reference) = 1;
!   (*lang_hooks.decls.pushdecl) (cfstring_class_reference);
    DECL_EXTERNAL (cfstring_class_reference) = 1;
    rest_of_decl_compilation (cfstring_class_reference, 0, 0);
  
--- 3725,3731 ----
  
    TREE_PUBLIC (cfstring_class_reference) = 1;
    DECL_ARTIFICIAL (cfstring_class_reference) = 1;
!   lang_hooks.decls.pushdecl (cfstring_class_reference);
    DECL_EXTERNAL (cfstring_class_reference) = 1;
    rest_of_decl_compilation (cfstring_class_reference, 0, 0);
  
*************** darwin_fold_builtin (tree fndecl, int n_
*** 3644,3672 ****
    return NULL_TREE;
  }
  
- void
- darwin_rename_builtins (void)
- {
- }
- 
- /* Implementation for the TARGET_LIBC_HAS_FUNCTION hook.  */
- 
- bool
- darwin_libc_has_function (enum function_class fn_class,
- 			  tree type ATTRIBUTE_UNUSED)
- {
-   if (fn_class == function_sincos && darwin_macosx_version_min)
-     return (strverscmp (darwin_macosx_version_min, "10.9") >= 0);
- #if DARWIN_PPC && SUPPORT_DARWIN_LEGACY
-   if (fn_class == function_c99_math_complex
-       || fn_class == function_c99_misc)
-     return (TARGET_64BIT
- 	    || (darwin_macosx_version_min &&
- 		strverscmp (darwin_macosx_version_min, "10.3") >= 0));
- #endif
-   return default_libc_has_function (fn_class, type);
- }
- 
  hashval_t
  cfstring_hasher::hash (cfstring_descriptor *ptr)
  {
--- 3762,3767 ----
*************** darwin_build_constant_cfstring (tree str
*** 3764,3792 ****
  			     build_int_cst (TREE_TYPE (field), length));
  
        constructor = build_constructor (ccfstring_type_node, v);
!       TREE_READONLY (constructor) = 1;
!       TREE_CONSTANT (constructor) = 1;
!       TREE_STATIC (constructor) = 1;
  
!       /* Fromage: The C++ flavor of 'build_unary_op' expects constructor nodes
! 	 to have the TREE_HAS_CONSTRUCTOR (...) bit set.  However, this file is
! 	 being built without any knowledge of C++ tree accessors; hence, we shall
! 	 use the generic accessor that TREE_HAS_CONSTRUCTOR actually maps to!  */
        if (darwin_running_cxx)
  	TREE_LANG_FLAG_4 (constructor) = 1;  /* TREE_HAS_CONSTRUCTOR  */
  
        /* Create an anonymous global variable for this CFString.  */
!       var = build_decl (input_location, CONST_DECL,
  			NULL, TREE_TYPE (constructor));
!       DECL_ARTIFICIAL (var) = 1;
!       TREE_STATIC (var) = 1;
        DECL_INITIAL (var) = constructor;
!       /* FIXME: This should use a translation_unit_decl to indicate file scope.  */
        DECL_CONTEXT (var) = NULL_TREE;
!       desc->constructor = var;
      }
  
!   addr = build1 (ADDR_EXPR, pccfstring_type_node, desc->constructor);
    TREE_CONSTANT (addr) = 1;
  
    return addr;
--- 3859,3895 ----
  			     build_int_cst (TREE_TYPE (field), length));
  
        constructor = build_constructor (ccfstring_type_node, v);
!       TREE_READONLY (constructor) = true;
!       TREE_CONSTANT (constructor) = true;
!       TREE_STATIC (constructor) = true;
  
!       /* This file is being built without any knowledge of C++ tree accessors;
! 	 hence, we shall use the generic accessor to set TREE_HAS_CONSTRUCTOR.
! 	 ??? Is this actually used any more? */
        if (darwin_running_cxx)
  	TREE_LANG_FLAG_4 (constructor) = 1;  /* TREE_HAS_CONSTRUCTOR  */
  
        /* Create an anonymous global variable for this CFString.  */
!       var = build_decl (input_location, VAR_DECL,
  			NULL, TREE_TYPE (constructor));
!       char *name = xasprintf ("__anon_cfstring.%u", DECL_UID (var));
!       DECL_NAME (var) = get_identifier (name);
!       free (name);
!       DECL_ARTIFICIAL (var) = true;
!       TREE_STATIC (var) = true;
!       TREE_READONLY (var) = true;
!       TREE_CONSTANT (var) = true;
        DECL_INITIAL (var) = constructor;
!       /* global namespace.  */
        DECL_CONTEXT (var) = NULL_TREE;
!       DECL_INITIAL (var) = constructor;
!       DECL_USER_ALIGN (var) = 1;
!       lang_hooks.decls.pushdecl (var);
!       rest_of_decl_compilation (var, 1, 0);
!       desc->ccf_str = var;
      }
  
!   addr = build1 (ADDR_EXPR, pccfstring_type_node, desc->ccf_str);
    TREE_CONSTANT (addr) = 1;
  
    return addr;
*************** darwin_function_section (tree decl, enum
*** 3851,3861 ****
    if (decl && DECL_SECTION_NAME (decl) != NULL)
      return get_named_section (decl, NULL, 0);
  
!   /* We always put unlikely executed stuff in the cold section.  */
    if (freq == NODE_FREQUENCY_UNLIKELY_EXECUTED)
      return (use_coal) ? darwin_sections[text_cold_coal_section]
  		      : darwin_sections[text_cold_section];
  
    /* If we have LTO *and* feedback information, then let LTO handle
       the function ordering, it makes a better job (for normal, hot,
       startup and exit - hence the bailout for cold above).  */
--- 3954,3975 ----
    if (decl && DECL_SECTION_NAME (decl) != NULL)
      return get_named_section (decl, NULL, 0);
  
!   /* We always put unlikely executed stuff in the cold section; we have to put
!      this ahead of the global init section, since partitioning within a section
!      breaks some assumptions made in the DWARF handling.  */
    if (freq == NODE_FREQUENCY_UNLIKELY_EXECUTED)
      return (use_coal) ? darwin_sections[text_cold_coal_section]
  		      : darwin_sections[text_cold_section];
  
+   /* Intercept functions in global init; these are placed in separate sections.
+      FIXME: there should be some neater way to do this, FIXME we should be able
+      to partition within a section.  */
+   if (DECL_NAME (decl)
+       && (startswith (IDENTIFIER_POINTER (DECL_NAME (decl)), "_GLOBAL__sub_I")
+ 	  || startswith (IDENTIFIER_POINTER (DECL_NAME (decl)),
+ 			 "__static_initialization_and_destruction")))
+     return  darwin_sections[static_init_section];
+ 
    /* If we have LTO *and* feedback information, then let LTO handle
       the function ordering, it makes a better job (for normal, hot,
       startup and exit - hence the bailout for cold above).  */
diff -Nrcpad gcc-12.3.0/gcc/config/darwin.h gcc-12.4.0/gcc/config/darwin.h
*** gcc-12.3.0/gcc/config/darwin.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/darwin.h	Thu Jun 20 08:08:06 2024
*************** extern GTY(()) int darwin_ms_struct;
*** 133,142 ****
     cases where these driver opts are used multiple times, or to control
     operations on more than one command (e.g. dynamiclib).  These are handled
     specially and we then add %= 10.7 mmacosx-version-min= -no_pie) }"
  
  #define DARWIN_CC1_SPEC							\
!   "%= 10.7 mmacosx-version-min= -no_pie) }"
  
  #define DARWIN_CC1_SPEC							\
!   "%< 10.6 10.7 mmacosx-version-min= -ld10-uwfef) \
        %(link_gcc_c_sequence) \
!       %{!nodefaultexport:%{dylib|dynamiclib|bundle: \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= -U) \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= ___emutls_get_address) \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= -exported_symbol) \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= ___emutls_get_address) \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= -U) \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= ___emutls_register_common) \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= -exported_symbol) \
! 	%:version-compare(>= 10.11 asm_macosx_version_min= ___emutls_register_common) \
        }} \
      }}}\
      %{!r:%{!nostdlib:%{!nostartfiles:%E}}} %{T*} %{F*} "\
--- 383,397 ----
        %(link_ssp) \
        %:version-compare(>< 10.6 10.7 mmacosx-version-min= -ld10-uwfef) \
        %(link_gcc_c_sequence) \
!       %{!nodefaultexport: \
! 	%{%:version-compare(>= 10.11 asm_macosx_version_min= -U): \
! 	   ___emutls_get_address -exported_symbol ___emutls_get_address \
! 	  -U ___emutls_register_common \
! 	  -exported_symbol ___emutls_register_common \
! 	  -U ___gcc_nested_func_ptr_created \
! 	  -exported_symbol ___gcc_nested_func_ptr_created \
! 	  -U ___gcc_nested_func_ptr_deleted \
! 	  -exported_symbol ___gcc_nested_func_ptr_deleted \
        }} \
      }}}\
      %{!r:%{!nostdlib:%{!nostartfiles:%E}}} %{T*} %{F*} "\
*************** extern GTY(()) int darwin_ms_struct;
*** 449,456 ****
     %{force_cpusubtype_ALL:-arch %(darwin_arch)} \
     %{!force_cpusubtype_ALL:-arch %(darwin_subarch)} "\
     LINK_SYSROOT_SPEC \
!   "%{mmacosx-version-min=*:-macosx_version_min %*} \
!    %{!multiply_defined*:%{shared-libgcc: \
       %:version-compare(< 10.5 mmacosx-version-min= -multiply_defined) \
       %:version-compare(< 10.5 mmacosx-version-min= suppress) }} \
     %{sectalign*} %{sectcreate*} %{sectobjectsymbols*}  %{sectorder*} \
--- 461,467 ----
     %{force_cpusubtype_ALL:-arch %(darwin_arch)} \
     %{!force_cpusubtype_ALL:-arch %(darwin_subarch)} "\
     LINK_SYSROOT_SPEC \
!    "%{!multiply_defined*:%{shared-libgcc: \
       %:version-compare(< 10.5 mmacosx-version-min= -multiply_defined) \
       %:version-compare(< 10.5 mmacosx-version-min= suppress) }} \
     %{sectalign*} %{sectcreate*} %{sectobjectsymbols*}  %{sectorder*} \
*************** extern GTY(()) int darwin_ms_struct;
*** 506,528 ****
  #undef REAL_LIBGCC_SPEC
  #define REAL_LIBGCC_SPEC \
  "%{static-libgcc|static:						  \
!     %:version-compare(!> 10.6 mmacosx-version-min= -lgcc_eh)		  \
!     %:version-compare(>= 10.6 mmacosx-version-min= -lemutls_w);		  \
     shared-libgcc|fexceptions|fobjc-exceptions|fgnu-runtime:		  \
      %:version-compare(!> 10.11 mmacosx-version-min= -lgcc_s.1.1)	  \
-     %:version-compare(>= 10.11 mmacosx-version-min= -lemutls_w)		  \
      %:version-compare(!> 10.3.9 mmacosx-version-min= -lgcc_eh)		  \
      %:version-compare(>< 10.3.9 10.5 mmacosx-version-min= -lgcc_s.10.4)   \
!     %:version-compare(>< 10.5 10.6 mmacosx-version-min= -lgcc_s.10.5);	  \
!    : -lemutls_w								  \
    } -lgcc "
  
  /* We specify crt0.o as -lcrt0.o so that ld will search the library path.  */
  
  #undef  STARTFILE_SPEC
  #define STARTFILE_SPEC							    \
! "%{dynamiclib: %(darwin_dylib1) %{fgnu-tm: -lcrttms.o}}			   \
!  %{!dynamiclib:%{bundle:%(darwin_bundle1)}				    \
       %{!bundle:%{pg:%{static:-lgcrt0.o}					    \
                       %{!static:%{object:-lgcrt0.o}			    \
                                 %{!object:%{preload:-lgcrt0.o}		    \
--- 517,544 ----
  #undef REAL_LIBGCC_SPEC
  #define REAL_LIBGCC_SPEC \
  "%{static-libgcc|static:						  \
!     %:version-compare(!> 10.6 mmacosx-version-min= -lgcc_eh);		  \
     shared-libgcc|fexceptions|fobjc-exceptions|fgnu-runtime:		  \
      %:version-compare(!> 10.11 mmacosx-version-min= -lgcc_s.1.1)	  \
      %:version-compare(!> 10.3.9 mmacosx-version-min= -lgcc_eh)		  \
      %:version-compare(>< 10.3.9 10.5 mmacosx-version-min= -lgcc_s.10.4)   \
!     %:version-compare(>< 10.5 10.6 mmacosx-version-min= -lgcc_s.10.5)	  \
    } -lgcc "
  
+ #define DARWIN_WEAK_CRTS \
+ "%{static-libgcc|static:						  \
+    %:version-compare(>= 10.6 mmacosx-version-min= -lemutls_w) ; \
+    shared-libgcc|fexceptions|fobjc-exceptions|fgnu-runtime: \
+      %:version-compare(>= 10.11 mmacosx-version-min= -lemutls_w) ; \
+    : -lemutls_w \
+   }"
+ 
  /* We specify crt0.o as -lcrt0.o so that ld will search the library path.  */
  
  #undef  STARTFILE_SPEC
  #define STARTFILE_SPEC							    \
! "%{dynamiclib|shared: %(darwin_dylib1) %{fgnu-tm: -lcrttms.o}}		   \
!  %{!dynamiclib:%{!shared:%{bundle:%(darwin_bundle1)}			    \
       %{!bundle:%{pg:%{static:-lgcrt0.o}					    \
                       %{!static:%{object:-lgcrt0.o}			    \
                                 %{!object:%{preload:-lgcrt0.o}		    \
*************** extern GTY(()) int darwin_ms_struct;
*** 533,540 ****
                        %{!static:%{object:-lcrt0.o}			    \
                                  %{!object:%{preload:-lcrt0.o}		    \
                                    %{!preload: %(darwin_crt1)		    \
! 					      %(darwin_crt2)}}}}}}	    \
!  %(darwin_crt3) %	Add  to the end of the system framework include path.
diff -Nrcpad gcc-12.3.0/gcc/config/i386/amxtileintrin.h gcc-12.4.0/gcc/config/i386/amxtileintrin.h
*** gcc-12.3.0/gcc/config/i386/amxtileintrin.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/amxtileintrin.h	Thu Jun 20 08:08:06 2024
*************** extern __inline void
*** 39,52 ****
  __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  _tile_loadconfig (const void *__config)
  {
!   __asm__ volatile ("ldtilecfg\t%X0" :: "m" (*((const void **)__config)));
  }
  
  extern __inline void
  __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  _tile_storeconfig (void *__config)
  {
!   __asm__ volatile ("sttilecfg\t%X0" : "=m" (*((void **)__config)));
  }
  
  extern __inline void
--- 39,52 ----
  __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  _tile_loadconfig (const void *__config)
  {
!   __builtin_ia32_ldtilecfg (__config);
  }
  
  extern __inline void
  __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  _tile_storeconfig (void *__config)
  {
!   __builtin_ia32_sttilecfg (__config);
  }
  
  extern __inline void
diff -Nrcpad gcc-12.3.0/gcc/config/i386/cygwin.h gcc-12.4.0/gcc/config/i386/cygwin.h
*** gcc-12.3.0/gcc/config/i386/cygwin.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/cygwin.h	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 57,63 ****
  
  #undef ENDFILE_SPEC
  #define ENDFILE_SPEC \
!   "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}\
     %{!shared:%:if-exists(default-manifest.o%s)}\
     %{fvtable-verify=none:%s; \
      fvtable-verify=preinit:vtv_end.o%s; \
--- 57,63 ----
  
  #undef ENDFILE_SPEC
  #define ENDFILE_SPEC \
!   "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \
     %{!shared:%:if-exists(default-manifest.o%s)}\
     %{fvtable-verify=none:%s; \
      fvtable-verify=preinit:vtv_end.o%s; \
diff -Nrcpad gcc-12.3.0/gcc/config/i386/darwin.h gcc-12.4.0/gcc/config/i386/darwin.h
*** gcc-12.3.0/gcc/config/i386/darwin.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/darwin.h	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 110,116 ****
  
  #undef ENDFILE_SPEC
  #define ENDFILE_SPEC \
!   "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \
     %{mpc32:crtprec32.o%s} \
     %{mpc64:crtprec64.o%s} \
     %{mpc80:crtprec80.o%s}" TM_DESTRUCTOR
--- 110,116 ----
  
  #undef ENDFILE_SPEC
  #define ENDFILE_SPEC \
!   "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \
     %{mpc32:crtprec32.o%s} \
     %{mpc64:crtprec64.o%s} \
     %{mpc80:crtprec80.o%s}" TM_DESTRUCTOR
diff -Nrcpad gcc-12.3.0/gcc/config/i386/gnu-user-common.h gcc-12.4.0/gcc/config/i386/gnu-user-common.h
*** gcc-12.3.0/gcc/config/i386/gnu-user-common.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/gnu-user-common.h	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 47,53 ****
  
  /* Similar to standard GNU userspace, but adding -ffast-math support.  */
  #define GNU_USER_TARGET_MATHFILE_SPEC \
!   "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \
     %{mpc32:crtprec32.o%s} \
     %{mpc64:crtprec64.o%s} \
     %{mpc80:crtprec80.o%s}"
--- 47,53 ----
  
  /* Similar to standard GNU userspace, but adding -ffast-math support.  */
  #define GNU_USER_TARGET_MATHFILE_SPEC \
!   "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \
     %{mpc32:crtprec32.o%s} \
     %{mpc64:crtprec64.o%s} \
     %{mpc80:crtprec80.o%s}"
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386-builtin.def gcc-12.4.0/gcc/config/i386/i386-builtin.def
*** gcc-12.3.0/gcc/config/i386/i386-builtin.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386-builtin.def	Thu Jun 20 08:08:06 2024
*************** BDESC (OPTION_MASK_ISA_XSAVES | OPTION_M
*** 126,131 ****
--- 126,135 ----
  BDESC (OPTION_MASK_ISA_XSAVES | OPTION_MASK_ISA_64BIT, 0, CODE_FOR_nothing, "__builtin_ia32_xrstors64", IX86_BUILTIN_XRSTORS64, UNKNOWN, (int) VOID_FTYPE_PVOID_INT64)
  BDESC (OPTION_MASK_ISA_XSAVEC | OPTION_MASK_ISA_64BIT, 0, CODE_FOR_nothing, "__builtin_ia32_xsavec64", IX86_BUILTIN_XSAVEC64, UNKNOWN, (int) VOID_FTYPE_PVOID_INT64)
  
+ /* LDFILECFG and STFILECFG.  */
+ BDESC (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_AMX_TILE, CODE_FOR_nothing, "__builtin_ia32_ldtilecfg", IX86_BUILTIN_LDTILECFG, UNKNOWN, (int) VOID_FTYPE_PCVOID)
+ BDESC (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_AMX_TILE, CODE_FOR_nothing, "__builtin_ia32_sttilecfg", IX86_BUILTIN_STTILECFG, UNKNOWN, (int) VOID_FTYPE_PVOID)
+ 
  /* SSE */
  BDESC (OPTION_MASK_ISA_SSE, 0, CODE_FOR_movv4sf_internal, "__builtin_ia32_storeups", IX86_BUILTIN_STOREUPS, UNKNOWN, (int) VOID_FTYPE_PFLOAT_V4SF)
  BDESC (OPTION_MASK_ISA_SSE, 0, CODE_FOR_sse_movntv4sf, "__builtin_ia32_movntps", IX86_BUILTIN_MOVNTPS, UNKNOWN, (int) VOID_FTYPE_PFLOAT_V4SF)
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386-builtins.cc gcc-12.4.0/gcc/config/i386/i386-builtins.cc
*** gcc-12.3.0/gcc/config/i386/i386-builtins.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386-builtins.cc	Thu Jun 20 08:08:06 2024
*************** ix86_vectorize_builtin_gather (const_tre
*** 1790,1796 ****
  	  ? !TARGET_USE_GATHER_2PARTS
  	  : (known_eq (TYPE_VECTOR_SUBPARTS (mem_vectype), 4u)
  	     ? !TARGET_USE_GATHER_4PARTS
! 	     : !TARGET_USE_GATHER)))
      return NULL_TREE;
  
    if ((TREE_CODE (index_type) != INTEGER_TYPE
--- 1790,1796 ----
  	  ? !TARGET_USE_GATHER_2PARTS
  	  : (known_eq (TYPE_VECTOR_SUBPARTS (mem_vectype), 4u)
  	     ? !TARGET_USE_GATHER_4PARTS
! 	     : !TARGET_USE_GATHER_8PARTS)))
      return NULL_TREE;
  
    if ((TREE_CODE (index_type) != INTEGER_TYPE
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386-expand.cc gcc-12.4.0/gcc/config/i386/i386-expand.cc
*** gcc-12.3.0/gcc/config/i386/i386-expand.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386-expand.cc	Thu Jun 20 08:08:06 2024
*************** ix86_expand_move (machine_mode mode, rtx
*** 350,355 ****
--- 350,372 ----
  
      default:
        break;
+ 
+     case SUBREG:
+       /* As not all values in XFmode are representable in real_value,
+ 	 we might be called with unfoldable SUBREGs of constants.  */
+       if (mode == XFmode
+ 	  && CONSTANT_P (SUBREG_REG (op1))
+ 	  && can_create_pseudo_p ())
+ 	{
+ 	  machine_mode imode = GET_MODE (SUBREG_REG (op1));
+ 	  rtx r = force_const_mem (imode, SUBREG_REG (op1));
+ 	  if (r)
+ 	    r = validize_mem (r);
+ 	  else
+ 	    r = force_reg (imode, SUBREG_REG (op1));
+ 	  op1 = simplify_gen_subreg (mode, r, imode, SUBREG_BYTE (op1));
+ 	}
+       break;
      }
  
    if ((flag_pic || MACHOPIC_INDIRECT)
*************** ix86_expand_builtin (tree exp, rtx targe
*** 13275,13280 ****
--- 13292,13316 ----
  	emit_insn (pat);
        return 0;
  
+     case IX86_BUILTIN_LDTILECFG:
+     case IX86_BUILTIN_STTILECFG:
+       arg0 = CALL_EXPR_ARG (exp, 0);
+       op0 = expand_normal (arg0);
+ 
+       if (!address_operand (op0, VOIDmode))
+ 	{
+ 	  op0 = convert_memory_address (Pmode, op0);
+ 	  op0 = copy_addr_to_reg (op0);
+ 	}
+       op0 = gen_rtx_MEM (XImode, op0);
+       if (fcode == IX86_BUILTIN_LDTILECFG)
+ 	icode = CODE_FOR_ldtilecfg;
+       else
+ 	icode = CODE_FOR_sttilecfg;
+       pat = GEN_FCN (icode) (op0);
+       emit_insn (pat);
+       return 0;
+ 
      case IX86_BUILTIN_LLWPCB:
        arg0 = CALL_EXPR_ARG (exp, 0);
        op0 = expand_normal (arg0);
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386-features.cc gcc-12.4.0/gcc/config/i386/i386-features.cc
*** gcc-12.3.0/gcc/config/i386/i386-features.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386-features.cc	Thu Jun 20 08:08:06 2024
*************** general_scalar_chain::convert_op (rtx *o
*** 871,890 ****
      }
    else if (MEM_P (*op))
      {
        rtx tmp = gen_reg_rtx (GET_MODE (*op));
  
!       /* Handle movabs.  */
        if (!memory_operand (*op, GET_MODE (*op)))
  	{
  	  rtx tmp2 = gen_reg_rtx (GET_MODE (*op));
  
- 	  emit_insn_before (gen_rtx_SET (tmp2, *op), insn);
  	  *op = tmp2;
  	}
  
!       emit_insn_before (gen_rtx_SET (gen_rtx_SUBREG (vmode, tmp, 0),
! 				     gen_gpr_to_xmm_move_src (vmode, *op)),
! 			insn);
        *op = gen_rtx_SUBREG (vmode, tmp, 0);
  
        if (dump_file)
--- 871,906 ----
      }
    else if (MEM_P (*op))
      {
+       rtx_insn* eh_insn, *movabs = NULL;
        rtx tmp = gen_reg_rtx (GET_MODE (*op));
  
!       /* Emit MOVABS to load from a 64-bit absolute address to a GPR.  */
        if (!memory_operand (*op, GET_MODE (*op)))
  	{
  	  rtx tmp2 = gen_reg_rtx (GET_MODE (*op));
+ 	  movabs = emit_insn_before (gen_rtx_SET (tmp2, *op), insn);
  
  	  *op = tmp2;
  	}
  
!       eh_insn
! 	= emit_insn_before (gen_rtx_SET (gen_rtx_SUBREG (vmode, tmp, 0),
! 					 gen_gpr_to_xmm_move_src (vmode, *op)),
! 			    insn);
! 
!       if (cfun->can_throw_non_call_exceptions)
! 	{
! 	  /* Handle REG_EH_REGION note.  */
! 	  rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
! 	  if (note)
! 	    {
! 	      if (movabs)
! 		eh_insn = movabs;
! 	      control_flow_insns.safe_push (eh_insn);
! 	      add_reg_note (eh_insn, REG_EH_REGION, XEXP (note, 0));
! 	    }
! 	}
! 
        *op = gen_rtx_SUBREG (vmode, tmp, 0);
  
        if (dump_file)
*************** convert_scalars_to_vector (bool timode_p
*** 1681,1686 ****
--- 1697,1703 ----
  {
    basic_block bb;
    int converted_insns = 0;
+   auto_vec control_flow_insns;
  
    bitmap_obstack_initialize (NULL);
    const machine_mode cand_mode[3] = { SImode, DImode, TImode };
*************** convert_scalars_to_vector (bool timode_p
*** 1759,1764 ****
--- 1776,1786 ----
  	    fprintf (dump_file, "Chain #%d conversion is not profitable\n",
  		     chain->chain_id);
  
+ 	rtx_insn* iter_insn;
+ 	unsigned int ii;
+ 	FOR_EACH_VEC_ELT (chain->control_flow_insns, ii, iter_insn)
+ 	  control_flow_insns.safe_push (iter_insn);
+ 
  	delete chain;
        }
  
*************** convert_scalars_to_vector (bool timode_p
*** 1826,1831 ****
--- 1848,1871 ----
  		  DECL_INCOMING_RTL (parm) = gen_rtx_SUBREG (TImode, r, 0);
  	      }
  	  }
+ 
+       if (!control_flow_insns.is_empty ())
+ 	{
+ 	  free_dominance_info (CDI_DOMINATORS);
+ 
+ 	  unsigned int i;
+ 	  rtx_insn* insn;
+ 	  FOR_EACH_VEC_ELT (control_flow_insns, i, insn)
+ 	    if (control_flow_insn_p (insn))
+ 	      {
+ 		/* Split the block after insn.  There will be a fallthru
+ 		   edge, which is OK so we keep it.  We have to create
+ 		   the exception edges ourselves.  */
+ 		bb = BLOCK_FOR_INSN (insn);
+ 		split_block (bb, insn);
+ 		rtl_make_eh_edge (NULL, bb, BB_END (bb));
+ 	      }
+ 	}
      }
  
    return 0;
*************** public:
*** 1875,1882 ****
    /* opt_pass methods: */
    virtual bool gate (function *)
      {
!       return TARGET_AVX && TARGET_VZEROUPPER
! 	&& flag_expensive_optimizations && !optimize_size;
      }
  
    virtual unsigned int execute (function *)
--- 1915,1921 ----
    /* opt_pass methods: */
    virtual bool gate (function *)
      {
!       return TARGET_AVX && TARGET_VZEROUPPER;
      }
  
    virtual unsigned int execute (function *)
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386-features.h gcc-12.4.0/gcc/config/i386/i386-features.h
*** gcc-12.3.0/gcc/config/i386/i386-features.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386-features.h	Thu Jun 20 08:08:06 2024
*************** class scalar_chain
*** 147,152 ****
--- 147,153 ----
    bitmap defs;
    /* Registers used in both vector and sclar modes.  */
    bitmap defs_conv;
+   auto_vec control_flow_insns;
  
    void build (bitmap candidates, unsigned insn_uid);
    virtual int compute_convert_gain () = 0;
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386-options.cc gcc-12.4.0/gcc/config/i386/i386-options.cc
*** gcc-12.3.0/gcc/config/i386/i386-options.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386-options.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 137,142 ****
--- 137,147 ----
  #define m_GOLDMONT_PLUS (HOST_WIDE_INT_1U<x_ix86_tune_string
  	  = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_TUNE]);
!       else if (orig_tune_defaulted)
  	opts->x_ix86_tune_string = NULL;
  
        /* If fpmath= is not set, and we now have sse2 on 32-bit, use it.  */
--- 1383,1393 ----
        if (option_strings[IX86_FUNCTION_SPECIFIC_TUNE])
  	opts->x_ix86_tune_string
  	  = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_TUNE]);
!       /* If we have explicit arch string and no tune string specified, set
! 	 tune_string to NULL and later it will be overriden by arch_string
! 	 so target clones can get proper optimization.  */
!       else if (option_strings[IX86_FUNCTION_SPECIFIC_ARCH]
! 	       || orig_tune_defaulted)
  	opts->x_ix86_tune_string = NULL;
  
        /* If fpmath= is not set, and we now have sse2 on 32-bit, use it.  */
*************** parse_mtune_ctrl_str (struct gcc_options
*** 1696,1715 ****
            curr_feature_string++;
            clear = true;
          }
!       for (i = 0; i < X86_TUNE_LAST; i++)
!         {
!           if (!strcmp (curr_feature_string, ix86_tune_feature_names[i]))
!             {
!               ix86_tune_features[i] = !clear;
!               if (dump)
!                 fprintf (stderr, "Explicitly %s feature %s\n",
!                          clear ? "clear" : "set", ix86_tune_feature_names[i]);
!               break;
!             }
!         }
!       if (i == X86_TUNE_LAST)
! 	error ("unknown parameter to option %<-mtune-ctrl%>: %s",
! 	       clear ? curr_feature_string - 1 : curr_feature_string);
        curr_feature_string = next_feature_string;
      }
    while (curr_feature_string);
--- 1705,1750 ----
            curr_feature_string++;
            clear = true;
          }
! 
!       if (!strcmp (curr_feature_string, "use_gather"))
! 	{
! 	  ix86_tune_features[X86_TUNE_USE_GATHER_2PARTS] = !clear;
! 	  ix86_tune_features[X86_TUNE_USE_GATHER_4PARTS] = !clear;
! 	  ix86_tune_features[X86_TUNE_USE_GATHER_8PARTS] = !clear;
! 	  if (dump)
! 	    fprintf (stderr, "Explicitly %s features use_gather_2parts,"
! 		     " use_gather_4parts, use_gather_8parts\n",
! 		     clear ? "clear" : "set");
! 
! 	}
!       else if (!strcmp (curr_feature_string, "use_scatter"))
! 	{
! 	  ix86_tune_features[X86_TUNE_USE_SCATTER_2PARTS] = !clear;
! 	  ix86_tune_features[X86_TUNE_USE_SCATTER_4PARTS] = !clear;
! 	  ix86_tune_features[X86_TUNE_USE_SCATTER_8PARTS] = !clear;
! 	  if (dump)
! 	    fprintf (stderr, "Explicitly %s features use_scatter_2parts,"
! 		     " use_scatter_4parts, use_scatter_8parts\n",
! 		     clear ? "clear" : "set");
! 	}
!       else
! 	{
! 	  for (i = 0; i < X86_TUNE_LAST; i++)
! 	    {
! 	      if (!strcmp (curr_feature_string, ix86_tune_feature_names[i]))
! 		{
! 		  ix86_tune_features[i] = !clear;
! 		  if (dump)
! 		    fprintf (stderr, "Explicitly %s feature %s\n",
! 			     clear ? "clear" : "set", ix86_tune_feature_names[i]);
! 		  break;
! 		}
! 	    }
! 
! 	  if (i == X86_TUNE_LAST)
! 	    error ("unknown parameter to option %<-mtune-ctrl%>: %s",
! 		   clear ? curr_feature_string - 1 : curr_feature_string);
! 	}
        curr_feature_string = next_feature_string;
      }
    while (curr_feature_string);
*************** ix86_option_override_internal (bool main
*** 2676,2682 ****
      sorry ("%<-mcall-ms2sysv-xlogues%> isn%'t currently supported with SEH");
  
    if (!(opts_set->x_target_flags & MASK_VZEROUPPER)
!       && TARGET_EMIT_VZEROUPPER)
      opts->x_target_flags |= MASK_VZEROUPPER;
    if (!(opts_set->x_target_flags & MASK_STV))
      opts->x_target_flags |= MASK_STV;
--- 2711,2719 ----
      sorry ("%<-mcall-ms2sysv-xlogues%> isn%'t currently supported with SEH");
  
    if (!(opts_set->x_target_flags & MASK_VZEROUPPER)
!       && TARGET_EMIT_VZEROUPPER
!       && flag_expensive_optimizations
!       && !optimize_size)
      opts->x_target_flags |= MASK_VZEROUPPER;
    if (!(opts_set->x_target_flags & MASK_STV))
      opts->x_target_flags |= MASK_STV;
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386.cc gcc-12.4.0/gcc/config/i386/i386.cc
*** gcc-12.3.0/gcc/config/i386/i386.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386.cc	Thu Jun 20 08:08:06 2024
*************** ix86_elim_entry_set_got (rtx reg)
*** 8268,8277 ****
        rtx pat = PATTERN (c_insn);
        if (GET_CODE (pat) == PARALLEL)
  	{
! 	  rtx vec = XVECEXP (pat, 0, 0);
! 	  if (GET_CODE (vec) == SET
! 	      && XINT (XEXP (vec, 1), 1) == UNSPEC_SET_GOT
! 	      && REGNO (XEXP (vec, 0)) == REGNO (reg))
  	    delete_insn (c_insn);
  	}
      }
--- 8268,8278 ----
        rtx pat = PATTERN (c_insn);
        if (GET_CODE (pat) == PARALLEL)
  	{
! 	  rtx set = XVECEXP (pat, 0, 0);
! 	  if (GET_CODE (set) == SET
! 	      && GET_CODE (SET_SRC (set)) == UNSPEC
! 	      && XINT (SET_SRC (set), 1) == UNSPEC_SET_GOT
! 	      && REGNO (SET_DEST (set)) == REGNO (reg))
  	    delete_insn (c_insn);
  	}
      }
*************** output_pic_addr_const (FILE *file, rtx x
*** 12238,12245 ****
        assemble_name (asm_out_file, buf);
        break;
  
!     case CONST_INT:
!       fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
        break;
  
      case CONST:
--- 12239,12246 ----
        assemble_name (asm_out_file, buf);
        break;
  
!     CASE_CONST_SCALAR_INT:
!       output_addr_const (file, x);
        break;
  
      case CONST:
*************** ix86_avx_u128_mode_needed (rtx_insn *ins
*** 14416,14423 ****
  	 modes wider than 256 bits.  It's only safe to issue a
  	 vzeroupper if all SSE registers are clobbered.  */
        const function_abi &abi = insn_callee_abi (insn);
!       if (!hard_reg_set_subset_p (reg_class_contents[SSE_REGS],
! 				  abi.mode_clobbers (V4DImode)))
  	return AVX_U128_ANY;
  
        return AVX_U128_CLEAN;
--- 14417,14428 ----
  	 modes wider than 256 bits.  It's only safe to issue a
  	 vzeroupper if all SSE registers are clobbered.  */
        const function_abi &abi = insn_callee_abi (insn);
!       /* Should be safe to issue an vzeroupper before sibling_call_p.
! 	 Also there not mode_exit for sibling_call, so there could be
! 	 missing vzeroupper for that.  */
!       if (!(SIBLING_CALL_P (insn)
! 	    || hard_reg_set_subset_p (reg_class_contents[SSE_REGS],
! 				      abi.mode_clobbers (V4DImode))))
  	return AVX_U128_ANY;
  
        return AVX_U128_CLEAN;
*************** ix86_avx_u128_mode_after (int mode, rtx_
*** 14555,14561 ****
        bool avx_upper_reg_found = false;
        note_stores (insn, ix86_check_avx_upper_stores, &avx_upper_reg_found);
  
!       return avx_upper_reg_found ? AVX_U128_DIRTY : AVX_U128_CLEAN;
      }
  
    /* Otherwise, return current mode.  Remember that if insn
--- 14560,14578 ----
        bool avx_upper_reg_found = false;
        note_stores (insn, ix86_check_avx_upper_stores, &avx_upper_reg_found);
  
!       if (avx_upper_reg_found)
! 	return AVX_U128_DIRTY;
! 
!       /* If the function desn't clobber any sse registers or only clobber
! 	 128-bit part, Then vzeroupper isn't issued before the function exit.
! 	 the status not CLEAN but ANY after the function.  */
!       const function_abi &abi = insn_callee_abi (insn);
!       if (!(SIBLING_CALL_P (insn)
! 	    || hard_reg_set_subset_p (reg_class_contents[SSE_REGS],
! 				      abi.mode_clobbers (V4DImode))))
! 	return AVX_U128_ANY;
! 
!       return  AVX_U128_CLEAN;
      }
  
    /* Otherwise, return current mode.  Remember that if insn
*************** ix86_gimple_fold_builtin (gimple_stmt_it
*** 18396,18403 ****
  	      tree itype = GET_MODE_INNER (TYPE_MODE (type)) == E_SFmode
  		? intSI_type_node : intDI_type_node;
  	      type = get_same_sized_vectype (itype, type);
- 	      arg2 = gimple_build (&stmts, VIEW_CONVERT_EXPR, type, arg2);
  	    }
  	  tree zero_vec = build_zero_cst (type);
  	  tree cmp_type = truth_type_for (type);
  	  tree cmp = gimple_build (&stmts, LT_EXPR, cmp_type, arg2, zero_vec);
--- 18413,18422 ----
  	      tree itype = GET_MODE_INNER (TYPE_MODE (type)) == E_SFmode
  		? intSI_type_node : intDI_type_node;
  	      type = get_same_sized_vectype (itype, type);
  	    }
+ 	  else
+ 	    type = signed_type_for (type);
+ 	  arg2 = gimple_build (&stmts, VIEW_CONVERT_EXPR, type, arg2);
  	  tree zero_vec = build_zero_cst (type);
  	  tree cmp_type = truth_type_for (type);
  	  tree cmp = gimple_build (&stmts, LT_EXPR, cmp_type, arg2, zero_vec);
*************** ix86_vectorize_builtin_scatter (const_tr
*** 18935,18941 ****
        ? !TARGET_USE_SCATTER_2PARTS
        : (known_eq (TYPE_VECTOR_SUBPARTS (vectype), 4u)
  	 ? !TARGET_USE_SCATTER_4PARTS
! 	 : !TARGET_USE_SCATTER))
      return NULL_TREE;
  
    if ((TREE_CODE (index_type) != INTEGER_TYPE
--- 18954,18960 ----
        ? !TARGET_USE_SCATTER_2PARTS
        : (known_eq (TYPE_VECTOR_SUBPARTS (vectype), 4u)
  	 ? !TARGET_USE_SCATTER_4PARTS
! 	 : !TARGET_USE_SCATTER_8PARTS))
      return NULL_TREE;
  
    if ((TREE_CODE (index_type) != INTEGER_TYPE
*************** x86_function_profiler (FILE *file, int l
*** 21513,21519 ****
    if (TARGET_64BIT)
      {
  #ifndef NO_PROFILE_COUNTERS
!       fprintf (file, "\tleaq\t%sP%d(%%rip),%%r11\n", LPREFIX, labelno);
  #endif
  
        if (!TARGET_PECOFF)
--- 21532,21541 ----
    if (TARGET_64BIT)
      {
  #ifndef NO_PROFILE_COUNTERS
!       if (ASSEMBLER_DIALECT == ASM_INTEL)
! 	fprintf (file, "\tlea\tr11, %sP%d[rip]\n", LPREFIX, labelno);
!       else
! 	fprintf (file, "\tleaq\t%sP%d(%%rip), %%r11\n", LPREFIX, labelno);
  #endif
  
        if (!TARGET_PECOFF)
*************** x86_function_profiler (FILE *file, int l
*** 21524,21535 ****
  	      /* NB: R10 is caller-saved.  Although it can be used as a
  		 static chain register, it is preserved when calling
  		 mcount for nested functions.  */
! 	      fprintf (file, "1:\tmovabsq\t$%s, %%r10\n\tcall\t*%%r10\n",
! 		       mcount_name);
  	      break;
  	    case CM_LARGE_PIC:
  #ifdef NO_PROFILE_COUNTERS
! 	      fprintf (file, "1:\tmovabsq\t$_GLOBAL_OFFSET_TABLE_-1b, %%r11\n");
  	      fprintf (file, "\tleaq\t1b(%%rip), %%r10\n");
  	      fprintf (file, "\taddq\t%%r11, %%r10\n");
  	      fprintf (file, "\tmovabsq\t$%s@PLTOFF, %%r11\n", mcount_name);
--- 21546,21574 ----
  	      /* NB: R10 is caller-saved.  Although it can be used as a
  		 static chain register, it is preserved when calling
  		 mcount for nested functions.  */
! 	      if (ASSEMBLER_DIALECT == ASM_INTEL)
! 		fprintf (file, "1:\tmovabs\tr10, OFFSET FLAT:%s\n"
! 			       "\tcall\tr10\n", mcount_name);
! 	      else
! 		fprintf (file, "1:\tmovabsq\t$%s, %%r10\n\tcall\t*%%r10\n",
! 			 mcount_name);
  	      break;
  	    case CM_LARGE_PIC:
  #ifdef NO_PROFILE_COUNTERS
! 	      if (ASSEMBLER_DIALECT == ASM_INTEL)
! 		{
! 		  fprintf (file, "1:movabs\tr11, "
! 				 "OFFSET FLAT:_GLOBAL_OFFSET_TABLE_-1b\n");
! 		  fprintf (file, "\tlea\tr10, 1b[rip]\n");
! 		  fprintf (file, "\tadd\tr10, r11\n");
! 		  fprintf (file, "\tmovabs\tr11, OFFSET FLAT:%s@PLTOFF\n",
! 			   mcount_name);
! 		  fprintf (file, "\tadd\tr10, r11\n");
! 		  fprintf (file, "\tcall\tr10\n");
! 		  break;
! 		}
! 	      fprintf (file,
! 		       "1:\tmovabsq\t$_GLOBAL_OFFSET_TABLE_-1b, %%r11\n");
  	      fprintf (file, "\tleaq\t1b(%%rip), %%r10\n");
  	      fprintf (file, "\taddq\t%%r11, %%r10\n");
  	      fprintf (file, "\tmovabsq\t$%s@PLTOFF, %%r11\n", mcount_name);
*************** x86_function_profiler (FILE *file, int l
*** 21541,21547 ****
  	      break;
  	    case CM_SMALL_PIC:
  	    case CM_MEDIUM_PIC:
! 	      fprintf (file, "1:\tcall\t*%s@GOTPCREL(%%rip)\n", mcount_name);
  	      break;
  	    default:
  	      x86_print_call_or_nop (file, mcount_name);
--- 21580,21590 ----
  	      break;
  	    case CM_SMALL_PIC:
  	    case CM_MEDIUM_PIC:
! 	      if (ASSEMBLER_DIALECT == ASM_INTEL)
! 		fprintf (file, "1:\tcall\t[QWORD PTR %s@GOTPCREL[rip]]\n",
! 			 mcount_name);
! 	      else
! 		fprintf (file, "1:\tcall\t*%s@GOTPCREL(%%rip)\n", mcount_name);
  	      break;
  	    default:
  	      x86_print_call_or_nop (file, mcount_name);
*************** x86_function_profiler (FILE *file, int l
*** 21554,21576 ****
    else if (flag_pic)
      {
  #ifndef NO_PROFILE_COUNTERS
!       fprintf (file, "\tleal\t%sP%d@GOTOFF(%%ebx),%%" PROFILE_COUNT_REGISTER "\n",
! 	       LPREFIX, labelno);
  #endif
!       fprintf (file, "1:\tcall\t*%s@GOT(%%ebx)\n", mcount_name);
      }
    else
      {
  #ifndef NO_PROFILE_COUNTERS
!       fprintf (file, "\tmovl\t$%sP%d,%%" PROFILE_COUNT_REGISTER "\n",
! 	       LPREFIX, labelno);
  #endif
        x86_print_call_or_nop (file, mcount_name);
      }
  
    if (flag_record_mcount
! 	|| lookup_attribute ("fentry_section",
!                                 DECL_ATTRIBUTES (current_function_decl)))
      {
        const char *sname = "__mcount_loc";
  
--- 21597,21633 ----
    else if (flag_pic)
      {
  #ifndef NO_PROFILE_COUNTERS
!       if (ASSEMBLER_DIALECT == ASM_INTEL)
! 	fprintf (file,
! 		 "\tlea\t" PROFILE_COUNT_REGISTER ", %sP%d@GOTOFF[ebx]\n",
! 		 LPREFIX, labelno);
!       else
! 	fprintf (file,
! 		 "\tleal\t%sP%d@GOTOFF(%%ebx), %%" PROFILE_COUNT_REGISTER "\n",
! 		 LPREFIX, labelno);
  #endif
!       if (ASSEMBLER_DIALECT == ASM_INTEL)
! 	fprintf (file, "1:\tcall\t[DWORD PTR %s@GOT[ebx]]\n", mcount_name);
!       else
! 	fprintf (file, "1:\tcall\t*%s@GOT(%%ebx)\n", mcount_name);
      }
    else
      {
  #ifndef NO_PROFILE_COUNTERS
!       if (ASSEMBLER_DIALECT == ASM_INTEL)
! 	fprintf (file,
! 		 "\tmov\t" PROFILE_COUNT_REGISTER ", OFFSET FLAT:%sP%d\n",
! 		 LPREFIX, labelno);
!       else
! 	fprintf (file, "\tmovl\t$%sP%d, %%" PROFILE_COUNT_REGISTER "\n",
! 		 LPREFIX, labelno);
  #endif
        x86_print_call_or_nop (file, mcount_name);
      }
  
    if (flag_record_mcount
!       || lookup_attribute ("fentry_section",
! 			   DECL_ATTRIBUTES (current_function_decl)))
      {
        const char *sname = "__mcount_loc";
  
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386.h gcc-12.4.0/gcc/config/i386/i386.h
*** gcc-12.3.0/gcc/config/i386/i386.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386.h	Thu Jun 20 08:08:06 2024
*************** extern unsigned char ix86_tune_features[
*** 398,407 ****
  	ix86_tune_features[X86_TUNE_USE_GATHER_4PARTS]
  #define TARGET_USE_SCATTER_4PARTS \
  	ix86_tune_features[X86_TUNE_USE_SCATTER_4PARTS]
! #define TARGET_USE_GATHER \
! 	ix86_tune_features[X86_TUNE_USE_GATHER]
! #define TARGET_USE_SCATTER \
! 	ix86_tune_features[X86_TUNE_USE_SCATTER]
  #define TARGET_FUSE_CMP_AND_BRANCH_32 \
  	ix86_tune_features[X86_TUNE_FUSE_CMP_AND_BRANCH_32]
  #define TARGET_FUSE_CMP_AND_BRANCH_64 \
--- 398,407 ----
  	ix86_tune_features[X86_TUNE_USE_GATHER_4PARTS]
  #define TARGET_USE_SCATTER_4PARTS \
  	ix86_tune_features[X86_TUNE_USE_SCATTER_4PARTS]
! #define TARGET_USE_GATHER_8PARTS \
! 	ix86_tune_features[X86_TUNE_USE_GATHER_8PARTS]
! #define TARGET_USE_SCATTER_8PARTS \
! 	ix86_tune_features[X86_TUNE_USE_SCATTER_8PARTS]
  #define TARGET_FUSE_CMP_AND_BRANCH_32 \
  	ix86_tune_features[X86_TUNE_FUSE_CMP_AND_BRANCH_32]
  #define TARGET_FUSE_CMP_AND_BRANCH_64 \
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386.md gcc-12.4.0/gcc/config/i386/i386.md
*** gcc-12.3.0/gcc/config/i386/i386.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386.md	Thu Jun 20 08:08:06 2024
***************
*** 329,334 ****
--- 329,338 ----
  
    ;; For HRESET support
    UNSPECV_HRESET
+ 
+   ;; For AMX-TILE
+   UNSPECV_LDTILECFG
+   UNSPECV_STTILECFG
  ])
  
  ;; Constants to represent rounding modes in the ROUND instruction
***************
*** 2398,2404 ****
  	      (clobber (reg:CC FLAGS_REG))])]
  {
    int shift = ctz_hwi (UINTVAL (operands[1]));
!   operands[1] = gen_int_mode (UINTVAL (operands[1]) >> shift, DImode);
    operands[2] = gen_int_mode (shift, QImode);
  })
  
--- 2402,2411 ----
  	      (clobber (reg:CC FLAGS_REG))])]
  {
    int shift = ctz_hwi (UINTVAL (operands[1]));
!   rtx op1 = gen_int_mode (UINTVAL (operands[1]) >> shift, DImode);
!   if (ix86_endbr_immediate_operand (op1, VOIDmode))
!     FAIL;
!   operands[1] = op1;
    operands[2] = gen_int_mode (shift, QImode);
  })
  
***************
*** 3582,3590 ****
  ;; Possible store forwarding (partial memory) stall in alternatives 4, 6 and 7.
  (define_insn "*movdf_internal"
    [(set (match_operand:DF 0 "nonimmediate_operand"
!     "=Yf*f,m   ,Yf*f,?r ,!o,?*r ,!o,!o,?r,?m,?r,?r,v,v,v,m,*x,*x,*x,m ,r ,v,r  ,o ,r  ,m")
  	(match_operand:DF 1 "general_operand"
!     "Yf*fm,Yf*f,G   ,roF,r ,*roF,*r,F ,rm,rC,C ,F ,C,v,m,v,C ,*x,m ,*x,v,r ,roF,rF,rmF,rC"))]
    "!(MEM_P (operands[0]) && MEM_P (operands[1]))
     && (lra_in_progress || reload_completed
         || !CONST_DOUBLE_P (operands[1])
--- 3589,3597 ----
  ;; Possible store forwarding (partial memory) stall in alternatives 4, 6 and 7.
  (define_insn "*movdf_internal"
    [(set (match_operand:DF 0 "nonimmediate_operand"
!     "=Yf*f,m   ,Yf*f,?r ,!o,?*r ,!o,!o,?r,?m,?r,?r,v,v,v,m,*x,*x,*x,m ,?r,?v,r  ,o ,r  ,m")
  	(match_operand:DF 1 "general_operand"
!     "Yf*fm,Yf*f,G   ,roF,r ,*roF,*r,F ,rm,rC,C ,F ,C,v,m,v,C ,*x,m ,*x, v, r,roF,rF,rmF,rC"))]
    "!(MEM_P (operands[0]) && MEM_P (operands[1]))
     && (lra_in_progress || reload_completed
         || !CONST_DOUBLE_P (operands[1])
***************
*** 14160,14166 ****
  			   (const_int 1)
  			   (and:SI
  			     (match_operand:SI 2 "register_operand")
! 			     (match_operand 3 "const_int_operand")))])
  		      (label_ref (match_operand 4))
  		      (pc)))
     (clobber (reg:CC FLAGS_REG))]
--- 14167,14174 ----
  			   (const_int 1)
  			   (and:SI
  			     (match_operand:SI 2 "register_operand")
! 			     (match_operand 3 "const_int_operand")))
! 			 (const_int 0)])
  		      (label_ref (match_operand 4))
  		      (pc)))
     (clobber (reg:CC FLAGS_REG))]
***************
*** 17066,17073 ****
    "! TARGET_POPCNT"
  {
    rtx scratch = gen_reg_rtx (QImode);
  
!   emit_insn (gen_parityhi2_cmp (operands[1]));
  
    ix86_expand_setcc (scratch, ORDERED,
  		     gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx);
--- 17074,17083 ----
    "! TARGET_POPCNT"
  {
    rtx scratch = gen_reg_rtx (QImode);
+   rtx tmp = gen_reg_rtx (HImode);
  
!   emit_move_insn (tmp, operands[1]);
!   emit_insn (gen_parityhi2_cmp (tmp));
  
    ix86_expand_setcc (scratch, ORDERED,
  		     gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx);
***************
*** 23986,23991 ****
--- 23996,24021 ----
    DONE;
  })
  
+ (define_insn "ldtilecfg"
+   [(unspec_volatile [(match_operand:XI 0 "memory_operand" "m")]
+             UNSPECV_LDTILECFG)]
+   "TARGET_AMX_TILE"
+   "ldtilecfg\t%0"
+   [(set_attr "type" "other")
+    (set_attr "prefix" "maybe_evex")
+    (set_attr "memory" "load")
+    (set_attr "mode" "XI")])
+ 
+ (define_insn "sttilecfg"
+   [(set (match_operand:XI 0 "memory_operand" "=m")
+         (unspec_volatile:XI [(const_int 0)] UNSPECV_STTILECFG))]
+   "TARGET_AMX_TILE"
+   "sttilecfg\t%0"
+   [(set_attr "type" "other")
+    (set_attr "prefix" "maybe_evex")
+    (set_attr "memory" "store")
+    (set_attr "mode" "XI")])
+ 
  (include "mmx.md")
  (include "sse.md")
  (include "sync.md")
diff -Nrcpad gcc-12.3.0/gcc/config/i386/i386.opt gcc-12.4.0/gcc/config/i386/i386.opt
*** gcc-12.3.0/gcc/config/i386/i386.opt	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/i386.opt	Thu Jun 20 08:08:06 2024
*************** mpc80
*** 420,425 ****
--- 420,429 ----
  Target RejectNegative
  Set 80387 floating-point precision to 80-bit.
  
+ mdaz-ftz
+ Target
+ Set the FTZ and DAZ Flags.
+ 
  mpreferred-stack-boundary=
  Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg)
  Attempt to keep stack aligned to this power of 2.
*************** Do not use GOT to access external symbol
*** 1214,1216 ****
--- 1218,1228 ----
  -param=x86-stlf-window-ninsns=
  Target Joined UInteger Var(x86_stlf_window_ninsns) Init(64) Param
  Instructions number above which STFL stall penalty can be compensated.
+ 
+ mgather
+ Target Alias(mtune-ctrl=, use_gather, ^use_gather)
+ Enable vectorization for gather instruction.
+ 
+ mscatter
+ Target Alias(mtune-ctrl=, use_scatter, ^use_scatter)
+ Enable vectorization for scatter instruction.
diff -Nrcpad gcc-12.3.0/gcc/config/i386/mingw32.h gcc-12.4.0/gcc/config/i386/mingw32.h
*** gcc-12.3.0/gcc/config/i386/mingw32.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/mingw32.h	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 197,203 ****
  
  #undef ENDFILE_SPEC
  #define ENDFILE_SPEC \
!   "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \
     %{!shared:%:if-exists(default-manifest.o%s)}\
     %{fvtable-verify=none:%s; \
      fvtable-verify=preinit:vtv_end.o%s; \
--- 197,203 ----
  
  #undef ENDFILE_SPEC
  #define ENDFILE_SPEC \
!   "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \
     %{!shared:%:if-exists(default-manifest.o%s)}\
     %{fvtable-verify=none:%s; \
      fvtable-verify=preinit:vtv_end.o%s; \
diff -Nrcpad gcc-12.3.0/gcc/config/i386/mmx.md gcc-12.4.0/gcc/config/i386/mmx.md
*** gcc-12.3.0/gcc/config/i386/mmx.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/mmx.md	Thu Jun 20 08:08:06 2024
***************
*** 1211,1217 ****
  	    (match_operand:V2SF 1 "register_operand") 0)
  	  (match_dup 2)))]
    "TARGET_MMX_WITH_SSE"
!   "operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (V2SFmode)-1);")
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ;;
--- 1211,1220 ----
  	    (match_operand:V2SF 1 "register_operand") 0)
  	  (match_dup 2)))]
    "TARGET_MMX_WITH_SSE"
! {
!   operands[1] = force_reg (V2SFmode, operands[1]);
!   operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (V2SFmode)-1);
! })
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ;;
diff -Nrcpad gcc-12.3.0/gcc/config/i386/sse.md gcc-12.4.0/gcc/config/i386/sse.md
*** gcc-12.3.0/gcc/config/i386/sse.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/sse.md	Thu Jun 20 08:08:06 2024
***************
*** 1411,1422 ****
  })
  
  (define_insn "*_load_mask"
!   [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v")
! 	(vec_merge:VI12_AVX512VL
! 	  (unspec:VI12_AVX512VL
! 	    [(match_operand:VI12_AVX512VL 1 "memory_operand" "m")]
  	    UNSPEC_MASKLOAD)
! 	  (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand" "0C")
  	  (match_operand: 3 "register_operand" "Yk")))]
    "TARGET_AVX512BW"
    "vmovdqu\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"
--- 1411,1422 ----
  })
  
  (define_insn "*_load_mask"
!   [(set (match_operand:VI12HF_AVX512VL 0 "register_operand" "=v")
! 	(vec_merge:VI12HF_AVX512VL
! 	  (unspec:VI12HF_AVX512VL
! 	    [(match_operand:VI12HF_AVX512VL 1 "memory_operand" "m")]
  	    UNSPEC_MASKLOAD)
! 	  (match_operand:VI12HF_AVX512VL 2 "nonimm_or_0_operand" "0C")
  	  (match_operand: 3 "register_operand" "Yk")))]
    "TARGET_AVX512BW"
    "vmovdqu\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"
***************
*** 1425,1433 ****
     (set_attr "mode" "")])
  
  (define_insn_and_split "*_load"
!   [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v")
! 	(unspec:VI12_AVX512VL
! 	  [(match_operand:VI12_AVX512VL 1 "memory_operand" "m")]
  	  UNSPEC_MASKLOAD))]
    "TARGET_AVX512BW"
    "#"
--- 1425,1433 ----
     (set_attr "mode" "")])
  
  (define_insn_and_split "*_load"
!   [(set (match_operand:VI12HF_AVX512VL 0 "register_operand" "=v")
! 	(unspec:VI12HF_AVX512VL
! 	  [(match_operand:VI12HF_AVX512VL 1 "memory_operand" "m")]
  	  UNSPEC_MASKLOAD))]
    "TARGET_AVX512BW"
    "#"
***************
*** 1554,1560 ****
     (set_attr "prefix" "evex")
     (set_attr "mode" "")])
  
! (define_insn "_store_mask"
    [(set (match_operand:V48_AVX512VL 0 "memory_operand" "=m")
  	(vec_merge:V48_AVX512VL
  	  (match_operand:V48_AVX512VL 1 "register_operand" "v")
--- 1554,1560 ----
     (set_attr "prefix" "evex")
     (set_attr "mode" "")])
  
! (define_insn "*_store_mask"
    [(set (match_operand:V48_AVX512VL 0 "memory_operand" "=m")
  	(vec_merge:V48_AVX512VL
  	  (match_operand:V48_AVX512VL 1 "register_operand" "v")
***************
*** 1582,1588 ****
     (set_attr "memory" "store")
     (set_attr "mode" "")])
  
! (define_insn "_store_mask"
    [(set (match_operand:VI12HF_AVX512VL 0 "memory_operand" "=m")
  	(vec_merge:VI12HF_AVX512VL
  	  (match_operand:VI12HF_AVX512VL 1 "register_operand" "v")
--- 1582,1588 ----
     (set_attr "memory" "store")
     (set_attr "mode" "")])
  
! (define_insn "*_store_mask"
    [(set (match_operand:VI12HF_AVX512VL 0 "memory_operand" "=m")
  	(vec_merge:VI12HF_AVX512VL
  	  (match_operand:VI12HF_AVX512VL 1 "register_operand" "v")
***************
*** 4848,4854 ****
  	    (match_operand:VF1_AVX2 1 "register_operand") 0)
  	  (match_dup 2)))]
    "TARGET_SSE2"
!   "operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (mode)-1);")
  
  ;; Also define scalar versions.  These are used for abs, neg, and
  ;; conditional move.  Using subregs into vector modes causes register
--- 4848,4857 ----
  	    (match_operand:VF1_AVX2 1 "register_operand") 0)
  	  (match_dup 2)))]
    "TARGET_SSE2"
! {
!   operands[1] = force_reg (mode, operands[1]);
!   operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (mode)-1);
! })
  
  ;; Also define scalar versions.  These are used for abs, neg, and
  ;; conditional move.  Using subregs into vector modes causes register
***************
*** 6318,6323 ****
--- 6321,6334 ----
  	[(UNSPEC_COMPLEX_FMA_PAIR "fmaddc")
  	 (UNSPEC_COMPLEX_FCMA_PAIR "fcmaddc")])
  
+ (define_int_attr int_comm
+ 	[(UNSPEC_COMPLEX_FMA "")
+ 	 (UNSPEC_COMPLEX_FMA_PAIR "")
+ 	 (UNSPEC_COMPLEX_FCMA "")
+ 	 (UNSPEC_COMPLEX_FCMA_PAIR "")
+ 	 (UNSPEC_COMPLEX_FMUL "%")
+ 	 (UNSPEC_COMPLEX_FCMUL "")])
+ 
  (define_int_attr conj_op
  	[(UNSPEC_COMPLEX_FMA "")
  	 (UNSPEC_COMPLEX_FCMA "_conj")
***************
*** 6431,6437 ****
  (define_insn "fma__"
    [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v")
  	(unspec:VF_AVX512FP16VL
! 	  [(match_operand:VF_AVX512FP16VL 1 "" "%v")
  	   (match_operand:VF_AVX512FP16VL 2 "" "")
  	   (match_operand:VF_AVX512FP16VL 3 "" "0")]
  	   UNSPEC_COMPLEX_F_C_MA))]
--- 6442,6448 ----
  (define_insn "fma__"
    [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v")
  	(unspec:VF_AVX512FP16VL
! 	  [(match_operand:VF_AVX512FP16VL 1 "" "v")
  	   (match_operand:VF_AVX512FP16VL 2 "" "")
  	   (match_operand:VF_AVX512FP16VL 3 "" "0")]
  	   UNSPEC_COMPLEX_F_C_MA))]
***************
*** 6495,6501 ****
  (define_insn "fma___pair"
   [(set (match_operand:VF1_AVX512VL 0 "register_operand" "=&v")
         (unspec:VF1_AVX512VL
! 	 [(match_operand:VF1_AVX512VL 1 "vector_operand" "%v")
  	  (match_operand:VF1_AVX512VL 2 "bcst_vector_operand" "vmBr")
  	  (match_operand:VF1_AVX512VL 3 "vector_operand" "0")]
  	  UNSPEC_COMPLEX_F_C_MA_PAIR))]
--- 6506,6512 ----
  (define_insn "fma___pair"
   [(set (match_operand:VF1_AVX512VL 0 "register_operand" "=&v")
         (unspec:VF1_AVX512VL
! 	 [(match_operand:VF1_AVX512VL 1 "vector_operand" "v")
  	  (match_operand:VF1_AVX512VL 2 "bcst_vector_operand" "vmBr")
  	  (match_operand:VF1_AVX512VL 3 "vector_operand" "0")]
  	  UNSPEC_COMPLEX_F_C_MA_PAIR))]
***************
*** 6562,6568 ****
    [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v")
  	(vec_merge:VF_AVX512FP16VL
  	  (unspec:VF_AVX512FP16VL
! 	    [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "%v")
  	     (match_operand:VF_AVX512FP16VL 2 "nonimmediate_operand" "")
  	     (match_operand:VF_AVX512FP16VL 3 "register_operand" "0")]
  	     UNSPEC_COMPLEX_F_C_MA)
--- 6573,6579 ----
    [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v")
  	(vec_merge:VF_AVX512FP16VL
  	  (unspec:VF_AVX512FP16VL
! 	    [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "v")
  	     (match_operand:VF_AVX512FP16VL 2 "nonimmediate_operand" "")
  	     (match_operand:VF_AVX512FP16VL 3 "register_operand" "0")]
  	     UNSPEC_COMPLEX_F_C_MA)
***************
*** 6586,6592 ****
  (define_insn "__"
    [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v")
  	  (unspec:VF_AVX512FP16VL
! 	    [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "%v")
  	     (match_operand:VF_AVX512FP16VL 2 "nonimmediate_operand" "")]
  	     UNSPEC_COMPLEX_F_C_MUL))]
    "TARGET_AVX512FP16 && "
--- 6597,6603 ----
  (define_insn "__"
    [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v")
  	  (unspec:VF_AVX512FP16VL
! 	    [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "v")
  	     (match_operand:VF_AVX512FP16VL 2 "nonimmediate_operand" "")]
  	     UNSPEC_COMPLEX_F_C_MUL))]
    "TARGET_AVX512FP16 && "
***************
*** 16350,16356 ****
  	     (match_dup 4))]
  	     UNSPEC_BLENDV))]
  {
!   if (INTVAL (operands[5]) == 1)
      std::swap (operands[1], operands[2]);
    operands[3] = gen_lowpart (mode, operands[3]);
  })
--- 16361,16367 ----
  	     (match_dup 4))]
  	     UNSPEC_BLENDV))]
  {
!   if (INTVAL (operands[5]) == 5)
      std::swap (operands[1], operands[2]);
    operands[3] = gen_lowpart (mode, operands[3]);
  })
***************
*** 16380,16386 ****
  	     (match_dup 4))]
  	     UNSPEC_BLENDV))]
  {
!   if (INTVAL (operands[5]) == 1)
      std::swap (operands[1], operands[2]);
  })
  
--- 16391,16397 ----
  	     (match_dup 4))]
  	     UNSPEC_BLENDV))]
  {
!   if (INTVAL (operands[5]) == 5)
      std::swap (operands[1], operands[2]);
  })
  
***************
*** 25973,25989 ****
    "TARGET_AVX")
  
  (define_expand "maskload"
!   [(set (match_operand:V48H_AVX512VL 0 "register_operand")
! 	(vec_merge:V48H_AVX512VL
! 	  (match_operand:V48H_AVX512VL 1 "memory_operand")
  	  (match_dup 0)
  	  (match_operand: 2 "register_operand")))]
    "TARGET_AVX512F")
  
  (define_expand "maskload"
!   [(set (match_operand:VI12_AVX512VL 0 "register_operand")
! 	(vec_merge:VI12_AVX512VL
! 	  (match_operand:VI12_AVX512VL 1 "memory_operand")
  	  (match_dup 0)
  	  (match_operand: 2 "register_operand")))]
    "TARGET_AVX512BW")
--- 25984,26004 ----
    "TARGET_AVX")
  
  (define_expand "maskload"
!   [(set (match_operand:V48_AVX512VL 0 "register_operand")
! 	(vec_merge:V48_AVX512VL
! 	  (unspec:V48_AVX512VL
! 	    [(match_operand:V48_AVX512VL 1 "memory_operand")]
! 	    UNSPEC_MASKLOAD)
  	  (match_dup 0)
  	  (match_operand: 2 "register_operand")))]
    "TARGET_AVX512F")
  
  (define_expand "maskload"
!   [(set (match_operand:VI12HF_AVX512VL 0 "register_operand")
! 	(vec_merge:VI12HF_AVX512VL
! 	  (unspec:VI12HF_AVX512VL
! 	    [(match_operand:VI12HF_AVX512VL 1 "memory_operand")]
! 	    UNSPEC_MASKLOAD)
  	  (match_dup 0)
  	  (match_operand: 2 "register_operand")))]
    "TARGET_AVX512BW")
***************
*** 25998,26018 ****
    "TARGET_AVX")
  
  (define_expand "maskstore"
!   [(set (match_operand:V48H_AVX512VL 0 "memory_operand")
! 	(vec_merge:V48H_AVX512VL
! 	  (match_operand:V48H_AVX512VL 1 "register_operand")
! 	  (match_dup 0)
! 	  (match_operand: 2 "register_operand")))]
    "TARGET_AVX512F")
  
  (define_expand "maskstore"
!   [(set (match_operand:VI12_AVX512VL 0 "memory_operand")
! 	(vec_merge:VI12_AVX512VL
! 	  (match_operand:VI12_AVX512VL 1 "register_operand")
! 	  (match_dup 0)
! 	  (match_operand: 2 "register_operand")))]
    "TARGET_AVX512BW")
  
  (define_expand "cbranch4"
    [(set (reg:CC FLAGS_REG)
  	(compare:CC (match_operand:VI48_AVX 1 "register_operand")
--- 26013,26078 ----
    "TARGET_AVX")
  
  (define_expand "maskstore"
!   [(set (match_operand:V48_AVX512VL 0 "memory_operand")
! 	(unspec:V48_AVX512VL
! 	  [(match_operand:V48_AVX512VL 1 "register_operand")
! 	   (match_dup 0)
! 	   (match_operand: 2 "register_operand")]
! 	  UNSPEC_MASKMOV))]
    "TARGET_AVX512F")
  
  (define_expand "maskstore"
!   [(set (match_operand:VI12HF_AVX512VL 0 "memory_operand")
! 	(unspec:VI12HF_AVX512VL
! 	  [(match_operand:VI12HF_AVX512VL 1 "register_operand")
! 	   (match_dup 0)
! 	   (match_operand: 2 "register_operand")]
! 	  UNSPEC_MASKMOV))]
    "TARGET_AVX512BW")
  
+ (define_insn "_store_mask"
+   [(set (match_operand:V48_AVX512VL 0 "memory_operand" "=m")
+ 	(unspec:V48_AVX512VL
+ 	  [(match_operand:V48_AVX512VL 1 "register_operand" "v")
+ 	   (match_dup 0)
+ 	   (match_operand: 2 "register_operand" "Yk")]
+ 	  UNSPEC_MASKMOV))]
+   "TARGET_AVX512F"
+ {
+   if (FLOAT_MODE_P (GET_MODE_INNER (mode)))
+     {
+       if (misaligned_operand (operands[0], mode))
+ 	return "vmovu\t{%1, %0%{%2%}|%0%{%2%}, %1}";
+       else
+ 	return "vmova\t{%1, %0%{%2%}|%0%{%2%}, %1}";
+     }
+   else
+     {
+       if (misaligned_operand (operands[0], mode))
+ 	return "vmovdqu\t{%1, %0%{%2%}|%0%{%2%}, %1}";
+       else
+ 	return "vmovdqa\t{%1, %0%{%2%}|%0%{%2%}, %1}";
+     }
+ }
+   [(set_attr "type" "ssemov")
+    (set_attr "prefix" "evex")
+    (set_attr "memory" "store")
+    (set_attr "mode" "")])
+ 
+ (define_insn "_store_mask"
+   [(set (match_operand:VI12HF_AVX512VL 0 "memory_operand" "=m")
+ 	(unspec:VI12HF_AVX512VL
+ 	  [(match_operand:VI12HF_AVX512VL 1 "register_operand" "v")
+ 	   (match_dup 0)
+ 	   (match_operand: 2 "register_operand" "Yk")]
+ 	   UNSPEC_MASKMOV))]
+   "TARGET_AVX512BW"
+   "vmovdqu\t{%1, %0%{%2%}|%0%{%2%}, %1}"
+   [(set_attr "type" "ssemov")
+    (set_attr "prefix" "evex")
+    (set_attr "memory" "store")
+    (set_attr "mode" "")])
+ 
  (define_expand "cbranch4"
    [(set (reg:CC FLAGS_REG)
  	(compare:CC (match_operand:VI48_AVX 1 "register_operand")
diff -Nrcpad gcc-12.3.0/gcc/config/i386/x86-tune.def gcc-12.4.0/gcc/config/i386/x86-tune.def
*** gcc-12.3.0/gcc/config/i386/x86-tune.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/i386/x86-tune.def	Thu Jun 20 08:08:06 2024
*************** DEF_TUNE (X86_TUNE_AVOID_4BYTE_PREFIXES,
*** 467,473 ****
  /* X86_TUNE_USE_GATHER_2PARTS: Use gather instructions for vectors with 2
     elements.  */
  DEF_TUNE (X86_TUNE_USE_GATHER_2PARTS, "use_gather_2parts",
! 	  ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ZNVER4 | m_ALDERLAKE | m_GENERIC))
  
  /* X86_TUNE_USE_SCATTER_2PARTS: Use scater instructions for vectors with 2
     elements.  */
--- 467,474 ----
  /* X86_TUNE_USE_GATHER_2PARTS: Use gather instructions for vectors with 2
     elements.  */
  DEF_TUNE (X86_TUNE_USE_GATHER_2PARTS, "use_gather_2parts",
! 	  ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ZNVER4 | m_ALDERLAKE
! 	    | m_GENERIC | m_GDS))
  
  /* X86_TUNE_USE_SCATTER_2PARTS: Use scater instructions for vectors with 2
     elements.  */
*************** DEF_TUNE (X86_TUNE_USE_SCATTER_2PARTS, "
*** 477,483 ****
  /* X86_TUNE_USE_GATHER_4PARTS: Use gather instructions for vectors with 4
     elements.  */
  DEF_TUNE (X86_TUNE_USE_GATHER_4PARTS, "use_gather_4parts",
! 	  ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ZNVER4 |  m_ALDERLAKE | m_GENERIC))
  
  /* X86_TUNE_USE_SCATTER_4PARTS: Use scater instructions for vectors with 4
     elements.  */
--- 478,485 ----
  /* X86_TUNE_USE_GATHER_4PARTS: Use gather instructions for vectors with 4
     elements.  */
  DEF_TUNE (X86_TUNE_USE_GATHER_4PARTS, "use_gather_4parts",
! 	  ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ZNVER4 | m_ALDERLAKE
! 	    | m_GENERIC | m_GDS))
  
  /* X86_TUNE_USE_SCATTER_4PARTS: Use scater instructions for vectors with 4
     elements.  */
*************** DEF_TUNE (X86_TUNE_USE_SCATTER_4PARTS, "
*** 486,497 ****
  
  /* X86_TUNE_USE_GATHER: Use gather instructions for vectors with 8 or more
     elements.  */
! DEF_TUNE (X86_TUNE_USE_GATHER, "use_gather",
! 	  ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER4 | m_ALDERLAKE | m_GENERIC))
  
  /* X86_TUNE_USE_SCATTER: Use scater instructions for vectors with 8 or more
     elements.  */
! DEF_TUNE (X86_TUNE_USE_SCATTER, "use_scatter",
  	  ~(m_ZNVER4))
  
  /* X86_TUNE_AVOID_128FMA_CHAINS: Avoid creating loops with tight 128bit or
--- 488,500 ----
  
  /* X86_TUNE_USE_GATHER: Use gather instructions for vectors with 8 or more
     elements.  */
! DEF_TUNE (X86_TUNE_USE_GATHER_8PARTS, "use_gather_8parts",
! 	  ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER4 | m_ALDERLAKE
! 	    | m_GENERIC | m_GDS))
  
  /* X86_TUNE_USE_SCATTER: Use scater instructions for vectors with 8 or more
     elements.  */
! DEF_TUNE (X86_TUNE_USE_SCATTER_8PARTS, "use_scatter_8parts",
  	  ~(m_ZNVER4))
  
  /* X86_TUNE_AVOID_128FMA_CHAINS: Avoid creating loops with tight 128bit or
*************** DEF_TUNE (X86_TUNE_AVOID_128FMA_CHAINS,
*** 501,507 ****
  /* X86_TUNE_AVOID_256FMA_CHAINS: Avoid creating loops with tight 256bit or
     smaller FMA chain.  */
  DEF_TUNE (X86_TUNE_AVOID_256FMA_CHAINS, "avoid_fma256_chains", m_ZNVER2 | m_ZNVER3
! 	  | m_ALDERLAKE | m_SAPPHIRERAPIDS)
  
  /* X86_TUNE_AVOID_512FMA_CHAINS: Avoid creating loops with tight 512bit or
     smaller FMA chain.  */
--- 504,510 ----
  /* X86_TUNE_AVOID_256FMA_CHAINS: Avoid creating loops with tight 256bit or
     smaller FMA chain.  */
  DEF_TUNE (X86_TUNE_AVOID_256FMA_CHAINS, "avoid_fma256_chains", m_ZNVER2 | m_ZNVER3
! 	  | m_ALDERLAKE | m_SAPPHIRERAPIDS | m_GENERIC | m_ZNVER4)
  
  /* X86_TUNE_AVOID_512FMA_CHAINS: Avoid creating loops with tight 512bit or
     smaller FMA chain.  */
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/genopts/loongarch.opt.in gcc-12.4.0/gcc/config/loongarch/genopts/loongarch.opt.in
*** gcc-12.3.0/gcc/config/loongarch/genopts/loongarch.opt.in	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/genopts/loongarch.opt.in	Thu Jun 20 08:08:06 2024
*************** EnumValue
*** 58,64 ****
  Enum(isa_ext_fpu) String(@@STR_ISA_EXT_FPU64@@) Value(ISA_EXT_FPU64)
  
  m@@OPTSTR_ISA_EXT_FPU@@=
! Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN)
  -m@@OPTSTR_ISA_EXT_FPU@@=FPU	Generate code for the given FPU.
  
  m@@OPTSTR_ISA_EXT_FPU@@=@@STR_ISA_EXT_FPU0@@
--- 58,64 ----
  Enum(isa_ext_fpu) String(@@STR_ISA_EXT_FPU64@@) Value(ISA_EXT_FPU64)
  
  m@@OPTSTR_ISA_EXT_FPU@@=
! Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save
  -m@@OPTSTR_ISA_EXT_FPU@@=FPU	Generate code for the given FPU.
  
  m@@OPTSTR_ISA_EXT_FPU@@=@@STR_ISA_EXT_FPU0@@
*************** EnumValue
*** 92,102 ****
  Enum(cpu_type) String(@@STR_CPU_LA464@@) Value(CPU_LA464)
  
  m@@OPTSTR_ARCH@@=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN)
  -m@@OPTSTR_ARCH@@=PROCESSOR	Generate code for the given PROCESSOR ISA.
  
  m@@OPTSTR_TUNE@@=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN)
  -m@@OPTSTR_TUNE@@=PROCESSOR	Generate optimized code for PROCESSOR.
  
  
--- 92,102 ----
  Enum(cpu_type) String(@@STR_CPU_LA464@@) Value(CPU_LA464)
  
  m@@OPTSTR_ARCH@@=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save
  -m@@OPTSTR_ARCH@@=PROCESSOR	Generate code for the given PROCESSOR ISA.
  
  m@@OPTSTR_TUNE@@=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save
  -m@@OPTSTR_TUNE@@=PROCESSOR	Generate optimized code for PROCESSOR.
  
  
*************** int la_opt_abi_ext = M_OPTION_NOT_SEEN
*** 127,157 ****
  
  
  mbranch-cost=
! Target RejectNegative Joined UInteger Var(loongarch_branch_cost)
  -mbranch-cost=COST	Set the cost of branches to roughly COST instructions.
  
  mcheck-zero-division
! Target Mask(CHECK_ZERO_DIV)
  Trap on integer divide by zero.
  
  mcond-move-int
! Target Var(TARGET_COND_MOVE_INT) Init(1)
  Conditional moves for integral are enabled.
  
  mcond-move-float
! Target Var(TARGET_COND_MOVE_FLOAT) Init(1)
  Conditional moves for float are enabled.
  
  mmemcpy
! Target Mask(MEMCPY)
  Prevent optimizing block moves, which is also the default behavior of -Os.
  
  mstrict-align
! Target Var(TARGET_STRICT_ALIGN) Init(0)
  Do not generate unaligned memory accesses.
  
  mmax-inline-memcpy-size=
! Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024)
  -mmax-inline-memcpy-size=SIZE	Set the max size of memcpy to inline, default is 1024.
  
  ; The code model option names for -mcmodel.
--- 127,157 ----
  
  
  mbranch-cost=
! Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save
  -mbranch-cost=COST	Set the cost of branches to roughly COST instructions.
  
  mcheck-zero-division
! Target Mask(CHECK_ZERO_DIV) Save
  Trap on integer divide by zero.
  
  mcond-move-int
! Target Var(TARGET_COND_MOVE_INT) Init(1) Save
  Conditional moves for integral are enabled.
  
  mcond-move-float
! Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save
  Conditional moves for float are enabled.
  
  mmemcpy
! Target Mask(MEMCPY) Save
  Prevent optimizing block moves, which is also the default behavior of -Os.
  
  mstrict-align
! Target Var(TARGET_STRICT_ALIGN) Init(0) Save
  Do not generate unaligned memory accesses.
  
  mmax-inline-memcpy-size=
! Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save
  -mmax-inline-memcpy-size=SIZE	Set the max size of memcpy to inline, default is 1024.
  
  ; The code model option names for -mcmodel.
*************** EnumValue
*** 175,179 ****
  Enum(cmodel) String(@@STR_CMODEL_EXTREME@@) Value(CMODEL_EXTREME)
  
  mcmodel=
! Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL)
  Specify the code model.
--- 175,188 ----
  Enum(cmodel) String(@@STR_CMODEL_EXTREME@@) Value(CMODEL_EXTREME)
  
  mcmodel=
! Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save
  Specify the code model.
+ 
+ mrelax
+ Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION)
+ Take advantage of linker relaxations to reduce the number of instructions
+ required to materialize symbol addresses.
+ 
+ mpass-mrelax-to-as
+ Target Var(loongarch_pass_mrelax_to_as) Init(HAVE_AS_MRELAX_OPTION)
+ Pass -mrelax or -mno-relax option to the assembler.
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/gnu-user.h gcc-12.4.0/gcc/config/loongarch/gnu-user.h
*** gcc-12.3.0/gcc/config/loongarch/gnu-user.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/gnu-user.h	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 33,48 ****
  #define GLIBC_DYNAMIC_LINKER \
    "/lib" ABI_GRLEN_SPEC "/ld-linux-loongarch-" ABI_SPEC ".so.1"
  
  #undef MUSL_DYNAMIC_LINKER
  #define MUSL_DYNAMIC_LINKER \
!   "/lib" ABI_GRLEN_SPEC "/ld-musl-loongarch-" ABI_SPEC ".so.1"
  
  #undef GNU_USER_TARGET_LINK_SPEC
  #define GNU_USER_TARGET_LINK_SPEC \
    "%{G*} %{shared} -m " GNU_USER_LINK_EMULATION \
    "%{!shared: %{static} %{!static: %{rdynamic:-export-dynamic} " \
!   "-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}"
! 
  
  /* Similar to standard Linux, but adding -ffast-math support.  */
  #undef GNU_USER_TARGET_MATHFILE_SPEC
--- 33,53 ----
  #define GLIBC_DYNAMIC_LINKER \
    "/lib" ABI_GRLEN_SPEC "/ld-linux-loongarch-" ABI_SPEC ".so.1"
  
+ #define MUSL_ABI_SPEC \
+   "%{mabi=lp64d:}" \
+   "%{mabi=lp64f:-sp}" \
+   "%{mabi=lp64s:-sf}"
+ 
  #undef MUSL_DYNAMIC_LINKER
  #define MUSL_DYNAMIC_LINKER \
!   "/lib/ld-musl-loongarch" ABI_GRLEN_SPEC MUSL_ABI_SPEC ".so.1"
  
  #undef GNU_USER_TARGET_LINK_SPEC
  #define GNU_USER_TARGET_LINK_SPEC \
    "%{G*} %{shared} -m " GNU_USER_LINK_EMULATION \
    "%{!shared: %{static} %{!static: %{rdynamic:-export-dynamic} " \
!   "-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" \
!   "%{mno-relax: --no-relax}"
  
  /* Similar to standard Linux, but adding -ffast-math support.  */
  #undef GNU_USER_TARGET_MATHFILE_SPEC
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/loongarch-opts.cc gcc-12.4.0/gcc/config/loongarch/loongarch-opts.cc
*** gcc-12.3.0/gcc/config/loongarch/loongarch-opts.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/loongarch-opts.cc	Thu Jun 20 08:08:06 2024
*************** multilib_enabled_abi_list ()
*** 575,577 ****
--- 575,599 ----
  
    return XOBFINISH (&msg_obstack, const char *);
  }
+ 
+ /* option status feedback for "gcc --help=target -Q" */
+ void
+ loongarch_update_gcc_opt_status (struct loongarch_target *target,
+ 				 struct gcc_options *opts,
+ 				 struct gcc_options *opts_set)
+ {
+   (void) opts_set;
+ 
+   /* status of -mabi */
+   opts->x_la_opt_abi_base = target->abi.base;
+ 
+   /* status of -march and -mtune */
+   opts->x_la_opt_cpu_arch = target->cpu_arch;
+   opts->x_la_opt_cpu_tune = target->cpu_tune;
+ 
+   /* status of -mcmodel */
+   opts->x_la_opt_cmodel = target->cmodel;
+ 
+   /* status of -mfpu */
+   opts->x_la_opt_fpu = target->isa.fpu;
+ }
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/loongarch-opts.h gcc-12.4.0/gcc/config/loongarch/loongarch-opts.h
*** gcc-12.3.0/gcc/config/loongarch/loongarch-opts.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/loongarch-opts.h	Thu Jun 20 08:08:06 2024
*************** loongarch_config_target (struct loongarc
*** 39,44 ****
--- 39,50 ----
  			 int opt_arch, int opt_tune, int opt_fpu,
  			 int opt_abi_base, int opt_abi_ext,
  			 int opt_cmodel, int follow_multilib_list);
+ 
+ /* option status feedback for "gcc --help=target -Q" */
+ void
+ loongarch_update_gcc_opt_status (struct loongarch_target *target,
+ 				 struct gcc_options *opts,
+ 				 struct gcc_options *opts_set);
  #endif
  
  
*************** loongarch_config_target (struct loongarc
*** 87,90 ****
--- 93,108 ----
     while -m[no]-memcpy imposes a global constraint.  */
  #define TARGET_DO_OPTIMIZE_BLOCK_MOVE_P  loongarch_do_optimize_block_move_p()
  
+ #ifndef HAVE_AS_MRELAX_OPTION
+ #define HAVE_AS_MRELAX_OPTION 0
+ #endif
+ 
+ #ifndef HAVE_AS_COND_BRANCH_RELAXATION
+ #define HAVE_AS_COND_BRANCH_RELAXATION 0
+ #endif
+ 
+ #ifndef HAVE_AS_TLS
+ #define HAVE_AS_TLS 0
+ #endif
+ 
  #endif /* LOONGARCH_OPTS_H */
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/loongarch-protos.h gcc-12.4.0/gcc/config/loongarch/loongarch-protos.h
*** gcc-12.3.0/gcc/config/loongarch/loongarch-protos.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/loongarch-protos.h	Thu Jun 20 08:08:06 2024
*************** enum loongarch_symbol_type {
*** 47,53 ****
  extern rtx loongarch_emit_move (rtx, rtx);
  extern HOST_WIDE_INT loongarch_initial_elimination_offset (int, int);
  extern void loongarch_expand_prologue (void);
! extern void loongarch_expand_epilogue (bool);
  extern bool loongarch_can_use_return_insn (void);
  
  extern bool loongarch_symbolic_constant_p (rtx, enum loongarch_symbol_type *);
--- 47,53 ----
  extern rtx loongarch_emit_move (rtx, rtx);
  extern HOST_WIDE_INT loongarch_initial_elimination_offset (int, int);
  extern void loongarch_expand_prologue (void);
! extern void loongarch_expand_epilogue (int);
  extern bool loongarch_can_use_return_insn (void);
  
  extern bool loongarch_symbolic_constant_p (rtx, enum loongarch_symbol_type *);
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/loongarch.cc gcc-12.4.0/gcc/config/loongarch/loongarch.cc
*** gcc-12.3.0/gcc/config/loongarch/loongarch.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/loongarch.cc	Thu Jun 20 08:08:06 2024
*************** loongarch_save_restore_reg (machine_mode
*** 1008,1014 ****
  
  static void
  loongarch_for_each_saved_reg (HOST_WIDE_INT sp_offset,
! 			      loongarch_save_restore_fn fn)
  {
    HOST_WIDE_INT offset;
  
--- 1008,1015 ----
  
  static void
  loongarch_for_each_saved_reg (HOST_WIDE_INT sp_offset,
! 			      loongarch_save_restore_fn fn,
! 			      bool skip_eh_data_regs_p)
  {
    HOST_WIDE_INT offset;
  
*************** loongarch_for_each_saved_reg (HOST_WIDE_
*** 1017,1023 ****
    for (int regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
      if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
        {
! 	loongarch_save_restore_reg (word_mode, regno, offset, fn);
  	offset -= UNITS_PER_WORD;
        }
  
--- 1018,1032 ----
    for (int regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
      if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
        {
! 	/* Special care needs to be taken for $r4-$r7 (EH_RETURN_DATA_REGNO)
! 	   when returning normally from a function that calls
! 	   __builtin_eh_return.  In this case, these registers are saved but
! 	   should not be restored, or the return value may be clobbered.  */
! 
! 	if (!(skip_eh_data_regs_p
! 	      && GP_ARG_FIRST <= regno && regno < GP_ARG_FIRST + 4))
! 	  loongarch_save_restore_reg (word_mode, regno, offset, fn);
! 
  	offset -= UNITS_PER_WORD;
        }
  
*************** loongarch_first_stack_step (struct loong
*** 1098,1104 ****
  static void
  loongarch_emit_stack_tie (void)
  {
!   emit_insn (gen_stack_tie (Pmode, stack_pointer_rtx, hard_frame_pointer_rtx));
  }
  
  #define PROBE_INTERVAL (1 << STACK_CHECK_PROBE_INTERVAL_EXP)
--- 1107,1115 ----
  static void
  loongarch_emit_stack_tie (void)
  {
!   emit_insn (gen_stack_tie (Pmode, stack_pointer_rtx,
! 			    frame_pointer_needed ? hard_frame_pointer_rtx
! 			    : stack_pointer_rtx));
  }
  
  #define PROBE_INTERVAL (1 << STACK_CHECK_PROBE_INTERVAL_EXP)
*************** loongarch_expand_prologue (void)
*** 1287,1293 ****
  			    GEN_INT (-step1));
        RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
        size -= step1;
!       loongarch_for_each_saved_reg (size, loongarch_save_reg);
      }
  
  
--- 1298,1304 ----
  			    GEN_INT (-step1));
        RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
        size -= step1;
!       loongarch_for_each_saved_reg (size, loongarch_save_reg, false);
      }
  
  
*************** loongarch_can_use_return_insn (void)
*** 1334,1344 ****
    return reload_completed && cfun->machine->frame.total_size == 0;
  }
  
! /* Expand an "epilogue" or "sibcall_epilogue" pattern; SIBCALL_P
!    says which.  */
  
  void
! loongarch_expand_epilogue (bool sibcall_p)
  {
    /* Split the frame into two.  STEP1 is the amount of stack we should
       deallocate before restoring the registers.  STEP2 is the amount we
--- 1345,1357 ----
    return reload_completed && cfun->machine->frame.total_size == 0;
  }
  
! /* Expand function epilogue using the following insn patterns:
!    "epilogue"	      (style == NORMAL_RETURN)
!    "sibcall_epilogue" (style == SIBCALL_RETURN)
!    "eh_return"	      (style == EXCEPTION_RETURN) */
  
  void
! loongarch_expand_epilogue (int style)
  {
    /* Split the frame into two.  STEP1 is the amount of stack we should
       deallocate before restoring the registers.  STEP2 is the amount we
*************** loongarch_expand_epilogue (bool sibcall_
*** 1355,1361 ****
    bool need_barrier_p
      = (get_frame_size () + cfun->machine->frame.arg_pointer_offset) != 0;
  
!   if (!sibcall_p && loongarch_can_use_return_insn ())
      {
        emit_jump_insn (gen_return ());
        return;
--- 1368,1375 ----
    bool need_barrier_p
      = (get_frame_size () + cfun->machine->frame.arg_pointer_offset) != 0;
  
!   /* Handle simple returns.  */
!   if (style == NORMAL_RETURN && loongarch_can_use_return_insn ())
      {
        emit_jump_insn (gen_return ());
        return;
*************** loongarch_expand_epilogue (bool sibcall_
*** 1431,1437 ****
  
    /* Restore the registers.  */
    loongarch_for_each_saved_reg (frame->total_size - step2,
! 				loongarch_restore_reg);
  
    if (need_barrier_p)
      loongarch_emit_stack_tie ();
--- 1445,1453 ----
  
    /* Restore the registers.  */
    loongarch_for_each_saved_reg (frame->total_size - step2,
! 				loongarch_restore_reg,
! 				crtl->calls_eh_return
! 				&& style != EXCEPTION_RETURN);
  
    if (need_barrier_p)
      loongarch_emit_stack_tie ();
*************** loongarch_expand_epilogue (bool sibcall_
*** 1452,1462 ****
      }
  
    /* Add in the __builtin_eh_return stack adjustment.  */
!   if (crtl->calls_eh_return)
      emit_insn (gen_add3_insn (stack_pointer_rtx, stack_pointer_rtx,
  			      EH_RETURN_STACKADJ_RTX));
  
!   if (!sibcall_p)
      emit_jump_insn (gen_simple_return_internal (ra));
  }
  
--- 1468,1479 ----
      }
  
    /* Add in the __builtin_eh_return stack adjustment.  */
!   if (crtl->calls_eh_return && style == EXCEPTION_RETURN)
      emit_insn (gen_add3_insn (stack_pointer_rtx, stack_pointer_rtx,
  			      EH_RETURN_STACKADJ_RTX));
  
!   /* Emit return unless doing sibcall.  */
!   if (style != SIBCALL_RETURN)
      emit_jump_insn (gen_simple_return_internal (ra));
  }
  
*************** loongarch_memmodel_needs_rel_acq_fence (
*** 4319,4345 ****
      }
  }
  
! /* Return true if a FENCE should be emitted to before a memory access to
!    implement the release portion of memory model MODEL.  */
  
  static bool
! loongarch_memmodel_needs_release_fence (enum memmodel model)
  {
!   switch (model)
      {
      case MEMMODEL_ACQ_REL:
      case MEMMODEL_SEQ_CST:
-     case MEMMODEL_SYNC_SEQ_CST:
-     case MEMMODEL_RELEASE:
-     case MEMMODEL_SYNC_RELEASE:
        return true;
  
-     case MEMMODEL_ACQUIRE:
-     case MEMMODEL_CONSUME:
-     case MEMMODEL_SYNC_ACQUIRE:
      case MEMMODEL_RELAXED:
        return false;
  
      default:
        gcc_unreachable ();
      }
--- 4336,4362 ----
      }
  }
  
! /* Return true if a FENCE should be emitted after a failed CAS to
!    implement the acquire semantic of failure_memorder.  */
  
  static bool
! loongarch_cas_failure_memorder_needs_acquire (enum memmodel model)
  {
!   switch (memmodel_base (model))
      {
+     case MEMMODEL_ACQUIRE:
      case MEMMODEL_ACQ_REL:
      case MEMMODEL_SEQ_CST:
        return true;
  
      case MEMMODEL_RELAXED:
+     case MEMMODEL_RELEASE:
        return false;
  
+     /* MEMMODEL_CONSUME is deliberately not handled because it's always
+        replaced by MEMMODEL_ACQUIRE as at now.  If you see an ICE caused by
+        MEMMODEL_CONSUME, read the change (re)introducing it carefully and
+        decide what to do.  See PR 59448 and get_memmodel in builtins.cc.  */
      default:
        gcc_unreachable ();
      }
*************** loongarch_memmodel_needs_release_fence (
*** 4366,4372 ****
     'V'	Print exact log2 of CONST_INT OP element 0 of a replicated
  	  CONST_VECTOR in decimal.
     'A'	Print a _DB suffix if the memory model requires a release.
!    'G'	Print a DBAR insn if the memory model requires a release.
     'i'	Print i if the operand is not a register.  */
  
  static void
--- 4383,4390 ----
     'V'	Print exact log2 of CONST_INT OP element 0 of a replicated
  	  CONST_VECTOR in decimal.
     'A'	Print a _DB suffix if the memory model requires a release.
!    'G'	Print a DBAR insn for CAS failure (with an acquire semantic if
! 	needed, otherwise a simple load-load barrier).
     'i'	Print i if the operand is not a register.  */
  
  static void
*************** loongarch_print_operand (FILE *file, rtx
*** 4487,4494 ****
        break;
  
      case 'G':
!       if (loongarch_memmodel_needs_release_fence ((enum memmodel) INTVAL (op)))
! 	fputs ("dbar\t0", file);
        break;
  
      case 'i':
--- 4505,4515 ----
        break;
  
      case 'G':
!       if (loongarch_cas_failure_memorder_needs_acquire (
! 	    memmodel_from_int (INTVAL (op))))
! 	fputs ("dbar\t0b10100", file);
!       else
! 	fputs ("dbar\t0x700", file);
        break;
  
      case 'i':
*************** loongarch_init_machine_status (void)
*** 5496,5502 ****
  }
  
  static void
! loongarch_option_override_internal (struct gcc_options *opts)
  {
    int i, regno, mode;
  
--- 5517,5524 ----
  }
  
  static void
! loongarch_option_override_internal (struct gcc_options *opts,
! 				    struct gcc_options *opts_set)
  {
    int i, regno, mode;
  
*************** loongarch_option_override_internal (stru
*** 5508,5513 ****
--- 5530,5537 ----
  			   la_opt_cpu_arch, la_opt_cpu_tune, la_opt_fpu,
  			   la_opt_abi_base, la_opt_abi_ext, la_opt_cmodel, 0);
  
+   loongarch_update_gcc_opt_status (&la_target, opts, opts_set);
+ 
    if (TARGET_ABI_LP64)
      flag_pcc_struct_return = 0;
  
*************** loongarch_option_override_internal (stru
*** 5570,5576 ****
  static void
  loongarch_option_override (void)
  {
!   loongarch_option_override_internal (&global_options);
  }
  
  /* Implement TARGET_CONDITIONAL_REGISTER_USAGE.  */
--- 5594,5623 ----
  static void
  loongarch_option_override (void)
  {
!   loongarch_option_override_internal (&global_options, &global_options_set);
! }
! 
! /* Implement TARGET_OPTION_SAVE.  */
! static void
! loongarch_option_save (struct cl_target_option *,
! 		       struct gcc_options *opts,
! 		       struct gcc_options *opts_set)
! {
!   loongarch_update_gcc_opt_status (&la_target, opts, opts_set);
! }
! 
! /* Implement TARGET_OPTION_RESTORE.  */
! static void
! loongarch_option_restore (struct gcc_options *,
! 			  struct gcc_options *,
! 			  struct cl_target_option *ptr)
! {
!   la_target.cpu_arch = ptr->x_la_opt_cpu_arch;
!   la_target.cpu_tune = ptr->x_la_opt_cpu_tune;
! 
!   la_target.isa.fpu = ptr->x_la_opt_fpu;
! 
!   la_target.cmodel = ptr->x_la_opt_cmodel;
  }
  
  /* Implement TARGET_CONDITIONAL_REGISTER_USAGE.  */
*************** loongarch_starting_frame_offset (void)
*** 5792,5797 ****
--- 5839,5848 ----
  
  #undef TARGET_OPTION_OVERRIDE
  #define TARGET_OPTION_OVERRIDE loongarch_option_override
+ #define TARGET_OPTION_SAVE loongarch_option_save
+ #undef TARGET_OPTION_RESTORE
+ #define TARGET_OPTION_RESTORE loongarch_option_restore
+ 
  
  #undef TARGET_LEGITIMIZE_ADDRESS
  #define TARGET_LEGITIMIZE_ADDRESS loongarch_legitimize_address
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/loongarch.h gcc-12.4.0/gcc/config/loongarch/loongarch.h
*** gcc-12.3.0/gcc/config/loongarch/loongarch.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/loongarch.h	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 69,76 ****
  #define SUBTARGET_ASM_SPEC ""
  #endif
  
  #undef ASM_SPEC
! #define ASM_SPEC "%{mabi=*} %{subtarget_asm_spec}"
  
  /* Extra switches sometimes passed to the linker.  */
  
--- 69,91 ----
  #define SUBTARGET_ASM_SPEC ""
  #endif
  
+ #if HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION
+ #define ASM_MRELAX_DEFAULT "%{!mrelax:%{!mno-relax:-mrelax}}"
+ #else
+ #define ASM_MRELAX_DEFAULT "%{!mrelax:%{!mno-relax:-mno-relax}}"
+ #endif
+ 
+ #if HAVE_AS_MRELAX_OPTION
+ #define ASM_MRELAX_SPEC \
+   "%{!mno-pass-mrelax-to-as:%{mrelax} %{mno-relax} " ASM_MRELAX_DEFAULT "}"
+ #else
+ #define ASM_MRELAX_SPEC \
+   "%{mpass-mrelax-to-as:%{mrelax} %{mno-relax} " ASM_MRELAX_DEFAULT "}"
+ #endif
+ 
  #undef ASM_SPEC
! #define ASM_SPEC \
!   "%{mabi=*} " ASM_MRELAX_SPEC " %(subtarget_asm_spec)"
  
  /* Extra switches sometimes passed to the linker.  */
  
*************** typedef struct {
*** 978,988 ****
  
  #define ASM_OUTPUT_ALIGN(STREAM, LOG) fprintf (STREAM, "\t.align\t%d\n", (LOG))
  
- /* "nop" instruction 54525952 (andi $r0,$r0,0) is
-    used for padding.  */
- #define ASM_OUTPUT_ALIGN_WITH_NOP(STREAM, LOG) \
-   fprintf (STREAM, "\t.align\t%d,54525952,4\n", (LOG))
- 
  /* This is how to output an assembler line to advance the location
     counter by SIZE bytes.  */
  
--- 993,998 ----
*************** struct GTY (()) machine_function
*** 1148,1150 ****
--- 1158,1165 ----
    (TARGET_HARD_FLOAT_ABI ? (TARGET_DOUBLE_FLOAT_ABI ? 8 : 4) : 0)
  
  #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN)
+ 
+ /* LoongArch maintains ICache/DCache coherency by hardware,
+    we just need "ibar" to avoid instruction hazard here.  */
+ #undef  CLEAR_INSN_CACHE
+ #define CLEAR_INSN_CACHE(beg, end) __builtin_loongarch_ibar (0)
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/loongarch.md gcc-12.4.0/gcc/config/loongarch/loongarch.md
*** gcc-12.3.0/gcc/config/loongarch/loongarch.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/loongarch.md	Thu Jun 20 08:08:06 2024
***************
*** 93,102 ****
--- 93,108 ----
  
  (define_constants
    [(RETURN_ADDR_REGNUM		1)
+    (TP_REGNUM			2)
     (T0_REGNUM			12)
     (T1_REGNUM			13)
     (S0_REGNUM			23)
  
+    ;; Return path styles
+    (NORMAL_RETURN		0)
+    (SIBCALL_RETURN		1)
+    (EXCEPTION_RETURN		2)
+ 
     ;; PIC long branch sequences are never longer than 100 bytes.
     (MAX_PIC_BRANCH_LENGTH	100)
  ])
***************
*** 2622,2627 ****
--- 2628,2637 ----
  }
    [(set_attr "type" "branch")])
  
+ ;; Micro-architecture unconditionally treats a "jr $ra" as "return from subroutine",
+ ;; non-returning indirect jumps through $ra would interfere with both subroutine
+ ;; return prediction and the more general indirect branch prediction.
+ 
  (define_expand "indirect_jump"
    [(set (pc) (match_operand 0 "register_operand"))]
    ""
***************
*** 2632,2638 ****
  })
  
  (define_insn "@indirect_jump"
!   [(set (pc) (match_operand:P 0 "register_operand" "r"))]
    ""
    "jr\t%0"
    [(set_attr "type" "jump")
--- 2642,2648 ----
  })
  
  (define_insn "@indirect_jump"
!   [(set (pc) (match_operand:P 0 "register_operand" "e"))]
    ""
    "jr\t%0"
    [(set_attr "type" "jump")
***************
*** 2655,2661 ****
  
  (define_insn "@tablejump"
    [(set (pc)
! 	(match_operand:P 0 "register_operand" "r"))
     (use (label_ref (match_operand 1 "" "")))]
    ""
    "jr\t%0"
--- 2665,2671 ----
  
  (define_insn "@tablejump"
    [(set (pc)
! 	(match_operand:P 0 "register_operand" "e"))
     (use (label_ref (match_operand 1 "" "")))]
    ""
    "jr\t%0"
***************
*** 2710,2716 ****
    [(const_int 2)]
    ""
  {
!   loongarch_expand_epilogue (false);
    DONE;
  })
  
--- 2720,2726 ----
    [(const_int 2)]
    ""
  {
!   loongarch_expand_epilogue (NORMAL_RETURN);
    DONE;
  })
  
***************
*** 2718,2724 ****
    [(const_int 2)]
    ""
  {
!   loongarch_expand_epilogue (true);
    DONE;
  })
  
--- 2728,2734 ----
    [(const_int 2)]
    ""
  {
!   loongarch_expand_epilogue (SIBCALL_RETURN);
    DONE;
  })
  
***************
*** 2775,2780 ****
--- 2785,2804 ----
      emit_insn (gen_eh_set_ra_di (operands[0]));
    else
      emit_insn (gen_eh_set_ra_si (operands[0]));
+ 
+   emit_jump_insn (gen_eh_return_internal ());
+   emit_barrier ();
+   DONE;
+ })
+ 
+ (define_insn_and_split "eh_return_internal"
+   [(eh_return)]
+   ""
+   "#"
+   "epilogue_completed"
+   [(const_int 0)]
+ {
+   loongarch_expand_epilogue (EXCEPTION_RETURN);
    DONE;
  })
  
***************
*** 3291,3296 ****
--- 3315,3326 ----
    [(set_attr "length" "0")
     (set_attr "type" "ghost")])
  
+ ;; Named pattern for expanding thread pointer reference.
+ (define_expand "get_thread_pointer"
+   [(set (match_operand:P 0 "register_operand" "=r")
+ 	(reg:P TP_REGNUM))]
+   "HAVE_AS_TLS"
+   {})
  
  (define_split
    [(match_operand 0 "small_data_pattern")]
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/loongarch.opt gcc-12.4.0/gcc/config/loongarch/loongarch.opt
*** gcc-12.3.0/gcc/config/loongarch/loongarch.opt	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/loongarch.opt	Thu Jun 20 08:08:06 2024
*************** EnumValue
*** 65,71 ****
  Enum(isa_ext_fpu) String(64) Value(ISA_EXT_FPU64)
  
  mfpu=
! Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN)
  -mfpu=FPU	Generate code for the given FPU.
  
  mfpu=0
--- 65,71 ----
  Enum(isa_ext_fpu) String(64) Value(ISA_EXT_FPU64)
  
  mfpu=
! Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save
  -mfpu=FPU	Generate code for the given FPU.
  
  mfpu=0
*************** EnumValue
*** 99,109 ****
  Enum(cpu_type) String(la464) Value(CPU_LA464)
  
  march=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN)
  -march=PROCESSOR	Generate code for the given PROCESSOR ISA.
  
  mtune=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN)
  -mtune=PROCESSOR	Generate optimized code for PROCESSOR.
  
  
--- 99,109 ----
  Enum(cpu_type) String(la464) Value(CPU_LA464)
  
  march=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save
  -march=PROCESSOR	Generate code for the given PROCESSOR ISA.
  
  mtune=
! Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save
  -mtune=PROCESSOR	Generate optimized code for PROCESSOR.
  
  
*************** int la_opt_abi_ext = M_OPTION_NOT_SEEN
*** 134,164 ****
  
  
  mbranch-cost=
! Target RejectNegative Joined UInteger Var(loongarch_branch_cost)
  -mbranch-cost=COST	Set the cost of branches to roughly COST instructions.
  
  mcheck-zero-division
! Target Mask(CHECK_ZERO_DIV)
  Trap on integer divide by zero.
  
  mcond-move-int
! Target Var(TARGET_COND_MOVE_INT) Init(1)
  Conditional moves for integral are enabled.
  
  mcond-move-float
! Target Var(TARGET_COND_MOVE_FLOAT) Init(1)
  Conditional moves for float are enabled.
  
  mmemcpy
! Target Mask(MEMCPY)
  Prevent optimizing block moves, which is also the default behavior of -Os.
  
  mstrict-align
! Target Var(TARGET_STRICT_ALIGN) Init(0)
  Do not generate unaligned memory accesses.
  
  mmax-inline-memcpy-size=
! Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024)
  -mmax-inline-memcpy-size=SIZE	Set the max size of memcpy to inline, default is 1024.
  
  ; The code model option names for -mcmodel.
--- 134,164 ----
  
  
  mbranch-cost=
! Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save
  -mbranch-cost=COST	Set the cost of branches to roughly COST instructions.
  
  mcheck-zero-division
! Target Mask(CHECK_ZERO_DIV) Save
  Trap on integer divide by zero.
  
  mcond-move-int
! Target Var(TARGET_COND_MOVE_INT) Init(1) Save
  Conditional moves for integral are enabled.
  
  mcond-move-float
! Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save
  Conditional moves for float are enabled.
  
  mmemcpy
! Target Mask(MEMCPY) Save
  Prevent optimizing block moves, which is also the default behavior of -Os.
  
  mstrict-align
! Target Var(TARGET_STRICT_ALIGN) Init(0) Save
  Do not generate unaligned memory accesses.
  
  mmax-inline-memcpy-size=
! Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save
  -mmax-inline-memcpy-size=SIZE	Set the max size of memcpy to inline, default is 1024.
  
  ; The code model option names for -mcmodel.
*************** EnumValue
*** 182,186 ****
  Enum(cmodel) String(extreme) Value(CMODEL_EXTREME)
  
  mcmodel=
! Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL)
  Specify the code model.
--- 182,195 ----
  Enum(cmodel) String(extreme) Value(CMODEL_EXTREME)
  
  mcmodel=
! Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save
  Specify the code model.
+ 
+ mrelax
+ Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION)
+ Take advantage of linker relaxations to reduce the number of instructions
+ required to materialize symbol addresses.
+ 
+ mpass-mrelax-to-as
+ Target Var(loongarch_pass_mrelax_to_as) Init(HAVE_AS_MRELAX_OPTION)
+ Pass -mrelax or -mno-relax option to the assembler.
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/sync.md gcc-12.4.0/gcc/config/loongarch/sync.md
*** gcc-12.3.0/gcc/config/loongarch/sync.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/sync.md	Thu Jun 20 08:08:06 2024
***************
*** 129,147 ****
     (clobber (match_scratch:GPR 6 "=&r"))]
    ""
  {
!   return "%G5\\n\\t"
! 	 "1:\\n\\t"
! 	 "ll.\\t%0,%1\\n\\t"
! 	 "bne\\t%0,%z2,2f\\n\\t"
! 	 "or%i3\\t%6,$zero,%3\\n\\t"
! 	 "sc.\\t%6,%1\\n\\t"
! 	 "beq\\t$zero,%6,1b\\n\\t"
! 	 "b\\t3f\\n\\t"
! 	 "2:\\n\\t"
! 	 "dbar\\t0x700\\n\\t"
! 	 "3:\\n\\t";
  }
!   [(set (attr "length") (const_int 32))])
  
  (define_expand "atomic_compare_and_swap"
    [(match_operand:SI 0 "register_operand" "")   ;; bool output
--- 129,170 ----
     (clobber (match_scratch:GPR 6 "=&r"))]
    ""
  {
!   output_asm_insn ("1:", operands);
!   output_asm_insn ("ll.\t%0,%1", operands);
! 
!   /* Like the test case atomic-cas-int.C, in loongarch64, O1 and higher, the
!      return value of the val_without_const_folding will not be truncated and
!      will be passed directly to the function compare_exchange_strong.
!      However, the instruction 'bne' does not distinguish between 32-bit and
!      64-bit operations.  so if the upper 32 bits of the register are not
!      extended by the 32nd bit symbol, then the comparison may not be valid
!      here.  This will affect the result of the operation.  */
! 
!   if (TARGET_64BIT && REG_P (operands[2])
!       && GET_MODE (operands[2]) == SImode)
!     {
!       output_asm_insn ("addi.w\t%6,%2,0", operands);
!       output_asm_insn ("bne\t%0,%6,2f", operands);
!     }
!   else
!     output_asm_insn ("bne\t%0,%z2,2f", operands);
! 
!   output_asm_insn ("or%i3\t%6,$zero,%3", operands);
!   output_asm_insn ("sc.\t%6,%1", operands);
!   output_asm_insn ("beqz\t%6,1b", operands);
!   output_asm_insn ("b\t3f", operands);
!   output_asm_insn ("2:", operands);
!   output_asm_insn ("%G5", operands);
!   output_asm_insn ("3:", operands);
! 
!   return "";
  }
!   [(set (attr "length")
!      (if_then_else
! 	(and (match_test "GET_MODE (operands[2]) == SImode")
! 	     (match_test "REG_P (operands[2])"))
! 	(const_int 32)
! 	(const_int 28)))])
  
  (define_expand "atomic_compare_and_swap"
    [(match_operand:SI 0 "register_operand" "")   ;; bool output
***************
*** 234,241 ****
     (clobber (match_scratch:GPR 7 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%2\\n\\t"
  	 "bne\\t%7,%z4,2f\\n\\t"
--- 257,263 ----
     (clobber (match_scratch:GPR 7 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%2\\n\\t"
  	 "bne\\t%7,%z4,2f\\n\\t"
***************
*** 245,254 ****
  	 "beq\\t$zero,%7,1b\\n\\t"
  	 "b\\t3f\\n\\t"
  	 "2:\\n\\t"
! 	 "dbar\\t0x700\\n\\t"
  	 "3:\\n\\t";
  }
!   [(set (attr "length") (const_int 40))])
  
  (define_expand "atomic_compare_and_swap"
    [(match_operand:SI 0 "register_operand" "")   ;; bool output
--- 267,276 ----
  	 "beq\\t$zero,%7,1b\\n\\t"
  	 "b\\t3f\\n\\t"
  	 "2:\\n\\t"
! 	 "%G6\\n\\t"
  	 "3:\\n\\t";
  }
!   [(set (attr "length") (const_int 36))])
  
  (define_expand "atomic_compare_and_swap"
    [(match_operand:SI 0 "register_operand" "")   ;; bool output
***************
*** 303,310 ****
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "add.w\\t%8,%0,%z5\\n\\t"
--- 325,331 ----
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "add.w\\t%8,%0,%z5\\n\\t"
***************
*** 314,320 ****
  	 "beq\\t$zero,%7,1b";
  }
  
!   [(set (attr "length") (const_int 32))])
  
  (define_insn "atomic_cas_value_sub_7_"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
--- 335,341 ----
  	 "beq\\t$zero,%7,1b";
  }
  
!   [(set (attr "length") (const_int 28))])
  
  (define_insn "atomic_cas_value_sub_7_"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
***************
*** 330,337 ****
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "sub.w\\t%8,%0,%z5\\n\\t"
--- 351,357 ----
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "sub.w\\t%8,%0,%z5\\n\\t"
***************
*** 340,346 ****
  	 "sc.\\t%7,%1\\n\\t"
  	 "beq\\t$zero,%7,1b";
  }
!   [(set (attr "length") (const_int 32))])
  
  (define_insn "atomic_cas_value_and_7_"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
--- 360,366 ----
  	 "sc.\\t%7,%1\\n\\t"
  	 "beq\\t$zero,%7,1b";
  }
!   [(set (attr "length") (const_int 28))])
  
  (define_insn "atomic_cas_value_and_7_"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
***************
*** 356,363 ****
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "and\\t%8,%0,%z5\\n\\t"
--- 376,382 ----
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "and\\t%8,%0,%z5\\n\\t"
***************
*** 366,372 ****
  	 "sc.\\t%7,%1\\n\\t"
  	 "beq\\t$zero,%7,1b";
  }
!   [(set (attr "length") (const_int 32))])
  
  (define_insn "atomic_cas_value_xor_7_"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
--- 385,391 ----
  	 "sc.\\t%7,%1\\n\\t"
  	 "beq\\t$zero,%7,1b";
  }
!   [(set (attr "length") (const_int 28))])
  
  (define_insn "atomic_cas_value_xor_7_"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
***************
*** 382,389 ****
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "xor\\t%8,%0,%z5\\n\\t"
--- 401,407 ----
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "xor\\t%8,%0,%z5\\n\\t"
***************
*** 393,399 ****
  	 "beq\\t$zero,%7,1b";
  }
  
!   [(set (attr "length") (const_int 32))])
  
  (define_insn "atomic_cas_value_or_7_"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
--- 411,417 ----
  	 "beq\\t$zero,%7,1b";
  }
  
!   [(set (attr "length") (const_int 28))])
  
  (define_insn "atomic_cas_value_or_7_"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
***************
*** 409,416 ****
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "or\\t%8,%0,%z5\\n\\t"
--- 427,433 ----
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "or\\t%8,%0,%z5\\n\\t"
***************
*** 420,426 ****
  	 "beq\\t$zero,%7,1b";
  }
  
!   [(set (attr "length") (const_int 32))])
  
  (define_insn "atomic_cas_value_nand_7_"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
--- 437,443 ----
  	 "beq\\t$zero,%7,1b";
  }
  
!   [(set (attr "length") (const_int 28))])
  
  (define_insn "atomic_cas_value_nand_7_"
    [(set (match_operand:GPR 0 "register_operand" "=&r")				;; res
***************
*** 436,443 ****
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "and\\t%8,%0,%z5\\n\\t"
--- 453,459 ----
     (clobber (match_scratch:GPR 8 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%3\\n\\t"
  	 "and\\t%8,%0,%z5\\n\\t"
***************
*** 446,452 ****
  	 "sc.\\t%7,%1\\n\\t"
  	 "beq\\t$zero,%7,1b";
  }
!   [(set (attr "length") (const_int 32))])
  
  (define_insn "atomic_cas_value_exchange_7_"
    [(set (match_operand:GPR 0 "register_operand" "=&r")
--- 462,468 ----
  	 "sc.\\t%7,%1\\n\\t"
  	 "beq\\t$zero,%7,1b";
  }
!   [(set (attr "length") (const_int 28))])
  
  (define_insn "atomic_cas_value_exchange_7_"
    [(set (match_operand:GPR 0 "register_operand" "=&r")
***************
*** 461,468 ****
     (clobber (match_scratch:GPR 7 "=&r"))]
    ""
  {
!   return "%G6\\n\\t"
! 	 "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%z3\\n\\t"
  	 "or%i5\\t%7,%7,%5\\n\\t"
--- 477,483 ----
     (clobber (match_scratch:GPR 7 "=&r"))]
    ""
  {
!   return "1:\\n\\t"
  	 "ll.\\t%0,%1\\n\\t"
  	 "and\\t%7,%0,%z3\\n\\t"
  	 "or%i5\\t%7,%7,%5\\n\\t"
diff -Nrcpad gcc-12.3.0/gcc/config/loongarch/t-loongarch gcc-12.4.0/gcc/config/loongarch/t-loongarch
*** gcc-12.3.0/gcc/config/loongarch/t-loongarch	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/loongarch/t-loongarch	Thu Jun 20 08:08:06 2024
***************
*** 16,21 ****
--- 16,25 ----
  # along with GCC; see the file COPYING3.  If not see
  # .
  
+ TM_H += $(srcdir)/config/loongarch/loongarch-driver.h
+ OPTIONS_H_EXTRA += $(srcdir)/config/loongarch/loongarch-def.h \
+ 		   $(srcdir)/config/loongarch/loongarch-tune.h
+ 
  # Canonical target triplet from config.gcc
  LA_MULTIARCH_TRIPLET = $(patsubst LA_MULTIARCH_TRIPLET=%,%,$\
  $(filter LA_MULTIARCH_TRIPLET=%,$(tm_defines)))
diff -Nrcpad gcc-12.3.0/gcc/config/mips/mips-msa.md gcc-12.4.0/gcc/config/mips/mips-msa.md
*** gcc-12.3.0/gcc/config/mips/mips-msa.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/mips/mips-msa.md	Thu Jun 20 08:08:06 2024
***************
*** 231,236 ****
--- 231,240 ----
     (V4SI  "uimm5")
     (V2DI  "uimm6")])
  
+ ;; The index of sign bit in FP vector elements.
+ (define_mode_attr elmsgnbit [(V2DF "63") (V4DF "63")
+ 			     (V4SF "31") (V8SF "31")])
+ 
  (define_expand "vec_init"
    [(match_operand:MSA 0 "register_operand")
     (match_operand:MSA 1 "")]
***************
*** 597,605 ****
  })
  
  (define_expand "neg2"
!   [(set (match_operand:MSA 0 "register_operand")
! 	(minus:MSA (match_dup 2)
! 		   (match_operand:MSA 1 "register_operand")))]
    "ISA_HAS_MSA"
  {
    rtx reg = gen_reg_rtx (mode);
--- 601,609 ----
  })
  
  (define_expand "neg2"
!   [(set (match_operand:IMSA 0 "register_operand")
! 	(minus:IMSA (match_dup 2)
! 		   (match_operand:IMSA 1 "register_operand")))]
    "ISA_HAS_MSA"
  {
    rtx reg = gen_reg_rtx (mode);
***************
*** 607,612 ****
--- 611,624 ----
    operands[2] = reg;
  })
  
+ (define_insn "neg2"
+   [(set (match_operand:FMSA 0 "register_operand" "=f")
+ 	(neg:FMSA (match_operand:FMSA 1 "register_operand" "f")))]
+   "ISA_HAS_MSA"
+   "bnegi.\t%w0,%w1,"
+   [(set_attr "type" "simd_bit")
+    (set_attr "mode" "")])
+ 
  (define_expand "msa_ldi"
    [(match_operand:IMSA 0 "register_operand")
     (match_operand 1 "const_imm10_operand")]
diff -Nrcpad gcc-12.3.0/gcc/config/mips/mips.cc gcc-12.4.0/gcc/config/mips/mips.cc
*** gcc-12.3.0/gcc/config/mips/mips.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/mips/mips.cc	Thu Jun 20 08:08:06 2024
*************** mips_emit_call_insn (rtx pattern, rtx or
*** 3140,3145 ****
--- 3140,3148 ----
      {
        rtx post_call_tmp_reg = gen_rtx_REG (word_mode, POST_CALL_TMP_REG);
        clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), post_call_tmp_reg);
+       clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP);
+       clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn),
+ 			MIPS_PROLOGUE_TEMP (word_mode));
      }
  
    return insn;
*************** mips16_gp_pseudo_reg (void)
*** 3236,3242 ****
        rtx set = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx);
        rtx_insn *insn = emit_insn_after (set, scan);
        INSN_LOCATION (insn) = 0;
! 
        pop_topmost_sequence ();
      }
  
--- 3239,3251 ----
        rtx set = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx);
        rtx_insn *insn = emit_insn_after (set, scan);
        INSN_LOCATION (insn) = 0;
!       /* NewABI support hasn't been implement.  NewABI should generate RTL
! 	 sequence instead of ASM sequence directly.  */
!       if (mips_current_loadgp_style () == LOADGP_OLDABI)
! 	{
! 	  emit_clobber (MIPS16_PIC_TEMP);
! 	  emit_clobber (MIPS_PROLOGUE_TEMP (Pmode));
! 	}
        pop_topmost_sequence ();
      }
  
diff -Nrcpad gcc-12.3.0/gcc/config/pa/pa.cc gcc-12.4.0/gcc/config/pa/pa.cc
*** gcc-12.3.0/gcc/config/pa/pa.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/pa/pa.cc	Thu Jun 20 08:08:06 2024
*************** pa_asm_trampoline_template (FILE *f)
*** 10400,10406 ****
  	  fputs ("\tldw		0(%r22),%r21\n", f);
  	  fputs ("\tldw		4(%r22),%r19\n", f);
  	  fputs ("\tbve		(%r21)\n", f);
! 	  fputs ("\tldw		52(%r1),%r29\n", f);
  	  fputs ("\t.word	0\n", f);
  	  fputs ("\t.word	0\n", f);
  	  fputs ("\t.word	0\n", f);
--- 10400,10406 ----
  	  fputs ("\tldw		0(%r22),%r21\n", f);
  	  fputs ("\tldw		4(%r22),%r19\n", f);
  	  fputs ("\tbve		(%r21)\n", f);
! 	  fputs ("\tldw		52(%r20),%r29\n", f);
  	  fputs ("\t.word	0\n", f);
  	  fputs ("\t.word	0\n", f);
  	  fputs ("\t.word	0\n", f);
diff -Nrcpad gcc-12.3.0/gcc/config/pa/pa.md gcc-12.4.0/gcc/config/pa/pa.md
*** gcc-12.3.0/gcc/config/pa/pa.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/pa/pa.md	Thu Jun 20 08:08:06 2024
*************** add,l %2,%3,%3\;bv,n %%r0(%3)"
*** 10488,10500 ****
  (define_insn "atomic_storedi_1"
    [(set (mem:DI (match_operand:SI 0 "register_operand" "r,r"))
          (match_operand:DI 1 "reg_or_0_operand" "M,r"))
!    (clobber (match_scratch:DI 2 "=X,f"))]
    "!TARGET_64BIT && !TARGET_SOFT_FLOAT"
    "@
!    {fstds|fstd} %%fr0,0(%0)
     {stws|stw} %1,-16(%%sp)\n\t{stws|stw} %R1,-12(%%sp)\n\t{fldds|fldd} -16(%%sp),%2\n\t{fstds|fstd} %2,0(%0)"
    [(set_attr "type" "move,move")
!    (set_attr "length" "4,16")])
  
  ;; PA 2.0 hardware supports out-of-order execution of loads and stores, so
  ;; we need memory barriers to enforce program order for memory references
--- 10488,10500 ----
  (define_insn "atomic_storedi_1"
    [(set (mem:DI (match_operand:SI 0 "register_operand" "r,r"))
          (match_operand:DI 1 "reg_or_0_operand" "M,r"))
!    (clobber (match_scratch:DI 2 "=f,f"))]
    "!TARGET_64BIT && !TARGET_SOFT_FLOAT"
    "@
!    fcpy,dbl %%fr0,%2\n\t{fstds|fstd} %2,0(%0)
     {stws|stw} %1,-16(%%sp)\n\t{stws|stw} %R1,-12(%%sp)\n\t{fldds|fldd} -16(%%sp),%2\n\t{fstds|fstd} %2,0(%0)"
    [(set_attr "type" "move,move")
!    (set_attr "length" "8,16")])
  
  ;; PA 2.0 hardware supports out-of-order execution of loads and stores, so
  ;; we need memory barriers to enforce program order for memory references
diff -Nrcpad gcc-12.3.0/gcc/config/riscv/riscv.cc gcc-12.4.0/gcc/config/riscv/riscv.cc
*** gcc-12.3.0/gcc/config/riscv/riscv.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/riscv/riscv.cc	Thu Jun 20 08:08:06 2024
*************** riscv_asan_shadow_offset (void)
*** 5600,5608 ****
    /* We only have libsanitizer support for RV64 at present.
  
       This number must match kRiscv*_ShadowOffset* in the file
!      libsanitizer/asan/asan_mapping.h which is currently 1<<29 for rv64,
!      even though 1<<36 makes more sense.  */
!   return TARGET_64BIT ? (HOST_WIDE_INT_1 << 29) : 0;
  }
  
  /* Initialize the GCC target structure.  */
--- 5600,5607 ----
    /* We only have libsanitizer support for RV64 at present.
  
       This number must match kRiscv*_ShadowOffset* in the file
!      libsanitizer/asan/asan_mapping.h.  */
!   return TARGET_64BIT ? HOST_WIDE_INT_UC (0xd55550000) : 0;
  }
  
  /* Initialize the GCC target structure.  */
diff -Nrcpad gcc-12.3.0/gcc/config/riscv/sync.md gcc-12.4.0/gcc/config/riscv/sync.md
*** gcc-12.3.0/gcc/config/riscv/sync.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/riscv/sync.md	Thu Jun 20 08:08:06 2024
***************
*** 129,134 ****
--- 129,143 ----
     (match_operand:SI 7 "const_int_operand" "")] ;; mod_f
    "TARGET_ATOMIC"
  {
+   if (word_mode != mode && operands[3] != const0_rtx)
+     {
+       /* We don't have SI mode compare on RV64, so we need to make sure expected
+ 	 value is sign-extended.  */
+       rtx tmp0 = gen_reg_rtx (word_mode);
+       emit_insn (gen_extend_insn (tmp0, operands[3], word_mode, mode, 0));
+       operands[3] = simplify_gen_subreg (mode, tmp0, word_mode, 0);
+     }
+ 
    emit_insn (gen_atomic_cas_value_strong (operands[1], operands[2],
  						operands[3], operands[4],
  						operands[6], operands[7]));
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/altivec.md gcc-12.4.0/gcc/config/rs6000/altivec.md
*** gcc-12.3.0/gcc/config/rs6000/altivec.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/altivec.md	Thu Jun 20 08:08:06 2024
***************
*** 385,398 ****
  
  (define_insn_and_split "sldoi_to_mov"
    [(set (match_operand:VM 0 "altivec_register_operand")
! 	(unspec:VM [(match_operand:VM 1 "easy_vector_constant")
  	            (match_dup 1)
  		    (match_operand:QI 2 "u5bit_cint_operand")]
  		    UNSPEC_VSLDOI))]
!   "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode) && can_create_pseudo_p ()"
    "#"
    "&& 1"
!   [(set (match_dup 0) (match_dup 1))])
  
  (define_insn "get_vrsave_internal"
    [(set (match_operand:SI 0 "register_operand" "=r")
--- 385,406 ----
  
  (define_insn_and_split "sldoi_to_mov"
    [(set (match_operand:VM 0 "altivec_register_operand")
! 	(unspec:VM [(match_operand:VM 1 "const_vector_each_byte_same")
  	            (match_dup 1)
  		    (match_operand:QI 2 "u5bit_cint_operand")]
  		    UNSPEC_VSLDOI))]
!   "VECTOR_MEM_ALTIVEC_OR_VSX_P (mode) && can_create_pseudo_p ()"
    "#"
    "&& 1"
!   [(set (match_dup 0) (match_dup 1))]
!   "{
!      if (!easy_vector_constant (operands[1], mode))
!        {
! 	 rtx dest = gen_reg_rtx (mode);
! 	 emit_move_insn (dest, operands[1]);
! 	 operands[1] = dest;
!        }
!   }")
  
  (define_insn "get_vrsave_internal"
    [(set (match_operand:SI 0 "register_operand" "=r")
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/darwin.h gcc-12.4.0/gcc/config/rs6000/darwin.h
*** gcc-12.3.0/gcc/config/rs6000/darwin.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/darwin.h	Thu Jun 20 08:08:06 2024
***************
*** 98,104 ****
     Include libmx when targeting Darwin 7.0 and above, but before libSystem,
     since the functions are actually in libSystem but for 7.x compatibility
     we want them to be looked for in libmx first.
!    Include libSystemStubs when compiling against 10.3 - 10.5 SDKs (we assume
     this is the case when targetting these) - but not for 64-bit long double.
     Don't do either for m64, the library is either a dummy or non-existent.
  */
--- 98,104 ----
     Include libmx when targeting Darwin 7.0 and above, but before libSystem,
     since the functions are actually in libSystem but for 7.x compatibility
     we want them to be looked for in libmx first.
!    Include libSystemStubs when compiling against 10.3 - 10.6 SDKs (we assume
     this is the case when targetting these) - but not for 64-bit long double.
     Don't do either for m64, the library is either a dummy or non-existent.
  */
***************
*** 107,114 ****
  #define LIB_SPEC \
  "%{!static:								\
    %{!m64:%{!mlong-double-64:						\
!     %{pg:%:version-compare(>< 10.3 10.5 mmacosx-version-min= -lSystemStubs_profile)} \
!     %{!pg:%:version-compare(>< 10.3 10.5 mmacosx-version-min= -lSystemStubs)} \
       %:version-compare(>< 10.3 10.4 mmacosx-version-min= -lmx)}}	\
    -lSystem								\
  }"
--- 107,114 ----
  #define LIB_SPEC \
  "%{!static:								\
    %{!m64:%{!mlong-double-64:						\
!     %{pg:%:version-compare(>< 10.3 10.7 mmacosx-version-min= -lSystemStubs_profile)} \
!     %{!pg:%:version-compare(>< 10.3 10.7 mmacosx-version-min= -lSystemStubs)} \
       %:version-compare(>< 10.3 10.4 mmacosx-version-min= -lmx)}}	\
    -lSystem								\
  }"
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/fusion.md gcc-12.4.0/gcc/config/rs6000/fusion.md
*** gcc-12.3.0/gcc/config/rs6000/fusion.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/fusion.md	Thu Jun 20 08:08:06 2024
***************
*** 22,28 ****
  ;; load mode is DI result mode is clobber compare mode is CC extend is none
  (define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
                      (match_operand:DI 3 "const_m1_to_1_operand" "n")))
     (clobber (match_scratch:DI 0 "=r"))]
    "(TARGET_P10_FUSION)"
--- 22,28 ----
  ;; load mode is DI result mode is clobber compare mode is CC extend is none
  (define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:DI 1 "non_update_memory_operand" "YZ")
                      (match_operand:DI 3 "const_m1_to_1_operand" "n")))
     (clobber (match_scratch:DI 0 "=r"))]
    "(TARGET_P10_FUSION)"
***************
*** 43,49 ****
  ;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
  (define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
    [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
!         (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
                         (match_operand:DI 3 "const_0_to_1_operand" "n")))
     (clobber (match_scratch:DI 0 "=r"))]
    "(TARGET_P10_FUSION)"
--- 43,49 ----
  ;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
  (define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
    [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
!         (compare:CCUNS (match_operand:DI 1 "non_update_memory_operand" "YZ")
                         (match_operand:DI 3 "const_0_to_1_operand" "n")))
     (clobber (match_scratch:DI 0 "=r"))]
    "(TARGET_P10_FUSION)"
***************
*** 64,70 ****
  ;; load mode is DI result mode is DI compare mode is CC extend is none
  (define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
                      (match_operand:DI 3 "const_m1_to_1_operand" "n")))
     (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
    "(TARGET_P10_FUSION)"
--- 64,70 ----
  ;; load mode is DI result mode is DI compare mode is CC extend is none
  (define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:DI 1 "non_update_memory_operand" "YZ")
                      (match_operand:DI 3 "const_m1_to_1_operand" "n")))
     (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
    "(TARGET_P10_FUSION)"
***************
*** 85,91 ****
  ;; load mode is DI result mode is DI compare mode is CCUNS extend is none
  (define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
    [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
!         (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
                         (match_operand:DI 3 "const_0_to_1_operand" "n")))
     (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
    "(TARGET_P10_FUSION)"
--- 85,91 ----
  ;; load mode is DI result mode is DI compare mode is CCUNS extend is none
  (define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
    [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
!         (compare:CCUNS (match_operand:DI 1 "non_update_memory_operand" "YZ")
                         (match_operand:DI 3 "const_0_to_1_operand" "n")))
     (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
    "(TARGET_P10_FUSION)"
***************
*** 104,120 ****
  
  ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
  ;; load mode is SI result mode is clobber compare mode is CC extend is none
! (define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
                      (match_operand:SI 3 "const_m1_to_1_operand" "n")))
     (clobber (match_scratch:SI 0 "=r"))]
    "(TARGET_P10_FUSION)"
!   "lwa%X1 %0,%1\;cmpdi %2,%0,%3"
    "&& reload_completed
     && (cc_reg_not_cr0_operand (operands[2], CCmode)
         || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
!                                       SImode, NON_PREFIXED_DS))"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2)
          (compare:CC (match_dup 0) (match_dup 3)))]
--- 104,120 ----
  
  ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
  ;; load mode is SI result mode is clobber compare mode is CC extend is none
! (define_insn_and_split "*lwz_cmpwi_cr0_SI_clobber_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m")
                      (match_operand:SI 3 "const_m1_to_1_operand" "n")))
     (clobber (match_scratch:SI 0 "=r"))]
    "(TARGET_P10_FUSION)"
!   "lwz%X1 %0,%1\;cmpwi %2,%0,%3"
    "&& reload_completed
     && (cc_reg_not_cr0_operand (operands[2], CCmode)
         || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
!                                       SImode, NON_PREFIXED_D))"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2)
          (compare:CC (match_dup 0) (match_dup 3)))]
***************
*** 146,162 ****
  
  ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
  ;; load mode is SI result mode is SI compare mode is CC extend is none
! (define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
                      (match_operand:SI 3 "const_m1_to_1_operand" "n")))
     (set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
    "(TARGET_P10_FUSION)"
!   "lwa%X1 %0,%1\;cmpdi %2,%0,%3"
    "&& reload_completed
     && (cc_reg_not_cr0_operand (operands[2], CCmode)
         || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
!                                       SImode, NON_PREFIXED_DS))"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2)
          (compare:CC (match_dup 0) (match_dup 3)))]
--- 146,162 ----
  
  ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
  ;; load mode is SI result mode is SI compare mode is CC extend is none
! (define_insn_and_split "*lwz_cmpwi_cr0_SI_SI_CC_none"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m")
                      (match_operand:SI 3 "const_m1_to_1_operand" "n")))
     (set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
    "(TARGET_P10_FUSION)"
!   "lwz%X1 %0,%1\;cmpwi %2,%0,%3"
    "&& reload_completed
     && (cc_reg_not_cr0_operand (operands[2], CCmode)
         || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
!                                       SImode, NON_PREFIXED_D))"
    [(set (match_dup 0) (match_dup 1))
     (set (match_dup 2)
          (compare:CC (match_dup 0) (match_dup 3)))]
***************
*** 190,196 ****
  ;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
  (define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
                      (match_operand:SI 3 "const_m1_to_1_operand" "n")))
     (set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
    "(TARGET_P10_FUSION)"
--- 190,196 ----
  ;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
  (define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
    [(set (match_operand:CC 2 "cc_reg_operand" "=x")
!         (compare:CC (match_operand:SI 1 "non_update_memory_operand" "YZ")
                      (match_operand:SI 3 "const_m1_to_1_operand" "n")))
     (set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
    "(TARGET_P10_FUSION)"
***************
*** 205,210 ****
--- 205,211 ----
    ""
    [(set_attr "type" "fused_load_cmpi")
     (set_attr "cost" "8")
+    (set_attr "sign_extend" "yes")
     (set_attr "length" "8")])
  
  ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/genfusion.pl gcc-12.4.0/gcc/config/rs6000/genfusion.pl
*** gcc-12.3.0/gcc/config/rs6000/genfusion.pl	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/genfusion.pl	Thu Jun 20 08:08:06 2024
*************** sub mode_to_ldst_char
*** 53,144 ****
      return '?';
  }
  
  sub gen_ld_cmpi_p10
  {
!     my ($lmode, $ldst, $clobbermode, $result, $cmpl, $echr, $constpred,
! 	$mempred, $ccmode, $np, $extend, $resultmode);
!   LMODE: foreach $lmode ('DI','SI','HI','QI') {
!       $ldst = mode_to_ldst_char($lmode);
!       $clobbermode = $lmode;
!       # For clobber, we need a SI/DI reg in case we
!       # split because we have to sign/zero extend.
!       if ($lmode eq 'HI' || $lmode eq 'QI') { $clobbermode = "GPR"; }
!     RESULT: foreach $result ('clobber', $lmode,  "EXT".$lmode) {
! 	# EXTDI does not exist, and we cannot directly produce HI/QI results.
! 	next RESULT if $result eq "EXTDI" || $result eq "HI" || $result eq "QI";
! 	# Don't allow EXTQI because that would allow HI result which we can't do.
! 	$result = "GPR" if $result eq "EXTQI";
!       CCMODE: foreach $ccmode ('CC','CCUNS') {
! 	  $np = "NON_PREFIXED_D";
! 	  $mempred = "non_update_memory_operand";
! 	  if ( $ccmode eq 'CC' ) {
! 	      next CCMODE if $lmode eq 'QI';
! 	      if ( $lmode eq 'DI' || $lmode eq 'SI' ) {
! 		  # ld and lwa are both DS-FORM.
! 		  $np = "NON_PREFIXED_DS";
! 		  $mempred = "ds_form_mem_operand";
! 	      }
! 	      $cmpl = "";
! 	      $echr = "a";
! 	      $constpred = "const_m1_to_1_operand";
! 	  } else {
! 	      if ( $lmode eq 'DI' ) {
! 		  # ld is DS-form, but lwz is not.
! 		  $np = "NON_PREFIXED_DS";
! 		  $mempred = "ds_form_mem_operand";
! 	      }
! 	      $cmpl = "l";
! 	      $echr = "z";
! 	      $constpred = "const_0_to_1_operand";
! 	  }
! 	  if ($lmode eq 'DI') { $echr = ""; }
! 	  if ($result =~ m/^EXT/ || $result eq 'GPR' || $clobbermode eq 'GPR') {
! 	      # We always need extension if result > lmode.
! 	      if ( $ccmode eq 'CC' ) {
! 		  $extend = "sign";
! 	      } else {
! 		  $extend = "zero";
! 	      }
! 	  } else {
! 	      # Result of SI/DI does not need sign extension.
! 	      $extend = "none";
! 	  }
! 	  print ";; load-cmpi fusion pattern generated by gen_ld_cmpi_p10\n";
! 	  print ";; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend\n";
  
! 	  print "(define_insn_and_split \"*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}\"\n";
! 	  print "  [(set (match_operand:${ccmode} 2 \"cc_reg_operand\" \"=x\")\n";
! 	  print "        (compare:${ccmode} (match_operand:${lmode} 1 \"${mempred}\" \"m\")\n";
! 	  if ($ccmode eq 'CCUNS') { print "   "; }
! 	  print "                    (match_operand:${lmode} 3 \"${constpred}\" \"n\")))\n";
! 	  if ($result eq 'clobber') {
! 	      print "   (clobber (match_scratch:${clobbermode} 0 \"=r\"))]\n";
! 	  } elsif ($result eq $lmode) {
! 	      print "   (set (match_operand:${result} 0 \"gpc_reg_operand\" \"=r\") (match_dup 1))]\n";
! 	  } else {
! 	      print "   (set (match_operand:${result} 0 \"gpc_reg_operand\" \"=r\") (${extend}_extend:${result} (match_dup 1)))]\n";
! 	  }
! 	  print "  \"(TARGET_P10_FUSION)\"\n";
! 	  print "  \"l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}di %2,%0,%3\"\n";
! 	  print "  \"&& reload_completed\n";
! 	  print "   && (cc_reg_not_cr0_operand (operands[2], CCmode)\n";
! 	  print "       || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),\n";
! 	  print "                                      ${lmode}mode, ${np}))\"\n";
  
! 	  if ($extend eq "none") {
! 	      print "  [(set (match_dup 0) (match_dup 1))\n";
! 	  } else {
! 	      $resultmode = $result;
! 	      if ( $result eq 'clobber' ) { $resultmode = $clobbermode }
! 	      print "  [(set (match_dup 0) (${extend}_extend:${resultmode} (match_dup 1)))\n";
! 	  }
! 	  print "   (set (match_dup 2)\n";
! 	  print "        (compare:${ccmode} (match_dup 0) (match_dup 3)))]\n";
! 	  print "  \"\"\n";
! 	  print "  [(set_attr \"type\" \"fused_load_cmpi\")\n";
! 	  print "   (set_attr \"cost\" \"8\")\n";
! 	  print "   (set_attr \"length\" \"8\")])\n";
! 	  print "\n";
        }
      }
    }
--- 53,188 ----
      return '?';
  }
  
+ sub gen_ld_cmpi_p10_one
+ {
+   my ($lmode, $result, $ccmode) = @_;
+ 
+   my $np = "NON_PREFIXED_D";
+   my $mempred = "non_update_memory_operand";
+   my $extend;
+ 
+   # We need to special case lwa.  The prefixed_load_p function in rs6000.cc
+   # (which determines if a load instruction is prefixed) uses the fact that the
+   # register mode is different from the memory mode, and that the sign_extend
+   # attribute is set to use DS-form rules for the address instead of D-form.
+   # If the register size is the same, prefixed_load_p assumes we are doing a
+   # lwz.  We change to use an lwz and word compare if we don't need to sign
+   # extend the SImode value.  Otherwise if we need the value, we need to
+   # make sure the insn is marked as ds-form.
+   my $cmp_size_char = ($lmode eq "SI"
+ 		       && $ccmode eq "CC"
+ 		       && $result !~ /^EXT|^DI$/) ? "w" : "d";
+ 
+   if ($ccmode eq "CC") {
+     # ld and lwa are both DS-FORM.
+     ($lmode eq "DI") and $np = "NON_PREFIXED_DS";
+     ($lmode eq "SI" && $cmp_size_char eq "d") and $np = "NON_PREFIXED_DS";
+   } else {
+     if ($lmode eq "DI") {
+       # ld is DS-form, but lwz is not.
+       $np = "NON_PREFIXED_DS";
+     }
+   }
+ 
+   my $cmpl = ($ccmode eq "CC") ? "" : "l";
+   my $echr = ($ccmode eq "CC" && $cmp_size_char eq "d") ? "a" : "z";
+   if ($lmode eq "DI") { $echr = ""; }
+   my $constpred = ($ccmode eq "CC") ? "const_m1_to_1_operand"
+   				    : "const_0_to_1_operand";
+ 
+   # For clobber, we need a SI/DI reg in case we
+   # split because we have to sign/zero extend.
+   my $clobbermode = ($lmode =~ /^[QH]I$/) ? "GPR" : $lmode;
+   if ($result =~ /^EXT/ || $result eq "GPR" || $clobbermode eq "GPR") {
+     # We always need extension if result > lmode.
+     $extend = ($ccmode eq "CC") ? "sign" : "zero";
+   } else {
+     # Result of SI/DI does not need sign extension.
+     $extend = "none";
+   }
+ 
+   my $ldst = mode_to_ldst_char($lmode);
+ 
+   # DS-form addresses need YZ, and not m.
+   my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
+   print <>= BITS_PER_UNIT;
+       if (byte0 != (eval & 0xff))
+ 	return false;
+     }
+ 
+   return true;
+ })
+ 
  ;; Return 1 if operand is a vector int register or is either a vector constant
  ;; of all 0 bits of a vector constant of all 1 bits.
  (define_predicate "vector_int_reg_or_same_bit"
***************
*** 876,882 ****
  (define_predicate "vsx_quad_dform_memory_operand"
    (match_code "mem")
  {
!   if (!TARGET_P9_VECTOR || !MEM_P (op) || GET_MODE_SIZE (mode) != 16)
      return false;
  
    return quad_address_p (XEXP (op, 0), mode, false);
--- 913,919 ----
  (define_predicate "vsx_quad_dform_memory_operand"
    (match_code "mem")
  {
!   if (!TARGET_P9_VECTOR)
      return false;
  
    return quad_address_p (XEXP (op, 0), mode, false);
***************
*** 1088,1107 ****
    return INTVAL (offset) % 4 == 0;
  })
  
- ;; Return 1 if the operand is a memory operand that has a valid address for
- ;; a DS-form instruction. I.e. the address has to be either just a register,
- ;; or register + const where the two low order bits of const are zero.
- (define_predicate "ds_form_mem_operand"
-   (match_code "subreg,mem")
- {
-   if (!any_memory_operand (op, mode))
-     return false;
- 
-   rtx addr = XEXP (op, 0);
- 
-   return address_to_insn_form (addr, mode, NON_PREFIXED_DS) == INSN_FORM_DS;
- })
- 
  ;; Return 1 if the operand, used inside a MEM, is a SYMBOL_REF.
  (define_predicate "symbol_ref_operand"
    (and (match_code "symbol_ref")
--- 1125,1130 ----
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000-builtin.cc gcc-12.4.0/gcc/config/rs6000/rs6000-builtin.cc
*** gcc-12.3.0/gcc/config/rs6000/rs6000-builtin.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000-builtin.cc	Thu Jun 20 08:08:06 2024
*************** rs6000_builtin_is_supported (enum rs6000
*** 168,174 ****
      case ENB_P7_64:
        return TARGET_POPCNTD && TARGET_POWERPC64;
      case ENB_P8:
!       return TARGET_DIRECT_MOVE;
      case ENB_P8V:
        return TARGET_P8_VECTOR;
      case ENB_P9:
--- 168,174 ----
      case ENB_P7_64:
        return TARGET_POPCNTD && TARGET_POWERPC64;
      case ENB_P8:
!       return TARGET_POWER8;
      case ENB_P8V:
        return TARGET_P8_VECTOR;
      case ENB_P9:
*************** rs6000_init_builtins (void)
*** 869,875 ****
  	    continue;
  	  if (e == ENB_MMA && !TARGET_MMA)
  	    continue;
! 	  tree fntype = rs6000_builtin_info[i].fntype;
  	  tree t = TREE_TYPE (fntype);
  	  fprintf (stderr, "%s %s (", rs6000_type_string (t),
  		   rs6000_builtin_info[i].bifname);
--- 869,875 ----
  	    continue;
  	  if (e == ENB_MMA && !TARGET_MMA)
  	    continue;
! 	  tree fntype = rs6000_builtin_info_fntype[i];
  	  tree t = TREE_TYPE (fntype);
  	  fprintf (stderr, "%s %s (", rs6000_type_string (t),
  		   rs6000_builtin_info[i].bifname);
*************** rs6000_gimple_fold_builtin (gimple_stmt_
*** 1920,1926 ****
  	tree lhs_type = TREE_TYPE (lhs);
  	/* In GIMPLE the type of the MEM_REF specifies the alignment.  The
  	  required alignment (power) is 4 bytes regardless of data type.  */
! 	tree align_ltype = build_aligned_type (lhs_type, 4);
  	/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'.  Create
  	   the tree using the value from arg0.  The resulting type will match
  	   the type of arg1.  */
--- 1920,1926 ----
  	tree lhs_type = TREE_TYPE (lhs);
  	/* In GIMPLE the type of the MEM_REF specifies the alignment.  The
  	  required alignment (power) is 4 bytes regardless of data type.  */
! 	tree align_ltype = build_aligned_type (lhs_type, 32);
  	/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'.  Create
  	   the tree using the value from arg0.  The resulting type will match
  	   the type of arg1.  */
*************** rs6000_gimple_fold_builtin (gimple_stmt_
*** 1964,1970 ****
  	tree arg2_type = ptr_type_node;
  	/* In GIMPLE the type of the MEM_REF specifies the alignment.  The
  	   required alignment (power) is 4 bytes regardless of data type.  */
! 	tree align_stype = build_aligned_type (arg0_type, 4);
  	/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'.  Create
  	   the tree using the value from arg1.  */
  	gimple_seq stmts = NULL;
--- 1964,1970 ----
  	tree arg2_type = ptr_type_node;
  	/* In GIMPLE the type of the MEM_REF specifies the alignment.  The
  	   required alignment (power) is 4 bytes regardless of data type.  */
! 	tree align_stype = build_aligned_type (arg0_type, 32);
  	/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'.  Create
  	   the tree using the value from arg1.  */
  	gimple_seq stmts = NULL;
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000-builtins.def gcc-12.4.0/gcc/config/rs6000/rs6000-builtins.def
*** gcc-12.3.0/gcc/config/rs6000/rs6000-builtins.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000-builtins.def	Thu Jun 20 08:08:06 2024
***************
*** 2008,2013 ****
--- 2008,2020 ----
    const vsll __builtin_vsx_xxspltd_2di (vsll, const int<1>);
      XXSPLTD_V2DI vsx_xxspltd_v2di {}
  
+   const vsq __builtin_pack_vector_int128 (unsigned long long, \
+                                           unsigned long long);
+     PACK_V1TI packv1ti {}
+ 
+   const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>);
+     UNPACK_V1TI unpackv1ti {}
+ 
  
  ; Power7 builtins (ISA 2.06).
  [power7]
***************
*** 2029,2044 ****
    const unsigned int __builtin_divweu (unsigned int, unsigned int);
      DIVWEU diveu_si {}
  
-   const vsq __builtin_pack_vector_int128 (unsigned long long, \
-                                           unsigned long long);
-     PACK_V1TI packv1ti {}
- 
    void __builtin_ppc_speculation_barrier ();
      SPECBARR speculation_barrier {}
  
-   const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>);
-     UNPACK_V1TI unpackv1ti {}
- 
  
  ; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
  [power7-64]
--- 2036,2044 ----
***************
*** 2796,2801 ****
--- 2796,2814 ----
    const vsi __builtin_vsx_xxbrw_v4si (vsi);
      XXBRW_V4SI p9_xxbrw_v4si {}
  
+   const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
+     VSCEQPEQ xscmpexpqp_eq_kf {}
+ 
+   const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128);
+     VSCEQPGT xscmpexpqp_gt_kf {}
+ 
+   const signed int __builtin_vsx_scalar_cmp_exp_qp_lt (_Float128, _Float128);
+     VSCEQPLT xscmpexpqp_lt_kf {}
+ 
+   const signed int \
+       __builtin_vsx_scalar_cmp_exp_qp_unordered (_Float128, _Float128);
+     VSCEQPUO xscmpexpqp_unordered_kf {}
+ 
  
  ; Miscellaneous P9 functions
  [power9]
***************
*** 2878,2896 ****
    fpmath _Float128 __builtin_mulf128_round_to_odd (_Float128, _Float128);
      MULF128_ODD mulkf3_odd {}
  
-   const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
-     VSCEQPEQ xscmpexpqp_eq_kf {}
- 
-   const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128);
-     VSCEQPGT xscmpexpqp_gt_kf {}
- 
-   const signed int __builtin_vsx_scalar_cmp_exp_qp_lt (_Float128, _Float128);
-     VSCEQPLT xscmpexpqp_lt_kf {}
- 
-   const signed int \
-       __builtin_vsx_scalar_cmp_exp_qp_unordered (_Float128, _Float128);
-     VSCEQPUO xscmpexpqp_unordered_kf {}
- 
    fpmath _Float128 __builtin_sqrtf128_round_to_odd (_Float128);
      SQRTF128_ODD sqrtkf2_odd {}
  
--- 2891,2896 ----
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000-c.cc gcc-12.4.0/gcc/config/rs6000/rs6000-c.cc
*** gcc-12.3.0/gcc/config/rs6000/rs6000-c.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000-c.cc	Thu Jun 20 08:08:06 2024
*************** rs6000_target_modify_macros (bool define
*** 432,450 ****
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6");
    if ((flags & OPTION_MASK_POPCNTD) != 0)
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");
!   /* Note that the OPTION_MASK_DIRECT_MOVE flag is automatically
!      turned on in the following condition:
!      1. TARGET_P8_VECTOR is enabled and OPTION_MASK_DIRECT_MOVE is not
!         explicitly disabled.
!         Hereafter, the OPTION_MASK_DIRECT_MOVE flag is considered to
!         have been turned on explicitly.
!      Note that the OPTION_MASK_DIRECT_MOVE flag is automatically
!      turned off in any of the following conditions:
!      1. TARGET_HARD_FLOAT, TARGET_ALTIVEC, or TARGET_VSX is explicitly
! 	disabled and OPTION_MASK_DIRECT_MOVE was not explicitly
! 	enabled.
!      2. TARGET_VSX is off.  */
!   if ((flags & OPTION_MASK_DIRECT_MOVE) != 0)
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8");
    if ((flags & OPTION_MASK_MODULO) != 0)
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
--- 432,438 ----
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6");
    if ((flags & OPTION_MASK_POPCNTD) != 0)
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");
!   if ((flags & OPTION_MASK_POWER8) != 0)
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8");
    if ((flags & OPTION_MASK_MODULO) != 0)
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
*************** resolve_vec_step (resolution *res, vecbifid != instance_code)
!     *instance = (*instance)->next;
  
!   ovlddata *inst = *instance;
!   gcc_assert (inst != NULL);
    /* It is possible for an instance to require a data type that isn't
!      defined on this target, in which case inst->fntype will be NULL.  */
!   if (!inst->fntype)
      return error_mark_node;
!   tree fntype = rs6000_builtin_info[inst->bifid].fntype;
    tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype));
    tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype)));
  
    if (rs6000_builtin_type_compatible (types[0], parmtype0)
        && rs6000_builtin_type_compatible (types[1], parmtype1))
      {
!       if (rs6000_builtin_decl (inst->bifid, false) != error_mark_node
! 	  && rs6000_builtin_is_supported (inst->bifid))
  	{
! 	  tree ret_type = TREE_TYPE (inst->fntype);
  	  return altivec_build_resolved_builtin (args, 2, fntype, ret_type,
! 						 inst->bifid, fcode);
  	}
        else
  	*unsupported_builtin = true;
--- 1663,1699 ----
     UNSUPPORTED_BUILTIN to true.  If we don't match, return error_mark_node
     and leave UNSUPPORTED_BUILTIN alone.  */
  
! static tree
! find_instance (bool *unsupported_builtin, int *instance,
  	       rs6000_gen_builtins instance_code,
  	       rs6000_gen_builtins fcode,
  	       tree *types, tree *args)
  {
!   while (*instance != -1
! 	 && rs6000_instance_info[*instance].bifid != instance_code)
!     *instance = rs6000_instance_info[*instance].next;
  
!   int inst = *instance;
!   gcc_assert (inst != -1);
    /* It is possible for an instance to require a data type that isn't
!      defined on this target, in which case rs6000_instance_info_fntype[inst]
!      will be NULL.  */
!   if (!rs6000_instance_info_fntype[inst])
      return error_mark_node;
!   rs6000_gen_builtins bifid = rs6000_instance_info[inst].bifid;
!   tree fntype = rs6000_builtin_info_fntype[bifid];
    tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype));
    tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype)));
  
    if (rs6000_builtin_type_compatible (types[0], parmtype0)
        && rs6000_builtin_type_compatible (types[1], parmtype1))
      {
!       if (rs6000_builtin_decl (bifid, false) != error_mark_node
! 	  && rs6000_builtin_is_supported (bifid))
  	{
! 	  tree ret_type = TREE_TYPE (rs6000_instance_info_fntype[inst]);
  	  return altivec_build_resolved_builtin (args, 2, fntype, ret_type,
! 						 bifid, fcode);
  	}
        else
  	*unsupported_builtin = true;
*************** altivec_resolve_overloaded_builtin (loca
*** 1885,1895 ****
    bool unsupported_builtin = false;
    rs6000_gen_builtins instance_code;
    bool supported = false;
!   ovlddata *instance = rs6000_overload_info[adj_fcode].first_instance;
!   gcc_assert (instance != NULL);
  
    /* Functions with no arguments can have only one overloaded instance.  */
!   gcc_assert (nargs > 0 || !instance->next);
  
    /* Standard overload processing involves determining whether an instance
       exists that is type-compatible with the overloaded function call.  In
--- 1876,1886 ----
    bool unsupported_builtin = false;
    rs6000_gen_builtins instance_code;
    bool supported = false;
!   int instance = rs6000_overload_info[adj_fcode].first_instance;
!   gcc_assert (instance != -1);
  
    /* Functions with no arguments can have only one overloaded instance.  */
!   gcc_assert (nargs > 0 || rs6000_instance_info[instance].next == -1);
  
    /* Standard overload processing involves determining whether an instance
       exists that is type-compatible with the overloaded function call.  In
*************** altivec_resolve_overloaded_builtin (loca
*** 1963,1978 ****
        /* Standard overload processing.  Look for an instance with compatible
  	 parameter types.  If it is supported in the current context, resolve
  	 the overloaded call to that instance.  */
!       for (; instance != NULL; instance = instance->next)
  	{
  	  /* It is possible for an instance to require a data type that isn't
! 	     defined on this target, in which case instance->fntype will be
  	     NULL.  */
! 	  if (!instance->fntype)
  	    continue;
  
  	  bool mismatch = false;
! 	  tree nextparm = TYPE_ARG_TYPES (instance->fntype);
  
  	  for (unsigned int arg_i = 0;
  	       arg_i < nargs && nextparm != NULL;
--- 1954,1971 ----
        /* Standard overload processing.  Look for an instance with compatible
  	 parameter types.  If it is supported in the current context, resolve
  	 the overloaded call to that instance.  */
!       for (; instance != -1; instance = rs6000_instance_info[instance].next)
  	{
+ 	  tree fntype = rs6000_instance_info_fntype[instance];
+ 	  rs6000_gen_builtins bifid = rs6000_instance_info[instance].bifid;
  	  /* It is possible for an instance to require a data type that isn't
! 	     defined on this target, in which case fntype will be
  	     NULL.  */
! 	  if (!fntype)
  	    continue;
  
  	  bool mismatch = false;
! 	  tree nextparm = TYPE_ARG_TYPES (fntype);
  
  	  for (unsigned int arg_i = 0;
  	       arg_i < nargs && nextparm != NULL;
*************** altivec_resolve_overloaded_builtin (loca
*** 1990,2004 ****
  	  if (mismatch)
  	    continue;
  
! 	  supported = rs6000_builtin_is_supported (instance->bifid);
! 	  if (rs6000_builtin_decl (instance->bifid, false) != error_mark_node
  	      && supported)
  	    {
! 	      tree fntype = rs6000_builtin_info[instance->bifid].fntype;
! 	      tree ret_type = TREE_TYPE (instance->fntype);
  	      return altivec_build_resolved_builtin (args, nargs, fntype,
! 						     ret_type, instance->bifid,
! 						     fcode);
  	    }
  	  else
  	    {
--- 1983,1996 ----
  	  if (mismatch)
  	    continue;
  
! 	  supported = rs6000_builtin_is_supported (bifid);
! 	  if (rs6000_builtin_decl (bifid, false) != error_mark_node
  	      && supported)
  	    {
! 	      tree ret_type = TREE_TYPE (fntype);
! 	      fntype = rs6000_builtin_info_fntype[bifid];
  	      return altivec_build_resolved_builtin (args, nargs, fntype,
! 						     ret_type, bifid, fcode);
  	    }
  	  else
  	    {
*************** altivec_resolve_overloaded_builtin (loca
*** 2015,2026 ****
  	{
  	  /* Indicate that the instantiation of the overloaded builtin
  	     name is not available with the target flags in effect.  */
! 	  rs6000_gen_builtins fcode = (rs6000_gen_builtins) instance->bifid;
  	  rs6000_invalid_builtin (fcode);
  	  /* Provide clarity of the relationship between the overload
  	     and the instantiation.  */
! 	  const char *internal_name
! 	    = rs6000_builtin_info[instance->bifid].bifname;
  	  rich_location richloc (line_table, input_location);
  	  inform (&richloc,
  		  "overloaded builtin %qs is implemented by builtin %qs",
--- 2007,2018 ----
  	{
  	  /* Indicate that the instantiation of the overloaded builtin
  	     name is not available with the target flags in effect.  */
! 	  rs6000_gen_builtins bifid = rs6000_instance_info[instance].bifid;
! 	  rs6000_gen_builtins fcode = (rs6000_gen_builtins) bifid;
  	  rs6000_invalid_builtin (fcode);
  	  /* Provide clarity of the relationship between the overload
  	     and the instantiation.  */
! 	  const char *internal_name = rs6000_builtin_info[bifid].bifname;
  	  rich_location richloc (line_table, input_location);
  	  inform (&richloc,
  		  "overloaded builtin %qs is implemented by builtin %qs",
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000-cpus.def gcc-12.4.0/gcc/config/rs6000/rs6000-cpus.def
*** gcc-12.3.0/gcc/config/rs6000/rs6000-cpus.def	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000-cpus.def	Thu Jun 20 08:08:06 2024
***************
*** 47,55 ****
     fusion here, instead set it in rs6000.cc if we are tuning for a power8
     system.  */
  #define ISA_2_7_MASKS_SERVER	(ISA_2_6_MASKS_SERVER			\
  				 | OPTION_MASK_P8_VECTOR		\
  				 | OPTION_MASK_CRYPTO			\
- 				 | OPTION_MASK_DIRECT_MOVE		\
  				 | OPTION_MASK_EFFICIENT_UNALIGNED_VSX	\
  				 | OPTION_MASK_QUAD_MEMORY		\
  				 | OPTION_MASK_QUAD_MEMORY_ATOMIC)
--- 47,55 ----
     fusion here, instead set it in rs6000.cc if we are tuning for a power8
     system.  */
  #define ISA_2_7_MASKS_SERVER	(ISA_2_6_MASKS_SERVER			\
+ 				 | OPTION_MASK_POWER8			\
  				 | OPTION_MASK_P8_VECTOR		\
  				 | OPTION_MASK_CRYPTO			\
  				 | OPTION_MASK_EFFICIENT_UNALIGNED_VSX	\
  				 | OPTION_MASK_QUAD_MEMORY		\
  				 | OPTION_MASK_QUAD_MEMORY_ATOMIC)
***************
*** 94,100 ****
  /* Flags that need to be turned off if -mno-power8-vector.  */
  #define OTHER_P8_VECTOR_MASKS	(OTHER_P9_VECTOR_MASKS			\
  				 | OPTION_MASK_P9_VECTOR		\
- 				 | OPTION_MASK_DIRECT_MOVE		\
  				 | OPTION_MASK_CRYPTO)
  
  /* Flags that need to be turned off if -mno-vsx.  */
--- 94,99 ----
***************
*** 125,131 ****
  				 | OPTION_MASK_CMPB			\
  				 | OPTION_MASK_CRYPTO			\
  				 | OPTION_MASK_DFP			\
- 				 | OPTION_MASK_DIRECT_MOVE		\
  				 | OPTION_MASK_DLMZB			\
  				 | OPTION_MASK_EFFICIENT_UNALIGNED_VSX	\
  				 | OPTION_MASK_FLOAT128_HW		\
--- 124,129 ----
***************
*** 140,145 ****
--- 138,144 ----
  				 | OPTION_MASK_MODULO			\
  				 | OPTION_MASK_MULHW			\
  				 | OPTION_MASK_NO_UPDATE		\
+ 				 | OPTION_MASK_POWER8			\
  				 | OPTION_MASK_P8_FUSION		\
  				 | OPTION_MASK_P8_VECTOR		\
  				 | OPTION_MASK_P9_MINMAX		\
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000-gen-builtins.cc gcc-12.4.0/gcc/config/rs6000/rs6000-gen-builtins.cc
*** gcc-12.3.0/gcc/config/rs6000/rs6000-gen-builtins.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000-gen-builtins.cc	Thu Jun 20 08:08:06 2024
*************** write_decls (void)
*** 2261,2280 ****
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "#define PPC_MAXRESTROPNDS 3\n");
!   fprintf (header_file, "struct GTY(()) bifdata\n");
    fprintf (header_file, "{\n");
!   fprintf (header_file, "  const char *GTY((skip(\"\"))) bifname;\n");
!   fprintf (header_file, "  bif_enable GTY((skip(\"\"))) enable;\n");
!   fprintf (header_file, "  tree fntype;\n");
!   fprintf (header_file, "  insn_code GTY((skip(\"\"))) icode;\n");
!   fprintf (header_file, "  int  nargs;\n");
!   fprintf (header_file, "  int  bifattrs;\n");
!   fprintf (header_file, "  int  restr_opnd[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  restriction GTY((skip(\"\"))) restr[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  int  restr_val1[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  int  restr_val2[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  const char *GTY((skip(\"\"))) attr_string;\n");
!   fprintf (header_file, "  rs6000_gen_builtins GTY((skip(\"\"))) assoc_bif;\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "#define bif_init_bit\t\t(0x00000001)\n");
--- 2261,2279 ----
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "#define PPC_MAXRESTROPNDS 3\n");
!   fprintf (header_file, "struct bifdata\n");
    fprintf (header_file, "{\n");
!   fprintf (header_file, "  const char *bifname;\n");
!   fprintf (header_file, "  bif_enable enable;\n");
!   fprintf (header_file, "  insn_code icode;\n");
!   fprintf (header_file, "  int nargs;\n");
!   fprintf (header_file, "  int bifattrs;\n");
!   fprintf (header_file, "  int restr_opnd[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  restriction restr[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  int restr_val1[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  int restr_val2[PPC_MAXRESTROPNDS];\n");
!   fprintf (header_file, "  const char *attr_string;\n");
!   fprintf (header_file, "  rs6000_gen_builtins assoc_bif;\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "#define bif_init_bit\t\t(0x00000001)\n");
*************** write_decls (void)
*** 2353,2376 ****
    fprintf (header_file, "\n");
  
    fprintf (header_file,
! 	   "extern GTY(()) bifdata rs6000_builtin_info[RS6000_BIF_MAX];\n\n");
  
!   fprintf (header_file, "struct GTY(()) ovlddata\n");
    fprintf (header_file, "{\n");
!   fprintf (header_file, "  const char *GTY((skip(\"\"))) bifname;\n");
!   fprintf (header_file, "  rs6000_gen_builtins GTY((skip(\"\"))) bifid;\n");
!   fprintf (header_file, "  tree fntype;\n");
!   fprintf (header_file, "  ovlddata *GTY((skip(\"\"))) next;\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "struct ovldrecord\n");
    fprintf (header_file, "{\n");
    fprintf (header_file, "  const char *ovld_name;\n");
!   fprintf (header_file, "  ovlddata *first_instance;\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file,
! 	   "extern GTY(()) ovlddata rs6000_instance_info[RS6000_INST_MAX];\n");
    fprintf (header_file, "extern ovldrecord rs6000_overload_info[];\n\n");
  
    fprintf (header_file, "extern void rs6000_init_generated_builtins ();\n\n");
--- 2352,2379 ----
    fprintf (header_file, "\n");
  
    fprintf (header_file,
! 	   "extern bifdata rs6000_builtin_info[RS6000_BIF_MAX];\n\n");
  
!   fprintf (header_file,
! 	   "extern GTY(()) tree rs6000_builtin_info_fntype[RS6000_BIF_MAX];\n\n");
! 
!   fprintf (header_file, "struct ovlddata\n");
    fprintf (header_file, "{\n");
!   fprintf (header_file, "  const char *bifname;\n");
!   fprintf (header_file, "  rs6000_gen_builtins bifid;\n");
!   fprintf (header_file, "  int next;\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "struct ovldrecord\n");
    fprintf (header_file, "{\n");
    fprintf (header_file, "  const char *ovld_name;\n");
!   fprintf (header_file, "  int first_instance;\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file,
! 	   "extern ovlddata rs6000_instance_info[RS6000_INST_MAX];\n");
!   fprintf (header_file, "extern GTY(()) tree "
! 	   "rs6000_instance_info_fntype[RS6000_INST_MAX];\n");
    fprintf (header_file, "extern ovldrecord rs6000_overload_info[];\n\n");
  
    fprintf (header_file, "extern void rs6000_init_generated_builtins ();\n\n");
*************** write_bif_static_init (void)
*** 2481,2487 ****
    fprintf (init_file, "bifdata rs6000_builtin_info[RS6000_BIF_MAX] =\n");
    fprintf (init_file, "  {\n");
    fprintf (init_file, "    { /* RS6000_BIF_NONE: */\n");
!   fprintf (init_file, "      \"\", ENB_ALWAYS, 0, CODE_FOR_nothing, 0,\n");
    fprintf (init_file, "      0, {0, 0, 0}, {RES_NONE, RES_NONE, RES_NONE},\n");
    fprintf (init_file, "      {0, 0, 0}, {0, 0, 0}, \"\", RS6000_BIF_NONE\n");
    fprintf (init_file, "    },\n");
--- 2484,2490 ----
    fprintf (init_file, "bifdata rs6000_builtin_info[RS6000_BIF_MAX] =\n");
    fprintf (init_file, "  {\n");
    fprintf (init_file, "    { /* RS6000_BIF_NONE: */\n");
!   fprintf (init_file, "      \"\", ENB_ALWAYS, CODE_FOR_nothing, 0,\n");
    fprintf (init_file, "      0, {0, 0, 0}, {RES_NONE, RES_NONE, RES_NONE},\n");
    fprintf (init_file, "      {0, 0, 0}, {0, 0, 0}, \"\", RS6000_BIF_NONE\n");
    fprintf (init_file, "    },\n");
*************** write_bif_static_init (void)
*** 2493,2500 ****
  	       bifp->proto.bifname);
        fprintf (init_file, "      /* enable*/\t%s,\n",
  	       enable_string[bifp->stanza]);
-       /* Type must be instantiated at run time.  */
-       fprintf (init_file, "      /* fntype */\t0,\n");
        fprintf (init_file, "      /* icode */\tCODE_FOR_%s,\n",
  	       bifp->patname);
        fprintf (init_file, "      /* nargs */\t%d,\n",
--- 2496,2501 ----
*************** write_bif_static_init (void)
*** 2586,2591 ****
--- 2587,2594 ----
        fprintf (init_file, "    },\n");
      }
    fprintf (init_file, "  };\n\n");
+ 
+   fprintf (init_file, "tree rs6000_builtin_info_fntype[RS6000_BIF_MAX];\n\n");
  }
  
  /* Write the decls and initializers for rs6000_overload_info[] and
*************** write_ovld_static_init (void)
*** 2598,2604 ****
  	   "- RS6000_OVLD_NONE] =\n");
    fprintf (init_file, "  {\n");
    fprintf (init_file, "    { /* RS6000_OVLD_NONE: */\n");
!   fprintf (init_file, "      \"\", NULL\n");
    fprintf (init_file, "    },\n");
    for (int i = 0; i <= curr_ovld_stanza; i++)
      {
--- 2601,2607 ----
  	   "- RS6000_OVLD_NONE] =\n");
    fprintf (init_file, "  {\n");
    fprintf (init_file, "    { /* RS6000_OVLD_NONE: */\n");
!   fprintf (init_file, "      \"\", -1\n");
    fprintf (init_file, "    },\n");
    for (int i = 0; i <= curr_ovld_stanza; i++)
      {
*************** write_ovld_static_init (void)
*** 2607,2613 ****
        fprintf (init_file, "      /* ovld_name */\t\"%s\",\n",
  	       ovld_stanzas[i].intern_name);
        /* First-instance must currently be instantiated at run time.  */
!       fprintf (init_file, "      /* first_instance */\tNULL\n");
        fprintf (init_file, "    },\n");
      }
    fprintf (init_file, "  };\n\n");
--- 2610,2616 ----
        fprintf (init_file, "      /* ovld_name */\t\"%s\",\n",
  	       ovld_stanzas[i].intern_name);
        /* First-instance must currently be instantiated at run time.  */
!       fprintf (init_file, "      /* first_instance */\t-1\n");
        fprintf (init_file, "    },\n");
      }
    fprintf (init_file, "  };\n\n");
*************** write_ovld_static_init (void)
*** 2615,2621 ****
    fprintf (init_file, "ovlddata rs6000_instance_info[RS6000_INST_MAX] =\n");
    fprintf (init_file, "  {\n");
    fprintf (init_file, "    { /* RS6000_INST_NONE: */\n");
!   fprintf (init_file, "      \"\", RS6000_BIF_NONE, NULL_TREE, NULL\n");
    fprintf (init_file, "    },\n");
    for (int i = 0; i <= curr_ovld; i++)
      {
--- 2618,2624 ----
    fprintf (init_file, "ovlddata rs6000_instance_info[RS6000_INST_MAX] =\n");
    fprintf (init_file, "  {\n");
    fprintf (init_file, "    { /* RS6000_INST_NONE: */\n");
!   fprintf (init_file, "      \"\", RS6000_BIF_NONE, -1\n");
    fprintf (init_file, "    },\n");
    for (int i = 0; i <= curr_ovld; i++)
      {
*************** write_ovld_static_init (void)
*** 2625,2643 ****
  	       ovlds[i].proto.bifname);
        fprintf (init_file, "      /* bifid */\tRS6000_BIF_%s,\n",
  	       ovlds[i].bif_id_name);
-       /* Type must be instantiated at run time.  */
-       fprintf (init_file, "      /* fntype */\t0,\n");
        fprintf (init_file, "      /* next */\t");
        if (i < curr_ovld
  	  && !strcmp (ovlds[i+1].proto.bifname, ovlds[i].proto.bifname))
  	fprintf (init_file,
! 		 "&rs6000_instance_info[RS6000_INST_%s]\n",
  		 ovlds[i+1].ovld_id_name);
        else
! 	fprintf (init_file, "NULL\n");
        fprintf (init_file, "    },\n");
      }
    fprintf (init_file, "  };\n\n");
  }
  
  /* Write code to initialize the built-in function table.  */
--- 2628,2647 ----
  	       ovlds[i].proto.bifname);
        fprintf (init_file, "      /* bifid */\tRS6000_BIF_%s,\n",
  	       ovlds[i].bif_id_name);
        fprintf (init_file, "      /* next */\t");
        if (i < curr_ovld
  	  && !strcmp (ovlds[i+1].proto.bifname, ovlds[i].proto.bifname))
  	fprintf (init_file,
! 		 "RS6000_INST_%s\n",
  		 ovlds[i+1].ovld_id_name);
        else
! 	fprintf (init_file, "-1\n");
        fprintf (init_file, "    },\n");
      }
    fprintf (init_file, "  };\n\n");
+ 
+   fprintf (init_file,
+ 	   "tree rs6000_instance_info_fntype[RS6000_INST_MAX];\n\n");
  }
  
  /* Write code to initialize the built-in function table.  */
*************** write_init_bif_table (void)
*** 2647,2653 ****
    for (int i = 0; i <= curr_bif; i++)
      {
        fprintf (init_file,
! 	       "  rs6000_builtin_info[RS6000_BIF_%s].fntype"
  	       "\n    = %s;\n",
  	       bifs[i].idname, bifs[i].fndecl);
  
--- 2651,2657 ----
    for (int i = 0; i <= curr_bif; i++)
      {
        fprintf (init_file,
! 	       "  rs6000_builtin_info_fntype[RS6000_BIF_%s]"
  	       "\n    = %s;\n",
  	       bifs[i].idname, bifs[i].fndecl);
  
*************** write_init_ovld_table (void)
*** 2736,2742 ****
    for (int i = 0; i <= curr_ovld; i++)
      {
        fprintf (init_file,
! 	       "  rs6000_instance_info[RS6000_INST_%s].fntype"
  	       "\n    = %s;\n",
  	       ovlds[i].ovld_id_name, ovlds[i].fndecl);
  
--- 2740,2746 ----
    for (int i = 0; i <= curr_ovld; i++)
      {
        fprintf (init_file,
! 	       "  rs6000_instance_info_fntype[RS6000_INST_%s]"
  	       "\n    = %s;\n",
  	       ovlds[i].ovld_id_name, ovlds[i].fndecl);
  
*************** write_init_ovld_table (void)
*** 2793,2799 ****
  		   ".first_instance\n",
  		   stanza->stanza_id);
  	  fprintf (init_file,
! 		   "    = &rs6000_instance_info[RS6000_INST_%s];\n\n",
  		   ovlds[i].ovld_id_name);
  	}
      }
--- 2797,2803 ----
  		   ".first_instance\n",
  		   stanza->stanza_id);
  	  fprintf (init_file,
! 		   "    = RS6000_INST_%s;\n\n",
  		   ovlds[i].ovld_id_name);
  	}
      }
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000-string.cc gcc-12.4.0/gcc/config/rs6000/rs6000-string.cc
*** gcc-12.3.0/gcc/config/rs6000/rs6000-string.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000-string.cc	Thu Jun 20 08:08:06 2024
*************** expand_block_move (rtx operands[], bool
*** 2811,2821 ****
  	  gen_func.mov = gen_vsx_movv2di_64bit;
  	}
        else if (TARGET_BLOCK_OPS_UNALIGNED_VSX
! 	       && TARGET_POWER10 && bytes < 16
  	       && orig_bytes > 16
! 	       && !(bytes == 1 || bytes == 2
! 		    || bytes == 4 || bytes == 8)
! 	       && (align >= 128 || !STRICT_ALIGNMENT))
  	{
  	  /* Only use lxvl/stxvl if it could replace multiple ordinary
  	     loads+stores.  Also don't use it unless we likely already
--- 2811,2827 ----
  	  gen_func.mov = gen_vsx_movv2di_64bit;
  	}
        else if (TARGET_BLOCK_OPS_UNALIGNED_VSX
! 	       /* Only use lxvl/stxvl on 64bit POWER10.  */
! 	       && TARGET_POWER10
! 	       && TARGET_64BIT
! 	       && bytes < 16
  	       && orig_bytes > 16
! 	       && !(bytes == 1
! 		    || bytes == 2
! 		    || bytes == 4
! 		    || bytes == 8)
! 	       && (align >= 128
! 		   || !STRICT_ALIGNMENT))
  	{
  	  /* Only use lxvl/stxvl if it could replace multiple ordinary
  	     loads+stores.  Also don't use it unless we likely already
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000.cc gcc-12.4.0/gcc/config/rs6000/rs6000.cc
*** gcc-12.3.0/gcc/config/rs6000/rs6000.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000.cc	Thu Jun 20 08:08:06 2024
*************** rs6000_option_override_internal (bool gl
*** 3826,3836 ****
  		 "-mmultiple");
      }
  
!   /* If little-endian, default to -mstrict-align on older processors.
!      Testing for direct_move matches power8 and later.  */
    if (!BYTES_BIG_ENDIAN
        && !(processor_target_table[tune_index].target_enable
! 	   & OPTION_MASK_DIRECT_MOVE))
      rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN;
  
    /* Add some warnings for VSX.  */
--- 3826,3835 ----
  		 "-mmultiple");
      }
  
!   /* If little-endian, default to -mstrict-align on older processors.  */
    if (!BYTES_BIG_ENDIAN
        && !(processor_target_table[tune_index].target_enable
! 	   & OPTION_MASK_POWER8))
      rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN;
  
    /* Add some warnings for VSX.  */
*************** rs6000_option_override_internal (bool gl
*** 3872,3879 ****
        && (rs6000_isa_flags_explicit & (OPTION_MASK_SOFT_FLOAT
  				       | OPTION_MASK_ALTIVEC
  				       | OPTION_MASK_VSX)) != 0)
!     rs6000_isa_flags &= ~((OPTION_MASK_P8_VECTOR | OPTION_MASK_CRYPTO
! 			   | OPTION_MASK_DIRECT_MOVE)
  		         & ~rs6000_isa_flags_explicit);
  
    if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
--- 3871,3877 ----
        && (rs6000_isa_flags_explicit & (OPTION_MASK_SOFT_FLOAT
  				       | OPTION_MASK_ALTIVEC
  				       | OPTION_MASK_VSX)) != 0)
!     rs6000_isa_flags &= ~((OPTION_MASK_P8_VECTOR | OPTION_MASK_CRYPTO)
  		         & ~rs6000_isa_flags_explicit);
  
    if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
*************** rs6000_option_override_internal (bool gl
*** 3917,3923 ****
        else
  	rs6000_isa_flags |= ISA_3_0_MASKS_SERVER;
      }
!   else if (TARGET_P8_VECTOR || TARGET_DIRECT_MOVE || TARGET_CRYPTO)
      rs6000_isa_flags |= (ISA_2_7_MASKS_SERVER & ~ignore_masks);
    else if (TARGET_VSX)
      rs6000_isa_flags |= (ISA_2_6_MASKS_SERVER & ~ignore_masks);
--- 3915,3921 ----
        else
  	rs6000_isa_flags |= ISA_3_0_MASKS_SERVER;
      }
!   else if (TARGET_P8_VECTOR || TARGET_POWER8 || TARGET_CRYPTO)
      rs6000_isa_flags |= (ISA_2_7_MASKS_SERVER & ~ignore_masks);
    else if (TARGET_VSX)
      rs6000_isa_flags |= (ISA_2_6_MASKS_SERVER & ~ignore_masks);
*************** rs6000_option_override_internal (bool gl
*** 3958,3970 ****
        rs6000_isa_flags &= ~OPTION_MASK_FPRND;
      }
  
-   if (TARGET_DIRECT_MOVE && !TARGET_VSX)
-     {
-       if (rs6000_isa_flags_explicit & OPTION_MASK_DIRECT_MOVE)
- 	error ("%qs requires %qs", "-mdirect-move", "-mvsx");
-       rs6000_isa_flags &= ~OPTION_MASK_DIRECT_MOVE;
-     }
- 
    if (TARGET_P8_VECTOR && !TARGET_ALTIVEC)
      {
        if (rs6000_isa_flags_explicit & OPTION_MASK_P8_VECTOR)
--- 3956,3961 ----
*************** darwin_rs6000_special_round_type_align (
*** 8128,8134 ****
        type = TREE_TYPE (type);
    } while (AGGREGATE_TYPE_P (type));
  
!   if (! AGGREGATE_TYPE_P (type) && type != error_mark_node)
      align = MAX (align, TYPE_ALIGN (type));
  
    return align;
--- 8119,8126 ----
        type = TREE_TYPE (type);
    } while (AGGREGATE_TYPE_P (type));
  
!   if (type != error_mark_node && ! AGGREGATE_TYPE_P (type)
!       && ! TYPE_PACKED (type) && maximum_field_alignment == 0)
      align = MAX (align, TYPE_ALIGN (type));
  
    return align;
*************** output_toc (FILE *file, rtx x, int label
*** 17116,17122 ****
        if (DECIMAL_FLOAT_MODE_P (GET_MODE (x)))
  	REAL_VALUE_TO_TARGET_DECIMAL128 (*CONST_DOUBLE_REAL_VALUE (x), k);
        else
! 	REAL_VALUE_TO_TARGET_LONG_DOUBLE (*CONST_DOUBLE_REAL_VALUE (x), k);
  
        if (TARGET_64BIT)
  	{
--- 17108,17114 ----
        if (DECIMAL_FLOAT_MODE_P (GET_MODE (x)))
  	REAL_VALUE_TO_TARGET_DECIMAL128 (*CONST_DOUBLE_REAL_VALUE (x), k);
        else
! 	real_to_target (k, CONST_DOUBLE_REAL_VALUE (x), GET_MODE (x));
  
        if (TARGET_64BIT)
  	{
*************** rs6000_rtx_costs (rtx x, machine_mode mo
*** 21906,21912 ****
  	    *total = rs6000_cost->divsi;
  	}
        /* Add in shift and subtract for MOD unless we have a mod instruction. */
!       if (!TARGET_MODULO && (code == MOD || code == UMOD))
  	*total += COSTS_N_INSNS (2);
        return false;
  
--- 21898,21906 ----
  	    *total = rs6000_cost->divsi;
  	}
        /* Add in shift and subtract for MOD unless we have a mod instruction. */
!       if ((!TARGET_MODULO
! 	   || (RS6000_DISABLE_SCALAR_MODULO && SCALAR_INT_MODE_P (mode)))
! 	 && (code == MOD || code == UMOD))
  	*total += COSTS_N_INSNS (2);
        return false;
  
*************** static struct rs6000_opt_mask const rs60
*** 23954,23960 ****
  								false, true  },
    { "cmpb",			OPTION_MASK_CMPB,		false, true  },
    { "crypto",			OPTION_MASK_CRYPTO,		false, true  },
!   { "direct-move",		OPTION_MASK_DIRECT_MOVE,	false, true  },
    { "dlmzb",			OPTION_MASK_DLMZB,		false, true  },
    { "efficient-unaligned-vsx",	OPTION_MASK_EFFICIENT_UNALIGNED_VSX,
  								false, true  },
--- 23948,23954 ----
  								false, true  },
    { "cmpb",			OPTION_MASK_CMPB,		false, true  },
    { "crypto",			OPTION_MASK_CRYPTO,		false, true  },
!   { "direct-move",		0,				false, true  },
    { "dlmzb",			OPTION_MASK_DLMZB,		false, true  },
    { "efficient-unaligned-vsx",	OPTION_MASK_EFFICIENT_UNALIGNED_VSX,
  								false, true  },
*************** rs6000_need_ipa_fn_target_info (const_tr
*** 25250,25264 ****
  static bool
  rs6000_update_ipa_fn_target_info (unsigned int &info, const gimple *stmt)
  {
    /* Assume inline asm can use any instruction features.  */
    if (gimple_code (stmt) == GIMPLE_ASM)
      {
!       /* Should set any bits we concerned, for now OPTION_MASK_HTM is
! 	 the only bit we care about.  */
!       info |= RS6000_FN_TARGET_INFO_HTM;
        return false;
      }
!   else if (gimple_code (stmt) == GIMPLE_CALL)
      {
        tree fndecl = gimple_call_fndecl (stmt);
        if (fndecl && fndecl_built_in_p (fndecl, BUILT_IN_MD))
--- 25244,25264 ----
  static bool
  rs6000_update_ipa_fn_target_info (unsigned int &info, const gimple *stmt)
  {
+ #ifndef HAVE_AS_POWER10_HTM
    /* Assume inline asm can use any instruction features.  */
    if (gimple_code (stmt) == GIMPLE_ASM)
      {
!       const char *asm_str = gimple_asm_string (as_a (stmt));
!       /* Ignore empty inline asm string.  */
!       if (strlen (asm_str) > 0)
! 	/* Should set any bits we concerned, for now OPTION_MASK_HTM is
! 	   the only bit we care about.  */
! 	info |= RS6000_FN_TARGET_INFO_HTM;
        return false;
      }
! #endif
! 
!   if (gimple_code (stmt) == GIMPLE_CALL)
      {
        tree fndecl = gimple_call_fndecl (stmt);
        if (fndecl && fndecl_built_in_p (fndecl, BUILT_IN_MD))
*************** rs6000_can_inline_p (tree caller, tree c
*** 25286,25334 ****
    tree caller_tree = DECL_FUNCTION_SPECIFIC_TARGET (caller);
    tree callee_tree = DECL_FUNCTION_SPECIFIC_TARGET (callee);
  
!   /* If the callee has no option attributes, then it is ok to inline.  */
    if (!callee_tree)
!     ret = true;
  
!   else
!     {
!       HOST_WIDE_INT caller_isa;
!       struct cl_target_option *callee_opts = TREE_TARGET_OPTION (callee_tree);
!       HOST_WIDE_INT callee_isa = callee_opts->x_rs6000_isa_flags;
!       HOST_WIDE_INT explicit_isa = callee_opts->x_rs6000_isa_flags_explicit;
  
!       /* If the caller has option attributes, then use them.
! 	 Otherwise, use the command line options.  */
!       if (caller_tree)
! 	caller_isa = TREE_TARGET_OPTION (caller_tree)->x_rs6000_isa_flags;
!       else
! 	caller_isa = rs6000_isa_flags;
  
!       cgraph_node *callee_node = cgraph_node::get (callee);
!       if (ipa_fn_summaries && ipa_fn_summaries->get (callee_node) != NULL)
  	{
! 	  unsigned int info = ipa_fn_summaries->get (callee_node)->target_info;
! 	  if ((info & RS6000_FN_TARGET_INFO_HTM) == 0)
! 	    {
! 	      callee_isa &= ~OPTION_MASK_HTM;
! 	      explicit_isa &= ~OPTION_MASK_HTM;
! 	    }
  	}
  
!       /* Ignore -mpower8-fusion and -mpower10-fusion options for inlining
! 	 purposes.  */
!       callee_isa &= ~(OPTION_MASK_P8_FUSION | OPTION_MASK_P10_FUSION);
!       explicit_isa &= ~(OPTION_MASK_P8_FUSION | OPTION_MASK_P10_FUSION);
  
!       /* The callee's options must be a subset of the caller's options, i.e.
! 	 a vsx function may inline an altivec function, but a no-vsx function
! 	 must not inline a vsx function.  However, for those options that the
! 	 callee has explicitly enabled or disabled, then we must enforce that
! 	 the callee's and caller's options match exactly; see PR70010.  */
!       if (((caller_isa & callee_isa) == callee_isa)
! 	  && (caller_isa & explicit_isa) == (callee_isa & explicit_isa))
! 	ret = true;
!     }
  
    if (TARGET_DEBUG_TARGET)
      fprintf (stderr, "rs6000_can_inline_p:, caller %s, callee %s, %s inline\n",
--- 25286,25329 ----
    tree caller_tree = DECL_FUNCTION_SPECIFIC_TARGET (caller);
    tree callee_tree = DECL_FUNCTION_SPECIFIC_TARGET (callee);
  
!   /* If the caller/callee has option attributes, then use them.
!      Otherwise, use the command line options.  */
    if (!callee_tree)
!     callee_tree = target_option_default_node;
!   if (!caller_tree)
!     caller_tree = target_option_default_node;
  
!   struct cl_target_option *callee_opts = TREE_TARGET_OPTION (callee_tree);
!   struct cl_target_option *caller_opts = TREE_TARGET_OPTION (caller_tree);
  
!   HOST_WIDE_INT callee_isa = callee_opts->x_rs6000_isa_flags;
!   HOST_WIDE_INT caller_isa = caller_opts->x_rs6000_isa_flags;
!   HOST_WIDE_INT explicit_isa = callee_opts->x_rs6000_isa_flags_explicit;
  
!   cgraph_node *callee_node = cgraph_node::get (callee);
!   if (ipa_fn_summaries && ipa_fn_summaries->get (callee_node) != NULL)
!     {
!       unsigned int info = ipa_fn_summaries->get (callee_node)->target_info;
!       if ((info & RS6000_FN_TARGET_INFO_HTM) == 0)
  	{
! 	  callee_isa &= ~OPTION_MASK_HTM;
! 	  explicit_isa &= ~OPTION_MASK_HTM;
  	}
+     }
  
!   /* Ignore -mpower8-fusion and -mpower10-fusion options for inlining
!      purposes.  */
!   callee_isa &= ~(OPTION_MASK_P8_FUSION | OPTION_MASK_P10_FUSION);
!   explicit_isa &= ~(OPTION_MASK_P8_FUSION | OPTION_MASK_P10_FUSION);
  
!   /* The callee's options must be a subset of the caller's options, i.e.
!      a vsx function may inline an altivec function, but a no-vsx function
!      must not inline a vsx function.  However, for those options that the
!      callee has explicitly enabled or disabled, then we must enforce that
!      the callee's and caller's options match exactly; see PR70010.  */
!   if (((caller_isa & callee_isa) == callee_isa)
!       && (caller_isa & explicit_isa) == (callee_isa & explicit_isa))
!     ret = true;
  
    if (TARGET_DEBUG_TARGET)
      fprintf (stderr, "rs6000_can_inline_p:, caller %s, callee %s, %s inline\n",
*************** vec_const_128bit_to_bytes (rtx op,
*** 28603,28609 ****
  
    info->all_words_same
      = (info->words[0] == info->words[1]
-        && info->words[0] == info->words[1]
         && info->words[0] == info->words[2]
         && info->words[0] == info->words[3]);
  
--- 28598,28603 ----
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000.h gcc-12.4.0/gcc/config/rs6000/rs6000.h
*** gcc-12.3.0/gcc/config/rs6000/rs6000.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000.h	Thu Jun 20 08:08:06 2024
*************** extern int rs6000_vector_align[];
*** 471,476 ****
--- 471,478 ----
  #define TARGET_EXTSWSLI	(TARGET_MODULO && TARGET_POWERPC64)
  #define TARGET_MADDLD	TARGET_MODULO
  
+ /* TARGET_DIRECT_MOVE is redundant to TARGET_P8_VECTOR, so alias it to that.  */
+ #define TARGET_DIRECT_MOVE	TARGET_P8_VECTOR
  #define TARGET_XSCVDPSPN	(TARGET_DIRECT_MOVE || TARGET_P8_VECTOR)
  #define TARGET_XSCVSPDPN	(TARGET_DIRECT_MOVE || TARGET_P8_VECTOR)
  #define TARGET_VADDUQM		(TARGET_P8_VECTOR && TARGET_POWERPC64)
*************** extern int rs6000_vector_align[];
*** 492,498 ****
     memory support.  */
  #define TARGET_SYNC_HI_QI	(TARGET_QUAD_MEMORY			\
  				 || TARGET_QUAD_MEMORY_ATOMIC		\
! 				 || TARGET_DIRECT_MOVE)
  
  #define TARGET_SYNC_TI		TARGET_QUAD_MEMORY_ATOMIC
  
--- 494,500 ----
     memory support.  */
  #define TARGET_SYNC_HI_QI	(TARGET_QUAD_MEMORY			\
  				 || TARGET_QUAD_MEMORY_ATOMIC		\
! 				 || TARGET_POWER8)
  
  #define TARGET_SYNC_TI		TARGET_QUAD_MEMORY_ATOMIC
  
*************** while (0)
*** 2632,2634 ****
--- 2634,2642 ----
         rs6000_asm_output_opcode (STREAM);				\
      }									\
    while (0)
+ 
+ /* Disable generation of scalar modulo instructions due to performance issues
+    with certain input values.  This can be removed in the future when the
+    issues have been resolved.  */
+ #define RS6000_DISABLE_SCALAR_MODULO 1
+ 
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000.md gcc-12.4.0/gcc/config/rs6000/rs6000.md
*** gcc-12.3.0/gcc/config/rs6000/rs6000.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000.md	Thu Jun 20 08:08:06 2024
***************
*** 287,293 ****
  ;; Whether this insn has a prefixed form and a non-prefixed form.
  (define_attr "maybe_prefixed" "no,yes"
    (if_then_else (eq_attr "type" "load,fpload,vecload,store,fpstore,vecstore,
!   				 integer,add")
  		(const_string "yes")
  		(const_string "no")))
  
--- 287,293 ----
  ;; Whether this insn has a prefixed form and a non-prefixed form.
  (define_attr "maybe_prefixed" "no,yes"
    (if_then_else (eq_attr "type" "load,fpload,vecload,store,fpstore,vecstore,
!   				 integer,add,fused_load_cmpi")
  		(const_string "yes")
  		(const_string "no")))
  
***************
*** 302,308 ****
  	      (eq_attr "maybe_prefixed" "no"))
  	 (const_string "no")
  
! 	 (eq_attr "type" "load,fpload,vecload")
  	 (if_then_else (match_test "prefixed_load_p (insn)")
  		       (const_string "yes")
  		       (const_string "no"))
--- 302,308 ----
  	      (eq_attr "maybe_prefixed" "no"))
  	 (const_string "no")
  
! 	 (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
  	 (if_then_else (match_test "prefixed_load_p (insn)")
  		       (const_string "yes")
  		       (const_string "no"))
***************
*** 354,360 ****
    (const (symbol_ref "(enum attr_cpu) rs6000_tune")))
  
  ;; The ISA we implement.
! (define_attr "isa" "any,p5,p6,p7,p7v,p8v,p9,p9v,p9kf,p9tf,p10"
    (const_string "any"))
  
  ;; Is this alternative enabled for the current CPU/ISA/etc.?
--- 354,360 ----
    (const (symbol_ref "(enum attr_cpu) rs6000_tune")))
  
  ;; The ISA we implement.
! (define_attr "isa" "any,p5,p6,p7,p7v,p8,p8v,p9,p9v,p9kf,p9tf,p10"
    (const_string "any"))
  
  ;; Is this alternative enabled for the current CPU/ISA/etc.?
***************
*** 379,384 ****
--- 379,388 ----
  	  (match_test "TARGET_VSX"))
       (const_int 1)
  
+      (and (eq_attr "isa" "p8")
+ 	  (match_test "TARGET_POWER8"))
+      (const_int 1)
+ 
       (and (eq_attr "isa" "p8v")
  	  (match_test "TARGET_P8_VECTOR"))
       (const_int 1)
***************
*** 3359,3364 ****
--- 3363,3379 ----
  	FAIL;
  
        operands[2] = force_reg (mode, operands[2]);
+ 
+       if (RS6000_DISABLE_SCALAR_MODULO)
+ 	{
+ 	  temp1 = gen_reg_rtx (mode);
+ 	  temp2 = gen_reg_rtx (mode);
+ 
+ 	  emit_insn (gen_div3 (temp1, operands[1], operands[2]));
+ 	  emit_insn (gen_mul3 (temp2, temp1, operands[2]));
+ 	  emit_insn (gen_sub3 (operands[0], operands[1], temp2));
+ 	  DONE;
+ 	}
      }
    else
      {
***************
*** 3378,3394 ****
    [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
          (mod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")
  		 (match_operand:GPR 2 "gpc_reg_operand" "r")))]
!   "TARGET_MODULO"
    "mods %0,%1,%2"
    [(set_attr "type" "div")
     (set_attr "size" "")])
  
  
! (define_insn "umod3"
    [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
          (umod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")
  		  (match_operand:GPR 2 "gpc_reg_operand" "r")))]
!   "TARGET_MODULO"
    "modu %0,%1,%2"
    [(set_attr "type" "div")
     (set_attr "size" "")])
--- 3393,3428 ----
    [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
          (mod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")
  		 (match_operand:GPR 2 "gpc_reg_operand" "r")))]
!   "TARGET_MODULO && !RS6000_DISABLE_SCALAR_MODULO"
    "mods %0,%1,%2"
    [(set_attr "type" "div")
     (set_attr "size" "")])
  
+ ;; This define_expand can be removed when RS6000_DISABLE_SCALAR_MODULO is
+ ;; removed.
+ (define_expand "umod3"
+   [(set (match_operand:GPR 0 "gpc_reg_operand")
+ 	(umod:GPR (match_operand:GPR 1 "gpc_reg_operand")
+ 		  (match_operand:GPR 2 "gpc_reg_operand")))]
+   "TARGET_MODULO"
+ {
+   if (RS6000_DISABLE_SCALAR_MODULO)
+     {
+       rtx temp1 = gen_reg_rtx (mode);
+       rtx temp2 = gen_reg_rtx (mode);
  
!       emit_insn (gen_udiv3 (temp1, operands[1], operands[2]));
!       emit_insn (gen_mul3 (temp2, temp1, operands[2]));
!       emit_insn (gen_sub3 (operands[0], operands[1], temp2));
!       DONE;
!     }
! })
! 
! (define_insn "*umod3"
    [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
          (umod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")
  		  (match_operand:GPR 2 "gpc_reg_operand" "r")))]
!   "TARGET_MODULO && !RS6000_DISABLE_SCALAR_MODULO"
    "modu %0,%1,%2"
    [(set_attr "type" "div")
     (set_attr "size" "")])
***************
*** 3445,3451 ****
    [(set (match_operand:TI 0 "altivec_register_operand" "=v")
  	(umod:TI (match_operand:TI 1 "altivec_register_operand" "v")
  		 (match_operand:TI 2 "altivec_register_operand" "v")))]
!   "TARGET_POWER10 && TARGET_POWERPC64"
    "vmoduq %0,%1,%2"
    [(set_attr "type" "vecdiv")
     (set_attr "size" "128")])
--- 3479,3485 ----
    [(set (match_operand:TI 0 "altivec_register_operand" "=v")
  	(umod:TI (match_operand:TI 1 "altivec_register_operand" "v")
  		 (match_operand:TI 2 "altivec_register_operand" "v")))]
!   "TARGET_POWER10 && TARGET_POWERPC64 && !RS6000_DISABLE_SCALAR_MODULO"
    "vmoduq %0,%1,%2"
    [(set_attr "type" "vecdiv")
     (set_attr "size" "128")])
***************
*** 3454,3460 ****
    [(set (match_operand:TI 0 "altivec_register_operand" "=v")
  	(mod:TI (match_operand:TI 1 "altivec_register_operand" "v")
  		(match_operand:TI 2 "altivec_register_operand" "v")))]
!   "TARGET_POWER10 && TARGET_POWERPC64"
    "vmodsq %0,%1,%2"
    [(set_attr "type" "vecdiv")
     (set_attr "size" "128")])
--- 3488,3494 ----
    [(set (match_operand:TI 0 "altivec_register_operand" "=v")
  	(mod:TI (match_operand:TI 1 "altivec_register_operand" "v")
  		(match_operand:TI 2 "altivec_register_operand" "v")))]
!   "TARGET_POWER10 && TARGET_POWERPC64 && !RS6000_DISABLE_SCALAR_MODULO"
    "vmodsq %0,%1,%2"
    [(set_attr "type" "vecdiv")
     (set_attr "size" "128")])
***************
*** 12215,12247 ****
    DONE;
  })
  
- (define_insn "stack_protect_setsi"
-   [(set (match_operand:SI 0 "memory_operand" "=m")
- 	(unspec:SI [(match_operand:SI 1 "memory_operand" "m")] UNSPEC_SP_SET))
-    (set (match_scratch:SI 2 "=&r") (const_int 0))]
-   "TARGET_32BIT"
-   "lwz%U1%X1 %2,%1\;stw%U0%X0 %2,%0\;li %2,0"
-   [(set_attr "type" "three")
-    (set_attr "length" "12")])
- 
  ;; We can't use the prefixed attribute here because there are two memory
  ;; instructions.  We can't split the insn due to the fact that this operation
  ;; needs to be done in one piece.
! (define_insn "stack_protect_setdi"
!   [(set (match_operand:DI 0 "memory_operand" "=Y")
! 	(unspec:DI [(match_operand:DI 1 "memory_operand" "Y")] UNSPEC_SP_SET))
!    (set (match_scratch:DI 2 "=&r") (const_int 0))]
!   "TARGET_64BIT"
  {
!   if (prefixed_memory (operands[1], DImode))
!     output_asm_insn ("pld %2,%1", operands);
    else
!     output_asm_insn ("ld%U1%X1 %2,%1", operands);
  
!   if (prefixed_memory (operands[0], DImode))
!     output_asm_insn ("pstd %2,%0", operands);
    else
!     output_asm_insn ("std%U0%X0 %2,%0", operands);
  
    return "li %2,0";
  }
--- 12249,12274 ----
    DONE;
  })
  
  ;; We can't use the prefixed attribute here because there are two memory
  ;; instructions.  We can't split the insn due to the fact that this operation
  ;; needs to be done in one piece.
! (define_insn "stack_protect_set"
!   [(set (match_operand:P 0 "memory_operand" "=YZ")
! 	(unspec:P [(match_operand:P 1 "memory_operand" "YZ")] UNSPEC_SP_SET))
!    (set (match_scratch:P 2 "=&r") (const_int 0))]
!   ""
  {
!   if (prefixed_memory (operands[1], mode))
!     /* Prefixed load only supports D-form but no update and X-form.  */
!     output_asm_insn ("p %2,%1", operands);
    else
!     output_asm_insn ("%U1%X1 %2,%1", operands);
  
!   if (prefixed_memory (operands[0], mode))
!     /* Prefixed store only supports D-form but no update and X-form.  */
!     output_asm_insn ("pst %2,%0", operands);
    else
!     output_asm_insn ("st%U0%X0 %2,%0", operands);
  
    return "li %2,0";
  }
***************
*** 12287,12331 ****
    DONE;
  })
  
- (define_insn "stack_protect_testsi"
-   [(set (match_operand:CCEQ 0 "cc_reg_operand" "=x,?y")
-         (unspec:CCEQ [(match_operand:SI 1 "memory_operand" "m,m")
- 		      (match_operand:SI 2 "memory_operand" "m,m")]
- 		     UNSPEC_SP_TEST))
-    (set (match_scratch:SI 4 "=r,r") (const_int 0))
-    (clobber (match_scratch:SI 3 "=&r,&r"))]
-   "TARGET_32BIT"
-   "@
-    lwz%U1%X1 %3,%1\;lwz%U2%X2 %4,%2\;xor. %3,%3,%4\;li %4,0
-    lwz%U1%X1 %3,%1\;lwz%U2%X2 %4,%2\;cmplw %0,%3,%4\;li %3,0\;li %4,0"
-   [(set_attr "length" "16,20")])
- 
  ;; We can't use the prefixed attribute here because there are two memory
  ;; instructions.  We can't split the insn due to the fact that this operation
  ;; needs to be done in one piece.
! (define_insn "stack_protect_testdi"
    [(set (match_operand:CCEQ 0 "cc_reg_operand" "=x,?y")
!         (unspec:CCEQ [(match_operand:DI 1 "memory_operand" "Y,Y")
! 		      (match_operand:DI 2 "memory_operand" "Y,Y")]
  		     UNSPEC_SP_TEST))
!    (set (match_scratch:DI 4 "=r,r") (const_int 0))
!    (clobber (match_scratch:DI 3 "=&r,&r"))]
!   "TARGET_64BIT"
  {
!   if (prefixed_memory (operands[1], DImode))
!     output_asm_insn ("pld %3,%1", operands);
    else
!     output_asm_insn ("ld%U1%X1 %3,%1", operands);
  
!   if (prefixed_memory (operands[2], DImode))
!     output_asm_insn ("pld %4,%2", operands);
    else
!     output_asm_insn ("ld%U2%X2 %4,%2", operands);
  
    if (which_alternative == 0)
      output_asm_insn ("xor. %3,%3,%4", operands);
    else
!     output_asm_insn ("cmpld %0,%3,%4\;li %3,0", operands);
  
    return "li %4,0";
  }
--- 12314,12346 ----
    DONE;
  })
  
  ;; We can't use the prefixed attribute here because there are two memory
  ;; instructions.  We can't split the insn due to the fact that this operation
  ;; needs to be done in one piece.
! (define_insn "stack_protect_test"
    [(set (match_operand:CCEQ 0 "cc_reg_operand" "=x,?y")
!         (unspec:CCEQ [(match_operand:P 1 "memory_operand" "YZ,YZ")
! 		      (match_operand:P 2 "memory_operand" "YZ,YZ")]
  		     UNSPEC_SP_TEST))
!    (set (match_scratch:P 4 "=r,r") (const_int 0))
!    (clobber (match_scratch:P 3 "=&r,&r"))]
!   ""
  {
!   if (prefixed_memory (operands[1], mode))
!     /* Prefixed load only supports D-form but no update and X-form.  */
!     output_asm_insn ("p %3,%1", operands);
    else
!     output_asm_insn ("%U1%X1 %3,%1", operands);
  
!   if (prefixed_memory (operands[2], mode))
!     output_asm_insn ("p %4,%2", operands);
    else
!     output_asm_insn ("%U2%X2 %4,%2", operands);
  
    if (which_alternative == 0)
      output_asm_insn ("xor. %3,%3,%4", operands);
    else
!     output_asm_insn ("cmpl %0,%3,%4\;li %3,0", operands);
  
    return "li %4,0";
  }
***************
*** 14052,14058 ****
       AIX does not support the dcbtstt and dcbtt extended mnemonics.
       The AIX assembler does not support the three operand form of dcbt
       and dcbtst on Power 7 (-mpwr7).  */
!   int inst_select = INTVAL (operands[2]) || !TARGET_DIRECT_MOVE;
  
    if (REG_P (operands[0]))
      {
--- 14067,14073 ----
       AIX does not support the dcbtstt and dcbtt extended mnemonics.
       The AIX assembler does not support the three operand form of dcbt
       and dcbtst on Power 7 (-mpwr7).  */
!   int inst_select = INTVAL (operands[2]) || !TARGET_POWER8;
  
    if (REG_P (operands[0]))
      {
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/rs6000.opt gcc-12.4.0/gcc/config/rs6000/rs6000.opt
*** gcc-12.3.0/gcc/config/rs6000/rs6000.opt	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/rs6000.opt	Thu Jun 20 08:08:06 2024
*************** Save the TOC in the prologue for indirec
*** 474,479 ****
--- 474,483 ----
  mvsx-timode
  Target RejectNegative Undocumented Ignore
  
+ ;; This option exists only to create its MASK.  It is not intended for users.
+ mpower8-internal
+ Target Undocumented Mask(POWER8) Var(rs6000_isa_flags) Warn(Do not use %<-mpower8-internal%>; use %<-mcpu=power8%> instead)
+ 
  mpower8-fusion
  Target Mask(P8_FUSION) Var(rs6000_isa_flags)
  Fuse certain integer operations together for better performance on power8.
*************** Target Mask(CRYPTO) Var(rs6000_isa_flags
*** 495,501 ****
  Use ISA 2.07 Category:Vector.AES and Category:Vector.SHA2 instructions.
  
  mdirect-move
! Target Undocumented Mask(DIRECT_MOVE) Var(rs6000_isa_flags) WarnRemoved
  
  mhtm
  Target Mask(HTM) Var(rs6000_isa_flags)
--- 499,505 ----
  Use ISA 2.07 Category:Vector.AES and Category:Vector.SHA2 instructions.
  
  mdirect-move
! Target Undocumented WarnRemoved
  
  mhtm
  Target Mask(HTM) Var(rs6000_isa_flags)
diff -Nrcpad gcc-12.3.0/gcc/config/rs6000/vsx.md gcc-12.4.0/gcc/config/rs6000/vsx.md
*** gcc-12.3.0/gcc/config/rs6000/vsx.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/rs6000/vsx.md	Thu Jun 20 08:08:06 2024
***************
*** 2018,2039 ****
    "xtsqrtp %0,%x1"
    [(set_attr "type" "")])
  
! ;; Fused vector multiply/add instructions. Support the classical Altivec
! ;; versions of fma, which allows the target to be a separate register from the
! ;; 3 inputs.  Under VSX, the target must be either the addend or the first
! ;; multiply.
! 
  (define_insn "*vsx_fmav4sf4"
!   [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa,v")
  	(fma:V4SF
! 	  (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa,v")
! 	  (match_operand:V4SF 2 "vsx_register_operand" "wa,0,v")
! 	  (match_operand:V4SF 3 "vsx_register_operand" "0,wa,v")))]
    "VECTOR_UNIT_VSX_P (V4SFmode)"
    "@
     xvmaddasp %x0,%x1,%x2
!    xvmaddmsp %x0,%x1,%x3
!    vmaddfp %0,%1,%2,%3"
    [(set_attr "type" "vecfloat")])
  
  (define_insn "*vsx_fmav2df4"
--- 2018,2037 ----
    "xtsqrtp %0,%x1"
    [(set_attr "type" "")])
  
! ;; Fused vector multiply/add instructions. Do not generate the Altivec versions
! ;; of fma (vmaddfp and vnmsubfp).  These instructions allows the target to be a
! ;; separate register from the 3 inputs, but they have different rounding
! ;; behaviors than the VSX instructions.
  (define_insn "*vsx_fmav4sf4"
!   [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa")
  	(fma:V4SF
! 	  (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa")
! 	  (match_operand:V4SF 2 "vsx_register_operand" "wa,0")
! 	  (match_operand:V4SF 3 "vsx_register_operand" "0,wa")))]
    "VECTOR_UNIT_VSX_P (V4SFmode)"
    "@
     xvmaddasp %x0,%x1,%x2
!    xvmaddmsp %x0,%x1,%x3"
    [(set_attr "type" "vecfloat")])
  
  (define_insn "*vsx_fmav2df4"
***************
*** 2075,2092 ****
    [(set_attr "type" "")])
  
  (define_insn "*vsx_nfmsv4sf4"
!   [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa,v")
  	(neg:V4SF
  	 (fma:V4SF
! 	   (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa,v")
! 	   (match_operand:V4SF 2 "vsx_register_operand" "wa,0,v")
  	   (neg:V4SF
! 	     (match_operand:V4SF 3 "vsx_register_operand" "0,wa,v")))))]
    "VECTOR_UNIT_VSX_P (V4SFmode)"
    "@
     xvnmsubasp %x0,%x1,%x2
!    xvnmsubmsp %x0,%x1,%x3
!    vnmsubfp %0,%1,%2,%3"
    [(set_attr "type" "vecfloat")])
  
  (define_insn "*vsx_nfmsv2df4"
--- 2073,2089 ----
    [(set_attr "type" "")])
  
  (define_insn "*vsx_nfmsv4sf4"
!   [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa")
  	(neg:V4SF
  	 (fma:V4SF
! 	   (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa")
! 	   (match_operand:V4SF 2 "vsx_register_operand" "wa,0")
  	   (neg:V4SF
! 	     (match_operand:V4SF 3 "vsx_register_operand" "0,wa")))))]
    "VECTOR_UNIT_VSX_P (V4SFmode)"
    "@
     xvnmsubasp %x0,%x1,%x2
!    xvnmsubmsp %x0,%x1,%x3"
    [(set_attr "type" "vecfloat")])
  
  (define_insn "*vsx_nfmsv2df4"
***************
*** 4565,4572 ****
    rtx op1 = operands[1];
    if (MEM_P (op1))
      operands[1] = rs6000_force_indexed_or_indirect_mem (op1);
!   else if (!REG_P (op1))
!     op1 = force_reg (mode, op1);
  })
  
  (define_insn "vsx_splat__reg"
--- 4562,4569 ----
    rtx op1 = operands[1];
    if (MEM_P (op1))
      operands[1] = rs6000_force_indexed_or_indirect_mem (op1);
!   else
!     operands[1] = force_reg (mode, op1);
  })
  
  (define_insn "vsx_splat__reg"
***************
*** 6560,6566 ****
  		      (match_operand:QI 4 "u8bit_cint_operand" "n")]
  		     UNSPEC_XXEVAL))]
     "TARGET_POWER10"
!    "xxeval %0,%1,%2,%3,%4"
     [(set_attr "type" "vecperm")
      (set_attr "prefixed" "yes")])
  
--- 6557,6563 ----
  		      (match_operand:QI 4 "u8bit_cint_operand" "n")]
  		     UNSPEC_XXEVAL))]
     "TARGET_POWER10"
!    "xxeval %x0,%x1,%x2,%x3,%4"
     [(set_attr "type" "vecperm")
      (set_attr "prefixed" "yes")])
  
diff -Nrcpad gcc-12.3.0/gcc/config/sh/sh.cc gcc-12.4.0/gcc/config/sh/sh.cc
*** gcc-12.3.0/gcc/config/sh/sh.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/sh/sh.cc	Thu Jun 20 08:08:06 2024
*************** sh_insn_operands_modified_between_p (rtx
*** 11766,11772 ****
  bool
  sh_is_nott_insn (const rtx_insn* i)
  {
!   return i != NULL && GET_CODE (PATTERN (i)) == SET
  	 && t_reg_operand (XEXP (PATTERN (i), 0), VOIDmode)
  	 && negt_reg_operand (XEXP (PATTERN (i), 1), VOIDmode);
  }
--- 11766,11773 ----
  bool
  sh_is_nott_insn (const rtx_insn* i)
  {
!   return i != NULL_RTX && PATTERN (i) != NULL_RTX
! 	 && GET_CODE (PATTERN (i)) == SET
  	 && t_reg_operand (XEXP (PATTERN (i), 0), VOIDmode)
  	 && negt_reg_operand (XEXP (PATTERN (i), 1), VOIDmode);
  }
diff -Nrcpad gcc-12.3.0/gcc/config/sh/sh.md gcc-12.4.0/gcc/config/sh/sh.md
*** gcc-12.3.0/gcc/config/sh/sh.md	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/sh/sh.md	Thu Jun 20 08:08:06 2024
***************
*** 842,848 ****
    if (SUBREG_P (reg))
      reg = SUBREG_REG (reg);
    gcc_assert (REG_P (reg));
!   if (find_regno_note (curr_insn, REG_DEAD, REGNO (reg)) != NULL_RTX)
      FAIL;
  
    /* FIXME: Maybe also search the predecessor basic blocks to catch
--- 842,848 ----
    if (SUBREG_P (reg))
      reg = SUBREG_REG (reg);
    gcc_assert (REG_P (reg));
!   if (find_regno_note (curr_insn, REG_DEAD, REGNO (reg)) == NULL_RTX)
      FAIL;
  
    /* FIXME: Maybe also search the predecessor basic blocks to catch
***************
*** 10680,10685 ****
--- 10680,10724 ----
     && peep2_reg_dead_p (2, operands[1]) && peep2_reg_dead_p (3, operands[0])"
    [(const_int 0)]
  {
+   if (MEM_P (operands[3]) && reg_overlap_mentioned_p (operands[0], operands[3]))
+     {
+       // Take care when the eliminated operand[0] register is part of
+       // the destination memory address.
+       rtx addr = XEXP (operands[3], 0);
+ 
+       if (REG_P (addr))
+ 	operands[3] = replace_equiv_address (operands[3], operands[1]);
+ 
+       else if (GET_CODE (addr) == PLUS && REG_P (XEXP (addr, 0))
+ 	       && CONST_INT_P (XEXP (addr, 1))
+ 	       && REGNO (operands[0]) == REGNO (XEXP (addr, 0)))
+ 	operands[3] = replace_equiv_address (operands[3],
+ 			    gen_rtx_PLUS (SImode, operands[1], XEXP (addr, 1)));
+ 
+       else if (GET_CODE (addr) == PLUS && REG_P (XEXP (addr, 0))
+ 	       && REG_P (XEXP (addr, 1)))
+         {
+           // register + register address  @(R0, Rn)
+           // can change only the Rn in the address, not R0.
+           if (REGNO (operands[0]) == REGNO (XEXP (addr, 0))
+ 	      && REGNO (XEXP (addr, 0)) != 0)
+ 	    {
+ 	      operands[3] = replace_equiv_address (operands[3],
+ 			    gen_rtx_PLUS (SImode, operands[1], XEXP (addr, 1)));
+ 	    }
+           else if (REGNO (operands[0]) == REGNO (XEXP (addr, 1))
+ 		   && REGNO (XEXP (addr, 1)) != 0)
+             {
+ 	      operands[3] = replace_equiv_address (operands[3],
+ 			    gen_rtx_PLUS (SImode, XEXP (addr, 0), operands[1]));
+             }
+           else
+             FAIL;
+         }
+       else
+         FAIL;
+     }
+ 
    emit_insn (gen_addsi3 (operands[1], operands[1], operands[2]));
    sh_peephole_emit_move_insn (operands[3], operands[1]);
  })
diff -Nrcpad gcc-12.3.0/gcc/config/sh/sh_treg_combine.cc gcc-12.4.0/gcc/config/sh/sh_treg_combine.cc
*** gcc-12.3.0/gcc/config/sh/sh_treg_combine.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/sh/sh_treg_combine.cc	Thu Jun 20 08:08:06 2024
*************** sh_treg_combine::record_set_of_reg (rtx
*** 732,738 ****
  	}
        else if (REG_P (new_entry.cstore.set_src ()))
  	{
! 	  // If it's a reg-reg copy follow the copied reg.
  	  new_entry.cstore_reg_reg_copies.push_back (new_entry.cstore);
  	  reg = new_entry.cstore.set_src ();
  	  i = new_entry.cstore.insn;
--- 732,745 ----
  	}
        else if (REG_P (new_entry.cstore.set_src ()))
  	{
! 	  // If it's a reg-reg copy follow the copied reg, but ignore
! 	  // nop copies of the reg onto itself.
! 	  if (REGNO (new_entry.cstore.set_src ()) == REGNO (reg))
! 	    {
! 	      i = prev_nonnote_nondebug_insn_bb (i);
! 	      continue;
! 	    }
! 
  	  new_entry.cstore_reg_reg_copies.push_back (new_entry.cstore);
  	  reg = new_entry.cstore.set_src ();
  	  i = new_entry.cstore.insn;
diff -Nrcpad gcc-12.3.0/gcc/config/vax/vax.cc gcc-12.4.0/gcc/config/vax/vax.cc
*** gcc-12.3.0/gcc/config/vax/vax.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/config/vax/vax.cc	Thu Jun 20 08:08:06 2024
*************** nonindexed_address_p (rtx x, bool strict
*** 1833,1839 ****
  }
  
  /* True if PROD is either a reg times size of mode MODE and MODE is less
!    than or equal 8 bytes, or just a reg if MODE is one byte.  */
  
  static bool
  index_term_p (rtx prod, machine_mode mode, bool strict)
--- 1833,1841 ----
  }
  
  /* True if PROD is either a reg times size of mode MODE and MODE is less
!    than or equal 8 bytes, or just a reg if MODE is one byte.  For a MULT
!    RTX we accept its operands in either order, however ASHIFT is not
!    commutative, so in that case reg has to be the left operand.  */
  
  static bool
  index_term_p (rtx prod, machine_mode mode, bool strict)
*************** index_term_p (rtx prod, machine_mode mod
*** 1852,1859 ****
    xfoo0 = XEXP (prod, 0);
    xfoo1 = XEXP (prod, 1);
  
!   if (CONST_INT_P (xfoo0)
!       && GET_MODE_SIZE (mode) == (log_p ? 1 << INTVAL (xfoo0) : INTVAL (xfoo0))
        && INDEX_REGISTER_P (xfoo1, strict))
      return true;
  
--- 1854,1862 ----
    xfoo0 = XEXP (prod, 0);
    xfoo1 = XEXP (prod, 1);
  
!   if (!log_p
!       && CONST_INT_P (xfoo0)
!       && GET_MODE_SIZE (mode) == INTVAL (xfoo0)
        && INDEX_REGISTER_P (xfoo1, strict))
      return true;
  
diff -Nrcpad gcc-12.3.0/gcc/config.in gcc-12.4.0/gcc/config.in
*** gcc-12.3.0/gcc/config.in	Mon May  8 12:15:24 2023
--- gcc-12.4.0/gcc/config.in	Thu Jun 20 08:10:28 2024
***************
*** 367,372 ****
--- 367,378 ----
  #endif
  
  
+ /* Define if your assembler supports conditional branch relaxation. */
+ #ifndef USED_FOR_TARGET
+ #undef HAVE_AS_COND_BRANCH_RELAXATION
+ #endif
+ 
+ 
  /* Define if your assembler supports the --debug-prefix-map option. */
  #ifndef USED_FOR_TARGET
  #undef HAVE_AS_DEBUG_PREFIX_MAP
***************
*** 598,603 ****
--- 604,615 ----
  #endif
  
  
+ /* Define if your macOS assembler supports .build_version directives */
+ #ifndef USED_FOR_TARGET
+ #undef HAVE_AS_MACOS_BUILD_VERSION
+ #endif
+ 
+ 
  /* Define if the assembler understands -march=rv*_zifencei. */
  #ifndef USED_FOR_TARGET
  #undef HAVE_AS_MARCH_ZIFENCEI
***************
*** 630,635 ****
--- 642,653 ----
  #endif
  
  
+ /* Define if your assembler supports -mrelax option. */
+ #ifndef USED_FOR_TARGET
+ #undef HAVE_AS_MRELAX_OPTION
+ #endif
+ 
+ 
  /* Define if your assembler supports .mspabi_attribute. */
  #ifndef USED_FOR_TARGET
  #undef HAVE_AS_MSPABI_ATTRIBUTE
***************
*** 672,677 ****
--- 690,701 ----
  #endif
  
  
+ /* Define if your assembler supports htm insns on power10. */
+ #ifndef USED_FOR_TARGET
+ #undef HAVE_AS_POWER10_HTM
+ #endif
+ 
+ 
  /* Define if your assembler supports .ref */
  #ifndef USED_FOR_TARGET
  #undef HAVE_AS_REF
***************
*** 2208,2213 ****
--- 2232,2243 ----
  #endif
  
  
+ /* Define which stat syscall is able to handle 64bit indodes. */
+ #ifndef USED_FOR_TARGET
+ #undef HOST_STAT_FOR_64BIT_INODES
+ #endif
+ 
+ 
  /* Define as const if the declaration of iconv() needs const. */
  #ifndef USED_FOR_TARGET
  #undef ICONV_CONST
diff -Nrcpad gcc-12.3.0/gcc/configure gcc-12.4.0/gcc/configure
*** gcc-12.3.0/gcc/configure	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/configure	Thu Jun 20 08:10:28 2024
*************** gcc_gxx_libcxx_include_dir=
*** 3750,3780 ****
  if test "${with_gxx_libcxx_include_dir+set}" = set; then :
    withval=$with_gxx_libcxx_include_dir; case "${withval}" in
  yes)	as_fn_error $? "bad value ${withval} given for libc++ include directory" "$LINENO" 5 ;;
- no)	;;
  *)	gcc_gxx_libcxx_include_dir=$with_gxx_libcxx_include_dir ;;
  esac
  fi
  
  
  # If both --with-sysroot and --with-gxx-libcxx-include-dir are passed, we
  # check to see if the latter starts with the former and, upon success, compute
  # gcc_gxx_libcxx_include_dir as relative to the sysroot.
  gcc_gxx_libcxx_include_dir_add_sysroot=0
! 
  if test x${gcc_gxx_libcxx_include_dir} != x; then
  
! $as_echo "#define ENABLE_STDLIB_OPTION 1" >>confdefs.h
  
- else
-   $as_echo "#define ENABLE_STDLIB_OPTION 0" >>confdefs.h
  
! fi
! # ??? This logic must match libstdc++-v3/acinclude.m4:GLIBCXX_EXPORT_INSTALL_INFO.
  if test x${gcc_gxx_libcxx_include_dir} = x; then
    if test x${enable_version_specific_runtime_libs} = xyes; then
!     gcc_gxx_libcxx_include_dir='${libsubdir}/libc++_include/c++/v1'
    else
-     libcxx_incdir='libc++_include/c++/$(version)/v1'
      if test x$host != x$target; then
         libcxx_incdir="$target_alias/$libcxx_incdir"
      fi
--- 3750,3803 ----
  if test "${with_gxx_libcxx_include_dir+set}" = set; then :
    withval=$with_gxx_libcxx_include_dir; case "${withval}" in
  yes)	as_fn_error $? "bad value ${withval} given for libc++ include directory" "$LINENO" 5 ;;
  *)	gcc_gxx_libcxx_include_dir=$with_gxx_libcxx_include_dir ;;
  esac
  fi
  
  
+ # --with-gxx-libcxx-include-dir controls the enabling of the -stdlib option.
+ # if --with-gxx-libcxx-include-dir is 'no' we disable the stdlib option.
+ # if --with-gxx-libcxx-include-dir is unset we enable the stdlib option
+ # based on the platform (to be available on platform versions where it is the
+ # default for the system tools). We also use a default path within the compiler
+ # install tree.
+ # Otherwise, we use the path provided and enable the stdlib option.
  # If both --with-sysroot and --with-gxx-libcxx-include-dir are passed, we
  # check to see if the latter starts with the former and, upon success, compute
  # gcc_gxx_libcxx_include_dir as relative to the sysroot.
  gcc_gxx_libcxx_include_dir_add_sysroot=0
! gcc_enable_stdlib_opt=0
  if test x${gcc_gxx_libcxx_include_dir} != x; then
+   if test x${gcc_gxx_libcxx_include_dir} = xno; then
+     # set defaults for the dir, but the option is disabled anyway.
+     gcc_gxx_libcxx_include_dir=
+   else
+     gcc_enable_stdlib_opt=1
+   fi
+ else
+   case $target in
+     *-darwin1[1-9]* | *-darwin2*)
+        # Default this on for Darwin versions which default to libcxx,
+        # and embed the path in the compiler install so that we get a
+        # self-contained toolchain.
+        gcc_enable_stdlib_opt=1
+        ;;
+     *) ;;
+   esac
+ fi
  
! cat >>confdefs.h <<_ACEOF
! #define ENABLE_STDLIB_OPTION $gcc_enable_stdlib_opt
! _ACEOF
  
  
! # Sysroot behaviour as for gxx-include-dir
  if test x${gcc_gxx_libcxx_include_dir} = x; then
+   # default path,embedded in the compiler tree.
+   libcxx_incdir='include/c++/v1'
    if test x${enable_version_specific_runtime_libs} = xyes; then
!     gcc_gxx_libcxx_include_dir='${libsubdir}/$libcxx_incdir'
    else
      if test x$host != x$target; then
         libcxx_incdir="$target_alias/$libcxx_incdir"
      fi
*************** else
*** 19668,19674 ****
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 19671 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
--- 19691,19697 ----
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 19694 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
*************** else
*** 19774,19780 ****
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 19777 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
--- 19797,19803 ----
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 19800 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
*************** $as_echo "#define HAVE_AS_MMACOSX_VERSIO
*** 26102,26107 ****
--- 26125,26163 ----
  
  fi
  
+     if test x$gcc_cv_as_mmacosx_version_min = "xyes"; then
+        { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for .build_version" >&5
+ $as_echo_n "checking assembler for .build_version... " >&6; }
+ if ${gcc_cv_as_darwin_build_version+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+   gcc_cv_as_darwin_build_version=no
+   if test x$gcc_cv_as != x; then
+     $as_echo ' .build_version macos, 10, 14 sdk_version 10, 14' > conftest.s
+     if { ac_try='$gcc_cv_as $gcc_cv_as_flags -mmacosx-version-min=10.14 -o conftest.o conftest.s >&5'
+   { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+   (eval $ac_try) 2>&5
+   ac_status=$?
+   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+   test $ac_status = 0; }; }
+     then
+ 	gcc_cv_as_darwin_build_version=yes
+     else
+       echo "configure: failed program was" >&5
+       cat conftest.s >&5
+     fi
+     rm -f conftest.o conftest.s
+   fi
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_darwin_build_version" >&5
+ $as_echo "$gcc_cv_as_darwin_build_version" >&6; }
+ if test $gcc_cv_as_darwin_build_version = yes; then
+ 
+ $as_echo "#define HAVE_AS_MACOS_BUILD_VERSION 1" >>confdefs.h
+ 
+ fi
+ 
+     fi
      ;;
  esac
  
*************** fi
*** 27963,27968 ****
--- 28019,28067 ----
  
  
      case $target in
+       *-*-aix*) conftest_s='	.machine "pwr10"
+ 	.csect .text[PR]
+ 	tend. 0';;
+       *-*-darwin*) conftest_s='	.text
+ 	tend. 0';;
+       *) conftest_s='	.machine power10
+ 	.text
+ 	tend. 0';;
+     esac
+ 
+     { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for htm support on Power10" >&5
+ $as_echo_n "checking assembler for htm support on Power10... " >&6; }
+ if ${gcc_cv_as_power10_htm+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+   gcc_cv_as_power10_htm=no
+   if test x$gcc_cv_as != x; then
+     $as_echo "$conftest_s" > conftest.s
+     if { ac_try='$gcc_cv_as $gcc_cv_as_flags  -o conftest.o conftest.s >&5'
+   { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+   (eval $ac_try) 2>&5
+   ac_status=$?
+   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+   test $ac_status = 0; }; }
+     then
+ 	gcc_cv_as_power10_htm=yes
+     else
+       echo "configure: failed program was" >&5
+       cat conftest.s >&5
+     fi
+     rm -f conftest.o conftest.s
+   fi
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_power10_htm" >&5
+ $as_echo "$gcc_cv_as_power10_htm" >&6; }
+ if test $gcc_cv_as_power10_htm = yes; then
+ 
+ $as_echo "#define HAVE_AS_POWER10_HTM 1" >>confdefs.h
+ 
+ fi
+ 
+ 
+     case $target in
        *-*-aix*) conftest_s='	.csect .text[PR]
  LCF..0:
  	addis 11,30,_GLOBAL_OFFSET_TABLE_-LCF..0@ha';;
*************** if test $gcc_cv_as_loongarch_dtprelword
*** 28828,28833 ****
--- 28927,28998 ----
  $as_echo "#define HAVE_AS_DTPRELWORD 1" >>confdefs.h
  
  fi
+     { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for -mrelax option" >&5
+ $as_echo_n "checking assembler for -mrelax option... " >&6; }
+ if ${gcc_cv_as_loongarch_relax+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+   gcc_cv_as_loongarch_relax=no
+   if test x$gcc_cv_as != x; then
+     $as_echo '.text' > conftest.s
+     if { ac_try='$gcc_cv_as $gcc_cv_as_flags -mrelax -o conftest.o conftest.s >&5'
+   { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+   (eval $ac_try) 2>&5
+   ac_status=$?
+   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+   test $ac_status = 0; }; }
+     then
+ 	gcc_cv_as_loongarch_relax=yes
+     else
+       echo "configure: failed program was" >&5
+       cat conftest.s >&5
+     fi
+     rm -f conftest.o conftest.s
+   fi
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_loongarch_relax" >&5
+ $as_echo "$gcc_cv_as_loongarch_relax" >&6; }
+ if test $gcc_cv_as_loongarch_relax = yes; then
+ 
+ $as_echo "#define HAVE_AS_MRELAX_OPTION 1" >>confdefs.h
+ 
+ fi
+ 
+     { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for conditional branch relaxation support" >&5
+ $as_echo_n "checking assembler for conditional branch relaxation support... " >&6; }
+ if ${gcc_cv_as_loongarch_cond_branch_relax+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+   gcc_cv_as_loongarch_cond_branch_relax=no
+   if test x$gcc_cv_as != x; then
+     $as_echo 'a:
+        .rept 32769
+        nop
+        .endr
+        beq $a0,$a1,a' > conftest.s
+     if { ac_try='$gcc_cv_as $gcc_cv_as_flags --fatal-warnings -o conftest.o conftest.s >&5'
+   { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+   (eval $ac_try) 2>&5
+   ac_status=$?
+   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+   test $ac_status = 0; }; }
+     then
+ 	gcc_cv_as_loongarch_cond_branch_relax=yes
+     else
+       echo "configure: failed program was" >&5
+       cat conftest.s >&5
+     fi
+     rm -f conftest.o conftest.s
+   fi
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_loongarch_cond_branch_relax" >&5
+ $as_echo "$gcc_cv_as_loongarch_cond_branch_relax" >&6; }
+ if test $gcc_cv_as_loongarch_cond_branch_relax = yes; then
+ 
+ $as_echo "#define HAVE_AS_COND_BRANCH_RELAXATION 1" >>confdefs.h
+ 
+ fi
+ 
      ;;
      s390*-*-*)
      { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for .gnu_attribute support" >&5
*************** $as_echo "$gcc_cv_ld64_major" >&6; }
*** 30720,30726 ****
      { $as_echo "$as_me:${as_lineno-$LINENO}: checking linker version" >&5
  $as_echo_n "checking linker version... " >&6; }
      if test x"${gcc_cv_ld64_version}" = x; then
!       gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | grep ld64 | sed s/.*ld64-// | awk '{print $1}'`
      fi
      { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_ld64_version" >&5
  $as_echo "$gcc_cv_ld64_version" >&6; }
--- 30885,30892 ----
      { $as_echo "$as_me:${as_lineno-$LINENO}: checking linker version" >&5
  $as_echo_n "checking linker version... " >&6; }
      if test x"${gcc_cv_ld64_version}" = x; then
!       gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | $EGREP 'ld64|dyld' \
!       | sed -e 's/.*ld64-//' -e 's/.*dyld-//'| awk '{print $1}'`
      fi
      { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_ld64_version" >&5
  $as_echo "$gcc_cv_ld64_version" >&6; }
*************** $as_echo_n "checking dsymutil version \"
*** 30790,30796 ****
        dsymutil_kind=LLVM
        dsymutil_vers=`echo $dsymutil_temp | sed 's/.*LLVM\ version\ \([0-9\.]*\).*/\1/'`
      else
!       dsymutil_kind=UNKNOWN
        dsymutil_vers="0.0"
      fi
      dsymutil_major=`expr "$dsymutil_vers" : '\([0-9]*\)'`
--- 30956,30962 ----
        dsymutil_kind=LLVM
        dsymutil_vers=`echo $dsymutil_temp | sed 's/.*LLVM\ version\ \([0-9\.]*\).*/\1/'`
      else
!       dsymutil_kind=DET_UNKNOWN
        dsymutil_vers="0.0"
      fi
      dsymutil_major=`expr "$dsymutil_vers" : '\([0-9]*\)'`
diff -Nrcpad gcc-12.3.0/gcc/configure.ac gcc-12.4.0/gcc/configure.ac
*** gcc-12.3.0/gcc/configure.ac	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/configure.ac	Thu Jun 20 08:08:06 2024
*************** AC_ARG_WITH(gxx-libcxx-include-dir,
*** 236,262 ****
                  [specifies directory to find libc++ header files])],
  [case "${withval}" in
  yes)	AC_MSG_ERROR(bad value ${withval} given for libc++ include directory) ;;
- no)	;;
  *)	gcc_gxx_libcxx_include_dir=$with_gxx_libcxx_include_dir ;;
  esac])
  
  # If both --with-sysroot and --with-gxx-libcxx-include-dir are passed, we
  # check to see if the latter starts with the former and, upon success, compute
  # gcc_gxx_libcxx_include_dir as relative to the sysroot.
  gcc_gxx_libcxx_include_dir_add_sysroot=0
! 
  if test x${gcc_gxx_libcxx_include_dir} != x; then
!   AC_DEFINE(ENABLE_STDLIB_OPTION, 1,
!             [Define if the -stdlib= option should be enabled.])
  else
!   AC_DEFINE(ENABLE_STDLIB_OPTION, 0)
  fi
! # ??? This logic must match libstdc++-v3/acinclude.m4:GLIBCXX_EXPORT_INSTALL_INFO.
  if test x${gcc_gxx_libcxx_include_dir} = x; then
    if test x${enable_version_specific_runtime_libs} = xyes; then
!     gcc_gxx_libcxx_include_dir='${libsubdir}/libc++_include/c++/v1'
    else
-     libcxx_incdir='libc++_include/c++/$(version)/v1'
      if test x$host != x$target; then
         libcxx_incdir="$target_alias/$libcxx_incdir"
      fi
--- 236,284 ----
                  [specifies directory to find libc++ header files])],
  [case "${withval}" in
  yes)	AC_MSG_ERROR(bad value ${withval} given for libc++ include directory) ;;
  *)	gcc_gxx_libcxx_include_dir=$with_gxx_libcxx_include_dir ;;
  esac])
  
+ # --with-gxx-libcxx-include-dir controls the enabling of the -stdlib option.
+ # if --with-gxx-libcxx-include-dir is 'no' we disable the stdlib option.
+ # if --with-gxx-libcxx-include-dir is unset we enable the stdlib option
+ # based on the platform (to be available on platform versions where it is the
+ # default for the system tools). We also use a default path within the compiler
+ # install tree.
+ # Otherwise, we use the path provided and enable the stdlib option.
  # If both --with-sysroot and --with-gxx-libcxx-include-dir are passed, we
  # check to see if the latter starts with the former and, upon success, compute
  # gcc_gxx_libcxx_include_dir as relative to the sysroot.
  gcc_gxx_libcxx_include_dir_add_sysroot=0
! gcc_enable_stdlib_opt=0
  if test x${gcc_gxx_libcxx_include_dir} != x; then
!   if test x${gcc_gxx_libcxx_include_dir} = xno; then
!     # set defaults for the dir, but the option is disabled anyway.
!     gcc_gxx_libcxx_include_dir=
!   else
!     gcc_enable_stdlib_opt=1
!   fi
  else
!   case $target in
!     *-darwin1[[1-9]]* | *-darwin2*)
!        # Default this on for Darwin versions which default to libcxx,
!        # and embed the path in the compiler install so that we get a
!        # self-contained toolchain.
!        gcc_enable_stdlib_opt=1
!        ;;
!     *) ;;
!   esac
  fi
! AC_DEFINE_UNQUOTED(ENABLE_STDLIB_OPTION, $gcc_enable_stdlib_opt,
!           [Define if the -stdlib= option should be enabled.])
! 
! # Sysroot behaviour as for gxx-include-dir
  if test x${gcc_gxx_libcxx_include_dir} = x; then
+   # default path,embedded in the compiler tree.
+   libcxx_incdir='include/c++/v1'
    if test x${enable_version_specific_runtime_libs} = xyes; then
!     gcc_gxx_libcxx_include_dir='${libsubdir}/$libcxx_incdir'
    else
      if test x$host != x$target; then
         libcxx_incdir="$target_alias/$libcxx_incdir"
      fi
*************** case "$target_os" in
*** 4309,4315 ****
        gcc_cv_as_mmacosx_version_min,
        [-mmacosx-version-min=10.1], [.text],,
        [AC_DEFINE(HAVE_AS_MMACOSX_VERSION_MIN_OPTION, 1,
! 	[Define if your Mac OS X assembler supports the -mmacos-version-min option.])])
      ;;
  esac
  
--- 4331,4345 ----
        gcc_cv_as_mmacosx_version_min,
        [-mmacosx-version-min=10.1], [.text],,
        [AC_DEFINE(HAVE_AS_MMACOSX_VERSION_MIN_OPTION, 1,
! 	[Define if your macOS assembler supports the -mmacos-version-min option.])])
!     if test x$gcc_cv_as_mmacosx_version_min = "xyes"; then
!        gcc_GAS_CHECK_FEATURE([.build_version],
!            gcc_cv_as_darwin_build_version,
!            [-mmacosx-version-min=10.14],
!            [ .build_version macos, 10, 14 sdk_version 10, 14],,
!       [AC_DEFINE(HAVE_AS_MACOS_BUILD_VERSION, 1,
! 	[Define if your macOS assembler supports .build_version directives])])
!     fi
      ;;
  esac
  
*************** gd:
*** 5033,5038 ****
--- 5063,5085 ----
  	  [Define if your assembler supports mfcr field.])])
  
      case $target in
+       *-*-aix*) conftest_s='	.machine "pwr10"
+ 	.csect .text[[PR]]
+ 	tend. 0';;
+       *-*-darwin*) conftest_s='	.text
+ 	tend. 0';;
+       *) conftest_s='	.machine power10
+ 	.text
+ 	tend. 0';;
+     esac
+ 
+     gcc_GAS_CHECK_FEATURE([htm support on Power10],
+       gcc_cv_as_power10_htm,,
+       [$conftest_s],,
+       [AC_DEFINE(HAVE_AS_POWER10_HTM, 1,
+ 	  [Define if your assembler supports htm insns on power10.])])
+ 
+     case $target in
        *-*-aix*) conftest_s='	.csect .text[[PR]]
  LCF..0:
  	addis 11,30,_GLOBAL_OFFSET_TABLE_-LCF..0@ha';;
*************** x:
*** 5319,5324 ****
--- 5366,5385 ----
  	.dtprelword x+0x8000],,
        [AC_DEFINE(HAVE_AS_DTPRELWORD, 1,
  	  [Define if your assembler supports .dtprelword.])])
+     gcc_GAS_CHECK_FEATURE([-mrelax option], gcc_cv_as_loongarch_relax,
+       [-mrelax], [.text],,
+       [AC_DEFINE(HAVE_AS_MRELAX_OPTION, 1,
+ 		[Define if your assembler supports -mrelax option.])])
+     gcc_GAS_CHECK_FEATURE([conditional branch relaxation support],
+       gcc_cv_as_loongarch_cond_branch_relax,
+       [--fatal-warnings],
+       [a:
+        .rept 32769
+        nop
+        .endr
+        beq $a0,$a1,a],,
+       [AC_DEFINE(HAVE_AS_COND_BRANCH_RELAXATION, 1,
+ 		[Define if your assembler supports conditional branch relaxation.])])
      ;;
      s390*-*-*)
      gcc_GAS_CHECK_FEATURE([.gnu_attribute support],
*************** if test x"$ld64_flag" = x"yes"; then
*** 6353,6359 ****
      # If the version was not specified, try to find it.
      AC_MSG_CHECKING(linker version)
      if test x"${gcc_cv_ld64_version}" = x; then
!       gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | grep ld64 | sed s/.*ld64-// | awk '{print $1}'`
      fi
      AC_MSG_RESULT($gcc_cv_ld64_version)
  
--- 6414,6421 ----
      # If the version was not specified, try to find it.
      AC_MSG_CHECKING(linker version)
      if test x"${gcc_cv_ld64_version}" = x; then
!       gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | $EGREP 'ld64|dyld' \
!       | sed -e 's/.*ld64-//' -e 's/.*dyld-//'| awk '{print $1}'`
      fi
      AC_MSG_RESULT($gcc_cv_ld64_version)
  
*************** if test x"$dsymutil_flag" = x"yes"; then
*** 6407,6413 ****
        dsymutil_kind=LLVM
        dsymutil_vers=`echo $dsymutil_temp | sed 's/.*LLVM\ version\ \([[0-9\.]]*\).*/\1/'`
      else
!       dsymutil_kind=UNKNOWN
        dsymutil_vers="0.0"
      fi
      dsymutil_major=`expr "$dsymutil_vers" : '\([[0-9]]*\)'`
--- 6469,6475 ----
        dsymutil_kind=LLVM
        dsymutil_vers=`echo $dsymutil_temp | sed 's/.*LLVM\ version\ \([[0-9\.]]*\).*/\1/'`
      else
!       dsymutil_kind=DET_UNKNOWN
        dsymutil_vers="0.0"
      fi
      dsymutil_major=`expr "$dsymutil_vers" : '\([[0-9]]*\)'`
diff -Nrcpad gcc-12.3.0/gcc/cp/ChangeLog gcc-12.4.0/gcc/cp/ChangeLog
*** gcc-12.3.0/gcc/cp/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/cp/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,348 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-12  Jakub Jelinek  
+ 
+ 	PR c++/114691
+ 	* semantics.cc (simplify_loop_decl_cond): Use cp_build_unary_op with
+ 	TRUTH_NOT_EXPR on ANNOTATE_EXPR argument (if any) rather than
+ 	ANNOTATE_EXPR itself.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-09  Jakub Jelinek  
+ 
+ 	PR c++/114580
+ 	* semantics.cc (finish_if_stmt_cond): Call
+ 	maybe_warn_for_constant_evaluated with IF_STMT_CONSTEXPR_P (if_stmt)
+ 	as the second argument, rather than true/false depending on if
+ 	it is if constexpr with non-dependent constant expression with
+ 	bool type.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-05  Jakub Jelinek  
+ 
+ 	PR c++/114572
+ 	* cp-gimplify.cc (cxx_omp_clause_apply_fn): Call build_cplus_new
+ 	on build_call_a result if it has class type.
+ 
+ 2024-05-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2024-03-28  Jason Merrill  
+ 
+ 	PR c++/100667
+ 	* semantics.cc (same_type_ref_bind_p): New.
+ 	(finish_trait_expr): Use it.
+ 
+ 2024-05-24  Jason Merrill  
+ 
+ 	* pt.cc (tsubst_copy_and_build): Move ANNOTATE_EXPR out of
+ 	fallthrough path.
+ 
+ 2024-05-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2023-09-22  Jason Merrill  
+ 
+ 	PR c++/111529
+ 	* parser.cc (cp_parser_lambda_declarator_opt): Don't suggest
+ 	-std=c++14 for lambda templates.
+ 	* pt.cc (tsubst_expr): Move ANNOTATE_EXPR handling...
+ 	(tsubst_copy_and_build): ...here.
+ 
+ 2024-05-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2024-01-25  Jason Merrill  
+ 
+ 	PR c++/113598
+ 	* init.cc (build_vec_init): Don't use {} for PMF.
+ 
+ 2024-05-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2024-04-02  Jason Merrill  
+ 
+ 	PR c++/114561
+ 	PR c++/114562
+ 	* call.cc (convert_like_internal): Avoid adding qualification
+ 	conversion in direct reference binding.
+ 
+ 2024-05-08  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2024-05-07  Andrew Pinski  
+ 
+ 	PR c++/89224
+ 	* constexpr.cc (cxx_eval_array_reference): Compare main variants
+ 	for the vector/array types instead of the types directly.
+ 
+ 2024-04-12  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2022-12-23  Iain Sandoe  
+ 
+ 	* g++spec.cc (lang_specific_driver): Preserve -static-libstdc++ in
+ 	the driver command line for targets without -Bstatic/dynamic support
+ 	in their static linker.
+ 
+ 2024-02-06  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2024-02-06  Jason Merrill  
+ 
+ 	PR c++/107291
+ 	* method.cc (early_check_defaulted_comparison): Fail if not friend.
+ 
+ 2024-02-05  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2024-02-05  Jason Merrill  
+ 
+ 	PR c++/111286
+ 	* tree.cc (rvalue): Don't drop cv-quals from an array.
+ 
+ 2024-02-02  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2024-02-02  Jason Merrill  
+ 
+ 	PR c++/110084
+ 	* pt.cc (tsubst_function_decl): Only check a function defaulted
+ 	outside the class if the class is complete.
+ 
+ 2024-02-01  Marek Polacek  
+ 
+ 	Backported from master:
+ 	2024-02-01  Marek Polacek  
+ 
+ 	PR c++/112437
+ 	* typeck.cc (treat_lvalue_as_rvalue_p): Bail out on sk_namespace in
+ 	the move on throw of parms loop.
+ 
+ 2024-01-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2024-01-24  Jason Merrill  
+ 
+ 	PR c++/113347
+ 	* semantics.cc (finalize_nrv_r): Handle null
+ 	current_retval_sentinel.
+ 
+ 2024-01-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2023-12-20  Jason Merrill  
+ 
+ 	PR c++/103185
+ 	* typeck.cc (cp_build_array_ref): Handle swapped operands.
+ 
+ 2024-01-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2023-12-20  Jason Merrill  
+ 
+ 	PR c++/113088
+ 	PR c++/33799
+ 	* except.cc (maybe_splice_retval_cleanup): Handle an empty block.
+ 
+ 2024-01-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2023-08-31  Jason Merrill  
+ 
+ 	PR c++/92407
+ 	* cp-tree.h (struct language_function): Add backward_goto.
+ 	* decl.cc (check_goto): Set it.
+ 	* typeck.cc (check_return_expr): Prevent NRV if set.
+ 
+ 2024-01-15  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2024-01-15  Patrick Palka  
+ 
+ 	PR c++/109899
+ 	* init.cc (build_vec_delete_1): Assume expr_noexcept_p returns
+ 	false in a template context.
+ 
+ 2023-12-24  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-09-22  Patrick Palka  
+ 
+ 	PR c++/111485
+ 	* pt.cc (is_compatible_template_arg): New parameter 'args'.
+ 	Add the outer template arguments 'args' to 'new_args'.
+ 	(convert_template_argument): Pass 'args' to
+ 	is_compatible_template_arg.
+ 
+ 2023-12-20  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-04-25  Patrick Palka  
+ 
+ 	PR c++/108975
+ 	* pt.cc (value_dependent_expression_p) :
+ 	Suppress conservative early exit for reference variables
+ 	when DECL_HAS_VALUE_EXPR_P.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-12-08  Jakub Jelinek  
+ 
+ 	PR sanitizer/112727
+ 	* cp-gimplify.cc (cp_fold): If SAVE_EXPR has been previously
+ 	folded, unshare_expr what is returned.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-12-04  Jakub Jelinek  
+ 
+ 	PR c++/112795
+ 	* parser.cc (cp_parser_pragma_unroll): Use fold_non_dependent_expr
+ 	instead of maybe_constant_value.
+ 
+ 2023-11-27  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-11-16  Patrick Palka  
+ 
+ 	PR c++/111703
+ 	PR c++/107939
+ 	* constexpr.cc (potential_constant_expression_1) :
+ 	Fix FUNCTION_POINTER_TYPE_P test.
+ 
+ 2023-11-27  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-11-15  Patrick Palka  
+ 
+ 	PR c++/111703
+ 	PR c++/112269
+ 	* constexpr.cc (potential_constant_expression_1) :
+ 	Only consider var_in_maybe_constexpr_fn if 'now' is false.
+ 	: Likewise.
+ 
+ 2023-11-17  Jason Merrill  
+ 
+ 	PR c++/112301
+ 	PR c++/102191
+ 	PR c++/33799
+ 	* except.cc (maybe_splice_retval_cleanup): Clear
+ 	current_retval_sentinel when destroying retval.
+ 	* semantics.cc (nrv_data): Add in_nrv_cleanup.
+ 	(finalize_nrv): Set it.
+ 	(finalize_nrv_r): Fix handling of throwing cleanups.
+ 
+ 2023-11-17  Jason Merrill  
+ 
+ 	* semantics.cc (finalize_nrv_r): [RETURN_EXPR]: Only replace the
+ 	INIT_EXPR.
+ 
+ 2023-11-17  Jason Merrill  
+ 
+ 	PR c++/33799
+ 	* except.cc (maybe_splice_retval_cleanup): Change
+ 	recognition of function body and try scopes.
+ 	* semantics.cc (do_poplevel): Call it after poplevel.
+ 	(at_try_scope): New.
+ 	* cp-tree.h (maybe_splice_retval_cleanup): Adjust.
+ 
+ 2023-08-11  Jason Merrill  
+ 
+ 	PR c++/106310
+ 	* parser.cc (cp_parser_template_name): Skip non-member
+ 	lookup after the template keyword.
+ 	(cp_parser_lookup_name): Pass down template_keyword_p.
+ 
+ 2023-08-11  Jason Merrill  
+ 
+ 	PR c++/106890
+ 	PR c++/109666
+ 	* name-lookup.cc (maybe_push_to_top_level)
+ 	(maybe_pop_from_top_level): Split out...
+ 	* pt.cc (instantiate_body): ...from here.
+ 	* init.cc (maybe_instantiate_nsdmi_init): Use them.
+ 	* name-lookup.h: Declare them..
+ 
+ 2023-08-11  Jason Merrill  
+ 
+ 	PR c++/108099
+ 	* decl.cc (grokdeclarator): Don't clear typedef_decl after 'unsigned
+ 	typedef' pedwarn.  Use c_common_signed_or_unsigned_type.  Also
+ 	handle 'signed typedef'.
+ 
+ 2023-08-07  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-05-09  Patrick Palka  
+ 
+ 	PR c++/109761
+ 	* parser.cc (cp_parser_class_specifier): Don't pass a class
+ 	context to noexcept_override_late_checks.
+ 	(noexcept_override_late_checks): Remove 'type' parameter
+ 	and use DECL_CONTEXT of 'fndecl' instead.
+ 
+ 2023-07-12  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-06-29  Patrick Palka  
+ 
+ 	PR c++/110468
+ 	* init.cc (maybe_instantiate_nsdmi_init): Mask out all
+ 	tsubst flags except for tf_warning_or_error.
+ 
+ 2023-05-17  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-05-17  Jakub Jelinek  
+ 
+ 	PR c++/109868
+ 	* init.cc (build_zero_init_1): Don't initialize zero-width bitfields.
+ 	For unions only initialize the first FIELD_DECL.
+ 
+ 2023-05-15  Jason Merrill  
+ 
+ 	PR c++/109241
+ 	* pt.cc (find_parameter_packs_r): Handle null TREE_BINFO.
+ 
+ 2023-05-09  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-04-01  Patrick Palka  
+ 
+ 	PR c++/109160
+ 	* cp-tree.h (do_auto_deduction): Add defaulted tmpl parameter.
+ 	* pt.cc (convert_template_argument): Pass 'in_decl' as 'tmpl' to
+ 	do_auto_deduction.
+ 	(tsubst_decl) : Pass 'tmpl' instead of 't' as
+ 	'in_decl' to coerce_template_parms.
+ 	(unify) : Pass TPARMS_PRIMARY_TEMPLATE
+ 	as 'tmpl' to do_auto_deduction.
+ 	(do_auto_deduction): Document default arguments.  Rename local
+ 	variable 'tmpl' to 'ctmpl'.  Use 'tmpl' to obtain a full set of
+ 	template arguments for satisfaction in the adc_unify case.
+ 
+ 2023-05-09  Jason Merrill  
+ 
+ 	PR c++/106740
+ 	PR c++/105852
+ 	* decl.cc (duplicate_decls): Change non-templated friend
+ 	check to an assert.
+ 	* pt.cc	(tsubst_function_decl): Don't set DECL_TEMPLATE_INFO
+ 	on non-templated friends.
+ 	(tsubst_friend_function): Adjust.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/cp/call.cc gcc-12.4.0/gcc/cp/call.cc
*** gcc-12.3.0/gcc/cp/call.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/call.cc	Thu Jun 20 08:08:06 2024
*************** convert_like_internal (conversion *convs
*** 8135,8141 ****
        break;
      };
  
!   expr = convert_like (next_conversion (convs), expr, fn, argnum,
  		       convs->kind == ck_ref_bind
  		       ? issue_conversion_warnings : false,
  		       c_cast_p, complain & ~tf_no_cleanup);
--- 8135,8149 ----
        break;
      };
  
!   conversion *nc = next_conversion (convs);
!   if (convs->kind == ck_ref_bind && nc->kind == ck_qual
!       && !convs->need_temporary_p)
!     /* direct_reference_binding might have inserted a ck_qual under
!        this ck_ref_bind for the benefit of conversion sequence ranking.
!        Don't actually perform that conversion.  */
!     nc = next_conversion (nc);
! 
!   expr = convert_like (nc, expr, fn, argnum,
  		       convs->kind == ck_ref_bind
  		       ? issue_conversion_warnings : false,
  		       c_cast_p, complain & ~tf_no_cleanup);
*************** convert_like_internal (conversion *convs
*** 8216,8234 ****
        {
  	tree ref_type = totype;
  
- 	/* direct_reference_binding might have inserted a ck_qual under
- 	   this ck_ref_bind for the benefit of conversion sequence ranking.
- 	   Ignore the conversion; we'll create our own below.  */
- 	if (next_conversion (convs)->kind == ck_qual
- 	    && !convs->need_temporary_p)
- 	  {
- 	    gcc_assert (same_type_p (TREE_TYPE (expr),
- 				     next_conversion (convs)->type));
- 	    /* Strip the cast created by the ck_qual; cp_build_addr_expr
- 	       below expects an lvalue.  */
- 	    STRIP_NOPS (expr);
- 	  }
- 
  	if (convs->bad_p && !next_conversion (convs)->bad_p)
  	  {
  	    tree extype = TREE_TYPE (expr);
--- 8224,8229 ----
diff -Nrcpad gcc-12.3.0/gcc/cp/constexpr.cc gcc-12.4.0/gcc/cp/constexpr.cc
*** gcc-12.3.0/gcc/cp/constexpr.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/constexpr.cc	Thu Jun 20 08:08:06 2024
*************** cxx_eval_array_reference (const constexp
*** 3932,3938 ****
    if (!lval
        && TREE_CODE (ary) == VIEW_CONVERT_EXPR
        && VECTOR_TYPE_P (TREE_TYPE (TREE_OPERAND (ary, 0)))
!       && TREE_TYPE (t) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (ary, 0))))
      ary = TREE_OPERAND (ary, 0);
  
    tree oldidx = TREE_OPERAND (t, 1);
--- 3932,3939 ----
    if (!lval
        && TREE_CODE (ary) == VIEW_CONVERT_EXPR
        && VECTOR_TYPE_P (TREE_TYPE (TREE_OPERAND (ary, 0)))
!       && (TYPE_MAIN_VARIANT (TREE_TYPE (t))
! 	  == TYPE_MAIN_VARIANT (TREE_TYPE (TREE_TYPE (TREE_OPERAND (ary, 0))))))
      ary = TREE_OPERAND (ary, 0);
  
    tree oldidx = TREE_OPERAND (t, 1);
*************** potential_constant_expression_1 (tree t,
*** 8777,8783 ****
  	  }
  	else if (fun)
            {
! 	    if (RECUR (fun, FUNCTION_POINTER_TYPE_P (fun) ? rval : any))
  	      /* Might end up being a constant function pointer.  But it
  		 could also be a function object with constexpr op(), so
  		 we pass 'any' so that the underlying VAR_DECL is deemed
--- 8778,8789 ----
  	  }
  	else if (fun)
            {
! 	    if (TREE_TYPE (fun)
! 		&& FUNCTION_POINTER_TYPE_P (TREE_TYPE (fun)))
! 	      want_rval = rval;
! 	    else
! 	      want_rval = any;
! 	    if (RECUR (fun, want_rval))
  	      /* Might end up being a constant function pointer.  But it
  		 could also be a function object with constexpr op(), so
  		 we pass 'any' so that the underlying VAR_DECL is deemed
*************** potential_constant_expression_1 (tree t,
*** 8847,8853 ****
  	  return RECUR (DECL_VALUE_EXPR (t), rval);
  	}
        if (want_rval
! 	  && !var_in_maybe_constexpr_fn (t)
  	  && !type_dependent_expression_p (t)
  	  && !decl_maybe_constant_var_p (t)
  	  && (strict
--- 8853,8859 ----
  	  return RECUR (DECL_VALUE_EXPR (t), rval);
  	}
        if (want_rval
! 	  && (now || !var_in_maybe_constexpr_fn (t))
  	  && !type_dependent_expression_p (t)
  	  && !decl_maybe_constant_var_p (t)
  	  && (strict
*************** potential_constant_expression_1 (tree t,
*** 8956,8962 ****
          STRIP_NOPS (x);
          if (is_this_parameter (x) && !is_capture_proxy (x))
  	  {
! 	    if (!var_in_maybe_constexpr_fn (x))
  	      {
  		if (flags & tf_error)
  		  error_at (loc, "use of % in a constant expression");
--- 8962,8968 ----
          STRIP_NOPS (x);
          if (is_this_parameter (x) && !is_capture_proxy (x))
  	  {
! 	    if (now || !var_in_maybe_constexpr_fn (x))
  	      {
  		if (flags & tf_error)
  		  error_at (loc, "use of % in a constant expression");
diff -Nrcpad gcc-12.3.0/gcc/cp/cp-gimplify.cc gcc-12.4.0/gcc/cp/cp-gimplify.cc
*** gcc-12.3.0/gcc/cp/cp-gimplify.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/cp-gimplify.cc	Thu Jun 20 08:08:06 2024
*************** cxx_omp_clause_apply_fn (tree fn, tree a
*** 2038,2043 ****
--- 2038,2045 ----
  					   TREE_PURPOSE (parm), fn,
  					   i - is_method, tf_warning_or_error);
        t = build_call_a (fn, i, argarray);
+       if (MAYBE_CLASS_TYPE_P (TREE_TYPE (t)))
+ 	t = build_cplus_new (TREE_TYPE (t), t, tf_warning_or_error);
        t = fold_convert (void_type_node, t);
        t = fold_build_cleanup_point_expr (TREE_TYPE (t), t);
        append_to_statement_list (t, &ret);
*************** cxx_omp_clause_apply_fn (tree fn, tree a
*** 2071,2076 ****
--- 2073,2080 ----
  					   TREE_PURPOSE (parm), fn,
  					   i - is_method, tf_warning_or_error);
        t = build_call_a (fn, i, argarray);
+       if (MAYBE_CLASS_TYPE_P (TREE_TYPE (t)))
+ 	t = build_cplus_new (TREE_TYPE (t), t, tf_warning_or_error);
        t = fold_convert (void_type_node, t);
        return fold_build_cleanup_point_expr (TREE_TYPE (t), t);
      }
*************** cp_fold (tree x)
*** 2453,2459 ****
      fold_cache = hash_map::create_ggc (101);
  
    if (tree *cached = fold_cache->get (x))
!     return *cached;
  
    uid_sensitive_constexpr_evaluation_checker c;
  
--- 2457,2470 ----
      fold_cache = hash_map::create_ggc (101);
  
    if (tree *cached = fold_cache->get (x))
!     {
!       /* unshare_expr doesn't recurse into SAVE_EXPRs.  If SAVE_EXPR's
! 	 argument has been folded into a tree invariant, make sure it is
! 	 unshared.  See PR112727.  */
!       if (TREE_CODE (x) == SAVE_EXPR && *cached != x)
! 	return unshare_expr (*cached);
!       return *cached;
!     }
  
    uid_sensitive_constexpr_evaluation_checker c;
  
diff -Nrcpad gcc-12.3.0/gcc/cp/cp-tree.h gcc-12.4.0/gcc/cp/cp-tree.h
*** gcc-12.3.0/gcc/cp/cp-tree.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/cp-tree.h	Thu Jun 20 08:08:06 2024
*************** struct GTY(()) language_function {
*** 2077,2082 ****
--- 2077,2083 ----
  
    BOOL_BITFIELD invalid_constexpr : 1;
    BOOL_BITFIELD throwing_cleanup : 1;
+   BOOL_BITFIELD backward_goto : 1;
  
    hash_table *x_named_labels;
  
*************** extern tree begin_eh_spec_block			(void)
*** 7014,7020 ****
  extern void finish_eh_spec_block		(tree, tree);
  extern tree build_eh_type_type			(tree);
  extern tree cp_protect_cleanup_actions		(void);
! extern void maybe_splice_retval_cleanup		(tree);
  extern tree maybe_set_retval_sentinel		(void);
  
  extern tree template_parms_to_args		(tree);
--- 7015,7021 ----
  extern void finish_eh_spec_block		(tree, tree);
  extern tree build_eh_type_type			(tree);
  extern tree cp_protect_cleanup_actions		(void);
! extern void maybe_splice_retval_cleanup		(tree, bool);
  extern tree maybe_set_retval_sentinel		(void);
  
  extern tree template_parms_to_args		(tree);
*************** extern tree do_auto_deduction
*** 7295,7301 ****
                                                   auto_deduction_context
  						 = adc_unspecified,
  						 tree = NULL_TREE,
! 						 int = LOOKUP_NORMAL);
  extern tree type_uses_auto			(tree);
  extern tree type_uses_auto_or_concept		(tree);
  extern void append_type_to_template_for_access_check (tree, tree, tree,
--- 7296,7303 ----
                                                   auto_deduction_context
  						 = adc_unspecified,
  						 tree = NULL_TREE,
! 						 int = LOOKUP_NORMAL,
! 						 tree = NULL_TREE);
  extern tree type_uses_auto			(tree);
  extern tree type_uses_auto_or_concept		(tree);
  extern void append_type_to_template_for_access_check (tree, tree, tree,
diff -Nrcpad gcc-12.3.0/gcc/cp/decl.cc gcc-12.4.0/gcc/cp/decl.cc
*** gcc-12.3.0/gcc/cp/decl.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/decl.cc	Thu Jun 20 08:08:06 2024
*************** duplicate_decls (tree newdecl, tree oldd
*** 2666,2675 ****
  		  = TINFO_USED_TEMPLATE_ID (new_template_info);
  	    }
  
! 	  if (non_templated_friend_p (olddecl))
! 	    /* Don't copy tinfo from a non-templated friend (PR105761).  */;
! 	  else
! 	    DECL_TEMPLATE_INFO (newdecl) = DECL_TEMPLATE_INFO (olddecl);
  	}
  
        if (DECL_DECLARES_FUNCTION_P (newdecl))
--- 2666,2676 ----
  		  = TINFO_USED_TEMPLATE_ID (new_template_info);
  	    }
  
! 	  /* We don't want to copy template info from a non-templated friend
! 	     (PR105761), but these shouldn't have DECL_TEMPLATE_INFO now.  */
! 	  gcc_checking_assert (!DECL_TEMPLATE_INFO (olddecl)
! 			       || !non_templated_friend_p (olddecl));
! 	  DECL_TEMPLATE_INFO (newdecl) = DECL_TEMPLATE_INFO (olddecl);
  	}
  
        if (DECL_DECLARES_FUNCTION_P (newdecl))
*************** check_goto (tree decl)
*** 3649,3654 ****
--- 3650,3657 ----
        return;
      }
  
+   cp_function_chain->backward_goto = true;
+ 
    bool saw_catch = false, complained = false;
    int identified = 0;
    tree bad;
*************** grokdeclarator (const cp_declarator *dec
*** 12300,12310 ****
  	{
  	  if (typedef_decl)
  	    {
! 	      pedwarn (loc, OPT_Wpedantic, "%qs specified with %qT",
! 		       key, type);
  	      ok = !flag_pedantic_errors;
! 	      type = DECL_ORIGINAL_TYPE (typedef_decl);
! 	      typedef_decl = NULL_TREE;
  	    }
  	  else if (declspecs->decltype_p)
  	    error_at (loc, "%qs specified with %", key);
--- 12303,12316 ----
  	{
  	  if (typedef_decl)
  	    {
! 	      pedwarn (loc, OPT_Wpedantic,
! 		       "%qs specified with typedef-name %qD",
! 		       key, typedef_decl);
  	      ok = !flag_pedantic_errors;
! 	      /* PR108099: __int128_t comes from c_common_nodes_and_builtins,
! 		 and is not built as a typedef.  */
! 	      if (is_typedef_decl (typedef_decl))
! 		type = DECL_ORIGINAL_TYPE (typedef_decl);
  	    }
  	  else if (declspecs->decltype_p)
  	    error_at (loc, "%qs specified with %", key);
*************** grokdeclarator (const cp_declarator *dec
*** 12357,12363 ****
        else if (type == char_type_node)
  	type = unsigned_char_type_node;
        else if (typedef_decl)
! 	type = unsigned_type_for (type);
        else
  	type = unsigned_type_node;
      }
--- 12363,12369 ----
        else if (type == char_type_node)
  	type = unsigned_char_type_node;
        else if (typedef_decl)
! 	type = c_common_unsigned_type (type);
        else
  	type = unsigned_type_node;
      }
*************** grokdeclarator (const cp_declarator *dec
*** 12371,12376 ****
--- 12377,12384 ----
      type = long_integer_type_node;
    else if (short_p)
      type = short_integer_type_node;
+   else if (signed_p && typedef_decl)
+     type = c_common_signed_type (type);
  
    if (decl_spec_seq_has_spec_p (declspecs, ds_complex))
      {
diff -Nrcpad gcc-12.3.0/gcc/cp/except.cc gcc-12.4.0/gcc/cp/except.cc
*** gcc-12.3.0/gcc/cp/except.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/except.cc	Thu Jun 20 08:08:06 2024
*************** maybe_set_retval_sentinel ()
*** 1318,1338 ****
     on throw.  */
  
  void
! maybe_splice_retval_cleanup (tree compound_stmt)
  {
!   /* If we need a cleanup for the return value, add it in at the same level as
       pushdecl_outermost_localscope.  And also in try blocks.  */
!   const bool function_body
!     = (current_binding_level->level_chain
!        && current_binding_level->level_chain->kind == sk_function_parms
!       /* When we're processing a default argument, c_f_d may not have been
! 	 set.  */
!        && current_function_decl);
  
!   if ((function_body || current_binding_level->kind == sk_try)
!       && !DECL_CONSTRUCTOR_P (current_function_decl)
!       && !DECL_DESTRUCTOR_P (current_function_decl)
!       && current_retval_sentinel)
      {
        location_t loc = DECL_SOURCE_LOCATION (current_function_decl);
        tree_stmt_iterator iter = tsi_start (compound_stmt);
--- 1318,1337 ----
     on throw.  */
  
  void
! maybe_splice_retval_cleanup (tree compound_stmt, bool is_try)
  {
!   if (!current_function_decl || !cfun
!       || DECL_CONSTRUCTOR_P (current_function_decl)
!       || DECL_DESTRUCTOR_P (current_function_decl)
!       || !current_retval_sentinel)
!     return;
! 
!   /* if we need a cleanup for the return value, add it in at the same level as
       pushdecl_outermost_localscope.  And also in try blocks.  */
!   cp_binding_level *b = current_binding_level;
!   const bool function_body = b->kind == sk_function_parms;
  
!   if (function_body || is_try)
      {
        location_t loc = DECL_SOURCE_LOCATION (current_function_decl);
        tree_stmt_iterator iter = tsi_start (compound_stmt);
*************** maybe_splice_retval_cleanup (tree compou
*** 1346,1354 ****
  	}
  
        /* Skip past other decls, they can't contain a return.  */
!       while (TREE_CODE (tsi_stmt (iter)) == DECL_EXPR)
  	tsi_next (&iter);
!       gcc_assert (!tsi_end_p (iter));
  
        /* Wrap the rest of the STATEMENT_LIST in a CLEANUP_STMT.  */
        tree stmts = NULL_TREE;
--- 1345,1357 ----
  	}
  
        /* Skip past other decls, they can't contain a return.  */
!       while (!tsi_end_p (iter)
! 	     && TREE_CODE (tsi_stmt (iter)) == DECL_EXPR)
  	tsi_next (&iter);
! 
!       if (tsi_end_p (iter))
! 	/* Nothing to wrap.  */
! 	return;
  
        /* Wrap the rest of the STATEMENT_LIST in a CLEANUP_STMT.  */
        tree stmts = NULL_TREE;
*************** maybe_splice_retval_cleanup (tree compou
*** 1358,1363 ****
--- 1361,1374 ----
  	  tsi_delink (&iter);
  	}
        tree dtor = build_cleanup (retval);
+       if (!function_body)
+ 	{
+ 	  /* Clear the sentinel so we don't try to destroy the retval again on
+ 	     rethrow (c++/112301).  */
+ 	  tree clear = build2 (MODIFY_EXPR, boolean_type_node,
+ 			       current_retval_sentinel, boolean_false_node);
+ 	  dtor = build2 (COMPOUND_EXPR, void_type_node, clear, dtor);
+ 	}
        tree cond = build3 (COND_EXPR, void_type_node, current_retval_sentinel,
  			  dtor, void_node);
        tree cleanup = build_stmt (loc, CLEANUP_STMT,
diff -Nrcpad gcc-12.3.0/gcc/cp/g++spec.cc gcc-12.4.0/gcc/cp/g++spec.cc
*** gcc-12.3.0/gcc/cp/g++spec.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/g++spec.cc	Thu Jun 20 08:08:06 2024
*************** lang_specific_driver (struct cl_decoded_
*** 222,228 ****
--- 222,233 ----
  
  	case OPT_static_libstdc__:
  	  library = library >= 0 ? 2 : library;
+ #ifdef HAVE_LD_STATIC_DYNAMIC
+ 	  /* Remove -static-libstdc++ from the command only if target supports
+ 	     LD_STATIC_DYNAMIC.  When not supported, it is left in so that a
+ 	     back-end target can use outfile substitution.  */
  	  args[i] |= SKIPOPT;
+ #endif
  	  break;
  
  	case OPT_stdlib_:
diff -Nrcpad gcc-12.3.0/gcc/cp/init.cc gcc-12.4.0/gcc/cp/init.cc
*** gcc-12.3.0/gcc/cp/init.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/init.cc	Thu Jun 20 08:08:06 2024
*************** build_zero_init_1 (tree type, tree nelts
*** 189,203 ****
      init = build_zero_cst (type);
    else if (RECORD_OR_UNION_CODE_P (TREE_CODE (type)))
      {
!       tree field;
        vec *v = NULL;
  
        /* Iterate over the fields, building initializations.  */
!       for (field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field))
  	{
  	  if (TREE_CODE (field) != FIELD_DECL)
  	    continue;
  
  	  if (TREE_TYPE (field) == error_mark_node)
  	    continue;
  
--- 189,209 ----
      init = build_zero_cst (type);
    else if (RECORD_OR_UNION_CODE_P (TREE_CODE (type)))
      {
!       tree field, next;
        vec *v = NULL;
  
        /* Iterate over the fields, building initializations.  */
!       for (field = TYPE_FIELDS (type); field; field = next)
  	{
+ 	  next = DECL_CHAIN (field);
+ 
  	  if (TREE_CODE (field) != FIELD_DECL)
  	    continue;
  
+ 	  /* For unions, only the first field is initialized.  */
+ 	  if (TREE_CODE (type) == UNION_TYPE)
+ 	    next = NULL_TREE;
+ 
  	  if (TREE_TYPE (field) == error_mark_node)
  	    continue;
  
*************** build_zero_init_1 (tree type, tree nelts
*** 212,217 ****
--- 218,228 ----
  		continue;
  	    }
  
+ 	  /* Don't add zero width bitfields.  */
+ 	  if (DECL_C_BIT_FIELD (field)
+ 	      && integer_zerop (DECL_SIZE (field)))
+ 	    continue;
+ 
  	  /* Note that for class types there will be FIELD_DECLs
  	     corresponding to base classes as well.  Thus, iterating
  	     over TYPE_FIELDs will result in correct initialization of
*************** build_zero_init_1 (tree type, tree nelts
*** 230,239 ****
  	      if (value)
  		CONSTRUCTOR_APPEND_ELT(v, field, value);
  	    }
- 
- 	  /* For unions, only the first field is initialized.  */
- 	  if (TREE_CODE (type) == UNION_TYPE)
- 	    break;
  	}
  
        /* Build a constructor to contain the initializations.  */
--- 241,246 ----
*************** maybe_instantiate_nsdmi_init (tree membe
*** 572,577 ****
--- 579,588 ----
    tree init = DECL_INITIAL (member);
    if (init && DECL_LANG_SPECIFIC (member) && DECL_TEMPLATE_INFO (member))
      {
+       /* Clear any special tsubst flags; the result of NSDMI instantiation
+ 	 should be independent of the substitution context.  */
+       complain &= tf_warning_or_error;
+ 
        init = DECL_INITIAL (DECL_TI_TEMPLATE (member));
        location_t expr_loc
  	= cp_expr_loc_or_loc (init, DECL_SOURCE_LOCATION (member));
*************** maybe_instantiate_nsdmi_init (tree membe
*** 599,613 ****
  	  bool pushed = false;
  	  tree ctx = DECL_CONTEXT (member);
  
! 	  processing_template_decl_sentinel ptds (/*reset*/false);
  	  if (!currently_open_class (ctx))
  	    {
- 	      if (!LOCAL_CLASS_P (ctx))
- 		push_to_top_level ();
- 	      else
- 		/* push_to_top_level would lose the necessary function context,
- 		   just reset processing_template_decl.  */
- 		processing_template_decl = 0;
  	      push_nested_class (ctx);
  	      push_deferring_access_checks (dk_no_deferred);
  	      pushed = true;
--- 610,618 ----
  	  bool pushed = false;
  	  tree ctx = DECL_CONTEXT (member);
  
! 	  bool push_to_top = maybe_push_to_top_level (member);
  	  if (!currently_open_class (ctx))
  	    {
  	      push_nested_class (ctx);
  	      push_deferring_access_checks (dk_no_deferred);
  	      pushed = true;
*************** maybe_instantiate_nsdmi_init (tree membe
*** 635,643 ****
  	    {
  	      pop_deferring_access_checks ();
  	      pop_nested_class ();
- 	      if (!LOCAL_CLASS_P (ctx))
- 		pop_from_top_level ();
  	    }
  
  	  input_location = sloc;
  	}
--- 640,647 ----
  	    {
  	      pop_deferring_access_checks ();
  	      pop_nested_class ();
  	    }
+ 	  maybe_pop_from_top_level (push_to_top);
  
  	  input_location = sloc;
  	}
*************** build_vec_delete_1 (location_t loc, tree
*** 4154,4160 ****
  
    /* If one destructor throws, keep trying to clean up the rest, unless we're
       already in a build_vec_init cleanup.  */
!   if (flag_exceptions && !in_cleanup && !expr_noexcept_p (tmp, tf_none))
      {
        loop = build2 (TRY_CATCH_EXPR, void_type_node, loop,
  		     unshare_expr (loop));
--- 4158,4165 ----
  
    /* If one destructor throws, keep trying to clean up the rest, unless we're
       already in a build_vec_init cleanup.  */
!   if (flag_exceptions && !in_cleanup && !processing_template_decl
!       && !expr_noexcept_p (tmp, tf_none))
      {
        loop = build2 (TRY_CATCH_EXPR, void_type_node, loop,
  		     unshare_expr (loop));
*************** build_vec_init (tree base, tree maxindex
*** 4755,4761 ****
  	 But for non-classes, that's the same as value-initialization.  */
        if (empty_list)
  	{
! 	  if (cxx_dialect >= cxx11 && AGGREGATE_TYPE_P (type))
  	    {
  	      init = build_constructor (init_list_type_node, NULL);
  	    }
--- 4760,4768 ----
  	 But for non-classes, that's the same as value-initialization.  */
        if (empty_list)
  	{
! 	  if (cxx_dialect >= cxx11
! 	      && (CLASS_TYPE_P (type)
! 		  || TREE_CODE (type) == ARRAY_TYPE))
  	    {
  	      init = build_constructor (init_list_type_node, NULL);
  	    }
diff -Nrcpad gcc-12.3.0/gcc/cp/method.cc gcc-12.4.0/gcc/cp/method.cc
*** gcc-12.3.0/gcc/cp/method.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/method.cc	Thu Jun 20 08:08:06 2024
*************** early_check_defaulted_comparison (tree f
*** 1222,1228 ****
  	  /* Defaulted outside the class body.  */
  	  ctx = TYPE_MAIN_VARIANT (parmtype);
  	  if (!is_friend (ctx, fn))
! 	    error_at (loc, "defaulted %qD is not a friend of %qT", fn, ctx);
  	}
        else if (!same_type_ignoring_top_level_qualifiers_p (parmtype, ctx))
  	saw_bad = true;
--- 1222,1232 ----
  	  /* Defaulted outside the class body.  */
  	  ctx = TYPE_MAIN_VARIANT (parmtype);
  	  if (!is_friend (ctx, fn))
! 	    {
! 	      error_at (loc, "defaulted %qD is not a friend of %qT", fn, ctx);
! 	      inform (location_of (ctx), "declared here");
! 	      ok = false;
! 	    }
  	}
        else if (!same_type_ignoring_top_level_qualifiers_p (parmtype, ctx))
  	saw_bad = true;
diff -Nrcpad gcc-12.3.0/gcc/cp/name-lookup.cc gcc-12.4.0/gcc/cp/name-lookup.cc
*** gcc-12.3.0/gcc/cp/name-lookup.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/name-lookup.cc	Thu Jun 20 08:08:06 2024
*************** pop_from_top_level (void)
*** 8451,8456 ****
--- 8451,8493 ----
    free_saved_scope = s;
  }
  
+ /* Like push_to_top_level, but not if D is function-local.  Returns whether we
+    did push to top.  */
+ 
+ bool
+ maybe_push_to_top_level (tree d)
+ {
+   /* Push if D isn't function-local, or is a lambda function, for which name
+      resolution is already done.  */
+   bool push_to_top
+     = !(current_function_decl
+ 	&& !LAMBDA_FUNCTION_P (d)
+ 	&& decl_function_context (d) == current_function_decl);
+ 
+   if (push_to_top)
+     push_to_top_level ();
+   else
+     {
+       gcc_assert (!processing_template_decl);
+       push_function_context ();
+       cp_unevaluated_operand = 0;
+       c_inhibit_evaluation_warnings = 0;
+     }
+ 
+   return push_to_top;
+ }
+ 
+ /* Return from whatever maybe_push_to_top_level did.  */
+ 
+ void
+ maybe_pop_from_top_level (bool push_to_top)
+ {
+   if (push_to_top)
+     pop_from_top_level ();
+   else
+     pop_function_context ();
+ }
+ 
  /* Push into the scope of the namespace NS, even if it is deeply
     nested within another namespace.  */
  
diff -Nrcpad gcc-12.3.0/gcc/cp/name-lookup.h gcc-12.4.0/gcc/cp/name-lookup.h
*** gcc-12.3.0/gcc/cp/name-lookup.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/name-lookup.h	Thu Jun 20 08:08:06 2024
*************** extern void push_nested_namespace (tree)
*** 468,473 ****
--- 468,475 ----
  extern void pop_nested_namespace (tree);
  extern void push_to_top_level (void);
  extern void pop_from_top_level (void);
+ extern bool maybe_push_to_top_level (tree);
+ extern void maybe_pop_from_top_level (bool);
  extern void push_using_decl_bindings (tree, tree);
  
  /* Lower level interface for modules. */
diff -Nrcpad gcc-12.3.0/gcc/cp/parser.cc gcc-12.4.0/gcc/cp/parser.cc
*** gcc-12.3.0/gcc/cp/parser.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/parser.cc	Thu Jun 20 08:08:06 2024
*************** static cp_token_cache *cp_token_cache_ne
*** 249,255 ****
  static tree cp_parser_late_noexcept_specifier
    (cp_parser *, tree);
  static void noexcept_override_late_checks
!   (tree, tree);
  
  static void cp_parser_initial_pragma
    (cp_token *);
--- 249,255 ----
  static tree cp_parser_late_noexcept_specifier
    (cp_parser *, tree);
  static void noexcept_override_late_checks
!   (tree);
  
  static void cp_parser_initial_pragma
    (cp_token *);
*************** static tree cp_parser_objc_struct_declar
*** 2660,2666 ****
  /* Utility Routines */
  
  static cp_expr cp_parser_lookup_name
!   (cp_parser *, tree, enum tag_types, bool, bool, bool, tree *, location_t);
  static tree cp_parser_lookup_name_simple
    (cp_parser *, tree, location_t);
  static tree cp_parser_maybe_treat_template_as_class
--- 2660,2666 ----
  /* Utility Routines */
  
  static cp_expr cp_parser_lookup_name
!   (cp_parser *, tree, enum tag_types, int, bool, bool, tree *, location_t);
  static tree cp_parser_lookup_name_simple
    (cp_parser *, tree, location_t);
  static tree cp_parser_maybe_treat_template_as_class
*************** cp_parser_lambda_declarator_opt (cp_pars
*** 11513,11523 ****
       an opening angle if present.  */
    if (cp_lexer_next_token_is (parser->lexer, CPP_LESS))
      {
!       if (cxx_dialect < cxx14)
! 	pedwarn (parser->lexer->next_token->location, OPT_Wc__14_extensions,
! 		 "lambda templates are only available with "
! 		 "%<-std=c++14%> or %<-std=gnu++14%>");
!       else if (pedantic && cxx_dialect < cxx20)
  	pedwarn (parser->lexer->next_token->location, OPT_Wc__20_extensions,
  		 "lambda templates are only available with "
  		 "%<-std=c++20%> or %<-std=gnu++20%>");
--- 11513,11520 ----
       an opening angle if present.  */
    if (cp_lexer_next_token_is (parser->lexer, CPP_LESS))
      {
!       if (cxx_dialect < cxx20
! 	  && (pedantic || cxx_dialect < cxx14))
  	pedwarn (parser->lexer->next_token->location, OPT_Wc__20_extensions,
  		 "lambda templates are only available with "
  		 "%<-std=c++20%> or %<-std=gnu++20%>");
*************** cp_parser_template_name (cp_parser* pars
*** 18590,18596 ****
    /* Look up the name.  */
    decl = cp_parser_lookup_name (parser, identifier,
  				tag_type,
! 				/*is_template=*/true,
  				/*is_namespace=*/false,
  				check_dependency_p,
  				/*ambiguous_decls=*/NULL,
--- 18587,18593 ----
    /* Look up the name.  */
    decl = cp_parser_lookup_name (parser, identifier,
  				tag_type,
! 				/*is_template=*/1 + template_keyword_p,
  				/*is_namespace=*/false,
  				check_dependency_p,
  				/*ambiguous_decls=*/NULL,
*************** cp_parser_class_specifier_1 (cp_parser*
*** 26151,26157 ****
  	  /* The finish_struct call above performed various override checking,
  	     but it skipped unparsed noexcept-specifier operands.  Now that we
  	     have resolved them, check again.  */
! 	  noexcept_override_late_checks (type, decl);
  
  	  /* Remove any member-function parameters from the symbol table.  */
  	  pop_injected_parms ();
--- 26148,26154 ----
  	  /* The finish_struct call above performed various override checking,
  	     but it skipped unparsed noexcept-specifier operands.  Now that we
  	     have resolved them, check again.  */
! 	  noexcept_override_late_checks (decl);
  
  	  /* Remove any member-function parameters from the symbol table.  */
  	  pop_injected_parms ();
*************** cp_parser_late_noexcept_specifier (cp_pa
*** 27876,27889 ****
  }
  
  /* Perform late checking of overriding function with respect to their
!    noexcept-specifiers.  TYPE is the class and FNDECL is the function
!    that potentially overrides some virtual function with the same
!    signature.  */
  
  static void
! noexcept_override_late_checks (tree type, tree fndecl)
  {
!   tree binfo = TYPE_BINFO (type);
    tree base_binfo;
  
    if (DECL_STATIC_FUNCTION_P (fndecl))
--- 27873,27885 ----
  }
  
  /* Perform late checking of overriding function with respect to their
!    noexcept-specifiers.  FNDECL is the member function that potentially
!    overrides some virtual function with the same signature.  */
  
  static void
! noexcept_override_late_checks (tree fndecl)
  {
!   tree binfo = TYPE_BINFO (DECL_CONTEXT (fndecl));
    tree base_binfo;
  
    if (DECL_STATIC_FUNCTION_P (fndecl))
*************** prefer_type_arg (tag_types tag_type)
*** 30389,30395 ****
     refer to types are ignored.
  
     If IS_TEMPLATE is TRUE, bindings that do not refer to templates are
!    ignored.
  
     If IS_NAMESPACE is TRUE, bindings that do not refer to namespaces
     are ignored.
--- 30385,30391 ----
     refer to types are ignored.
  
     If IS_TEMPLATE is TRUE, bindings that do not refer to templates are
!    ignored.  If IS_TEMPLATE IS 2, the 'template' keyword was specified.
  
     If IS_NAMESPACE is TRUE, bindings that do not refer to namespaces
     are ignored.
*************** prefer_type_arg (tag_types tag_type)
*** 30404,30410 ****
  static cp_expr
  cp_parser_lookup_name (cp_parser *parser, tree name,
  		       enum tag_types tag_type,
! 		       bool is_template,
  		       bool is_namespace,
  		       bool check_dependency,
  		       tree *ambiguous_decls,
--- 30400,30406 ----
  static cp_expr
  cp_parser_lookup_name (cp_parser *parser, tree name,
  		       enum tag_types tag_type,
! 		       int is_template,
  		       bool is_namespace,
  		       bool check_dependency,
  		       tree *ambiguous_decls,
*************** cp_parser_lookup_name (cp_parser *parser
*** 30589,30595 ****
        else
  	decl = NULL_TREE;
  
!       if (!decl)
  	/* Look it up in the enclosing context.  DR 141: When looking for a
  	   template-name after -> or ., only consider class templates.  */
  	decl = lookup_name (name, is_namespace ? LOOK_want::NAMESPACE
--- 30585,30598 ----
        else
  	decl = NULL_TREE;
  
!       /* If we didn't find a member and have dependent bases, the member lookup
! 	 is now dependent.  */
!       if (!dep && !decl && any_dependent_bases_p (object_type))
! 	dep = true;
! 
!       if (dep && is_template == 2)
! 	/* The template keyword specifies a dependent template.  */;
!       else if (!decl)
  	/* Look it up in the enclosing context.  DR 141: When looking for a
  	   template-name after -> or ., only consider class templates.  */
  	decl = lookup_name (name, is_namespace ? LOOK_want::NAMESPACE
*************** cp_parser_lookup_name (cp_parser *parser
*** 30602,30609 ****
  
        /* If we know we're looking for a type (e.g. A in p->A::x),
  	 mock up a typename.  */
!       if (!decl && object_type && tag_type != none_type
! 	  && dependentish_scope_p (object_type))
  	{
  	  tree type = build_typename_type (object_type, name, name,
  					   typename_type);
--- 30605,30611 ----
  
        /* If we know we're looking for a type (e.g. A in p->A::x),
  	 mock up a typename.  */
!       if (!decl && dep && tag_type != none_type)
  	{
  	  tree type = build_typename_type (object_type, name, name,
  					   typename_type);
*************** cp_parser_pragma_unroll (cp_parser *pars
*** 47664,47670 ****
    location_t location = cp_lexer_peek_token (parser->lexer)->location;
    tree expr = cp_parser_constant_expression (parser);
    unsigned short unroll;
!   expr = maybe_constant_value (expr);
    HOST_WIDE_INT lunroll = 0;
    if (!INTEGRAL_TYPE_P (TREE_TYPE (expr))
        || TREE_CODE (expr) != INTEGER_CST
--- 47666,47672 ----
    location_t location = cp_lexer_peek_token (parser->lexer)->location;
    tree expr = cp_parser_constant_expression (parser);
    unsigned short unroll;
!   expr = fold_non_dependent_expr (expr);
    HOST_WIDE_INT lunroll = 0;
    if (!INTEGRAL_TYPE_P (TREE_TYPE (expr))
        || TREE_CODE (expr) != INTEGER_CST
diff -Nrcpad gcc-12.3.0/gcc/cp/pt.cc gcc-12.4.0/gcc/cp/pt.cc
*** gcc-12.3.0/gcc/cp/pt.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/pt.cc	Thu Jun 20 08:08:06 2024
*************** find_parameter_packs_r (tree *tp, int *w
*** 4106,4115 ****
      case TAG_DEFN:
        t = TREE_TYPE (t);
        if (CLASS_TYPE_P (t))
! 	/* Local class, need to look through the whole definition.  */
! 	for (tree bb : BINFO_BASE_BINFOS (TYPE_BINFO (t)))
! 	  cp_walk_tree (&BINFO_TYPE (bb), &find_parameter_packs_r,
! 			ppd, ppd->visited);
        else
  	/* Enum, look at the values.  */
  	for (tree l = TYPE_VALUES (t); l; l = TREE_CHAIN (l))
--- 4106,4119 ----
      case TAG_DEFN:
        t = TREE_TYPE (t);
        if (CLASS_TYPE_P (t))
! 	{
! 	  /* Local class, need to look through the whole definition.
! 	     TYPE_BINFO might be unset for a partial instantiation.  */
! 	  if (TYPE_BINFO (t))
! 	    for (tree bb : BINFO_BASE_BINFOS (TYPE_BINFO (t)))
! 	      cp_walk_tree (&BINFO_TYPE (bb), &find_parameter_packs_r,
! 			    ppd, ppd->visited);
! 	}
        else
  	/* Enum, look at the values.  */
  	for (tree l = TYPE_VALUES (t); l; l = TREE_CHAIN (l))
*************** canonicalize_expr_argument (tree arg, ts
*** 8322,8328 ****
     constrained than the parameter.  */
  
  static bool
! is_compatible_template_arg (tree parm, tree arg)
  {
    tree parm_cons = get_constraints (parm);
  
--- 8326,8332 ----
     constrained than the parameter.  */
  
  static bool
! is_compatible_template_arg (tree parm, tree arg, tree args)
  {
    tree parm_cons = get_constraints (parm);
  
*************** is_compatible_template_arg (tree parm, t
*** 8343,8348 ****
--- 8347,8353 ----
      {
        tree aparms = DECL_INNERMOST_TEMPLATE_PARMS (arg);
        new_args = template_parms_level_to_args (aparms);
+       new_args = add_to_template_args (args, new_args);
        ++processing_template_decl;
        parm_cons = tsubst_constraint_info (parm_cons, new_args,
  					  tf_none, NULL_TREE);
*************** convert_template_argument (tree parm,
*** 8601,8607 ****
                // Check that the constraints are compatible before allowing the
                // substitution.
                if (val != error_mark_node)
!                 if (!is_compatible_template_arg (parm, arg))
                    {
  		    if (in_decl && (complain & tf_error))
                        {
--- 8606,8612 ----
                // Check that the constraints are compatible before allowing the
                // substitution.
                if (val != error_mark_node)
! 		if (!is_compatible_template_arg (parm, arg, args))
                    {
  		    if (in_decl && (complain & tf_error))
                        {
*************** convert_template_argument (tree parm,
*** 8636,8642 ****
        else if (tree a = type_uses_auto (t))
  	{
  	  t = do_auto_deduction (t, arg, a, complain, adc_unify, args,
! 				 LOOKUP_IMPLICIT);
  	  if (t == error_mark_node)
  	    return error_mark_node;
  	}
--- 8641,8647 ----
        else if (tree a = type_uses_auto (t))
  	{
  	  t = do_auto_deduction (t, arg, a, complain, adc_unify, args,
! 				 LOOKUP_IMPLICIT, /*tmpl=*/in_decl);
  	  if (t == error_mark_node)
  	    return error_mark_node;
  	}
*************** tsubst_friend_function (tree decl, tree
*** 11339,11347 ****
        tree new_friend_template_info = DECL_TEMPLATE_INFO (new_friend);
        tree new_friend_result_template_info = NULL_TREE;
        bool new_friend_is_defn =
! 	(DECL_INITIAL (DECL_TEMPLATE_RESULT
! 		       (template_for_substitution (new_friend)))
! 	 != NULL_TREE);
        tree not_tmpl = new_friend;
  
        if (TREE_CODE (new_friend) == TEMPLATE_DECL)
--- 11344,11353 ----
        tree new_friend_template_info = DECL_TEMPLATE_INFO (new_friend);
        tree new_friend_result_template_info = NULL_TREE;
        bool new_friend_is_defn =
! 	(new_friend_template_info
! 	 && (DECL_INITIAL (DECL_TEMPLATE_RESULT
! 			   (template_for_substitution (new_friend)))
! 	     != NULL_TREE));
        tree not_tmpl = new_friend;
  
        if (TREE_CODE (new_friend) == TEMPLATE_DECL)
*************** tsubst_function_decl (tree t, tree args,
*** 14175,14180 ****
--- 14181,14190 ----
  	  && !LAMBDA_FUNCTION_P (t))
  	return t;
  
+       /* A non-templated friend doesn't get DECL_TEMPLATE_INFO.  */
+       if (non_templated_friend_p (t))
+ 	goto friend_case;
+ 
        /* Calculate the most general template of which R is a
  	 specialization.  */
        gen_tmpl = most_general_template (DECL_TI_TEMPLATE (t));
*************** tsubst_function_decl (tree t, tree args,
*** 14220,14225 ****
--- 14230,14236 ----
  	 tsubst_friend_function, and we want only to create a
  	 new decl (R) with appropriate types so that we can call
  	 determine_specialization.  */
+     friend_case:
        gen_tmpl = NULL_TREE;
        argvec = NULL_TREE;
      }
*************** tsubst_function_decl (tree t, tree args,
*** 14415,14421 ****
        /* If this is an instantiation of a member template, clone it.
  	 If it isn't, that'll be handled by
  	 clone_constructors_and_destructors.  */
!       if (PRIMARY_TEMPLATE_P (gen_tmpl))
  	clone_cdtor (r, /*update_methods=*/false);
      }
    else if ((complain & tf_error) != 0
--- 14426,14432 ----
        /* If this is an instantiation of a member template, clone it.
  	 If it isn't, that'll be handled by
  	 clone_constructors_and_destructors.  */
!       if (gen_tmpl && PRIMARY_TEMPLATE_P (gen_tmpl))
  	clone_cdtor (r, /*update_methods=*/false);
      }
    else if ((complain & tf_error) != 0
*************** tsubst_function_decl (tree t, tree args,
*** 14433,14438 ****
--- 14444,14450 ----
      }
    determine_visibility (r);
    if (DECL_DEFAULTED_OUTSIDE_CLASS_P (r)
+       && COMPLETE_TYPE_P (DECL_CONTEXT (r))
        && !processing_template_decl)
      defaulted_late_check (r);
  
*************** tsubst_decl (tree t, tree args, tsubst_f
*** 15022,15028 ****
  		if (argvec != error_mark_node)
  		  argvec = (coerce_innermost_template_parms
  			    (DECL_TEMPLATE_PARMS (gen_tmpl),
! 			     argvec, t, complain,
  			     /*all*/true, /*defarg*/true));
  		if (argvec == error_mark_node)
  		  RETURN (error_mark_node);
--- 15034,15040 ----
  		if (argvec != error_mark_node)
  		  argvec = (coerce_innermost_template_parms
  			    (DECL_TEMPLATE_PARMS (gen_tmpl),
! 			     argvec, tmpl, complain,
  			     /*all*/true, /*defarg*/true));
  		if (argvec == error_mark_node)
  		  RETURN (error_mark_node);
*************** tsubst_expr (tree t, tree args, tsubst_f
*** 19604,19616 ****
  				    templated_operator_saved_lookups (t),
  				    complain));
  
-     case ANNOTATE_EXPR:
-       tmp = RECUR (TREE_OPERAND (t, 0));
-       RETURN (build3_loc (EXPR_LOCATION (t), ANNOTATE_EXPR,
- 			  TREE_TYPE (tmp), tmp,
- 			  RECUR (TREE_OPERAND (t, 1)),
- 			  RECUR (TREE_OPERAND (t, 2))));
- 
      case PREDICT_EXPR:
        RETURN (add_stmt (copy_node (t)));
  
--- 19616,19621 ----
*************** tsubst_copy_and_build (tree t,
*** 21530,21535 ****
--- 21535,21547 ----
  	 with constant operands.  */
        RETURN (t);
  
+     case ANNOTATE_EXPR:
+       op1 = RECUR (TREE_OPERAND (t, 0));
+       RETURN (build3_loc (EXPR_LOCATION (t), ANNOTATE_EXPR,
+ 			  TREE_TYPE (op1), op1,
+ 			  RECUR (TREE_OPERAND (t, 1)),
+ 			  RECUR (TREE_OPERAND (t, 2))));
+ 
      case NON_LVALUE_EXPR:
      case VIEW_CONVERT_EXPR:
        if (location_wrapper_p (t))
*************** unify (tree tparms, tree targs, tree par
*** 24449,24455 ****
  	  if (tree a = type_uses_auto (tparm))
  	    {
  	      tparm = do_auto_deduction (tparm, arg, a,
! 					 complain, adc_unify, targs);
  	      if (tparm == error_mark_node)
  		return 1;
  	    }
--- 24461,24469 ----
  	  if (tree a = type_uses_auto (tparm))
  	    {
  	      tparm = do_auto_deduction (tparm, arg, a,
! 					 complain, adc_unify, targs,
! 					 LOOKUP_NORMAL,
! 					 TPARMS_PRIMARY_TEMPLATE (tparms));
  	      if (tparm == error_mark_node)
  		return 1;
  	    }
*************** instantiate_body (tree pattern, tree arg
*** 26493,26512 ****
    if (current_function_decl)
      save_omp_privatization_clauses (omp_privatization_save);
  
!   bool push_to_top
!     = !(current_function_decl
! 	&& !LAMBDA_FUNCTION_P (d)
! 	&& decl_function_context (d) == current_function_decl);
! 
!   if (push_to_top)
!     push_to_top_level ();
!   else
!     {
!       gcc_assert (!processing_template_decl);
!       push_function_context ();
!       cp_unevaluated_operand = 0;
!       c_inhibit_evaluation_warnings = 0;
!     }
  
    if (VAR_P (d))
      {
--- 26507,26513 ----
    if (current_function_decl)
      save_omp_privatization_clauses (omp_privatization_save);
  
!   bool push_to_top = maybe_push_to_top_level (d);
  
    if (VAR_P (d))
      {
*************** instantiate_body (tree pattern, tree arg
*** 26619,26628 ****
    if (!nested_p)
      TI_PENDING_TEMPLATE_FLAG (DECL_TEMPLATE_INFO (d)) = 0;
  
!   if (push_to_top)
!     pop_from_top_level ();
!   else
!     pop_function_context ();
  
    if (current_function_decl)
      restore_omp_privatization_clauses (omp_privatization_save);
--- 26620,26626 ----
    if (!nested_p)
      TI_PENDING_TEMPLATE_FLAG (DECL_TEMPLATE_INFO (d)) = 0;
  
!   maybe_pop_from_top_level (push_to_top);
  
    if (current_function_decl)
      restore_omp_privatization_clauses (omp_privatization_save);
*************** value_dependent_expression_p (tree expre
*** 27644,27652 ****
      case VAR_DECL:
         /* A constant with literal type and is initialized
  	  with an expression that is value-dependent.  */
!       if (DECL_DEPENDENT_INIT_P (expression)
! 	  /* FIXME cp_finish_decl doesn't fold reference initializers.  */
! 	  || TYPE_REF_P (TREE_TYPE (expression)))
  	return true;
        if (DECL_HAS_VALUE_EXPR_P (expression))
  	{
--- 27642,27648 ----
      case VAR_DECL:
         /* A constant with literal type and is initialized
  	  with an expression that is value-dependent.  */
!       if (DECL_DEPENDENT_INIT_P (expression))
  	return true;
        if (DECL_HAS_VALUE_EXPR_P (expression))
  	{
*************** value_dependent_expression_p (tree expre
*** 27661,27666 ****
--- 27657,27665 ----
  		  && value_expr == error_mark_node))
  	    return true;
  	}
+       else if (TYPE_REF_P (TREE_TYPE (expression)))
+ 	/* FIXME cp_finish_decl doesn't fold reference initializers.  */
+ 	return true;
        return false;
  
      case DYNAMIC_CAST_EXPR:
*************** do_class_deduction (tree ptype, tree tmp
*** 30334,30346 ****
     adc_requirement contexts to communicate the necessary template arguments
     to satisfaction.  OUTER_TARGS is ignored in other contexts.
  
!    For partial-concept-ids, extra args may be appended to the list of deduced
!    template arguments prior to determining constraint satisfaction.  */
  
  tree
  do_auto_deduction (tree type, tree init, tree auto_node,
!                    tsubst_flags_t complain, auto_deduction_context context,
! 		   tree outer_targs, int flags)
  {
    if (init == error_mark_node)
      return error_mark_node;
--- 30333,30352 ----
     adc_requirement contexts to communicate the necessary template arguments
     to satisfaction.  OUTER_TARGS is ignored in other contexts.
  
!    Additionally for adc_unify contexts TMPL is the template for which TYPE
!    is a template parameter type.
! 
!    For partial-concept-ids, extra args from OUTER_TARGS, TMPL and the current
!    scope may be appended to the list of deduced template arguments prior to
!    determining constraint satisfaction as appropriate.  */
  
  tree
  do_auto_deduction (tree type, tree init, tree auto_node,
! 		   tsubst_flags_t complain /* = tf_warning_or_error */,
! 		   auto_deduction_context context /* = adc_unspecified */,
! 		   tree outer_targs /* = NULL_TREE */,
! 		   int flags /* = LOOKUP_NORMAL */,
! 		   tree tmpl /* = NULL_TREE */)
  {
    if (init == error_mark_node)
      return error_mark_node;
*************** do_auto_deduction (tree type, tree init,
*** 30359,30367 ****
       auto_node.  */
    complain &= ~tf_partial;
  
!   if (tree tmpl = CLASS_PLACEHOLDER_TEMPLATE (auto_node))
      /* C++17 class template argument deduction.  */
!     return do_class_deduction (type, tmpl, init, flags, complain);
  
    if (init == NULL_TREE || TREE_TYPE (init) == NULL_TREE)
      /* Nothing we can do with this, even in deduction context.  */
--- 30365,30373 ----
       auto_node.  */
    complain &= ~tf_partial;
  
!   if (tree ctmpl = CLASS_PLACEHOLDER_TEMPLATE (auto_node))
      /* C++17 class template argument deduction.  */
!     return do_class_deduction (type, ctmpl, init, flags, complain);
  
    if (init == NULL_TREE || TREE_TYPE (init) == NULL_TREE)
      /* Nothing we can do with this, even in deduction context.  */
*************** do_auto_deduction (tree type, tree init,
*** 30521,30527 ****
  		}
  	    }
  
!       tree full_targs = add_to_template_args (outer_targs, targs);
  
        /* HACK: Compensate for callers not always communicating all levels of
  	 outer template arguments by filling in the outermost missing levels
--- 30527,30536 ----
  		}
  	    }
  
!       tree full_targs = outer_targs;
!       if (context == adc_unify && tmpl)
! 	full_targs = add_outermost_template_args (tmpl, full_targs);
!       full_targs = add_to_template_args (full_targs, targs);
  
        /* HACK: Compensate for callers not always communicating all levels of
  	 outer template arguments by filling in the outermost missing levels
diff -Nrcpad gcc-12.3.0/gcc/cp/semantics.cc gcc-12.4.0/gcc/cp/semantics.cc
*** gcc-12.3.0/gcc/cp/semantics.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/semantics.cc	Thu Jun 20 08:08:06 2024
*************** set_cleanup_locs (tree stmts, location_t
*** 627,632 ****
--- 627,643 ----
        set_cleanup_locs (stmt, loc);
  }
  
+ /* True iff the innermost block scope is a try block.  */
+ 
+ static bool
+ at_try_scope ()
+ {
+   cp_binding_level *b = current_binding_level;
+   while (b && b->kind == sk_cleanup)
+     b = b->level_chain;
+   return b && b->kind == sk_try;
+ }
+ 
  /* Finish a scope.  */
  
  tree
*************** do_poplevel (tree stmt_list)
*** 634,644 ****
  {
    tree block = NULL;
  
!   maybe_splice_retval_cleanup (stmt_list);
  
    if (stmts_are_full_exprs_p ())
      block = poplevel (kept_level_p (), 1, 0);
  
    stmt_list = pop_stmt_list (stmt_list);
  
    /* input_location is the last token of the scope, usually a }.  */
--- 645,658 ----
  {
    tree block = NULL;
  
!   bool was_try = at_try_scope ();
  
    if (stmts_are_full_exprs_p ())
      block = poplevel (kept_level_p (), 1, 0);
  
+   /* This needs to come after poplevel merges sk_cleanup statement_lists.  */
+   maybe_splice_retval_cleanup (stmt_list, was_try);
+ 
    stmt_list = pop_stmt_list (stmt_list);
  
    /* input_location is the last token of the scope, usually a }.  */
*************** simplify_loop_decl_cond (tree *cond_p, t
*** 786,792 ****
    *cond_p = boolean_true_node;
  
    if_stmt = begin_if_stmt ();
!   cond = cp_build_unary_op (TRUTH_NOT_EXPR, cond, false, tf_warning_or_error);
    finish_if_stmt_cond (cond, if_stmt);
    finish_break_stmt ();
    finish_then_clause (if_stmt);
--- 800,810 ----
    *cond_p = boolean_true_node;
  
    if_stmt = begin_if_stmt ();
!   cond_p = &cond;
!   while (TREE_CODE (*cond_p) == ANNOTATE_EXPR)
!     cond_p = &TREE_OPERAND (*cond_p, 0);
!   *cond_p = cp_build_unary_op (TRUTH_NOT_EXPR, *cond_p, false,
! 			       tf_warning_or_error);
    finish_if_stmt_cond (cond, if_stmt);
    finish_break_stmt ();
    finish_then_clause (if_stmt);
*************** tree
*** 1012,1017 ****
--- 1030,1036 ----
  finish_if_stmt_cond (tree cond, tree if_stmt)
  {
    cond = maybe_convert_cond (cond);
+   maybe_warn_for_constant_evaluated (cond, IF_STMT_CONSTEXPR_P (if_stmt));
    if (IF_STMT_CONSTEXPR_P (if_stmt)
        && !type_dependent_expression_p (cond)
        && require_constant_expression (cond)
*************** finish_if_stmt_cond (tree cond, tree if_
*** 1020,1031 ****
  	 converted to bool.  */
        && TYPE_MAIN_VARIANT (TREE_TYPE (cond)) == boolean_type_node)
      {
-       maybe_warn_for_constant_evaluated (cond, /*constexpr_if=*/true);
        cond = instantiate_non_dependent_expr (cond);
        cond = cxx_constant_value (cond, NULL_TREE);
      }
-   else
-     maybe_warn_for_constant_evaluated (cond, /*constexpr_if=*/false);
    finish_cond (&IF_COND (if_stmt), cond);
    add_stmt (if_stmt);
    THEN_CLAUSE (if_stmt) = push_stmt_list ();
--- 1039,1047 ----
*************** public:
*** 4829,4834 ****
--- 4845,4851 ----
    tree var;
    tree result;
    hash_table > visited;
+   bool in_nrv_cleanup;
  };
  
  /* Helper function for walk_tree, used by finalize_nrv below.  */
*************** finalize_nrv_r (tree* tp, int* walk_subt
*** 4845,4858 ****
      *walk_subtrees = 0;
    /* Change all returns to just refer to the RESULT_DECL; this is a nop,
       but differs from using NULL_TREE in that it indicates that we care
!      about the value of the RESULT_DECL.  */
    else if (TREE_CODE (*tp) == RETURN_EXPR)
!     TREE_OPERAND (*tp, 0) = dp->result;
    /* Change all cleanups for the NRV to only run when an exception is
       thrown.  */
    else if (TREE_CODE (*tp) == CLEANUP_STMT
  	   && CLEANUP_DECL (*tp) == dp->var)
!     CLEANUP_EH_ONLY (*tp) = 1;
    /* Replace the DECL_EXPR for the NRV with an initialization of the
       RESULT_DECL, if needed.  */
    else if (TREE_CODE (*tp) == DECL_EXPR
--- 4862,4912 ----
      *walk_subtrees = 0;
    /* Change all returns to just refer to the RESULT_DECL; this is a nop,
       but differs from using NULL_TREE in that it indicates that we care
!      about the value of the RESULT_DECL.  But preserve anything appended
!      by check_return_expr.  */
    else if (TREE_CODE (*tp) == RETURN_EXPR)
!     {
!       tree *p = &TREE_OPERAND (*tp, 0);
!       while (TREE_CODE (*p) == COMPOUND_EXPR)
! 	p = &TREE_OPERAND (*p, 0);
!       gcc_checking_assert (TREE_CODE (*p) == INIT_EXPR
! 			   && TREE_OPERAND (*p, 0) == dp->result);
!       *p = dp->result;
!     }
    /* Change all cleanups for the NRV to only run when an exception is
       thrown.  */
    else if (TREE_CODE (*tp) == CLEANUP_STMT
  	   && CLEANUP_DECL (*tp) == dp->var)
!     {
!       dp->in_nrv_cleanup = true;
!       cp_walk_tree (&CLEANUP_BODY (*tp), finalize_nrv_r, data, 0);
!       dp->in_nrv_cleanup = false;
!       cp_walk_tree (&CLEANUP_EXPR (*tp), finalize_nrv_r, data, 0);
!       *walk_subtrees = 0;
! 
!       CLEANUP_EH_ONLY (*tp) = true;
! 
!       /* If a cleanup might throw, we need to clear current_retval_sentinel on
! 	 the exception path so an outer cleanup added by
! 	 maybe_splice_retval_cleanup doesn't run.  */
!       if (current_retval_sentinel
! 	  && cp_function_chain->throwing_cleanup)
! 	{
! 	  tree clear = build2 (MODIFY_EXPR, boolean_type_node,
! 			       current_retval_sentinel,
! 			       boolean_false_node);
! 
! 	  /* We're already only on the EH path, just prepend it.  */
! 	  tree &exp = CLEANUP_EXPR (*tp);
! 	  exp = build2 (COMPOUND_EXPR, void_type_node, clear, exp);
! 	}
!     }
!   /* Disable maybe_splice_retval_cleanup within the NRV cleanup scope, we don't
!      want to destroy the retval before the variable goes out of scope.  */
!   else if (TREE_CODE (*tp) == CLEANUP_STMT
! 	   && dp->in_nrv_cleanup
! 	   && CLEANUP_DECL (*tp) == dp->result)
!     CLEANUP_EXPR (*tp) = void_node;
    /* Replace the DECL_EXPR for the NRV with an initialization of the
       RESULT_DECL, if needed.  */
    else if (TREE_CODE (*tp) == DECL_EXPR
*************** finalize_nrv (tree *tp, tree var, tree r
*** 4908,4913 ****
--- 4962,4968 ----
  
    data.var = var;
    data.result = result;
+   data.in_nrv_cleanup = false;
    cp_walk_tree (tp, finalize_nrv_r, &data, 0);
  }
  
*************** check_trait_type (tree type)
*** 11981,11986 ****
--- 12036,12073 ----
    return !!complete_type_or_else (strip_array_types (type), NULL_TREE);
  }
  
+ /* True iff the conversion (if any) would be a direct reference
+    binding, not requiring complete types.  This is LWG2939.  */
+ 
+ static bool
+ same_type_ref_bind_p (cp_trait_kind kind, tree type1, tree type2)
+ {
+   tree from, to;
+   switch (kind)
+     {
+       /* These put the target type first.  */
+     case CPTK_IS_CONSTRUCTIBLE:
+     case CPTK_IS_NOTHROW_CONSTRUCTIBLE:
+     case CPTK_IS_TRIVIALLY_CONSTRUCTIBLE:
+       to = type1;
+       from = type2;
+       break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
+   if (TREE_CODE (to) != REFERENCE_TYPE || !from)
+     return false;
+   if (TREE_CODE (from) == TREE_VEC && TREE_VEC_LENGTH (from) == 1)
+     from = TREE_VEC_ELT (from, 0);
+   else if (TREE_CODE (from) == TREE_LIST && !TREE_CHAIN (from))
+     from = TREE_VALUE (from);
+   return (TYPE_P (from)
+ 	  && (same_type_ignoring_top_level_qualifiers_p
+ 	      (non_reference (to), non_reference (from))));
+ }
+ 
  /* Process a trait expression.  */
  
  tree
*************** finish_trait_expr (location_t loc, cp_tr
*** 12030,12039 ****
      case CPTK_IS_CONSTRUCTIBLE:
        break;
  
-     case CPTK_IS_TRIVIALLY_ASSIGNABLE:
      case CPTK_IS_TRIVIALLY_CONSTRUCTIBLE:
-     case CPTK_IS_NOTHROW_ASSIGNABLE:
      case CPTK_IS_NOTHROW_CONSTRUCTIBLE:
        if (!check_trait_type (type1)
  	  || !check_trait_type (type2))
  	return error_mark_node;
--- 12117,12131 ----
      case CPTK_IS_CONSTRUCTIBLE:
        break;
  
      case CPTK_IS_TRIVIALLY_CONSTRUCTIBLE:
      case CPTK_IS_NOTHROW_CONSTRUCTIBLE:
+       /* Don't check completeness for direct reference binding.  */;
+       if (same_type_ref_bind_p (kind, type1, type2))
+ 	break;
+       gcc_fallthrough ();
+ 
+     case CPTK_IS_NOTHROW_ASSIGNABLE:
+     case CPTK_IS_TRIVIALLY_ASSIGNABLE:
        if (!check_trait_type (type1)
  	  || !check_trait_type (type2))
  	return error_mark_node;
diff -Nrcpad gcc-12.3.0/gcc/cp/tree.cc gcc-12.4.0/gcc/cp/tree.cc
*** gcc-12.3.0/gcc/cp/tree.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/tree.cc	Thu Jun 20 08:08:06 2024
*************** rvalue (tree expr)
*** 970,980 ****
  
    expr = mark_rvalue_use (expr);
  
!   /* [basic.lval]
! 
!      Non-class rvalues always have cv-unqualified types.  */
    type = TREE_TYPE (expr);
!   if (!CLASS_TYPE_P (type) && cv_qualified_p (type))
      type = cv_unqualified (type);
  
    /* We need to do this for rvalue refs as well to get the right answer
--- 970,981 ----
  
    expr = mark_rvalue_use (expr);
  
!   /* [expr.type]: "If a prvalue initially has the type "cv T", where T is a
!      cv-unqualified non-class, non-array type, the type of the expression is
!      adjusted to T prior to any further analysis.  */
    type = TREE_TYPE (expr);
!   if (!CLASS_TYPE_P (type) && TREE_CODE (type) != ARRAY_TYPE
!       && cv_qualified_p (type))
      type = cv_unqualified (type);
  
    /* We need to do this for rvalue refs as well to get the right answer
diff -Nrcpad gcc-12.3.0/gcc/cp/typeck.cc gcc-12.4.0/gcc/cp/typeck.cc
*** gcc-12.3.0/gcc/cp/typeck.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cp/typeck.cc	Thu Jun 20 08:08:06 2024
*************** cp_build_indirect_ref (location_t loc, t
*** 3775,3787 ****
     If INDEX is of some user-defined type, it must be converted to
     integer type.  Otherwise, to make a compatible PLUS_EXPR, it
     will inherit the type of the array, which will be some pointer type.
!    
     LOC is the location to use in building the array reference.  */
  
  tree
  cp_build_array_ref (location_t loc, tree array, tree idx,
  		    tsubst_flags_t complain)
  {
    tree ret;
  
    if (idx == 0)
--- 3775,3788 ----
     If INDEX is of some user-defined type, it must be converted to
     integer type.  Otherwise, to make a compatible PLUS_EXPR, it
     will inherit the type of the array, which will be some pointer type.
! 
     LOC is the location to use in building the array reference.  */
  
  tree
  cp_build_array_ref (location_t loc, tree array, tree idx,
  		    tsubst_flags_t complain)
  {
+   tree first = NULL_TREE;
    tree ret;
  
    if (idx == 0)
*************** cp_build_array_ref (location_t loc, tree
*** 3826,3831 ****
--- 3827,3840 ----
  
    bool non_lvalue = convert_vector_to_array_for_subscript (loc, &array, idx);
  
+   /* 0[array] */
+   if (TREE_CODE (TREE_TYPE (idx)) == ARRAY_TYPE)
+     {
+       std::swap (array, idx);
+       if (flag_strong_eval_order == 2 && TREE_SIDE_EFFECTS (array))
+ 	idx = first = save_expr (idx);
+     }
+ 
    if (TREE_CODE (TREE_TYPE (array)) == ARRAY_TYPE)
      {
        tree rval, type;
*************** cp_build_array_ref (location_t loc, tree
*** 3901,3915 ****
        protected_set_expr_location (ret, loc);
        if (non_lvalue)
  	ret = non_lvalue_loc (loc, ret);
        return ret;
      }
  
    {
      tree ar = cp_default_conversion (array, complain);
      tree ind = cp_default_conversion (idx, complain);
-     tree first = NULL_TREE;
  
!     if (flag_strong_eval_order == 2 && TREE_SIDE_EFFECTS (ind))
        ar = first = save_expr (ar);
  
      /* Put the integer in IND to simplify error checking.  */
--- 3910,3925 ----
        protected_set_expr_location (ret, loc);
        if (non_lvalue)
  	ret = non_lvalue_loc (loc, ret);
+       if (first)
+ 	ret = build2_loc (loc, COMPOUND_EXPR, TREE_TYPE (ret), first, ret);
        return ret;
      }
  
    {
      tree ar = cp_default_conversion (array, complain);
      tree ind = cp_default_conversion (idx, complain);
  
!     if (!first && flag_strong_eval_order == 2 && TREE_SIDE_EFFECTS (ind))
        ar = first = save_expr (ar);
  
      /* Put the integer in IND to simplify error checking.  */
*************** treat_lvalue_as_rvalue_p (tree expr, boo
*** 10352,10358 ****
        for (tree decl = b->names; decl; decl = TREE_CHAIN (decl))
  	if (decl == retval)
  	  return set_implicit_rvalue_p (move (expr));
!       if (b->kind == sk_function_parms || b->kind == sk_try)
  	return NULL_TREE;
      }
  }
--- 10362,10370 ----
        for (tree decl = b->names; decl; decl = TREE_CHAIN (decl))
  	if (decl == retval)
  	  return set_implicit_rvalue_p (move (expr));
!       if (b->kind == sk_function_parms
! 	  || b->kind == sk_try
! 	  || b->kind == sk_namespace)
  	return NULL_TREE;
      }
  }
*************** check_return_expr (tree retval, bool *no
*** 10678,10683 ****
--- 10690,10698 ----
    if (fn_returns_value_p && flag_elide_constructors)
      {
        if (named_return_value_okay_p
+ 	  /* The current NRV implementation breaks if a backward goto needs to
+ 	     destroy the object (PR92407).  */
+ 	  && !cp_function_chain->backward_goto
            && (current_function_return_value == NULL_TREE
  	      || current_function_return_value == bare_retval))
  	current_function_return_value = bare_retval;
diff -Nrcpad gcc-12.3.0/gcc/cprop.cc gcc-12.4.0/gcc/cprop.cc
*** gcc-12.3.0/gcc/cprop.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/cprop.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 22,27 ****
--- 22,28 ----
  #include "coretypes.h"
  #include "backend.h"
  #include "rtl.h"
+ #include "rtlanal.h"
  #include "cfghooks.h"
  #include "df.h"
  #include "insn-config.h"
*************** try_replace_reg (rtx from, rtx to, rtx_i
*** 795,801 ****
        /* If we've failed perform the replacement, have a single SET to
  	 a REG destination and don't yet have a note, add a REG_EQUAL note
  	 to not lose information.  */
!       if (!success && note == 0 && set != 0 && REG_P (SET_DEST (set)))
  	note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
      }
  
--- 796,803 ----
        /* If we've failed perform the replacement, have a single SET to
  	 a REG destination and don't yet have a note, add a REG_EQUAL note
  	 to not lose information.  */
!       if (!success && note == 0 && set != 0 && REG_P (SET_DEST (set))
! 	  && !contains_paradoxical_subreg_p (SET_SRC (set)))
  	note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
      }
  
diff -Nrcpad gcc-12.3.0/gcc/d/ChangeLog gcc-12.4.0/gcc/d/ChangeLog
*** gcc-12.3.0/gcc/d/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/d/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,161 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-03-10  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2024-03-10  Iain Buclaw  
+ 
+ 	PR d/112285
+ 	PR d/112290
+ 	* d-target.cc (Target::preferPassByRef): Return true for all static
+ 	array and struct types.
+ 
+ 2024-03-03  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2024-03-03  Iain Buclaw  
+ 
+ 	PR d/114171
+ 	* d-codegen.cc (lower_struct_comparison): Keep alignment of original
+ 	type in reinterpret cast for comparison.
+ 
+ 2024-03-03  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2024-02-12  Iain Buclaw  
+ 
+ 	PR d/113758
+ 	* d-codegen.cc (d_build_call): Force a TARGET_EXPR when callee
+ 	destorys its arguments.
+ 	* decl.cc (DeclVisitor::visit (VarDeclaration *)): Set
+ 	SET_DECL_VALUE_EXPR on the temporary variable to make it a placeholder
+ 	for the TARGET_EXPR_SLOT.
+ 
+ 2024-03-03  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2024-02-12  Iain Buclaw  
+ 
+ 	PR d/113125
+ 	* types.cc (TypeVisitor::visit (TypeStruct *)): Generate TYPE_DECL and
+ 	apply UDAs to opaque struct declarations.
+ 
+ 2023-10-29  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2023-10-29  Iain Buclaw  
+ 
+ 	PR d/110712
+ 	* d-codegen.cc (d_build_call): Update call to convert_for_argument.
+ 	* d-convert.cc (is_valist_parameter_type): New function.
+ 	(check_valist_conversion): New function.
+ 	(convert_for_assignment): Update signature.  Add check whether
+ 	assigning va_list is permissible.
+ 	(convert_for_argument): Likewise.
+ 	* d-tree.h (convert_for_assignment): Update signature.
+ 	(convert_for_argument): Likewise.
+ 	* expr.cc (ExprVisitor::visit (AssignExp *)): Update call to
+ 	convert_for_assignment.
+ 
+ 2023-10-28  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2023-10-28  Iain Buclaw  
+ 
+ 	PR d/112270
+ 	* d-builtins.cc (d_build_d_type_nodes): Initialize d_bool_false_node,
+ 	d_bool_true_node.
+ 	* d-codegen.cc (build_array_struct_comparison): Use d_bool_false_node
+ 	instead of boolean_false_node.
+ 	* d-convert.cc (d_truthvalue_conversion): Use d_bool_false_node and
+ 	d_bool_true_node instead of boolean_false_node and boolean_true_node.
+ 	* d-tree.h (enum d_tree_index): Add DTI_BOOL_FALSE and DTI_BOOL_TRUE.
+ 	(d_bool_false_node): New macro.
+ 	(d_bool_true_node): New macro.
+ 	* modules.cc (build_dso_cdtor_fn): Use d_bool_false_node and
+ 	d_bool_true_node instead of boolean_false_node and boolean_true_node.
+ 	(register_moduleinfo): Use d_bool_type instead of boolean_type_node.
+ 
+ 2023-08-15  Iain Buclaw  
+ 
+ 	PR d/110959
+ 	* dmd/canthrow.d (Dsymbol_canThrow): Use foreachVar.
+ 	* dmd/declaration.d (TupleDeclaration::needThis): Likewise.
+ 	(TupleDeclaration::foreachVar): New function.
+ 	(VarDeclaration::setFieldOffset): Use foreachVar.
+ 	* dmd/dinterpret.d (Interpreter::visit (DeclarationExp)): Likewise.
+ 	* dmd/dsymbolsem.d (DsymbolSemanticVisitor::visit (VarDeclaration)):
+ 	Don't push tuple field members to the scope symbol table.
+ 	(determineFields): Handle pushing tuple field members here instead.
+ 	* dmd/dtoh.d (ToCppBuffer::visit (VarDeclaration)): Visit all tuple
+ 	fields.
+ 	(ToCppBuffer::visit (TupleDeclaration)): New function.
+ 	* dmd/expression.d (expandAliasThisTuples): Use foreachVar.
+ 	* dmd/foreachvar.d (VarWalker::visit (DeclarationExp)): Likewise.
+ 	* dmd/ob.d (genKill): Likewise.
+ 	(checkObErrors): Likewise.
+ 	* dmd/semantic2.d (Semantic2Visitor::visit (TupleDeclaration)): Visit
+ 	all tuple fields.
+ 
+ 2023-07-07  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2023-07-07  Iain Buclaw  
+ 
+ 	PR d/108842
+ 	* decl.cc (DeclVisitor::visit (VarDeclaration *)): Only emit scalar
+ 	manifest constants.
+ 	(get_symbol_decl): Don't generate CONST_DECL for non-scalar manifest
+ 	constants.
+ 	* imports.cc (ImportVisitor::visit (VarDeclaration *)): New method.
+ 
+ 2023-07-02  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2023-07-02  Iain Buclaw  
+ 
+ 	PR d/110516
+ 	* intrinsics.cc (expand_volatile_load): Set TREE_SIDE_EFFECTS on the
+ 	expanded expression.
+ 	(expand_volatile_store): Likewise.
+ 
+ 2023-07-01  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2023-07-01  Iain Buclaw  
+ 
+ 	PR d/110514
+ 	* decl.cc (get_symbol_decl): Set TREE_READONLY on certain kinds of
+ 	const and immutable variables.
+ 	* expr.cc (ExprVisitor::visit (ArrayLiteralExp *)): Set TREE_READONLY
+ 	on immutable dynamic array literals.
+ 
+ 2023-06-26  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2023-06-26  Iain Buclaw  
+ 
+ 	PR d/110359
+ 	* d-convert.cc (convert_for_rvalue): Only apply the @safe boolean
+ 	conversion to boolean fields of a union.
+ 	(convert_for_condition): Call convert_for_rvalue in the default case.
+ 
+ 2023-06-26  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2023-06-26  Iain Buclaw  
+ 
+ 	PR d/110113
+ 	* dmd/escape.d (checkMutableArguments): Always allocate new buffer for
+ 	computing escapeBy.
+ 
+ 2023-06-06  Iain Buclaw  
+ 
+ 	* dmd/MERGE: Merge upstream dmd 316b89f1e3.
+ 	* dmd/VERSION: Bump version to v2.100.2.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/d/d-builtins.cc gcc-12.4.0/gcc/d/d-builtins.cc
*** gcc-12.3.0/gcc/d/d-builtins.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/d-builtins.cc	Thu Jun 20 08:08:06 2024
*************** d_build_d_type_nodes (void)
*** 846,851 ****
--- 846,854 ----
    d_bool_type = make_unsigned_type (1);
    TREE_SET_CODE (d_bool_type, BOOLEAN_TYPE);
  
+   d_bool_false_node = TYPE_MIN_VALUE (d_bool_type);
+   d_bool_true_node = TYPE_MAX_VALUE (d_bool_type);
+ 
    char8_type_node = make_unsigned_type (8);
    TYPE_STRING_FLAG (char8_type_node) = 1;
  
diff -Nrcpad gcc-12.3.0/gcc/d/d-codegen.cc gcc-12.4.0/gcc/d/d-codegen.cc
*** gcc-12.3.0/gcc/d/d-codegen.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/d-codegen.cc	Thu Jun 20 08:08:06 2024
*************** lower_struct_comparison (tree_code code,
*** 996,1001 ****
--- 996,1002 ----
  	      if (tmode == NULL_TREE)
  		tmode = make_unsigned_type (GET_MODE_BITSIZE (mode.require ()));
  
+ 	      tmode = build_aligned_type (tmode, TYPE_ALIGN (stype));
  	      t1ref = build_vconvert (tmode, t1ref);
  	      t2ref = build_vconvert (tmode, t2ref);
  
*************** build_array_struct_comparison (tree_code
*** 1105,1111 ****
  	if (length == 0 || result OP 0) break;  */
    t = build_boolop (EQ_EXPR, length, d_convert (lentype, integer_zero_node));
    t = build_boolop (TRUTH_ORIF_EXPR, t, build_boolop (code, result,
! 						      boolean_false_node));
    t = build1 (EXIT_EXPR, void_type_node, t);
    add_stmt (t);
  
--- 1106,1112 ----
  	if (length == 0 || result OP 0) break;  */
    t = build_boolop (EQ_EXPR, length, d_convert (lentype, integer_zero_node));
    t = build_boolop (TRUTH_ORIF_EXPR, t, build_boolop (code, result,
! 						      d_bool_false_node));
    t = build1 (EXIT_EXPR, void_type_node, t);
    add_stmt (t);
  
*************** d_build_call (TypeFunction *tf, tree cal
*** 2197,2210 ****
        for (size_t i = 0; i < arguments->length; ++i)
  	{
  	  Expression *arg = (*arguments)[i];
! 	  tree targ = build_expr (arg);
  
  	  if (i - varargs < nparams && i >= varargs)
  	    {
  	      /* Actual arguments for declared formal arguments.  */
  	      Parameter *parg = tf->parameterList[i - varargs];
! 	      targ = convert_for_argument (targ, parg);
  	    }
  
  	  /* Don't pass empty aggregates by value.  */
  	  if (empty_aggregate_p (TREE_TYPE (targ)) && !TREE_ADDRESSABLE (targ)
--- 2198,2213 ----
        for (size_t i = 0; i < arguments->length; ++i)
  	{
  	  Expression *arg = (*arguments)[i];
! 	  tree targ;
  
  	  if (i - varargs < nparams && i >= varargs)
  	    {
  	      /* Actual arguments for declared formal arguments.  */
  	      Parameter *parg = tf->parameterList[i - varargs];
! 	      targ = convert_for_argument (arg, parg);
  	    }
+ 	  else
+ 	    targ = build_expr (arg);
  
  	  /* Don't pass empty aggregates by value.  */
  	  if (empty_aggregate_p (TREE_TYPE (targ)) && !TREE_ADDRESSABLE (targ)
*************** d_build_call (TypeFunction *tf, tree cal
*** 2220,2229 ****
  	      Type *t = arg->type->toBasetype ();
  	      StructDeclaration *sd = t->baseElemOf ()->isTypeStruct ()->sym;
  
! 	      /* Nested structs also have ADDRESSABLE set, but if the type has
! 		 neither a copy constructor nor a destructor available, then we
! 		 need to take care of copying its value before passing it.  */
! 	      if (arg->op == EXP::structLiteral || (!sd->postblit && !sd->dtor))
  		targ = force_target_expr (targ);
  
  	      targ = convert (build_reference_type (TREE_TYPE (targ)),
--- 2223,2239 ----
  	      Type *t = arg->type->toBasetype ();
  	      StructDeclaration *sd = t->baseElemOf ()->isTypeStruct ()->sym;
  
! 	      /* Need to take care of copying its value before passing the
! 		 argument in the following scenarios:
! 		 - The argument is a literal expression; a CONSTRUCTOR can't
! 		 have its address taken.
! 		 - The type has neither a copy constructor nor a destructor
! 		 available; nested structs also have ADDRESSABLE set.
! 		 - The ABI of the function expects the callee to destroy its
! 		 arguments; when the caller is handles destruction, then `targ'
! 		 has already been made into a temporary. */
! 	      if (arg->op == EXP::structLiteral || (!sd->postblit && !sd->dtor)
! 		  || target.isCalleeDestroyingArgs (tf))
  		targ = force_target_expr (targ);
  
  	      targ = convert (build_reference_type (TREE_TYPE (targ)),
diff -Nrcpad gcc-12.3.0/gcc/d/d-convert.cc gcc-12.4.0/gcc/d/d-convert.cc
*** gcc-12.3.0/gcc/d/d-convert.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/d-convert.cc	Thu Jun 20 08:08:06 2024
*************** d_truthvalue_conversion (tree expr)
*** 132,144 ****
        return expr;
  
      case INTEGER_CST:
!       return integer_zerop (expr) ? boolean_false_node
! 				  : boolean_true_node;
  
      case REAL_CST:
        return real_compare (NE_EXPR, &TREE_REAL_CST (expr), &dconst0)
! 	     ? boolean_true_node
! 	     : boolean_false_node;
  
      case ADDR_EXPR:
        /* If we are taking the address of a decl that can never be null,
--- 132,144 ----
        return expr;
  
      case INTEGER_CST:
!       return integer_zerop (expr) ? d_bool_false_node
! 				  : d_bool_true_node;
  
      case REAL_CST:
        return real_compare (NE_EXPR, &TREE_REAL_CST (expr), &dconst0)
! 	     ? d_bool_true_node
! 	     : d_bool_false_node;
  
      case ADDR_EXPR:
        /* If we are taking the address of a decl that can never be null,
*************** d_truthvalue_conversion (tree expr)
*** 148,154 ****
  	  warning (OPT_Waddress,
  		   "the address of %qD will always evaluate as %",
  		   TREE_OPERAND (expr, 0));
! 	  return boolean_true_node;
  	}
        break;
  
--- 148,154 ----
  	  warning (OPT_Waddress,
  		   "the address of %qD will always evaluate as %",
  		   TREE_OPERAND (expr, 0));
! 	  return d_bool_true_node;
  	}
        break;
  
*************** convert_expr (tree exp, Type *etype, Typ
*** 620,626 ****
    return result ? result : convert (build_ctype (totype), exp);
  }
  
! /* Return a TREE represenwation of EXPR, whose type has been converted from
   * ETYPE to TOTYPE, and is being used in an rvalue context.  */
  
  tree
--- 620,626 ----
    return result ? result : convert (build_ctype (totype), exp);
  }
  
! /* Return a TREE representation of EXPR, whose type has been converted from
   * ETYPE to TOTYPE, and is being used in an rvalue context.  */
  
  tree
*************** convert_for_rvalue (tree expr, Type *ety
*** 635,654 ****
      {
        /* If casting from bool, the result is either 0 or 1, any other value
  	 violates @safe code, so enforce that it is never invalid.  */
!       if (CONSTANT_CLASS_P (expr))
! 	result = d_truthvalue_conversion (expr);
!       else
  	{
! 	  /* Reinterpret the boolean as an integer and test the first bit.
! 	     The generated code should end up being equivalent to:
  		*cast(ubyte *)&expr & 1;  */
! 	  machine_mode bool_mode = TYPE_MODE (TREE_TYPE (expr));
! 	  tree mtype = lang_hooks.types.type_for_mode (bool_mode, 1);
! 	  result = fold_build2 (BIT_AND_EXPR, mtype,
! 				build_vconvert (mtype, expr),
! 				build_one_cst (mtype));
  	}
  
        result = convert (build_ctype (tbtype), result);
      }
  
--- 635,661 ----
      {
        /* If casting from bool, the result is either 0 or 1, any other value
  	 violates @safe code, so enforce that it is never invalid.  */
!       for (tree ref = expr; TREE_CODE (ref) == COMPONENT_REF;
! 	   ref = TREE_OPERAND (ref, 0))
  	{
! 	  /* If the expression is a field that's part of a union, reinterpret
! 	     the boolean as an integer and test the first bit.  The generated
! 	     code should end up being equivalent to:
  		*cast(ubyte *)&expr & 1;  */
! 	  if (TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == UNION_TYPE)
! 	    {
! 	      machine_mode bool_mode = TYPE_MODE (TREE_TYPE (expr));
! 	      tree mtype = lang_hooks.types.type_for_mode (bool_mode, 1);
! 	      result = fold_build2 (BIT_AND_EXPR, mtype,
! 				    build_vconvert (mtype, expr),
! 				    build_one_cst (mtype));
! 	      break;
! 	    }
  	}
  
+       if (result == NULL_TREE)
+ 	result = d_truthvalue_conversion (expr);
+ 
        result = convert (build_ctype (tbtype), result);
      }
  
*************** convert_for_rvalue (tree expr, Type *ety
*** 688,703 ****
    return result ? result : convert_expr (expr, etype, totype);
  }
  
  /* Apply semantics of assignment to a value of type TOTYPE to EXPR
!    (e.g., pointer = array -> pointer = &array[0])
  
     Return a TREE representation of EXPR implicitly converted to TOTYPE
     for use in assignment expressions MODIFY_EXPR, INIT_EXPR.  */
  
  tree
! convert_for_assignment (tree expr, Type *etype, Type *totype)
  {
!   Type *ebtype = etype->toBasetype ();
    Type *tbtype = totype->toBasetype ();
  
    /* Assuming this only has to handle converting a non Tsarray type to
--- 695,780 ----
    return result ? result : convert_expr (expr, etype, totype);
  }
  
+ /* Helper for convert_for_assigment and convert_for_argument.
+    Returns true if EXPR is a va_list static array parameter.  */
+ 
+ static bool
+ is_valist_parameter_type (Expression *expr)
+ {
+   Declaration *decl = NULL;
+ 
+   if (VarExp *ve = expr->isVarExp ())
+     decl = ve->var;
+   else if (SymOffExp *se = expr->isSymOffExp ())
+     decl = se->var;
+ 
+   if (decl != NULL && decl->isParameter () && valist_array_p (decl->type))
+     return true;
+ 
+   return false;
+ }
+ 
+ /* Helper for convert_for_assigment and convert_for_argument.
+    Report erroneous uses of assigning or passing a va_list parameter.  */
+ 
+ static void
+ check_valist_conversion (Expression *expr, Type *totype, bool in_assignment)
+ {
+   /* Parameter symbol and its converted type.  */
+   Declaration *decl = NULL;
+   /* Type of parameter when evaluated in the expression.  */
+   Type *type = NULL;
+ 
+   if (VarExp *ve = expr->isVarExp ())
+     {
+       decl = ve->var;
+       type = ve->var->type->nextOf ()->pointerTo ();
+     }
+   else if (SymOffExp *se = expr->isSymOffExp ())
+     {
+       decl = se->var;
+       type = se->var->type->nextOf ()->pointerTo ()->pointerTo ();
+     }
+ 
+   /* Should not be called unless is_valist_parameter_type also matched.  */
+   gcc_assert (decl != NULL && decl->isParameter ()
+ 	      && valist_array_p (decl->type));
+ 
+   /* OK if conversion between types is allowed.  */
+   if (type->implicitConvTo (totype) != MATCH::nomatch)
+     return;
+ 
+   if (in_assignment)
+     {
+       error_at (make_location_t (expr->loc), "cannot convert parameter %qs "
+ 		"from type %qs to type %qs in assignment",
+ 		expr->toChars(), type->toChars (), totype->toChars ());
+     }
+   else
+     {
+       error_at (make_location_t (expr->loc), "cannot convert parameter %qs "
+ 		"from type %qs to type %qs in argument passing",
+ 		expr->toChars(), type->toChars (), totype->toChars ());
+     }
+ 
+   inform (make_location_t (decl->loc), "parameters of type % "
+ 	  "{aka %qs} are decayed to pointer types, and require % "
+ 	  "to be converted back into a static array type",
+ 	  decl->type->toChars ());
+ }
+ 
  /* Apply semantics of assignment to a value of type TOTYPE to EXPR
!    For example: `pointer = array' gets lowered to `pointer = &array[0]'.
!    If LITERALP is true, then EXPR is a value used in the initialization
!    of another literal.
  
     Return a TREE representation of EXPR implicitly converted to TOTYPE
     for use in assignment expressions MODIFY_EXPR, INIT_EXPR.  */
  
  tree
! convert_for_assignment (Expression *expr, Type *totype, bool literalp)
  {
!   Type *ebtype = expr->type->toBasetype ();
    Type *tbtype = totype->toBasetype ();
  
    /* Assuming this only has to handle converting a non Tsarray type to
*************** convert_for_assignment (tree expr, Type
*** 717,724 ****
  	      vec  *ce = NULL;
  	      tree index = build2 (RANGE_EXPR, build_ctype (Type::tsize_t),
  				   size_zero_node, size_int (count - 1));
! 	      tree value = convert_for_assignment (expr, etype, sa_type->next);
! 
  	      /* Can't use VAR_DECLs in CONSTRUCTORS.  */
  	      if (VAR_P (value))
  		{
--- 794,801 ----
  	      vec  *ce = NULL;
  	      tree index = build2 (RANGE_EXPR, build_ctype (Type::tsize_t),
  				   size_zero_node, size_int (count - 1));
! 	      tree value = convert_for_assignment (expr, sa_type->next,
! 						   literalp);
  	      /* Can't use VAR_DECLs in CONSTRUCTORS.  */
  	      if (VAR_P (value))
  		{
*************** convert_for_assignment (tree expr, Type
*** 739,776 ****
    if ((tbtype->ty == TY::Tsarray || tbtype->ty == TY::Tstruct)
        && ebtype->isintegral ())
      {
!       if (!integer_zerop (expr))
! 	gcc_unreachable ();
! 
!       return expr;
      }
  
!   return convert_for_rvalue (expr, etype, totype);
  }
  
  /* Return a TREE representation of EXPR converted to represent
     the parameter type ARG.  */
  
  tree
! convert_for_argument (tree expr, Parameter *arg)
  {
    /* Lazy arguments: expr should already be a delegate.  */
    if (arg->storageClass & STClazy)
!     return expr;
  
    if (valist_array_p (arg->type))
      {
!       /* Do nothing if the va_list has already been decayed to a pointer.  */
!       if (!POINTER_TYPE_P (TREE_TYPE (expr)))
! 	return build_address (expr);
!     }
!   else if (parameter_reference_p (arg))
!     {
!       /* Front-end shouldn't automatically take the address.  */
!       return convert (parameter_type (arg), build_address (expr));
      }
  
!   return expr;
  }
  
  /* Perform default promotions for data used in expressions.
--- 816,868 ----
    if ((tbtype->ty == TY::Tsarray || tbtype->ty == TY::Tstruct)
        && ebtype->isintegral ())
      {
!       tree ret = build_expr (expr, false, literalp);
!       gcc_assert (integer_zerop (ret));
!       return ret;
      }
  
!   /* Assigning a va_list by value or reference, check whether RHS is a parameter
!      that has has been lowered by declaration_type or parameter_type.  */
!   if (is_valist_parameter_type (expr))
!     check_valist_conversion (expr, totype, true);
! 
!   return convert_for_rvalue (build_expr (expr, false, literalp),
! 			     expr->type, totype);
  }
  
  /* Return a TREE representation of EXPR converted to represent
     the parameter type ARG.  */
  
  tree
! convert_for_argument (Expression *expr, Parameter *arg)
  {
+   tree targ = build_expr (expr);
+ 
    /* Lazy arguments: expr should already be a delegate.  */
    if (arg->storageClass & STClazy)
!     return targ;
  
+   /* Passing a va_list by value, check whether the target requires it to
+      be decayed to a pointer type.  */
    if (valist_array_p (arg->type))
      {
!       if (!POINTER_TYPE_P (TREE_TYPE (targ)))
! 	return build_address (targ);
! 
!       /* Do nothing if the va_list has already been converted.  */
!       return targ;
      }
  
!   /* Passing a va_list by reference, check if types are really compatible
!      after conversion from static array to pointer type.  */
!   if (is_valist_parameter_type (expr))
!     check_valist_conversion (expr, arg->type, false);
! 
!   /* Front-end shouldn't automatically take the address of `ref' parameters.  */
!   if (parameter_reference_p (arg))
!     return convert (parameter_type (arg), build_address (targ));
! 
!   return targ;
  }
  
  /* Perform default promotions for data used in expressions.
*************** convert_for_condition (tree expr, Type *
*** 845,851 ****
        break;
  
      default:
!       result = expr;
        break;
      }
  
--- 937,943 ----
        break;
  
      default:
!       result = convert_for_rvalue (expr, type, type);
        break;
      }
  
diff -Nrcpad gcc-12.3.0/gcc/d/d-target.cc gcc-12.4.0/gcc/d/d-target.cc
*** gcc-12.3.0/gcc/d/d-target.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/d-target.cc	Thu Jun 20 08:08:06 2024
*************** Target::supportsLinkerDirective (void) c
*** 586,616 ****
  }
  
  /* Decides whether an `in' parameter of the specified POD type PARAM_TYPE is to
!    be passed by reference or by valie.  This is used only when compiling with
     `-fpreview=in' enabled.  */
  
  bool
  Target::preferPassByRef (Type *param_type)
  {
!   if (param_type->size () == SIZE_INVALID)
      return false;
  
!   tree type = build_ctype (param_type);
! 
!   /* Prefer a `ref' if the type is an aggregate, and its size is greater than
!      its alignment.  */
!   if (AGGREGATE_TYPE_P (type)
!       && (!valid_constant_size_p (TYPE_SIZE_UNIT (type))
! 	  || compare_tree_int (TYPE_SIZE_UNIT (type), TYPE_ALIGN (type)) > 0))
!     return true;
! 
!   /* If the back-end is always going to pass this by invisible reference.  */
!   if (pass_by_reference (NULL, function_arg_info (type, true)))
!     return true;
! 
!   /* If returning the parameter means the caller will do RVO.  */
!   if (targetm.calls.return_in_memory (type, NULL_TREE))
!     return true;
! 
!   return false;
  }
--- 586,601 ----
  }
  
  /* Decides whether an `in' parameter of the specified POD type PARAM_TYPE is to
!    be passed by reference or by value.  This is used only when compiling with
     `-fpreview=in' enabled.  */
  
  bool
  Target::preferPassByRef (Type *param_type)
  {
!   /* See note in Target::isReturnOnStack.  */
!   Type *tb = param_type->toBasetype ();
!   if (tb->size () == SIZE_INVALID)
      return false;
  
!   return (tb->ty == TY::Tstruct || tb->ty == TY::Tsarray);
  }
diff -Nrcpad gcc-12.3.0/gcc/d/d-tree.h gcc-12.4.0/gcc/d/d-tree.h
*** gcc-12.3.0/gcc/d/d-tree.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/d-tree.h	Thu Jun 20 08:08:06 2024
*************** enum d_tree_index
*** 426,431 ****
--- 426,434 ----
    DTI_NULL_ARRAY,
    DTI_BOTTOM_TYPE,
  
+   DTI_BOOL_FALSE,
+   DTI_BOOL_TRUE,
+ 
    DTI_MAX
  };
  
*************** extern GTY(()) tree d_global_trees[DTI_M
*** 462,467 ****
--- 465,473 ----
  #define null_array_node			d_global_trees[DTI_NULL_ARRAY]
  /* The bottom type, referred to as `noreturn` in code.  */
  #define noreturn_type_node		d_global_trees[DTI_BOTTOM_TYPE]
+ /* D boolean values are always byte-sized, unlike boolean_type_node.  */
+ #define d_bool_false_node		d_global_trees[DTI_BOOL_FALSE]
+ #define d_bool_true_node		d_global_trees[DTI_BOOL_TRUE]
  
  /* A prefix for internal variables, which are not user-visible.  */
  #if !defined (NO_DOT_IN_LABEL)
*************** extern tree d_truthvalue_conversion (tre
*** 600,607 ****
  extern tree d_convert (tree, tree);
  extern tree convert_expr (tree, Type *, Type *);
  extern tree convert_for_rvalue (tree, Type *, Type *);
! extern tree convert_for_assignment (tree, Type *, Type *);
! extern tree convert_for_argument (tree, Parameter *);
  extern tree convert_for_condition (tree, Type *);
  extern tree d_array_convert (Expression *);
  extern tree d_array_convert (Type *, Expression *);
--- 606,613 ----
  extern tree d_convert (tree, tree);
  extern tree convert_expr (tree, Type *, Type *);
  extern tree convert_for_rvalue (tree, Type *, Type *);
! extern tree convert_for_assignment (Expression *, Type *, bool = false);
! extern tree convert_for_argument (Expression *, Parameter *);
  extern tree convert_for_condition (tree, Type *);
  extern tree d_array_convert (Expression *);
  extern tree d_array_convert (Type *, Expression *);
diff -Nrcpad gcc-12.3.0/gcc/d/decl.cc gcc-12.4.0/gcc/d/decl.cc
*** gcc-12.3.0/gcc/d/decl.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/decl.cc	Thu Jun 20 08:08:06 2024
*************** public:
*** 781,787 ****
        {
  	/* Do not store variables we cannot take the address of,
  	   but keep the values for purposes of debugging.  */
! 	if (!d->type->isscalar ())
  	  {
  	    tree decl = get_symbol_decl (d);
  	    d_pushdecl (decl);
--- 781,787 ----
        {
  	/* Do not store variables we cannot take the address of,
  	   but keep the values for purposes of debugging.  */
! 	if (d->type->isscalar () && !d->type->hasPointers ())
  	  {
  	    tree decl = get_symbol_decl (d);
  	    d_pushdecl (decl);
*************** public:
*** 855,864 ****
  	    /* Maybe put variable on list of things needing destruction.  */
  	    if (d->needsScopeDtor ())
  	      {
  		vec_safe_push (d_function_chain->vars_in_scope, decl);
  		/* Force a TARGET_EXPR to add the corresponding cleanup.  */
! 		exp = force_target_expr (compound_expr (exp, decl));
! 		TARGET_EXPR_CLEANUP (exp) = build_expr (d->edtor);
  	      }
  
  	    add_stmt (exp);
--- 855,882 ----
  	    /* Maybe put variable on list of things needing destruction.  */
  	    if (d->needsScopeDtor ())
  	      {
+ 		/* Rewrite: `decl = exp' => TARGET_EXPR(decl, exp, dtor).  */
  		vec_safe_push (d_function_chain->vars_in_scope, decl);
+ 
  		/* Force a TARGET_EXPR to add the corresponding cleanup.  */
! 		if (TREE_CODE (exp) != TARGET_EXPR)
! 		  {
! 		    if (VOID_TYPE_P (TREE_TYPE (exp)))
! 		      exp = compound_expr (exp, decl);
! 
! 		    exp = force_target_expr (exp);
! 		  }
! 
! 		TARGET_EXPR_CLEANUP (exp)
! 		  = compound_expr (TARGET_EXPR_CLEANUP (exp),
! 				   build_expr (d->edtor));
! 
! 		/* The decl is really an alias for the TARGET_EXPR slot.  */
! 		SET_DECL_VALUE_EXPR (decl, TARGET_EXPR_SLOT (exp));
! 		DECL_HAS_VALUE_EXPR_P (decl) = 1;
! 		/* This tells the gimplifier not to emit a clobber for the decl
! 		   as its lifetime ends when the slot gets cleaned up.  */
! 		TREE_ADDRESSABLE (decl) = 0;
  	      }
  
  	    add_stmt (exp);
*************** get_symbol_decl (Declaration *decl)
*** 1199,1204 ****
--- 1217,1236 ----
        return decl->csym;
      }
  
+   if (VarDeclaration *vd = decl->isVarDeclaration ())
+     {
+       /* CONST_DECL was initially intended for enumerals and may be used for
+ 	 scalars in general, but not for aggregates.  Here a non-constant
+ 	 value is generated anyway so as its value can be used.  */
+       if (!vd->canTakeAddressOf () && !vd->type->isscalar ())
+ 	{
+ 	  gcc_assert (vd->_init && !vd->_init->isVoidInitializer ());
+ 	  Expression *ie = initializerToExpression (vd->_init);
+ 	  decl->csym = build_expr (ie, false);
+ 	  return decl->csym;
+ 	}
+     }
+ 
    /* Build the tree for the symbol.  */
    FuncDeclaration *fd = decl->isFuncDeclaration ();
    if (fd)
*************** get_symbol_decl (Declaration *decl)
*** 1246,1269 ****
        if (vd->storage_class & STCextern)
  	DECL_EXTERNAL (decl->csym) = 1;
  
!       /* CONST_DECL was initially intended for enumerals and may be used for
! 	 scalars in general, but not for aggregates.  Here a non-constant
! 	 value is generated anyway so as the CONST_DECL only serves as a
! 	 placeholder for the value, however the DECL itself should never be
! 	 referenced in any generated code, or passed to the back-end.  */
!       if (vd->storage_class & STCmanifest)
  	{
  	  /* Cannot make an expression out of a void initializer.  */
! 	  if (vd->_init && !vd->_init->isVoidInitializer ())
! 	    {
! 	      Expression *ie = initializerToExpression (vd->_init);
  
! 	      if (!vd->type->isscalar ())
! 		DECL_INITIAL (decl->csym) = build_expr (ie, false);
! 	      else
! 		DECL_INITIAL (decl->csym) = build_expr (ie, true);
! 	    }
  	}
      }
  
    /* Set the declaration mangled identifier if static.  */
--- 1278,1307 ----
        if (vd->storage_class & STCextern)
  	DECL_EXTERNAL (decl->csym) = 1;
  
!       if (!vd->canTakeAddressOf ())
  	{
  	  /* Cannot make an expression out of a void initializer.  */
! 	  gcc_assert (vd->_init && !vd->_init->isVoidInitializer ());
! 	  /* Non-scalar manifest constants have already been dealt with.  */
! 	  gcc_assert (vd->type->isscalar ());
  
! 	  Expression *ie = initializerToExpression (vd->_init);
! 	  DECL_INITIAL (decl->csym) = build_expr (ie, true);
  	}
+ 
+       /* [type-qualifiers/const-and-immutable]
+ 
+ 	 `immutable` applies to data that cannot change. Immutable data values,
+ 	 once constructed, remain the same for the duration of the program's
+ 	 execution.  */
+       if (vd->isImmutable () && !vd->setInCtorOnly ())
+ 	TREE_READONLY (decl->csym) = 1;
+ 
+       /* `const` applies to data that cannot be changed by the const reference
+ 	 to that data. It may, however, be changed by another reference to that
+ 	 same data.  */
+       if (vd->isConst () && !vd->isDataseg ())
+ 	TREE_READONLY (decl->csym) = 1;
      }
  
    /* Set the declaration mangled identifier if static.  */
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/MERGE gcc-12.4.0/gcc/d/dmd/MERGE
*** gcc-12.3.0/gcc/d/dmd/MERGE	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/MERGE	Thu Jun 20 08:08:06 2024
***************
*** 1,4 ****
! 76e3b41375e3e1cb4dbca692b587d8e916c0b49f
  
  The first line of this file holds the git revision number of the last
  merge done from the dlang/dmd repository.
--- 1,4 ----
! 316b89f1e3dffcad488c26f56f58c8adfcb84b26
  
  The first line of this file holds the git revision number of the last
  merge done from the dlang/dmd repository.
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/VERSION gcc-12.4.0/gcc/d/dmd/VERSION
*** gcc-12.3.0/gcc/d/dmd/VERSION	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/VERSION	Thu Jun 20 08:08:06 2024
***************
*** 1 ****
! v2.100.1
--- 1 ----
! v2.100.2
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/canthrow.d gcc-12.4.0/gcc/d/dmd/canthrow.d
*** gcc-12.3.0/gcc/d/dmd/canthrow.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/canthrow.d	Thu Jun 20 08:08:06 2024
*************** private CT Dsymbol_canThrow(Dsymbol s, F
*** 270,287 ****
      }
      else if (auto td = s.isTupleDeclaration())
      {
!         for (size_t i = 0; i < td.objects.dim; i++)
!         {
!             RootObject o = (*td.objects)[i];
!             if (o.dyncast() == DYNCAST.expression)
!             {
!                 Expression eo = cast(Expression)o;
!                 if (auto se = eo.isDsymbolExp())
!                 {
!                     result |= Dsymbol_canThrow(se.s, func, mustNotThrow);
!                 }
!             }
!         }
      }
      return result;
  }
--- 270,276 ----
      }
      else if (auto td = s.isTupleDeclaration())
      {
!         td.foreachVar(&symbolDg);
      }
      return result;
  }
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/declaration.d gcc-12.4.0/gcc/d/dmd/declaration.d
*** gcc-12.3.0/gcc/d/dmd/declaration.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/declaration.d	Thu Jun 20 08:08:06 2024
*************** extern (C++) final class TupleDeclaratio
*** 656,678 ****
      override bool needThis()
      {
          //printf("TupleDeclaration::needThis(%s)\n", toChars());
!         for (size_t i = 0; i < objects.dim; i++)
          {
!             RootObject o = (*objects)[i];
!             if (o.dyncast() == DYNCAST.expression)
!             {
!                 Expression e = cast(Expression)o;
!                 if (DsymbolExp ve = e.isDsymbolExp())
!                 {
!                     Declaration d = ve.s.isDeclaration();
!                     if (d && d.needThis())
!                     {
!                         return true;
!                     }
!                 }
!             }
          }
!         return false;
      }
  
      override inout(TupleDeclaration) isTupleDeclaration() inout
--- 656,701 ----
      override bool needThis()
      {
          //printf("TupleDeclaration::needThis(%s)\n", toChars());
!         return isexp ? foreachVar((s) { return s.needThis(); }) != 0 : false;
!     }
! 
!     /***********************************************************
!      * Calls dg(Dsymbol) for each Dsymbol, which should be a VarDeclaration
!      * inside DsymbolExp (isexp == true).
!      * Params:
!      *    dg = delegate to call for each Dsymbol
!      */
!     extern (D) void foreachVar(scope void delegate(Dsymbol) dg)
!     {
!         assert(isexp);
!         foreach (o; *objects)
          {
!             if (auto e = o.isExpression())
!                 if (auto se = e.isDsymbolExp())
!                     dg(se.s);
          }
!     }
! 
!     /***********************************************************
!      * Calls dg(Dsymbol) for each Dsymbol, which should be a VarDeclaration
!      * inside DsymbolExp (isexp == true).
!      * If dg returns !=0, stops and returns that value else returns 0.
!      * Params:
!      *    dg = delegate to call for each Dsymbol
!      * Returns:
!      *    last value returned by dg()
!      */
!     extern (D) int foreachVar(scope int delegate(Dsymbol) dg)
!     {
!         assert(isexp);
!         foreach (o; *objects)
!         {
!             if (auto e = o.isExpression())
!                 if (auto se = e.isDsymbolExp())
!                     if(auto ret = dg(se.s))
!                         return ret;
!         }
!         return 0;
      }
  
      override inout(TupleDeclaration) isTupleDeclaration() inout
*************** extern (C++) class VarDeclaration : Decl
*** 1142,1156 ****
              // If this variable was really a tuple, set the offsets for the tuple fields
              TupleDeclaration v2 = aliassym.isTupleDeclaration();
              assert(v2);
!             for (size_t i = 0; i < v2.objects.dim; i++)
!             {
!                 RootObject o = (*v2.objects)[i];
!                 assert(o.dyncast() == DYNCAST.expression);
!                 Expression e = cast(Expression)o;
!                 assert(e.op == EXP.dSymbol);
!                 DsymbolExp se = e.isDsymbolExp();
!                 se.s.setFieldOffset(ad, fieldState, isunion);
!             }
              return;
          }
  
--- 1165,1171 ----
              // If this variable was really a tuple, set the offsets for the tuple fields
              TupleDeclaration v2 = aliassym.isTupleDeclaration();
              assert(v2);
!             v2.foreachVar((s) { s.setFieldOffset(ad, fieldState, isunion); });
              return;
          }
  
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/dinterpret.d gcc-12.4.0/gcc/d/dmd/dinterpret.d
*** gcc-12.3.0/gcc/d/dmd/dinterpret.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/dinterpret.d	Thu Jun 20 08:08:06 2024
*************** public:
*** 2291,2306 ****
                  result = null;
  
                  // Reserve stack space for all tuple members
!                 if (!td.objects)
!                     return;
!                 foreach (o; *td.objects)
                  {
!                     Expression ex = isExpression(o);
!                     DsymbolExp ds = ex ? ex.isDsymbolExp() : null;
!                     VarDeclaration v2 = ds ? ds.s.isVarDeclaration() : null;
                      assert(v2);
                      if (v2.isDataseg() && !v2.isCTFE())
!                         continue;
  
                      ctfeGlobals.stack.push(v2);
                      if (v2._init)
--- 2291,2302 ----
                  result = null;
  
                  // Reserve stack space for all tuple members
!                 td.foreachVar((s)
                  {
!                     VarDeclaration v2 = s.isVarDeclaration();
                      assert(v2);
                      if (v2.isDataseg() && !v2.isCTFE())
!                         return 0;
  
                      ctfeGlobals.stack.push(v2);
                      if (v2._init)
*************** public:
*** 2310,2316 ****
                          {
                              einit = interpretRegion(ie.exp, istate, goal);
                              if (exceptionOrCant(einit))
!                                 return;
                          }
                          else if (v2._init.isVoidInitializer())
                          {
--- 2306,2312 ----
                          {
                              einit = interpretRegion(ie.exp, istate, goal);
                              if (exceptionOrCant(einit))
!                                 return 1;
                          }
                          else if (v2._init.isVoidInitializer())
                          {
*************** public:
*** 2320,2330 ****
                          {
                              e.error("declaration `%s` is not yet implemented in CTFE", e.toChars());
                              result = CTFEExp.cantexp;
!                             return;
                          }
                          setValue(v2, einit);
                      }
!                 }
                  return;
              }
              if (v.isStatic())
--- 2316,2327 ----
                          {
                              e.error("declaration `%s` is not yet implemented in CTFE", e.toChars());
                              result = CTFEExp.cantexp;
!                             return 1;
                          }
                          setValue(v2, einit);
                      }
!                     return 0;
!                 });
                  return;
              }
              if (v.isStatic())
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/dsymbolsem.d gcc-12.4.0/gcc/d/dmd/dsymbolsem.d
*** gcc-12.3.0/gcc/d/dmd/dsymbolsem.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/dsymbolsem.d	Thu Jun 20 08:08:06 2024
*************** private extern(C++) final class DsymbolS
*** 650,656 ****
                  else
                      ti = dsym._init ? dsym._init.syntaxCopy() : null;
  
!                 StorageClass storage_class = STC.temp | STC.local | dsym.storage_class;
                  if ((dsym.storage_class & STC.parameter) && (arg.storageClass & STC.parameter))
                      storage_class |= arg.storageClass;
                  auto v = new VarDeclaration(dsym.loc, arg.type, id, ti, storage_class);
--- 650,656 ----
                  else
                      ti = dsym._init ? dsym._init.syntaxCopy() : null;
  
!                 StorageClass storage_class = STC.temp | dsym.storage_class;
                  if ((dsym.storage_class & STC.parameter) && (arg.storageClass & STC.parameter))
                      storage_class |= arg.storageClass;
                  auto v = new VarDeclaration(dsym.loc, arg.type, id, ti, storage_class);
*************** private extern(C++) final class DsymbolS
*** 659,672 ****
  
                  v.dsymbolSemantic(sc);
  
-                 if (sc.scopesym)
-                 {
-                     //printf("adding %s to %s\n", v.toChars(), sc.scopesym.toChars());
-                     if (sc.scopesym.members)
-                         // Note this prevents using foreach() over members, because the limits can change
-                         sc.scopesym.members.push(v);
-                 }
- 
                  Expression e = new DsymbolExp(dsym.loc, v);
                  (*exps)[i] = e;
              }
--- 659,664 ----
*************** bool determineFields(AggregateDeclaratio
*** 6819,6825 ****
              return 1;
  
          if (v.aliassym)
!             return 0;   // If this variable was really a tuple, skip it.
  
          if (v.storage_class & (STC.static_ | STC.extern_ | STC.tls | STC.gshared | STC.manifest | STC.ctfe | STC.templateparameter))
              return 0;
--- 6811,6822 ----
              return 1;
  
          if (v.aliassym)
!         {
!             // If this variable was really a tuple, process each element.
!             if (auto tup = v.aliassym.isTupleDeclaration())
!                 return tup.foreachVar(tv => tv.apply(&func, ad));
!             return 0;
!         }
  
          if (v.storage_class & (STC.static_ | STC.extern_ | STC.tls | STC.gshared | STC.manifest | STC.ctfe | STC.templateparameter))
              return 0;
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/dtoh.d gcc-12.4.0/gcc/d/dmd/dtoh.d
*** gcc-12.3.0/gcc/d/dmd/dtoh.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/dtoh.d	Thu Jun 20 08:08:06 2024
*************** public:
*** 877,883 ****
--- 877,887 ----
          // Tuple field are expanded into multiple VarDeclarations
          // (we'll visit them later)
          if (vd.type && vd.type.isTypeTuple())
+         {
+             assert(vd.aliassym);
+             vd.toAlias().accept(this);
              return;
+         }
  
          if (vd.originalType && vd.type == AST.Type.tsize_t)
              origType = vd.originalType;
*************** public:
*** 1667,1672 ****
--- 1671,1683 ----
          assert(false, "This node type should be handled in the EnumDeclaration");
      }
  
+     override void visit(AST.TupleDeclaration tup)
+     {
+         debug (Debug_DtoH) mixin(traceVisit!tup);
+ 
+         tup.foreachVar((s) { s.accept(this); });
+     }
+ 
      /**
       * Prints a member/parameter/variable declaration into `buf`.
       *
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/escape.d gcc-12.4.0/gcc/d/dmd/escape.d
*** gcc-12.3.0/gcc/d/dmd/escape.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/escape.d	Thu Jun 20 08:08:06 2024
*************** bool checkMutableArguments(Scope* sc, Fu
*** 77,98 ****
          bool isMutable;         // true if reference to mutable
      }
  
!     /* Store escapeBy as static data escapeByStorage so we can keep reusing the same
!      * arrays rather than reallocating them.
!      */
!     __gshared EscapeBy[] escapeByStorage;
!     auto escapeBy = escapeByStorage;
!     if (escapeBy.length < len)
!     {
!         auto newPtr = cast(EscapeBy*)mem.xrealloc(escapeBy.ptr, len * EscapeBy.sizeof);
!         // Clear the new section
!         memset(newPtr + escapeBy.length, 0, (len - escapeBy.length) * EscapeBy.sizeof);
!         escapeBy = newPtr[0 .. len];
!         escapeByStorage = escapeBy;
!     }
!     else
!         escapeBy = escapeBy[0 .. len];
! 
      const paramLength = tf.parameterList.length;
  
      // Fill in escapeBy[] with arguments[], ethis, and outerVars[]
--- 77,83 ----
          bool isMutable;         // true if reference to mutable
      }
  
!     auto escapeBy = new EscapeBy[len];
      const paramLength = tf.parameterList.length;
  
      // Fill in escapeBy[] with arguments[], ethis, and outerVars[]
*************** bool checkMutableArguments(Scope* sc, Fu
*** 212,224 ****
          escape(i, eb, false);
      }
  
-     /* Reset the arrays in escapeBy[] so we can reuse them next time through
-      */
-     foreach (ref eb; escapeBy)
-     {
-         eb.er.reset();
-     }
- 
      return errors;
  }
  
--- 197,202 ----
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/expression.d gcc-12.4.0/gcc/d/dmd/expression.d
*** gcc-12.3.0/gcc/d/dmd/expression.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/expression.d	Thu Jun 20 08:08:06 2024
*************** int expandAliasThisTuples(Expressions* e
*** 348,361 ****
          if (TupleDeclaration td = exp.isAliasThisTuple)
          {
              exps.remove(u);
!             foreach (i, o; *td.objects)
              {
!                 auto d = o.isExpression().isDsymbolExp().s.isDeclaration();
                  auto e = new DotVarExp(exp.loc, exp, d);
                  assert(d.type);
                  e.type = d.type;
                  exps.insert(u + i, e);
!             }
              version (none)
              {
                  printf("expansion ->\n");
--- 348,363 ----
          if (TupleDeclaration td = exp.isAliasThisTuple)
          {
              exps.remove(u);
!             size_t i;
!             td.foreachVar((s)
              {
!                 auto d = s.isDeclaration();
                  auto e = new DotVarExp(exp.loc, exp, d);
                  assert(d.type);
                  e.type = d.type;
                  exps.insert(u + i, e);
!                 ++i;
!             });
              version (none)
              {
                  printf("expansion ->\n");
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/foreachvar.d gcc-12.4.0/gcc/d/dmd/foreachvar.d
*** gcc-12.3.0/gcc/d/dmd/foreachvar.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/foreachvar.d	Thu Jun 20 08:08:06 2024
*************** void foreachVar(Expression e, void deleg
*** 75,93 ****
              if (!v)
                  return;
              if (TupleDeclaration td = v.toAlias().isTupleDeclaration())
!             {
!                 if (!td.objects)
!                     return;
!                 foreach (o; *td.objects)
!                 {
!                     Expression ex = isExpression(o);
!                     DsymbolExp s = ex ? ex.isDsymbolExp() : null;
!                     assert(s);
!                     VarDeclaration v2 = s.s.isVarDeclaration();
!                     assert(v2);
!                     dgVar(v2);
!                 }
!             }
              else
                  dgVar(v);
              Dsymbol s = v.toAlias();
--- 75,81 ----
              if (!v)
                  return;
              if (TupleDeclaration td = v.toAlias().isTupleDeclaration())
!                 td.foreachVar((s) { dgVar(s.isVarDeclaration()); });
              else
                  dgVar(v);
              Dsymbol s = v.toAlias();
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/ob.d gcc-12.4.0/gcc/d/dmd/ob.d
*** gcc-12.3.0/gcc/d/dmd/ob.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/ob.d	Thu Jun 20 08:08:06 2024
*************** void genKill(ref ObState obstate, ObNode
*** 1407,1422 ****
                      }
                      else if (auto td = s.isTupleDeclaration())
                      {
!                         foreach (o; *td.objects)
!                         {
!                             if (auto eo = o.isExpression())
!                             {
!                                 if (auto se = eo.isDsymbolExp())
!                                 {
!                                     Dsymbol_visit(se.s);
!                                 }
!                             }
!                         }
                      }
                  }
  
--- 1407,1413 ----
                      }
                      else if (auto td = s.isTupleDeclaration())
                      {
!                         td.foreachVar(&Dsymbol_visit);
                      }
                  }
  
*************** void checkObErrors(ref ObState obstate)
*** 2107,2122 ****
                      }
                      else if (auto td = s.isTupleDeclaration())
                      {
!                         foreach (o; *td.objects)
!                         {
!                             if (auto eo = o.isExpression())
!                             {
!                                 if (auto se = eo.isDsymbolExp())
!                                 {
!                                     Dsymbol_visit(se.s);
!                                 }
!                             }
!                         }
                      }
                  }
  
--- 2098,2104 ----
                      }
                      else if (auto td = s.isTupleDeclaration())
                      {
!                         td.foreachVar(&Dsymbol_visit);
                      }
                  }
  
diff -Nrcpad gcc-12.3.0/gcc/d/dmd/semantic2.d gcc-12.4.0/gcc/d/dmd/semantic2.d
*** gcc-12.3.0/gcc/d/dmd/semantic2.d	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/dmd/semantic2.d	Thu Jun 20 08:08:06 2024
*************** private extern(C++) final class Semantic
*** 677,682 ****
--- 677,687 ----
      {
          visit(cast(AggregateDeclaration) cd);
      }
+ 
+     override void visit(TupleDeclaration td)
+     {
+         td.foreachVar((s) { s.accept(this); });
+     }
  }
  
  /**
diff -Nrcpad gcc-12.3.0/gcc/d/expr.cc gcc-12.4.0/gcc/d/expr.cc
*** gcc-12.3.0/gcc/d/expr.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/expr.cc	Thu Jun 20 08:08:06 2024
*************** public:
*** 1057,1064 ****
  	Declaration *decl = e->e1->isVarExp ()->var;
  	if (decl->storage_class & (STCout | STCref))
  	  {
! 	    tree t2 = convert_for_assignment (build_expr (e->e2),
! 					      e->e2->type, e->e1->type);
  	    tree t1 = build_expr (e->e1);
  	    /* Want reference to lhs, not indirect ref.  */
  	    t1 = TREE_OPERAND (t1, 0);
--- 1057,1063 ----
  	Declaration *decl = e->e1->isVarExp ()->var;
  	if (decl->storage_class & (STCout | STCref))
  	  {
! 	    tree t2 = convert_for_assignment (e->e2, e->e1->type);
  	    tree t1 = build_expr (e->e1);
  	    /* Want reference to lhs, not indirect ref.  */
  	    t1 = TREE_OPERAND (t1, 0);
*************** public:
*** 1078,1085 ****
      if (tb1->ty == TY::Tstruct)
        {
  	tree t1 = build_expr (e->e1);
! 	tree t2 = convert_for_assignment (build_expr (e->e2, false, true),
! 					  e->e2->type, e->e1->type);
  	StructDeclaration *sd = tb1->isTypeStruct ()->sym;
  
  	/* Look for struct = 0.  */
--- 1077,1083 ----
      if (tb1->ty == TY::Tstruct)
        {
  	tree t1 = build_expr (e->e1);
! 	tree t2 = convert_for_assignment (e->e2, e->e1->type, true);
  	StructDeclaration *sd = tb1->isTypeStruct ()->sym;
  
  	/* Look for struct = 0.  */
*************** public:
*** 1157,1164 ****
  	    || (e->op == EXP::blit || e->e1->type->size () == 0))
  	  {
  	    tree t1 = build_expr (e->e1);
! 	    tree t2 = convert_for_assignment (build_expr (e->e2),
! 					      e->e2->type, e->e1->type);
  
  	    this->result_ = build_assign (modifycode, t1, t2);
  	    return;
--- 1155,1161 ----
  	    || (e->op == EXP::blit || e->e1->type->size () == 0))
  	  {
  	    tree t1 = build_expr (e->e1);
! 	    tree t2 = convert_for_assignment (e->e2, e->e1->type);
  
  	    this->result_ = build_assign (modifycode, t1, t2);
  	    return;
*************** public:
*** 1192,1199 ****
  
      /* Simple assignment.  */
      tree t1 = build_expr (e->e1);
!     tree t2 = convert_for_assignment (build_expr (e->e2),
! 				      e->e2->type, e->e1->type);
  
      this->result_ = build_assign (modifycode, t1, t2);
    }
--- 1189,1195 ----
  
      /* Simple assignment.  */
      tree t1 = build_expr (e->e1);
!     tree t2 = convert_for_assignment (e->e2, e->e1->type);
  
      this->result_ = build_assign (modifycode, t1, t2);
    }
*************** public:
*** 2708,2713 ****
--- 2704,2713 ----
  	    if (tb->ty == TY::Tarray)
  	      ctor = d_array_value (type, size_int (e->elements->length), ctor);
  
+ 	    /* Immutable literals can be placed in rodata.  */
+ 	    if (tb->isImmutable ())
+ 	      TREE_READONLY (decl) = 1;
+ 
  	    d_pushdecl (decl);
  	    rest_of_decl_compilation (decl, 1, 0);
  	  }
diff -Nrcpad gcc-12.3.0/gcc/d/imports.cc gcc-12.4.0/gcc/d/imports.cc
*** gcc-12.3.0/gcc/d/imports.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/imports.cc	Thu Jun 20 08:08:06 2024
*************** public:
*** 127,132 ****
--- 127,141 ----
      this->result_ = this->make_import (TYPE_STUB_DECL (type));
    }
  
+   void visit (VarDeclaration *d)
+   {
+     /* Not all kinds of manifest constants create a CONST_DECL.  */
+     if (!d->canTakeAddressOf () && !d->type->isscalar ())
+       return;
+ 
+     visit ((Declaration *) d);
+   }
+ 
    /* For now, ignore importing other kinds of dsymbols.  */
    void visit (ScopeDsymbol *)
    {
diff -Nrcpad gcc-12.3.0/gcc/d/intrinsics.cc gcc-12.4.0/gcc/d/intrinsics.cc
*** gcc-12.3.0/gcc/d/intrinsics.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/intrinsics.cc	Thu Jun 20 08:08:06 2024
*************** expand_volatile_load (tree callexp)
*** 721,726 ****
--- 721,727 ----
    tree type = build_qualified_type (TREE_TYPE (ptrtype), TYPE_QUAL_VOLATILE);
    tree result = indirect_ref (type, ptr);
    TREE_THIS_VOLATILE (result) = 1;
+   TREE_SIDE_EFFECTS (result) = 1;
  
    return result;
  }
*************** expand_volatile_store (tree callexp)
*** 748,753 ****
--- 749,755 ----
    tree type = build_qualified_type (TREE_TYPE (ptrtype), TYPE_QUAL_VOLATILE);
    tree result = indirect_ref (type, ptr);
    TREE_THIS_VOLATILE (result) = 1;
+   TREE_SIDE_EFFECTS (result) = 1;
  
    /* (*(volatile T *) ptr) = value;  */
    tree value = CALL_EXPR_ARG (callexp, 1);
diff -Nrcpad gcc-12.3.0/gcc/d/modules.cc gcc-12.4.0/gcc/d/modules.cc
*** gcc-12.3.0/gcc/d/modules.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/modules.cc	Thu Jun 20 08:08:06 2024
*************** static tree
*** 329,335 ****
  build_dso_cdtor_fn (bool ctor_p)
  {
    const char *name = ctor_p ? GDC_PREFIX ("dso_ctor") : GDC_PREFIX ("dso_dtor");
!   tree condition = ctor_p ? boolean_true_node : boolean_false_node;
  
    /* Declaration of dso_ctor/dso_dtor is:
  
--- 329,335 ----
  build_dso_cdtor_fn (bool ctor_p)
  {
    const char *name = ctor_p ? GDC_PREFIX ("dso_ctor") : GDC_PREFIX ("dso_dtor");
!   tree condition = ctor_p ? d_bool_true_node : d_bool_false_node;
  
    /* Declaration of dso_ctor/dso_dtor is:
  
*************** register_moduleinfo (Module *decl, tree
*** 452,458 ****
    d_finish_decl (dso_slot_node);
  
    dso_initialized_node = build_dso_registry_var (GDC_PREFIX ("dso_initialized"),
! 						 boolean_type_node);
    d_finish_decl (dso_initialized_node);
  
    /* Declare dso_ctor() and dso_dtor().  */
--- 452,458 ----
    d_finish_decl (dso_slot_node);
  
    dso_initialized_node = build_dso_registry_var (GDC_PREFIX ("dso_initialized"),
! 						 d_bool_type);
    d_finish_decl (dso_initialized_node);
  
    /* Declare dso_ctor() and dso_dtor().  */
diff -Nrcpad gcc-12.3.0/gcc/d/types.cc gcc-12.4.0/gcc/d/types.cc
*** gcc-12.3.0/gcc/d/types.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/d/types.cc	Thu Jun 20 08:08:06 2024
*************** public:
*** 1103,1108 ****
--- 1103,1113 ----
  	apply_user_attributes (t->sym, t->ctype);
  	finish_aggregate_type (structsize, alignsize, t->ctype);
        }
+     else
+       {
+ 	build_type_decl (t->ctype, t->sym);
+ 	apply_user_attributes (t->sym, t->ctype);
+       }
  
      TYPE_CONTEXT (t->ctype) = d_decl_context (t->sym);
      build_type_decl (t->ctype, t->sym);
diff -Nrcpad gcc-12.3.0/gcc/doc/avr-mmcu.texi gcc-12.4.0/gcc/doc/avr-mmcu.texi
*** gcc-12.3.0/gcc/doc/avr-mmcu.texi	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/doc/avr-mmcu.texi	Thu Jun 20 08:08:06 2024
***************
*** 34,44 ****
  
  @item avr4
  ``Enhanced'' devices with up to 8@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atmega48}, @code{atmega48a}, @code{atmega48p}, @code{atmega48pa}, @code{atmega48pb}, @code{atmega8}, @code{atmega8a}, @code{atmega8hva}, @code{atmega88}, @code{atmega88a}, @code{atmega88p}, @code{atmega88pa}, @code{atmega88pb}, @code{atmega8515}, @code{atmega8535}, @code{ata6285}, @code{ata6286}, @code{ata6289}, @code{ata6612c}, @code{at90pwm1}, @code{at90pwm2}, @code{at90pwm2b}, @code{at90pwm3}, @code{at90pwm3b}, @code{at90pwm81}.
  
  @item avr5
  ``Enhanced'' devices with 16@tie{}KiB up to 64@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atmega16}, @code{atmega16a}, @code{atmega16hva}, @code{atmega16hva2}, @code{atmega16hvb}, @code{atmega16hvbrevb}, @code{atmega16m1}, @code{atmega16u4}, @code{atmega161}, @code{atmega162}, @code{atmega163}, @code{atmega164a}, @code{atmega164p}, @code{atmega164pa}, @code{atmega165}, @code{atmega165a}, @code{atmega165p}, @code{atmega165pa}, @code{atmega168}, @code{atmega168a}, @code{atmega168p}, @code{atmega168pa}, @code{atmega168pb}, @code{atmega169}, @code{atmega169a}, @code{atmega169p}, @code{atmega169pa}, @code{atmega32}, @code{atmega32a}, @code{atmega32c1}, @code{atmega32hvb}, @code{atmega32hvbrevb}, @code{atmega32m1}, @code{atmega32u4}, @code{atmega32u6}, @code{atmega323}, @code{atmega324a}, @code{atmega324p}, @code{atmega324pa}, @code{atmega324pb}, @code{atmega325}, @code{atmega325a}, @code{atmega325p}, @code{atmega325pa}, @code{atmega328}, @code{atmega328p}, @code{atmega328pb}, @code{atmega329}, @code{atmega329a}, @code{atmega329p}, @code{atmega329pa}, @code{atmega3250}, @code{atmega3250a}, @code{atmega3250p}, @code{atmega3250pa}, @code{atmega3290}, @code{atmega3290a}, @code{atmega3290p}, @code{atmega3290pa}, @code{atmega406}, @code{atmega64}, @code{atmega64a}, @code{atmega64c1}, @code{atmega64hve}, @code{atmega64hve2}, @code{atmega64m1}, @code{atmega64rfr2}, @code{atmega640}, @code{atmega644}, @code{atmega644a}, @code{atmega644p}, @code{atmega644pa}, @code{atmega644rfr2}, @code{atmega645}, @code{atmega645a}, @code{atmega645p}, @code{atmega649}, @code{atmega649a}, @code{atmega649p}, @code{atmega6450}, @code{atmega6450a}, @code{atmega6450p}, @code{atmega6490}, @code{atmega6490a}, @code{atmega6490p}, @code{ata5795}, @code{ata5790}, @code{ata5790n}, @code{ata5791}, @code{ata6613c}, @code{ata6614q}, @code{ata5782}, @code{ata5831}, @code{ata8210}, @code{ata8510}, @code{ata5702m322}, @code{at90pwm161}, @code{at90pwm216}, @code{at90pwm316}, @code{at90can32}, @code{at90can64}, @code{at90scr100}, @code{at90usb646}, @code{at90usb647}, @code{at94k}, @code{m3000}.
  
  @item avr51
  ``Enhanced'' devices with 128@tie{}KiB of program memory.
--- 34,44 ----
  
  @item avr4
  ``Enhanced'' devices with up to 8@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atmega48}, @code{atmega48a}, @code{atmega48p}, @code{atmega48pa}, @code{atmega48pb}, @code{atmega8}, @code{atmega8a}, @code{atmega8hva}, @code{atmega88}, @code{atmega88a}, @code{atmega88p}, @code{atmega88pa}, @code{atmega88pb}, @code{atmega8515}, @code{atmega8535}, @code{ata5795}, @code{ata6285}, @code{ata6286}, @code{ata6289}, @code{ata6612c}, @code{at90pwm1}, @code{at90pwm2}, @code{at90pwm2b}, @code{at90pwm3}, @code{at90pwm3b}, @code{at90pwm81}.
  
  @item avr5
  ``Enhanced'' devices with 16@tie{}KiB up to 64@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atmega16}, @code{atmega16a}, @code{atmega16hva}, @code{atmega16hva2}, @code{atmega16hvb}, @code{atmega16hvbrevb}, @code{atmega16m1}, @code{atmega16u4}, @code{atmega161}, @code{atmega162}, @code{atmega163}, @code{atmega164a}, @code{atmega164p}, @code{atmega164pa}, @code{atmega165}, @code{atmega165a}, @code{atmega165p}, @code{atmega165pa}, @code{atmega168}, @code{atmega168a}, @code{atmega168p}, @code{atmega168pa}, @code{atmega168pb}, @code{atmega169}, @code{atmega169a}, @code{atmega169p}, @code{atmega169pa}, @code{atmega32}, @code{atmega32a}, @code{atmega32c1}, @code{atmega32hvb}, @code{atmega32hvbrevb}, @code{atmega32m1}, @code{atmega32u4}, @code{atmega32u6}, @code{atmega323}, @code{atmega324a}, @code{atmega324p}, @code{atmega324pa}, @code{atmega324pb}, @code{atmega325}, @code{atmega325a}, @code{atmega325p}, @code{atmega325pa}, @code{atmega328}, @code{atmega328p}, @code{atmega328pb}, @code{atmega329}, @code{atmega329a}, @code{atmega329p}, @code{atmega329pa}, @code{atmega3250}, @code{atmega3250a}, @code{atmega3250p}, @code{atmega3250pa}, @code{atmega3290}, @code{atmega3290a}, @code{atmega3290p}, @code{atmega3290pa}, @code{atmega406}, @code{atmega64}, @code{atmega64a}, @code{atmega64c1}, @code{atmega64hve}, @code{atmega64hve2}, @code{atmega64m1}, @code{atmega64rfr2}, @code{atmega640}, @code{atmega644}, @code{atmega644a}, @code{atmega644p}, @code{atmega644pa}, @code{atmega644rfr2}, @code{atmega645}, @code{atmega645a}, @code{atmega645p}, @code{atmega649}, @code{atmega649a}, @code{atmega649p}, @code{atmega6450}, @code{atmega6450a}, @code{atmega6450p}, @code{atmega6490}, @code{atmega6490a}, @code{atmega6490p}, @code{ata5790}, @code{ata5790n}, @code{ata5791}, @code{ata6613c}, @code{ata6614q}, @code{ata5782}, @code{ata5831}, @code{ata8210}, @code{ata8510}, @code{ata5787}, @code{ata5835}, @code{ata5700m322}, @code{ata5702m322}, @code{at90pwm161}, @code{at90pwm216}, @code{at90pwm316}, @code{at90can32}, @code{at90can64}, @code{at90scr100}, @code{at90usb646}, @code{at90usb647}, @code{at94k}, @code{m3000}.
  
  @item avr51
  ``Enhanced'' devices with 128@tie{}KiB of program memory.
***************
*** 50,64 ****
  
  @item avrxmega2
  ``XMEGA'' devices with more than 8@tie{}KiB and up to 64@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atxmega8e5}, @code{atxmega16a4}, @code{atxmega16a4u}, @code{atxmega16c4}, @code{atxmega16d4}, @code{atxmega16e5}, @code{atxmega32a4}, @code{atxmega32a4u}, @code{atxmega32c3}, @code{atxmega32c4}, @code{atxmega32d3}, @code{atxmega32d4}, @code{atxmega32e5}.
  
  @item avrxmega3
  ``XMEGA'' devices with up to 64@tie{}KiB of combined program memory and RAM, and with program memory visible in the RAM address space.
! @*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212}, @code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406}, @code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny417}, @code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814}, @code{attiny816}, @code{attiny817}, @code{attiny1604}, @code{attiny1606}, @code{attiny1607}, @code{attiny1614}, @code{attiny1616}, @code{attiny1617}, @code{attiny3214}, @code{attiny3216}, @code{attiny3217}, @code{atmega808}, @code{atmega809}, @code{atmega1608}, @code{atmega1609}, @code{atmega3208}, @code{atmega3209}, @code{atmega4808}, @code{atmega4809}.
  
  @item avrxmega4
  ``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atxmega64a3}, @code{atxmega64a3u}, @code{atxmega64a4u}, @code{atxmega64b1}, @code{atxmega64b3}, @code{atxmega64c3}, @code{atxmega64d3}, @code{atxmega64d4}.
  
  @item avrxmega5
  ``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory and more than 64@tie{}KiB of RAM.
--- 50,64 ----
  
  @item avrxmega2
  ``XMEGA'' devices with more than 8@tie{}KiB and up to 64@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atxmega8e5}, @code{atxmega16a4}, @code{atxmega16a4u}, @code{atxmega16c4}, @code{atxmega16d4}, @code{atxmega16e5}, @code{atxmega32a4}, @code{atxmega32a4u}, @code{atxmega32c3}, @code{atxmega32c4}, @code{atxmega32d3}, @code{atxmega32d4}, @code{atxmega32e5}, @code{avr64da28}, @code{avr64da32}, @code{avr64da48}, @code{avr64da64}, @code{avr64db28}, @code{avr64db32}, @code{avr64db48}, @code{avr64db64}, @code{avr64dd14}, @code{avr64dd20}, @code{avr64dd28}, @code{avr64dd32}, @code{avr64du28}, @code{avr64du32}, @code{avr64ea28}, @code{avr64ea32}, @code{avr64ea48}.
  
  @item avrxmega3
  ``XMEGA'' devices with up to 64@tie{}KiB of combined program memory and RAM, and with program memory visible in the RAM address space.
! @*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212}, @code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406}, @code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny416auto}, @code{attiny417}, @code{attiny424}, @code{attiny426}, @code{attiny427}, @code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814}, @code{attiny816}, @code{attiny817}, @code{attiny824}, @code{attiny826}, @code{attiny827}, @code{attiny1604}, @code{attiny1606}, @code{attiny1607}, @code{attiny1614}, @code{attiny1616}, @code{attiny1617}, @code{attiny1624}, @code{attiny1626}, @code{attiny1627}, @code{attiny3214}, @code{attiny3216}, @code{attiny3217}, @code{attiny3224}, @code{attiny3226}, @code{attiny3227}, @code{atmega808}, @code{atmega809}, @code{atmega1608}, @code{atmega1609}, @code{atmega3208}, @code{atmega3209}, @code{atmega4808}, @code{atmega4809}, @code{avr16dd14}, @code{avr16dd20}, @code{avr16dd28}, @code{avr16dd32}, @code{avr16du14}, @code{avr16du20}, @code{avr16du28}, @code{avr16du32}, @code{avr16ea28}, @code{avr16ea32}, @code{avr16ea48}, @code{avr16eb14}, @code{avr16eb20}, @code{avr16eb28}, @code{avr16eb32}, @code{avr32da28}, @code{avr32da32}, @code{avr32da48}, @code{avr32db28}, @code{avr32db32}, @code{avr32db48}, @code{avr32dd14}, @code{avr32dd20}, @code{avr32dd28}, @code{avr32dd32}, @code{avr32du14}, @code{avr32du20}, @code{avr32du28}, @code{avr32du32}, @code{avr32ea28}, @code{avr32ea32}, @code{avr32ea48}.
  
  @item avrxmega4
  ``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{atxmega64a3}, @code{atxmega64a3u}, @code{atxmega64a4u}, @code{atxmega64b1}, @code{atxmega64b3}, @code{atxmega64c3}, @code{atxmega64d3}, @code{atxmega64d4}, @code{avr128da28}, @code{avr128da32}, @code{avr128da48}, @code{avr128da64}, @code{avr128db28}, @code{avr128db32}, @code{avr128db48}, @code{avr128db64}.
  
  @item avrxmega5
  ``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory and more than 64@tie{}KiB of RAM.
***************
*** 74,80 ****
  
  @item avrtiny
  ``TINY'' Tiny core devices with 512@tie{}B up to 4@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{attiny4}, @code{attiny5}, @code{attiny9}, @code{attiny10}, @code{attiny20}, @code{attiny40}.
  
  @item avr1
  This ISA is implemented by the minimal AVR core and supported for assembler only.
--- 74,80 ----
  
  @item avrtiny
  ``TINY'' Tiny core devices with 512@tie{}B up to 4@tie{}KiB of program memory.
! @*@var{mcu}@tie{}= @code{attiny4}, @code{attiny5}, @code{attiny9}, @code{attiny10}, @code{attiny102}, @code{attiny104}, @code{attiny20}, @code{attiny40}.
  
  @item avr1
  This ISA is implemented by the minimal AVR core and supported for assembler only.
diff -Nrcpad gcc-12.3.0/gcc/doc/cpp.1 gcc-12.4.0/gcc/doc/cpp.1
*** gcc-12.3.0/gcc/doc/cpp.1	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/cpp.1	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "CPP 1"
! .TH CPP 1 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "CPP 1"
! .TH CPP 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** time of the source or package and it sho
*** 920,927 ****
  process.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
! \&\fIgcc\fR\|(1), and the Info entries for \fIcpp\fR and \fIgcc\fR.
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 1987\-2022 Free Software Foundation, Inc.
--- 924,931 ----
  process.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBgfdl\fR\|(7), \fBfsf\-funding\fR\|(7),
! \&\fBgcc\fR\|(1), and the Info entries for \fIcpp\fR and \fIgcc\fR.
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 1987\-2022 Free Software Foundation, Inc.
*************** Permission is granted to copy, distribut
*** 930,936 ****
  under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
  any later version published by the Free Software Foundation.  A copy of
  the license is included in the
! man page \fIgfdl\fR\|(7).
  This manual contains no Invariant Sections.  The Front-Cover Texts are
  (a) (see below), and the Back-Cover Texts are (b) (see below).
  .PP
--- 934,940 ----
  under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3 or
  any later version published by the Free Software Foundation.  A copy of
  the license is included in the
! man page \fBgfdl\fR\|(7).
  This manual contains no Invariant Sections.  The Front-Cover Texts are
  (a) (see below), and the Back-Cover Texts are (b) (see below).
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/cpp.info gcc-12.4.0/gcc/doc/cpp.info
*** gcc-12.3.0/gcc/doc/cpp.info	Mon May  8 12:27:46 2023
--- gcc-12.4.0/gcc/doc/cpp.info	Thu Jun 20 08:26:15 2024
***************
*** 1,4 ****
! This is cpp.info, produced by makeinfo version 6.5 from cpp.texi.
  
  Copyright (C) 1987-2022 Free Software Foundation, Inc.
  
--- 1,4 ----
! This is cpp.info, produced by makeinfo version 6.8 from cpp.texi.
  
  Copyright (C) 1987-2022 Free Software Foundation, Inc.
  
*************** without any initial '-' or '--'.
*** 5303,5389 ****
  [index]
  * Menu:
  
! * A:                                     Invocation.          (line 338)
! * C:                                     Invocation.          (line 347)
! * CC:                                    Invocation.          (line 359)
  * CPATH:                                 Environment Variables.
                                                                (line  15)
  * CPLUS_INCLUDE_PATH:                    Environment Variables.
                                                                (line  17)
  * C_INCLUDE_PATH:                        Environment Variables.
                                                                (line  16)
! * D:                                     Invocation.          (line  44)
! * d:                                     Invocation.          (line 408)
! * dD:                                    Invocation.          (line 427)
  * DEPENDENCIES_OUTPUT:                   Environment Variables.
!                                                               (line  45)
! * dI:                                    Invocation.          (line 437)
! * dM:                                    Invocation.          (line 416)
! * dN:                                    Invocation.          (line 433)
! * dU:                                    Invocation.          (line 441)
! * fdebug-cpp:                            Invocation.          (line 448)
! * fdirectives-only:                      Invocation.          (line 231)
! * fdollars-in-identifiers:               Invocation.          (line 252)
! * fexec-charset:                         Invocation.          (line 299)
! * fextended-identifiers:                 Invocation.          (line 255)
! * finput-charset:                        Invocation.          (line 314)
! * fmacro-prefix-map:                     Invocation.          (line 290)
! * fmax-include-depth:                    Invocation.          (line 264)
! * fno-canonical-system-headers:          Invocation.          (line 260)
! * fno-working-directory:                 Invocation.          (line 324)
! * fpreprocessed:                         Invocation.          (line 218)
! * ftabstop:                              Invocation.          (line 267)
! * ftrack-macro-expansion:                Invocation.          (line 273)
! * fwide-exec-charset:                    Invocation.          (line 304)
! * fworking-directory:                    Invocation.          (line 324)
! * H:                                     Invocation.          (line 401)
! * I:                                     Invocation.          (line 459)
! * I-:                                    Invocation.          (line 513)
! * idirafter:                             Invocation.          (line 459)
! * imacros:                               Invocation.          (line  82)
! * imultilib:                             Invocation.          (line 547)
! * include:                               Invocation.          (line  71)
! * iprefix:                               Invocation.          (line 529)
! * iquote:                                Invocation.          (line 459)
! * isysroot:                              Invocation.          (line 541)
! * isystem:                               Invocation.          (line 459)
! * iwithprefix:                           Invocation.          (line 535)
! * iwithprefixbefore:                     Invocation.          (line 535)
! * M:                                     Invocation.          (line 103)
! * MD:                                    Invocation.          (line 198)
! * MF:                                    Invocation.          (line 137)
! * MG:                                    Invocation.          (line 148)
! * MM:                                    Invocation.          (line 128)
! * MMD:                                   Invocation.          (line 214)
! * Mno-modules:                           Invocation.          (line 158)
! * MP:                                    Invocation.          (line 161)
! * MQ:                                    Invocation.          (line 188)
! * MT:                                    Invocation.          (line 173)
! * nostdinc:                              Invocation.          (line 551)
! * nostdinc++:                            Invocation.          (line 557)
  * OBJC_INCLUDE_PATH:                     Environment Variables.
                                                                (line  18)
! * P:                                     Invocation.          (line 371)
! * pthread:                               Invocation.          (line  96)
! * remap:                                 Invocation.          (line 397)
  * SOURCE_DATE_EPOCH:                     Environment Variables.
!                                                               (line  67)
  * SUNPRO_DEPENDENCIES:                   Environment Variables.
!                                                               (line  61)
! * traditional:                           Invocation.          (line 379)
! * traditional-cpp:                       Invocation.          (line 379)
! * trigraphs:                             Invocation.          (line 388)
! * U:                                     Invocation.          (line  67)
! * undef:                                 Invocation.          (line  91)
! * Wcomment:                              Invocation.          (line 563)
! * Wcomments:                             Invocation.          (line 563)
! * Wendif-labels:                         Invocation.          (line 607)
! * Wexpansion-to-defined:                 Invocation.          (line 582)
! * Wno-endif-labels:                      Invocation.          (line 607)
! * Wno-undef:                             Invocation.          (line 578)
! * Wtrigraphs:                            Invocation.          (line 568)
! * Wundef:                                Invocation.          (line 578)
! * Wunused-macros:                        Invocation.          (line 588)
  
  
  File: cpp.info,  Node: Concept Index,  Prev: Option Index,  Up: Top
--- 5303,5389 ----
  [index]
  * Menu:
  
! * A:                                     Invocation.          (line 337)
! * C:                                     Invocation.          (line 346)
! * CC:                                    Invocation.          (line 358)
  * CPATH:                                 Environment Variables.
                                                                (line  15)
  * CPLUS_INCLUDE_PATH:                    Environment Variables.
                                                                (line  17)
  * C_INCLUDE_PATH:                        Environment Variables.
                                                                (line  16)
! * D:                                     Invocation.          (line  43)
! * d:                                     Invocation.          (line 407)
! * dD:                                    Invocation.          (line 426)
  * DEPENDENCIES_OUTPUT:                   Environment Variables.
!                                                               (line  44)
! * dI:                                    Invocation.          (line 436)
! * dM:                                    Invocation.          (line 415)
! * dN:                                    Invocation.          (line 432)
! * dU:                                    Invocation.          (line 440)
! * fdebug-cpp:                            Invocation.          (line 447)
! * fdirectives-only:                      Invocation.          (line 230)
! * fdollars-in-identifiers:               Invocation.          (line 251)
! * fexec-charset:                         Invocation.          (line 298)
! * fextended-identifiers:                 Invocation.          (line 254)
! * finput-charset:                        Invocation.          (line 313)
! * fmacro-prefix-map:                     Invocation.          (line 289)
! * fmax-include-depth:                    Invocation.          (line 263)
! * fno-canonical-system-headers:          Invocation.          (line 259)
! * fno-working-directory:                 Invocation.          (line 323)
! * fpreprocessed:                         Invocation.          (line 217)
! * ftabstop:                              Invocation.          (line 266)
! * ftrack-macro-expansion:                Invocation.          (line 272)
! * fwide-exec-charset:                    Invocation.          (line 303)
! * fworking-directory:                    Invocation.          (line 323)
! * H:                                     Invocation.          (line 400)
! * I:                                     Invocation.          (line 458)
! * I-:                                    Invocation.          (line 512)
! * idirafter:                             Invocation.          (line 458)
! * imacros:                               Invocation.          (line  81)
! * imultilib:                             Invocation.          (line 546)
! * include:                               Invocation.          (line  70)
! * iprefix:                               Invocation.          (line 528)
! * iquote:                                Invocation.          (line 458)
! * isysroot:                              Invocation.          (line 540)
! * isystem:                               Invocation.          (line 458)
! * iwithprefix:                           Invocation.          (line 534)
! * iwithprefixbefore:                     Invocation.          (line 534)
! * M:                                     Invocation.          (line 102)
! * MD:                                    Invocation.          (line 197)
! * MF:                                    Invocation.          (line 136)
! * MG:                                    Invocation.          (line 147)
! * MM:                                    Invocation.          (line 127)
! * MMD:                                   Invocation.          (line 213)
! * Mno-modules:                           Invocation.          (line 157)
! * MP:                                    Invocation.          (line 160)
! * MQ:                                    Invocation.          (line 187)
! * MT:                                    Invocation.          (line 172)
! * nostdinc:                              Invocation.          (line 550)
! * nostdinc++:                            Invocation.          (line 556)
  * OBJC_INCLUDE_PATH:                     Environment Variables.
                                                                (line  18)
! * P:                                     Invocation.          (line 370)
! * pthread:                               Invocation.          (line  95)
! * remap:                                 Invocation.          (line 396)
  * SOURCE_DATE_EPOCH:                     Environment Variables.
!                                                               (line  66)
  * SUNPRO_DEPENDENCIES:                   Environment Variables.
!                                                               (line  60)
! * traditional:                           Invocation.          (line 378)
! * traditional-cpp:                       Invocation.          (line 378)
! * trigraphs:                             Invocation.          (line 387)
! * U:                                     Invocation.          (line  66)
! * undef:                                 Invocation.          (line  90)
! * Wcomment:                              Invocation.          (line 562)
! * Wcomments:                             Invocation.          (line 562)
! * Wendif-labels:                         Invocation.          (line 606)
! * Wexpansion-to-defined:                 Invocation.          (line 581)
! * Wno-endif-labels:                      Invocation.          (line 606)
! * Wno-undef:                             Invocation.          (line 577)
! * Wtrigraphs:                            Invocation.          (line 567)
! * Wundef:                                Invocation.          (line 577)
! * Wunused-macros:                        Invocation.          (line 587)
  
  
  File: cpp.info,  Node: Concept Index,  Prev: Option Index,  Up: Top
*************** Concept Index
*** 5409,5420 ****
  * assertions, canceling:                 Obsolete Features.   (line  59)
  * backslash-newline:                     Initial processing.  (line  61)
  * block comments:                        Initial processing.  (line  77)
! * C language, traditional:               Invocation.          (line 377)
  * C++ named operators:                   C++ Named Operators. (line   6)
  * character constants:                   Tokenization.        (line  81)
! * character set, execution:              Invocation.          (line 299)
! * character set, input:                  Invocation.          (line 314)
! * character set, wide execution:         Invocation.          (line 304)
  * command line:                          Invocation.          (line   6)
  * commenting out code:                   Deleted Code.        (line   6)
  * comments:                              Initial processing.  (line  77)
--- 5409,5420 ----
  * assertions, canceling:                 Obsolete Features.   (line  59)
  * backslash-newline:                     Initial processing.  (line  61)
  * block comments:                        Initial processing.  (line  77)
! * C language, traditional:               Invocation.          (line 376)
  * C++ named operators:                   C++ Named Operators. (line   6)
  * character constants:                   Tokenization.        (line  81)
! * character set, execution:              Invocation.          (line 298)
! * character set, input:                  Invocation.          (line 313)
! * character set, wide execution:         Invocation.          (line 303)
  * command line:                          Invocation.          (line   6)
  * commenting out code:                   Deleted Code.        (line   6)
  * comments:                              Initial processing.  (line  77)
*************** Concept Index
*** 5428,5437 ****
  * controlling macro:                     Once-Only Headers.   (line  35)
  * defined:                               Defined.             (line   6)
  * dependencies for make as output:       Environment Variables.
!                                                               (line  46)
  * dependencies for make as output <1>:   Environment Variables.
!                                                               (line  62)
! * dependencies, make:                    Invocation.          (line 103)
  * diagnostic:                            Diagnostics.         (line   6)
  * digraphs:                              Tokenization.        (line 100)
  * directive line:                        The preprocessing language.
--- 5428,5437 ----
  * controlling macro:                     Once-Only Headers.   (line  35)
  * defined:                               Defined.             (line   6)
  * dependencies for make as output:       Environment Variables.
!                                                               (line  45)
  * dependencies for make as output <1>:   Environment Variables.
!                                                               (line  61)
! * dependencies, make:                    Invocation.          (line 102)
  * diagnostic:                            Diagnostics.         (line   6)
  * digraphs:                              Tokenization.        (line 100)
  * directive line:                        The preprocessing language.
*************** Concept Index
*** 5470,5476 ****
  * macros in include:                     Computed Includes.   (line   6)
  * macros with arguments:                 Macro Arguments.     (line   6)
  * macros with variable arguments:        Variadic Macros.     (line   6)
! * make:                                  Invocation.          (line 103)
  * manifest constants:                    Object-like Macros.  (line   6)
  * named operators:                       C++ Named Operators. (line   6)
  * newlines in macro arguments:           Newlines in Arguments.
--- 5470,5476 ----
  * macros in include:                     Computed Includes.   (line   6)
  * macros with arguments:                 Macro Arguments.     (line   6)
  * macros with variable arguments:        Variadic Macros.     (line   6)
! * make:                                  Invocation.          (line 102)
  * manifest constants:                    Object-like Macros.  (line   6)
  * named operators:                       C++ Named Operators. (line   6)
  * newlines in macro arguments:           Newlines in Arguments.
*************** Concept Index
*** 5478,5484 ****
  * null directive:                        Other Directives.    (line  15)
  * numbers:                               Tokenization.        (line  58)
  * object-like macro:                     Object-like Macros.  (line   6)
! * options:                               Invocation.          (line  43)
  * options, grouping:                     Invocation.          (line  38)
  * other tokens:                          Tokenization.        (line 114)
  * output format:                         Preprocessor Output. (line  12)
--- 5478,5484 ----
  * null directive:                        Other Directives.    (line  15)
  * numbers:                               Tokenization.        (line  58)
  * object-like macro:                     Object-like Macros.  (line   6)
! * options:                               Invocation.          (line  42)
  * options, grouping:                     Invocation.          (line  38)
  * other tokens:                          Tokenization.        (line 114)
  * output format:                         Preprocessor Output. (line  12)
*************** Concept Index
*** 5525,5531 ****
  * token concatenation:                   Concatenation.       (line   6)
  * token pasting:                         Concatenation.       (line   6)
  * tokens:                                Tokenization.        (line   6)
! * traditional C language:                Invocation.          (line 377)
  * trigraphs:                             Initial processing.  (line  32)
  * undefining macros:                     Undefining and Redefining Macros.
                                                                (line   6)
--- 5525,5531 ----
  * token concatenation:                   Concatenation.       (line   6)
  * token pasting:                         Concatenation.       (line   6)
  * tokens:                                Tokenization.        (line   6)
! * traditional C language:                Invocation.          (line 376)
  * trigraphs:                             Initial processing.  (line  32)
  * undefining macros:                     Undefining and Redefining Macros.
                                                                (line   6)
*************** Node: Option Index224896
*** 5619,5621 ****
--- 5619,5626 ----
  Node: Concept Index230998
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/gcc/doc/cppinternals.info gcc-12.4.0/gcc/doc/cppinternals.info
*** gcc-12.3.0/gcc/doc/cppinternals.info	Mon May  8 12:27:46 2023
--- gcc-12.4.0/gcc/doc/cppinternals.info	Thu Jun 20 08:26:15 2024
***************
*** 1,4 ****
! This is cppinternals.info, produced by makeinfo version 6.5 from
  cppinternals.texi.
  
  INFO-DIR-SECTION Software development
--- 1,4 ----
! This is cppinternals.info, produced by makeinfo version 6.8 from
  cppinternals.texi.
  
  INFO-DIR-SECTION Software development
*************** will be removed, so I'll not discuss it
*** 137,143 ****
     The job of '_cpp_lex_direct' is simply to lex a token.  It is not
  responsible for issues like directive handling, returning lookahead
  tokens directly, multiple-include optimization, or conditional block
! skipping.  It necessarily has a minor ro^le to play in memory management
  of lexed lines.  I discuss these issues in a separate section (*note
  Lexing a line::).
  
--- 137,143 ----
     The job of '_cpp_lex_direct' is simply to lex a token.  It is not
  responsible for issues like directive handling, returning lookahead
  tokens directly, multiple-include optimization, or conditional block
! skipping.  It necessarily has a minor rôle to play in memory management
  of lexed lines.  I discuss these issues in a separate section (*note
  Lexing a line::).
  
*************** Node: Files44875
*** 1039,1041 ****
--- 1039,1046 ----
  Node: Concept Index48342
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/gcc/doc/extend.texi gcc-12.4.0/gcc/doc/extend.texi
*** gcc-12.3.0/gcc/doc/extend.texi	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/doc/extend.texi	Thu Jun 20 08:08:06 2024
*************** instructions, but allow the compiler to
*** 14618,14623 ****
--- 14618,14624 ----
  * Blackfin Built-in Functions::
  * BPF Built-in Functions::
  * FR-V Built-in Functions::
+ * LoongArch Base Built-in Functions::
  * MIPS DSP Built-in Functions::
  * MIPS Paired-Single Support::
  * MIPS Loongson Built-in Functions::
*************** Use the @code{nldub} instruction to load
*** 16068,16073 ****
--- 16069,16207 ----
  into the data cache.  The instruction is issued in slot I1@.
  @end table
  
+ @node LoongArch Base Built-in Functions
+ @subsection LoongArch Base Built-in Functions
+ 
+ These built-in functions are available for LoongArch.
+ 
+ Data Type Description:
+ @itemize
+ @item @code{imm0_31}, a compile-time constant in range 0 to 31;
+ @item @code{imm0_16383}, a compile-time constant in range 0 to 16383;
+ @item @code{imm0_32767}, a compile-time constant in range 0 to 32767;
+ @item @code{imm_n2048_2047}, a compile-time constant in range -2048 to 2047;
+ @end itemize
+ 
+ The intrinsics provided are listed below:
+ @smallexample
+     unsigned int __builtin_loongarch_movfcsr2gr (imm0_31)
+     void __builtin_loongarch_movgr2fcsr (imm0_31, unsigned int)
+     void __builtin_loongarch_cacop_d (imm0_31, unsigned long int, imm_n2048_2047)
+     unsigned int __builtin_loongarch_cpucfg (unsigned int)
+     void __builtin_loongarch_asrtle_d (long int, long int)
+     void __builtin_loongarch_asrtgt_d (long int, long int)
+     long int __builtin_loongarch_lddir_d (long int, imm0_31)
+     void __builtin_loongarch_ldpte_d (long int, imm0_31)
+ 
+     int __builtin_loongarch_crc_w_b_w (char, int)
+     int __builtin_loongarch_crc_w_h_w (short, int)
+     int __builtin_loongarch_crc_w_w_w (int, int)
+     int __builtin_loongarch_crc_w_d_w (long int, int)
+     int __builtin_loongarch_crcc_w_b_w (char, int)
+     int __builtin_loongarch_crcc_w_h_w (short, int)
+     int __builtin_loongarch_crcc_w_w_w (int, int)
+     int __builtin_loongarch_crcc_w_d_w (long int, int)
+ 
+     unsigned int __builtin_loongarch_csrrd_w (imm0_16383)
+     unsigned int __builtin_loongarch_csrwr_w (unsigned int, imm0_16383)
+     unsigned int __builtin_loongarch_csrxchg_w (unsigned int, unsigned int, imm0_16383)
+     unsigned long int __builtin_loongarch_csrrd_d (imm0_16383)
+     unsigned long int __builtin_loongarch_csrwr_d (unsigned long int, imm0_16383)
+     unsigned long int __builtin_loongarch_csrxchg_d (unsigned long int, unsigned long int, imm0_16383)
+ 
+     unsigned char __builtin_loongarch_iocsrrd_b (unsigned int)
+     unsigned short __builtin_loongarch_iocsrrd_h (unsigned int)
+     unsigned int __builtin_loongarch_iocsrrd_w (unsigned int)
+     unsigned long int __builtin_loongarch_iocsrrd_d (unsigned int)
+     void __builtin_loongarch_iocsrwr_b (unsigned char, unsigned int)
+     void __builtin_loongarch_iocsrwr_h (unsigned short, unsigned int)
+     void __builtin_loongarch_iocsrwr_w (unsigned int, unsigned int)
+     void __builtin_loongarch_iocsrwr_d (unsigned long int, unsigned int)
+ 
+     void __builtin_loongarch_dbar (imm0_32767)
+     void __builtin_loongarch_ibar (imm0_32767)
+ 
+     void __builtin_loongarch_syscall (imm0_32767)
+     void __builtin_loongarch_break (imm0_32767)
+ @end smallexample
+ 
+ @emph{Note:}Since the control register is divided into 32-bit and 64-bit,
+ but the access instruction is not distinguished. So GCC renames the control
+ instructions when implementing intrinsics.
+ 
+ Take the csrrd instruction as an example, built-in functions are implemented as follows:
+ @smallexample
+   __builtin_loongarch_csrrd_w  // When reading the 32-bit control register use.
+   __builtin_loongarch_csrrd_d  // When reading the 64-bit control register use.
+ @end smallexample
+ 
+ For the convenience of use, the built-in functions are encapsulated,
+ the encapsulated functions and @code{__drdtime_t, __rdtime_t} are
+ defined in the @code{larchintrin.h}. So if you call the following
+ function you need to include @code{larchintrin.h}.
+ 
+ @smallexample
+      typedef struct drdtime@{
+             unsigned long dvalue;
+             unsigned long dtimeid;
+      @} __drdtime_t;
+ 
+      typedef struct rdtime@{
+             unsigned int value;
+             unsigned int timeid;
+      @} __rdtime_t;
+ @end smallexample
+ 
+ @smallexample
+     __drdtime_t __rdtime_d (void)
+     __rdtime_t  __rdtimel_w (void)
+     __rdtime_t  __rdtimeh_w (void)
+     unsigned int  __movfcsr2gr (imm0_31)
+     void __movgr2fcsr (imm0_31, unsigned int)
+     void __cacop_d (imm0_31, unsigned long, imm_n2048_2047)
+     unsigned int  __cpucfg (unsigned int)
+     void __asrtle_d (long int, long int)
+     void __asrtgt_d (long int, long int)
+     long int  __lddir_d (long int, imm0_31)
+     void __ldpte_d (long int, imm0_31)
+ 
+     int  __crc_w_b_w (char, int)
+     int  __crc_w_h_w (short, int)
+     int  __crc_w_w_w (int, int)
+     int  __crc_w_d_w (long int, int)
+     int  __crcc_w_b_w (char, int)
+     int  __crcc_w_h_w (short, int)
+     int  __crcc_w_w_w (int, int)
+     int  __crcc_w_d_w (long int, int)
+ 
+     unsigned int  __csrrd_w (imm0_16383)
+     unsigned int  __csrwr_w (unsigned int, imm0_16383)
+     unsigned int  __csrxchg_w (unsigned int, unsigned int, imm0_16383)
+     unsigned long  __csrrd_d (imm0_16383)
+     unsigned long  __csrwr_d (unsigned long, imm0_16383)
+     unsigned long  __csrxchg_d (unsigned long, unsigned long, imm0_16383)
+ 
+     unsigned char   __iocsrrd_b (unsigned int)
+     unsigned short  __iocsrrd_h (unsigned int)
+     unsigned int  __iocsrrd_w (unsigned int)
+     unsigned long  __iocsrrd_d (unsigned int)
+     void __iocsrwr_b (unsigned char, unsigned int)
+     void __iocsrwr_h (unsigned short, unsigned int)
+     void __iocsrwr_w (unsigned int, unsigned int)
+     void __iocsrwr_d (unsigned long, unsigned int)
+ 
+     void __dbar (imm0_32767)
+     void __ibar (imm0_32767)
+ 
+     void __syscall (imm0_32767)
+     void __break (imm0_32767)
+ @end smallexample
+ 
+ Returns the value that is currently set in the @samp{tp} register.
+ @smallexample
+     void * __builtin_thread_pointer (void)
+ @end smallexample
+ 
  @node MIPS DSP Built-in Functions
  @subsection MIPS DSP Built-in Functions
  
diff -Nrcpad gcc-12.3.0/gcc/doc/fsf-funding.7 gcc-12.4.0/gcc/doc/fsf-funding.7
*** gcc-12.3.0/gcc/doc/fsf-funding.7	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/fsf-funding.7	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "FSF-FUNDING 7"
! .TH FSF-FUNDING 7 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "FSF-FUNDING 7"
! .TH FSF-FUNDING 7 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** proper thing to do\*(R" when distributin
*** 181,187 ****
  assure a steady flow of resources into making more free software.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7).
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 1994 Free Software Foundation, Inc.
--- 185,191 ----
  assure a steady flow of resources into making more free software.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBgfdl\fR\|(7).
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 1994 Free Software Foundation, Inc.
diff -Nrcpad gcc-12.3.0/gcc/doc/g++.1 gcc-12.4.0/gcc/doc/g++.1
*** gcc-12.3.0/gcc/doc/g++.1	Mon May  8 12:27:47 2023
--- gcc-12.4.0/gcc/doc/g++.1	Thu Jun 20 08:26:16 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GCC 1"
! .TH GCC 1 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GCC 1"
! .TH GCC 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** in the following sections.
*** 1008,1014 ****
  \&\-mcond\-move\-float  \-mno\-cond\-move\-float 
  \&\-memcpy  \-mno\-memcpy \-mstrict\-align \-mno\-strict\-align 
  \&\-mmax\-inline\-memcpy\-size=\fR\fIn\fR 
! \&\fB\-mcmodel=\fR\fIcode-model\fR
  .Sp
  \&\fIM32R/D Options\fR
  \&\fB\-m32r2  \-m32rx  \-m32r 
--- 1012,1018 ----
  \&\-mcond\-move\-float  \-mno\-cond\-move\-float 
  \&\-memcpy  \-mno\-memcpy \-mstrict\-align \-mno\-strict\-align 
  \&\-mmax\-inline\-memcpy\-size=\fR\fIn\fR 
! \&\fB\-mcmodel=\fR\fIcode-model\fR \fB\-mrelax \-mpass\-mrelax\-to\-as\fR
  .Sp
  \&\fIM32R/D Options\fR
  \&\fB\-m32r2  \-m32rx  \-m32r 
*************** See \s-1RS/6000\s0 and PowerPC Options.
*** 1438,1444 ****
  \&\-m96bit\-long\-double  \-mlong\-double\-64  \-mlong\-double\-80  \-mlong\-double\-128 
  \&\-mregparm=\fR\fInum\fR  \fB\-msseregparm 
  \&\-mveclibabi=\fR\fItype\fR  \fB\-mvect8\-ret\-in\-mem 
! \&\-mpc32  \-mpc64  \-mpc80  \-mstackrealign 
  \&\-momit\-leaf\-frame\-pointer  \-mno\-red\-zone  \-mno\-tls\-direct\-seg\-refs 
  \&\-mcmodel=\fR\fIcode-model\fR  \fB\-mabi=\fR\fIname\fR  \fB\-maddress\-mode=\fR\fImode\fR 
  \&\fB\-m32  \-m64  \-mx32  \-m16  \-miamcu  \-mlarge\-data\-threshold=\fR\fInum\fR 
--- 1442,1448 ----
  \&\-m96bit\-long\-double  \-mlong\-double\-64  \-mlong\-double\-80  \-mlong\-double\-128 
  \&\-mregparm=\fR\fInum\fR  \fB\-msseregparm 
  \&\-mveclibabi=\fR\fItype\fR  \fB\-mvect8\-ret\-in\-mem 
! \&\-mpc32  \-mpc64  \-mpc80 \-mdaz\-ftz \-mstackrealign 
  \&\-momit\-leaf\-frame\-pointer  \-mno\-red\-zone  \-mno\-tls\-direct\-seg\-refs 
  \&\-mcmodel=\fR\fIcode-model\fR  \fB\-mabi=\fR\fIname\fR  \fB\-maddress\-mode=\fR\fImode\fR 
  \&\fB\-m32  \-m64  \-mx32  \-m16  \-miamcu  \-mlarge\-data\-threshold=\fR\fInum\fR 
*************** and Objective\-\*(C+ programs:
*** 4361,4370 ****
  Use \fIclass-name\fR as the name of the class to instantiate for each
  literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR.  The default
  class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
! \&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below).  The
! \&\fB\-fconstant\-cfstrings\fR option, if also present, overrides the
! \&\fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals
! to be laid out as constant CoreFoundation strings.
  .IP "\fB\-fgnu\-runtime\fR" 4
  .IX Item "-fgnu-runtime"
  Generate object code compatible with the standard \s-1GNU\s0 Objective-C
--- 4365,4376 ----
  Use \fIclass-name\fR as the name of the class to instantiate for each
  literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR.  The default
  class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
! \&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below).  On
! Darwin (macOS, MacOS X) platforms, the \fB\-fconstant\-cfstrings\fR option, if
! also present, overrides the \fB\-fconstant\-string\-class\fR setting and cause
! \&\f(CW\*(C`@"..."\*(C'\fR literals to be laid out as constant CoreFoundation strings.
! Note that \fB\-fconstant\-cfstrings\fR is an alias for the target-specific
! \&\fB\-mconstant\-cfstrings\fR equivalent.
  .IP "\fB\-fgnu\-runtime\fR" 4
  .IX Item "-fgnu-runtime"
  Generate object code compatible with the standard \s-1GNU\s0 Objective-C
*************** This is useful if you need to make sure
*** 4456,4463 ****
  be compiled with older versions of \s-1GCC.\s0
  .IP "\fB\-freplace\-objc\-classes\fR" 4
  .IX Item "-freplace-objc-classes"
! Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in
! the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at
  run time instead.  This is used in conjunction with the Fix-and-Continue
  debugging mode, where the object file in question may be recompiled and
  dynamically reloaded in the course of program execution, without the need
--- 4462,4469 ----
  be compiled with older versions of \s-1GCC.\s0
  .IP "\fB\-freplace\-objc\-classes\fR" 4
  .IX Item "-freplace-objc-classes"
! Emit a special marker instructing \fB\fBld\fB\|(1)\fR not to statically link in
! the resulting object file, and allow \fB\fBdyld\fB\|(1)\fR to load it in at
  run time instead.  This is used in conjunction with the Fix-and-Continue
  debugging mode, where the object file in question may be recompiled and
  dynamically reloaded in the course of program execution, without the need
*************** bracketed, but that for \f(CW\*(C`b\*(C'
*** 6314,6320 ****
  This warning is enabled by \fB\-Wall\fR.
  .IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C, Objective\-\*(C+ and Fortran only)" 4
  .IX Item "-Wmissing-include-dirs (C, , Objective-C, Objective- and Fortran only)"
! Warn if a user-supplied include directory does not exist. This opions is disabled
  by default for C, \*(C+, Objective-C and Objective\-\*(C+. For Fortran, it is partially
  enabled by default by warning for \-I and \-J, only.
  .IP "\fB\-Wno\-missing\-profile\fR" 4
--- 6320,6326 ----
  This warning is enabled by \fB\-Wall\fR.
  .IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C, Objective\-\*(C+ and Fortran only)" 4
  .IX Item "-Wmissing-include-dirs (C, , Objective-C, Objective- and Fortran only)"
! Warn if a user-supplied include directory does not exist. This option is disabled
  by default for C, \*(C+, Objective-C and Objective\-\*(C+. For Fortran, it is partially
  enabled by default by warning for \-I and \-J, only.
  .IP "\fB\-Wno\-missing\-profile\fR" 4
*************** example of how this can happen:
*** 6810,6816 ****
  .Sp
  If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
  always initialized, but \s-1GCC\s0 doesn't know this. To suppress the
! warning, you need to provide a default case with \fIassert\fR\|(0) or
  similar code.
  .Sp
  This option also warns when a non-volatile automatic variable might be
--- 6816,6822 ----
  .Sp
  If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
  always initialized, but \s-1GCC\s0 doesn't know this. To suppress the
! warning, you need to provide a default case with \fBassert\fR\|(0) or
  similar code.
  .Sp
  This option also warns when a non-volatile automatic variable might be
*************** run-time callbacks.
*** 13943,13949 ****
  Emit special instrumentation for accesses to volatiles.
  .IP "\fBtsan-instrument-func-entry-exit\fR" 4
  .IX Item "tsan-instrument-func-entry-exit"
! Emit instrumentation calls to _\|\fI_tsan_func_entry()\fR and _\|\fI_tsan_func_exit()\fR.
  .IP "\fBmax-fsm-thread-path-insns\fR" 4
  .IX Item "max-fsm-thread-path-insns"
  Maximum number of instructions to copy when duplicating blocks on a
--- 13949,13955 ----
  Emit special instrumentation for accesses to volatiles.
  .IP "\fBtsan-instrument-func-entry-exit\fR" 4
  .IX Item "tsan-instrument-func-entry-exit"
! Emit instrumentation calls to _\|\fB_tsan_func_entry()\fR and _\|\fB_tsan_func_exit()\fR.
  .IP "\fBmax-fsm-thread-path-insns\fR" 4
  .IX Item "max-fsm-thread-path-insns"
  Maximum number of instructions to copy when duplicating blocks on a
*************** performance of the code.  Permissible va
*** 18462,18468 ****
  \&\fBcortex\-a75.cortex\-a55\fR, \fBcortex\-a76.cortex\-a55\fR,
  \&\fBcortex\-r82\fR, \fBcortex\-x1\fR, \fBcortex\-x2\fR,
  \&\fBcortex\-a510\fR, \fBcortex\-a710\fR, \fBampere1\fR,
! \&\fBampere1a\fR, \fBnative\fR.
  .Sp
  The values \fBcortex\-a57.cortex\-a53\fR, \fBcortex\-a72.cortex\-a53\fR,
  \&\fBcortex\-a73.cortex\-a35\fR, \fBcortex\-a73.cortex\-a53\fR,
--- 18468,18474 ----
  \&\fBcortex\-a75.cortex\-a55\fR, \fBcortex\-a76.cortex\-a55\fR,
  \&\fBcortex\-r82\fR, \fBcortex\-x1\fR, \fBcortex\-x2\fR,
  \&\fBcortex\-a510\fR, \fBcortex\-a710\fR, \fBampere1\fR,
! \&\fBampere1a\fR, \fBcobalt\-100\fR and \fBnative\fR.
  .Sp
  The values \fBcortex\-a57.cortex\-a53\fR, \fBcortex\-a72.cortex\-a53\fR,
  \&\fBcortex\-a73.cortex\-a35\fR, \fBcortex\-a73.cortex\-a53\fR,
*************** The default for this option is \fBavr2\f
*** 20783,20794 ****
  .el .IP "\f(CWavr4\fR" 4
  .IX Item "avr4"
  \&\*(L"Enhanced\*(R" devices with up to 8 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega48\*(C'\fR, \f(CW\*(C`atmega48a\*(C'\fR, \f(CW\*(C`atmega48p\*(C'\fR, \f(CW\*(C`atmega48pa\*(C'\fR, \f(CW\*(C`atmega48pb\*(C'\fR, \f(CW\*(C`atmega8\*(C'\fR, \f(CW\*(C`atmega8a\*(C'\fR, \f(CW\*(C`atmega8hva\*(C'\fR, \f(CW\*(C`atmega88\*(C'\fR, \f(CW\*(C`atmega88a\*(C'\fR, \f(CW\*(C`atmega88p\*(C'\fR, \f(CW\*(C`atmega88pa\*(C'\fR, \f(CW\*(C`atmega88pb\*(C'\fR, \f(CW\*(C`atmega8515\*(C'\fR, \f(CW\*(C`atmega8535\*(C'\fR, \f(CW\*(C`ata6285\*(C'\fR, \f(CW\*(C`ata6286\*(C'\fR, \f(CW\*(C`ata6289\*(C'\fR, \f(CW\*(C`ata6612c\*(C'\fR, \f(CW\*(C`at90pwm1\*(C'\fR, \f(CW\*(C`at90pwm2\*(C'\fR, \f(CW\*(C`at90pwm2b\*(C'\fR, \f(CW\*(C`at90pwm3\*(C'\fR, \f(CW\*(C`at90pwm3b\*(C'\fR, \f(CW\*(C`at90pwm81\*(C'\fR.
  .ie n .IP """avr5""" 4
  .el .IP "\f(CWavr5\fR" 4
  .IX Item "avr5"
  \&\*(L"Enhanced\*(R" devices with 16 KiB up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega16\*(C'\fR, \f(CW\*(C`atmega16a\*(C'\fR, \f(CW\*(C`atmega16hva\*(C'\fR, \f(CW\*(C`atmega16hva2\*(C'\fR, \f(CW\*(C`atmega16hvb\*(C'\fR, \f(CW\*(C`atmega16hvbrevb\*(C'\fR, \f(CW\*(C`atmega16m1\*(C'\fR, \f(CW\*(C`atmega16u4\*(C'\fR, \f(CW\*(C`atmega161\*(C'\fR, \f(CW\*(C`atmega162\*(C'\fR, \f(CW\*(C`atmega163\*(C'\fR, \f(CW\*(C`atmega164a\*(C'\fR, \f(CW\*(C`atmega164p\*(C'\fR, \f(CW\*(C`atmega164pa\*(C'\fR, \f(CW\*(C`atmega165\*(C'\fR, \f(CW\*(C`atmega165a\*(C'\fR, \f(CW\*(C`atmega165p\*(C'\fR, \f(CW\*(C`atmega165pa\*(C'\fR, \f(CW\*(C`atmega168\*(C'\fR, \f(CW\*(C`atmega168a\*(C'\fR, \f(CW\*(C`atmega168p\*(C'\fR, \f(CW\*(C`atmega168pa\*(C'\fR, \f(CW\*(C`atmega168pb\*(C'\fR, \f(CW\*(C`atmega169\*(C'\fR, \f(CW\*(C`atmega169a\*(C'\fR, \f(CW\*(C`atmega169p\*(C'\fR, \f(CW\*(C`atmega169pa\*(C'\fR, \f(CW\*(C`atmega32\*(C'\fR, \f(CW\*(C`atmega32a\*(C'\fR, \f(CW\*(C`atmega32c1\*(C'\fR, \f(CW\*(C`atmega32hvb\*(C'\fR, \f(CW\*(C`atmega32hvbrevb\*(C'\fR, \f(CW\*(C`atmega32m1\*(C'\fR, \f(CW\*(C`atmega32u4\*(C'\fR, \f(CW\*(C`atmega32u6\*(C'\fR, \f(CW\*(C`atmega323\*(C'\fR, \f(CW\*(C`atmega324a\*(C'\fR, \f(CW\*(C`atmega324p\*(C'\fR, \f(CW\*(C`atmega324pa\*(C'\fR, \f(CW\*(C`atmega324pb\*(C'\fR, \f(CW\*(C`atmega325\*(C'\fR, \f(CW\*(C`atmega325a\*(C'\fR, \f(CW\*(C`atmega325p\*(C'\fR, \f(CW\*(C`atmega325pa\*(C'\fR, \f(CW\*(C`atmega328\*(C'\fR, \f(CW\*(C`atmega328p\*(C'\fR, \f(CW\*(C`atmega328pb\*(C'\fR, \f(CW\*(C`atmega329\*(C'\fR, \f(CW\*(C`atmega329a\*(C'\fR, \f(CW\*(C`atmega329p\*(C'\fR, \f(CW\*(C`atmega329pa\*(C'\fR, \f(CW\*(C`atmega3250\*(C'\fR, \f(CW\*(C`atmega3250a\*(C'\fR, \f(CW\*(C`atmega3250p\*(C'\fR, \f(CW\*(C`atmega3250pa\*(C'\fR, \f(CW\*(C`atmega3290\*(C'\fR, \f(CW\*(C`atmega3290a\*(C'\fR, \f(CW\*(C`atmega3290p\*(C'\fR, \f(CW\*(C`atmega3290pa\*(C'\fR, \f(CW\*(C`atmega406\*(C'\fR, \f(CW\*(C`atmega64\*(C'\fR, \f(CW\*(C`atmega64a\*(C'\fR, \f(CW\*(C`atmega64c1\*(C'\fR, \f(CW\*(C`atmega64hve\*(C'\fR, \f(CW\*(C`atmega64hve2\*(C'\fR, \f(CW\*(C`atmega64m1\*(C'\fR, \f(CW\*(C`atmega64rfr2\*(C'\fR, \f(CW\*(C`atmega640\*(C'\fR, \f(CW\*(C`atmega644\*(C'\fR, \f(CW\*(C`atmega644a\*(C'\fR, \f(CW\*(C`atmega644p\*(C'\fR, \f(CW\*(C`atmega644pa\*(C'\fR, \f(CW\*(C`atmega644rfr2\*(C'\fR, \f(CW\*(C`atmega645\*(C'\fR, \f(CW\*(C`atmega645a\*(C'\fR, \f(CW\*(C`atmega645p\*(C'\fR, \f(CW\*(C`atmega649\*(C'\fR, \f(CW\*(C`atmega649a\*(C'\fR, \f(CW\*(C`atmega649p\*(C'\fR, \f(CW\*(C`atmega6450\*(C'\fR, \f(CW\*(C`atmega6450a\*(C'\fR, \f(CW\*(C`atmega6450p\*(C'\fR, \f(CW\*(C`atmega6490\*(C'\fR, \f(CW\*(C`atmega6490a\*(C'\fR, \f(CW\*(C`atmega6490p\*(C'\fR, \f(CW\*(C`ata5795\*(C'\fR, \f(CW\*(C`ata5790\*(C'\fR, \f(CW\*(C`ata5790n\*(C'\fR, \f(CW\*(C`ata5791\*(C'\fR, \f(CW\*(C`ata6613c\*(C'\fR, \f(CW\*(C`ata6614q\*(C'\fR, \f(CW\*(C`ata5782\*(C'\fR, \f(CW\*(C`ata5831\*(C'\fR, \f(CW\*(C`ata8210\*(C'\fR, \f(CW\*(C`ata8510\*(C'\fR, \f(CW\*(C`ata5702m322\*(C'\fR, \f(CW\*(C`at90pwm161\*(C'\fR, \f(CW\*(C`at90pwm216\*(C'\fR, \f(CW\*(C`at90pwm316\*(C'\fR, \f(CW\*(C`at90can32\*(C'\fR, \f(CW\*(C`at90can64\*(C'\fR, \f(CW\*(C`at90scr100\*(C'\fR, \f(CW\*(C`at90usb646\*(C'\fR, \f(CW\*(C`at90usb647\*(C'\fR, \f(CW\*(C`at94k\*(C'\fR, \f(CW\*(C`m3000\*(C'\fR.
  .ie n .IP """avr51""" 4
  .el .IP "\f(CWavr51\fR" 4
  .IX Item "avr51"
--- 20789,20800 ----
  .el .IP "\f(CWavr4\fR" 4
  .IX Item "avr4"
  \&\*(L"Enhanced\*(R" devices with up to 8 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega48\*(C'\fR, \f(CW\*(C`atmega48a\*(C'\fR, \f(CW\*(C`atmega48p\*(C'\fR, \f(CW\*(C`atmega48pa\*(C'\fR, \f(CW\*(C`atmega48pb\*(C'\fR, \f(CW\*(C`atmega8\*(C'\fR, \f(CW\*(C`atmega8a\*(C'\fR, \f(CW\*(C`atmega8hva\*(C'\fR, \f(CW\*(C`atmega88\*(C'\fR, \f(CW\*(C`atmega88a\*(C'\fR, \f(CW\*(C`atmega88p\*(C'\fR, \f(CW\*(C`atmega88pa\*(C'\fR, \f(CW\*(C`atmega88pb\*(C'\fR, \f(CW\*(C`atmega8515\*(C'\fR, \f(CW\*(C`atmega8535\*(C'\fR, \f(CW\*(C`ata5795\*(C'\fR, \f(CW\*(C`ata6285\*(C'\fR, \f(CW\*(C`ata6286\*(C'\fR, \f(CW\*(C`ata6289\*(C'\fR, \f(CW\*(C`ata6612c\*(C'\fR, \f(CW\*(C`at90pwm1\*(C'\fR, \f(CW\*(C`at90pwm2\*(C'\fR, \f(CW\*(C`at90pwm2b\*(C'\fR, \f(CW\*(C`at90pwm3\*(C'\fR, \f(CW\*(C`at90pwm3b\*(C'\fR, \f(CW\*(C`at90pwm81\*(C'\fR.
  .ie n .IP """avr5""" 4
  .el .IP "\f(CWavr5\fR" 4
  .IX Item "avr5"
  \&\*(L"Enhanced\*(R" devices with 16 KiB up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega16\*(C'\fR, \f(CW\*(C`atmega16a\*(C'\fR, \f(CW\*(C`atmega16hva\*(C'\fR, \f(CW\*(C`atmega16hva2\*(C'\fR, \f(CW\*(C`atmega16hvb\*(C'\fR, \f(CW\*(C`atmega16hvbrevb\*(C'\fR, \f(CW\*(C`atmega16m1\*(C'\fR, \f(CW\*(C`atmega16u4\*(C'\fR, \f(CW\*(C`atmega161\*(C'\fR, \f(CW\*(C`atmega162\*(C'\fR, \f(CW\*(C`atmega163\*(C'\fR, \f(CW\*(C`atmega164a\*(C'\fR, \f(CW\*(C`atmega164p\*(C'\fR, \f(CW\*(C`atmega164pa\*(C'\fR, \f(CW\*(C`atmega165\*(C'\fR, \f(CW\*(C`atmega165a\*(C'\fR, \f(CW\*(C`atmega165p\*(C'\fR, \f(CW\*(C`atmega165pa\*(C'\fR, \f(CW\*(C`atmega168\*(C'\fR, \f(CW\*(C`atmega168a\*(C'\fR, \f(CW\*(C`atmega168p\*(C'\fR, \f(CW\*(C`atmega168pa\*(C'\fR, \f(CW\*(C`atmega168pb\*(C'\fR, \f(CW\*(C`atmega169\*(C'\fR, \f(CW\*(C`atmega169a\*(C'\fR, \f(CW\*(C`atmega169p\*(C'\fR, \f(CW\*(C`atmega169pa\*(C'\fR, \f(CW\*(C`atmega32\*(C'\fR, \f(CW\*(C`atmega32a\*(C'\fR, \f(CW\*(C`atmega32c1\*(C'\fR, \f(CW\*(C`atmega32hvb\*(C'\fR, \f(CW\*(C`atmega32hvbrevb\*(C'\fR, \f(CW\*(C`atmega32m1\*(C'\fR, \f(CW\*(C`atmega32u4\*(C'\fR, \f(CW\*(C`atmega32u6\*(C'\fR, \f(CW\*(C`atmega323\*(C'\fR, \f(CW\*(C`atmega324a\*(C'\fR, \f(CW\*(C`atmega324p\*(C'\fR, \f(CW\*(C`atmega324pa\*(C'\fR, \f(CW\*(C`atmega324pb\*(C'\fR, \f(CW\*(C`atmega325\*(C'\fR, \f(CW\*(C`atmega325a\*(C'\fR, \f(CW\*(C`atmega325p\*(C'\fR, \f(CW\*(C`atmega325pa\*(C'\fR, \f(CW\*(C`atmega328\*(C'\fR, \f(CW\*(C`atmega328p\*(C'\fR, \f(CW\*(C`atmega328pb\*(C'\fR, \f(CW\*(C`atmega329\*(C'\fR, \f(CW\*(C`atmega329a\*(C'\fR, \f(CW\*(C`atmega329p\*(C'\fR, \f(CW\*(C`atmega329pa\*(C'\fR, \f(CW\*(C`atmega3250\*(C'\fR, \f(CW\*(C`atmega3250a\*(C'\fR, \f(CW\*(C`atmega3250p\*(C'\fR, \f(CW\*(C`atmega3250pa\*(C'\fR, \f(CW\*(C`atmega3290\*(C'\fR, \f(CW\*(C`atmega3290a\*(C'\fR, \f(CW\*(C`atmega3290p\*(C'\fR, \f(CW\*(C`atmega3290pa\*(C'\fR, \f(CW\*(C`atmega406\*(C'\fR, \f(CW\*(C`atmega64\*(C'\fR, \f(CW\*(C`atmega64a\*(C'\fR, \f(CW\*(C`atmega64c1\*(C'\fR, \f(CW\*(C`atmega64hve\*(C'\fR, \f(CW\*(C`atmega64hve2\*(C'\fR, \f(CW\*(C`atmega64m1\*(C'\fR, \f(CW\*(C`atmega64rfr2\*(C'\fR, \f(CW\*(C`atmega640\*(C'\fR, \f(CW\*(C`atmega644\*(C'\fR, \f(CW\*(C`atmega644a\*(C'\fR, \f(CW\*(C`atmega644p\*(C'\fR, \f(CW\*(C`atmega644pa\*(C'\fR, \f(CW\*(C`atmega644rfr2\*(C'\fR, \f(CW\*(C`atmega645\*(C'\fR, \f(CW\*(C`atmega645a\*(C'\fR, \f(CW\*(C`atmega645p\*(C'\fR, \f(CW\*(C`atmega649\*(C'\fR, \f(CW\*(C`atmega649a\*(C'\fR, \f(CW\*(C`atmega649p\*(C'\fR, \f(CW\*(C`atmega6450\*(C'\fR, \f(CW\*(C`atmega6450a\*(C'\fR, \f(CW\*(C`atmega6450p\*(C'\fR, \f(CW\*(C`atmega6490\*(C'\fR, \f(CW\*(C`atmega6490a\*(C'\fR, \f(CW\*(C`atmega6490p\*(C'\fR, \f(CW\*(C`ata5790\*(C'\fR, \f(CW\*(C`ata5790n\*(C'\fR, \f(CW\*(C`ata5791\*(C'\fR, \f(CW\*(C`ata6613c\*(C'\fR, \f(CW\*(C`ata6614q\*(C'\fR, \f(CW\*(C`ata5782\*(C'\fR, \f(CW\*(C`ata5831\*(C'\fR, \f(CW\*(C`ata8210\*(C'\fR, \f(CW\*(C`ata8510\*(C'\fR, \f(CW\*(C`ata5787\*(C'\fR, \f(CW\*(C`ata5835\*(C'\fR, \f(CW\*(C`ata5700m322\*(C'\fR, \f(CW\*(C`ata5702m322\*(C'\fR, \f(CW\*(C`at90pwm161\*(C'\fR, \f(CW\*(C`at90pwm216\*(C'\fR, \f(CW\*(C`at90pwm316\*(C'\fR, \f(CW\*(C`at90can32\*(C'\fR, \f(CW\*(C`at90can64\*(C'\fR, \f(CW\*(C`at90scr100\*(C'\fR, \f(CW\*(C`at90usb646\*(C'\fR, \f(CW\*(C`at90usb647\*(C'\fR, \f(CW\*(C`at94k\*(C'\fR, \f(CW\*(C`m3000\*(C'\fR.
  .ie n .IP """avr51""" 4
  .el .IP "\f(CWavr51\fR" 4
  .IX Item "avr51"
*************** The default for this option is \fBavr2\f
*** 20803,20819 ****
  .el .IP "\f(CWavrxmega2\fR" 4
  .IX Item "avrxmega2"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 8 KiB and up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega8e5\*(C'\fR, \f(CW\*(C`atxmega16a4\*(C'\fR, \f(CW\*(C`atxmega16a4u\*(C'\fR, \f(CW\*(C`atxmega16c4\*(C'\fR, \f(CW\*(C`atxmega16d4\*(C'\fR, \f(CW\*(C`atxmega16e5\*(C'\fR, \f(CW\*(C`atxmega32a4\*(C'\fR, \f(CW\*(C`atxmega32a4u\*(C'\fR, \f(CW\*(C`atxmega32c3\*(C'\fR, \f(CW\*(C`atxmega32c4\*(C'\fR, \f(CW\*(C`atxmega32d3\*(C'\fR, \f(CW\*(C`atxmega32d4\*(C'\fR, \f(CW\*(C`atxmega32e5\*(C'\fR.
  .ie n .IP """avrxmega3""" 4
  .el .IP "\f(CWavrxmega3\fR" 4
  .IX Item "avrxmega3"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with up to 64 KiB of combined program memory and \s-1RAM,\s0 and with program memory visible in the \s-1RAM\s0 address space.
! \&\fImcu\fR = \f(CW\*(C`attiny202\*(C'\fR, \f(CW\*(C`attiny204\*(C'\fR, \f(CW\*(C`attiny212\*(C'\fR, \f(CW\*(C`attiny214\*(C'\fR, \f(CW\*(C`attiny402\*(C'\fR, \f(CW\*(C`attiny404\*(C'\fR, \f(CW\*(C`attiny406\*(C'\fR, \f(CW\*(C`attiny412\*(C'\fR, \f(CW\*(C`attiny414\*(C'\fR, \f(CW\*(C`attiny416\*(C'\fR, \f(CW\*(C`attiny417\*(C'\fR, \f(CW\*(C`attiny804\*(C'\fR, \f(CW\*(C`attiny806\*(C'\fR, \f(CW\*(C`attiny807\*(C'\fR, \f(CW\*(C`attiny814\*(C'\fR, \f(CW\*(C`attiny816\*(C'\fR, \f(CW\*(C`attiny817\*(C'\fR, \f(CW\*(C`attiny1604\*(C'\fR, \f(CW\*(C`attiny1606\*(C'\fR, \f(CW\*(C`attiny1607\*(C'\fR, \f(CW\*(C`attiny1614\*(C'\fR, \f(CW\*(C`attiny1616\*(C'\fR, \f(CW\*(C`attiny1617\*(C'\fR, \f(CW\*(C`attiny3214\*(C'\fR, \f(CW\*(C`attiny3216\*(C'\fR, \f(CW\*(C`attiny3217\*(C'\fR, \f(CW\*(C`atmega808\*(C'\fR, \f(CW\*(C`atmega809\*(C'\fR, \f(CW\*(C`atmega1608\*(C'\fR, \f(CW\*(C`atmega1609\*(C'\fR, \f(CW\*(C`atmega3208\*(C'\fR, \f(CW\*(C`atmega3209\*(C'\fR, \f(CW\*(C`atmega4808\*(C'\fR, \f(CW\*(C`atmega4809\*(C'\fR.
  .ie n .IP """avrxmega4""" 4
  .el .IP "\f(CWavrxmega4\fR" 4
  .IX Item "avrxmega4"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 64 KiB and up to 128 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega64a3\*(C'\fR, \f(CW\*(C`atxmega64a3u\*(C'\fR, \f(CW\*(C`atxmega64a4u\*(C'\fR, \f(CW\*(C`atxmega64b1\*(C'\fR, \f(CW\*(C`atxmega64b3\*(C'\fR, \f(CW\*(C`atxmega64c3\*(C'\fR, \f(CW\*(C`atxmega64d3\*(C'\fR, \f(CW\*(C`atxmega64d4\*(C'\fR.
  .ie n .IP """avrxmega5""" 4
  .el .IP "\f(CWavrxmega5\fR" 4
  .IX Item "avrxmega5"
--- 20809,20825 ----
  .el .IP "\f(CWavrxmega2\fR" 4
  .IX Item "avrxmega2"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 8 KiB and up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega8e5\*(C'\fR, \f(CW\*(C`atxmega16a4\*(C'\fR, \f(CW\*(C`atxmega16a4u\*(C'\fR, \f(CW\*(C`atxmega16c4\*(C'\fR, \f(CW\*(C`atxmega16d4\*(C'\fR, \f(CW\*(C`atxmega16e5\*(C'\fR, \f(CW\*(C`atxmega32a4\*(C'\fR, \f(CW\*(C`atxmega32a4u\*(C'\fR, \f(CW\*(C`atxmega32c3\*(C'\fR, \f(CW\*(C`atxmega32c4\*(C'\fR, \f(CW\*(C`atxmega32d3\*(C'\fR, \f(CW\*(C`atxmega32d4\*(C'\fR, \f(CW\*(C`atxmega32e5\*(C'\fR, \f(CW\*(C`avr64da28\*(C'\fR, \f(CW\*(C`avr64da32\*(C'\fR, \f(CW\*(C`avr64da48\*(C'\fR, \f(CW\*(C`avr64da64\*(C'\fR, \f(CW\*(C`avr64db28\*(C'\fR, \f(CW\*(C`avr64db32\*(C'\fR, \f(CW\*(C`avr64db48\*(C'\fR, \f(CW\*(C`avr64db64\*(C'\fR, \f(CW\*(C`avr64dd14\*(C'\fR, \f(CW\*(C`avr64dd20\*(C'\fR, \f(CW\*(C`avr64dd28\*(C'\fR, \f(CW\*(C`avr64dd32\*(C'\fR, \f(CW\*(C`avr64du28\*(C'\fR, \f(CW\*(C`avr64du32\*(C'\fR, \f(CW\*(C`avr64ea28\*(C'\fR, \f(CW\*(C`avr64ea32\*(C'\fR, \f(CW\*(C`avr64ea48\*(C'\fR.
  .ie n .IP """avrxmega3""" 4
  .el .IP "\f(CWavrxmega3\fR" 4
  .IX Item "avrxmega3"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with up to 64 KiB of combined program memory and \s-1RAM,\s0 and with program memory visible in the \s-1RAM\s0 address space.
! \&\fImcu\fR = \f(CW\*(C`attiny202\*(C'\fR, \f(CW\*(C`attiny204\*(C'\fR, \f(CW\*(C`attiny212\*(C'\fR, \f(CW\*(C`attiny214\*(C'\fR, \f(CW\*(C`attiny402\*(C'\fR, \f(CW\*(C`attiny404\*(C'\fR, \f(CW\*(C`attiny406\*(C'\fR, \f(CW\*(C`attiny412\*(C'\fR, \f(CW\*(C`attiny414\*(C'\fR, \f(CW\*(C`attiny416\*(C'\fR, \f(CW\*(C`attiny416auto\*(C'\fR, \f(CW\*(C`attiny417\*(C'\fR, \f(CW\*(C`attiny424\*(C'\fR, \f(CW\*(C`attiny426\*(C'\fR, \f(CW\*(C`attiny427\*(C'\fR, \f(CW\*(C`attiny804\*(C'\fR, \f(CW\*(C`attiny806\*(C'\fR, \f(CW\*(C`attiny807\*(C'\fR, \f(CW\*(C`attiny814\*(C'\fR, \f(CW\*(C`attiny816\*(C'\fR, \f(CW\*(C`attiny817\*(C'\fR, \f(CW\*(C`attiny824\*(C'\fR, \f(CW\*(C`attiny826\*(C'\fR, \f(CW\*(C`attiny827\*(C'\fR, \f(CW\*(C`attiny1604\*(C'\fR, \f(CW\*(C`attiny1606\*(C'\fR, \f(CW\*(C`attiny1607\*(C'\fR, \f(CW\*(C`attiny1614\*(C'\fR, \f(CW\*(C`attiny1616\*(C'\fR, \f(CW\*(C`attiny1617\*(C'\fR, \f(CW\*(C`attiny1624\*(C'\fR, \f(CW\*(C`attiny1626\*(C'\fR, \f(CW\*(C`attiny1627\*(C'\fR, \f(CW\*(C`attiny3214\*(C'\fR, \f(CW\*(C`attiny3216\*(C'\fR, \f(CW\*(C`attiny3217\*(C'\fR, \f(CW\*(C`attiny3224\*(C'\fR, \f(CW\*(C`attiny3226\*(C'\fR, \f(CW\*(C`attiny3227\*(C'\fR, \f(CW\*(C`atmega808\*(C'\fR, \f(CW\*(C`atmega809\*(C'\fR, \f(CW\*(C`atmega1608\*(C'\fR, \f(CW\*(C`atmega1609\*(C'\fR, \f(CW\*(C`atmega3208\*(C'\fR, \f(CW\*(C`atmega3209\*(C'\fR, \f(CW\*(C`atmega4808\*(C'\fR, \f(CW\*(C`atmega4809\*(C'\fR, \f(CW\*(C`avr16dd14\*(C'\fR, \f(CW\*(C`avr16dd20\*(C'\fR, \f(CW\*(C`avr16dd28\*(C'\fR, \f(CW\*(C`avr16dd32\*(C'\fR, \f(CW\*(C`avr16du14\*(C'\fR, \f(CW\*(C`avr16du20\*(C'\fR, \f(CW\*(C`avr16du28\*(C'\fR, \f(CW\*(C`avr16du32\*(C'\fR, \f(CW\*(C`avr16ea28\*(C'\fR, \f(CW\*(C`avr16ea32\*(C'\fR, \f(CW\*(C`avr16ea48\*(C'\fR, \f(CW\*(C`avr16eb14\*(C'\fR, \f(CW\*(C`avr16eb20\*(C'\fR, \f(CW\*(C`avr16eb28\*(C'\fR, \f(CW\*(C`avr16eb32\*(C'\fR, \f(CW\*(C`avr32da28\*(C'\fR, \f(CW\*(C`avr32da32\*(C'\fR, \f(CW\*(C`avr32da48\*(C'\fR, \f(CW\*(C`avr32db28\*(C'\fR, \f(CW\*(C`avr32db32\*(C'\fR, \f(CW\*(C`avr32db48\*(C'\fR, \f(CW\*(C`avr32dd14\*(C'\fR, \f(CW\*(C`avr32dd20\*(C'\fR, \f(CW\*(C`avr32dd28\*(C'\fR, \f(CW\*(C`avr32dd32\*(C'\fR, \f(CW\*(C`avr32du14\*(C'\fR, \f(CW\*(C`avr32du20\*(C'\fR, \f(CW\*(C`avr32du28\*(C'\fR, \f(CW\*(C`avr32du32\*(C'\fR, \f(CW\*(C`avr32ea28\*(C'\fR, \f(CW\*(C`avr32ea32\*(C'\fR, \f(CW\*(C`avr32ea48\*(C'\fR.
  .ie n .IP """avrxmega4""" 4
  .el .IP "\f(CWavrxmega4\fR" 4
  .IX Item "avrxmega4"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 64 KiB and up to 128 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega64a3\*(C'\fR, \f(CW\*(C`atxmega64a3u\*(C'\fR, \f(CW\*(C`atxmega64a4u\*(C'\fR, \f(CW\*(C`atxmega64b1\*(C'\fR, \f(CW\*(C`atxmega64b3\*(C'\fR, \f(CW\*(C`atxmega64c3\*(C'\fR, \f(CW\*(C`atxmega64d3\*(C'\fR, \f(CW\*(C`atxmega64d4\*(C'\fR, \f(CW\*(C`avr128da28\*(C'\fR, \f(CW\*(C`avr128da32\*(C'\fR, \f(CW\*(C`avr128da48\*(C'\fR, \f(CW\*(C`avr128da64\*(C'\fR, \f(CW\*(C`avr128db28\*(C'\fR, \f(CW\*(C`avr128db32\*(C'\fR, \f(CW\*(C`avr128db48\*(C'\fR, \f(CW\*(C`avr128db64\*(C'\fR.
  .ie n .IP """avrxmega5""" 4
  .el .IP "\f(CWavrxmega5\fR" 4
  .IX Item "avrxmega5"
*************** The default for this option is \fBavr2\f
*** 20833,20839 ****
  .el .IP "\f(CWavrtiny\fR" 4
  .IX Item "avrtiny"
  \&\*(L"\s-1TINY\*(R"\s0 Tiny core devices with 512 B up to 4 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`attiny4\*(C'\fR, \f(CW\*(C`attiny5\*(C'\fR, \f(CW\*(C`attiny9\*(C'\fR, \f(CW\*(C`attiny10\*(C'\fR, \f(CW\*(C`attiny20\*(C'\fR, \f(CW\*(C`attiny40\*(C'\fR.
  .ie n .IP """avr1""" 4
  .el .IP "\f(CWavr1\fR" 4
  .IX Item "avr1"
--- 20839,20845 ----
  .el .IP "\f(CWavrtiny\fR" 4
  .IX Item "avrtiny"
  \&\*(L"\s-1TINY\*(R"\s0 Tiny core devices with 512 B up to 4 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`attiny4\*(C'\fR, \f(CW\*(C`attiny5\*(C'\fR, \f(CW\*(C`attiny9\*(C'\fR, \f(CW\*(C`attiny10\*(C'\fR, \f(CW\*(C`attiny102\*(C'\fR, \f(CW\*(C`attiny104\*(C'\fR, \f(CW\*(C`attiny20\*(C'\fR, \f(CW\*(C`attiny40\*(C'\fR.
  .ie n .IP """avr1""" 4
  .el .IP "\f(CWavr1\fR" 4
  .IX Item "avr1"
*************** This is by default \s-1ON.\s0
*** 22084,22094 ****
  .IP "\fB\-gfull\fR" 4
  .IX Item "-gfull"
  Emit debugging information for all symbols and types.
  .IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
  .IX Item "-mmacosx-version-min=version"
! The earliest version of MacOS X that this executable will run on
! is \fIversion\fR.  Typical values of \fIversion\fR include \f(CW10.1\fR,
! \&\f(CW10.2\fR, and \f(CW10.3.9\fR.
  .Sp
  If the compiler was built to use the system's headers by default,
  then the default for this option is the system version on which the
--- 22090,22108 ----
  .IP "\fB\-gfull\fR" 4
  .IX Item "-gfull"
  Emit debugging information for all symbols and types.
+ .IP "\fB\-fconstant\-cfstrings\fR" 4
+ .IX Item "-fconstant-cfstrings"
+ The \fB\-fconstant\-cfstrings\fR is an alias for \fB\-mconstant\-cfstrings\fR.
+ .IP "\fB\-mconstant\-cfstrings\fR" 4
+ .IX Item "-mconstant-cfstrings"
+ When the NeXT runtime is being used (the default on these systems), override
+ any \fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR
+ literals to be laid out as constant CoreFoundation strings.
  .IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
  .IX Item "-mmacosx-version-min=version"
! The earliest version of MacOS X that this executable will run on is
! \&\fIversion\fR.  Typical values supported for \fIversion\fR include \f(CW12\fR,
! \&\f(CW10.12\fR, and \f(CW10.5.8\fR.
  .Sp
  If the compiler was built to use the system's headers by default,
  then the default for this option is the system version on which the
*************** are provided for backwards compatibility
*** 22130,22136 ****
  .IP "\fB\-all_load\fR" 4
  .IX Item "-all_load"
  Loads all members of static archive libraries.
! See man \fIld\fR\|(1) for more information.
  .IP "\fB\-arch_errors_fatal\fR" 4
  .IX Item "-arch_errors_fatal"
  Cause the errors having to do with files that have the wrong architecture
--- 22144,22150 ----
  .IP "\fB\-all_load\fR" 4
  .IX Item "-all_load"
  Loads all members of static archive libraries.
! See man \fBld\fR\|(1) for more information.
  .IP "\fB\-arch_errors_fatal\fR" 4
  .IX Item "-arch_errors_fatal"
  Cause the errors having to do with files that have the wrong architecture
*************** bind all undefined references when the f
*** 22142,22152 ****
  .IP "\fB\-bundle\fR" 4
  .IX Item "-bundle"
  Produce a Mach-o bundle format file.
! See man \fIld\fR\|(1) for more information.
  .IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
  .IX Item "-bundle_loader executable"
  This option specifies the \fIexecutable\fR that will load the build
! output file being linked.  See man \fIld\fR\|(1) for more information.
  .IP "\fB\-dynamiclib\fR" 4
  .IX Item "-dynamiclib"
  When passed this option, \s-1GCC\s0 produces a dynamic library instead of
--- 22156,22166 ----
  .IP "\fB\-bundle\fR" 4
  .IX Item "-bundle"
  Produce a Mach-o bundle format file.
! See man \fBld\fR\|(1) for more information.
  .IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
  .IX Item "-bundle_loader executable"
  This option specifies the \fIexecutable\fR that will load the build
! output file being linked.  See man \fBld\fR\|(1) for more information.
  .IP "\fB\-dynamiclib\fR" 4
  .IX Item "-dynamiclib"
  When passed this option, \s-1GCC\s0 produces a dynamic library instead of
*************** global symbol: The data got table must b
*** 23769,23774 ****
--- 23783,23816 ----
  .Sp
  The default code model is \f(CW\*(C`normal\*(C'\fR.
  .RE
+ .IP "\fB\-mrelax\fR" 4
+ .IX Item "-mrelax"
+ .PD 0
+ .IP "\fB\-mno\-relax\fR" 4
+ .IX Item "-mno-relax"
+ .PD
+ Take (do not take) advantage of linker relaxations.  If
+ \&\fB\-mpass\-mrelax\-to\-as\fR is enabled, this option is also passed to
+ the assembler.  The default is determined during \s-1GCC\s0 build-time by
+ detecting corresponding assembler support:
+ \&\fB\-mrelax\fR if the assembler supports both the \fB\-mrelax\fR
+ option and the conditional branch relaxation (it's required or the
+ \&\f(CW\*(C`.align\*(C'\fR directives and conditional branch instructions in the
+ assembly code outputted by \s-1GCC\s0 may be rejected by the assembler because
+ of a relocation overflow), \fB\-mno\-relax\fR otherwise.
+ .IP "\fB\-mpass\-mrelax\-to\-as\fR" 4
+ .IX Item "-mpass-mrelax-to-as"
+ .PD 0
+ .IP "\fB\-mno\-pass\-mrelax\-to\-as\fR" 4
+ .IX Item "-mno-pass-mrelax-to-as"
+ .PD
+ Pass (do not pass) the \fB\-mrelax\fR or \fB\-mno\-relax\fR option
+ to the assembler.  The default is determined during \s-1GCC\s0 build-time by
+ detecting corresponding assembler support:
+ \&\fB\-mpass\-mrelax\-to\-as\fR if the assembler supports the
+ \&\fB\-mrelax\fR option, \fB\-mno\-pass\-mrelax\-to\-as\fR otherwise.
+ This option is mostly useful for debugging, or interoperation with
+ assemblers different from the build-time one.
  .PP
  \fIM32C Options\fR
  .IX Subsection "M32C Options"
*************** libraries assume that extended-precision
*** 31013,31018 ****
--- 31055,31067 ----
  are enabled by default; routines in such libraries could suffer significant
  loss of accuracy, typically through so-called \*(L"catastrophic cancellation\*(R",
  when this option is used to set the precision to less than extended precision.
+ .IP "\fB\-mdaz\-ftz\fR" 4
+ .IX Item "-mdaz-ftz"
+ The flush-to-zero (\s-1FTZ\s0) and denormals-are-zero (\s-1DAZ\s0) flags in the \s-1MXCSR\s0 register
+ are used to control floating-point calculations.SSE and \s-1AVX\s0 instructions
+ including scalar and vector instructions could benefit from enabling the \s-1FTZ\s0
+ and \s-1DAZ\s0 flags when \fB\-mdaz\-ftz\fR is specified. Don't set \s-1FTZ/DAZ\s0 flags
+ when \fB\-mno\-daz\-ftz\fR is specified.
  .IP "\fB\-mstackrealign\fR" 4
  .IX Item "-mstackrealign"
  Realign the stack at entry.  On the x86, the \fB\-mstackrealign\fR
*************** on x86\-64 processors in 64\-bit environ
*** 31925,31931 ****
  Generate code for a 16\-bit, 32\-bit or 64\-bit environment.
  The \fB\-m32\fR option sets \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, and pointer types
  to 32 bits, and
! generates code that runs on any i386 system.
  .Sp
  The \fB\-m64\fR option sets \f(CW\*(C`int\*(C'\fR to 32 bits and \f(CW\*(C`long\*(C'\fR and pointer
  types to 64 bits, and generates code for the x86\-64 architecture.
--- 31974,31980 ----
  Generate code for a 16\-bit, 32\-bit or 64\-bit environment.
  The \fB\-m32\fR option sets \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, and pointer types
  to 32 bits, and
! generates code that runs in 32\-bit mode.
  .Sp
  The \fB\-m64\fR option sets \f(CW\*(C`int\*(C'\fR to 32 bits and \f(CW\*(C`long\*(C'\fR and pointer
  types to 64 bits, and generates code for the x86\-64 architecture.
*************** to subtle defects.  Supplying them in ca
*** 32452,32459 ****
  is innocuous.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
! \&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIdbx\fR\|(1)
  and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
  \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
  .SH "AUTHOR"
--- 32501,32508 ----
  is innocuous.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBgfdl\fR\|(7), \fBfsf\-funding\fR\|(7),
! \&\fBcpp\fR\|(1), \fBgcov\fR\|(1), \fBas\fR\|(1), \fBld\fR\|(1), \fBgdb\fR\|(1), \fBdbx\fR\|(1)
  and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
  \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
  .SH "AUTHOR"
*************** any later version published by the Free
*** 32471,32477 ****
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fIgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
--- 32520,32526 ----
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fBgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/gcc.1 gcc-12.4.0/gcc/doc/gcc.1
*** gcc-12.3.0/gcc/doc/gcc.1	Mon May  8 12:27:47 2023
--- gcc-12.4.0/gcc/doc/gcc.1	Thu Jun 20 08:26:16 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GCC 1"
! .TH GCC 1 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GCC 1"
! .TH GCC 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** in the following sections.
*** 1008,1014 ****
  \&\-mcond\-move\-float  \-mno\-cond\-move\-float 
  \&\-memcpy  \-mno\-memcpy \-mstrict\-align \-mno\-strict\-align 
  \&\-mmax\-inline\-memcpy\-size=\fR\fIn\fR 
! \&\fB\-mcmodel=\fR\fIcode-model\fR
  .Sp
  \&\fIM32R/D Options\fR
  \&\fB\-m32r2  \-m32rx  \-m32r 
--- 1012,1018 ----
  \&\-mcond\-move\-float  \-mno\-cond\-move\-float 
  \&\-memcpy  \-mno\-memcpy \-mstrict\-align \-mno\-strict\-align 
  \&\-mmax\-inline\-memcpy\-size=\fR\fIn\fR 
! \&\fB\-mcmodel=\fR\fIcode-model\fR \fB\-mrelax \-mpass\-mrelax\-to\-as\fR
  .Sp
  \&\fIM32R/D Options\fR
  \&\fB\-m32r2  \-m32rx  \-m32r 
*************** See \s-1RS/6000\s0 and PowerPC Options.
*** 1438,1444 ****
  \&\-m96bit\-long\-double  \-mlong\-double\-64  \-mlong\-double\-80  \-mlong\-double\-128 
  \&\-mregparm=\fR\fInum\fR  \fB\-msseregparm 
  \&\-mveclibabi=\fR\fItype\fR  \fB\-mvect8\-ret\-in\-mem 
! \&\-mpc32  \-mpc64  \-mpc80  \-mstackrealign 
  \&\-momit\-leaf\-frame\-pointer  \-mno\-red\-zone  \-mno\-tls\-direct\-seg\-refs 
  \&\-mcmodel=\fR\fIcode-model\fR  \fB\-mabi=\fR\fIname\fR  \fB\-maddress\-mode=\fR\fImode\fR 
  \&\fB\-m32  \-m64  \-mx32  \-m16  \-miamcu  \-mlarge\-data\-threshold=\fR\fInum\fR 
--- 1442,1448 ----
  \&\-m96bit\-long\-double  \-mlong\-double\-64  \-mlong\-double\-80  \-mlong\-double\-128 
  \&\-mregparm=\fR\fInum\fR  \fB\-msseregparm 
  \&\-mveclibabi=\fR\fItype\fR  \fB\-mvect8\-ret\-in\-mem 
! \&\-mpc32  \-mpc64  \-mpc80 \-mdaz\-ftz \-mstackrealign 
  \&\-momit\-leaf\-frame\-pointer  \-mno\-red\-zone  \-mno\-tls\-direct\-seg\-refs 
  \&\-mcmodel=\fR\fIcode-model\fR  \fB\-mabi=\fR\fIname\fR  \fB\-maddress\-mode=\fR\fImode\fR 
  \&\fB\-m32  \-m64  \-mx32  \-m16  \-miamcu  \-mlarge\-data\-threshold=\fR\fInum\fR 
*************** and Objective\-\*(C+ programs:
*** 4361,4370 ****
  Use \fIclass-name\fR as the name of the class to instantiate for each
  literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR.  The default
  class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
! \&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below).  The
! \&\fB\-fconstant\-cfstrings\fR option, if also present, overrides the
! \&\fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals
! to be laid out as constant CoreFoundation strings.
  .IP "\fB\-fgnu\-runtime\fR" 4
  .IX Item "-fgnu-runtime"
  Generate object code compatible with the standard \s-1GNU\s0 Objective-C
--- 4365,4376 ----
  Use \fIclass-name\fR as the name of the class to instantiate for each
  literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR.  The default
  class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
! \&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below).  On
! Darwin (macOS, MacOS X) platforms, the \fB\-fconstant\-cfstrings\fR option, if
! also present, overrides the \fB\-fconstant\-string\-class\fR setting and cause
! \&\f(CW\*(C`@"..."\*(C'\fR literals to be laid out as constant CoreFoundation strings.
! Note that \fB\-fconstant\-cfstrings\fR is an alias for the target-specific
! \&\fB\-mconstant\-cfstrings\fR equivalent.
  .IP "\fB\-fgnu\-runtime\fR" 4
  .IX Item "-fgnu-runtime"
  Generate object code compatible with the standard \s-1GNU\s0 Objective-C
*************** This is useful if you need to make sure
*** 4456,4463 ****
  be compiled with older versions of \s-1GCC.\s0
  .IP "\fB\-freplace\-objc\-classes\fR" 4
  .IX Item "-freplace-objc-classes"
! Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in
! the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at
  run time instead.  This is used in conjunction with the Fix-and-Continue
  debugging mode, where the object file in question may be recompiled and
  dynamically reloaded in the course of program execution, without the need
--- 4462,4469 ----
  be compiled with older versions of \s-1GCC.\s0
  .IP "\fB\-freplace\-objc\-classes\fR" 4
  .IX Item "-freplace-objc-classes"
! Emit a special marker instructing \fB\fBld\fB\|(1)\fR not to statically link in
! the resulting object file, and allow \fB\fBdyld\fB\|(1)\fR to load it in at
  run time instead.  This is used in conjunction with the Fix-and-Continue
  debugging mode, where the object file in question may be recompiled and
  dynamically reloaded in the course of program execution, without the need
*************** bracketed, but that for \f(CW\*(C`b\*(C'
*** 6314,6320 ****
  This warning is enabled by \fB\-Wall\fR.
  .IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C, Objective\-\*(C+ and Fortran only)" 4
  .IX Item "-Wmissing-include-dirs (C, , Objective-C, Objective- and Fortran only)"
! Warn if a user-supplied include directory does not exist. This opions is disabled
  by default for C, \*(C+, Objective-C and Objective\-\*(C+. For Fortran, it is partially
  enabled by default by warning for \-I and \-J, only.
  .IP "\fB\-Wno\-missing\-profile\fR" 4
--- 6320,6326 ----
  This warning is enabled by \fB\-Wall\fR.
  .IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C, Objective\-\*(C+ and Fortran only)" 4
  .IX Item "-Wmissing-include-dirs (C, , Objective-C, Objective- and Fortran only)"
! Warn if a user-supplied include directory does not exist. This option is disabled
  by default for C, \*(C+, Objective-C and Objective\-\*(C+. For Fortran, it is partially
  enabled by default by warning for \-I and \-J, only.
  .IP "\fB\-Wno\-missing\-profile\fR" 4
*************** example of how this can happen:
*** 6810,6816 ****
  .Sp
  If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
  always initialized, but \s-1GCC\s0 doesn't know this. To suppress the
! warning, you need to provide a default case with \fIassert\fR\|(0) or
  similar code.
  .Sp
  This option also warns when a non-volatile automatic variable might be
--- 6816,6822 ----
  .Sp
  If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
  always initialized, but \s-1GCC\s0 doesn't know this. To suppress the
! warning, you need to provide a default case with \fBassert\fR\|(0) or
  similar code.
  .Sp
  This option also warns when a non-volatile automatic variable might be
*************** run-time callbacks.
*** 13943,13949 ****
  Emit special instrumentation for accesses to volatiles.
  .IP "\fBtsan-instrument-func-entry-exit\fR" 4
  .IX Item "tsan-instrument-func-entry-exit"
! Emit instrumentation calls to _\|\fI_tsan_func_entry()\fR and _\|\fI_tsan_func_exit()\fR.
  .IP "\fBmax-fsm-thread-path-insns\fR" 4
  .IX Item "max-fsm-thread-path-insns"
  Maximum number of instructions to copy when duplicating blocks on a
--- 13949,13955 ----
  Emit special instrumentation for accesses to volatiles.
  .IP "\fBtsan-instrument-func-entry-exit\fR" 4
  .IX Item "tsan-instrument-func-entry-exit"
! Emit instrumentation calls to _\|\fB_tsan_func_entry()\fR and _\|\fB_tsan_func_exit()\fR.
  .IP "\fBmax-fsm-thread-path-insns\fR" 4
  .IX Item "max-fsm-thread-path-insns"
  Maximum number of instructions to copy when duplicating blocks on a
*************** performance of the code.  Permissible va
*** 18462,18468 ****
  \&\fBcortex\-a75.cortex\-a55\fR, \fBcortex\-a76.cortex\-a55\fR,
  \&\fBcortex\-r82\fR, \fBcortex\-x1\fR, \fBcortex\-x2\fR,
  \&\fBcortex\-a510\fR, \fBcortex\-a710\fR, \fBampere1\fR,
! \&\fBampere1a\fR, \fBnative\fR.
  .Sp
  The values \fBcortex\-a57.cortex\-a53\fR, \fBcortex\-a72.cortex\-a53\fR,
  \&\fBcortex\-a73.cortex\-a35\fR, \fBcortex\-a73.cortex\-a53\fR,
--- 18468,18474 ----
  \&\fBcortex\-a75.cortex\-a55\fR, \fBcortex\-a76.cortex\-a55\fR,
  \&\fBcortex\-r82\fR, \fBcortex\-x1\fR, \fBcortex\-x2\fR,
  \&\fBcortex\-a510\fR, \fBcortex\-a710\fR, \fBampere1\fR,
! \&\fBampere1a\fR, \fBcobalt\-100\fR and \fBnative\fR.
  .Sp
  The values \fBcortex\-a57.cortex\-a53\fR, \fBcortex\-a72.cortex\-a53\fR,
  \&\fBcortex\-a73.cortex\-a35\fR, \fBcortex\-a73.cortex\-a53\fR,
*************** The default for this option is \fBavr2\f
*** 20783,20794 ****
  .el .IP "\f(CWavr4\fR" 4
  .IX Item "avr4"
  \&\*(L"Enhanced\*(R" devices with up to 8 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega48\*(C'\fR, \f(CW\*(C`atmega48a\*(C'\fR, \f(CW\*(C`atmega48p\*(C'\fR, \f(CW\*(C`atmega48pa\*(C'\fR, \f(CW\*(C`atmega48pb\*(C'\fR, \f(CW\*(C`atmega8\*(C'\fR, \f(CW\*(C`atmega8a\*(C'\fR, \f(CW\*(C`atmega8hva\*(C'\fR, \f(CW\*(C`atmega88\*(C'\fR, \f(CW\*(C`atmega88a\*(C'\fR, \f(CW\*(C`atmega88p\*(C'\fR, \f(CW\*(C`atmega88pa\*(C'\fR, \f(CW\*(C`atmega88pb\*(C'\fR, \f(CW\*(C`atmega8515\*(C'\fR, \f(CW\*(C`atmega8535\*(C'\fR, \f(CW\*(C`ata6285\*(C'\fR, \f(CW\*(C`ata6286\*(C'\fR, \f(CW\*(C`ata6289\*(C'\fR, \f(CW\*(C`ata6612c\*(C'\fR, \f(CW\*(C`at90pwm1\*(C'\fR, \f(CW\*(C`at90pwm2\*(C'\fR, \f(CW\*(C`at90pwm2b\*(C'\fR, \f(CW\*(C`at90pwm3\*(C'\fR, \f(CW\*(C`at90pwm3b\*(C'\fR, \f(CW\*(C`at90pwm81\*(C'\fR.
  .ie n .IP """avr5""" 4
  .el .IP "\f(CWavr5\fR" 4
  .IX Item "avr5"
  \&\*(L"Enhanced\*(R" devices with 16 KiB up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega16\*(C'\fR, \f(CW\*(C`atmega16a\*(C'\fR, \f(CW\*(C`atmega16hva\*(C'\fR, \f(CW\*(C`atmega16hva2\*(C'\fR, \f(CW\*(C`atmega16hvb\*(C'\fR, \f(CW\*(C`atmega16hvbrevb\*(C'\fR, \f(CW\*(C`atmega16m1\*(C'\fR, \f(CW\*(C`atmega16u4\*(C'\fR, \f(CW\*(C`atmega161\*(C'\fR, \f(CW\*(C`atmega162\*(C'\fR, \f(CW\*(C`atmega163\*(C'\fR, \f(CW\*(C`atmega164a\*(C'\fR, \f(CW\*(C`atmega164p\*(C'\fR, \f(CW\*(C`atmega164pa\*(C'\fR, \f(CW\*(C`atmega165\*(C'\fR, \f(CW\*(C`atmega165a\*(C'\fR, \f(CW\*(C`atmega165p\*(C'\fR, \f(CW\*(C`atmega165pa\*(C'\fR, \f(CW\*(C`atmega168\*(C'\fR, \f(CW\*(C`atmega168a\*(C'\fR, \f(CW\*(C`atmega168p\*(C'\fR, \f(CW\*(C`atmega168pa\*(C'\fR, \f(CW\*(C`atmega168pb\*(C'\fR, \f(CW\*(C`atmega169\*(C'\fR, \f(CW\*(C`atmega169a\*(C'\fR, \f(CW\*(C`atmega169p\*(C'\fR, \f(CW\*(C`atmega169pa\*(C'\fR, \f(CW\*(C`atmega32\*(C'\fR, \f(CW\*(C`atmega32a\*(C'\fR, \f(CW\*(C`atmega32c1\*(C'\fR, \f(CW\*(C`atmega32hvb\*(C'\fR, \f(CW\*(C`atmega32hvbrevb\*(C'\fR, \f(CW\*(C`atmega32m1\*(C'\fR, \f(CW\*(C`atmega32u4\*(C'\fR, \f(CW\*(C`atmega32u6\*(C'\fR, \f(CW\*(C`atmega323\*(C'\fR, \f(CW\*(C`atmega324a\*(C'\fR, \f(CW\*(C`atmega324p\*(C'\fR, \f(CW\*(C`atmega324pa\*(C'\fR, \f(CW\*(C`atmega324pb\*(C'\fR, \f(CW\*(C`atmega325\*(C'\fR, \f(CW\*(C`atmega325a\*(C'\fR, \f(CW\*(C`atmega325p\*(C'\fR, \f(CW\*(C`atmega325pa\*(C'\fR, \f(CW\*(C`atmega328\*(C'\fR, \f(CW\*(C`atmega328p\*(C'\fR, \f(CW\*(C`atmega328pb\*(C'\fR, \f(CW\*(C`atmega329\*(C'\fR, \f(CW\*(C`atmega329a\*(C'\fR, \f(CW\*(C`atmega329p\*(C'\fR, \f(CW\*(C`atmega329pa\*(C'\fR, \f(CW\*(C`atmega3250\*(C'\fR, \f(CW\*(C`atmega3250a\*(C'\fR, \f(CW\*(C`atmega3250p\*(C'\fR, \f(CW\*(C`atmega3250pa\*(C'\fR, \f(CW\*(C`atmega3290\*(C'\fR, \f(CW\*(C`atmega3290a\*(C'\fR, \f(CW\*(C`atmega3290p\*(C'\fR, \f(CW\*(C`atmega3290pa\*(C'\fR, \f(CW\*(C`atmega406\*(C'\fR, \f(CW\*(C`atmega64\*(C'\fR, \f(CW\*(C`atmega64a\*(C'\fR, \f(CW\*(C`atmega64c1\*(C'\fR, \f(CW\*(C`atmega64hve\*(C'\fR, \f(CW\*(C`atmega64hve2\*(C'\fR, \f(CW\*(C`atmega64m1\*(C'\fR, \f(CW\*(C`atmega64rfr2\*(C'\fR, \f(CW\*(C`atmega640\*(C'\fR, \f(CW\*(C`atmega644\*(C'\fR, \f(CW\*(C`atmega644a\*(C'\fR, \f(CW\*(C`atmega644p\*(C'\fR, \f(CW\*(C`atmega644pa\*(C'\fR, \f(CW\*(C`atmega644rfr2\*(C'\fR, \f(CW\*(C`atmega645\*(C'\fR, \f(CW\*(C`atmega645a\*(C'\fR, \f(CW\*(C`atmega645p\*(C'\fR, \f(CW\*(C`atmega649\*(C'\fR, \f(CW\*(C`atmega649a\*(C'\fR, \f(CW\*(C`atmega649p\*(C'\fR, \f(CW\*(C`atmega6450\*(C'\fR, \f(CW\*(C`atmega6450a\*(C'\fR, \f(CW\*(C`atmega6450p\*(C'\fR, \f(CW\*(C`atmega6490\*(C'\fR, \f(CW\*(C`atmega6490a\*(C'\fR, \f(CW\*(C`atmega6490p\*(C'\fR, \f(CW\*(C`ata5795\*(C'\fR, \f(CW\*(C`ata5790\*(C'\fR, \f(CW\*(C`ata5790n\*(C'\fR, \f(CW\*(C`ata5791\*(C'\fR, \f(CW\*(C`ata6613c\*(C'\fR, \f(CW\*(C`ata6614q\*(C'\fR, \f(CW\*(C`ata5782\*(C'\fR, \f(CW\*(C`ata5831\*(C'\fR, \f(CW\*(C`ata8210\*(C'\fR, \f(CW\*(C`ata8510\*(C'\fR, \f(CW\*(C`ata5702m322\*(C'\fR, \f(CW\*(C`at90pwm161\*(C'\fR, \f(CW\*(C`at90pwm216\*(C'\fR, \f(CW\*(C`at90pwm316\*(C'\fR, \f(CW\*(C`at90can32\*(C'\fR, \f(CW\*(C`at90can64\*(C'\fR, \f(CW\*(C`at90scr100\*(C'\fR, \f(CW\*(C`at90usb646\*(C'\fR, \f(CW\*(C`at90usb647\*(C'\fR, \f(CW\*(C`at94k\*(C'\fR, \f(CW\*(C`m3000\*(C'\fR.
  .ie n .IP """avr51""" 4
  .el .IP "\f(CWavr51\fR" 4
  .IX Item "avr51"
--- 20789,20800 ----
  .el .IP "\f(CWavr4\fR" 4
  .IX Item "avr4"
  \&\*(L"Enhanced\*(R" devices with up to 8 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega48\*(C'\fR, \f(CW\*(C`atmega48a\*(C'\fR, \f(CW\*(C`atmega48p\*(C'\fR, \f(CW\*(C`atmega48pa\*(C'\fR, \f(CW\*(C`atmega48pb\*(C'\fR, \f(CW\*(C`atmega8\*(C'\fR, \f(CW\*(C`atmega8a\*(C'\fR, \f(CW\*(C`atmega8hva\*(C'\fR, \f(CW\*(C`atmega88\*(C'\fR, \f(CW\*(C`atmega88a\*(C'\fR, \f(CW\*(C`atmega88p\*(C'\fR, \f(CW\*(C`atmega88pa\*(C'\fR, \f(CW\*(C`atmega88pb\*(C'\fR, \f(CW\*(C`atmega8515\*(C'\fR, \f(CW\*(C`atmega8535\*(C'\fR, \f(CW\*(C`ata5795\*(C'\fR, \f(CW\*(C`ata6285\*(C'\fR, \f(CW\*(C`ata6286\*(C'\fR, \f(CW\*(C`ata6289\*(C'\fR, \f(CW\*(C`ata6612c\*(C'\fR, \f(CW\*(C`at90pwm1\*(C'\fR, \f(CW\*(C`at90pwm2\*(C'\fR, \f(CW\*(C`at90pwm2b\*(C'\fR, \f(CW\*(C`at90pwm3\*(C'\fR, \f(CW\*(C`at90pwm3b\*(C'\fR, \f(CW\*(C`at90pwm81\*(C'\fR.
  .ie n .IP """avr5""" 4
  .el .IP "\f(CWavr5\fR" 4
  .IX Item "avr5"
  \&\*(L"Enhanced\*(R" devices with 16 KiB up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atmega16\*(C'\fR, \f(CW\*(C`atmega16a\*(C'\fR, \f(CW\*(C`atmega16hva\*(C'\fR, \f(CW\*(C`atmega16hva2\*(C'\fR, \f(CW\*(C`atmega16hvb\*(C'\fR, \f(CW\*(C`atmega16hvbrevb\*(C'\fR, \f(CW\*(C`atmega16m1\*(C'\fR, \f(CW\*(C`atmega16u4\*(C'\fR, \f(CW\*(C`atmega161\*(C'\fR, \f(CW\*(C`atmega162\*(C'\fR, \f(CW\*(C`atmega163\*(C'\fR, \f(CW\*(C`atmega164a\*(C'\fR, \f(CW\*(C`atmega164p\*(C'\fR, \f(CW\*(C`atmega164pa\*(C'\fR, \f(CW\*(C`atmega165\*(C'\fR, \f(CW\*(C`atmega165a\*(C'\fR, \f(CW\*(C`atmega165p\*(C'\fR, \f(CW\*(C`atmega165pa\*(C'\fR, \f(CW\*(C`atmega168\*(C'\fR, \f(CW\*(C`atmega168a\*(C'\fR, \f(CW\*(C`atmega168p\*(C'\fR, \f(CW\*(C`atmega168pa\*(C'\fR, \f(CW\*(C`atmega168pb\*(C'\fR, \f(CW\*(C`atmega169\*(C'\fR, \f(CW\*(C`atmega169a\*(C'\fR, \f(CW\*(C`atmega169p\*(C'\fR, \f(CW\*(C`atmega169pa\*(C'\fR, \f(CW\*(C`atmega32\*(C'\fR, \f(CW\*(C`atmega32a\*(C'\fR, \f(CW\*(C`atmega32c1\*(C'\fR, \f(CW\*(C`atmega32hvb\*(C'\fR, \f(CW\*(C`atmega32hvbrevb\*(C'\fR, \f(CW\*(C`atmega32m1\*(C'\fR, \f(CW\*(C`atmega32u4\*(C'\fR, \f(CW\*(C`atmega32u6\*(C'\fR, \f(CW\*(C`atmega323\*(C'\fR, \f(CW\*(C`atmega324a\*(C'\fR, \f(CW\*(C`atmega324p\*(C'\fR, \f(CW\*(C`atmega324pa\*(C'\fR, \f(CW\*(C`atmega324pb\*(C'\fR, \f(CW\*(C`atmega325\*(C'\fR, \f(CW\*(C`atmega325a\*(C'\fR, \f(CW\*(C`atmega325p\*(C'\fR, \f(CW\*(C`atmega325pa\*(C'\fR, \f(CW\*(C`atmega328\*(C'\fR, \f(CW\*(C`atmega328p\*(C'\fR, \f(CW\*(C`atmega328pb\*(C'\fR, \f(CW\*(C`atmega329\*(C'\fR, \f(CW\*(C`atmega329a\*(C'\fR, \f(CW\*(C`atmega329p\*(C'\fR, \f(CW\*(C`atmega329pa\*(C'\fR, \f(CW\*(C`atmega3250\*(C'\fR, \f(CW\*(C`atmega3250a\*(C'\fR, \f(CW\*(C`atmega3250p\*(C'\fR, \f(CW\*(C`atmega3250pa\*(C'\fR, \f(CW\*(C`atmega3290\*(C'\fR, \f(CW\*(C`atmega3290a\*(C'\fR, \f(CW\*(C`atmega3290p\*(C'\fR, \f(CW\*(C`atmega3290pa\*(C'\fR, \f(CW\*(C`atmega406\*(C'\fR, \f(CW\*(C`atmega64\*(C'\fR, \f(CW\*(C`atmega64a\*(C'\fR, \f(CW\*(C`atmega64c1\*(C'\fR, \f(CW\*(C`atmega64hve\*(C'\fR, \f(CW\*(C`atmega64hve2\*(C'\fR, \f(CW\*(C`atmega64m1\*(C'\fR, \f(CW\*(C`atmega64rfr2\*(C'\fR, \f(CW\*(C`atmega640\*(C'\fR, \f(CW\*(C`atmega644\*(C'\fR, \f(CW\*(C`atmega644a\*(C'\fR, \f(CW\*(C`atmega644p\*(C'\fR, \f(CW\*(C`atmega644pa\*(C'\fR, \f(CW\*(C`atmega644rfr2\*(C'\fR, \f(CW\*(C`atmega645\*(C'\fR, \f(CW\*(C`atmega645a\*(C'\fR, \f(CW\*(C`atmega645p\*(C'\fR, \f(CW\*(C`atmega649\*(C'\fR, \f(CW\*(C`atmega649a\*(C'\fR, \f(CW\*(C`atmega649p\*(C'\fR, \f(CW\*(C`atmega6450\*(C'\fR, \f(CW\*(C`atmega6450a\*(C'\fR, \f(CW\*(C`atmega6450p\*(C'\fR, \f(CW\*(C`atmega6490\*(C'\fR, \f(CW\*(C`atmega6490a\*(C'\fR, \f(CW\*(C`atmega6490p\*(C'\fR, \f(CW\*(C`ata5790\*(C'\fR, \f(CW\*(C`ata5790n\*(C'\fR, \f(CW\*(C`ata5791\*(C'\fR, \f(CW\*(C`ata6613c\*(C'\fR, \f(CW\*(C`ata6614q\*(C'\fR, \f(CW\*(C`ata5782\*(C'\fR, \f(CW\*(C`ata5831\*(C'\fR, \f(CW\*(C`ata8210\*(C'\fR, \f(CW\*(C`ata8510\*(C'\fR, \f(CW\*(C`ata5787\*(C'\fR, \f(CW\*(C`ata5835\*(C'\fR, \f(CW\*(C`ata5700m322\*(C'\fR, \f(CW\*(C`ata5702m322\*(C'\fR, \f(CW\*(C`at90pwm161\*(C'\fR, \f(CW\*(C`at90pwm216\*(C'\fR, \f(CW\*(C`at90pwm316\*(C'\fR, \f(CW\*(C`at90can32\*(C'\fR, \f(CW\*(C`at90can64\*(C'\fR, \f(CW\*(C`at90scr100\*(C'\fR, \f(CW\*(C`at90usb646\*(C'\fR, \f(CW\*(C`at90usb647\*(C'\fR, \f(CW\*(C`at94k\*(C'\fR, \f(CW\*(C`m3000\*(C'\fR.
  .ie n .IP """avr51""" 4
  .el .IP "\f(CWavr51\fR" 4
  .IX Item "avr51"
*************** The default for this option is \fBavr2\f
*** 20803,20819 ****
  .el .IP "\f(CWavrxmega2\fR" 4
  .IX Item "avrxmega2"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 8 KiB and up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega8e5\*(C'\fR, \f(CW\*(C`atxmega16a4\*(C'\fR, \f(CW\*(C`atxmega16a4u\*(C'\fR, \f(CW\*(C`atxmega16c4\*(C'\fR, \f(CW\*(C`atxmega16d4\*(C'\fR, \f(CW\*(C`atxmega16e5\*(C'\fR, \f(CW\*(C`atxmega32a4\*(C'\fR, \f(CW\*(C`atxmega32a4u\*(C'\fR, \f(CW\*(C`atxmega32c3\*(C'\fR, \f(CW\*(C`atxmega32c4\*(C'\fR, \f(CW\*(C`atxmega32d3\*(C'\fR, \f(CW\*(C`atxmega32d4\*(C'\fR, \f(CW\*(C`atxmega32e5\*(C'\fR.
  .ie n .IP """avrxmega3""" 4
  .el .IP "\f(CWavrxmega3\fR" 4
  .IX Item "avrxmega3"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with up to 64 KiB of combined program memory and \s-1RAM,\s0 and with program memory visible in the \s-1RAM\s0 address space.
! \&\fImcu\fR = \f(CW\*(C`attiny202\*(C'\fR, \f(CW\*(C`attiny204\*(C'\fR, \f(CW\*(C`attiny212\*(C'\fR, \f(CW\*(C`attiny214\*(C'\fR, \f(CW\*(C`attiny402\*(C'\fR, \f(CW\*(C`attiny404\*(C'\fR, \f(CW\*(C`attiny406\*(C'\fR, \f(CW\*(C`attiny412\*(C'\fR, \f(CW\*(C`attiny414\*(C'\fR, \f(CW\*(C`attiny416\*(C'\fR, \f(CW\*(C`attiny417\*(C'\fR, \f(CW\*(C`attiny804\*(C'\fR, \f(CW\*(C`attiny806\*(C'\fR, \f(CW\*(C`attiny807\*(C'\fR, \f(CW\*(C`attiny814\*(C'\fR, \f(CW\*(C`attiny816\*(C'\fR, \f(CW\*(C`attiny817\*(C'\fR, \f(CW\*(C`attiny1604\*(C'\fR, \f(CW\*(C`attiny1606\*(C'\fR, \f(CW\*(C`attiny1607\*(C'\fR, \f(CW\*(C`attiny1614\*(C'\fR, \f(CW\*(C`attiny1616\*(C'\fR, \f(CW\*(C`attiny1617\*(C'\fR, \f(CW\*(C`attiny3214\*(C'\fR, \f(CW\*(C`attiny3216\*(C'\fR, \f(CW\*(C`attiny3217\*(C'\fR, \f(CW\*(C`atmega808\*(C'\fR, \f(CW\*(C`atmega809\*(C'\fR, \f(CW\*(C`atmega1608\*(C'\fR, \f(CW\*(C`atmega1609\*(C'\fR, \f(CW\*(C`atmega3208\*(C'\fR, \f(CW\*(C`atmega3209\*(C'\fR, \f(CW\*(C`atmega4808\*(C'\fR, \f(CW\*(C`atmega4809\*(C'\fR.
  .ie n .IP """avrxmega4""" 4
  .el .IP "\f(CWavrxmega4\fR" 4
  .IX Item "avrxmega4"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 64 KiB and up to 128 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega64a3\*(C'\fR, \f(CW\*(C`atxmega64a3u\*(C'\fR, \f(CW\*(C`atxmega64a4u\*(C'\fR, \f(CW\*(C`atxmega64b1\*(C'\fR, \f(CW\*(C`atxmega64b3\*(C'\fR, \f(CW\*(C`atxmega64c3\*(C'\fR, \f(CW\*(C`atxmega64d3\*(C'\fR, \f(CW\*(C`atxmega64d4\*(C'\fR.
  .ie n .IP """avrxmega5""" 4
  .el .IP "\f(CWavrxmega5\fR" 4
  .IX Item "avrxmega5"
--- 20809,20825 ----
  .el .IP "\f(CWavrxmega2\fR" 4
  .IX Item "avrxmega2"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 8 KiB and up to 64 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega8e5\*(C'\fR, \f(CW\*(C`atxmega16a4\*(C'\fR, \f(CW\*(C`atxmega16a4u\*(C'\fR, \f(CW\*(C`atxmega16c4\*(C'\fR, \f(CW\*(C`atxmega16d4\*(C'\fR, \f(CW\*(C`atxmega16e5\*(C'\fR, \f(CW\*(C`atxmega32a4\*(C'\fR, \f(CW\*(C`atxmega32a4u\*(C'\fR, \f(CW\*(C`atxmega32c3\*(C'\fR, \f(CW\*(C`atxmega32c4\*(C'\fR, \f(CW\*(C`atxmega32d3\*(C'\fR, \f(CW\*(C`atxmega32d4\*(C'\fR, \f(CW\*(C`atxmega32e5\*(C'\fR, \f(CW\*(C`avr64da28\*(C'\fR, \f(CW\*(C`avr64da32\*(C'\fR, \f(CW\*(C`avr64da48\*(C'\fR, \f(CW\*(C`avr64da64\*(C'\fR, \f(CW\*(C`avr64db28\*(C'\fR, \f(CW\*(C`avr64db32\*(C'\fR, \f(CW\*(C`avr64db48\*(C'\fR, \f(CW\*(C`avr64db64\*(C'\fR, \f(CW\*(C`avr64dd14\*(C'\fR, \f(CW\*(C`avr64dd20\*(C'\fR, \f(CW\*(C`avr64dd28\*(C'\fR, \f(CW\*(C`avr64dd32\*(C'\fR, \f(CW\*(C`avr64du28\*(C'\fR, \f(CW\*(C`avr64du32\*(C'\fR, \f(CW\*(C`avr64ea28\*(C'\fR, \f(CW\*(C`avr64ea32\*(C'\fR, \f(CW\*(C`avr64ea48\*(C'\fR.
  .ie n .IP """avrxmega3""" 4
  .el .IP "\f(CWavrxmega3\fR" 4
  .IX Item "avrxmega3"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with up to 64 KiB of combined program memory and \s-1RAM,\s0 and with program memory visible in the \s-1RAM\s0 address space.
! \&\fImcu\fR = \f(CW\*(C`attiny202\*(C'\fR, \f(CW\*(C`attiny204\*(C'\fR, \f(CW\*(C`attiny212\*(C'\fR, \f(CW\*(C`attiny214\*(C'\fR, \f(CW\*(C`attiny402\*(C'\fR, \f(CW\*(C`attiny404\*(C'\fR, \f(CW\*(C`attiny406\*(C'\fR, \f(CW\*(C`attiny412\*(C'\fR, \f(CW\*(C`attiny414\*(C'\fR, \f(CW\*(C`attiny416\*(C'\fR, \f(CW\*(C`attiny416auto\*(C'\fR, \f(CW\*(C`attiny417\*(C'\fR, \f(CW\*(C`attiny424\*(C'\fR, \f(CW\*(C`attiny426\*(C'\fR, \f(CW\*(C`attiny427\*(C'\fR, \f(CW\*(C`attiny804\*(C'\fR, \f(CW\*(C`attiny806\*(C'\fR, \f(CW\*(C`attiny807\*(C'\fR, \f(CW\*(C`attiny814\*(C'\fR, \f(CW\*(C`attiny816\*(C'\fR, \f(CW\*(C`attiny817\*(C'\fR, \f(CW\*(C`attiny824\*(C'\fR, \f(CW\*(C`attiny826\*(C'\fR, \f(CW\*(C`attiny827\*(C'\fR, \f(CW\*(C`attiny1604\*(C'\fR, \f(CW\*(C`attiny1606\*(C'\fR, \f(CW\*(C`attiny1607\*(C'\fR, \f(CW\*(C`attiny1614\*(C'\fR, \f(CW\*(C`attiny1616\*(C'\fR, \f(CW\*(C`attiny1617\*(C'\fR, \f(CW\*(C`attiny1624\*(C'\fR, \f(CW\*(C`attiny1626\*(C'\fR, \f(CW\*(C`attiny1627\*(C'\fR, \f(CW\*(C`attiny3214\*(C'\fR, \f(CW\*(C`attiny3216\*(C'\fR, \f(CW\*(C`attiny3217\*(C'\fR, \f(CW\*(C`attiny3224\*(C'\fR, \f(CW\*(C`attiny3226\*(C'\fR, \f(CW\*(C`attiny3227\*(C'\fR, \f(CW\*(C`atmega808\*(C'\fR, \f(CW\*(C`atmega809\*(C'\fR, \f(CW\*(C`atmega1608\*(C'\fR, \f(CW\*(C`atmega1609\*(C'\fR, \f(CW\*(C`atmega3208\*(C'\fR, \f(CW\*(C`atmega3209\*(C'\fR, \f(CW\*(C`atmega4808\*(C'\fR, \f(CW\*(C`atmega4809\*(C'\fR, \f(CW\*(C`avr16dd14\*(C'\fR, \f(CW\*(C`avr16dd20\*(C'\fR, \f(CW\*(C`avr16dd28\*(C'\fR, \f(CW\*(C`avr16dd32\*(C'\fR, \f(CW\*(C`avr16du14\*(C'\fR, \f(CW\*(C`avr16du20\*(C'\fR, \f(CW\*(C`avr16du28\*(C'\fR, \f(CW\*(C`avr16du32\*(C'\fR, \f(CW\*(C`avr16ea28\*(C'\fR, \f(CW\*(C`avr16ea32\*(C'\fR, \f(CW\*(C`avr16ea48\*(C'\fR, \f(CW\*(C`avr16eb14\*(C'\fR, \f(CW\*(C`avr16eb20\*(C'\fR, \f(CW\*(C`avr16eb28\*(C'\fR, \f(CW\*(C`avr16eb32\*(C'\fR, \f(CW\*(C`avr32da28\*(C'\fR, \f(CW\*(C`avr32da32\*(C'\fR, \f(CW\*(C`avr32da48\*(C'\fR, \f(CW\*(C`avr32db28\*(C'\fR, \f(CW\*(C`avr32db32\*(C'\fR, \f(CW\*(C`avr32db48\*(C'\fR, \f(CW\*(C`avr32dd14\*(C'\fR, \f(CW\*(C`avr32dd20\*(C'\fR, \f(CW\*(C`avr32dd28\*(C'\fR, \f(CW\*(C`avr32dd32\*(C'\fR, \f(CW\*(C`avr32du14\*(C'\fR, \f(CW\*(C`avr32du20\*(C'\fR, \f(CW\*(C`avr32du28\*(C'\fR, \f(CW\*(C`avr32du32\*(C'\fR, \f(CW\*(C`avr32ea28\*(C'\fR, \f(CW\*(C`avr32ea32\*(C'\fR, \f(CW\*(C`avr32ea48\*(C'\fR.
  .ie n .IP """avrxmega4""" 4
  .el .IP "\f(CWavrxmega4\fR" 4
  .IX Item "avrxmega4"
  \&\*(L"\s-1XMEGA\*(R"\s0 devices with more than 64 KiB and up to 128 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`atxmega64a3\*(C'\fR, \f(CW\*(C`atxmega64a3u\*(C'\fR, \f(CW\*(C`atxmega64a4u\*(C'\fR, \f(CW\*(C`atxmega64b1\*(C'\fR, \f(CW\*(C`atxmega64b3\*(C'\fR, \f(CW\*(C`atxmega64c3\*(C'\fR, \f(CW\*(C`atxmega64d3\*(C'\fR, \f(CW\*(C`atxmega64d4\*(C'\fR, \f(CW\*(C`avr128da28\*(C'\fR, \f(CW\*(C`avr128da32\*(C'\fR, \f(CW\*(C`avr128da48\*(C'\fR, \f(CW\*(C`avr128da64\*(C'\fR, \f(CW\*(C`avr128db28\*(C'\fR, \f(CW\*(C`avr128db32\*(C'\fR, \f(CW\*(C`avr128db48\*(C'\fR, \f(CW\*(C`avr128db64\*(C'\fR.
  .ie n .IP """avrxmega5""" 4
  .el .IP "\f(CWavrxmega5\fR" 4
  .IX Item "avrxmega5"
*************** The default for this option is \fBavr2\f
*** 20833,20839 ****
  .el .IP "\f(CWavrtiny\fR" 4
  .IX Item "avrtiny"
  \&\*(L"\s-1TINY\*(R"\s0 Tiny core devices with 512 B up to 4 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`attiny4\*(C'\fR, \f(CW\*(C`attiny5\*(C'\fR, \f(CW\*(C`attiny9\*(C'\fR, \f(CW\*(C`attiny10\*(C'\fR, \f(CW\*(C`attiny20\*(C'\fR, \f(CW\*(C`attiny40\*(C'\fR.
  .ie n .IP """avr1""" 4
  .el .IP "\f(CWavr1\fR" 4
  .IX Item "avr1"
--- 20839,20845 ----
  .el .IP "\f(CWavrtiny\fR" 4
  .IX Item "avrtiny"
  \&\*(L"\s-1TINY\*(R"\s0 Tiny core devices with 512 B up to 4 KiB of program memory.
! \&\fImcu\fR = \f(CW\*(C`attiny4\*(C'\fR, \f(CW\*(C`attiny5\*(C'\fR, \f(CW\*(C`attiny9\*(C'\fR, \f(CW\*(C`attiny10\*(C'\fR, \f(CW\*(C`attiny102\*(C'\fR, \f(CW\*(C`attiny104\*(C'\fR, \f(CW\*(C`attiny20\*(C'\fR, \f(CW\*(C`attiny40\*(C'\fR.
  .ie n .IP """avr1""" 4
  .el .IP "\f(CWavr1\fR" 4
  .IX Item "avr1"
*************** This is by default \s-1ON.\s0
*** 22084,22094 ****
  .IP "\fB\-gfull\fR" 4
  .IX Item "-gfull"
  Emit debugging information for all symbols and types.
  .IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
  .IX Item "-mmacosx-version-min=version"
! The earliest version of MacOS X that this executable will run on
! is \fIversion\fR.  Typical values of \fIversion\fR include \f(CW10.1\fR,
! \&\f(CW10.2\fR, and \f(CW10.3.9\fR.
  .Sp
  If the compiler was built to use the system's headers by default,
  then the default for this option is the system version on which the
--- 22090,22108 ----
  .IP "\fB\-gfull\fR" 4
  .IX Item "-gfull"
  Emit debugging information for all symbols and types.
+ .IP "\fB\-fconstant\-cfstrings\fR" 4
+ .IX Item "-fconstant-cfstrings"
+ The \fB\-fconstant\-cfstrings\fR is an alias for \fB\-mconstant\-cfstrings\fR.
+ .IP "\fB\-mconstant\-cfstrings\fR" 4
+ .IX Item "-mconstant-cfstrings"
+ When the NeXT runtime is being used (the default on these systems), override
+ any \fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR
+ literals to be laid out as constant CoreFoundation strings.
  .IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
  .IX Item "-mmacosx-version-min=version"
! The earliest version of MacOS X that this executable will run on is
! \&\fIversion\fR.  Typical values supported for \fIversion\fR include \f(CW12\fR,
! \&\f(CW10.12\fR, and \f(CW10.5.8\fR.
  .Sp
  If the compiler was built to use the system's headers by default,
  then the default for this option is the system version on which the
*************** are provided for backwards compatibility
*** 22130,22136 ****
  .IP "\fB\-all_load\fR" 4
  .IX Item "-all_load"
  Loads all members of static archive libraries.
! See man \fIld\fR\|(1) for more information.
  .IP "\fB\-arch_errors_fatal\fR" 4
  .IX Item "-arch_errors_fatal"
  Cause the errors having to do with files that have the wrong architecture
--- 22144,22150 ----
  .IP "\fB\-all_load\fR" 4
  .IX Item "-all_load"
  Loads all members of static archive libraries.
! See man \fBld\fR\|(1) for more information.
  .IP "\fB\-arch_errors_fatal\fR" 4
  .IX Item "-arch_errors_fatal"
  Cause the errors having to do with files that have the wrong architecture
*************** bind all undefined references when the f
*** 22142,22152 ****
  .IP "\fB\-bundle\fR" 4
  .IX Item "-bundle"
  Produce a Mach-o bundle format file.
! See man \fIld\fR\|(1) for more information.
  .IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
  .IX Item "-bundle_loader executable"
  This option specifies the \fIexecutable\fR that will load the build
! output file being linked.  See man \fIld\fR\|(1) for more information.
  .IP "\fB\-dynamiclib\fR" 4
  .IX Item "-dynamiclib"
  When passed this option, \s-1GCC\s0 produces a dynamic library instead of
--- 22156,22166 ----
  .IP "\fB\-bundle\fR" 4
  .IX Item "-bundle"
  Produce a Mach-o bundle format file.
! See man \fBld\fR\|(1) for more information.
  .IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
  .IX Item "-bundle_loader executable"
  This option specifies the \fIexecutable\fR that will load the build
! output file being linked.  See man \fBld\fR\|(1) for more information.
  .IP "\fB\-dynamiclib\fR" 4
  .IX Item "-dynamiclib"
  When passed this option, \s-1GCC\s0 produces a dynamic library instead of
*************** global symbol: The data got table must b
*** 23769,23774 ****
--- 23783,23816 ----
  .Sp
  The default code model is \f(CW\*(C`normal\*(C'\fR.
  .RE
+ .IP "\fB\-mrelax\fR" 4
+ .IX Item "-mrelax"
+ .PD 0
+ .IP "\fB\-mno\-relax\fR" 4
+ .IX Item "-mno-relax"
+ .PD
+ Take (do not take) advantage of linker relaxations.  If
+ \&\fB\-mpass\-mrelax\-to\-as\fR is enabled, this option is also passed to
+ the assembler.  The default is determined during \s-1GCC\s0 build-time by
+ detecting corresponding assembler support:
+ \&\fB\-mrelax\fR if the assembler supports both the \fB\-mrelax\fR
+ option and the conditional branch relaxation (it's required or the
+ \&\f(CW\*(C`.align\*(C'\fR directives and conditional branch instructions in the
+ assembly code outputted by \s-1GCC\s0 may be rejected by the assembler because
+ of a relocation overflow), \fB\-mno\-relax\fR otherwise.
+ .IP "\fB\-mpass\-mrelax\-to\-as\fR" 4
+ .IX Item "-mpass-mrelax-to-as"
+ .PD 0
+ .IP "\fB\-mno\-pass\-mrelax\-to\-as\fR" 4
+ .IX Item "-mno-pass-mrelax-to-as"
+ .PD
+ Pass (do not pass) the \fB\-mrelax\fR or \fB\-mno\-relax\fR option
+ to the assembler.  The default is determined during \s-1GCC\s0 build-time by
+ detecting corresponding assembler support:
+ \&\fB\-mpass\-mrelax\-to\-as\fR if the assembler supports the
+ \&\fB\-mrelax\fR option, \fB\-mno\-pass\-mrelax\-to\-as\fR otherwise.
+ This option is mostly useful for debugging, or interoperation with
+ assemblers different from the build-time one.
  .PP
  \fIM32C Options\fR
  .IX Subsection "M32C Options"
*************** libraries assume that extended-precision
*** 31013,31018 ****
--- 31055,31067 ----
  are enabled by default; routines in such libraries could suffer significant
  loss of accuracy, typically through so-called \*(L"catastrophic cancellation\*(R",
  when this option is used to set the precision to less than extended precision.
+ .IP "\fB\-mdaz\-ftz\fR" 4
+ .IX Item "-mdaz-ftz"
+ The flush-to-zero (\s-1FTZ\s0) and denormals-are-zero (\s-1DAZ\s0) flags in the \s-1MXCSR\s0 register
+ are used to control floating-point calculations.SSE and \s-1AVX\s0 instructions
+ including scalar and vector instructions could benefit from enabling the \s-1FTZ\s0
+ and \s-1DAZ\s0 flags when \fB\-mdaz\-ftz\fR is specified. Don't set \s-1FTZ/DAZ\s0 flags
+ when \fB\-mno\-daz\-ftz\fR is specified.
  .IP "\fB\-mstackrealign\fR" 4
  .IX Item "-mstackrealign"
  Realign the stack at entry.  On the x86, the \fB\-mstackrealign\fR
*************** on x86\-64 processors in 64\-bit environ
*** 31925,31931 ****
  Generate code for a 16\-bit, 32\-bit or 64\-bit environment.
  The \fB\-m32\fR option sets \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, and pointer types
  to 32 bits, and
! generates code that runs on any i386 system.
  .Sp
  The \fB\-m64\fR option sets \f(CW\*(C`int\*(C'\fR to 32 bits and \f(CW\*(C`long\*(C'\fR and pointer
  types to 64 bits, and generates code for the x86\-64 architecture.
--- 31974,31980 ----
  Generate code for a 16\-bit, 32\-bit or 64\-bit environment.
  The \fB\-m32\fR option sets \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, and pointer types
  to 32 bits, and
! generates code that runs in 32\-bit mode.
  .Sp
  The \fB\-m64\fR option sets \f(CW\*(C`int\*(C'\fR to 32 bits and \f(CW\*(C`long\*(C'\fR and pointer
  types to 64 bits, and generates code for the x86\-64 architecture.
*************** to subtle defects.  Supplying them in ca
*** 32452,32459 ****
  is innocuous.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
! \&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIdbx\fR\|(1)
  and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
  \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
  .SH "AUTHOR"
--- 32501,32508 ----
  is innocuous.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBgfdl\fR\|(7), \fBfsf\-funding\fR\|(7),
! \&\fBcpp\fR\|(1), \fBgcov\fR\|(1), \fBas\fR\|(1), \fBld\fR\|(1), \fBgdb\fR\|(1), \fBdbx\fR\|(1)
  and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
  \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
  .SH "AUTHOR"
*************** any later version published by the Free
*** 32471,32477 ****
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fIgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
--- 32520,32526 ----
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fBgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/gcc.info gcc-12.4.0/gcc/doc/gcc.info
*** gcc-12.3.0/gcc/doc/gcc.info	Mon May  8 12:27:50 2023
--- gcc-12.4.0/gcc/doc/gcc.info	Thu Jun 20 08:26:23 2024
***************
*** 1,4 ****
! This is gcc.info, produced by makeinfo version 6.5 from gcc.texi.
  
  Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
--- 1,4 ----
! This is gcc.info, produced by makeinfo version 6.8 from gcc.texi.
  
  Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
*************** Copies published by the Free Software Fo
*** 53,66 ****
  development.
  
  
! File: gcc.info,  Node: Top,  Next: G++ and GCC
  
  Introduction
  ************
  
  This manual documents how to use the GNU compilers, as well as their
  features and incompatibilities, and how to report bugs.  It corresponds
! to the compilers (GCC) version 12.3.0.  The internals of the GNU
  compilers, including how to port them to new targets and some
  information about how to write front ends for new languages, are
  documented in a separate manual.  *Note Introduction: (gccint)Top.
--- 53,66 ----
  development.
  
  
! File: gcc.info,  Node: Top,  Next: G++ and GCC,  Up: (dir)
  
  Introduction
  ************
  
  This manual documents how to use the GNU compilers, as well as their
  features and incompatibilities, and how to report bugs.  It corresponds
! to the compilers (GCC) version 12.4.0.  The internals of the GNU
  compilers, including how to port them to new targets and some
  information about how to write front ends for new languages, are
  documented in a separate manual.  *Note Introduction: (gccint)Top.
*************** _Machine-Dependent Options_
*** 1331,1337 ****
            -mcond-move-float  -mno-cond-move-float
            -memcpy  -mno-memcpy -mstrict-align -mno-strict-align
            -mmax-inline-memcpy-size=N
!           -mcmodel=CODE-MODEL
  
       _M32R/D Options_
            -m32r2  -m32rx  -m32r
--- 1331,1337 ----
            -mcond-move-float  -mno-cond-move-float
            -memcpy  -mno-memcpy -mstrict-align -mno-strict-align
            -mmax-inline-memcpy-size=N
!           -mcmodel=CODE-MODEL -mrelax -mpass-mrelax-to-as
  
       _M32R/D Options_
            -m32r2  -m32rx  -m32r
*************** _Machine-Dependent Options_
*** 1760,1766 ****
            -m96bit-long-double  -mlong-double-64  -mlong-double-80  -mlong-double-128
            -mregparm=NUM  -msseregparm
            -mveclibabi=TYPE  -mvect8-ret-in-mem
!           -mpc32  -mpc64  -mpc80  -mstackrealign
            -momit-leaf-frame-pointer  -mno-red-zone  -mno-tls-direct-seg-refs
            -mcmodel=CODE-MODEL  -mabi=NAME  -maddress-mode=MODE
            -m32  -m64  -mx32  -m16  -miamcu  -mlarge-data-threshold=NUM
--- 1760,1766 ----
            -m96bit-long-double  -mlong-double-64  -mlong-double-80  -mlong-double-128
            -mregparm=NUM  -msseregparm
            -mveclibabi=TYPE  -mvect8-ret-in-mem
!           -mpc32  -mpc64  -mpc80 -mdaz-ftz -mstackrealign
            -momit-leaf-frame-pointer  -mno-red-zone  -mno-tls-direct-seg-refs
            -mcmodel=CODE-MODEL  -mabi=NAME  -maddress-mode=MODE
            -m32  -m64  -mx32  -m16  -miamcu  -mlarge-data-threshold=NUM
*************** Objective-C++ programs:
*** 4400,4408 ****
       literal string specified with the syntax '@"..."'.  The default
       class name is 'NXConstantString' if the GNU runtime is being used,
       and 'NSConstantString' if the NeXT runtime is being used (see
!      below).  The '-fconstant-cfstrings' option, if also present,
!      overrides the '-fconstant-string-class' setting and cause '@"..."'
!      literals to be laid out as constant CoreFoundation strings.
  
  '-fgnu-runtime'
       Generate object code compatible with the standard GNU Objective-C
--- 4400,4411 ----
       literal string specified with the syntax '@"..."'.  The default
       class name is 'NXConstantString' if the GNU runtime is being used,
       and 'NSConstantString' if the NeXT runtime is being used (see
!      below).  On Darwin (macOS, MacOS X) platforms, the
!      '-fconstant-cfstrings' option, if also present, overrides the
!      '-fconstant-string-class' setting and cause '@"..."' literals to be
!      laid out as constant CoreFoundation strings.  Note that
!      '-fconstant-cfstrings' is an alias for the target-specific
!      '-mconstant-cfstrings' equivalent.
  
  '-fgnu-runtime'
       Generate object code compatible with the standard GNU Objective-C
*************** warnings, in some cases it may also caus
*** 6223,6229 ****
  
  '-Wmissing-include-dirs (C, C++, Objective-C, Objective-C++ and Fortran only)'
       Warn if a user-supplied include directory does not exist.  This
!      opions is disabled by default for C, C++, Objective-C and
       Objective-C++.  For Fortran, it is partially enabled by default by
       warning for -I and -J, only.
  
--- 6226,6232 ----
  
  '-Wmissing-include-dirs (C, C++, Objective-C, Objective-C++ and Fortran only)'
       Warn if a user-supplied include directory does not exist.  This
!      option is disabled by default for C, C++, Objective-C and
       Objective-C++.  For Fortran, it is partially enabled by default by
       warning for -I and -J, only.
  
*************** These options are defined for AArch64 im
*** 18052,18058 ****
       'cortex-a73.cortex-a35', 'cortex-a73.cortex-a53',
       'cortex-a75.cortex-a55', 'cortex-a76.cortex-a55', 'cortex-r82',
       'cortex-x1', 'cortex-x2', 'cortex-a510', 'cortex-a710', 'ampere1',
!      'ampere1a', 'native'.
  
       The values 'cortex-a57.cortex-a53', 'cortex-a72.cortex-a53',
       'cortex-a73.cortex-a35', 'cortex-a73.cortex-a53',
--- 18055,18061 ----
       'cortex-a73.cortex-a35', 'cortex-a73.cortex-a53',
       'cortex-a75.cortex-a55', 'cortex-a76.cortex-a55', 'cortex-r82',
       'cortex-x1', 'cortex-x2', 'cortex-a510', 'cortex-a710', 'ampere1',
!      'ampere1a', 'cobalt-100' and 'native'.
  
       The values 'cortex-a57.cortex-a53', 'cortex-a72.cortex-a53',
       'cortex-a73.cortex-a35', 'cortex-a73.cortex-a53',
*************** These options are defined for AVR implem
*** 20158,20163 ****
--- 20161,20167 ----
  
       'avr3'
            "Classic" devices with 16 KiB up to 64 KiB of program memory.
+ 
            MCU = 'at76c711', 'at43usb355'.
  
       'avr31'
*************** These options are defined for AVR implem
*** 20176,20184 ****
            MCU = 'atmega48', 'atmega48a', 'atmega48p', 'atmega48pa',
            'atmega48pb', 'atmega8', 'atmega8a', 'atmega8hva', 'atmega88',
            'atmega88a', 'atmega88p', 'atmega88pa', 'atmega88pb',
!           'atmega8515', 'atmega8535', 'ata6285', 'ata6286', 'ata6289',
!           'ata6612c', 'at90pwm1', 'at90pwm2', 'at90pwm2b', 'at90pwm3',
!           'at90pwm3b', 'at90pwm81'.
  
       'avr5'
            "Enhanced" devices with 16 KiB up to 64 KiB of program memory.
--- 20180,20188 ----
            MCU = 'atmega48', 'atmega48a', 'atmega48p', 'atmega48pa',
            'atmega48pb', 'atmega8', 'atmega8a', 'atmega8hva', 'atmega88',
            'atmega88a', 'atmega88p', 'atmega88pa', 'atmega88pb',
!           'atmega8515', 'atmega8535', 'ata5795', 'ata6285', 'ata6286',
!           'ata6289', 'ata6612c', 'at90pwm1', 'at90pwm2', 'at90pwm2b',
!           'at90pwm3', 'at90pwm3b', 'at90pwm81'.
  
       'avr5'
            "Enhanced" devices with 16 KiB up to 64 KiB of program memory.
*************** These options are defined for AVR implem
*** 20204,20214 ****
            'atmega644rfr2', 'atmega645', 'atmega645a', 'atmega645p',
            'atmega649', 'atmega649a', 'atmega649p', 'atmega6450',
            'atmega6450a', 'atmega6450p', 'atmega6490', 'atmega6490a',
!           'atmega6490p', 'ata5795', 'ata5790', 'ata5790n', 'ata5791',
!           'ata6613c', 'ata6614q', 'ata5782', 'ata5831', 'ata8210',
!           'ata8510', 'ata5702m322', 'at90pwm161', 'at90pwm216',
!           'at90pwm316', 'at90can32', 'at90can64', 'at90scr100',
!           'at90usb646', 'at90usb647', 'at94k', 'm3000'.
  
       'avr51'
            "Enhanced" devices with 128 KiB of program memory.
--- 20208,20219 ----
            'atmega644rfr2', 'atmega645', 'atmega645a', 'atmega645p',
            'atmega649', 'atmega649a', 'atmega649p', 'atmega6450',
            'atmega6450a', 'atmega6450p', 'atmega6490', 'atmega6490a',
!           'atmega6490p', 'ata5790', 'ata5790n', 'ata5791', 'ata6613c',
!           'ata6614q', 'ata5782', 'ata5831', 'ata8210', 'ata8510',
!           'ata5787', 'ata5835', 'ata5700m322', 'ata5702m322',
!           'at90pwm161', 'at90pwm216', 'at90pwm316', 'at90can32',
!           'at90can64', 'at90scr100', 'at90usb646', 'at90usb647',
!           'at94k', 'm3000'.
  
       'avr51'
            "Enhanced" devices with 128 KiB of program memory.
*************** These options are defined for AVR implem
*** 20229,20235 ****
            MCU = 'atxmega8e5', 'atxmega16a4', 'atxmega16a4u',
            'atxmega16c4', 'atxmega16d4', 'atxmega16e5', 'atxmega32a4',
            'atxmega32a4u', 'atxmega32c3', 'atxmega32c4', 'atxmega32d3',
!           'atxmega32d4', 'atxmega32e5'.
  
       'avrxmega3'
            "XMEGA" devices with up to 64 KiB of combined program memory
--- 20234,20244 ----
            MCU = 'atxmega8e5', 'atxmega16a4', 'atxmega16a4u',
            'atxmega16c4', 'atxmega16d4', 'atxmega16e5', 'atxmega32a4',
            'atxmega32a4u', 'atxmega32c3', 'atxmega32c4', 'atxmega32d3',
!           'atxmega32d4', 'atxmega32e5', 'avr64da28', 'avr64da32',
!           'avr64da48', 'avr64da64', 'avr64db28', 'avr64db32',
!           'avr64db48', 'avr64db64', 'avr64dd14', 'avr64dd20',
!           'avr64dd28', 'avr64dd32', 'avr64du28', 'avr64du32',
!           'avr64ea28', 'avr64ea32', 'avr64ea48'.
  
       'avrxmega3'
            "XMEGA" devices with up to 64 KiB of combined program memory
*************** These options are defined for AVR implem
*** 20237,20256 ****
            space.
            MCU = 'attiny202', 'attiny204', 'attiny212', 'attiny214',
            'attiny402', 'attiny404', 'attiny406', 'attiny412',
!           'attiny414', 'attiny416', 'attiny417', 'attiny804',
            'attiny806', 'attiny807', 'attiny814', 'attiny816',
!           'attiny817', 'attiny1604', 'attiny1606', 'attiny1607',
!           'attiny1614', 'attiny1616', 'attiny1617', 'attiny3214',
!           'attiny3216', 'attiny3217', 'atmega808', 'atmega809',
!           'atmega1608', 'atmega1609', 'atmega3208', 'atmega3209',
!           'atmega4808', 'atmega4809'.
  
       'avrxmega4'
            "XMEGA" devices with more than 64 KiB and up to 128 KiB of
            program memory.
            MCU = 'atxmega64a3', 'atxmega64a3u', 'atxmega64a4u',
            'atxmega64b1', 'atxmega64b3', 'atxmega64c3', 'atxmega64d3',
!           'atxmega64d4'.
  
       'avrxmega5'
            "XMEGA" devices with more than 64 KiB and up to 128 KiB of
--- 20246,20278 ----
            space.
            MCU = 'attiny202', 'attiny204', 'attiny212', 'attiny214',
            'attiny402', 'attiny404', 'attiny406', 'attiny412',
!           'attiny414', 'attiny416', 'attiny416auto', 'attiny417',
!           'attiny424', 'attiny426', 'attiny427', 'attiny804',
            'attiny806', 'attiny807', 'attiny814', 'attiny816',
!           'attiny817', 'attiny824', 'attiny826', 'attiny827',
!           'attiny1604', 'attiny1606', 'attiny1607', 'attiny1614',
!           'attiny1616', 'attiny1617', 'attiny1624', 'attiny1626',
!           'attiny1627', 'attiny3214', 'attiny3216', 'attiny3217',
!           'attiny3224', 'attiny3226', 'attiny3227', 'atmega808',
!           'atmega809', 'atmega1608', 'atmega1609', 'atmega3208',
!           'atmega3209', 'atmega4808', 'atmega4809', 'avr16dd14',
!           'avr16dd20', 'avr16dd28', 'avr16dd32', 'avr16du14',
!           'avr16du20', 'avr16du28', 'avr16du32', 'avr16ea28',
!           'avr16ea32', 'avr16ea48', 'avr16eb14', 'avr16eb20',
!           'avr16eb28', 'avr16eb32', 'avr32da28', 'avr32da32',
!           'avr32da48', 'avr32db28', 'avr32db32', 'avr32db48',
!           'avr32dd14', 'avr32dd20', 'avr32dd28', 'avr32dd32',
!           'avr32du14', 'avr32du20', 'avr32du28', 'avr32du32',
!           'avr32ea28', 'avr32ea32', 'avr32ea48'.
  
       'avrxmega4'
            "XMEGA" devices with more than 64 KiB and up to 128 KiB of
            program memory.
            MCU = 'atxmega64a3', 'atxmega64a3u', 'atxmega64a4u',
            'atxmega64b1', 'atxmega64b3', 'atxmega64c3', 'atxmega64d3',
!           'atxmega64d4', 'avr128da28', 'avr128da32', 'avr128da48',
!           'avr128da64', 'avr128db28', 'avr128db32', 'avr128db48',
!           'avr128db64'.
  
       'avrxmega5'
            "XMEGA" devices with more than 64 KiB and up to 128 KiB of
*************** These options are defined for AVR implem
*** 20275,20282 ****
       'avrtiny'
            "TINY" Tiny core devices with 512 B up to 4 KiB of program
            memory.
!           MCU = 'attiny4', 'attiny5', 'attiny9', 'attiny10', 'attiny20',
!           'attiny40'.
  
       'avr1'
            This ISA is implemented by the minimal AVR core and supported
--- 20297,20304 ----
       'avrtiny'
            "TINY" Tiny core devices with 512 B up to 4 KiB of program
            memory.
!           MCU = 'attiny4', 'attiny5', 'attiny9', 'attiny10',
!           'attiny102', 'attiny104', 'attiny20', 'attiny40'.
  
       'avr1'
            This ISA is implemented by the minimal AVR core and supported
*************** executable the most restrictive subtype
*** 21341,21350 ****
  '-gfull'
       Emit debugging information for all symbols and types.
  
  '-mmacosx-version-min=VERSION'
       The earliest version of MacOS X that this executable will run on is
!      VERSION.  Typical values of VERSION include '10.1', '10.2', and
!      '10.3.9'.
  
       If the compiler was built to use the system's headers by default,
       then the default for this option is the system version on which the
--- 21363,21380 ----
  '-gfull'
       Emit debugging information for all symbols and types.
  
+ '-fconstant-cfstrings'
+      The '-fconstant-cfstrings' is an alias for '-mconstant-cfstrings'.
+ 
+ '-mconstant-cfstrings'
+      When the NeXT runtime is being used (the default on these systems),
+      override any '-fconstant-string-class' setting and cause '@"..."'
+      literals to be laid out as constant CoreFoundation strings.
+ 
  '-mmacosx-version-min=VERSION'
       The earliest version of MacOS X that this executable will run on is
!      VERSION.  Typical values supported for VERSION include '12',
!      '10.12', and '10.5.8'.
  
       If the compiler was built to use the system's headers by default,
       then the default for this option is the system version on which the
*************** These command-line options are defined f
*** 22842,22847 ****
--- 22872,22899 ----
                 addressing space.
       The default code model is 'normal'.
  
+ '-mrelax'
+ '-mno-relax'
+      Take (do not take) advantage of linker relaxations.  If
+      '-mpass-mrelax-to-as' is enabled, this option is also passed to the
+      assembler.  The default is determined during GCC build-time by
+      detecting corresponding assembler support: '-mrelax' if the
+      assembler supports both the '-mrelax' option and the conditional
+      branch relaxation (it's required or the '.align' directives and
+      conditional branch instructions in the assembly code outputted by
+      GCC may be rejected by the assembler because of a relocation
+      overflow), '-mno-relax' otherwise.
+ 
+ '-mpass-mrelax-to-as'
+ '-mno-pass-mrelax-to-as'
+      Pass (do not pass) the '-mrelax' or '-mno-relax' option to the
+      assembler.  The default is determined during GCC build-time by
+      detecting corresponding assembler support: '-mpass-mrelax-to-as' if
+      the assembler supports the '-mrelax' option,
+      '-mno-pass-mrelax-to-as' otherwise.  This option is mostly useful
+      for debugging, or interoperation with assemblers different from the
+      build-time one.
+ 
  
  File: gcc.info,  Node: M32C Options,  Next: M32R/D Options,  Prev: LoongArch Options,  Up: Submodel Options
  
*************** These '-m' options are defined for the x
*** 29285,29290 ****
--- 29337,29351 ----
       through so-called "catastrophic cancellation", when this option is
       used to set the precision to less than extended precision.
  
+ '-mdaz-ftz'
+ 
+      The flush-to-zero (FTZ) and denormals-are-zero (DAZ) flags in the
+      MXCSR register are used to control floating-point calculations.SSE
+      and AVX instructions including scalar and vector instructions could
+      benefit from enabling the FTZ and DAZ flags when '-mdaz-ftz' is
+      specified.  Don't set FTZ/DAZ flags when '-mno-daz-ftz' is
+      specified.
+ 
  '-mstackrealign'
       Realign the stack at entry.  On the x86, the '-mstackrealign'
       option generates an alternate prologue and epilogue that realigns
*************** processors in 64-bit environments.
*** 30047,30053 ****
  '-miamcu'
       Generate code for a 16-bit, 32-bit or 64-bit environment.  The
       '-m32' option sets 'int', 'long', and pointer types to 32 bits, and
!      generates code that runs on any i386 system.
  
       The '-m64' option sets 'int' to 32 bits and 'long' and pointer
       types to 64 bits, and generates code for the x86-64 architecture.
--- 30108,30114 ----
  '-miamcu'
       Generate code for a 16-bit, 32-bit or 64-bit environment.  The
       '-m32' option sets 'int', 'long', and pointer types to 32 bits, and
!      generates code that runs in 32-bit mode.
  
       The '-m64' option sets 'int' to 32 bits and 'long' and pointer
       types to 64 bits, and generates code for the x86-64 architecture.
*************** instructions, but allow the compiler to
*** 47483,47488 ****
--- 47544,47550 ----
  * Blackfin Built-in Functions::
  * BPF Built-in Functions::
  * FR-V Built-in Functions::
+ * LoongArch Base Built-in Functions::
  * MIPS DSP Built-in Functions::
  * MIPS Paired-Single Support::
  * MIPS Loongson Built-in Functions::
*************** The following built-in functions are ava
*** 48403,48409 ****
       if '-mco-re' is not in effect (either specified or implied).
  
  
! File: gcc.info,  Node: FR-V Built-in Functions,  Next: MIPS DSP Built-in Functions,  Prev: BPF Built-in Functions,  Up: Target Builtins
  
  6.60.13 FR-V Built-in Functions
  -------------------------------
--- 48465,48471 ----
       if '-mco-re' is not in effect (either specified or implied).
  
  
! File: gcc.info,  Node: FR-V Built-in Functions,  Next: LoongArch Base Built-in Functions,  Prev: BPF Built-in Functions,  Up: Target Builtins
  
  6.60.13 FR-V Built-in Functions
  -------------------------------
*************** specific FR-V instruction.
*** 48690,48698 ****
       the data cache.  The instruction is issued in slot I1.
  
  
! File: gcc.info,  Node: MIPS DSP Built-in Functions,  Next: MIPS Paired-Single Support,  Prev: FR-V Built-in Functions,  Up: Target Builtins
  
! 6.60.14 MIPS DSP Built-in Functions
  -----------------------------------
  
  The MIPS DSP Application-Specific Extension (ASE) includes new
--- 48752,48885 ----
       the data cache.  The instruction is issued in slot I1.
  
  
! File: gcc.info,  Node: LoongArch Base Built-in Functions,  Next: MIPS DSP Built-in Functions,  Prev: FR-V Built-in Functions,  Up: Target Builtins
  
! 6.60.14 LoongArch Base Built-in Functions
! -----------------------------------------
! 
! These built-in functions are available for LoongArch.
! 
!  Data Type Description:
!    * 'imm0_31', a compile-time constant in range 0 to 31;
!    * 'imm0_16383', a compile-time constant in range 0 to 16383;
!    * 'imm0_32767', a compile-time constant in range 0 to 32767;
!    * 'imm_n2048_2047', a compile-time constant in range -2048 to 2047;
! 
!  The intrinsics provided are listed below:
!          unsigned int __builtin_loongarch_movfcsr2gr (imm0_31)
!          void __builtin_loongarch_movgr2fcsr (imm0_31, unsigned int)
!          void __builtin_loongarch_cacop_d (imm0_31, unsigned long int, imm_n2048_2047)
!          unsigned int __builtin_loongarch_cpucfg (unsigned int)
!          void __builtin_loongarch_asrtle_d (long int, long int)
!          void __builtin_loongarch_asrtgt_d (long int, long int)
!          long int __builtin_loongarch_lddir_d (long int, imm0_31)
!          void __builtin_loongarch_ldpte_d (long int, imm0_31)
! 
!          int __builtin_loongarch_crc_w_b_w (char, int)
!          int __builtin_loongarch_crc_w_h_w (short, int)
!          int __builtin_loongarch_crc_w_w_w (int, int)
!          int __builtin_loongarch_crc_w_d_w (long int, int)
!          int __builtin_loongarch_crcc_w_b_w (char, int)
!          int __builtin_loongarch_crcc_w_h_w (short, int)
!          int __builtin_loongarch_crcc_w_w_w (int, int)
!          int __builtin_loongarch_crcc_w_d_w (long int, int)
! 
!          unsigned int __builtin_loongarch_csrrd_w (imm0_16383)
!          unsigned int __builtin_loongarch_csrwr_w (unsigned int, imm0_16383)
!          unsigned int __builtin_loongarch_csrxchg_w (unsigned int, unsigned int, imm0_16383)
!          unsigned long int __builtin_loongarch_csrrd_d (imm0_16383)
!          unsigned long int __builtin_loongarch_csrwr_d (unsigned long int, imm0_16383)
!          unsigned long int __builtin_loongarch_csrxchg_d (unsigned long int, unsigned long int, imm0_16383)
! 
!          unsigned char __builtin_loongarch_iocsrrd_b (unsigned int)
!          unsigned short __builtin_loongarch_iocsrrd_h (unsigned int)
!          unsigned int __builtin_loongarch_iocsrrd_w (unsigned int)
!          unsigned long int __builtin_loongarch_iocsrrd_d (unsigned int)
!          void __builtin_loongarch_iocsrwr_b (unsigned char, unsigned int)
!          void __builtin_loongarch_iocsrwr_h (unsigned short, unsigned int)
!          void __builtin_loongarch_iocsrwr_w (unsigned int, unsigned int)
!          void __builtin_loongarch_iocsrwr_d (unsigned long int, unsigned int)
! 
!          void __builtin_loongarch_dbar (imm0_32767)
!          void __builtin_loongarch_ibar (imm0_32767)
! 
!          void __builtin_loongarch_syscall (imm0_32767)
!          void __builtin_loongarch_break (imm0_32767)
! 
!  _Note:_Since the control register is divided into 32-bit and 64-bit,
! but the access instruction is not distinguished.  So GCC renames the
! control instructions when implementing intrinsics.
! 
!  Take the csrrd instruction as an example, built-in functions are
! implemented as follows:
!        __builtin_loongarch_csrrd_w  // When reading the 32-bit control register use.
!        __builtin_loongarch_csrrd_d  // When reading the 64-bit control register use.
! 
!  For the convenience of use, the built-in functions are encapsulated,
! the encapsulated functions and '__drdtime_t, __rdtime_t' are defined in
! the 'larchintrin.h'.  So if you call the following function you need to
! include 'larchintrin.h'.
! 
!           typedef struct drdtime{
!                  unsigned long dvalue;
!                  unsigned long dtimeid;
!           } __drdtime_t;
! 
!           typedef struct rdtime{
!                  unsigned int value;
!                  unsigned int timeid;
!           } __rdtime_t;
! 
!          __drdtime_t __rdtime_d (void)
!          __rdtime_t  __rdtimel_w (void)
!          __rdtime_t  __rdtimeh_w (void)
!          unsigned int  __movfcsr2gr (imm0_31)
!          void __movgr2fcsr (imm0_31, unsigned int)
!          void __cacop_d (imm0_31, unsigned long, imm_n2048_2047)
!          unsigned int  __cpucfg (unsigned int)
!          void __asrtle_d (long int, long int)
!          void __asrtgt_d (long int, long int)
!          long int  __lddir_d (long int, imm0_31)
!          void __ldpte_d (long int, imm0_31)
! 
!          int  __crc_w_b_w (char, int)
!          int  __crc_w_h_w (short, int)
!          int  __crc_w_w_w (int, int)
!          int  __crc_w_d_w (long int, int)
!          int  __crcc_w_b_w (char, int)
!          int  __crcc_w_h_w (short, int)
!          int  __crcc_w_w_w (int, int)
!          int  __crcc_w_d_w (long int, int)
! 
!          unsigned int  __csrrd_w (imm0_16383)
!          unsigned int  __csrwr_w (unsigned int, imm0_16383)
!          unsigned int  __csrxchg_w (unsigned int, unsigned int, imm0_16383)
!          unsigned long  __csrrd_d (imm0_16383)
!          unsigned long  __csrwr_d (unsigned long, imm0_16383)
!          unsigned long  __csrxchg_d (unsigned long, unsigned long, imm0_16383)
! 
!          unsigned char   __iocsrrd_b (unsigned int)
!          unsigned short  __iocsrrd_h (unsigned int)
!          unsigned int  __iocsrrd_w (unsigned int)
!          unsigned long  __iocsrrd_d (unsigned int)
!          void __iocsrwr_b (unsigned char, unsigned int)
!          void __iocsrwr_h (unsigned short, unsigned int)
!          void __iocsrwr_w (unsigned int, unsigned int)
!          void __iocsrwr_d (unsigned long, unsigned int)
! 
!          void __dbar (imm0_32767)
!          void __ibar (imm0_32767)
! 
!          void __syscall (imm0_32767)
!          void __break (imm0_32767)
! 
!  Returns the value that is currently set in the 'tp' register.
!          void * __builtin_thread_pointer (void)
! 
! 
! File: gcc.info,  Node: MIPS DSP Built-in Functions,  Next: MIPS Paired-Single Support,  Prev: LoongArch Base Built-in Functions,  Up: Target Builtins
! 
! 6.60.15 MIPS DSP Built-in Functions
  -----------------------------------
  
  The MIPS DSP Application-Specific Extension (ASE) includes new
*************** details on what each instruction does.
*** 48967,48973 ****
  
  File: gcc.info,  Node: MIPS Paired-Single Support,  Next: MIPS Loongson Built-in Functions,  Prev: MIPS DSP Built-in Functions,  Up: Target Builtins
  
! 6.60.15 MIPS Paired-Single Support
  ----------------------------------
  
  The MIPS64 architecture includes a number of instructions that operate
--- 49154,49160 ----
  
  File: gcc.info,  Node: MIPS Paired-Single Support,  Next: MIPS Loongson Built-in Functions,  Prev: MIPS DSP Built-in Functions,  Up: Target Builtins
  
! 6.60.16 MIPS Paired-Single Support
  ----------------------------------
  
  The MIPS64 architecture includes a number of instructions that operate
*************** targets.  For example, the code above se
*** 49003,49009 ****
  
  File: gcc.info,  Node: MIPS Loongson Built-in Functions,  Next: MIPS SIMD Architecture (MSA) Support,  Prev: MIPS Paired-Single Support,  Up: Target Builtins
  
! 6.60.16 MIPS Loongson Built-in Functions
  ----------------------------------------
  
  GCC provides intrinsics to access the SIMD instructions provided by the
--- 49190,49196 ----
  
  File: gcc.info,  Node: MIPS Loongson Built-in Functions,  Next: MIPS SIMD Architecture (MSA) Support,  Prev: MIPS Paired-Single Support,  Up: Target Builtins
  
! 6.60.17 MIPS Loongson Built-in Functions
  ----------------------------------------
  
  GCC provides intrinsics to access the SIMD instructions provided by the
*************** each instruction.
*** 49134,49140 ****
  
  File: gcc.info,  Node: Paired-Single Arithmetic,  Next: Paired-Single Built-in Functions,  Up: MIPS Loongson Built-in Functions
  
! 6.60.16.1 Paired-Single Arithmetic
  ..................................
  
  The table below lists the 'v2sf' operations for which hardware support
--- 49321,49327 ----
  
  File: gcc.info,  Node: Paired-Single Arithmetic,  Next: Paired-Single Built-in Functions,  Up: MIPS Loongson Built-in Functions
  
! 6.60.17.1 Paired-Single Arithmetic
  ..................................
  
  The table below lists the 'v2sf' operations for which hardware support
*************** the command-line option '-mno-fused-madd
*** 49159,49165 ****
  
  File: gcc.info,  Node: Paired-Single Built-in Functions,  Next: MIPS-3D Built-in Functions,  Prev: Paired-Single Arithmetic,  Up: MIPS Loongson Built-in Functions
  
! 6.60.16.2 Paired-Single Built-in Functions
  ..........................................
  
  The following paired-single functions map directly to a particular MIPS
--- 49346,49352 ----
  
  File: gcc.info,  Node: Paired-Single Built-in Functions,  Next: MIPS-3D Built-in Functions,  Prev: Paired-Single Arithmetic,  Up: MIPS Loongson Built-in Functions
  
! 6.60.17.2 Paired-Single Built-in Functions
  ..........................................
  
  The following paired-single functions map directly to a particular MIPS
*************** case, COND can be any of the 16 floating
*** 49238,49244 ****
  
  File: gcc.info,  Node: MIPS-3D Built-in Functions,  Prev: Paired-Single Built-in Functions,  Up: MIPS Loongson Built-in Functions
  
! 6.60.16.3 MIPS-3D Built-in Functions
  ....................................
  
  The MIPS-3D Application-Specific Extension (ASE) includes additional
--- 49425,49431 ----
  
  File: gcc.info,  Node: MIPS-3D Built-in Functions,  Prev: Paired-Single Built-in Functions,  Up: MIPS Loongson Built-in Functions
  
! 6.60.17.3 MIPS-3D Built-in Functions
  ....................................
  
  The MIPS-3D Application-Specific Extension (ASE) includes additional
*************** case, COND can be any of the 16 floating
*** 49386,49392 ****
  
  File: gcc.info,  Node: MIPS SIMD Architecture (MSA) Support,  Next: Other MIPS Built-in Functions,  Prev: MIPS Loongson Built-in Functions,  Up: Target Builtins
  
! 6.60.17 MIPS SIMD Architecture (MSA) Support
  --------------------------------------------
  
  * Menu:
--- 49573,49579 ----
  
  File: gcc.info,  Node: MIPS SIMD Architecture (MSA) Support,  Next: Other MIPS Built-in Functions,  Prev: MIPS Loongson Built-in Functions,  Up: Target Builtins
  
! 6.60.18 MIPS SIMD Architecture (MSA) Support
  --------------------------------------------
  
  * Menu:
*************** restrictions and/or input/output values
*** 49456,49462 ****
  
  File: gcc.info,  Node: MIPS SIMD Architecture Built-in Functions,  Up: MIPS SIMD Architecture (MSA) Support
  
! 6.60.17.1 MIPS SIMD Architecture Built-in Functions
  ...................................................
  
  The intrinsics provided are listed below; each is named after the
--- 49643,49649 ----
  
  File: gcc.info,  Node: MIPS SIMD Architecture Built-in Functions,  Up: MIPS SIMD Architecture (MSA) Support
  
! 6.60.18.1 MIPS SIMD Architecture Built-in Functions
  ...................................................
  
  The intrinsics provided are listed below; each is named after the
*************** machine instruction.
*** 50173,50179 ****
  
  File: gcc.info,  Node: Other MIPS Built-in Functions,  Next: MSP430 Built-in Functions,  Prev: MIPS SIMD Architecture (MSA) Support,  Up: Target Builtins
  
! 6.60.18 Other MIPS Built-in Functions
  -------------------------------------
  
  GCC provides other MIPS-specific built-in functions:
--- 50360,50366 ----
  
  File: gcc.info,  Node: Other MIPS Built-in Functions,  Next: MSP430 Built-in Functions,  Prev: MIPS SIMD Architecture (MSA) Support,  Up: Target Builtins
  
! 6.60.19 Other MIPS Built-in Functions
  -------------------------------------
  
  GCC provides other MIPS-specific built-in functions:
*************** GCC provides other MIPS-specific built-i
*** 50197,50203 ****
  
  File: gcc.info,  Node: MSP430 Built-in Functions,  Next: NDS32 Built-in Functions,  Prev: Other MIPS Built-in Functions,  Up: Target Builtins
  
! 6.60.19 MSP430 Built-in Functions
  ---------------------------------
  
  GCC provides a couple of special builtin functions to aid in the writing
--- 50384,50390 ----
  
  File: gcc.info,  Node: MSP430 Built-in Functions,  Next: NDS32 Built-in Functions,  Prev: Other MIPS Built-in Functions,  Up: Target Builtins
  
! 6.60.20 MSP430 Built-in Functions
  ---------------------------------
  
  GCC provides a couple of special builtin functions to aid in the writing
*************** of interrupt handlers in C.
*** 50227,50233 ****
  
  File: gcc.info,  Node: NDS32 Built-in Functions,  Next: picoChip Built-in Functions,  Prev: MSP430 Built-in Functions,  Up: Target Builtins
  
! 6.60.20 NDS32 Built-in Functions
  --------------------------------
  
  These built-in functions are available for the NDS32 target:
--- 50414,50420 ----
  
  File: gcc.info,  Node: NDS32 Built-in Functions,  Next: picoChip Built-in Functions,  Prev: MSP430 Built-in Functions,  Up: Target Builtins
  
! 6.60.21 NDS32 Built-in Functions
  --------------------------------
  
  These built-in functions are available for the NDS32 target:
*************** These built-in functions are available f
*** 50260,50266 ****
  
  File: gcc.info,  Node: picoChip Built-in Functions,  Next: Basic PowerPC Built-in Functions,  Prev: NDS32 Built-in Functions,  Up: Target Builtins
  
! 6.60.21 picoChip Built-in Functions
  -----------------------------------
  
  GCC provides an interface to selected machine instructions from the
--- 50447,50453 ----
  
  File: gcc.info,  Node: picoChip Built-in Functions,  Next: Basic PowerPC Built-in Functions,  Prev: NDS32 Built-in Functions,  Up: Target Builtins
  
! 6.60.22 picoChip Built-in Functions
  -----------------------------------
  
  GCC provides an interface to selected machine instructions from the
*************** picoChip instruction set.
*** 50296,50302 ****
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions,  Next: PowerPC AltiVec/VSX Built-in Functions,  Prev: picoChip Built-in Functions,  Up: Target Builtins
  
! 6.60.22 Basic PowerPC Built-in Functions
  ----------------------------------------
  
  * Menu:
--- 50483,50489 ----
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions,  Next: PowerPC AltiVec/VSX Built-in Functions,  Prev: picoChip Built-in Functions,  Up: Target Builtins
  
! 6.60.23 Basic PowerPC Built-in Functions
  ----------------------------------------
  
  * Menu:
*************** PowerPC built-in functions.
*** 50316,50322 ****
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on all Configurations,  Next: Basic PowerPC Built-in Functions Available on ISA 2.05,  Up: Basic PowerPC Built-in Functions
  
! 6.60.22.1 Basic PowerPC Built-in Functions Available on all Configurations
  ..........................................................................
  
   -- Built-in Function: void __builtin_cpu_init (void)
--- 50503,50509 ----
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on all Configurations,  Next: Basic PowerPC Built-in Functions Available on ISA 2.05,  Up: Basic PowerPC Built-in Functions
  
! 6.60.23.1 Basic PowerPC Built-in Functions Available on all Configurations
  ..........................................................................
  
   -- Built-in Function: void __builtin_cpu_init (void)
*************** value.
*** 50541,50547 ****
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 2.05,  Next: Basic PowerPC Built-in Functions Available on ISA 2.06,  Prev: Basic PowerPC Built-in Functions Available on all Configurations,  Up: Basic PowerPC Built-in Functions
  
! 6.60.22.2 Basic PowerPC Built-in Functions Available on ISA 2.05
  ................................................................
  
  The basic built-in functions described in this section are available on
--- 50728,50734 ----
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 2.05,  Next: Basic PowerPC Built-in Functions Available on ISA 2.06,  Prev: Basic PowerPC Built-in Functions Available on all Configurations,  Up: Basic PowerPC Built-in Functions
  
! 6.60.23.2 Basic PowerPC Built-in Functions Available on ISA 2.05
  ................................................................
  
  The basic built-in functions described in this section are available on
*************** family of processors, for efficient use
*** 50639,50645 ****
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 2.06,  Next: Basic PowerPC Built-in Functions Available on ISA 2.07,  Prev: Basic PowerPC Built-in Functions Available on ISA 2.05,  Up: Basic PowerPC Built-in Functions
  
! 6.60.22.3 Basic PowerPC Built-in Functions Available on ISA 2.06
  ................................................................
  
  The basic built-in functions described in this section are available on
--- 50826,50832 ----
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 2.06,  Next: Basic PowerPC Built-in Functions Available on ISA 2.07,  Prev: Basic PowerPC Built-in Functions Available on ISA 2.05,  Up: Basic PowerPC Built-in Functions
  
! 6.60.23.3 Basic PowerPC Built-in Functions Available on ISA 2.06
  ................................................................
  
  The basic built-in functions described in this section are available on
*************** targets, require '-mfloat128'.
*** 50680,50686 ****
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 2.07,  Next: Basic PowerPC Built-in Functions Available on ISA 3.0,  Prev: Basic PowerPC Built-in Functions Available on ISA 2.06,  Up: Basic PowerPC Built-in Functions
  
! 6.60.22.4 Basic PowerPC Built-in Functions Available on ISA 2.07
  ................................................................
  
  The basic built-in functions described in this section are available on
--- 50867,50873 ----
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 2.07,  Next: Basic PowerPC Built-in Functions Available on ISA 3.0,  Prev: Basic PowerPC Built-in Functions Available on ISA 2.06,  Up: Basic PowerPC Built-in Functions
  
! 6.60.23.4 Basic PowerPC Built-in Functions Available on ISA 2.07
  ................................................................
  
  The basic built-in functions described in this section are available on
*************** options as for '-mcpu=power7' in additio
*** 50696,50702 ****
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 3.0,  Next: Basic PowerPC Built-in Functions Available on ISA 3.1,  Prev: Basic PowerPC Built-in Functions Available on ISA 2.07,  Up: Basic PowerPC Built-in Functions
  
! 6.60.22.5 Basic PowerPC Built-in Functions Available on ISA 3.0
  ...............................................................
  
  The basic built-in functions described in this section are available on
--- 50883,50889 ----
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 3.0,  Next: Basic PowerPC Built-in Functions Available on ISA 3.1,  Prev: Basic PowerPC Built-in Functions Available on ISA 2.07,  Up: Basic PowerPC Built-in Functions
  
! 6.60.23.5 Basic PowerPC Built-in Functions Available on ISA 3.0
  ...............................................................
  
  The basic built-in functions described in this section are available on
*************** builtin uses the older 'mffs' instructio
*** 50830,50836 ****
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 3.1,  Prev: Basic PowerPC Built-in Functions Available on ISA 3.0,  Up: Basic PowerPC Built-in Functions
  
! 6.60.22.6 Basic PowerPC Built-in Functions Available on ISA 3.1
  ...............................................................
  
  The basic built-in functions described in this section are available on
--- 51017,51023 ----
  
  File: gcc.info,  Node: Basic PowerPC Built-in Functions Available on ISA 3.1,  Prev: Basic PowerPC Built-in Functions Available on ISA 3.0,  Up: Basic PowerPC Built-in Functions
  
! 6.60.23.6 Basic PowerPC Built-in Functions Available on ISA 3.1
  ...............................................................
  
  The basic built-in functions described in this section are available on
*************** instructions.
*** 50909,50915 ****
  
  File: gcc.info,  Node: PowerPC AltiVec/VSX Built-in Functions,  Next: PowerPC Hardware Transactional Memory Built-in Functions,  Prev: Basic PowerPC Built-in Functions,  Up: Target Builtins
  
! 6.60.23 PowerPC AltiVec/VSX Built-in Functions
  ----------------------------------------------
  
  GCC provides an interface for the PowerPC family of processors to access
--- 51096,51102 ----
  
  File: gcc.info,  Node: PowerPC AltiVec/VSX Built-in Functions,  Next: PowerPC Hardware Transactional Memory Built-in Functions,  Prev: Basic PowerPC Built-in Functions,  Up: Target Builtins
  
! 6.60.24 PowerPC AltiVec/VSX Built-in Functions
  ----------------------------------------------
  
  GCC provides an interface for the PowerPC family of processors to access
*************** same capabilities should be considered d
*** 51075,51081 ****
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions on ISA 2.05,  Next: PowerPC AltiVec Built-in Functions Available on ISA 2.06,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.23.1 PowerPC AltiVec Built-in Functions on ISA 2.05
  ........................................................
  
  The following interfaces are supported for the generic and specific
--- 51262,51268 ----
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions on ISA 2.05,  Next: PowerPC AltiVec Built-in Functions Available on ISA 2.06,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.24.1 PowerPC AltiVec Built-in Functions on ISA 2.05
  ........................................................
  
  The following interfaces are supported for the generic and specific
*************** values within the range required for tha
*** 51557,51563 ****
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 2.06,  Next: PowerPC AltiVec Built-in Functions Available on ISA 2.07,  Prev: PowerPC AltiVec Built-in Functions on ISA 2.05,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.23.2 PowerPC AltiVec Built-in Functions Available on ISA 2.06
  ..................................................................
  
  The AltiVec built-in functions described in this section are available
--- 51744,51750 ----
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 2.06,  Next: PowerPC AltiVec Built-in Functions Available on ISA 2.07,  Prev: PowerPC AltiVec Built-in Functions on ISA 2.05,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.24.2 PowerPC AltiVec Built-in Functions Available on ISA 2.06
  ..................................................................
  
  The AltiVec built-in functions described in this section are available
*************** instructions.
*** 51686,51692 ****
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 2.07,  Next: PowerPC AltiVec Built-in Functions Available on ISA 3.0,  Prev: PowerPC AltiVec Built-in Functions Available on ISA 2.06,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.23.3 PowerPC AltiVec Built-in Functions Available on ISA 2.07
  ..................................................................
  
  If the ISA 2.07 additions to the vector/scalar (power8-vector)
--- 51873,51879 ----
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 2.07,  Next: PowerPC AltiVec Built-in Functions Available on ISA 3.0,  Prev: PowerPC AltiVec Built-in Functions Available on ISA 2.06,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.24.3 PowerPC AltiVec Built-in Functions Available on ISA 2.07
  ..................................................................
  
  If the ISA 2.07 additions to the vector/scalar (power8-vector)
*************** and VECTOR __UINT128 types, but the inde
*** 51875,51881 ****
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 3.0,  Next: PowerPC AltiVec Built-in Functions Available on ISA 3.1,  Prev: PowerPC AltiVec Built-in Functions Available on ISA 2.07,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.23.4 PowerPC AltiVec Built-in Functions Available on ISA 3.0
  .................................................................
  
  The following additional built-in functions are also available for the
--- 52062,52068 ----
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 3.0,  Next: PowerPC AltiVec Built-in Functions Available on ISA 3.1,  Prev: PowerPC AltiVec Built-in Functions Available on ISA 2.07,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.24.4 PowerPC AltiVec Built-in Functions Available on ISA 3.0
  .................................................................
  
  The following additional built-in functions are also available for the
*************** doubleword.
*** 52186,52192 ****
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 3.1,  Prev: PowerPC AltiVec Built-in Functions Available on ISA 3.0,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.23.5 PowerPC AltiVec Built-in Functions Available on ISA 3.1
  .................................................................
  
  The following additional built-in functions are also available for the
--- 52373,52379 ----
  
  File: gcc.info,  Node: PowerPC AltiVec Built-in Functions Available on ISA 3.1,  Prev: PowerPC AltiVec Built-in Functions Available on ISA 3.0,  Up: PowerPC AltiVec/VSX Built-in Functions
  
! 6.60.24.5 PowerPC AltiVec Built-in Functions Available on ISA 3.1
  .................................................................
  
  The following additional built-in functions are also available for the
*************** vec_div (vector unsigned long long a, ve
*** 52644,52651 ****
  in doubleword element 'i' of a is divided by the integer in doubleword
  element 'i' of b.  The unique integer quotient is placed into the
  doubleword element 'i' of the vector returned.  If an attempt is made to
! perform any of the divisions 0x8000_0000_0000_0000 ÷ -1 or 
! ÷ 0 then the quotient is undefined.
  
  vector signed int
  vec_dive (vector signed int a, vector signed int b);
--- 52831,52838 ----
  in doubleword element 'i' of a is divided by the integer in doubleword
  element 'i' of b.  The unique integer quotient is placed into the
  doubleword element 'i' of the vector returned.  If an attempt is made to
! perform any of the divisions 0x8000_0000_0000_0000 ÷ -1 or  ÷
! 0 then the quotient is undefined.
  
  vector signed int
  vec_dive (vector signed int a, vector signed int b);
*************** Otherwise, the element of the returned v
*** 52853,52859 ****
  
  File: gcc.info,  Node: PowerPC Hardware Transactional Memory Built-in Functions,  Next: PowerPC Atomic Memory Operation Functions,  Prev: PowerPC AltiVec/VSX Built-in Functions,  Up: Target Builtins
  
! 6.60.24 PowerPC Hardware Transactional Memory Built-in Functions
  ----------------------------------------------------------------
  
  GCC provides two interfaces for accessing the Hardware Transactional
--- 53040,53046 ----
  
  File: gcc.info,  Node: PowerPC Hardware Transactional Memory Built-in Functions,  Next: PowerPC Atomic Memory Operation Functions,  Prev: PowerPC AltiVec/VSX Built-in Functions,  Up: Target Builtins
  
! 6.60.25 PowerPC Hardware Transactional Memory Built-in Functions
  ----------------------------------------------------------------
  
  GCC provides two interfaces for accessing the Hardware Transactional
*************** interface, consisting of built-in functi
*** 52863,52869 ****
  higher level interface consisting of inline functions that are common
  between PowerPC and S/390.
  
! 6.60.24.1 PowerPC HTM Low Level Built-in Functions
  ..................................................
  
  The following low level built-in functions are available with '-mhtm' or
--- 53050,53056 ----
  higher level interface consisting of inline functions that are common
  between PowerPC and S/390.
  
! 6.60.25.1 PowerPC HTM Low Level Built-in Functions
  ..................................................
  
  The following low level built-in functions are available with '-mhtm' or
*************** using the following code example:
*** 52997,53003 ****
           /* Code to use in transaction suspended state.  */
         }
  
! 6.60.24.2 PowerPC HTM High Level Inline Functions
  .................................................
  
  The following high level HTM interface is made available by including
--- 53184,53190 ----
           /* Code to use in transaction suspended state.  */
         }
  
! 6.60.25.2 PowerPC HTM High Level Inline Functions
  .................................................
  
  The following high level HTM interface is made available by including
*************** work on either PowerPC or S/390:
*** 53063,53069 ****
  
  File: gcc.info,  Node: PowerPC Atomic Memory Operation Functions,  Next: PowerPC Matrix-Multiply Assist Built-in Functions,  Prev: PowerPC Hardware Transactional Memory Built-in Functions,  Up: Target Builtins
  
! 6.60.25 PowerPC Atomic Memory Operation Functions
  -------------------------------------------------
  
  ISA 3.0 of the PowerPC added new atomic memory operation (amo)
--- 53250,53256 ----
  
  File: gcc.info,  Node: PowerPC Atomic Memory Operation Functions,  Next: PowerPC Matrix-Multiply Assist Built-in Functions,  Prev: PowerPC Hardware Transactional Memory Built-in Functions,  Up: Target Builtins
  
! 6.60.26 PowerPC Atomic Memory Operation Functions
  -------------------------------------------------
  
  ISA 3.0 of the PowerPC added new atomic memory operation (amo)
*************** environments.  All of the functions are
*** 53126,53132 ****
  
  File: gcc.info,  Node: PowerPC Matrix-Multiply Assist Built-in Functions,  Next: PRU Built-in Functions,  Prev: PowerPC Atomic Memory Operation Functions,  Up: Target Builtins
  
! 6.60.26 PowerPC Matrix-Multiply Assist Built-in Functions
  ---------------------------------------------------------
  
  ISA 3.1 of the PowerPC added new Matrix-Multiply Assist (MMA)
--- 53313,53319 ----
  
  File: gcc.info,  Node: PowerPC Matrix-Multiply Assist Built-in Functions,  Next: PRU Built-in Functions,  Prev: PowerPC Atomic Memory Operation Functions,  Up: Target Builtins
  
! 6.60.27 PowerPC Matrix-Multiply Assist Built-in Functions
  ---------------------------------------------------------
  
  ISA 3.1 of the PowerPC added new Matrix-Multiply Assist (MMA)
*************** they are constants and that their values
*** 53225,53231 ****
  
  File: gcc.info,  Node: PRU Built-in Functions,  Next: RISC-V Built-in Functions,  Prev: PowerPC Matrix-Multiply Assist Built-in Functions,  Up: Target Builtins
  
! 6.60.27 PRU Built-in Functions
  ------------------------------
  
  GCC provides a couple of special builtin functions to aid in utilizing
--- 53412,53418 ----
  
  File: gcc.info,  Node: PRU Built-in Functions,  Next: RISC-V Built-in Functions,  Prev: PowerPC Matrix-Multiply Assist Built-in Functions,  Up: Target Builtins
  
! 6.60.28 PRU Built-in Functions
  ------------------------------
  
  GCC provides a couple of special builtin functions to aid in utilizing
*************** special PRU instructions.
*** 53253,53259 ****
  
  File: gcc.info,  Node: RISC-V Built-in Functions,  Next: RX Built-in Functions,  Prev: PRU Built-in Functions,  Up: Target Builtins
  
! 6.60.28 RISC-V Built-in Functions
  ---------------------------------
  
  These built-in functions are available for the RISC-V family of
--- 53440,53446 ----
  
  File: gcc.info,  Node: RISC-V Built-in Functions,  Next: RX Built-in Functions,  Prev: PRU Built-in Functions,  Up: Target Builtins
  
! 6.60.29 RISC-V Built-in Functions
  ---------------------------------
  
  These built-in functions are available for the RISC-V family of
*************** processors.
*** 53265,53271 ****
  
  File: gcc.info,  Node: RX Built-in Functions,  Next: S/390 System z Built-in Functions,  Prev: RISC-V Built-in Functions,  Up: Target Builtins
  
! 6.60.29 RX Built-in Functions
  -----------------------------
  
  GCC supports some of the RX instructions which cannot be expressed in
--- 53452,53458 ----
  
  File: gcc.info,  Node: RX Built-in Functions,  Next: S/390 System z Built-in Functions,  Prev: RISC-V Built-in Functions,  Up: Target Builtins
  
! 6.60.30 RX Built-in Functions
  -----------------------------
  
  GCC supports some of the RX instructions which cannot be expressed in
*************** following functions are supported:
*** 53363,53369 ****
  
  File: gcc.info,  Node: S/390 System z Built-in Functions,  Next: SH Built-in Functions,  Prev: RX Built-in Functions,  Up: Target Builtins
  
! 6.60.30 S/390 System z Built-in Functions
  -----------------------------------------
  
   -- Built-in Function: int __builtin_tbegin (void*)
--- 53550,53556 ----
  
  File: gcc.info,  Node: S/390 System z Built-in Functions,  Next: SH Built-in Functions,  Prev: RX Built-in Functions,  Up: Target Builtins
  
! 6.60.31 S/390 System z Built-in Functions
  -----------------------------------------
  
   -- Built-in Function: int __builtin_tbegin (void*)
*************** File: gcc.info,  Node: S/390 System z Bu
*** 53468,53474 ****
  
  File: gcc.info,  Node: SH Built-in Functions,  Next: SPARC VIS Built-in Functions,  Prev: S/390 System z Built-in Functions,  Up: Target Builtins
  
! 6.60.31 SH Built-in Functions
  -----------------------------
  
  The following built-in functions are supported on the SH1, SH2, SH3 and
--- 53655,53661 ----
  
  File: gcc.info,  Node: SH Built-in Functions,  Next: SPARC VIS Built-in Functions,  Prev: S/390 System z Built-in Functions,  Up: Target Builtins
  
! 6.60.32 SH Built-in Functions
  -----------------------------
  
  The following built-in functions are supported on the SH1, SH2, SH3 and
*************** SH4 families of processors:
*** 53510,53516 ****
  
  File: gcc.info,  Node: SPARC VIS Built-in Functions,  Next: TI C6X Built-in Functions,  Prev: SH Built-in Functions,  Up: Target Builtins
  
! 6.60.32 SPARC VIS Built-in Functions
  ------------------------------------
  
  GCC supports SIMD operations on the SPARC using both the generic vector
--- 53697,53703 ----
  
  File: gcc.info,  Node: SPARC VIS Built-in Functions,  Next: TI C6X Built-in Functions,  Prev: SH Built-in Functions,  Up: Target Builtins
  
! 6.60.33 SPARC VIS Built-in Functions
  ------------------------------------
  
  GCC supports SIMD operations on the SPARC using both the generic vector
*************** functions also become available:
*** 53723,53729 ****
  
  File: gcc.info,  Node: TI C6X Built-in Functions,  Next: TILE-Gx Built-in Functions,  Prev: SPARC VIS Built-in Functions,  Up: Target Builtins
  
! 6.60.33 TI C6X Built-in Functions
  ---------------------------------
  
  GCC provides intrinsics to access certain instructions of the TI C6X
--- 53910,53916 ----
  
  File: gcc.info,  Node: TI C6X Built-in Functions,  Next: TILE-Gx Built-in Functions,  Prev: SPARC VIS Built-in Functions,  Up: Target Builtins
  
! 6.60.34 TI C6X Built-in Functions
  ---------------------------------
  
  GCC provides intrinsics to access certain instructions of the TI C6X
*************** C6X instructions.
*** 53761,53767 ****
  
  File: gcc.info,  Node: TILE-Gx Built-in Functions,  Next: TILEPro Built-in Functions,  Prev: TI C6X Built-in Functions,  Up: Target Builtins
  
! 6.60.34 TILE-Gx Built-in Functions
  ----------------------------------
  
  GCC provides intrinsics to access every instruction of the TILE-Gx
--- 53948,53954 ----
  
  File: gcc.info,  Node: TILE-Gx Built-in Functions,  Next: TILEPro Built-in Functions,  Prev: TI C6X Built-in Functions,  Up: Target Builtins
  
! 6.60.35 TILE-Gx Built-in Functions
  ----------------------------------
  
  GCC provides intrinsics to access every instruction of the TILE-Gx
*************** that no network operations before it are
*** 53792,53798 ****
  
  File: gcc.info,  Node: TILEPro Built-in Functions,  Next: x86 Built-in Functions,  Prev: TILE-Gx Built-in Functions,  Up: Target Builtins
  
! 6.60.35 TILEPro Built-in Functions
  ----------------------------------
  
  GCC provides intrinsics to access every instruction of the TILEPro
--- 53979,53985 ----
  
  File: gcc.info,  Node: TILEPro Built-in Functions,  Next: x86 Built-in Functions,  Prev: TILE-Gx Built-in Functions,  Up: Target Builtins
  
! 6.60.36 TILEPro Built-in Functions
  ----------------------------------
  
  GCC provides intrinsics to access every instruction of the TILEPro
*************** that no network operations before it are
*** 53825,53831 ****
  
  File: gcc.info,  Node: x86 Built-in Functions,  Next: x86 transactional memory intrinsics,  Prev: TILEPro Built-in Functions,  Up: Target Builtins
  
! 6.60.36 x86 Built-in Functions
  ------------------------------
  
  These built-in functions are available for the x86-32 and x86-64 family
--- 54012,54018 ----
  
  File: gcc.info,  Node: x86 Built-in Functions,  Next: x86 transactional memory intrinsics,  Prev: TILEPro Built-in Functions,  Up: Target Builtins
  
! 6.60.37 x86 Built-in Functions
  ------------------------------
  
  These built-in functions are available for the x86-32 and x86-64 family
*************** These are the internal low-level functio
*** 55321,55327 ****
  
  File: gcc.info,  Node: x86 transactional memory intrinsics,  Next: x86 control-flow protection intrinsics,  Prev: x86 Built-in Functions,  Up: Target Builtins
  
! 6.60.37 x86 Transactional Memory Intrinsics
  -------------------------------------------
  
  These hardware transactional memory intrinsics for x86 allow you to use
--- 55508,55514 ----
  
  File: gcc.info,  Node: x86 transactional memory intrinsics,  Next: x86 control-flow protection intrinsics,  Prev: x86 Built-in Functions,  Up: Target Builtins
  
! 6.60.38 x86 Transactional Memory Intrinsics
  -------------------------------------------
  
  These hardware transactional memory intrinsics for x86 allow you to use
*************** must synchronize together to ensure cons
*** 55411,55417 ****
  
  File: gcc.info,  Node: x86 control-flow protection intrinsics,  Prev: x86 transactional memory intrinsics,  Up: Target Builtins
  
! 6.60.38 x86 Control-Flow Protection Intrinsics
  ----------------------------------------------
  
   -- CET Function: ret_type _get_ssp (void)
--- 55598,55604 ----
  
  File: gcc.info,  Node: x86 control-flow protection intrinsics,  Prev: x86 transactional memory intrinsics,  Up: Target Builtins
  
! 6.60.39 x86 Control-Flow Protection Intrinsics
  ----------------------------------------------
  
   -- CET Function: ret_type _get_ssp (void)
*************** alphabetical order.
*** 62219,62225 ****
  
     * Ralf Corsepius for SH testing and minor bug fixing.
  
!    * Franc,ois-Xavier Coudert for contributions to GNU Fortran.
  
     * Stan Cox for care and feeding of the x86 port and lots of behind
       the scenes hacking.
--- 62406,62412 ----
  
     * Ralf Corsepius for SH testing and minor bug fixing.
  
!    * François-Xavier Coudert for contributions to GNU Fortran.
  
     * Stan Cox for care and feeding of the x86 port and lots of behind
       the scenes hacking.
*************** alphabetical order.
*** 62262,62268 ****
       disbursement, configuration architecture, libio maintenance, and
       early math work.
  
!    * Franc,ois Dumont for his work on libstdc++-v3, especially
       maintaining and improving 'debug-mode' and associative and
       unordered containers.
  
--- 62449,62455 ----
       disbursement, configuration architecture, libio maintenance, and
       early math work.
  
!    * François Dumont for his work on libstdc++-v3, especially
       maintaining and improving 'debug-mode' and associative and
       unordered containers.
  
*************** alphabetical order.
*** 62521,62533 ****
  
     * Weiwen Liu for testing and various bug fixes.
  
!    * Manuel Lo'pez-Iba'n~ez for improving '-Wconversion' and many other
       diagnostics fixes and improvements.
  
     * Dave Love for his ongoing work with the Fortran front end and
       runtime libraries.
  
!    * Martin von Lo"wis for internal consistency checking infrastructure,
       various C++ improvements including namespace support, and tons of
       assistance with libstdc++/compiler merges.
  
--- 62708,62720 ----
  
     * Weiwen Liu for testing and various bug fixes.
  
!    * Manuel López-Ibáñez for improving '-Wconversion' and many other
       diagnostics fixes and improvements.
  
     * Dave Love for his ongoing work with the Fortran front end and
       runtime libraries.
  
!    * Martin von Löwis for internal consistency checking infrastructure,
       various C++ improvements including namespace support, and tons of
       assistance with libstdc++/compiler merges.
  
*************** alphabetical order.
*** 62719,62725 ****
  
     * Craig Rodrigues for processing tons of bug reports.
  
!    * Ola Ro"nnerup for work on mt_alloc.
  
     * Gavin Romig-Koch for lots of behind the scenes MIPS work.
  
--- 62906,62912 ----
  
     * Craig Rodrigues for processing tons of bug reports.
  
!    * Ola Rönnerup for work on mt_alloc.
  
     * Gavin Romig-Koch for lots of behind the scenes MIPS work.
  
*************** alphabetical order.
*** 62733,62739 ****
  
     * Paul Rubin wrote most of the preprocessor.
  
!    * Pe'tur Runo'lfsson for major performance improvements in C++
       formatted I/O and large file support in C++ filebuf.
  
     * Chip Salzenberg for libstdc++ patches and improvements to locales,
--- 62920,62926 ----
  
     * Paul Rubin wrote most of the preprocessor.
  
!    * Pétur Runólfsson for major performance improvements in C++
       formatted I/O and large file support in C++ filebuf.
  
     * Chip Salzenberg for libstdc++ patches and improvements to locales,
*************** alphabetical order.
*** 62754,62760 ****
  
     * William Schelter did most of the work on the Intel 80386 support.
  
!    * Tobias Schlu"ter for work on GNU Fortran.
  
     * Bernd Schmidt for various code generation improvements and major
       work in the reload pass, serving as release manager for GCC 2.95.3,
--- 62941,62947 ----
  
     * William Schelter did most of the work on the Intel 80386 support.
  
!    * Tobias Schlüter for work on GNU Fortran.
  
     * Bernd Schmidt for various code generation improvements and major
       work in the reload pass, serving as release manager for GCC 2.95.3,
*************** contributions to testing:
*** 63251,63257 ****
  
     * Robert A. French
  
!    * Jo"rgen Freyh
  
     * Mark K. Gardner
  
--- 63438,63444 ----
  
     * Robert A. French
  
!    * Jörgen Freyh
  
     * Mark K. Gardner
  
*************** look up both forms.
*** 63399,63433 ****
  * 80387:                                 x86 Options.        (line  603)
  * A:                                     Preprocessor Options.
                                                               (line  337)
! * allowable_client:                      Darwin Options.     (line  196)
! * all_load:                              Darwin Options.     (line  110)
  * analyzer:                              Static Analyzer Options.
                                                               (line    7)
  * ansi:                                  Standards.          (line   13)
  * ansi <1>:                              C Dialect Options.  (line   11)
  * ansi <2>:                              Other Builtins.     (line   31)
  * ansi <3>:                              Non-bugs.           (line  107)
! * arch_errors_fatal:                     Darwin Options.     (line  114)
  * aux-info:                              C Dialect Options.  (line  202)
  * B:                                     Directory Options.  (line  122)
  * Bdynamic:                              VxWorks Options.    (line   22)
! * bind_at_load:                          Darwin Options.     (line  118)
  * block-ops-unaligned-vsx:               RS/6000 and PowerPC Options.
                                                               (line  959)
  * Bstatic:                               VxWorks Options.    (line   22)
! * bundle:                                Darwin Options.     (line  123)
! * bundle_loader:                         Darwin Options.     (line  127)
  * c:                                     Overall Options.    (line  165)
  * C:                                     Preprocessor Options.
                                                               (line  346)
  * c <1>:                                 Link Options.       (line   20)
  * CC:                                    Preprocessor Options.
                                                               (line  358)
! * client_name:                           Darwin Options.     (line  196)
! * compatibility_version:                 Darwin Options.     (line  196)
  * coverage:                              Instrumentation Options.
                                                               (line   56)
! * current_version:                       Darwin Options.     (line  196)
  * D:                                     Preprocessor Options.
                                                               (line   19)
  * d:                                     Preprocessor Options.
--- 63586,63620 ----
  * 80387:                                 x86 Options.        (line  603)
  * A:                                     Preprocessor Options.
                                                               (line  337)
! * allowable_client:                      Darwin Options.     (line  204)
! * all_load:                              Darwin Options.     (line  118)
  * analyzer:                              Static Analyzer Options.
                                                               (line    7)
  * ansi:                                  Standards.          (line   13)
  * ansi <1>:                              C Dialect Options.  (line   11)
  * ansi <2>:                              Other Builtins.     (line   31)
  * ansi <3>:                              Non-bugs.           (line  107)
! * arch_errors_fatal:                     Darwin Options.     (line  122)
  * aux-info:                              C Dialect Options.  (line  202)
  * B:                                     Directory Options.  (line  122)
  * Bdynamic:                              VxWorks Options.    (line   22)
! * bind_at_load:                          Darwin Options.     (line  126)
  * block-ops-unaligned-vsx:               RS/6000 and PowerPC Options.
                                                               (line  959)
  * Bstatic:                               VxWorks Options.    (line   22)
! * bundle:                                Darwin Options.     (line  131)
! * bundle_loader:                         Darwin Options.     (line  135)
  * c:                                     Overall Options.    (line  165)
  * C:                                     Preprocessor Options.
                                                               (line  346)
  * c <1>:                                 Link Options.       (line   20)
  * CC:                                    Preprocessor Options.
                                                               (line  358)
! * client_name:                           Darwin Options.     (line  204)
! * compatibility_version:                 Darwin Options.     (line  204)
  * coverage:                              Instrumentation Options.
                                                               (line   56)
! * current_version:                       Darwin Options.     (line  204)
  * D:                                     Preprocessor Options.
                                                               (line   19)
  * d:                                     Preprocessor Options.
*************** look up both forms.
*** 63438,63445 ****
  * dD:                                    Preprocessor Options.
                                                               (line  436)
  * dD <1>:                                Developer Options.  (line  253)
! * dead_strip:                            Darwin Options.     (line  196)
! * dependency-file:                       Darwin Options.     (line  196)
  * dH:                                    Developer Options.  (line  257)
  * dI:                                    Preprocessor Options.
                                                               (line  446)
--- 63625,63632 ----
  * dD:                                    Preprocessor Options.
                                                               (line  436)
  * dD <1>:                                Developer Options.  (line  253)
! * dead_strip:                            Darwin Options.     (line  204)
! * dependency-file:                       Darwin Options.     (line  204)
  * dH:                                    Developer Options.  (line  257)
  * dI:                                    Preprocessor Options.
                                                               (line  446)
*************** look up both forms.
*** 63467,63487 ****
  * dumpspecs:                             Developer Options.  (line 1019)
  * dumpversion:                           Developer Options.  (line 1006)
  * dx:                                    Developer Options.  (line  269)
! * dylib_file:                            Darwin Options.     (line  196)
! * dylinker_install_name:                 Darwin Options.     (line  196)
! * dynamic:                               Darwin Options.     (line  196)
! * dynamiclib:                            Darwin Options.     (line  131)
  * E:                                     Overall Options.    (line  186)
  * E <1>:                                 Link Options.       (line   20)
  * e:                                     Link Options.       (line  172)
! * EB:                                    ARC Options.        (line  590)
  * EB <1>:                                C-SKY Options.      (line   29)
  * EB <2>:                                MIPS Options.       (line    7)
! * EL:                                    ARC Options.        (line  599)
  * EL <1>:                                C-SKY Options.      (line   31)
  * EL <2>:                                MIPS Options.       (line   10)
  * entry:                                 Link Options.       (line  172)
! * exported_symbols_list:                 Darwin Options.     (line  196)
  * F:                                     Darwin Options.     (line   31)
  * fabi-compat-version:                   C++ Dialect Options.
                                                               (line   92)
--- 63654,63674 ----
  * dumpspecs:                             Developer Options.  (line 1019)
  * dumpversion:                           Developer Options.  (line 1006)
  * dx:                                    Developer Options.  (line  269)
! * dylib_file:                            Darwin Options.     (line  204)
! * dylinker_install_name:                 Darwin Options.     (line  204)
! * dynamic:                               Darwin Options.     (line  204)
! * dynamiclib:                            Darwin Options.     (line  139)
  * E:                                     Overall Options.    (line  186)
  * E <1>:                                 Link Options.       (line   20)
  * e:                                     Link Options.       (line  172)
! * EB:                                    ARC Options.        (line  588)
  * EB <1>:                                C-SKY Options.      (line   29)
  * EB <2>:                                MIPS Options.       (line    7)
! * EL:                                    ARC Options.        (line  595)
  * EL <1>:                                C-SKY Options.      (line   31)
  * EL <2>:                                MIPS Options.       (line   10)
  * entry:                                 Link Options.       (line  172)
! * exported_symbols_list:                 Darwin Options.     (line  204)
  * F:                                     Darwin Options.     (line   31)
  * fabi-compat-version:                   C++ Dialect Options.
                                                               (line   92)
*************** look up both forms.
*** 63554,63559 ****
--- 63741,63747 ----
                                                               (line  176)
  * fcond-mismatch:                        C Dialect Options.  (line  273)
  * fconserve-stack:                       Optimize Options.   (line  965)
+ * fconstant-cfstrings:                   Darwin Options.     (line   71)
  * fconstant-string-class:                Objective-C and Objective-C++ Dialect Options.
                                                               (line   30)
  * fconstexpr-cache-depth:                C++ Dialect Options.
*************** look up both forms.
*** 63767,63773 ****
  * ffile-prefix-map:                      Overall Options.    (line  630)
  * ffinite-loops:                         Optimize Options.   (line 1222)
  * ffinite-math-only:                     Optimize Options.   (line 2400)
! * ffix-and-continue:                     Darwin Options.     (line  104)
  * ffixed:                                Code Gen Options.   (line  429)
  * ffloat-store:                          Optimize Options.   (line 2285)
  * ffloat-store <1>:                      Disappointments.    (line   77)
--- 63955,63961 ----
  * ffile-prefix-map:                      Overall Options.    (line  630)
  * ffinite-loops:                         Optimize Options.   (line 1222)
  * ffinite-math-only:                     Optimize Options.   (line 2400)
! * ffix-and-continue:                     Darwin Options.     (line  112)
  * ffixed:                                Code Gen Options.   (line  429)
  * ffloat-store:                          Optimize Options.   (line 2285)
  * ffloat-store <1>:                      Disappointments.    (line   77)
*************** look up both forms.
*** 63792,63798 ****
  * fgnu-keywords:                         C++ Dialect Options.
                                                               (line  279)
  * fgnu-runtime:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line   39)
  * fgnu-tm:                               C Dialect Options.  (line  295)
  * fgnu-unique:                           Code Gen Options.   (line  165)
  * fgnu89-inline:                         C Dialect Options.  (line  310)
--- 63980,63986 ----
  * fgnu-keywords:                         C++ Dialect Options.
                                                               (line  279)
  * fgnu-runtime:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line   42)
  * fgnu-tm:                               C Dialect Options.  (line  295)
  * fgnu-unique:                           Code Gen Options.   (line  165)
  * fgnu89-inline:                         C Dialect Options.  (line  310)
*************** look up both forms.
*** 63808,63814 ****
  * fif-conversion:                        Optimize Options.   (line  590)
  * fif-conversion2:                       Optimize Options.   (line  599)
  * fiji:                                  AMD GCN Options.    (line   13)
! * filelist:                              Darwin Options.     (line  196)
  * fimplement-inlines:                    C++ Dialect Options.
                                                               (line  305)
  * fimplicit-constexpr:                   C++ Dialect Options.
--- 63996,64002 ----
  * fif-conversion:                        Optimize Options.   (line  590)
  * fif-conversion2:                       Optimize Options.   (line  599)
  * fiji:                                  AMD GCN Options.    (line   13)
! * filelist:                              Darwin Options.     (line  204)
  * fimplement-inlines:                    C++ Dialect Options.
                                                               (line  305)
  * fimplicit-constexpr:                   C++ Dialect Options.
*************** look up both forms.
*** 63817,63823 ****
                                                               (line  299)
  * fimplicit-templates:                   C++ Dialect Options.
                                                               (line  291)
! * findirect-data:                        Darwin Options.     (line  104)
  * findirect-inlining:                    Optimize Options.   (line  300)
  * finhibit-size-directive:               Code Gen Options.   (line  258)
  * finline:                               Optimize Options.   (line  283)
--- 64005,64011 ----
                                                               (line  299)
  * fimplicit-templates:                   C++ Dialect Options.
                                                               (line  291)
! * findirect-data:                        Darwin Options.     (line  112)
  * findirect-inlining:                    Optimize Options.   (line  300)
  * finhibit-size-directive:               Code Gen Options.   (line  258)
  * finline:                               Optimize Options.   (line  283)
*************** look up both forms.
*** 63860,63866 ****
  * fisolate-erroneous-paths-attribute:    Optimize Options.   (line 1164)
  * fisolate-erroneous-paths-dereference:  Optimize Options.   (line 1156)
  * fivar-visibility:                      Objective-C and Objective-C++ Dialect Options.
!                                                              (line  161)
  * fivopts:                               Optimize Options.   (line 1389)
  * fjump-tables:                          Code Gen Options.   (line  417)
  * fkeep-inline-dllexport:                Optimize Options.   (line  369)
--- 64048,64054 ----
  * fisolate-erroneous-paths-attribute:    Optimize Options.   (line 1164)
  * fisolate-erroneous-paths-dereference:  Optimize Options.   (line 1156)
  * fivar-visibility:                      Objective-C and Objective-C++ Dialect Options.
!                                                              (line  164)
  * fivopts:                               Optimize Options.   (line 1389)
  * fjump-tables:                          Code Gen Options.   (line  417)
  * fkeep-inline-dllexport:                Optimize Options.   (line  369)
*************** look up both forms.
*** 63876,63882 ****
                                                               (line  571)
  * flarge-source-files:                   Preprocessor Options.
                                                               (line  497)
! * flat_namespace:                        Darwin Options.     (line  196)
  * flax-vector-conversions:               C Dialect Options.  (line  335)
  * fleading-underscore:                   Code Gen Options.   (line  485)
  * flifetime-dse:                         Optimize Options.   (line  675)
--- 64064,64070 ----
                                                               (line  571)
  * flarge-source-files:                   Preprocessor Options.
                                                               (line  497)
! * flat_namespace:                        Darwin Options.     (line  204)
  * flax-vector-conversions:               C Dialect Options.  (line  335)
  * fleading-underscore:                   Code Gen Options.   (line  485)
  * flifetime-dse:                         Optimize Options.   (line  675)
*************** look up both forms.
*** 63884,63890 ****
  * flive-patching:                        Optimize Options.   (line 1096)
  * flive-range-shrinkage:                 Optimize Options.   (line  690)
  * flocal-ivars:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line  152)
  * floop-block:                           Optimize Options.   (line 1258)
  * floop-interchange:                     Optimize Options.   (line 1342)
  * floop-nest-optimize:                   Optimize Options.   (line 1272)
--- 64072,64078 ----
  * flive-patching:                        Optimize Options.   (line 1096)
  * flive-range-shrinkage:                 Optimize Options.   (line  690)
  * flocal-ivars:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line  155)
  * floop-block:                           Optimize Options.   (line 1258)
  * floop-interchange:                     Optimize Options.   (line 1342)
  * floop-nest-optimize:                   Optimize Options.   (line 1272)
*************** look up both forms.
*** 63935,63943 ****
  * fnew-ttp-matching:                     C++ Dialect Options.
                                                               (line  360)
  * fnext-runtime:                         Objective-C and Objective-C++ Dialect Options.
!                                                              (line   43)
  * fnil-receivers:                        Objective-C and Objective-C++ Dialect Options.
!                                                              (line   49)
  * fno-access-control:                    C++ Dialect Options.
                                                               (line  108)
  * fno-allocation-dce:                    Optimize Options.   (line 1833)
--- 64123,64131 ----
  * fnew-ttp-matching:                     C++ Dialect Options.
                                                               (line  360)
  * fnext-runtime:                         Objective-C and Objective-C++ Dialect Options.
!                                                              (line   46)
  * fnil-receivers:                        Objective-C and Objective-C++ Dialect Options.
!                                                              (line   52)
  * fno-access-control:                    C++ Dialect Options.
                                                               (line  108)
  * fno-allocation-dce:                    Optimize Options.   (line 1833)
*************** look up both forms.
*** 64026,64032 ****
  * fno-keep-inline-dllexport:             Optimize Options.   (line  369)
  * fno-lifetime-dse:                      Optimize Options.   (line  675)
  * fno-local-ivars:                       Objective-C and Objective-C++ Dialect Options.
!                                                              (line  152)
  * fno-math-errno:                        Optimize Options.   (line 2337)
  * fno-merge-debug-strings:               Debugging Options.  (line  166)
  * fno-module-lazy:                       C++ Dialect Options.
--- 64214,64220 ----
  * fno-keep-inline-dllexport:             Optimize Options.   (line  369)
  * fno-lifetime-dse:                      Optimize Options.   (line  675)
  * fno-local-ivars:                       Objective-C and Objective-C++ Dialect Options.
!                                                              (line  155)
  * fno-math-errno:                        Optimize Options.   (line 2337)
  * fno-merge-debug-strings:               Debugging Options.  (line  166)
  * fno-module-lazy:                       C++ Dialect Options.
*************** look up both forms.
*** 64034,64040 ****
  * fno-modules-ts:                        C++ Dialect Options.
                                                               (line  311)
  * fno-nil-receivers:                     Objective-C and Objective-C++ Dialect Options.
!                                                              (line   49)
  * fno-nonansi-builtins:                  C++ Dialect Options.
                                                               (line  367)
  * fno-operator-names:                    C++ Dialect Options.
--- 64222,64228 ----
  * fno-modules-ts:                        C++ Dialect Options.
                                                               (line  311)
  * fno-nil-receivers:                     Objective-C and Objective-C++ Dialect Options.
!                                                              (line   52)
  * fno-nonansi-builtins:                  C++ Dialect Options.
                                                               (line  367)
  * fno-operator-names:                    C++ Dialect Options.
*************** look up both forms.
*** 64059,64065 ****
                                                               (line   46)
  * fno-show-column:                       Diagnostic Message Formatting Options.
                                                               (line  408)
! * fno-signed-bitfields:                  C Dialect Options.  (line  451)
  * fno-signed-zeros:                      Optimize Options.   (line 2412)
  * fno-stack-limit:                       Instrumentation Options.
                                                               (line  823)
--- 64247,64253 ----
                                                               (line   46)
  * fno-show-column:                       Diagnostic Message Formatting Options.
                                                               (line  408)
! * fno-signed-bitfields:                  C Dialect Options.  (line  449)
  * fno-signed-zeros:                      Optimize Options.   (line 2412)
  * fno-stack-limit:                       Instrumentation Options.
                                                               (line  823)
*************** look up both forms.
*** 64067,64073 ****
                                                               (line  464)
  * fno-toplevel-reorder:                  Optimize Options.   (line 1859)
  * fno-trapping-math:                     Optimize Options.   (line 2422)
! * fno-unsigned-bitfields:                C Dialect Options.  (line  451)
  * fno-use-cxa-get-exception-ptr:         C++ Dialect Options.
                                                               (line  477)
  * fno-var-tracking-assignments:          Debugging Options.  (line  193)
--- 64255,64261 ----
                                                               (line  464)
  * fno-toplevel-reorder:                  Optimize Options.   (line 1859)
  * fno-trapping-math:                     Optimize Options.   (line 2422)
! * fno-unsigned-bitfields:                C Dialect Options.  (line  449)
  * fno-use-cxa-get-exception-ptr:         C++ Dialect Options.
                                                               (line  477)
  * fno-var-tracking-assignments:          Debugging Options.  (line  193)
*************** look up both forms.
*** 64085,64110 ****
  * fnothrow-opt:                          C++ Dialect Options.
                                                               (line  372)
  * fobjc-abi-version:                     Objective-C and Objective-C++ Dialect Options.
!                                                              (line   56)
  * fobjc-call-cxx-cdtors:                 Objective-C and Objective-C++ Dialect Options.
!                                                              (line   67)
  * fobjc-direct-dispatch:                 Objective-C and Objective-C++ Dialect Options.
!                                                              (line   92)
  * fobjc-exceptions:                      Objective-C and Objective-C++ Dialect Options.
!                                                              (line   96)
  * fobjc-gc:                              Objective-C and Objective-C++ Dialect Options.
!                                                              (line  104)
  * fobjc-nilcheck:                        Objective-C and Objective-C++ Dialect Options.
!                                                              (line  110)
  * fobjc-std:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  119)
  * foffload:                              C Dialect Options.  (line  360)
  * foffload-options:                      C Dialect Options.  (line  373)
  * fomit-frame-pointer:                   Optimize Options.   (line  256)
  * fopenacc:                              C Dialect Options.  (line  388)
! * fopenacc-dim:                          C Dialect Options.  (line  397)
! * fopenmp:                               C Dialect Options.  (line  403)
! * fopenmp-simd:                          C Dialect Options.  (line  412)
  * foperator-names:                       C++ Dialect Options.
                                                               (line  383)
  * fopt-info:                             Developer Options.  (line  487)
--- 64273,64298 ----
  * fnothrow-opt:                          C++ Dialect Options.
                                                               (line  372)
  * fobjc-abi-version:                     Objective-C and Objective-C++ Dialect Options.
!                                                              (line   59)
  * fobjc-call-cxx-cdtors:                 Objective-C and Objective-C++ Dialect Options.
!                                                              (line   70)
  * fobjc-direct-dispatch:                 Objective-C and Objective-C++ Dialect Options.
!                                                              (line   95)
  * fobjc-exceptions:                      Objective-C and Objective-C++ Dialect Options.
!                                                              (line   99)
  * fobjc-gc:                              Objective-C and Objective-C++ Dialect Options.
!                                                              (line  107)
  * fobjc-nilcheck:                        Objective-C and Objective-C++ Dialect Options.
!                                                              (line  113)
  * fobjc-std:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  122)
  * foffload:                              C Dialect Options.  (line  360)
  * foffload-options:                      C Dialect Options.  (line  373)
  * fomit-frame-pointer:                   Optimize Options.   (line  256)
  * fopenacc:                              C Dialect Options.  (line  388)
! * fopenacc-dim:                          C Dialect Options.  (line  396)
! * fopenmp:                               C Dialect Options.  (line  402)
! * fopenmp-simd:                          C Dialect Options.  (line  410)
  * foperator-names:                       C++ Dialect Options.
                                                               (line  383)
  * fopt-info:                             Developer Options.  (line  487)
*************** look up both forms.
*** 64112,64119 ****
  * foptimize-strlen:                      Optimize Options.   (line  276)
  * foptional-diags:                       C++ Dialect Options.
                                                               (line  387)
! * force_cpusubtype_ALL:                  Darwin Options.     (line  135)
! * force_flat_namespace:                  Darwin Options.     (line  196)
  * fpack-struct:                          Code Gen Options.   (line  472)
  * fpartial-inlining:                     Optimize Options.   (line 1548)
  * fpatchable-function-entry:             Instrumentation Options.
--- 64300,64307 ----
  * foptimize-strlen:                      Optimize Options.   (line  276)
  * foptional-diags:                       C++ Dialect Options.
                                                               (line  387)
! * force_cpusubtype_ALL:                  Darwin Options.     (line  143)
! * force_flat_namespace:                  Darwin Options.     (line  204)
  * fpack-struct:                          Code Gen Options.   (line  472)
  * fpartial-inlining:                     Optimize Options.   (line 1548)
  * fpatchable-function-entry:             Instrumentation Options.
*************** look up both forms.
*** 64129,64142 ****
  * fpeephole2:                            Optimize Options.   (line 1596)
  * fpermissive:                           C++ Dialect Options.
                                                               (line  392)
! * fpermitted-flt-eval-methods:           C Dialect Options.  (line  416)
! * fpermitted-flt-eval-methods=c11:       C Dialect Options.  (line  416)
! * fpermitted-flt-eval-methods=ts-18661-3: C Dialect Options. (line  416)
  * fpic:                                  Code Gen Options.   (line  356)
  * fPIC:                                  Code Gen Options.   (line  377)
  * fpie:                                  Code Gen Options.   (line  390)
  * fPIE:                                  Code Gen Options.   (line  390)
! * fplan9-extensions:                     C Dialect Options.  (line  438)
  * fplan9-extensions <1>:                 Unnamed Fields.     (line   43)
  * fplt:                                  Code Gen Options.   (line  399)
  * fplugin:                               Overall Options.    (line  639)
--- 64317,64330 ----
  * fpeephole2:                            Optimize Options.   (line 1596)
  * fpermissive:                           C++ Dialect Options.
                                                               (line  392)
! * fpermitted-flt-eval-methods:           C Dialect Options.  (line  414)
! * fpermitted-flt-eval-methods=c11:       C Dialect Options.  (line  414)
! * fpermitted-flt-eval-methods=ts-18661-3: C Dialect Options. (line  414)
  * fpic:                                  Code Gen Options.   (line  356)
  * fPIC:                                  Code Gen Options.   (line  377)
  * fpie:                                  Code Gen Options.   (line  390)
  * fPIE:                                  Code Gen Options.   (line  390)
! * fplan9-extensions:                     C Dialect Options.  (line  436)
  * fplan9-extensions <1>:                 Unnamed Fields.     (line   43)
  * fplt:                                  Code Gen Options.   (line  399)
  * fplugin:                               Overall Options.    (line  639)
*************** look up both forms.
*** 64193,64199 ****
  * freorder-blocks-and-partition:         Optimize Options.   (line 1643)
  * freorder-functions:                    Optimize Options.   (line 1660)
  * freplace-objc-classes:                 Objective-C and Objective-C++ Dialect Options.
!                                                              (line  130)
  * freport-bug:                           Developer Options.  (line  287)
  * frerun-cse-after-loop:                 Optimize Options.   (line  505)
  * freschedule-modulo-scheduled-loops:    Optimize Options.   (line  883)
--- 64381,64387 ----
  * freorder-blocks-and-partition:         Optimize Options.   (line 1643)
  * freorder-functions:                    Optimize Options.   (line 1660)
  * freplace-objc-classes:                 Objective-C and Objective-C++ Dialect Options.
!                                                              (line  133)
  * freport-bug:                           Developer Options.  (line  287)
  * frerun-cse-after-loop:                 Optimize Options.   (line  505)
  * freschedule-modulo-scheduled-loops:    Optimize Options.   (line  883)
*************** look up both forms.
*** 64315,64323 ****
  * fshrink-wrap:                          Optimize Options.   (line  923)
  * fshrink-wrap-separate:                 Optimize Options.   (line  928)
  * fsignaling-nans:                       Optimize Options.   (line 2457)
! * fsigned-bitfields:                     C Dialect Options.  (line  451)
  * fsigned-bitfields <1>:                 Non-bugs.           (line   57)
! * fsigned-char:                          C Dialect Options.  (line  457)
  * fsigned-char <1>:                      Characters implementation.
                                                               (line   31)
  * fsigned-zeros:                         Optimize Options.   (line 2412)
--- 64503,64511 ----
  * fshrink-wrap:                          Optimize Options.   (line  923)
  * fshrink-wrap-separate:                 Optimize Options.   (line  928)
  * fsignaling-nans:                       Optimize Options.   (line 2457)
! * fsigned-bitfields:                     C Dialect Options.  (line  449)
  * fsigned-bitfields <1>:                 Non-bugs.           (line   57)
! * fsigned-char:                          C Dialect Options.  (line  455)
  * fsigned-char <1>:                      Characters implementation.
                                                               (line   31)
  * fsigned-zeros:                         Optimize Options.   (line 2412)
*************** look up both forms.
*** 64336,64342 ****
  * fsplit-wide-types-early:               Optimize Options.   (line  482)
  * fssa-backprop:                         Optimize Options.   (line 1188)
  * fssa-phiopt:                           Optimize Options.   (line 1194)
! * fsso-struct:                           C Dialect Options.  (line  482)
  * fstack-check:                          Instrumentation Options.
                                                               (line  766)
  * fstack-clash-protection:               Instrumentation Options.
--- 64524,64530 ----
  * fsplit-wide-types-early:               Optimize Options.   (line  482)
  * fssa-backprop:                         Optimize Options.   (line 1188)
  * fssa-phiopt:                           Optimize Options.   (line 1194)
! * fsso-struct:                           C Dialect Options.  (line  480)
  * fstack-check:                          Instrumentation Options.
                                                               (line  766)
  * fstack-clash-protection:               Instrumentation Options.
*************** look up both forms.
*** 64362,64371 ****
  * fstrict-enums:                         C++ Dialect Options.
                                                               (line  434)
  * fstrict-overflow:                      Code Gen Options.   (line  115)
! * fstrict-volatile-bitfields:            Code Gen Options.   (line  601)
  * fstrong-eval-order:                    C++ Dialect Options.
                                                               (line  443)
! * fsync-libcalls:                        Code Gen Options.   (line  633)
  * fsyntax-only:                          Warning Options.    (line   14)
  * ftabstop:                              Preprocessor Options.
                                                               (line  241)
--- 64550,64559 ----
  * fstrict-enums:                         C++ Dialect Options.
                                                               (line  434)
  * fstrict-overflow:                      Code Gen Options.   (line  115)
! * fstrict-volatile-bitfields:            Code Gen Options.   (line  600)
  * fstrong-eval-order:                    C++ Dialect Options.
                                                               (line  443)
! * fsync-libcalls:                        Code Gen Options.   (line  632)
  * fsyntax-only:                          Warning Options.    (line   14)
  * ftabstop:                              Preprocessor Options.
                                                               (line  241)
*************** look up both forms.
*** 64429,64439 ****
  * funroll-all-loops:                     Optimize Options.   (line 2604)
  * funroll-loops:                         Optimize Options.   (line 2594)
  * funsafe-math-optimizations:            Optimize Options.   (line 2355)
! * funsigned-bitfields:                   C Dialect Options.  (line  451)
  * funsigned-bitfields <1>:               Structures unions enumerations and bit-fields implementation.
                                                               (line   17)
  * funsigned-bitfields <2>:               Non-bugs.           (line   57)
! * funsigned-char:                        C Dialect Options.  (line  464)
  * funsigned-char <1>:                    Characters implementation.
                                                               (line   31)
  * funswitch-loops:                       Optimize Options.   (line 2636)
--- 64617,64627 ----
  * funroll-all-loops:                     Optimize Options.   (line 2604)
  * funroll-loops:                         Optimize Options.   (line 2594)
  * funsafe-math-optimizations:            Optimize Options.   (line 2355)
! * funsigned-bitfields:                   C Dialect Options.  (line  449)
  * funsigned-bitfields <1>:               Structures unions enumerations and bit-fields implementation.
                                                               (line   17)
  * funsigned-bitfields <2>:               Non-bugs.           (line   57)
! * funsigned-char:                        C Dialect Options.  (line  462)
  * funsigned-char <1>:                    Characters implementation.
                                                               (line   31)
  * funswitch-loops:                       Optimize Options.   (line 2636)
*************** look up both forms.
*** 64481,64489 ****
  * fzero-call-used-regs:                  Optimize Options.   (line 2723)
  * fzero-initialized-in-bss:              Optimize Options.   (line  453)
  * fzero-link:                            Objective-C and Objective-C++ Dialect Options.
!                                                              (line  140)
  * g:                                     Debugging Options.  (line   28)
! * G:                                     ARC Options.        (line  416)
  * G <1>:                                 M32R/D Options.     (line   57)
  * G <2>:                                 MIPS Options.       (line  460)
  * G <3>:                                 Nios II Options.    (line    9)
--- 64669,64677 ----
  * fzero-call-used-regs:                  Optimize Options.   (line 2723)
  * fzero-initialized-in-bss:              Optimize Options.   (line  453)
  * fzero-link:                            Objective-C and Objective-C++ Dialect Options.
!                                                              (line  143)
  * g:                                     Debugging Options.  (line   28)
! * G:                                     ARC Options.        (line  414)
  * G <1>:                                 M32R/D Options.     (line   57)
  * G <2>:                                 MIPS Options.       (line  460)
  * G <3>:                                 Nios II Options.    (line    9)
*************** look up both forms.
*** 64500,64506 ****
  * gdwarf32:                              Debugging Options.  (line  212)
  * gdwarf64:                              Debugging Options.  (line  212)
  * gen-decls:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  166)
  * gfull:                                 Darwin Options.     (line   69)
  * ggdb:                                  Debugging Options.  (line   41)
  * ggnu-pubnames:                         Debugging Options.  (line  230)
--- 64688,64694 ----
  * gdwarf32:                              Debugging Options.  (line  212)
  * gdwarf64:                              Debugging Options.  (line  212)
  * gen-decls:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  169)
  * gfull:                                 Darwin Options.     (line   69)
  * ggdb:                                  Debugging Options.  (line   41)
  * ggnu-pubnames:                         Debugging Options.  (line  230)
*************** look up both forms.
*** 64531,64537 ****
  * gz:                                    Debugging Options.  (line  360)
  * H:                                     Preprocessor Options.
                                                               (line  405)
! * headerpad_max_install_names:           Darwin Options.     (line  196)
  * help:                                  Overall Options.    (line  478)
  * I:                                     Directory Options.  (line   13)
  * I-:                                    Directory Options.  (line   65)
--- 64719,64725 ----
  * gz:                                    Debugging Options.  (line  360)
  * H:                                     Preprocessor Options.
                                                               (line  405)
! * headerpad_max_install_names:           Darwin Options.     (line  204)
  * help:                                  Overall Options.    (line  478)
  * I:                                     Directory Options.  (line   13)
  * I-:                                    Directory Options.  (line   65)
*************** look up both forms.
*** 64539,64550 ****
  * iframework:                            Darwin Options.     (line   57)
  * imacros:                               Preprocessor Options.
                                                               (line   57)
! * image_base:                            Darwin Options.     (line  196)
  * imultilib:                             Directory Options.  (line   98)
  * include:                               Preprocessor Options.
                                                               (line   46)
! * init:                                  Darwin Options.     (line  196)
! * install_name:                          Darwin Options.     (line  196)
  * iplugindir=:                           Directory Options.  (line  113)
  * iprefix:                               Directory Options.  (line   80)
  * iquote:                                Directory Options.  (line   13)
--- 64727,64738 ----
  * iframework:                            Darwin Options.     (line   57)
  * imacros:                               Preprocessor Options.
                                                               (line   57)
! * image_base:                            Darwin Options.     (line  204)
  * imultilib:                             Directory Options.  (line   98)
  * include:                               Preprocessor Options.
                                                               (line   46)
! * init:                                  Darwin Options.     (line  204)
! * install_name:                          Darwin Options.     (line  204)
  * iplugindir=:                           Directory Options.  (line  113)
  * iprefix:                               Directory Options.  (line   80)
  * iquote:                                Directory Options.  (line   13)
*************** look up both forms.
*** 64552,64558 ****
  * isystem:                               Directory Options.  (line   13)
  * iwithprefix:                           Directory Options.  (line   86)
  * iwithprefixbefore:                     Directory Options.  (line   86)
! * keep_private_externs:                  Darwin Options.     (line  196)
  * l:                                     Link Options.       (line   87)
  * L:                                     Directory Options.  (line  118)
  * lobjc:                                 Link Options.       (line  113)
--- 64740,64746 ----
  * isystem:                               Directory Options.  (line   13)
  * iwithprefix:                           Directory Options.  (line   86)
  * iwithprefixbefore:                     Directory Options.  (line   86)
! * keep_private_externs:                  Darwin Options.     (line  204)
  * l:                                     Link Options.       (line   87)
  * L:                                     Directory Options.  (line  118)
  * lobjc:                                 Link Options.       (line  113)
*************** look up both forms.
*** 64563,64570 ****
  * m1:                                    SH Options.         (line    9)
  * m10:                                   PDP-11 Options.     (line   29)
  * m128bit-long-double:                   x86 Options.        (line  655)
! * m16:                                   x86 Options.        (line 1542)
! * m16-bit:                               CRIS Options.       (line   63)
  * m16-bit <1>:                           NDS32 Options.      (line   51)
  * m1reg-:                                Adapteva Epiphany Options.
                                                               (line  131)
--- 64751,64758 ----
  * m1:                                    SH Options.         (line    9)
  * m10:                                   PDP-11 Options.     (line   29)
  * m128bit-long-double:                   x86 Options.        (line  655)
! * m16:                                   x86 Options.        (line 1551)
! * m16-bit:                               CRIS Options.       (line   62)
  * m16-bit <1>:                           NDS32 Options.      (line   51)
  * m1reg-:                                Adapteva Epiphany Options.
                                                               (line  131)
*************** look up both forms.
*** 64582,64597 ****
  * m32 <1>:                               SPARC Options.      (line  315)
  * m32 <2>:                               TILE-Gx Options.    (line   23)
  * m32 <3>:                               TILEPro Options.    (line   13)
! * m32 <4>:                               x86 Options.        (line 1542)
! * m32-bit:                               CRIS Options.       (line   63)
  * m32bit-doubles:                        RL78 Options.       (line   73)
  * m32bit-doubles <1>:                    RX Options.         (line   10)
  * m32r:                                  M32R/D Options.     (line   15)
  * m32r2:                                 M32R/D Options.     (line    9)
  * m32rx:                                 M32R/D Options.     (line   12)
  * m340:                                  MCore Options.      (line   43)
! * m3dnow:                                x86 Options.        (line  878)
! * m3dnowa:                               x86 Options.        (line  879)
  * m3e:                                   SH Options.         (line   37)
  * m4:                                    SH Options.         (line   51)
  * m4-100:                                SH Options.         (line   54)
--- 64770,64785 ----
  * m32 <1>:                               SPARC Options.      (line  315)
  * m32 <2>:                               TILE-Gx Options.    (line   23)
  * m32 <3>:                               TILEPro Options.    (line   13)
! * m32 <4>:                               x86 Options.        (line 1551)
! * m32-bit:                               CRIS Options.       (line   62)
  * m32bit-doubles:                        RL78 Options.       (line   73)
  * m32bit-doubles <1>:                    RX Options.         (line   10)
  * m32r:                                  M32R/D Options.     (line   15)
  * m32r2:                                 M32R/D Options.     (line    9)
  * m32rx:                                 M32R/D Options.     (line   12)
  * m340:                                  MCore Options.      (line   43)
! * m3dnow:                                x86 Options.        (line  887)
! * m3dnowa:                               x86 Options.        (line  888)
  * m3e:                                   SH Options.         (line   37)
  * m4:                                    SH Options.         (line   51)
  * m4-100:                                SH Options.         (line   54)
*************** look up both forms.
*** 64631,64637 ****
                                                               (line   86)
  * m64 <3>:                               SPARC Options.      (line  315)
  * m64 <4>:                               TILE-Gx Options.    (line   23)
! * m64 <5>:                               x86 Options.        (line 1542)
  * m64bit-doubles:                        RL78 Options.       (line   73)
  * m64bit-doubles <1>:                    RX Options.         (line   10)
  * m68000:                                M680x0 Options.     (line   94)
--- 64819,64825 ----
                                                               (line   86)
  * m64 <3>:                               SPARC Options.      (line  315)
  * m64 <4>:                               TILE-Gx Options.    (line   23)
! * m64 <5>:                               x86 Options.        (line 1551)
  * m64bit-doubles:                        RL78 Options.       (line   73)
  * m64bit-doubles <1>:                    RX Options.         (line   10)
  * m68000:                                M680x0 Options.     (line   94)
*************** look up both forms.
*** 64643,64650 ****
  * m68040:                                M680x0 Options.     (line  118)
  * m68060:                                M680x0 Options.     (line  127)
  * m68881:                                M680x0 Options.     (line  195)
! * m8-bit:                                CRIS Options.       (line   63)
! * m8bit-idiv:                            x86 Options.        (line 1444)
  * m8byte-align:                          V850 Options.       (line  170)
  * m96bit-long-double:                    x86 Options.        (line  655)
  * mA6:                                   ARC Options.        (line   23)
--- 64831,64838 ----
  * m68040:                                M680x0 Options.     (line  118)
  * m68060:                                M680x0 Options.     (line  127)
  * m68881:                                M680x0 Options.     (line  195)
! * m8-bit:                                CRIS Options.       (line   62)
! * m8bit-idiv:                            x86 Options.        (line 1453)
  * m8byte-align:                          V850 Options.       (line  170)
  * m96bit-long-double:                    x86 Options.        (line  655)
  * mA6:                                   ARC Options.        (line   23)
*************** look up both forms.
*** 64656,64662 ****
  * mabi <4>:                              RISC-V Options.     (line   17)
  * mabi <5>:                              RS/6000 and PowerPC Options.
                                                               (line  552)
! * mabi <6>:                              x86 Options.        (line 1137)
  * mabi <7>:                              Xtensa Options.     (line  103)
  * mabi=32:                               MIPS Options.       (line  156)
  * mabi=64:                               MIPS Options.       (line  156)
--- 64844,64850 ----
  * mabi <4>:                              RISC-V Options.     (line   17)
  * mabi <5>:                              RS/6000 and PowerPC Options.
                                                               (line  552)
! * mabi <6>:                              x86 Options.        (line 1146)
  * mabi <7>:                              Xtensa Options.     (line  103)
  * mabi=32:                               MIPS Options.       (line  156)
  * mabi=64:                               MIPS Options.       (line  156)
*************** look up both forms.
*** 64676,64699 ****
  * mabi=o64:                              MIPS Options.       (line  156)
  * mabi=windowed:                         Xtensa Options.     (line  115)
  * mabicalls:                             MIPS Options.       (line  192)
! * mabm:                                  x86 Options.        (line  881)
  * mabort-on-noreturn:                    ARM Options.        (line  752)
  * mabs=2008:                             MIPS Options.       (line  300)
  * mabs=legacy:                           MIPS Options.       (line  300)
! * mabsdata:                              AVR Options.        (line  163)
  * mabsdiff:                              MeP Options.        (line    7)
  * mac0:                                  PDP-11 Options.     (line   16)
  * macc-4:                                FRV Options.        (line  139)
  * macc-8:                                FRV Options.        (line  143)
! * maccumulate-args:                      AVR Options.        (line  170)
  * maccumulate-outgoing-args:             SH Options.         (line  314)
! * maccumulate-outgoing-args <1>:         x86 Options.        (line 1181)
! * maddress-mode=long:                    x86 Options.        (line 1592)
! * maddress-mode=short:                   x86 Options.        (line 1597)
  * mads:                                  RS/6000 and PowerPC Options.
                                                               (line  614)
! * madx:                                  x86 Options.        (line  882)
! * maes:                                  x86 Options.        (line  859)
  * maix-struct-return:                    RS/6000 and PowerPC Options.
                                                               (line  545)
  * maix32:                                RS/6000 and PowerPC Options.
--- 64864,64887 ----
  * mabi=o64:                              MIPS Options.       (line  156)
  * mabi=windowed:                         Xtensa Options.     (line  115)
  * mabicalls:                             MIPS Options.       (line  192)
! * mabm:                                  x86 Options.        (line  890)
  * mabort-on-noreturn:                    ARM Options.        (line  752)
  * mabs=2008:                             MIPS Options.       (line  300)
  * mabs=legacy:                           MIPS Options.       (line  300)
! * mabsdata:                              AVR Options.        (line  180)
  * mabsdiff:                              MeP Options.        (line    7)
  * mac0:                                  PDP-11 Options.     (line   16)
  * macc-4:                                FRV Options.        (line  139)
  * macc-8:                                FRV Options.        (line  143)
! * maccumulate-args:                      AVR Options.        (line  187)
  * maccumulate-outgoing-args:             SH Options.         (line  314)
! * maccumulate-outgoing-args <1>:         x86 Options.        (line 1190)
! * maddress-mode=long:                    x86 Options.        (line 1601)
! * maddress-mode=short:                   x86 Options.        (line 1606)
  * mads:                                  RS/6000 and PowerPC Options.
                                                               (line  614)
! * madx:                                  x86 Options.        (line  891)
! * maes:                                  x86 Options.        (line  868)
  * maix-struct-return:                    RS/6000 and PowerPC Options.
                                                               (line  545)
  * maix32:                                RS/6000 and PowerPC Options.
*************** look up both forms.
*** 64701,64707 ****
  * maix64:                                RS/6000 and PowerPC Options.
                                                               (line  283)
  * malign-300:                            H8/300 Options.     (line   41)
! * malign-call:                           ARC Options.        (line  435)
  * malign-data:                           RISC-V Options.     (line  168)
  * malign-data <1>:                       x86 Options.        (line  695)
  * malign-double:                         x86 Options.        (line  640)
--- 64889,64895 ----
  * maix64:                                RS/6000 and PowerPC Options.
                                                               (line  283)
  * malign-300:                            H8/300 Options.     (line   41)
! * malign-call:                           ARC Options.        (line  433)
  * malign-data:                           RISC-V Options.     (line  168)
  * malign-data <1>:                       x86 Options.        (line  695)
  * malign-double:                         x86 Options.        (line  640)
*************** look up both forms.
*** 64712,64718 ****
                                                               (line  321)
  * malign-power:                          RS/6000 and PowerPC Options.
                                                               (line  321)
! * malign-stringops:                      x86 Options.        (line 1317)
  * mall-opts:                             MeP Options.        (line   11)
  * malloc-cc:                             FRV Options.        (line   31)
  * mallow-string-insns:                   RX Options.         (line  150)
--- 64900,64906 ----
                                                               (line  321)
  * malign-power:                          RS/6000 and PowerPC Options.
                                                               (line  321)
! * malign-stringops:                      x86 Options.        (line 1326)
  * mall-opts:                             MeP Options.        (line   11)
  * malloc-cc:                             FRV Options.        (line   31)
  * mallow-string-insns:                   RX Options.         (line  150)
*************** look up both forms.
*** 64723,64731 ****
  * mam33:                                 MN10300 Options.    (line   17)
  * mam33-2:                               MN10300 Options.    (line   24)
  * mam34:                                 MN10300 Options.    (line   27)
! * mamx-bf16:                             x86 Options.        (line  920)
! * mamx-int8:                             x86 Options.        (line  919)
! * mamx-tile:                             x86 Options.        (line  918)
  * manchor:                               C-SKY Options.      (line  126)
  * mandroid:                              GNU/Linux Options.  (line   26)
  * mannotate-align:                       ARC Options.        (line  382)
--- 64911,64919 ----
  * mam33:                                 MN10300 Options.    (line   17)
  * mam33-2:                               MN10300 Options.    (line   24)
  * mam34:                                 MN10300 Options.    (line   27)
! * mamx-bf16:                             x86 Options.        (line  929)
! * mamx-int8:                             x86 Options.        (line  928)
! * mamx-tile:                             x86 Options.        (line  927)
  * manchor:                               C-SKY Options.      (line  126)
  * mandroid:                              GNU/Linux Options.  (line   26)
  * mannotate-align:                       ARC Options.        (line  382)
*************** look up both forms.
*** 64755,64762 ****
  * march <15>:                            x86 Options.        (line    9)
  * march=:                                C-SKY Options.      (line    9)
  * marclinux:                             ARC Options.        (line  388)
! * marclinux_prof:                        ARC Options.        (line  395)
! * margonaut:                             ARC Options.        (line  586)
  * marm:                                  ARM Options.        (line  824)
  * mas100-syntax:                         RX Options.         (line   76)
  * masm-hex:                              MSP430 Options.     (line    9)
--- 64943,64950 ----
  * march <15>:                            x86 Options.        (line    9)
  * march=:                                C-SKY Options.      (line    9)
  * marclinux:                             ARC Options.        (line  388)
! * marclinux_prof:                        ARC Options.        (line  394)
! * margonaut:                             ARC Options.        (line  584)
  * marm:                                  ARM Options.        (line  824)
  * mas100-syntax:                         RX Options.         (line   76)
  * masm-hex:                              MSP430 Options.     (line    9)
*************** look up both forms.
*** 64765,64798 ****
  * matomic:                               ARC Options.        (line  155)
  * matomic-model=MODEL:                   SH Options.         (line  193)
  * mauto-litpools:                        Xtensa Options.     (line   60)
! * mauto-modify-reg:                      ARC Options.        (line  438)
  * mauto-pic:                             IA-64 Options.      (line   50)
  * maverage:                              MeP Options.        (line   16)
  * mavoid-indexed-addresses:              RS/6000 and PowerPC Options.
                                                               (line  360)
! * mavx:                                  x86 Options.        (line  847)
! * mavx2:                                 x86 Options.        (line  848)
! * mavx256-split-unaligned-load:          x86 Options.        (line 1452)
! * mavx256-split-unaligned-store:         x86 Options.        (line 1452)
! * mavx5124fmaps:                         x86 Options.        (line  912)
! * mavx5124vnniw:                         x86 Options.        (line  915)
! * mavx512bf16:                           x86 Options.        (line  898)
! * mavx512bitalg:                         x86 Options.        (line  904)
! * mavx512bw:                             x86 Options.        (line  854)
! * mavx512cd:                             x86 Options.        (line  852)
! * mavx512dq:                             x86 Options.        (line  855)
! * mavx512er:                             x86 Options.        (line  851)
! * mavx512f:                              x86 Options.        (line  849)
! * mavx512fp16:                           x86 Options.        (line  899)
! * mavx512ifma:                           x86 Options.        (line  856)
! * mavx512pf:                             x86 Options.        (line  850)
! * mavx512vbmi:                           x86 Options.        (line  857)
! * mavx512vbmi2:                          x86 Options.        (line  897)
! * mavx512vl:                             x86 Options.        (line  853)
! * mavx512vnni:                           x86 Options.        (line  913)
! * mavx512vp2intersect:                   x86 Options.        (line  911)
! * mavx512vpopcntdq:                      x86 Options.        (line  910)
! * mavxvnni:                              x86 Options.        (line  914)
  * max-vect-align:                        Adapteva Epiphany Options.
                                                               (line  119)
  * mb:                                    SH Options.         (line  126)
--- 64953,64986 ----
  * matomic:                               ARC Options.        (line  155)
  * matomic-model=MODEL:                   SH Options.         (line  193)
  * mauto-litpools:                        Xtensa Options.     (line   60)
! * mauto-modify-reg:                      ARC Options.        (line  436)
  * mauto-pic:                             IA-64 Options.      (line   50)
  * maverage:                              MeP Options.        (line   16)
  * mavoid-indexed-addresses:              RS/6000 and PowerPC Options.
                                                               (line  360)
! * mavx:                                  x86 Options.        (line  856)
! * mavx2:                                 x86 Options.        (line  857)
! * mavx256-split-unaligned-load:          x86 Options.        (line 1461)
! * mavx256-split-unaligned-store:         x86 Options.        (line 1461)
! * mavx5124fmaps:                         x86 Options.        (line  921)
! * mavx5124vnniw:                         x86 Options.        (line  924)
! * mavx512bf16:                           x86 Options.        (line  907)
! * mavx512bitalg:                         x86 Options.        (line  913)
! * mavx512bw:                             x86 Options.        (line  863)
! * mavx512cd:                             x86 Options.        (line  861)
! * mavx512dq:                             x86 Options.        (line  864)
! * mavx512er:                             x86 Options.        (line  860)
! * mavx512f:                              x86 Options.        (line  858)
! * mavx512fp16:                           x86 Options.        (line  908)
! * mavx512ifma:                           x86 Options.        (line  865)
! * mavx512pf:                             x86 Options.        (line  859)
! * mavx512vbmi:                           x86 Options.        (line  866)
! * mavx512vbmi2:                          x86 Options.        (line  906)
! * mavx512vl:                             x86 Options.        (line  862)
! * mavx512vnni:                           x86 Options.        (line  922)
! * mavx512vp2intersect:                   x86 Options.        (line  920)
! * mavx512vpopcntdq:                      x86 Options.        (line  919)
! * mavxvnni:                              x86 Options.        (line  923)
  * max-vect-align:                        Adapteva Epiphany Options.
                                                               (line  119)
  * mb:                                    SH Options.         (line  126)
*************** look up both forms.
*** 64800,64814 ****
                                                               (line   35)
  * mbarrel-shift-enabled:                 LM32 Options.       (line    9)
  * mbarrel-shifter:                       ARC Options.        (line   10)
! * mbarrel_shifter:                       ARC Options.        (line  606)
  * mbase-addresses:                       MMIX Options.       (line   53)
  * mbased=:                               MeP Options.        (line   20)
! * mbbit-peephole:                        ARC Options.        (line  441)
  * mbe8:                                  ARM Options.        (line   72)
  * mbig:                                  RS/6000 and PowerPC Options.
                                                               (line  440)
  * mbig-endian:                           AArch64 Options.    (line   20)
! * mbig-endian <1>:                       ARC Options.        (line  589)
  * mbig-endian <2>:                       ARM Options.        (line   67)
  * mbig-endian <3>:                       C6X Options.        (line   13)
  * mbig-endian <4>:                       C-SKY Options.      (line   28)
--- 64988,65002 ----
                                                               (line   35)
  * mbarrel-shift-enabled:                 LM32 Options.       (line    9)
  * mbarrel-shifter:                       ARC Options.        (line   10)
! * mbarrel_shifter:                       ARC Options.        (line  601)
  * mbase-addresses:                       MMIX Options.       (line   53)
  * mbased=:                               MeP Options.        (line   20)
! * mbbit-peephole:                        ARC Options.        (line  439)
  * mbe8:                                  ARM Options.        (line   72)
  * mbig:                                  RS/6000 and PowerPC Options.
                                                               (line  440)
  * mbig-endian:                           AArch64 Options.    (line   20)
! * mbig-endian <1>:                       ARC Options.        (line  587)
  * mbig-endian <2>:                       ARM Options.        (line   67)
  * mbig-endian <3>:                       C6X Options.        (line   13)
  * mbig-endian <4>:                       C-SKY Options.      (line   28)
*************** look up both forms.
*** 64837,64848 ****
                                                               (line  700)
  * mblock-move-inline-limit:              RS/6000 and PowerPC Options.
                                                               (line  688)
! * mbmi:                                  x86 Options.        (line  883)
! * mbmi2:                                 x86 Options.        (line  884)
  * mboard:                                OpenRISC Options.   (line    9)
  * mbranch-cost:                          Adapteva Epiphany Options.
                                                               (line   18)
! * mbranch-cost <1>:                      AVR Options.        (line  185)
  * mbranch-cost <2>:                      MIPS Options.       (line  791)
  * mbranch-cost <3>:                      RISC-V Options.     (line    9)
  * mbranch-cost=:                         C-SKY Options.      (line  159)
--- 65025,65036 ----
                                                               (line  700)
  * mblock-move-inline-limit:              RS/6000 and PowerPC Options.
                                                               (line  688)
! * mbmi:                                  x86 Options.        (line  892)
! * mbmi2:                                 x86 Options.        (line  893)
  * mboard:                                OpenRISC Options.   (line    9)
  * mbranch-cost:                          Adapteva Epiphany Options.
                                                               (line   18)
! * mbranch-cost <1>:                      AVR Options.        (line  202)
  * mbranch-cost <2>:                      MIPS Options.       (line  791)
  * mbranch-cost <3>:                      RISC-V Options.     (line    9)
  * mbranch-cost=:                         C-SKY Options.      (line  159)
*************** look up both forms.
*** 64869,64880 ****
                                                               (line  529)
  * mcall-linux:                           RS/6000 and PowerPC Options.
                                                               (line  525)
! * mcall-ms2sysv-xlogues:                 x86 Options.        (line 1157)
  * mcall-netbsd:                          RS/6000 and PowerPC Options.
                                                               (line  533)
  * mcall-netbsd <1>:                      RS/6000 and PowerPC Options.
                                                               (line  537)
! * mcall-prologues:                       AVR Options.        (line  190)
  * mcall-sysv:                            RS/6000 and PowerPC Options.
                                                               (line  507)
  * mcall-sysv-eabi:                       RS/6000 and PowerPC Options.
--- 65057,65068 ----
                                                               (line  529)
  * mcall-linux:                           RS/6000 and PowerPC Options.
                                                               (line  525)
! * mcall-ms2sysv-xlogues:                 x86 Options.        (line 1166)
  * mcall-netbsd:                          RS/6000 and PowerPC Options.
                                                               (line  533)
  * mcall-netbsd <1>:                      RS/6000 and PowerPC Options.
                                                               (line  537)
! * mcall-prologues:                       AVR Options.        (line  207)
  * mcall-sysv:                            RS/6000 and PowerPC Options.
                                                               (line  507)
  * mcall-sysv-eabi:                       RS/6000 and PowerPC Options.
*************** look up both forms.
*** 64885,64925 ****
  * mcaller-copies:                        HPPA Options.       (line   23)
  * mcaller-super-interworking:            ARM Options.        (line  860)
  * mcallgraph-data:                       MCore Options.      (line   31)
! * mcase-vector-pcrel:                    ARC Options.        (line  450)
  * mcbcond:                               SPARC Options.      (line  260)
  * mcbranch-force-delay-slot:             SH Options.         (line  349)
! * mcc-init:                              CRIS Options.       (line   41)
  * mccrt:                                 C-SKY Options.      (line  155)
  * mcfv4e:                                M680x0 Options.     (line  170)
  * mcheck-zero-division:                  MIPS Options.       (line  570)
  * mcix:                                  DEC Alpha Options.  (line  163)
! * mcld:                                  x86 Options.        (line  975)
! * mcldemote:                             x86 Options.        (line  916)
  * mclear-hwcap:                          Solaris 2 Options.  (line    9)
! * mclflushopt:                           x86 Options.        (line  861)
  * mclip:                                 MeP Options.        (line   35)
! * mclwb:                                 x86 Options.        (line  862)
! * mclzero:                               x86 Options.        (line  895)
  * mcmodel:                               NDS32 Options.      (line   67)
  * mcmodel <1>:                           SPARC Options.      (line  320)
! * mcmodel=kernel:                        x86 Options.        (line 1576)
  * mcmodel=large:                         AArch64 Options.    (line   45)
  * mcmodel=large <1>:                     OpenRISC Options.   (line   77)
  * mcmodel=large <2>:                     RS/6000 and PowerPC Options.
                                                               (line  131)
  * mcmodel=large <3>:                     TILE-Gx Options.    (line   14)
! * mcmodel=large <4>:                     x86 Options.        (line 1588)
  * mcmodel=medany:                        RISC-V Options.     (line  142)
  * mcmodel=medium:                        RS/6000 and PowerPC Options.
                                                               (line  126)
! * mcmodel=medium <1>:                    x86 Options.        (line 1581)
  * mcmodel=medlow:                        RISC-V Options.     (line  135)
  * mcmodel=small:                         AArch64 Options.    (line   39)
  * mcmodel=small <1>:                     OpenRISC Options.   (line   73)
  * mcmodel=small <2>:                     RS/6000 and PowerPC Options.
                                                               (line  122)
  * mcmodel=small <3>:                     TILE-Gx Options.    (line    9)
! * mcmodel=small <4>:                     x86 Options.        (line 1570)
  * mcmodel=tiny:                          AArch64 Options.    (line   34)
  * mcmov:                                 NDS32 Options.      (line   21)
  * mcmov <1>:                             OpenRISC Options.   (line   45)
--- 65073,65113 ----
  * mcaller-copies:                        HPPA Options.       (line   23)
  * mcaller-super-interworking:            ARM Options.        (line  860)
  * mcallgraph-data:                       MCore Options.      (line   31)
! * mcase-vector-pcrel:                    ARC Options.        (line  448)
  * mcbcond:                               SPARC Options.      (line  260)
  * mcbranch-force-delay-slot:             SH Options.         (line  349)
! * mcc-init:                              CRIS Options.       (line   40)
  * mccrt:                                 C-SKY Options.      (line  155)
  * mcfv4e:                                M680x0 Options.     (line  170)
  * mcheck-zero-division:                  MIPS Options.       (line  570)
  * mcix:                                  DEC Alpha Options.  (line  163)
! * mcld:                                  x86 Options.        (line  984)
! * mcldemote:                             x86 Options.        (line  925)
  * mclear-hwcap:                          Solaris 2 Options.  (line    9)
! * mclflushopt:                           x86 Options.        (line  870)
  * mclip:                                 MeP Options.        (line   35)
! * mclwb:                                 x86 Options.        (line  871)
! * mclzero:                               x86 Options.        (line  904)
  * mcmodel:                               NDS32 Options.      (line   67)
  * mcmodel <1>:                           SPARC Options.      (line  320)
! * mcmodel=kernel:                        x86 Options.        (line 1585)
  * mcmodel=large:                         AArch64 Options.    (line   45)
  * mcmodel=large <1>:                     OpenRISC Options.   (line   77)
  * mcmodel=large <2>:                     RS/6000 and PowerPC Options.
                                                               (line  131)
  * mcmodel=large <3>:                     TILE-Gx Options.    (line   14)
! * mcmodel=large <4>:                     x86 Options.        (line 1597)
  * mcmodel=medany:                        RISC-V Options.     (line  142)
  * mcmodel=medium:                        RS/6000 and PowerPC Options.
                                                               (line  126)
! * mcmodel=medium <1>:                    x86 Options.        (line 1590)
  * mcmodel=medlow:                        RISC-V Options.     (line  135)
  * mcmodel=small:                         AArch64 Options.    (line   39)
  * mcmodel=small <1>:                     OpenRISC Options.   (line   73)
  * mcmodel=small <2>:                     RS/6000 and PowerPC Options.
                                                               (line  122)
  * mcmodel=small <3>:                     TILE-Gx Options.    (line    9)
! * mcmodel=small <4>:                     x86 Options.        (line 1579)
  * mcmodel=tiny:                          AArch64 Options.    (line   34)
  * mcmov:                                 NDS32 Options.      (line   21)
  * mcmov <1>:                             OpenRISC Options.   (line   45)
*************** look up both forms.
*** 64930,64942 ****
  * mcmse:                                 ARM Options.        (line  961)
  * mco-re:                                eBPF Options.       (line   56)
  * mcode-density:                         ARC Options.        (line  163)
! * mcode-density-frame:                   ARC Options.        (line  511)
  * mcode-readable:                        MIPS Options.       (line  530)
  * mcode-region:                          MSP430 Options.     (line  150)
  * mcompact-branches=always:              MIPS Options.       (line  810)
  * mcompact-branches=never:               MIPS Options.       (line  810)
  * mcompact-branches=optimal:             MIPS Options.       (line  810)
! * mcompact-casesi:                       ARC Options.        (line  454)
  * mcompat-align-parm:                    RS/6000 and PowerPC Options.
                                                               (line  899)
  * mcompress:                             FT32 Options.       (line   26)
--- 65118,65130 ----
  * mcmse:                                 ARM Options.        (line  961)
  * mco-re:                                eBPF Options.       (line   56)
  * mcode-density:                         ARC Options.        (line  163)
! * mcode-density-frame:                   ARC Options.        (line  509)
  * mcode-readable:                        MIPS Options.       (line  530)
  * mcode-region:                          MSP430 Options.     (line  150)
  * mcompact-branches=always:              MIPS Options.       (line  810)
  * mcompact-branches=never:               MIPS Options.       (line  810)
  * mcompact-branches=optimal:             MIPS Options.       (line  810)
! * mcompact-casesi:                       ARC Options.        (line  452)
  * mcompat-align-parm:                    RS/6000 and PowerPC Options.
                                                               (line  899)
  * mcompress:                             FT32 Options.       (line   26)
*************** look up both forms.
*** 64945,64952 ****
  * mconfig=:                              MeP Options.        (line   39)
  * mconsole:                              x86 Windows Options.
                                                               (line    9)
! * mconst-align:                          CRIS Options.       (line   54)
  * mconst16:                              Xtensa Options.     (line   10)
  * mconstant-gp:                          IA-64 Options.      (line   46)
  * mconstpool:                            C-SKY Options.      (line  143)
  * mcop:                                  MeP Options.        (line   48)
--- 65133,65141 ----
  * mconfig=:                              MeP Options.        (line   39)
  * mconsole:                              x86 Windows Options.
                                                               (line    9)
! * mconst-align:                          CRIS Options.       (line   53)
  * mconst16:                              Xtensa Options.     (line   10)
+ * mconstant-cfstrings:                   Darwin Options.     (line   74)
  * mconstant-gp:                          IA-64 Options.      (line   46)
  * mconstpool:                            C-SKY Options.      (line  143)
  * mcop:                                  MeP Options.        (line   48)
*************** look up both forms.
*** 64983,64989 ****
  * mcr16c:                                CR16 Options.       (line   14)
  * mcr16cplus:                            CR16 Options.       (line   14)
  * mcrc:                                  MIPS Options.       (line  416)
! * mcrc32:                                x86 Options.        (line 1053)
  * mcrypto:                               RS/6000 and PowerPC Options.
                                                               (line  178)
  * mcsync-anomaly:                        Blackfin Options.   (line   57)
--- 65172,65178 ----
  * mcr16c:                                CR16 Options.       (line   14)
  * mcr16cplus:                            CR16 Options.       (line   14)
  * mcrc:                                  MIPS Options.       (line  416)
! * mcrc32:                                x86 Options.        (line 1062)
  * mcrypto:                               RS/6000 and PowerPC Options.
                                                               (line  178)
  * mcsync-anomaly:                        Blackfin Options.   (line   57)
*************** look up both forms.
*** 64991,65003 ****
  * mctor-dtor:                            NDS32 Options.      (line   81)
  * mcustom-fpu-cfg:                       Nios II Options.    (line  259)
  * mcustom-INSN:                          Nios II Options.    (line  139)
! * mcx16:                                 x86 Options.        (line 1026)
  * MD:                                    Preprocessor Options.
                                                               (line  172)
  * mdalign:                               SH Options.         (line  132)
! * mdata-align:                           CRIS Options.       (line   54)
  * mdata-model:                           CR16 Options.       (line   28)
  * mdata-region:                          MSP430 Options.     (line  150)
  * mdc:                                   MeP Options.        (line   62)
  * mdebug:                                M32R/D Options.     (line   69)
  * mdebug <1>:                            S/390 and zSeries Options.
--- 65180,65193 ----
  * mctor-dtor:                            NDS32 Options.      (line   81)
  * mcustom-fpu-cfg:                       Nios II Options.    (line  259)
  * mcustom-INSN:                          Nios II Options.    (line  139)
! * mcx16:                                 x86 Options.        (line 1035)
  * MD:                                    Preprocessor Options.
                                                               (line  172)
  * mdalign:                               SH Options.         (line  132)
! * mdata-align:                           CRIS Options.       (line   53)
  * mdata-model:                           CR16 Options.       (line   28)
  * mdata-region:                          MSP430 Options.     (line  150)
+ * mdaz-ftz:                              x86 Options.        (line  783)
  * mdc:                                   MeP Options.        (line   62)
  * mdebug:                                M32R/D Options.     (line   69)
  * mdebug <1>:                            S/390 and zSeries Options.
*************** look up both forms.
*** 65005,65011 ****
  * mdebug <2>:                            Visium Options.     (line    7)
  * mdebug-main=PREFIX:                    VMS Options.        (line   13)
  * mdec-asm:                              PDP-11 Options.     (line   46)
! * mdirect-extern-access:                 x86 Options.        (line 1608)
  * mdisable-callt:                        V850 Options.       (line   92)
  * mdisable-fpregs:                       HPPA Options.       (line   34)
  * mdisable-indexing:                     HPPA Options.       (line   40)
--- 65195,65201 ----
  * mdebug <2>:                            Visium Options.     (line    7)
  * mdebug-main=PREFIX:                    VMS Options.        (line   13)
  * mdec-asm:                              PDP-11 Options.     (line   46)
! * mdirect-extern-access:                 x86 Options.        (line 1617)
  * mdisable-callt:                        V850 Options.       (line   92)
  * mdisable-fpregs:                       HPPA Options.       (line   34)
  * mdisable-indexing:                     HPPA Options.       (line   40)
*************** look up both forms.
*** 65025,65031 ****
  * mdlmzb:                                RS/6000 and PowerPC Options.
                                                               (line  385)
  * mdmx:                                  MIPS Options.       (line  376)
! * mdouble:                               AVR Options.        (line  195)
  * mdouble <1>:                           FRV Options.        (line   48)
  * mdouble-float:                         C-SKY Options.      (line   58)
  * mdouble-float <1>:                     MIPS Options.       (line  288)
--- 65215,65221 ----
  * mdlmzb:                                RS/6000 and PowerPC Options.
                                                               (line  385)
  * mdmx:                                  MIPS Options.       (line  376)
! * mdouble:                               AVR Options.        (line  212)
  * mdouble <1>:                           FRV Options.        (line   48)
  * mdouble-float:                         C-SKY Options.      (line   58)
  * mdouble-float <1>:                     MIPS Options.       (line  288)
*************** look up both forms.
*** 65033,65046 ****
  * mdpfp:                                 ARC Options.        (line   99)
  * mdpfp-compact:                         ARC Options.        (line  100)
  * mdpfp-fast:                            ARC Options.        (line  104)
! * mdpfp_compact:                         ARC Options.        (line  609)
! * mdpfp_fast:                            ARC Options.        (line  612)
  * mdsp:                                  C-SKY Options.      (line  102)
  * mdsp <1>:                              MIPS Options.       (line  353)
  * mdsp-packa:                            ARC Options.        (line  335)
  * mdspr2:                                MIPS Options.       (line  359)
! * mdsp_packa:                            ARC Options.        (line  615)
! * mdump-tune-features:                   x86 Options.        (line  957)
  * mdvbf:                                 ARC Options.        (line  340)
  * mdwarf2-asm:                           IA-64 Options.      (line   94)
  * mdword:                                FRV Options.        (line   40)
--- 65223,65236 ----
  * mdpfp:                                 ARC Options.        (line   99)
  * mdpfp-compact:                         ARC Options.        (line  100)
  * mdpfp-fast:                            ARC Options.        (line  104)
! * mdpfp_compact:                         ARC Options.        (line  604)
! * mdpfp_fast:                            ARC Options.        (line  607)
  * mdsp:                                  C-SKY Options.      (line  102)
  * mdsp <1>:                              MIPS Options.       (line  353)
  * mdsp-packa:                            ARC Options.        (line  335)
  * mdspr2:                                MIPS Options.       (line  359)
! * mdsp_packa:                            ARC Options.        (line  610)
! * mdump-tune-features:                   x86 Options.        (line  966)
  * mdvbf:                                 ARC Options.        (line  340)
  * mdwarf2-asm:                           IA-64 Options.      (line   94)
  * mdword:                                FRV Options.        (line   40)
*************** look up both forms.
*** 65048,65057 ****
  * mdynamic-no-pic:                       RS/6000 and PowerPC Options.
                                                               (line  445)
  * mea:                                   ARC Options.        (line  112)
! * mEA:                                   ARC Options.        (line  618)
  * meabi:                                 RS/6000 and PowerPC Options.
                                                               (line  633)
! * mearly-cbranchsi:                      ARC Options.        (line  476)
  * mearly-stop-bits:                      IA-64 Options.      (line  100)
  * meb:                                   MeP Options.        (line   68)
  * meb <1>:                               Moxie Options.      (line    7)
--- 65238,65247 ----
  * mdynamic-no-pic:                       RS/6000 and PowerPC Options.
                                                               (line  445)
  * mea:                                   ARC Options.        (line  112)
! * mEA:                                   ARC Options.        (line  613)
  * meabi:                                 RS/6000 and PowerPC Options.
                                                               (line  633)
! * mearly-cbranchsi:                      ARC Options.        (line  474)
  * mearly-stop-bits:                      IA-64 Options.      (line  100)
  * meb:                                   MeP Options.        (line   68)
  * meb <1>:                               Moxie Options.      (line    7)
*************** look up both forms.
*** 65062,65083 ****
  * mel <1>:                               Moxie Options.      (line   11)
  * mel <2>:                               Nios II Options.    (line   90)
  * mel <3>:                               Score Options.      (line   12)
! * melf:                                  CRIS Options.       (line   79)
  * melf <1>:                              MMIX Options.       (line   43)
  * melrw:                                 C-SKY Options.      (line   76)
  * memb:                                  RS/6000 and PowerPC Options.
                                                               (line  628)
  * membedded-data:                        MIPS Options.       (line  517)
  * memregs=:                              M32C Options.       (line   21)
! * menqcmd:                               x86 Options.        (line  907)
  * mep:                                   V850 Options.       (line   16)
  * mepsilon:                              MMIX Options.       (line   15)
  * mesa:                                  S/390 and zSeries Options.
                                                               (line   94)
! * metrax100:                             CRIS Options.       (line   26)
! * metrax4:                               CRIS Options.       (line   26)
  * meva:                                  MIPS Options.       (line  403)
! * mexpand-adddi:                         ARC Options.        (line  479)
  * mexplicit-relocs:                      DEC Alpha Options.  (line  176)
  * mexplicit-relocs <1>:                  MIPS Options.       (line  561)
  * mexr:                                  H8/300 Options.     (line   28)
--- 65252,65273 ----
  * mel <1>:                               Moxie Options.      (line   11)
  * mel <2>:                               Nios II Options.    (line   90)
  * mel <3>:                               Score Options.      (line   12)
! * melf:                                  CRIS Options.       (line   78)
  * melf <1>:                              MMIX Options.       (line   43)
  * melrw:                                 C-SKY Options.      (line   76)
  * memb:                                  RS/6000 and PowerPC Options.
                                                               (line  628)
  * membedded-data:                        MIPS Options.       (line  517)
  * memregs=:                              M32C Options.       (line   21)
! * menqcmd:                               x86 Options.        (line  916)
  * mep:                                   V850 Options.       (line   16)
  * mepsilon:                              MMIX Options.       (line   15)
  * mesa:                                  S/390 and zSeries Options.
                                                               (line   94)
! * metrax100:                             CRIS Options.       (line   25)
! * metrax4:                               CRIS Options.       (line   25)
  * meva:                                  MIPS Options.       (line  403)
! * mexpand-adddi:                         ARC Options.        (line  477)
  * mexplicit-relocs:                      DEC Alpha Options.  (line  176)
  * mexplicit-relocs <1>:                  MIPS Options.       (line  561)
  * mexr:                                  H8/300 Options.     (line   28)
*************** look up both forms.
*** 65088,65094 ****
  * mextern-sdata:                         MIPS Options.       (line  480)
  * MF:                                    Preprocessor Options.
                                                               (line  111)
! * mf16c:                                 x86 Options.        (line  866)
  * mfancy-math-387:                       x86 Options.        (line  630)
  * mfast-fp:                              Blackfin Options.   (line  130)
  * mfast-indirect-calls:                  HPPA Options.       (line   52)
--- 65278,65284 ----
  * mextern-sdata:                         MIPS Options.       (line  480)
  * MF:                                    Preprocessor Options.
                                                               (line  111)
! * mf16c:                                 x86 Options.        (line  875)
  * mfancy-math-387:                       x86 Options.        (line  630)
  * mfast-fp:                              Blackfin Options.   (line  130)
  * mfast-indirect-calls:                  HPPA Options.       (line   52)
*************** look up both forms.
*** 65098,65109 ****
  * mfdivdu:                               C-SKY Options.      (line   64)
  * mfdpic:                                ARM Options.        (line  984)
  * mfdpic <1>:                            FRV Options.        (line   72)
! * mfentry:                               x86 Options.        (line 1391)
! * mfentry-name:                          x86 Options.        (line 1422)
! * mfentry-section:                       x86 Options.        (line 1426)
  * mfix:                                  DEC Alpha Options.  (line  163)
  * mfix-24k:                              MIPS Options.       (line  647)
! * mfix-and-continue:                     Darwin Options.     (line  104)
  * mfix-at697f:                           SPARC Options.      (line  294)
  * mfix-cmse-cve-2021-35465:              ARM Options.        (line  967)
  * mfix-cortex-a53-835769:                AArch64 Options.    (line   90)
--- 65288,65299 ----
  * mfdivdu:                               C-SKY Options.      (line   64)
  * mfdpic:                                ARM Options.        (line  984)
  * mfdpic <1>:                            FRV Options.        (line   72)
! * mfentry:                               x86 Options.        (line 1400)
! * mfentry-name:                          x86 Options.        (line 1431)
! * mfentry-section:                       x86 Options.        (line 1435)
  * mfix:                                  DEC Alpha Options.  (line  163)
  * mfix-24k:                              MIPS Options.       (line  647)
! * mfix-and-continue:                     Darwin Options.     (line  112)
  * mfix-at697f:                           SPARC Options.      (line  294)
  * mfix-cmse-cve-2021-35465:              ARM Options.        (line  967)
  * mfix-cortex-a53-835769:                AArch64 Options.    (line   90)
*************** look up both forms.
*** 65138,65148 ****
  * mflush-func:                           MIPS Options.       (line  782)
  * mflush-func=NAME:                      M32R/D Options.     (line   93)
  * mflush-trap=NUMBER:                    M32R/D Options.     (line   86)
! * mfma:                                  x86 Options.        (line  867)
! * mfma4:                                 x86 Options.        (line  870)
  * mfmaf:                                 SPARC Options.      (line  267)
  * mfmovd:                                SH Options.         (line  148)
! * mforce-indirect-call:                  x86 Options.        (line 1146)
  * mforce-no-pic:                         Xtensa Options.     (line   41)
  * mfp-exceptions:                        MIPS Options.       (line  830)
  * mfp-mode:                              Adapteva Epiphany Options.
--- 65328,65338 ----
  * mflush-func:                           MIPS Options.       (line  782)
  * mflush-func=NAME:                      M32R/D Options.     (line   93)
  * mflush-trap=NUMBER:                    M32R/D Options.     (line   86)
! * mfma:                                  x86 Options.        (line  876)
! * mfma4:                                 x86 Options.        (line  879)
  * mfmaf:                                 SPARC Options.      (line  267)
  * mfmovd:                                SH Options.         (line  148)
! * mforce-indirect-call:                  x86 Options.        (line 1155)
  * mforce-no-pic:                         Xtensa Options.     (line   41)
  * mfp-exceptions:                        MIPS Options.       (line  830)
  * mfp-mode:                              Adapteva Epiphany Options.
*************** look up both forms.
*** 65168,65186 ****
  * mfpu <5>:                              Visium Options.     (line   19)
  * mfpu=:                                 C-SKY Options.      (line   69)
  * mfpxx:                                 MIPS Options.       (line  264)
! * mfract-convert-truncate:               AVR Options.        (line  286)
  * mframe-header-opt:                     MIPS Options.       (line  891)
  * mfriz:                                 RS/6000 and PowerPC Options.
                                                               (line  870)
  * mfsca:                                 SH Options.         (line  365)
! * mfsgsbase:                             x86 Options.        (line  863)
  * mfsmuld:                               SPARC Options.      (line  274)
  * mfsrra:                                SH Options.         (line  374)
  * mft32b:                                FT32 Options.       (line   23)
  * mfull-regs:                            NDS32 Options.      (line   18)
  * mfull-toc:                             RS/6000 and PowerPC Options.
                                                               (line  256)
! * mfunction-return:                      x86 Options.        (line 1500)
  * mfused-madd:                           IA-64 Options.      (line   88)
  * mfused-madd <1>:                       MIPS Options.       (line  630)
  * mfused-madd <2>:                       RS/6000 and PowerPC Options.
--- 65358,65376 ----
  * mfpu <5>:                              Visium Options.     (line   19)
  * mfpu=:                                 C-SKY Options.      (line   69)
  * mfpxx:                                 MIPS Options.       (line  264)
! * mfract-convert-truncate:               AVR Options.        (line  302)
  * mframe-header-opt:                     MIPS Options.       (line  891)
  * mfriz:                                 RS/6000 and PowerPC Options.
                                                               (line  870)
  * mfsca:                                 SH Options.         (line  365)
! * mfsgsbase:                             x86 Options.        (line  872)
  * mfsmuld:                               SPARC Options.      (line  274)
  * mfsrra:                                SH Options.         (line  374)
  * mft32b:                                FT32 Options.       (line   23)
  * mfull-regs:                            NDS32 Options.      (line   18)
  * mfull-toc:                             RS/6000 and PowerPC Options.
                                                               (line  256)
! * mfunction-return:                      x86 Options.        (line 1509)
  * mfused-madd:                           IA-64 Options.      (line   88)
  * mfused-madd <1>:                       MIPS Options.       (line  630)
  * mfused-madd <2>:                       RS/6000 and PowerPC Options.
*************** look up both forms.
*** 65189,65195 ****
                                                               (line  183)
  * mfused-madd <4>:                       SH Options.         (line  356)
  * mfused-madd <5>:                       Xtensa Options.     (line   19)
! * mfxsr:                                 x86 Options.        (line  886)
  * MG:                                    Preprocessor Options.
                                                               (line  122)
  * mg:                                    VAX Options.        (line   17)
--- 65379,65385 ----
                                                               (line  183)
  * mfused-madd <4>:                       SH Options.         (line  356)
  * mfused-madd <5>:                       Xtensa Options.     (line   19)
! * mfxsr:                                 x86 Options.        (line  895)
  * MG:                                    Preprocessor Options.
                                                               (line  122)
  * mg:                                    VAX Options.        (line   17)
*************** look up both forms.
*** 65197,65208 ****
  * mg13:                                  RL78 Options.       (line   62)
  * mg14:                                  RL78 Options.       (line   62)
  * mgas:                                  HPPA Options.       (line   75)
! * mgas-isr-prologues:                    AVR Options.        (line  203)
  * mgcc-abi:                              V850 Options.       (line  148)
  * mgeneral-regs-only:                    AArch64 Options.    (line   24)
  * mgeneral-regs-only <1>:                ARM Options.        (line   57)
! * mgeneral-regs-only <2>:                x86 Options.        (line 1470)
! * mgfni:                                 x86 Options.        (line  900)
  * mghs:                                  V850 Options.       (line  127)
  * mginv:                                 MIPS Options.       (line  421)
  * mglibc:                                GNU/Linux Options.  (line    9)
--- 65387,65398 ----
  * mg13:                                  RL78 Options.       (line   62)
  * mg14:                                  RL78 Options.       (line   62)
  * mgas:                                  HPPA Options.       (line   75)
! * mgas-isr-prologues:                    AVR Options.        (line  220)
  * mgcc-abi:                              V850 Options.       (line  148)
  * mgeneral-regs-only:                    AArch64 Options.    (line   24)
  * mgeneral-regs-only <1>:                ARM Options.        (line   57)
! * mgeneral-regs-only <2>:                x86 Options.        (line 1479)
! * mgfni:                                 x86 Options.        (line  909)
  * mghs:                                  V850 Options.       (line  127)
  * mginv:                                 MIPS Options.       (line  421)
  * mglibc:                                GNU/Linux Options.  (line    9)
*************** look up both forms.
*** 65248,65261 ****
  * mhard-mul:                             OpenRISC Options.   (line   24)
  * mhard-quad-float:                      SPARC Options.      (line   55)
  * mharden-sls:                           AArch64 Options.    (line  301)
! * mharden-sls <1>:                       x86 Options.        (line 1522)
  * mhardlit:                              MCore Options.      (line   10)
  * mhigh-registers:                       C-SKY Options.      (line  120)
! * mhle:                                  x86 Options.        (line  892)
  * mhotpatch:                             S/390 and zSeries Options.
                                                               (line  218)
  * mhp-ld:                                HPPA Options.       (line  123)
! * mhreset:                               x86 Options.        (line  921)
  * mhtm:                                  RS/6000 and PowerPC Options.
                                                               (line  184)
  * mhtm <1>:                              S/390 and zSeries Options.
--- 65438,65451 ----
  * mhard-mul:                             OpenRISC Options.   (line   24)
  * mhard-quad-float:                      SPARC Options.      (line   55)
  * mharden-sls:                           AArch64 Options.    (line  301)
! * mharden-sls <1>:                       x86 Options.        (line 1531)
  * mhardlit:                              MCore Options.      (line   10)
  * mhigh-registers:                       C-SKY Options.      (line  120)
! * mhle:                                  x86 Options.        (line  901)
  * mhotpatch:                             S/390 and zSeries Options.
                                                               (line  218)
  * mhp-ld:                                HPPA Options.       (line  123)
! * mhreset:                               x86 Options.        (line  930)
  * mhtm:                                  RS/6000 and PowerPC Options.
                                                               (line  184)
  * mhtm <1>:                              S/390 and zSeries Options.
*************** look up both forms.
*** 65264,65270 ****
  * mhw-mul:                               Nios II Options.    (line  124)
  * mhw-mulx:                              Nios II Options.    (line  124)
  * mhwmult=:                              MSP430 Options.     (line   93)
! * miamcu:                                x86 Options.        (line 1542)
  * micplb:                                Blackfin Options.   (line  175)
  * mid-shared-library:                    Blackfin Options.   (line   78)
  * mid-shared-library <1>:                Blackfin Options.   (line   85)
--- 65454,65460 ----
  * mhw-mul:                               Nios II Options.    (line  124)
  * mhw-mulx:                              Nios II Options.    (line  124)
  * mhwmult=:                              MSP430 Options.     (line   93)
! * miamcu:                                x86 Options.        (line 1551)
  * micplb:                                Blackfin Options.   (line  175)
  * mid-shared-library:                    Blackfin Options.   (line   78)
  * mid-shared-library <1>:                Blackfin Options.   (line   85)
*************** look up both forms.
*** 65276,65287 ****
  * milp32:                                IA-64 Options.      (line  121)
  * mimadd:                                MIPS Options.       (line  623)
  * mimpure-text:                          Solaris 2 Options.  (line   15)
! * mincoming-stack-boundary:              x86 Options.        (line  813)
! * mindexed-loads:                        ARC Options.        (line  483)
! * mindirect-branch:                      x86 Options.        (line 1481)
! * mindirect-branch-cs-prefix:            x86 Options.        (line 1529)
! * mindirect-branch-register:             x86 Options.        (line 1519)
! * minline-all-stringops:                 x86 Options.        (line 1322)
  * minline-float-divide-max-throughput:   IA-64 Options.      (line   58)
  * minline-float-divide-min-latency:      IA-64 Options.      (line   54)
  * minline-ic_invalidate:                 SH Options.         (line  174)
--- 65466,65477 ----
  * milp32:                                IA-64 Options.      (line  121)
  * mimadd:                                MIPS Options.       (line  623)
  * mimpure-text:                          Solaris 2 Options.  (line   15)
! * mincoming-stack-boundary:              x86 Options.        (line  822)
! * mindexed-loads:                        ARC Options.        (line  481)
! * mindirect-branch:                      x86 Options.        (line 1490)
! * mindirect-branch-cs-prefix:            x86 Options.        (line 1538)
! * mindirect-branch-register:             x86 Options.        (line 1528)
! * minline-all-stringops:                 x86 Options.        (line 1331)
  * minline-float-divide-max-throughput:   IA-64 Options.      (line   58)
  * minline-float-divide-min-latency:      IA-64 Options.      (line   54)
  * minline-ic_invalidate:                 SH Options.         (line  174)
*************** look up both forms.
*** 65292,65309 ****
  * minline-plt <1>:                       FRV Options.        (line   81)
  * minline-sqrt-max-throughput:           IA-64 Options.      (line   80)
  * minline-sqrt-min-latency:              IA-64 Options.      (line   76)
! * minline-stringops-dynamically:         x86 Options.        (line 1330)
  * minrt:                                 MSP430 Options.     (line  115)
  * minrt <1>:                             PRU Options.        (line    9)
  * minsert-sched-nops:                    RS/6000 and PowerPC Options.
                                                               (line  485)
! * minstrument-return:                    x86 Options.        (line 1410)
  * mint-register:                         RX Options.         (line  100)
  * mint16:                                PDP-11 Options.     (line   33)
  * mint32:                                CR16 Options.       (line   22)
  * mint32 <1>:                            H8/300 Options.     (line   38)
  * mint32 <2>:                            PDP-11 Options.     (line   37)
! * mint8:                                 AVR Options.        (line  213)
  * minterlink-compressed:                 MIPS Options.       (line  135)
  * minterlink-mips16:                     MIPS Options.       (line  147)
  * mio-volatile:                          MeP Options.        (line   74)
--- 65482,65499 ----
  * minline-plt <1>:                       FRV Options.        (line   81)
  * minline-sqrt-max-throughput:           IA-64 Options.      (line   80)
  * minline-sqrt-min-latency:              IA-64 Options.      (line   76)
! * minline-stringops-dynamically:         x86 Options.        (line 1339)
  * minrt:                                 MSP430 Options.     (line  115)
  * minrt <1>:                             PRU Options.        (line    9)
  * minsert-sched-nops:                    RS/6000 and PowerPC Options.
                                                               (line  485)
! * minstrument-return:                    x86 Options.        (line 1419)
  * mint-register:                         RX Options.         (line  100)
  * mint16:                                PDP-11 Options.     (line   33)
  * mint32:                                CR16 Options.       (line   22)
  * mint32 <1>:                            H8/300 Options.     (line   38)
  * mint32 <2>:                            PDP-11 Options.     (line   37)
! * mint8:                                 AVR Options.        (line  229)
  * minterlink-compressed:                 MIPS Options.       (line  135)
  * minterlink-mips16:                     MIPS Options.       (line  147)
  * mio-volatile:                          MeP Options.        (line   74)
*************** look up both forms.
*** 65338,65346 ****
  * mjmpext:                               eBPF Options.       (line   28)
  * mjsr:                                  RX Options.         (line  169)
  * mjump-in-delay:                        HPPA Options.       (line   30)
! * mkernel:                               Darwin Options.     (line   82)
  * mkernel <1>:                           eBPF Options.       (line   13)
! * mkl:                                   x86 Options.        (line  922)
  * mknuthdiv:                             MMIX Options.       (line   32)
  * ml:                                    MeP Options.        (line   78)
  * ml <1>:                                SH Options.         (line  129)
--- 65528,65536 ----
  * mjmpext:                               eBPF Options.       (line   28)
  * mjsr:                                  RX Options.         (line  169)
  * mjump-in-delay:                        HPPA Options.       (line   30)
! * mkernel:                               Darwin Options.     (line   90)
  * mkernel <1>:                           eBPF Options.       (line   13)
! * mkl:                                   x86 Options.        (line  931)
  * mknuthdiv:                             MMIX Options.       (line   32)
  * ml:                                    MeP Options.        (line   78)
  * ml <1>:                                SH Options.         (line  129)
*************** look up both forms.
*** 65358,65364 ****
  * mlittle:                               RS/6000 and PowerPC Options.
                                                               (line  434)
  * mlittle-endian:                        AArch64 Options.    (line   30)
! * mlittle-endian <1>:                    ARC Options.        (line  598)
  * mlittle-endian <2>:                    ARM Options.        (line   63)
  * mlittle-endian <3>:                    C6X Options.        (line   16)
  * mlittle-endian <4>:                    C-SKY Options.      (line   30)
--- 65548,65554 ----
  * mlittle:                               RS/6000 and PowerPC Options.
                                                               (line  434)
  * mlittle-endian:                        AArch64 Options.    (line   30)
! * mlittle-endian <1>:                    ARC Options.        (line  594)
  * mlittle-endian <2>:                    ARM Options.        (line   63)
  * mlittle-endian <3>:                    C6X Options.        (line   16)
  * mlittle-endian <4>:                    C-SKY Options.      (line   30)
*************** look up both forms.
*** 65380,65393 ****
  * mlock:                                 ARC Options.        (line  345)
  * mlong-calls:                           Adapteva Epiphany Options.
                                                               (line   55)
! * mlong-calls <1>:                       ARC Options.        (line  404)
  * mlong-calls <2>:                       ARM Options.        (line  757)
  * mlong-calls <3>:                       Blackfin Options.   (line  118)
  * mlong-calls <4>:                       FRV Options.        (line  122)
  * mlong-calls <5>:                       HPPA Options.       (line  136)
  * mlong-calls <6>:                       MIPS Options.       (line  609)
  * mlong-calls <7>:                       V850 Options.       (line   10)
! * mlong-double:                          AVR Options.        (line  195)
  * mlong-double-128:                      S/390 and zSeries Options.
                                                               (line   29)
  * mlong-double-128 <1>:                  x86 Options.        (line  681)
--- 65570,65583 ----
  * mlock:                                 ARC Options.        (line  345)
  * mlong-calls:                           Adapteva Epiphany Options.
                                                               (line   55)
! * mlong-calls <1>:                       ARC Options.        (line  402)
  * mlong-calls <2>:                       ARM Options.        (line  757)
  * mlong-calls <3>:                       Blackfin Options.   (line  118)
  * mlong-calls <4>:                       FRV Options.        (line  122)
  * mlong-calls <5>:                       HPPA Options.       (line  136)
  * mlong-calls <6>:                       MIPS Options.       (line  609)
  * mlong-calls <7>:                       V850 Options.       (line   10)
! * mlong-double:                          AVR Options.        (line  212)
  * mlong-double-128:                      S/390 and zSeries Options.
                                                               (line   29)
  * mlong-double-128 <1>:                  x86 Options.        (line  681)
*************** look up both forms.
*** 65414,65430 ****
  * mlow64k:                               Blackfin Options.   (line   67)
  * mlp64:                                 IA-64 Options.      (line  121)
  * mlpc-width:                            ARC Options.        (line  313)
! * mlra:                                  ARC Options.        (line  488)
  * mlra <1>:                              FT32 Options.       (line   16)
  * mlra <2>:                              PDP-11 Options.     (line   52)
  * mlra <3>:                              SPARC Options.      (line  111)
  * mlra <4>:                              VAX Options.        (line   22)
! * mlra-priority-compact:                 ARC Options.        (line  496)
! * mlra-priority-noncompact:              ARC Options.        (line  499)
! * mlra-priority-none:                    ARC Options.        (line  493)
! * mlwp:                                  x86 Options.        (line  877)
  * mlxc1-sxc1:                            MIPS Options.       (line  901)
! * mlzcnt:                                x86 Options.        (line  885)
  * MM:                                    Preprocessor Options.
                                                               (line  102)
  * mm:                                    MeP Options.        (line   84)
--- 65604,65620 ----
  * mlow64k:                               Blackfin Options.   (line   67)
  * mlp64:                                 IA-64 Options.      (line  121)
  * mlpc-width:                            ARC Options.        (line  313)
! * mlra:                                  ARC Options.        (line  486)
  * mlra <1>:                              FT32 Options.       (line   16)
  * mlra <2>:                              PDP-11 Options.     (line   52)
  * mlra <3>:                              SPARC Options.      (line  111)
  * mlra <4>:                              VAX Options.        (line   22)
! * mlra-priority-compact:                 ARC Options.        (line  494)
! * mlra-priority-noncompact:              ARC Options.        (line  497)
! * mlra-priority-none:                    ARC Options.        (line  491)
! * mlwp:                                  x86 Options.        (line  886)
  * mlxc1-sxc1:                            MIPS Options.       (line  901)
! * mlzcnt:                                x86 Options.        (line  894)
  * MM:                                    Preprocessor Options.
                                                               (line  102)
  * mm:                                    MeP Options.        (line   84)
*************** look up both forms.
*** 65432,65449 ****
  * mmac <1>:                              Score Options.      (line   21)
  * mmac-24:                               ARC Options.        (line  354)
  * mmac-d16:                              ARC Options.        (line  350)
! * mmac_24:                               ARC Options.        (line  621)
! * mmac_d16:                              ARC Options.        (line  624)
  * mmad:                                  MIPS Options.       (line  618)
  * mmadd4:                                MIPS Options.       (line  906)
! * mmain-is-OS_task:                      AVR Options.        (line  219)
  * mmainkernel:                           Nvidia PTX Options. (line   41)
  * mmalloc64:                             VMS Options.        (line   17)
! * mmanual-endbr:                         x86 Options.        (line 1151)
  * mmax:                                  DEC Alpha Options.  (line  163)
  * mmax-constant-size:                    RX Options.         (line   82)
  * mmax-inline-shift=:                    MSP430 Options.     (line  134)
! * mmax-stack-frame:                      CRIS Options.       (line   22)
  * mmcount-ra-address:                    MIPS Options.       (line  878)
  * mmcu:                                  AVR Options.        (line    9)
  * mmcu <1>:                              MIPS Options.       (line  399)
--- 65622,65640 ----
  * mmac <1>:                              Score Options.      (line   21)
  * mmac-24:                               ARC Options.        (line  354)
  * mmac-d16:                              ARC Options.        (line  350)
! * mmacosx-version-min:                   Darwin Options.     (line   79)
! * mmac_24:                               ARC Options.        (line  616)
! * mmac_d16:                              ARC Options.        (line  619)
  * mmad:                                  MIPS Options.       (line  618)
  * mmadd4:                                MIPS Options.       (line  906)
! * mmain-is-OS_task:                      AVR Options.        (line  235)
  * mmainkernel:                           Nvidia PTX Options. (line   41)
  * mmalloc64:                             VMS Options.        (line   17)
! * mmanual-endbr:                         x86 Options.        (line 1160)
  * mmax:                                  DEC Alpha Options.  (line  163)
  * mmax-constant-size:                    RX Options.         (line   82)
  * mmax-inline-shift=:                    MSP430 Options.     (line  134)
! * mmax-stack-frame:                      CRIS Options.       (line   21)
  * mmcount-ra-address:                    MIPS Options.       (line  878)
  * mmcu:                                  AVR Options.        (line    9)
  * mmcu <1>:                              MIPS Options.       (line  399)
*************** look up both forms.
*** 65452,65489 ****
  * MMD:                                   Preprocessor Options.
                                                               (line  188)
  * mmedia:                                FRV Options.        (line   56)
! * mmedium-calls:                         ARC Options.        (line  408)
  * mmemcpy:                               MicroBlaze Options. (line   13)
  * mmemcpy <1>:                           MIPS Options.       (line  603)
! * mmemcpy-strategy=STRATEGY:             x86 Options.        (line 1352)
  * mmemory-latency:                       DEC Alpha Options.  (line  268)
  * mmemory-model:                         SPARC Options.      (line  348)
! * mmemset-strategy=STRATEGY:             x86 Options.        (line 1364)
  * mmfcrf:                                RS/6000 and PowerPC Options.
                                                               (line   25)
  * mmicromips:                            MIPS Options.       (line  387)
! * mmillicode:                            ARC Options.        (line  502)
  * mminimal-toc:                          RS/6000 and PowerPC Options.
                                                               (line  256)
  * mminmax:                               MeP Options.        (line   87)
! * mmixed-code:                           ARC Options.        (line  516)
  * mmma:                                  RS/6000 and PowerPC Options.
                                                               (line  944)
! * mmmx:                                  x86 Options.        (line  838)
  * mmodel=large:                          M32R/D Options.     (line   33)
  * mmodel=medium:                         M32R/D Options.     (line   27)
  * mmodel=small:                          M32R/D Options.     (line   18)
! * mmovbe:                                x86 Options.        (line 1045)
! * mmovdir64b:                            x86 Options.        (line  906)
! * mmovdiri:                              x86 Options.        (line  905)
! * mmove-max:                             x86 Options.        (line 1003)
  * mmp:                                   C-SKY Options.      (line   87)
  * mmpy:                                  ARC Options.        (line  117)
  * mmpy-option:                           ARC Options.        (line  173)
! * mms-bitfields:                         x86 Options.        (line 1197)
  * mmt:                                   MIPS Options.       (line  395)
  * mmul:                                  RL78 Options.       (line   15)
! * mmul-bug-workaround:                   CRIS Options.       (line   31)
  * mmul.x:                                Moxie Options.      (line   14)
  * mmul32x16:                             ARC Options.        (line  121)
  * mmul64:                                ARC Options.        (line  124)
--- 65643,65680 ----
  * MMD:                                   Preprocessor Options.
                                                               (line  188)
  * mmedia:                                FRV Options.        (line   56)
! * mmedium-calls:                         ARC Options.        (line  406)
  * mmemcpy:                               MicroBlaze Options. (line   13)
  * mmemcpy <1>:                           MIPS Options.       (line  603)
! * mmemcpy-strategy=STRATEGY:             x86 Options.        (line 1361)
  * mmemory-latency:                       DEC Alpha Options.  (line  268)
  * mmemory-model:                         SPARC Options.      (line  348)
! * mmemset-strategy=STRATEGY:             x86 Options.        (line 1373)
  * mmfcrf:                                RS/6000 and PowerPC Options.
                                                               (line   25)
  * mmicromips:                            MIPS Options.       (line  387)
! * mmillicode:                            ARC Options.        (line  500)
  * mminimal-toc:                          RS/6000 and PowerPC Options.
                                                               (line  256)
  * mminmax:                               MeP Options.        (line   87)
! * mmixed-code:                           ARC Options.        (line  514)
  * mmma:                                  RS/6000 and PowerPC Options.
                                                               (line  944)
! * mmmx:                                  x86 Options.        (line  847)
  * mmodel=large:                          M32R/D Options.     (line   33)
  * mmodel=medium:                         M32R/D Options.     (line   27)
  * mmodel=small:                          M32R/D Options.     (line   18)
! * mmovbe:                                x86 Options.        (line 1054)
! * mmovdir64b:                            x86 Options.        (line  915)
! * mmovdiri:                              x86 Options.        (line  914)
! * mmove-max:                             x86 Options.        (line 1012)
  * mmp:                                   C-SKY Options.      (line   87)
  * mmpy:                                  ARC Options.        (line  117)
  * mmpy-option:                           ARC Options.        (line  173)
! * mms-bitfields:                         x86 Options.        (line 1206)
  * mmt:                                   MIPS Options.       (line  395)
  * mmul:                                  RL78 Options.       (line   15)
! * mmul-bug-workaround:                   CRIS Options.       (line   30)
  * mmul.x:                                Moxie Options.      (line   14)
  * mmul32x16:                             ARC Options.        (line  121)
  * mmul64:                                ARC Options.        (line  124)
*************** look up both forms.
*** 65492,65498 ****
                                                               (line  378)
  * mmult:                                 MeP Options.        (line   90)
  * mmult-bug:                             MN10300 Options.    (line    9)
! * mmultcost:                             ARC Options.        (line  576)
  * mmulti-cond-exec:                      FRV Options.        (line  215)
  * mmulticore:                            Blackfin Options.   (line  139)
  * mmultiple:                             RS/6000 and PowerPC Options.
--- 65683,65689 ----
                                                               (line  378)
  * mmult:                                 MeP Options.        (line   90)
  * mmult-bug:                             MN10300 Options.    (line    9)
! * mmultcost:                             ARC Options.        (line  574)
  * mmulti-cond-exec:                      FRV Options.        (line  215)
  * mmulticore:                            Blackfin Options.   (line  139)
  * mmultiple:                             RS/6000 and PowerPC Options.
*************** look up both forms.
*** 65503,65515 ****
                                                               (line  138)
  * mmvme:                                 RS/6000 and PowerPC Options.
                                                               (line  609)
! * mmwait:                                x86 Options.        (line 1059)
! * mmwaitx:                               x86 Options.        (line  894)
  * mn:                                    H8/300 Options.     (line   20)
! * mn-flash:                              AVR Options.        (line  224)
  * mnan=2008:                             MIPS Options.       (line  320)
  * mnan=legacy:                           MIPS Options.       (line  320)
! * mneeded:                               x86 Options.        (line 1603)
  * mneon-for-64bits:                      ARM Options.        (line  923)
  * mnested-cond-exec:                     FRV Options.        (line  230)
  * mnewlib:                               OpenRISC Options.   (line   13)
--- 65694,65706 ----
                                                               (line  138)
  * mmvme:                                 RS/6000 and PowerPC Options.
                                                               (line  609)
! * mmwait:                                x86 Options.        (line 1068)
! * mmwaitx:                               x86 Options.        (line  903)
  * mn:                                    H8/300 Options.     (line   20)
! * mn-flash:                              AVR Options.        (line  240)
  * mnan=2008:                             MIPS Options.       (line  320)
  * mnan=legacy:                           MIPS Options.       (line  320)
! * mneeded:                               x86 Options.        (line 1612)
  * mneon-for-64bits:                      ARM Options.        (line  923)
  * mnested-cond-exec:                     FRV Options.        (line  230)
  * mnewlib:                               OpenRISC Options.   (line   13)
*************** look up both forms.
*** 65522,65528 ****
  * mno-align-double:                      x86 Options.        (line  640)
  * mno-align-int:                         M680x0 Options.     (line  262)
  * mno-align-loops:                       M32R/D Options.     (line   76)
! * mno-align-stringops:                   x86 Options.        (line 1317)
  * mno-allow-string-insns:                RX Options.         (line  150)
  * mno-altivec:                           RS/6000 and PowerPC Options.
                                                               (line  137)
--- 65713,65719 ----
  * mno-align-double:                      x86 Options.        (line  640)
  * mno-align-int:                         M680x0 Options.     (line  262)
  * mno-align-loops:                       M32R/D Options.     (line   76)
! * mno-align-stringops:                   x86 Options.        (line 1326)
  * mno-allow-string-insns:                RX Options.         (line  150)
  * mno-altivec:                           RS/6000 and PowerPC Options.
                                                               (line  137)
*************** look up both forms.
*** 65541,65551 ****
  * mno-bitfield:                          M680x0 Options.     (line  228)
  * mno-branch-likely:                     MIPS Options.       (line  798)
  * mno-branch-predict:                    MMIX Options.       (line   48)
! * mno-brcc:                              ARC Options.        (line  444)
  * mno-bwx:                               DEC Alpha Options.  (line  163)
  * mno-bypass-cache:                      Nios II Options.    (line  103)
  * mno-cache-volatile:                    Nios II Options.    (line  109)
! * mno-call-ms2sysv-xlogues:              x86 Options.        (line 1157)
  * mno-callgraph-data:                    MCore Options.      (line   31)
  * mno-cbcond:                            SPARC Options.      (line  260)
  * mno-check-zero-division:               MIPS Options.       (line  570)
--- 65732,65742 ----
  * mno-bitfield:                          M680x0 Options.     (line  228)
  * mno-branch-likely:                     MIPS Options.       (line  798)
  * mno-branch-predict:                    MMIX Options.       (line   48)
! * mno-brcc:                              ARC Options.        (line  442)
  * mno-bwx:                               DEC Alpha Options.  (line  163)
  * mno-bypass-cache:                      Nios II Options.    (line  103)
  * mno-cache-volatile:                    Nios II Options.    (line  109)
! * mno-call-ms2sysv-xlogues:              x86 Options.        (line 1166)
  * mno-callgraph-data:                    MCore Options.      (line   31)
  * mno-cbcond:                            SPARC Options.      (line  260)
  * mno-check-zero-division:               MIPS Options.       (line  570)
*************** look up both forms.
*** 65555,65564 ****
  * mno-cmpb:                              RS/6000 and PowerPC Options.
                                                               (line   25)
  * mno-co-re:                             eBPF Options.       (line   60)
! * mno-cond-exec:                         ARC Options.        (line  458)
  * mno-cond-exec <1>:                     FRV Options.        (line  194)
  * mno-cond-move:                         FRV Options.        (line  166)
! * mno-const-align:                       CRIS Options.       (line   54)
  * mno-const16:                           Xtensa Options.     (line   10)
  * mno-crc:                               MIPS Options.       (line  416)
  * mno-crt0:                              MN10300 Options.    (line   43)
--- 65746,65755 ----
  * mno-cmpb:                              RS/6000 and PowerPC Options.
                                                               (line   25)
  * mno-co-re:                             eBPF Options.       (line   60)
! * mno-cond-exec:                         ARC Options.        (line  456)
  * mno-cond-exec <1>:                     FRV Options.        (line  194)
  * mno-cond-move:                         FRV Options.        (line  166)
! * mno-const-align:                       CRIS Options.       (line   53)
  * mno-const16:                           Xtensa Options.     (line   10)
  * mno-crc:                               MIPS Options.       (line  416)
  * mno-crt0:                              MN10300 Options.    (line   43)
*************** look up both forms.
*** 65567,65577 ****
                                                               (line  178)
  * mno-csync-anomaly:                     Blackfin Options.   (line   63)
  * mno-custom-INSN:                       Nios II Options.    (line  139)
! * mno-data-align:                        CRIS Options.       (line   54)
  * mno-debug:                             S/390 and zSeries Options.
                                                               (line  144)
! * mno-default:                           x86 Options.        (line  971)
! * mno-direct-extern-access:              x86 Options.        (line 1608)
  * mno-direct-extern-access <1>:          x86 Function Attributes.
                                                               (line  712)
  * mno-disable-callt:                     V850 Options.       (line   92)
--- 65758,65768 ----
                                                               (line  178)
  * mno-csync-anomaly:                     Blackfin Options.   (line   63)
  * mno-custom-INSN:                       Nios II Options.    (line  139)
! * mno-data-align:                        CRIS Options.       (line   53)
  * mno-debug:                             S/390 and zSeries Options.
                                                               (line  144)
! * mno-default:                           x86 Options.        (line  980)
! * mno-direct-extern-access:              x86 Options.        (line 1617)
  * mno-direct-extern-access <1>:          x86 Function Attributes.
                                                               (line  712)
  * mno-disable-callt:                     V850 Options.       (line   92)
*************** look up both forms.
*** 65669,65675 ****
  * mno-int32:                             PDP-11 Options.     (line   33)
  * mno-interlink-compressed:              MIPS Options.       (line  135)
  * mno-interlink-mips16:                  MIPS Options.       (line  147)
! * mno-interrupts:                        AVR Options.        (line  227)
  * mno-isel:                              RS/6000 and PowerPC Options.
                                                               (line  167)
  * mno-jsr:                               RX Options.         (line  169)
--- 65860,65866 ----
  * mno-int32:                             PDP-11 Options.     (line   33)
  * mno-interlink-compressed:              MIPS Options.       (line  135)
  * mno-interlink-mips16:                  MIPS Options.       (line  147)
! * mno-interrupts:                        AVR Options.        (line  243)
  * mno-isel:                              RS/6000 and PowerPC Options.
                                                               (line  167)
  * mno-jsr:                               RX Options.         (line  169)
*************** look up both forms.
*** 65717,65725 ****
  * Mno-modules:                           Preprocessor Options.
                                                               (line  132)
  * mno-mpy:                               ARC Options.        (line  117)
! * mno-ms-bitfields:                      x86 Options.        (line 1197)
  * mno-mt:                                MIPS Options.       (line  395)
! * mno-mul-bug-workaround:                CRIS Options.       (line   31)
  * mno-muladd:                            FRV Options.        (line   68)
  * mno-mulhw:                             RS/6000 and PowerPC Options.
                                                               (line  378)
--- 65908,65916 ----
  * Mno-modules:                           Preprocessor Options.
                                                               (line  132)
  * mno-mpy:                               ARC Options.        (line  117)
! * mno-ms-bitfields:                      x86 Options.        (line 1206)
  * mno-mt:                                MIPS Options.       (line  395)
! * mno-mul-bug-workaround:                CRIS Options.       (line   30)
  * mno-muladd:                            FRV Options.        (line   68)
  * mno-mulhw:                             RS/6000 and PowerPC Options.
                                                               (line  378)
*************** look up both forms.
*** 65770,65786 ****
  * mno-privileged:                        RS/6000 and PowerPC Options.
                                                               (line  955)
  * mno-prolog-function:                   V850 Options.       (line   23)
! * mno-prologue-epilogue:                 CRIS Options.       (line   70)
  * mno-prototype:                         RS/6000 and PowerPC Options.
                                                               (line  593)
! * mno-push-args:                         x86 Options.        (line 1174)
  * mno-quad-memory:                       RS/6000 and PowerPC Options.
                                                               (line  203)
  * mno-quad-memory-atomic:                RS/6000 and PowerPC Options.
                                                               (line  209)
  * mno-readonly-in-sdata:                 RS/6000 and PowerPC Options.
                                                               (line  684)
! * mno-red-zone:                          x86 Options.        (line 1562)
  * mno-register-names:                    IA-64 Options.      (line   37)
  * mno-regnames:                          RS/6000 and PowerPC Options.
                                                               (line  722)
--- 65961,65977 ----
  * mno-privileged:                        RS/6000 and PowerPC Options.
                                                               (line  955)
  * mno-prolog-function:                   V850 Options.       (line   23)
! * mno-prologue-epilogue:                 CRIS Options.       (line   69)
  * mno-prototype:                         RS/6000 and PowerPC Options.
                                                               (line  593)
! * mno-push-args:                         x86 Options.        (line 1183)
  * mno-quad-memory:                       RS/6000 and PowerPC Options.
                                                               (line  203)
  * mno-quad-memory-atomic:                RS/6000 and PowerPC Options.
                                                               (line  209)
  * mno-readonly-in-sdata:                 RS/6000 and PowerPC Options.
                                                               (line  684)
! * mno-red-zone:                          x86 Options.        (line 1571)
  * mno-register-names:                    IA-64 Options.      (line   37)
  * mno-regnames:                          RS/6000 and PowerPC Options.
                                                               (line  722)
*************** look up both forms.
*** 65808,65814 ****
  * mno-sched-prefer-non-control-spec-insns: IA-64 Options.    (line  178)
  * mno-sched-prefer-non-data-spec-insns:  IA-64 Options.      (line  171)
  * mno-sched-prolog:                      ARM Options.        (line   32)
! * mno-sdata:                             ARC Options.        (line  422)
  * mno-sdata <1>:                         IA-64 Options.      (line   42)
  * mno-sdata <2>:                         RS/6000 and PowerPC Options.
                                                               (line  679)
--- 65999,66005 ----
  * mno-sched-prefer-non-control-spec-insns: IA-64 Options.    (line  178)
  * mno-sched-prefer-non-data-spec-insns:  IA-64 Options.      (line  171)
  * mno-sched-prolog:                      ARM Options.        (line   32)
! * mno-sdata:                             ARC Options.        (line  420)
  * mno-sdata <1>:                         IA-64 Options.      (line   42)
  * mno-sdata <2>:                         RS/6000 and PowerPC Options.
                                                               (line  679)
*************** look up both forms.
*** 65816,65822 ****
  * mno-serialize-volatile:                Xtensa Options.     (line   35)
  * mno-setlb:                             MN10300 Options.    (line   69)
  * mno-short:                             M680x0 Options.     (line  223)
! * mno-side-effects:                      CRIS Options.       (line   45)
  * mno-sim:                               RX Options.         (line   71)
  * mno-single-exit:                       MMIX Options.       (line   65)
  * mno-slow-bytes:                        MCore Options.      (line   35)
--- 66007,66013 ----
  * mno-serialize-volatile:                Xtensa Options.     (line   35)
  * mno-setlb:                             MN10300 Options.    (line   69)
  * mno-short:                             M680x0 Options.     (line  223)
! * mno-side-effects:                      CRIS Options.       (line   44)
  * mno-sim:                               RX Options.         (line   71)
  * mno-single-exit:                       MMIX Options.       (line   65)
  * mno-slow-bytes:                        MCore Options.      (line   35)
*************** look up both forms.
*** 65831,65837 ****
  * mno-split-addresses:                   MIPS Options.       (line  555)
  * mno-split-lohi:                        Adapteva Epiphany Options.
                                                               (line  109)
! * mno-stack-align:                       CRIS Options.       (line   54)
  * mno-stack-bias:                        SPARC Options.      (line  372)
  * mno-std-struct-return:                 SPARC Options.      (line  102)
  * mno-strict-align:                      AArch64 Options.    (line   52)
--- 66022,66028 ----
  * mno-split-addresses:                   MIPS Options.       (line  555)
  * mno-split-lohi:                        Adapteva Epiphany Options.
                                                               (line  109)
! * mno-stack-align:                       CRIS Options.       (line   53)
  * mno-stack-bias:                        SPARC Options.      (line  372)
  * mno-std-struct-return:                 SPARC Options.      (line  102)
  * mno-strict-align:                      AArch64 Options.    (line   52)
*************** look up both forms.
*** 65873,65879 ****
  * mno-vis4b:                             SPARC Options.      (line  251)
  * mno-vliw-branch:                       FRV Options.        (line  208)
  * mno-volatile-asm-stop:                 IA-64 Options.      (line   32)
! * mno-volatile-cache:                    ARC Options.        (line  431)
  * mno-vrsave:                            RS/6000 and PowerPC Options.
                                                               (line  153)
  * mno-vsx:                               RS/6000 and PowerPC Options.
--- 66064,66070 ----
  * mno-vis4b:                             SPARC Options.      (line  251)
  * mno-vliw-branch:                       FRV Options.        (line  208)
  * mno-volatile-asm-stop:                 IA-64 Options.      (line   32)
! * mno-volatile-cache:                    ARC Options.        (line  429)
  * mno-vrsave:                            RS/6000 and PowerPC Options.
                                                               (line  153)
  * mno-vsx:                               RS/6000 and PowerPC Options.
*************** look up both forms.
*** 65898,65904 ****
  * mnomacsave:                            SH Options.         (line  160)
  * mnop-fun-dllimport:                    x86 Windows Options.
                                                               (line   22)
! * mnop-mcount:                           x86 Options.        (line 1404)
  * mnopm:                                 FT32 Options.       (line   29)
  * mnops:                                 Adapteva Epiphany Options.
                                                               (line   26)
--- 66089,66095 ----
  * mnomacsave:                            SH Options.         (line  160)
  * mnop-fun-dllimport:                    x86 Windows Options.
                                                               (line   22)
! * mnop-mcount:                           x86 Options.        (line 1413)
  * mnopm:                                 FT32 Options.       (line   29)
  * mnops:                                 Adapteva Epiphany Options.
                                                               (line   26)
*************** look up both forms.
*** 65906,65913 ****
  * modd-spreg:                            MIPS Options.       (line  293)
  * momit-leaf-frame-pointer:              AArch64 Options.    (line   58)
  * momit-leaf-frame-pointer <1>:          Blackfin Options.   (line   43)
! * momit-leaf-frame-pointer <2>:          x86 Options.        (line 1368)
! * mone-byte-bool:                        Darwin Options.     (line   90)
  * moptimize:                             Nvidia PTX Options. (line   45)
  * moptimize-membar:                      FRV Options.        (line  244)
  * moptimize-membar <1>:                  FRV Options.        (line  249)
--- 66097,66104 ----
  * modd-spreg:                            MIPS Options.       (line  293)
  * momit-leaf-frame-pointer:              AArch64 Options.    (line   58)
  * momit-leaf-frame-pointer <1>:          Blackfin Options.   (line   43)
! * momit-leaf-frame-pointer <2>:          x86 Options.        (line 1377)
! * mone-byte-bool:                        Darwin Options.     (line   98)
  * moptimize:                             Nvidia PTX Options. (line   45)
  * moptimize-membar:                      FRV Options.        (line  244)
  * moptimize-membar <1>:                  FRV Options.        (line  249)
*************** look up both forms.
*** 65926,65937 ****
  * mpc32:                                 x86 Options.        (line  762)
  * mpc64:                                 x86 Options.        (line  762)
  * mpc80:                                 x86 Options.        (line  762)
! * mpclmul:                               x86 Options.        (line  860)
! * mpconfig:                              x86 Options.        (line  868)
  * mpcrel:                                M680x0 Options.     (line  273)
  * mpcrel <1>:                            RS/6000 and PowerPC Options.
                                                               (line  932)
! * mpdebug:                               CRIS Options.       (line   35)
  * mpe:                                   RS/6000 and PowerPC Options.
                                                               (line  310)
  * mpe-aligned-commons:                   x86 Windows Options.
--- 66117,66128 ----
  * mpc32:                                 x86 Options.        (line  762)
  * mpc64:                                 x86 Options.        (line  762)
  * mpc80:                                 x86 Options.        (line  762)
! * mpclmul:                               x86 Options.        (line  869)
! * mpconfig:                              x86 Options.        (line  877)
  * mpcrel:                                M680x0 Options.     (line  273)
  * mpcrel <1>:                            RS/6000 and PowerPC Options.
                                                               (line  932)
! * mpdebug:                               CRIS Options.       (line   34)
  * mpe:                                   RS/6000 and PowerPC Options.
                                                               (line  310)
  * mpe-aligned-commons:                   x86 Windows Options.
*************** look up both forms.
*** 65940,65946 ****
  * mpic-data-is-text-relative <1>:        MicroBlaze Options. (line   92)
  * mpic-register:                         ARM Options.        (line  787)
  * mpid:                                  RX Options.         (line  117)
! * mpku:                                  x86 Options.        (line  896)
  * mplt:                                  MIPS Options.       (line  219)
  * mpltseq:                               RS/6000 and PowerPC Options.
                                                               (line  765)
--- 66131,66137 ----
  * mpic-data-is-text-relative <1>:        MicroBlaze Options. (line   92)
  * mpic-register:                         ARM Options.        (line  787)
  * mpid:                                  RX Options.         (line  117)
! * mpku:                                  x86 Options.        (line  905)
  * mplt:                                  MIPS Options.       (line  219)
  * mpltseq:                               RS/6000 and PowerPC Options.
                                                               (line  765)
*************** look up both forms.
*** 65949,65955 ****
                                                               (line  878)
  * mpoke-function-name:                   ARM Options.        (line  802)
  * mpopc:                                 SPARC Options.      (line  281)
! * mpopcnt:                               x86 Options.        (line  880)
  * mpopcntb:                              RS/6000 and PowerPC Options.
                                                               (line   25)
  * mpopcntd:                              RS/6000 and PowerPC Options.
--- 66140,66146 ----
                                                               (line  878)
  * mpoke-function-name:                   ARM Options.        (line  802)
  * mpopc:                                 SPARC Options.      (line  281)
! * mpopcnt:                               x86 Options.        (line  889)
  * mpopcntb:                              RS/6000 and PowerPC Options.
                                                               (line   25)
  * mpopcntd:                              RS/6000 and PowerPC Options.
*************** look up both forms.
*** 65969,66033 ****
                                                               (line   25)
  * mpowerpc64:                            RS/6000 and PowerPC Options.
                                                               (line   25)
! * mprefer-avx128:                        x86 Options.        (line  995)
  * mprefer-short-insn-regs:               Adapteva Epiphany Options.
                                                               (line   13)
! * mprefer-vector-width:                  x86 Options.        (line  999)
  * mprefergot:                            SH Options.         (line  268)
  * mpreferred-stack-boundary:             RISC-V Options.     (line  101)
! * mpreferred-stack-boundary <1>:         x86 Options.        (line  792)
! * mprefetchwt1:                          x86 Options.        (line  873)
  * mprefixed:                             RS/6000 and PowerPC Options.
                                                               (line  938)
  * mpretend-cmove:                        SH Options.         (line  383)
! * mprfchw:                               x86 Options.        (line  871)
  * mprint-tune-info:                      ARM Options.        (line  944)
  * mprioritize-restricted-insns:          RS/6000 and PowerPC Options.
                                                               (line  457)
  * mprivileged:                           RS/6000 and PowerPC Options.
                                                               (line  955)
  * mprolog-function:                      V850 Options.       (line   23)
! * mprologue-epilogue:                    CRIS Options.       (line   70)
  * mprototype:                            RS/6000 and PowerPC Options.
                                                               (line  593)
! * mptwrite:                              x86 Options.        (line  864)
  * mptx:                                  Nvidia PTX Options. (line   30)
  * mpure-code:                            ARM Options.        (line  954)
! * mpush-args:                            x86 Options.        (line 1174)
  * mpushpop:                              C-SKY Options.      (line  130)
  * MQ:                                    Preprocessor Options.
                                                               (line  162)
! * mq-class:                              ARC Options.        (line  519)
  * mquad-memory:                          RS/6000 and PowerPC Options.
                                                               (line  203)
  * mquad-memory-atomic:                   RS/6000 and PowerPC Options.
                                                               (line  209)
  * mr0rel-sec:                            Nios II Options.    (line   76)
  * mr10k-cache-barrier:                   MIPS Options.       (line  720)
! * mRcq:                                  ARC Options.        (line  523)
! * mRcw:                                  ARC Options.        (line  527)
! * mrdpid:                                x86 Options.        (line  872)
! * mrdrnd:                                x86 Options.        (line  865)
! * mrdseed:                               x86 Options.        (line  874)
  * mreadonly-in-sdata:                    RS/6000 and PowerPC Options.
                                                               (line  684)
  * mrecip:                                RS/6000 and PowerPC Options.
                                                               (line  785)
! * mrecip <1>:                            x86 Options.        (line 1064)
  * mrecip-precision:                      RS/6000 and PowerPC Options.
                                                               (line  842)
  * mrecip=opt:                            RS/6000 and PowerPC Options.
                                                               (line  798)
! * mrecip=opt <1>:                        x86 Options.        (line 1086)
! * mrecord-mcount:                        x86 Options.        (line 1398)
! * mrecord-return:                        x86 Options.        (line 1418)
! * mred-zone:                             x86 Options.        (line 1562)
  * mreduced-regs:                         NDS32 Options.      (line   15)
  * mregister-names:                       IA-64 Options.      (line   37)
  * mregnames:                             RS/6000 and PowerPC Options.
                                                               (line  722)
  * mregparm:                              x86 Options.        (line  732)
! * mrelax:                                AVR Options.        (line  231)
  * mrelax <1>:                            H8/300 Options.     (line    9)
  * mrelax <2>:                            MN10300 Options.    (line   46)
  * mrelax <3>:                            MSP430 Options.     (line   88)
--- 66160,66224 ----
                                                               (line   25)
  * mpowerpc64:                            RS/6000 and PowerPC Options.
                                                               (line   25)
! * mprefer-avx128:                        x86 Options.        (line 1004)
  * mprefer-short-insn-regs:               Adapteva Epiphany Options.
                                                               (line   13)
! * mprefer-vector-width:                  x86 Options.        (line 1008)
  * mprefergot:                            SH Options.         (line  268)
  * mpreferred-stack-boundary:             RISC-V Options.     (line  101)
! * mpreferred-stack-boundary <1>:         x86 Options.        (line  801)
! * mprefetchwt1:                          x86 Options.        (line  882)
  * mprefixed:                             RS/6000 and PowerPC Options.
                                                               (line  938)
  * mpretend-cmove:                        SH Options.         (line  383)
! * mprfchw:                               x86 Options.        (line  880)
  * mprint-tune-info:                      ARM Options.        (line  944)
  * mprioritize-restricted-insns:          RS/6000 and PowerPC Options.
                                                               (line  457)
  * mprivileged:                           RS/6000 and PowerPC Options.
                                                               (line  955)
  * mprolog-function:                      V850 Options.       (line   23)
! * mprologue-epilogue:                    CRIS Options.       (line   69)
  * mprototype:                            RS/6000 and PowerPC Options.
                                                               (line  593)
! * mptwrite:                              x86 Options.        (line  873)
  * mptx:                                  Nvidia PTX Options. (line   30)
  * mpure-code:                            ARM Options.        (line  954)
! * mpush-args:                            x86 Options.        (line 1183)
  * mpushpop:                              C-SKY Options.      (line  130)
  * MQ:                                    Preprocessor Options.
                                                               (line  162)
! * mq-class:                              ARC Options.        (line  517)
  * mquad-memory:                          RS/6000 and PowerPC Options.
                                                               (line  203)
  * mquad-memory-atomic:                   RS/6000 and PowerPC Options.
                                                               (line  209)
  * mr0rel-sec:                            Nios II Options.    (line   76)
  * mr10k-cache-barrier:                   MIPS Options.       (line  720)
! * mRcq:                                  ARC Options.        (line  521)
! * mRcw:                                  ARC Options.        (line  525)
! * mrdpid:                                x86 Options.        (line  881)
! * mrdrnd:                                x86 Options.        (line  874)
! * mrdseed:                               x86 Options.        (line  883)
  * mreadonly-in-sdata:                    RS/6000 and PowerPC Options.
                                                               (line  684)
  * mrecip:                                RS/6000 and PowerPC Options.
                                                               (line  785)
! * mrecip <1>:                            x86 Options.        (line 1073)
  * mrecip-precision:                      RS/6000 and PowerPC Options.
                                                               (line  842)
  * mrecip=opt:                            RS/6000 and PowerPC Options.
                                                               (line  798)
! * mrecip=opt <1>:                        x86 Options.        (line 1095)
! * mrecord-mcount:                        x86 Options.        (line 1407)
! * mrecord-return:                        x86 Options.        (line 1427)
! * mred-zone:                             x86 Options.        (line 1571)
  * mreduced-regs:                         NDS32 Options.      (line   15)
  * mregister-names:                       IA-64 Options.      (line   37)
  * mregnames:                             RS/6000 and PowerPC Options.
                                                               (line  722)
  * mregparm:                              x86 Options.        (line  732)
! * mrelax:                                AVR Options.        (line  247)
  * mrelax <1>:                            H8/300 Options.     (line    9)
  * mrelax <2>:                            MN10300 Options.    (line   46)
  * mrelax <3>:                            MSP430 Options.     (line   88)
*************** look up both forms.
*** 66035,66041 ****
  * mrelax <5>:                            RX Options.         (line   95)
  * mrelax <6>:                            SH Options.         (line  137)
  * mrelax <7>:                            V850 Options.       (line  103)
! * mrelax-cmpxchg-loop:                   x86 Options.        (line 1475)
  * mrelax-immediate:                      MCore Options.      (line   19)
  * mrelax-pic-calls:                      MIPS Options.       (line  865)
  * mrelocatable:                          RS/6000 and PowerPC Options.
--- 66226,66232 ----
  * mrelax <5>:                            RX Options.         (line   95)
  * mrelax <6>:                            SH Options.         (line  137)
  * mrelax <7>:                            V850 Options.       (line  103)
! * mrelax-cmpxchg-loop:                   x86 Options.        (line 1484)
  * mrelax-immediate:                      MCore Options.      (line   19)
  * mrelax-pic-calls:                      MIPS Options.       (line  865)
  * mrelocatable:                          RS/6000 and PowerPC Options.
*************** look up both forms.
*** 66050,66056 ****
  * mrgf-banked-regs:                      ARC Options.        (line  304)
  * mrh850-abi:                            V850 Options.       (line  127)
  * mrl78:                                 RL78 Options.       (line   62)
! * mrmw:                                  AVR Options.        (line  245)
  * mrop-protect:                          RS/6000 and PowerPC Options.
                                                               (line  949)
  * mror:                                  OpenRISC Options.   (line   49)
--- 66241,66247 ----
  * mrgf-banked-regs:                      ARC Options.        (line  304)
  * mrh850-abi:                            V850 Options.       (line  127)
  * mrl78:                                 RL78 Options.       (line   62)
! * mrmw:                                  AVR Options.        (line  261)
  * mrop-protect:                          RS/6000 and PowerPC Options.
                                                               (line  949)
  * mror:                                  OpenRISC Options.   (line   49)
*************** look up both forms.
*** 66061,66073 ****
  * mrtd <1>:                              x86 Options.        (line  708)
  * mrtd <2>:                              x86 Function Attributes.
                                                               (line    9)
! * mrtm:                                  x86 Options.        (line  891)
  * mrtp:                                  VxWorks Options.    (line   11)
  * mrtsc:                                 ARC Options.        (line  358)
  * ms:                                    H8/300 Options.     (line   17)
  * ms <1>:                                MeP Options.        (line  100)
  * ms2600:                                H8/300 Options.     (line   24)
! * msahf:                                 x86 Options.        (line 1035)
  * msatur:                                MeP Options.        (line  105)
  * msave-acc-in-interrupts:               RX Options.         (line  109)
  * msave-mduc-in-interrupts:              RL78 Options.       (line   79)
--- 66252,66264 ----
  * mrtd <1>:                              x86 Options.        (line  708)
  * mrtd <2>:                              x86 Function Attributes.
                                                               (line    9)
! * mrtm:                                  x86 Options.        (line  900)
  * mrtp:                                  VxWorks Options.    (line   11)
  * mrtsc:                                 ARC Options.        (line  358)
  * ms:                                    H8/300 Options.     (line   17)
  * ms <1>:                                MeP Options.        (line  100)
  * ms2600:                                H8/300 Options.     (line   24)
! * msahf:                                 x86 Options.        (line 1044)
  * msatur:                                MeP Options.        (line  105)
  * msave-acc-in-interrupts:               RX Options.         (line  109)
  * msave-mduc-in-interrupts:              RL78 Options.       (line   79)
*************** look up both forms.
*** 66100,66106 ****
  * mscore7:                               Score Options.      (line   31)
  * mscore7d:                              Score Options.      (line   35)
  * msda:                                  V850 Options.       (line   40)
! * msdata:                                ARC Options.        (line  422)
  * msdata <1>:                            IA-64 Options.      (line   42)
  * msdata <2>:                            RS/6000 and PowerPC Options.
                                                               (line  666)
--- 66291,66297 ----
  * mscore7:                               Score Options.      (line   31)
  * mscore7d:                              Score Options.      (line   35)
  * msda:                                  V850 Options.       (line   40)
! * msdata:                                ARC Options.        (line  420)
  * msdata <1>:                            IA-64 Options.      (line   42)
  * msdata <2>:                            RS/6000 and PowerPC Options.
                                                               (line  666)
*************** look up both forms.
*** 66128,66147 ****
  * msel-sched-dont-check-control-spec:    IA-64 Options.      (line  207)
  * msep-data:                             Blackfin Options.   (line  107)
  * msep-data <1>:                         Blackfin Options.   (line  113)
! * mserialize:                            x86 Options.        (line  917)
  * mserialize-volatile:                   Xtensa Options.     (line   35)
  * msetlb:                                MN10300 Options.    (line   64)
  * msext:                                 OpenRISC Options.   (line   59)
  * msfimm:                                OpenRISC Options.   (line   63)
! * msgx:                                  x86 Options.        (line  875)
! * msha:                                  x86 Options.        (line  858)
  * mshared-library-id:                    Blackfin Options.   (line  100)
  * mshftimm:                              OpenRISC Options.   (line   68)
  * mshort:                                M680x0 Options.     (line  217)
! * mshort-calls:                          AVR Options.        (line  249)
  * mshorten-memrefs:                      RISC-V Options.     (line  121)
! * mshstk:                                x86 Options.        (line 1049)
! * mside-effects:                         CRIS Options.       (line   45)
  * msign-extend-enabled:                  LM32 Options.       (line   18)
  * msign-return-address:                  AArch64 Options.    (line  280)
  * msilicon-errata:                       MSP430 Options.     (line  159)
--- 66319,66338 ----
  * msel-sched-dont-check-control-spec:    IA-64 Options.      (line  207)
  * msep-data:                             Blackfin Options.   (line  107)
  * msep-data <1>:                         Blackfin Options.   (line  113)
! * mserialize:                            x86 Options.        (line  926)
  * mserialize-volatile:                   Xtensa Options.     (line   35)
  * msetlb:                                MN10300 Options.    (line   64)
  * msext:                                 OpenRISC Options.   (line   59)
  * msfimm:                                OpenRISC Options.   (line   63)
! * msgx:                                  x86 Options.        (line  884)
! * msha:                                  x86 Options.        (line  867)
  * mshared-library-id:                    Blackfin Options.   (line  100)
  * mshftimm:                              OpenRISC Options.   (line   68)
  * mshort:                                M680x0 Options.     (line  217)
! * mshort-calls:                          AVR Options.        (line  265)
  * mshorten-memrefs:                      RISC-V Options.     (line  121)
! * mshstk:                                x86 Options.        (line 1058)
! * mside-effects:                         CRIS Options.       (line   44)
  * msign-extend-enabled:                  LM32 Options.       (line   18)
  * msign-return-address:                  AArch64 Options.    (line  280)
  * msilicon-errata:                       MSP430 Options.     (line  159)
*************** look up both forms.
*** 66168,66175 ****
  * msingle-pic-base <1>:                  RS/6000 and PowerPC Options.
                                                               (line  451)
  * msio:                                  HPPA Options.       (line  105)
! * msize-level:                           ARC Options.        (line  531)
! * mskip-rax-setup:                       x86 Options.        (line 1431)
  * mslow-bytes:                           MCore Options.      (line   35)
  * mslow-flash-data:                      ARM Options.        (line  926)
  * msmall:                                MSP430 Options.     (line   85)
--- 66359,66366 ----
  * msingle-pic-base <1>:                  RS/6000 and PowerPC Options.
                                                               (line  451)
  * msio:                                  HPPA Options.       (line  105)
! * msize-level:                           ARC Options.        (line  529)
! * mskip-rax-setup:                       x86 Options.        (line 1440)
  * mslow-bytes:                           MCore Options.      (line   35)
  * mslow-flash-data:                      ARM Options.        (line  926)
  * msmall:                                MSP430 Options.     (line   85)
*************** look up both forms.
*** 66211,66217 ****
  * msoft-mul:                             OpenRISC Options.   (line   24)
  * msoft-quad-float:                      SPARC Options.      (line   59)
  * msoft-stack:                           Nvidia PTX Options. (line   49)
! * msp8:                                  AVR Options.        (line  256)
  * mspace:                                V850 Options.       (line   30)
  * mspace-regs:                           HPPA Options.       (line   45)
  * mspecld-anomaly:                       Blackfin Options.   (line   48)
--- 66402,66408 ----
  * msoft-mul:                             OpenRISC Options.   (line   24)
  * msoft-quad-float:                      SPARC Options.      (line   59)
  * msoft-stack:                           Nvidia PTX Options. (line   49)
! * msp8:                                  AVR Options.        (line  272)
  * mspace:                                V850 Options.       (line   30)
  * mspace-regs:                           HPPA Options.       (line   45)
  * mspecld-anomaly:                       Blackfin Options.   (line   48)
*************** look up both forms.
*** 66219,66226 ****
  * mspfp:                                 ARC Options.        (line  132)
  * mspfp-compact:                         ARC Options.        (line  133)
  * mspfp-fast:                            ARC Options.        (line  137)
! * mspfp_compact:                         ARC Options.        (line  627)
! * mspfp_fast:                            ARC Options.        (line  630)
  * msplit:                                PDP-11 Options.     (line   40)
  * msplit-addresses:                      MIPS Options.       (line  555)
  * msplit-lohi:                           Adapteva Epiphany Options.
--- 66410,66417 ----
  * mspfp:                                 ARC Options.        (line  132)
  * mspfp-compact:                         ARC Options.        (line  133)
  * mspfp-fast:                            ARC Options.        (line  137)
! * mspfp_compact:                         ARC Options.        (line  622)
! * mspfp_fast:                            ARC Options.        (line  625)
  * msplit:                                PDP-11 Options.     (line   40)
  * msplit-addresses:                      MIPS Options.       (line  555)
  * msplit-lohi:                           Adapteva Epiphany Options.
*************** look up both forms.
*** 66228,66244 ****
  * msplit-vecmove-early:                  Adapteva Epiphany Options.
                                                               (line  126)
  * msram-ecc:                             AMD GCN Options.    (line   25)
! * msse:                                  x86 Options.        (line  839)
! * msse2:                                 x86 Options.        (line  840)
! * msse2avx:                              x86 Options.        (line 1386)
! * msse3:                                 x86 Options.        (line  841)
! * msse4:                                 x86 Options.        (line  843)
! * msse4.1:                               x86 Options.        (line  845)
! * msse4.2:                               x86 Options.        (line  846)
! * msse4a:                                x86 Options.        (line  844)
  * msseregparm:                           x86 Options.        (line  743)
! * mssse3:                                x86 Options.        (line  842)
! * mstack-align:                          CRIS Options.       (line   54)
  * mstack-bias:                           SPARC Options.      (line  372)
  * mstack-check-l1:                       Blackfin Options.   (line   74)
  * mstack-guard:                          S/390 and zSeries Options.
--- 66419,66435 ----
  * msplit-vecmove-early:                  Adapteva Epiphany Options.
                                                               (line  126)
  * msram-ecc:                             AMD GCN Options.    (line   25)
! * msse:                                  x86 Options.        (line  848)
! * msse2:                                 x86 Options.        (line  849)
! * msse2avx:                              x86 Options.        (line 1395)
! * msse3:                                 x86 Options.        (line  850)
! * msse4:                                 x86 Options.        (line  852)
! * msse4.1:                               x86 Options.        (line  854)
! * msse4.2:                               x86 Options.        (line  855)
! * msse4a:                                x86 Options.        (line  853)
  * msseregparm:                           x86 Options.        (line  743)
! * mssse3:                                x86 Options.        (line  851)
! * mstack-align:                          CRIS Options.       (line   53)
  * mstack-bias:                           SPARC Options.      (line  372)
  * mstack-check-l1:                       Blackfin Options.   (line   74)
  * mstack-guard:                          S/390 and zSeries Options.
*************** look up both forms.
*** 66251,66286 ****
  * mstack-protector-guard <2>:            RISC-V Options.     (line  185)
  * mstack-protector-guard <3>:            RS/6000 and PowerPC Options.
                                                               (line  916)
! * mstack-protector-guard <4>:            x86 Options.        (line 1457)
  * mstack-protector-guard-offset:         AArch64 Options.    (line   64)
  * mstack-protector-guard-offset <1>:     ARM Options.        (line  976)
  * mstack-protector-guard-offset <2>:     RISC-V Options.     (line  185)
  * mstack-protector-guard-offset <3>:     RS/6000 and PowerPC Options.
                                                               (line  916)
! * mstack-protector-guard-offset <4>:     x86 Options.        (line 1457)
  * mstack-protector-guard-reg:            AArch64 Options.    (line   64)
  * mstack-protector-guard-reg <1>:        RISC-V Options.     (line  185)
  * mstack-protector-guard-reg <2>:        RS/6000 and PowerPC Options.
                                                               (line  916)
! * mstack-protector-guard-reg <3>:        x86 Options.        (line 1457)
  * mstack-protector-guard-symbol:         RS/6000 and PowerPC Options.
                                                               (line  916)
  * mstack-size:                           AMD GCN Options.    (line   31)
  * mstack-size <1>:                       C-SKY Options.      (line  150)
  * mstack-size <2>:                       S/390 and zSeries Options.
                                                               (line  202)
! * mstackrealign:                         x86 Options.        (line  783)
  * mstd-struct-return:                    SPARC Options.      (line  102)
! * mstore-max:                            x86 Options.        (line 1008)
  * mstrict-align:                         AArch64 Options.    (line   52)
  * mstrict-align <1>:                     M680x0 Options.     (line  281)
  * mstrict-align <2>:                     RISC-V Options.     (line  130)
  * mstrict-align <3>:                     RS/6000 and PowerPC Options.
                                                               (line  403)
! * mstrict-X:                             AVR Options.        (line  269)
  * mstring-compare-inline-limit:          RS/6000 and PowerPC Options.
                                                               (line  708)
! * mstringop-strategy=ALG:                x86 Options.        (line 1334)
  * mstructure-size-boundary:              ARM Options.        (line  736)
  * msubxc:                                SPARC Options.      (line  288)
  * msv-mode:                              Visium Options.     (line   52)
--- 66442,66477 ----
  * mstack-protector-guard <2>:            RISC-V Options.     (line  185)
  * mstack-protector-guard <3>:            RS/6000 and PowerPC Options.
                                                               (line  916)
! * mstack-protector-guard <4>:            x86 Options.        (line 1466)
  * mstack-protector-guard-offset:         AArch64 Options.    (line   64)
  * mstack-protector-guard-offset <1>:     ARM Options.        (line  976)
  * mstack-protector-guard-offset <2>:     RISC-V Options.     (line  185)
  * mstack-protector-guard-offset <3>:     RS/6000 and PowerPC Options.
                                                               (line  916)
! * mstack-protector-guard-offset <4>:     x86 Options.        (line 1466)
  * mstack-protector-guard-reg:            AArch64 Options.    (line   64)
  * mstack-protector-guard-reg <1>:        RISC-V Options.     (line  185)
  * mstack-protector-guard-reg <2>:        RS/6000 and PowerPC Options.
                                                               (line  916)
! * mstack-protector-guard-reg <3>:        x86 Options.        (line 1466)
  * mstack-protector-guard-symbol:         RS/6000 and PowerPC Options.
                                                               (line  916)
  * mstack-size:                           AMD GCN Options.    (line   31)
  * mstack-size <1>:                       C-SKY Options.      (line  150)
  * mstack-size <2>:                       S/390 and zSeries Options.
                                                               (line  202)
! * mstackrealign:                         x86 Options.        (line  792)
  * mstd-struct-return:                    SPARC Options.      (line  102)
! * mstore-max:                            x86 Options.        (line 1017)
  * mstrict-align:                         AArch64 Options.    (line   52)
  * mstrict-align <1>:                     M680x0 Options.     (line  281)
  * mstrict-align <2>:                     RISC-V Options.     (line  130)
  * mstrict-align <3>:                     RS/6000 and PowerPC Options.
                                                               (line  403)
! * mstrict-X:                             AVR Options.        (line  285)
  * mstring-compare-inline-limit:          RS/6000 and PowerPC Options.
                                                               (line  708)
! * mstringop-strategy=ALG:                x86 Options.        (line 1343)
  * mstructure-size-boundary:              ARM Options.        (line  736)
  * msubxc:                                SPARC Options.      (line  288)
  * msv-mode:                              Visium Options.     (line   52)
*************** look up both forms.
*** 66297,66322 ****
                                                               (line  147)
  * mtarget-align:                         Xtensa Options.     (line   74)
  * mtas:                                  SH Options.         (line  259)
! * mtbm:                                  x86 Options.        (line  893)
  * mtda:                                  V850 Options.       (line   34)
  * mtelephony:                            ARC Options.        (line  368)
  * mtext-section-literals:                Xtensa Options.     (line   47)
  * mtf:                                   MeP Options.        (line  121)
! * mthreads:                              x86 Options.        (line 1189)
  * mthreads <1>:                          x86 Windows Options.
                                                               (line   26)
  * mthumb:                                ARM Options.        (line  824)
  * mthumb-interwork:                      ARM Options.        (line   24)
  * mtiny-printf:                          MSP430 Options.     (line  122)
! * mtiny-stack:                           AVR Options.        (line  283)
  * mtiny=:                                MeP Options.        (line  125)
  * mTLS:                                  FRV Options.        (line   90)
  * mtls:                                  FRV Options.        (line   94)
  * mtls-dialect:                          ARM Options.        (line  876)
! * mtls-dialect <1>:                      x86 Options.        (line 1167)
  * mtls-dialect=desc:                     AArch64 Options.    (line   77)
  * mtls-dialect=traditional:              AArch64 Options.    (line   81)
! * mtls-direct-seg-refs:                  x86 Options.        (line 1376)
  * mtls-markers:                          RS/6000 and PowerPC Options.
                                                               (line  777)
  * mtls-size:                             AArch64 Options.    (line   85)
--- 66488,66513 ----
                                                               (line  147)
  * mtarget-align:                         Xtensa Options.     (line   74)
  * mtas:                                  SH Options.         (line  259)
! * mtbm:                                  x86 Options.        (line  902)
  * mtda:                                  V850 Options.       (line   34)
  * mtelephony:                            ARC Options.        (line  368)
  * mtext-section-literals:                Xtensa Options.     (line   47)
  * mtf:                                   MeP Options.        (line  121)
! * mthreads:                              x86 Options.        (line 1198)
  * mthreads <1>:                          x86 Windows Options.
                                                               (line   26)
  * mthumb:                                ARM Options.        (line  824)
  * mthumb-interwork:                      ARM Options.        (line   24)
  * mtiny-printf:                          MSP430 Options.     (line  122)
! * mtiny-stack:                           AVR Options.        (line  299)
  * mtiny=:                                MeP Options.        (line  125)
  * mTLS:                                  FRV Options.        (line   90)
  * mtls:                                  FRV Options.        (line   94)
  * mtls-dialect:                          ARM Options.        (line  876)
! * mtls-dialect <1>:                      x86 Options.        (line 1176)
  * mtls-dialect=desc:                     AArch64 Options.    (line   77)
  * mtls-dialect=traditional:              AArch64 Options.    (line   81)
! * mtls-direct-seg-refs:                  x86 Options.        (line 1385)
  * mtls-markers:                          RS/6000 and PowerPC Options.
                                                               (line  777)
  * mtls-size:                             AArch64 Options.    (line   85)
*************** look up both forms.
*** 66337,66349 ****
                                                               (line  541)
  * mtrap-precision:                       DEC Alpha Options.  (line  109)
  * mtrust:                                C-SKY Options.      (line   99)
! * mtsxldtrk:                             x86 Options.        (line  909)
  * mtune:                                 AArch64 Options.    (line  189)
  * mtune <1>:                             AMD GCN Options.    (line   10)
! * mtune <2>:                             ARC Options.        (line  552)
! * mtune <3>:                             ARC Options.        (line  633)
  * mtune <4>:                             ARM Options.        (line  571)
! * mtune <5>:                             CRIS Options.       (line   16)
  * mtune <6>:                             DEC Alpha Options.  (line  259)
  * mtune <7>:                             IA-64 Options.      (line  116)
  * mtune <8>:                             LoongArch Options.  (line   32)
--- 66528,66540 ----
                                                               (line  541)
  * mtrap-precision:                       DEC Alpha Options.  (line  109)
  * mtrust:                                C-SKY Options.      (line   99)
! * mtsxldtrk:                             x86 Options.        (line  918)
  * mtune:                                 AArch64 Options.    (line  189)
  * mtune <1>:                             AMD GCN Options.    (line   10)
! * mtune <2>:                             ARC Options.        (line  550)
! * mtune <3>:                             ARC Options.        (line  628)
  * mtune <4>:                             ARM Options.        (line  571)
! * mtune <5>:                             CRIS Options.       (line   15)
  * mtune <6>:                             DEC Alpha Options.  (line  259)
  * mtune <7>:                             IA-64 Options.      (line  116)
  * mtune <8>:                             LoongArch Options.  (line   32)
*************** look up both forms.
*** 66358,66375 ****
  * mtune <15>:                            SPARC Options.      (line  199)
  * mtune <16>:                            Visium Options.     (line   47)
  * mtune <17>:                            x86 Options.        (line  481)
! * mtune-ctrl=FEATURE-LIST:               x86 Options.        (line  962)
  * muclibc:                               GNU/Linux Options.  (line   14)
! * muintr:                                x86 Options.        (line  908)
  * muls:                                  Score Options.      (line   18)
! * multcost:                              ARC Options.        (line  638)
  * multcost=NUMBER:                       SH Options.         (line  281)
  * multilib-library-pic:                  FRV Options.        (line  110)
  * multiply-enabled:                      LM32 Options.       (line   15)
! * multiply_defined:                      Darwin Options.     (line  196)
! * multiply_defined_unused:               Darwin Options.     (line  196)
! * multi_module:                          Darwin Options.     (line  196)
! * munalign-prob-threshold:               ARC Options.        (line  580)
  * munaligned-access:                     ARM Options.        (line  910)
  * munaligned-access <1>:                 MIPS Options.       (line  597)
  * munaligned-doubles:                    SPARC Options.      (line   73)
--- 66549,66566 ----
  * mtune <15>:                            SPARC Options.      (line  199)
  * mtune <16>:                            Visium Options.     (line   47)
  * mtune <17>:                            x86 Options.        (line  481)
! * mtune-ctrl=FEATURE-LIST:               x86 Options.        (line  971)
  * muclibc:                               GNU/Linux Options.  (line   14)
! * muintr:                                x86 Options.        (line  917)
  * muls:                                  Score Options.      (line   18)
! * multcost:                              ARC Options.        (line  633)
  * multcost=NUMBER:                       SH Options.         (line  281)
  * multilib-library-pic:                  FRV Options.        (line  110)
  * multiply-enabled:                      LM32 Options.       (line   15)
! * multiply_defined:                      Darwin Options.     (line  204)
! * multiply_defined_unused:               Darwin Options.     (line  204)
! * multi_module:                          Darwin Options.     (line  204)
! * munalign-prob-threshold:               ARC Options.        (line  578)
  * munaligned-access:                     ARM Options.        (line  910)
  * munaligned-access <1>:                 MIPS Options.       (line  597)
  * munaligned-doubles:                    SPARC Options.      (line   73)
*************** look up both forms.
*** 66396,66406 ****
  * mv850e3v5:                             V850 Options.       (line   52)
  * mv850es:                               V850 Options.       (line   75)
  * mv8plus:                               SPARC Options.      (line  214)
! * mvaes:                                 x86 Options.        (line  901)
  * mvdsp:                                 C-SKY Options.      (line  104)
  * mveclibabi:                            RS/6000 and PowerPC Options.
                                                               (line  851)
! * mveclibabi <1>:                        x86 Options.        (line 1115)
  * mvect-double:                          Adapteva Epiphany Options.
                                                               (line  115)
  * mvect8-ret-in-mem:                     x86 Options.        (line  753)
--- 66587,66597 ----
  * mv850e3v5:                             V850 Options.       (line   52)
  * mv850es:                               V850 Options.       (line   75)
  * mv8plus:                               SPARC Options.      (line  214)
! * mvaes:                                 x86 Options.        (line  910)
  * mvdsp:                                 C-SKY Options.      (line  104)
  * mveclibabi:                            RS/6000 and PowerPC Options.
                                                               (line  851)
! * mveclibabi <1>:                        x86 Options.        (line 1124)
  * mvect-double:                          Adapteva Epiphany Options.
                                                               (line  115)
  * mvect8-ret-in-mem:                     x86 Options.        (line  753)
*************** look up both forms.
*** 66415,66423 ****
  * mvliw-branch:                          FRV Options.        (line  201)
  * mvms-return-codes:                     VMS Options.        (line    9)
  * mvolatile-asm-stop:                    IA-64 Options.      (line   32)
! * mvolatile-cache:                       ARC Options.        (line  427)
! * mvolatile-cache <1>:                   ARC Options.        (line  431)
! * mvpclmulqdq:                           x86 Options.        (line  903)
  * mvr4130-align:                         MIPS Options.       (line  840)
  * mvrsave:                               RS/6000 and PowerPC Options.
                                                               (line  153)
--- 66606,66614 ----
  * mvliw-branch:                          FRV Options.        (line  201)
  * mvms-return-codes:                     VMS Options.        (line    9)
  * mvolatile-asm-stop:                    IA-64 Options.      (line   32)
! * mvolatile-cache:                       ARC Options.        (line  425)
! * mvolatile-cache <1>:                   ARC Options.        (line  429)
! * mvpclmulqdq:                           x86 Options.        (line  912)
  * mvr4130-align:                         MIPS Options.       (line  840)
  * mvrsave:                               RS/6000 and PowerPC Options.
                                                               (line  153)
*************** look up both forms.
*** 66427,66434 ****
                                                               (line  112)
  * mvxworks:                              RS/6000 and PowerPC Options.
                                                               (line  624)
! * mvzeroupper:                           x86 Options.        (line  989)
! * mwaitpkg:                              x86 Options.        (line  902)
  * mwarn-devices-csv:                     MSP430 Options.     (line  168)
  * mwarn-dynamicstack:                    S/390 and zSeries Options.
                                                               (line  196)
--- 66618,66625 ----
                                                               (line  112)
  * mvxworks:                              RS/6000 and PowerPC Options.
                                                               (line  624)
! * mvzeroupper:                           x86 Options.        (line  998)
! * mwaitpkg:                              x86 Options.        (line  911)
  * mwarn-devices-csv:                     MSP430 Options.     (line  168)
  * mwarn-dynamicstack:                    S/390 and zSeries Options.
                                                               (line  196)
*************** look up both forms.
*** 66436,66450 ****
                                                               (line  188)
  * mwarn-mcu:                             MSP430 Options.     (line   65)
  * mwarn-multiple-fast-interrupts:        RX Options.         (line  143)
! * mwbnoinvd:                             x86 Options.        (line  869)
  * mwide-bitfields:                       MCore Options.      (line   23)
! * mwidekl:                               x86 Options.        (line  923)
  * mwin32:                                x86 Windows Options.
                                                               (line   35)
  * mwindows:                              x86 Windows Options.
                                                               (line   41)
  * mword-relocations:                     ARM Options.        (line  887)
! * mx32:                                  x86 Options.        (line 1542)
  * mxgot:                                 M680x0 Options.     (line  313)
  * mxgot <1>:                             MIPS Options.       (line  229)
  * mxl-barrel-shift:                      MicroBlaze Options. (line   32)
--- 66627,66641 ----
                                                               (line  188)
  * mwarn-mcu:                             MSP430 Options.     (line   65)
  * mwarn-multiple-fast-interrupts:        RX Options.         (line  143)
! * mwbnoinvd:                             x86 Options.        (line  878)
  * mwide-bitfields:                       MCore Options.      (line   23)
! * mwidekl:                               x86 Options.        (line  932)
  * mwin32:                                x86 Windows Options.
                                                               (line   35)
  * mwindows:                              x86 Windows Options.
                                                               (line   41)
  * mword-relocations:                     ARM Options.        (line  887)
! * mx32:                                  x86 Options.        (line 1551)
  * mxgot:                                 M680x0 Options.     (line  313)
  * mxgot <1>:                             MIPS Options.       (line  229)
  * mxl-barrel-shift:                      MicroBlaze Options. (line   32)
*************** look up both forms.
*** 66460,66471 ****
  * mxl-soft-mul:                          MicroBlaze Options. (line   26)
  * mxl-stack-check:                       MicroBlaze Options. (line   41)
  * mxnack:                                AMD GCN Options.    (line   38)
! * mxop:                                  x86 Options.        (line  876)
  * mxpa:                                  MIPS Options.       (line  411)
! * mxsave:                                x86 Options.        (line  887)
! * mxsavec:                               x86 Options.        (line  889)
! * mxsaveopt:                             x86 Options.        (line  888)
! * mxsaves:                               x86 Options.        (line  890)
  * mxy:                                   ARC Options.        (line  373)
  * myellowknife:                          RS/6000 and PowerPC Options.
                                                               (line  619)
--- 66651,66662 ----
  * mxl-soft-mul:                          MicroBlaze Options. (line   26)
  * mxl-stack-check:                       MicroBlaze Options. (line   41)
  * mxnack:                                AMD GCN Options.    (line   38)
! * mxop:                                  x86 Options.        (line  885)
  * mxpa:                                  MIPS Options.       (line  411)
! * mxsave:                                x86 Options.        (line  896)
! * mxsavec:                               x86 Options.        (line  898)
! * mxsaveopt:                             x86 Options.        (line  897)
! * mxsaves:                               x86 Options.        (line  899)
  * mxy:                                   ARC Options.        (line  373)
  * myellowknife:                          RS/6000 and PowerPC Options.
                                                               (line  619)
*************** look up both forms.
*** 66484,66509 ****
                                                               (line  485)
  * no-pie:                                Link Options.       (line  184)
  * no-sysroot-suffix:                     Directory Options.  (line  183)
! * noall_load:                            Darwin Options.     (line  196)
  * nocpp:                                 MIPS Options.       (line  642)
  * nodefaultlibs:                         Link Options.       (line  122)
! * nodevicelib:                           AVR Options.        (line  290)
! * nodevicespecs:                         AVR Options.        (line  293)
! * nofixprebinding:                       Darwin Options.     (line  196)
  * nofpu:                                 RX Options.         (line   17)
  * nolibc:                                Link Options.       (line  134)
  * nolibdld:                              HPPA Options.       (line  188)
! * nomultidefs:                           Darwin Options.     (line  196)
  * non-static:                            VxWorks Options.    (line   16)
! * noprebind:                             Darwin Options.     (line  196)
! * noseglinkedit:                         Darwin Options.     (line  196)
  * nostartfiles:                          Link Options.       (line  117)
  * nostdinc:                              Directory Options.  (line  102)
  * nostdinc++:                            C++ Dialect Options.
                                                               (line  555)
  * nostdinc++ <1>:                        Directory Options.  (line  108)
  * nostdlib:                              Link Options.       (line  146)
! * no_dead_strip_inits_and_terms:         Darwin Options.     (line  196)
  * o:                                     Overall Options.    (line  193)
  * O:                                     Optimize Options.   (line   39)
  * O0:                                    Optimize Options.   (line  166)
--- 66675,66700 ----
                                                               (line  485)
  * no-pie:                                Link Options.       (line  184)
  * no-sysroot-suffix:                     Directory Options.  (line  183)
! * noall_load:                            Darwin Options.     (line  204)
  * nocpp:                                 MIPS Options.       (line  642)
  * nodefaultlibs:                         Link Options.       (line  122)
! * nodevicelib:                           AVR Options.        (line  306)
! * nodevicespecs:                         AVR Options.        (line  309)
! * nofixprebinding:                       Darwin Options.     (line  204)
  * nofpu:                                 RX Options.         (line   17)
  * nolibc:                                Link Options.       (line  134)
  * nolibdld:                              HPPA Options.       (line  188)
! * nomultidefs:                           Darwin Options.     (line  204)
  * non-static:                            VxWorks Options.    (line   16)
! * noprebind:                             Darwin Options.     (line  204)
! * noseglinkedit:                         Darwin Options.     (line  204)
  * nostartfiles:                          Link Options.       (line  117)
  * nostdinc:                              Directory Options.  (line  102)
  * nostdinc++:                            C++ Dialect Options.
                                                               (line  555)
  * nostdinc++ <1>:                        Directory Options.  (line  108)
  * nostdlib:                              Link Options.       (line  146)
! * no_dead_strip_inits_and_terms:         Darwin Options.     (line  204)
  * o:                                     Overall Options.    (line  193)
  * O:                                     Optimize Options.   (line   39)
  * O0:                                    Optimize Options.   (line  166)
*************** look up both forms.
*** 66520,66526 ****
                                                               (line  370)
  * p <1>:                                 Common Function Attributes.
                                                               (line  814)
! * pagezero_size:                         Darwin Options.     (line  196)
  * param:                                 Optimize Options.   (line 2736)
  * pass-exit-codes:                       Overall Options.    (line  597)
  * pedantic:                              Standards.          (line   13)
--- 66711,66717 ----
                                                               (line  370)
  * p <1>:                                 Common Function Attributes.
                                                               (line  814)
! * pagezero_size:                         Darwin Options.     (line  204)
  * param:                                 Optimize Options.   (line 2736)
  * pass-exit-codes:                       Overall Options.    (line  597)
  * pedantic:                              Standards.          (line   13)
*************** look up both forms.
*** 66541,66548 ****
  * pie:                                   Link Options.       (line  178)
  * pipe:                                  Overall Options.    (line  605)
  * plt:                                   RISC-V Options.     (line   13)
! * prebind:                               Darwin Options.     (line  196)
! * prebind_all_twolevel_modules:          Darwin Options.     (line  196)
  * print-file-name:                       Developer Options.  (line  935)
  * print-libgcc-file-name:                Developer Options.  (line  969)
  * print-multi-directory:                 Developer Options.  (line  941)
--- 66732,66739 ----
  * pie:                                   Link Options.       (line  178)
  * pipe:                                  Overall Options.    (line  605)
  * plt:                                   RISC-V Options.     (line   13)
! * prebind:                               Darwin Options.     (line  204)
! * prebind_all_twolevel_modules:          Darwin Options.     (line  204)
  * print-file-name:                       Developer Options.  (line  935)
  * print-libgcc-file-name:                Developer Options.  (line  969)
  * print-multi-directory:                 Developer Options.  (line  941)
*************** look up both forms.
*** 66550,66561 ****
  * print-multi-os-directory:              Developer Options.  (line  953)
  * print-multiarch:                       Developer Options.  (line  962)
  * print-objc-runtime-info:               Objective-C and Objective-C++ Dialect Options.
!                                                              (line  227)
  * print-prog-name:                       Developer Options.  (line  966)
  * print-search-dirs:                     Developer Options.  (line  977)
  * print-sysroot:                         Developer Options.  (line  990)
  * print-sysroot-headers-suffix:          Developer Options.  (line  997)
! * private_bundle:                        Darwin Options.     (line  196)
  * pthread:                               Preprocessor Options.
                                                               (line   70)
  * pthread <1>:                           Link Options.       (line  195)
--- 66741,66752 ----
  * print-multi-os-directory:              Developer Options.  (line  953)
  * print-multiarch:                       Developer Options.  (line  962)
  * print-objc-runtime-info:               Objective-C and Objective-C++ Dialect Options.
!                                                              (line  230)
  * print-prog-name:                       Developer Options.  (line  966)
  * print-search-dirs:                     Developer Options.  (line  977)
  * print-sysroot:                         Developer Options.  (line  990)
  * print-sysroot-headers-suffix:          Developer Options.  (line  997)
! * private_bundle:                        Darwin Options.     (line  204)
  * pthread:                               Preprocessor Options.
                                                               (line   70)
  * pthread <1>:                           Link Options.       (line  195)
*************** look up both forms.
*** 66565,66571 ****
  * Qy:                                    System V Options.   (line   14)
  * r:                                     Link Options.       (line  202)
  * rdynamic:                              Link Options.       (line  206)
! * read_only_relocs:                      Darwin Options.     (line  196)
  * remap:                                 Preprocessor Options.
                                                               (line  401)
  * S:                                     Overall Options.    (line  176)
--- 66756,66762 ----
  * Qy:                                    System V Options.   (line   14)
  * r:                                     Link Options.       (line  202)
  * rdynamic:                              Link Options.       (line  206)
! * read_only_relocs:                      Darwin Options.     (line  204)
  * remap:                                 Preprocessor Options.
                                                               (line  401)
  * S:                                     Overall Options.    (line  176)
*************** look up both forms.
*** 66574,66604 ****
  * save-temps:                            Developer Options.  (line  735)
  * save-temps=cwd:                        Developer Options.  (line  746)
  * save-temps=obj:                        Developer Options.  (line  749)
! * sectalign:                             Darwin Options.     (line  196)
! * sectcreate:                            Darwin Options.     (line  196)
! * sectobjectsymbols:                     Darwin Options.     (line  196)
! * sectobjectsymbols <1>:                 Darwin Options.     (line  196)
! * sectorder:                             Darwin Options.     (line  196)
! * seg1addr:                              Darwin Options.     (line  196)
! * segaddr:                               Darwin Options.     (line  196)
! * seglinkedit:                           Darwin Options.     (line  196)
! * segprot:                               Darwin Options.     (line  196)
! * segs_read_only_addr:                   Darwin Options.     (line  196)
! * segs_read_only_addr <1>:               Darwin Options.     (line  196)
! * segs_read_write_addr:                  Darwin Options.     (line  196)
! * segs_read_write_addr <1>:              Darwin Options.     (line  196)
! * seg_addr_table:                        Darwin Options.     (line  196)
! * seg_addr_table_filename:               Darwin Options.     (line  196)
  * shared:                                Link Options.       (line  222)
  * shared-libgcc:                         Link Options.       (line  230)
  * short-calls:                           Adapteva Epiphany Options.
                                                               (line   61)
! * sim:                                   CRIS Options.       (line   82)
! * sim2:                                  CRIS Options.       (line   87)
! * single_module:                         Darwin Options.     (line  196)
  * specs:                                 Overall Options.    (line  611)
  * static:                                Link Options.       (line  217)
! * static <1>:                            Darwin Options.     (line  196)
  * static <2>:                            HPPA Options.       (line  192)
  * static-libasan:                        Link Options.       (line  264)
  * static-libgcc:                         Link Options.       (line  230)
--- 66765,66795 ----
  * save-temps:                            Developer Options.  (line  735)
  * save-temps=cwd:                        Developer Options.  (line  746)
  * save-temps=obj:                        Developer Options.  (line  749)
! * sectalign:                             Darwin Options.     (line  204)
! * sectcreate:                            Darwin Options.     (line  204)
! * sectobjectsymbols:                     Darwin Options.     (line  204)
! * sectobjectsymbols <1>:                 Darwin Options.     (line  204)
! * sectorder:                             Darwin Options.     (line  204)
! * seg1addr:                              Darwin Options.     (line  204)
! * segaddr:                               Darwin Options.     (line  204)
! * seglinkedit:                           Darwin Options.     (line  204)
! * segprot:                               Darwin Options.     (line  204)
! * segs_read_only_addr:                   Darwin Options.     (line  204)
! * segs_read_only_addr <1>:               Darwin Options.     (line  204)
! * segs_read_write_addr:                  Darwin Options.     (line  204)
! * segs_read_write_addr <1>:              Darwin Options.     (line  204)
! * seg_addr_table:                        Darwin Options.     (line  204)
! * seg_addr_table_filename:               Darwin Options.     (line  204)
  * shared:                                Link Options.       (line  222)
  * shared-libgcc:                         Link Options.       (line  230)
  * short-calls:                           Adapteva Epiphany Options.
                                                               (line   61)
! * sim:                                   CRIS Options.       (line   81)
! * sim2:                                  CRIS Options.       (line   86)
! * single_module:                         Darwin Options.     (line  204)
  * specs:                                 Overall Options.    (line  611)
  * static:                                Link Options.       (line  217)
! * static <1>:                            Darwin Options.     (line  204)
  * static <2>:                            HPPA Options.       (line  192)
  * static-libasan:                        Link Options.       (line  264)
  * static-libgcc:                         Link Options.       (line  230)
*************** look up both forms.
*** 66613,66620 ****
  * std <3>:                               Non-bugs.           (line  107)
  * stdlib:                                C++ Dialect Options.
                                                               (line  578)
! * sub_library:                           Darwin Options.     (line  196)
! * sub_umbrella:                          Darwin Options.     (line  196)
  * symbolic:                              Link Options.       (line  308)
  * sysroot:                               Directory Options.  (line  168)
  * T:                                     Link Options.       (line  314)
--- 66804,66811 ----
  * std <3>:                               Non-bugs.           (line  107)
  * stdlib:                                C++ Dialect Options.
                                                               (line  578)
! * sub_library:                           Darwin Options.     (line  204)
! * sub_umbrella:                          Darwin Options.     (line  204)
  * symbolic:                              Link Options.       (line  308)
  * sysroot:                               Directory Options.  (line  168)
  * T:                                     Link Options.       (line  314)
*************** look up both forms.
*** 66630,66644 ****
                                                               (line  377)
  * trigraphs:                             Preprocessor Options.
                                                               (line  387)
! * twolevel_namespace:                    Darwin Options.     (line  196)
  * U:                                     Preprocessor Options.
                                                               (line   42)
  * u:                                     Link Options.       (line  346)
! * umbrella:                              Darwin Options.     (line  196)
  * undef:                                 Preprocessor Options.
                                                               (line   66)
! * undefined:                             Darwin Options.     (line  196)
! * unexported_symbols_list:               Darwin Options.     (line  196)
  * v:                                     Overall Options.    (line  466)
  * version:                               Overall Options.    (line  594)
  * w:                                     Warning Options.    (line   25)
--- 66821,66835 ----
                                                               (line  377)
  * trigraphs:                             Preprocessor Options.
                                                               (line  387)
! * twolevel_namespace:                    Darwin Options.     (line  204)
  * U:                                     Preprocessor Options.
                                                               (line   42)
  * u:                                     Link Options.       (line  346)
! * umbrella:                              Darwin Options.     (line  204)
  * undef:                                 Preprocessor Options.
                                                               (line   66)
! * undefined:                             Darwin Options.     (line  204)
! * unexported_symbols_list:               Darwin Options.     (line  204)
  * v:                                     Overall Options.    (line  466)
  * version:                               Overall Options.    (line  594)
  * w:                                     Warning Options.    (line   25)
*************** look up both forms.
*** 66651,66657 ****
  * Wabi-tag:                              C++ Dialect Options.
                                                               (line  590)
  * Wabsolute-value:                       Warning Options.    (line 2352)
! * Waddr-space-convert:                   AVR Options.        (line  308)
  * Waddress:                              Warning Options.    (line 2781)
  * Waddress-of-packed-member:             Warning Options.    (line 2815)
  * Waggregate-return:                     Warning Options.    (line 2843)
--- 66842,66848 ----
  * Wabi-tag:                              C++ Dialect Options.
                                                               (line  590)
  * Wabsolute-value:                       Warning Options.    (line 2352)
! * Waddr-space-convert:                   AVR Options.        (line  324)
  * Waddress:                              Warning Options.    (line 2781)
  * Waddress-of-packed-member:             Warning Options.    (line 2815)
  * Waggregate-return:                     Warning Options.    (line 2843)
*************** look up both forms.
*** 66720,66726 ****
  * Warray-bounds:                         Warning Options.    (line 1811)
  * Warray-compare:                        Warning Options.    (line 1830)
  * Wassign-intercept:                     Objective-C and Objective-C++ Dialect Options.
!                                                              (line  170)
  * Wattribute-alias:                      Warning Options.    (line 1886)
  * Wattribute-warning:                    Warning Options.    (line 3072)
  * Wattributes:                           Warning Options.    (line 2853)
--- 66911,66917 ----
  * Warray-bounds:                         Warning Options.    (line 1811)
  * Warray-compare:                        Warning Options.    (line 1830)
  * Wassign-intercept:                     Objective-C and Objective-C++ Dialect Options.
!                                                              (line  173)
  * Wattribute-alias:                      Warning Options.    (line 1886)
  * Wattribute-warning:                    Warning Options.    (line 3072)
  * Wattributes:                           Warning Options.    (line 2853)
*************** look up both forms.
*** 66797,66803 ****
  * Wduplicate-decl-specifier:             Warning Options.    (line  427)
  * Wduplicated-branches:                  Warning Options.    (line 1959)
  * Wduplicated-cond:                      Warning Options.    (line 1970)
! * weak_reference_mismatches:             Darwin Options.     (line  196)
  * Weffc++:                               C++ Dialect Options.
                                                               (line  951)
  * Wempty-body:                           Warning Options.    (line 2662)
--- 66988,66994 ----
  * Wduplicate-decl-specifier:             Warning Options.    (line  427)
  * Wduplicated-branches:                  Warning Options.    (line 1959)
  * Wduplicated-cond:                      Warning Options.    (line 1970)
! * weak_reference_mismatches:             Darwin Options.     (line  204)
  * Weffc++:                               C++ Dialect Options.
                                                               (line  951)
  * Wempty-body:                           Warning Options.    (line 2662)
*************** look up both forms.
*** 66842,66849 ****
  * Wframe-address:                        Warning Options.    (line 1976)
  * Wframe-larger-than=:                   Warning Options.    (line 2243)
  * Wfree-nonheap-object:                  Warning Options.    (line 2260)
! * whatsloaded:                           Darwin Options.     (line  196)
! * whyload:                               Darwin Options.     (line  196)
  * Wif-not-aligned:                       Warning Options.    (line  791)
  * Wignored-attributes:                   Warning Options.    (line  806)
  * Wignored-qualifiers:                   Warning Options.    (line  795)
--- 67033,67040 ----
  * Wframe-address:                        Warning Options.    (line 1976)
  * Wframe-larger-than=:                   Warning Options.    (line 2243)
  * Wfree-nonheap-object:                  Warning Options.    (line 2260)
! * whatsloaded:                           Darwin Options.     (line  204)
! * whyload:                               Darwin Options.     (line  204)
  * Wif-not-aligned:                       Warning Options.    (line  791)
  * Wignored-attributes:                   Warning Options.    (line  806)
  * Wignored-qualifiers:                   Warning Options.    (line  795)
*************** look up both forms.
*** 66905,66911 ****
  * Wmissing-prototypes:                   Warning Options.    (line 2928)
  * Wmissing-requires:                     Warning Options.    (line 2978)
  * Wmissing-template-keyword:             Warning Options.    (line 2995)
! * Wmisspelled-isr:                       AVR Options.        (line  313)
  * Wmultichar:                            Warning Options.    (line 3023)
  * Wmultiple-inheritance:                 C++ Dialect Options.
                                                               (line 1098)
--- 67096,67102 ----
  * Wmissing-prototypes:                   Warning Options.    (line 2928)
  * Wmissing-requires:                     Warning Options.    (line 2978)
  * Wmissing-template-keyword:             Warning Options.    (line 2995)
! * Wmisspelled-isr:                       AVR Options.        (line  329)
  * Wmultichar:                            Warning Options.    (line 3023)
  * Wmultiple-inheritance:                 C++ Dialect Options.
                                                               (line 1098)
*************** look up both forms.
*** 66917,66923 ****
  * Wnested-externs:                       Warning Options.    (line 3195)
  * Wno-abi:                               Warning Options.    (line  267)
  * Wno-absolute-value:                    Warning Options.    (line 2352)
! * Wno-addr-space-convert:                AVR Options.        (line  308)
  * Wno-address:                           Warning Options.    (line 2781)
  * Wno-address-of-packed-member:          Warning Options.    (line 2815)
  * Wno-aggregate-return:                  Warning Options.    (line 2843)
--- 67108,67114 ----
  * Wnested-externs:                       Warning Options.    (line 3195)
  * Wno-abi:                               Warning Options.    (line  267)
  * Wno-absolute-value:                    Warning Options.    (line 2352)
! * Wno-addr-space-convert:                AVR Options.        (line  324)
  * Wno-address:                           Warning Options.    (line 2781)
  * Wno-address-of-packed-member:          Warning Options.    (line 2815)
  * Wno-aggregate-return:                  Warning Options.    (line 2843)
*************** look up both forms.
*** 66988,66994 ****
  * Wno-array-compare:                     Warning Options.    (line 1830)
  * Wno-array-parameter:                   Warning Options.    (line 1842)
  * Wno-assign-intercept:                  Objective-C and Objective-C++ Dialect Options.
!                                                              (line  170)
  * Wno-attribute-alias:                   Warning Options.    (line 1886)
  * Wno-attribute-warning:                 Warning Options.    (line 3072)
  * Wno-attributes:                        Warning Options.    (line 2853)
--- 67179,67185 ----
  * Wno-array-compare:                     Warning Options.    (line 1830)
  * Wno-array-parameter:                   Warning Options.    (line 1842)
  * Wno-assign-intercept:                  Objective-C and Objective-C++ Dialect Options.
!                                                              (line  173)
  * Wno-attribute-alias:                   Warning Options.    (line 1886)
  * Wno-attribute-warning:                 Warning Options.    (line 3072)
  * Wno-attributes:                        Warning Options.    (line 2853)
*************** look up both forms.
*** 67153,67159 ****
  * Wno-missing-prototypes:                Warning Options.    (line 2928)
  * Wno-missing-requires:                  Warning Options.    (line 2978)
  * Wno-missing-template-keyword:          Warning Options.    (line 2995)
! * Wno-misspelled-isr:                    AVR Options.        (line  313)
  * Wno-multichar:                         Warning Options.    (line 3023)
  * Wno-multiple-inheritance:              C++ Dialect Options.
                                                               (line 1098)
--- 67344,67350 ----
  * Wno-missing-prototypes:                Warning Options.    (line 2928)
  * Wno-missing-requires:                  Warning Options.    (line 2978)
  * Wno-missing-template-keyword:          Warning Options.    (line 2995)
! * Wno-misspelled-isr:                    AVR Options.        (line  329)
  * Wno-multichar:                         Warning Options.    (line 3023)
  * Wno-multiple-inheritance:              C++ Dialect Options.
                                                               (line 1098)
*************** look up both forms.
*** 67210,67218 ****
  * Wno-pragmas:                           Warning Options.    (line 1397)
  * Wno-prio-ctor-dtor:                    Warning Options.    (line 1402)
  * Wno-property-assign-default:           Objective-C and Objective-C++ Dialect Options.
!                                                              (line  174)
  * Wno-protocol:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line  178)
  * Wno-range-loop-construct:              C++ Dialect Options.
                                                               (line  895)
  * Wno-redundant-decls:                   Warning Options.    (line 3172)
--- 67401,67409 ----
  * Wno-pragmas:                           Warning Options.    (line 1397)
  * Wno-prio-ctor-dtor:                    Warning Options.    (line 1402)
  * Wno-property-assign-default:           Objective-C and Objective-C++ Dialect Options.
!                                                              (line  177)
  * Wno-protocol:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line  181)
  * Wno-range-loop-construct:              C++ Dialect Options.
                                                               (line  895)
  * Wno-redundant-decls:                   Warning Options.    (line 3172)
*************** look up both forms.
*** 67229,67235 ****
  * Wno-return-type:                       Warning Options.    (line 1065)
  * Wno-scalar-storage-order:              Warning Options.    (line 2709)
  * Wno-selector:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line  195)
  * Wno-sequence-point:                    Warning Options.    (line 1008)
  * Wno-shadow:                            Warning Options.    (line 2175)
  * Wno-shadow-ivar:                       Warning Options.    (line 2186)
--- 67420,67426 ----
  * Wno-return-type:                       Warning Options.    (line 1065)
  * Wno-scalar-storage-order:              Warning Options.    (line 2709)
  * Wno-selector:                          Objective-C and Objective-C++ Dialect Options.
!                                                              (line  198)
  * Wno-sequence-point:                    Warning Options.    (line 1008)
  * Wno-shadow:                            Warning Options.    (line 2175)
  * Wno-shadow-ivar:                       Warning Options.    (line 2186)
*************** look up both forms.
*** 67256,67262 ****
  * Wno-strict-overflow:                   Warning Options.    (line 1449)
  * Wno-strict-prototypes:                 Warning Options.    (line 2901)
  * Wno-strict-selector-match:             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  207)
  * Wno-string-compare:                    Warning Options.    (line 1497)
  * Wno-stringop-overflow:                 Warning Options.    (line 1519)
  * Wno-stringop-overflow <1>:             Warning Options.    (line 1558)
--- 67447,67453 ----
  * Wno-strict-overflow:                   Warning Options.    (line 1449)
  * Wno-strict-prototypes:                 Warning Options.    (line 2901)
  * Wno-strict-selector-match:             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  210)
  * Wno-string-compare:                    Warning Options.    (line 1497)
  * Wno-stringop-overflow:                 Warning Options.    (line 1519)
  * Wno-stringop-overflow <1>:             Warning Options.    (line 1558)
*************** look up both forms.
*** 67297,67303 ****
  * Wno-tsan:                              Warning Options.    (line 2337)
  * Wno-type-limits:                       Warning Options.    (line 2345)
  * Wno-undeclared-selector:               Objective-C and Objective-C++ Dialect Options.
!                                                              (line  215)
  * Wno-undef:                             Warning Options.    (line 2378)
  * Wno-uninitialized:                     Warning Options.    (line 1282)
  * Wno-unknown-pragmas:                   Warning Options.    (line 1390)
--- 67488,67494 ----
  * Wno-tsan:                              Warning Options.    (line 2337)
  * Wno-type-limits:                       Warning Options.    (line 2345)
  * Wno-undeclared-selector:               Objective-C and Objective-C++ Dialect Options.
!                                                              (line  218)
  * Wno-undef:                             Warning Options.    (line 2378)
  * Wno-uninitialized:                     Warning Options.    (line 1282)
  * Wno-unknown-pragmas:                   Warning Options.    (line 1390)
*************** look up both forms.
*** 67351,67357 ****
  * Wnormalized=:                          Warning Options.    (line 3029)
  * Wnull-dereference:                     Warning Options.    (line  630)
  * Wobjc-root-class:                      Objective-C and Objective-C++ Dialect Options.
!                                                              (line  188)
  * Wodr:                                  Warning Options.    (line 3092)
  * Wold-style-cast:                       C++ Dialect Options.
                                                               (line 1000)
--- 67542,67548 ----
  * Wnormalized=:                          Warning Options.    (line 3029)
  * Wnull-dereference:                     Warning Options.    (line  630)
  * Wobjc-root-class:                      Objective-C and Objective-C++ Dialect Options.
!                                                              (line  191)
  * Wodr:                                  Warning Options.    (line 3092)
  * Wold-style-cast:                       C++ Dialect Options.
                                                               (line 1000)
*************** look up both forms.
*** 67388,67396 ****
  * Wpragmas:                              Warning Options.    (line 1397)
  * Wprio-ctor-dtor:                       Warning Options.    (line 1402)
  * Wproperty-assign-default:              Objective-C and Objective-C++ Dialect Options.
!                                                              (line  174)
  * Wprotocol:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  178)
  * Wrange-loop-construct:                 C++ Dialect Options.
                                                               (line  895)
  * wrapper:                               Overall Options.    (line  620)
--- 67579,67587 ----
  * Wpragmas:                              Warning Options.    (line 1397)
  * Wprio-ctor-dtor:                       Warning Options.    (line 1402)
  * Wproperty-assign-default:              Objective-C and Objective-C++ Dialect Options.
!                                                              (line  177)
  * Wprotocol:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  181)
  * Wrange-loop-construct:                 C++ Dialect Options.
                                                               (line  895)
  * wrapper:                               Overall Options.    (line  620)
*************** look up both forms.
*** 67408,67414 ****
  * Wreturn-type:                          Warning Options.    (line 1065)
  * Wscalar-storage-order:                 Warning Options.    (line 2709)
  * Wselector:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  195)
  * Wsequence-point:                       Warning Options.    (line 1008)
  * Wshadow:                               Warning Options.    (line 2175)
  * Wshadow-ivar:                          Warning Options.    (line 2186)
--- 67599,67605 ----
  * Wreturn-type:                          Warning Options.    (line 1065)
  * Wscalar-storage-order:                 Warning Options.    (line 2709)
  * Wselector:                             Objective-C and Objective-C++ Dialect Options.
!                                                              (line  198)
  * Wsequence-point:                       Warning Options.    (line 1008)
  * Wshadow:                               Warning Options.    (line 2175)
  * Wshadow-ivar:                          Warning Options.    (line 2186)
*************** look up both forms.
*** 67438,67444 ****
  * Wstrict-overflow:                      Warning Options.    (line 1449)
  * Wstrict-prototypes:                    Warning Options.    (line 2901)
  * Wstrict-selector-match:                Objective-C and Objective-C++ Dialect Options.
!                                                              (line  207)
  * Wstring-compare:                       Warning Options.    (line 1497)
  * Wstringop-overflow:                    Warning Options.    (line 1519)
  * Wstringop-overflow <1>:                Warning Options.    (line 1558)
--- 67629,67635 ----
  * Wstrict-overflow:                      Warning Options.    (line 1449)
  * Wstrict-prototypes:                    Warning Options.    (line 2901)
  * Wstrict-selector-match:                Objective-C and Objective-C++ Dialect Options.
!                                                              (line  210)
  * Wstring-compare:                       Warning Options.    (line 1497)
  * Wstringop-overflow:                    Warning Options.    (line 1519)
  * Wstringop-overflow <1>:                Warning Options.    (line 1558)
*************** look up both forms.
*** 67480,67486 ****
  * Wtsan:                                 Warning Options.    (line 2337)
  * Wtype-limits:                          Warning Options.    (line 2345)
  * Wundeclared-selector:                  Objective-C and Objective-C++ Dialect Options.
!                                                              (line  215)
  * Wundef:                                Warning Options.    (line 2378)
  * Wuninitialized:                        Warning Options.    (line 1282)
  * Wunknown-pragmas:                      Warning Options.    (line 1390)
--- 67671,67677 ----
  * Wtsan:                                 Warning Options.    (line 2337)
  * Wtype-limits:                          Warning Options.    (line 2345)
  * Wundeclared-selector:                  Objective-C and Objective-C++ Dialect Options.
!                                                              (line  218)
  * Wundef:                                Warning Options.    (line 2378)
  * Wuninitialized:                        Warning Options.    (line 1282)
  * Wunknown-pragmas:                      Warning Options.    (line 1390)
*************** Keyword Index
*** 68014,68020 ****
  * __far M32C Named Address Spaces:       Named Address Spaces.
                                                               (line  153)
  * __far RL78 Named Address Spaces:       Named Address Spaces.
!                                                              (line  177)
  * __flash AVR Named Address Spaces:      Named Address Spaces.
                                                               (line   44)
  * __flash1 AVR Named Address Spaces:     Named Address Spaces.
--- 68205,68211 ----
  * __far M32C Named Address Spaces:       Named Address Spaces.
                                                               (line  153)
  * __far RL78 Named Address Spaces:       Named Address Spaces.
!                                                              (line  176)
  * __flash AVR Named Address Spaces:      Named Address Spaces.
                                                               (line   44)
  * __flash1 AVR Named Address Spaces:     Named Address Spaces.
*************** Keyword Index
*** 68041,68051 ****
  * __PRETTY_FUNCTION__ identifier:        Function Names.     (line    6)
  * __real__ keyword:                      Complex.            (line   43)
  * __regio_symbol PRU Named Address Spaces: Named Address Spaces.
!                                                              (line  162)
  * __seg_fs x86 named address space:      Named Address Spaces.
!                                                              (line  190)
  * __seg_gs x86 named address space:      Named Address Spaces.
!                                                              (line  190)
  * __STDC_HOSTED__:                       Standards.          (line   13)
  * __sync_add_and_fetch:                  __sync Builtins.    (line   72)
  * __sync_and_and_fetch:                  __sync Builtins.    (line   72)
--- 68232,68242 ----
  * __PRETTY_FUNCTION__ identifier:        Function Names.     (line    6)
  * __real__ keyword:                      Complex.            (line   43)
  * __regio_symbol PRU Named Address Spaces: Named Address Spaces.
!                                                              (line  161)
  * __seg_fs x86 named address space:      Named Address Spaces.
!                                                              (line  189)
  * __seg_gs x86 named address space:      Named Address Spaces.
!                                                              (line  189)
  * __STDC_HOSTED__:                       Standards.          (line   13)
  * __sync_add_and_fetch:                  __sync Builtins.    (line   72)
  * __sync_and_and_fetch:                  __sync Builtins.    (line   72)
*************** Keyword Index
*** 68455,68467 ****
  * declaring static data in C++:          Static Definitions. (line    6)
  * defining static data in C++:           Static Definitions. (line    6)
  * dependencies for make as output:       Environment Variables.
!                                                              (line  173)
  * dependencies for make as output <1>:   Environment Variables.
!                                                              (line  189)
  * dependencies, make:                    Preprocessor Options.
                                                               (line   77)
  * DEPENDENCIES_OUTPUT:                   Environment Variables.
!                                                              (line  172)
  * dependent name lookup:                 Name lookup.        (line    6)
  * deprecated enumerator attribute:       Enumerator Attributes.
                                                               (line   28)
--- 68646,68658 ----
  * declaring static data in C++:          Static Definitions. (line    6)
  * defining static data in C++:           Static Definitions. (line    6)
  * dependencies for make as output:       Environment Variables.
!                                                              (line  172)
  * dependencies for make as output <1>:   Environment Variables.
!                                                              (line  188)
  * dependencies, make:                    Preprocessor Options.
                                                               (line   77)
  * DEPENDENCIES_OUTPUT:                   Environment Variables.
!                                                              (line  171)
  * dependent name lookup:                 Name lookup.        (line    6)
  * deprecated enumerator attribute:       Enumerator Attributes.
                                                               (line   28)
*************** Keyword Index
*** 68523,68529 ****
                                                               (line    9)
  * eightbit_data variable attribute, H8/300: H8/300 Variable Attributes.
                                                               (line    9)
! * EIND:                                  AVR Options.        (line  319)
  * either function attribute, MSP430:     MSP430 Function Attributes.
                                                               (line   57)
  * either variable attribute, MSP430:     MSP430 Variable Attributes.
--- 68714,68720 ----
                                                               (line    9)
  * eightbit_data variable attribute, H8/300: H8/300 Variable Attributes.
                                                               (line    9)
! * EIND:                                  AVR Options.        (line  335)
  * either function attribute, MSP430:     MSP430 Function Attributes.
                                                               (line   57)
  * either variable attribute, MSP430:     MSP430 Variable Attributes.
*************** Keyword Index
*** 68813,68819 ****
  * increment operators:                   Bug Criteria.       (line   17)
  * index:                                 Other Builtins.     (line    6)
  * indirect calls, ARC:                   ARC Function Attributes.
!                                                              (line   27)
  * indirect calls, ARM:                   ARM Function Attributes.
                                                               (line   38)
  * indirect calls, Blackfin:              Blackfin Function Attributes.
--- 69004,69010 ----
  * increment operators:                   Bug Criteria.       (line   17)
  * index:                                 Other Builtins.     (line    6)
  * indirect calls, ARC:                   ARC Function Attributes.
!                                                              (line   26)
  * indirect calls, ARM:                   ARM Function Attributes.
                                                               (line   38)
  * indirect calls, Blackfin:              Blackfin Function Attributes.
*************** Keyword Index
*** 68960,68968 ****
  * j1f:                                   Other Builtins.     (line    6)
  * j1l:                                   Other Builtins.     (line    6)
  * jli_always function attribute, ARC:    ARC Function Attributes.
!                                                              (line   44)
  * jli_fixed function attribute, ARC:     ARC Function Attributes.
!                                                              (line   50)
  * jn:                                    Other Builtins.     (line    6)
  * jnf:                                   Other Builtins.     (line    6)
  * jnl:                                   Other Builtins.     (line    6)
--- 69151,69159 ----
  * j1f:                                   Other Builtins.     (line    6)
  * j1l:                                   Other Builtins.     (line    6)
  * jli_always function attribute, ARC:    ARC Function Attributes.
!                                                              (line   43)
  * jli_fixed function attribute, ARC:     ARC Function Attributes.
!                                                              (line   49)
  * jn:                                    Other Builtins.     (line    6)
  * jnf:                                   Other Builtins.     (line    6)
  * jnl:                                   Other Builtins.     (line    6)
*************** Keyword Index
*** 69079,69085 ****
  * longjmp incompatibilities:             Incompatibilities.  (line   39)
  * longjmp warnings:                      Warning Options.    (line 1375)
  * long_call function attribute, ARC:     ARC Function Attributes.
!                                                              (line   27)
  * long_call function attribute, ARM:     ARM Function Attributes.
                                                               (line   38)
  * long_call function attribute, Epiphany: Epiphany Function Attributes.
--- 69270,69276 ----
  * longjmp incompatibilities:             Incompatibilities.  (line   39)
  * longjmp warnings:                      Warning Options.    (line 1375)
  * long_call function attribute, ARC:     ARC Function Attributes.
!                                                              (line   26)
  * long_call function attribute, ARM:     ARM Function Attributes.
                                                               (line   38)
  * long_call function attribute, Epiphany: Epiphany Function Attributes.
*************** Keyword Index
*** 69122,69128 ****
                                                               (line  245)
  * MCore options:                         MCore Options.      (line    6)
  * medium_call function attribute, ARC:   ARC Function Attributes.
!                                                              (line   27)
  * member fns, automatically inline:      Inline.             (line   68)
  * memchr:                                Other Builtins.     (line    6)
  * memcmp:                                Other Builtins.     (line    6)
--- 69313,69319 ----
                                                               (line  245)
  * MCore options:                         MCore Options.      (line    6)
  * medium_call function attribute, ARC:   ARC Function Attributes.
!                                                              (line   26)
  * member fns, automatically inline:      Inline.             (line   68)
  * memchr:                                Other Builtins.     (line    6)
  * memcmp:                                Other Builtins.     (line    6)
*************** Keyword Index
*** 69185,69191 ****
  * multiprecision arithmetic:             Long Long.          (line    6)
  * n in constraint:                       Simple Constraints. (line   73)
  * naked function attribute, ARC:         ARC Function Attributes.
!                                                              (line   59)
  * naked function attribute, ARM:         ARM Function Attributes.
                                                               (line   48)
  * naked function attribute, AVR:         AVR Function Attributes.
--- 69376,69382 ----
  * multiprecision arithmetic:             Long Long.          (line    6)
  * n in constraint:                       Simple Constraints. (line   73)
  * naked function attribute, ARC:         ARC Function Attributes.
!                                                              (line   58)
  * naked function attribute, ARM:         ARM Function Attributes.
                                                               (line   48)
  * naked function attribute, AVR:         AVR Function Attributes.
*************** Keyword Index
*** 69339,69352 ****
  * omitted middle-operands:               Conditionals.       (line    6)
  * open coding:                           Inline.             (line    6)
  * OpenACC accelerator programming:       C Dialect Options.  (line  388)
! * OpenACC accelerator programming <1>:   C Dialect Options.  (line  397)
  * OpenACC accelerator programming <2>:   Warning Options.    (line 3096)
  * OpenACC offloading options:            C Dialect Options.  (line  373)
  * OpenACC offloading targets:            C Dialect Options.  (line  360)
  * OpenMP offloading options:             C Dialect Options.  (line  373)
  * OpenMP offloading targets:             C Dialect Options.  (line  360)
! * OpenMP parallel:                       C Dialect Options.  (line  403)
! * OpenMP SIMD:                           C Dialect Options.  (line  412)
  * OpenRISC Options:                      OpenRISC Options.   (line    6)
  * operand constraints, asm:              Constraints.        (line    6)
  * optimize function attribute:           Common Function Attributes.
--- 69530,69543 ----
  * omitted middle-operands:               Conditionals.       (line    6)
  * open coding:                           Inline.             (line    6)
  * OpenACC accelerator programming:       C Dialect Options.  (line  388)
! * OpenACC accelerator programming <1>:   C Dialect Options.  (line  396)
  * OpenACC accelerator programming <2>:   Warning Options.    (line 3096)
  * OpenACC offloading options:            C Dialect Options.  (line  373)
  * OpenACC offloading targets:            C Dialect Options.  (line  360)
  * OpenMP offloading options:             C Dialect Options.  (line  373)
  * OpenMP offloading targets:             C Dialect Options.  (line  360)
! * OpenMP parallel:                       C Dialect Options.  (line  402)
! * OpenMP SIMD:                           C Dialect Options.  (line  410)
  * OpenRISC Options:                      OpenRISC Options.   (line    6)
  * operand constraints, asm:              Constraints.        (line    6)
  * optimize function attribute:           Common Function Attributes.
*************** Keyword Index
*** 69512,69521 ****
  * r fixed-suffix:                        Fixed-Point.        (line    6)
  * R fixed-suffix:                        Fixed-Point.        (line    6)
  * r in constraint:                       Simple Constraints. (line   64)
! * RAMPD:                                 AVR Options.        (line  430)
! * RAMPX:                                 AVR Options.        (line  430)
! * RAMPY:                                 AVR Options.        (line  430)
! * RAMPZ:                                 AVR Options.        (line  430)
  * range1 GCC_COLORS capability:          Diagnostic Message Formatting Options.
                                                               (line  107)
  * range2 GCC_COLORS capability:          Diagnostic Message Formatting Options.
--- 69703,69712 ----
  * r fixed-suffix:                        Fixed-Point.        (line    6)
  * R fixed-suffix:                        Fixed-Point.        (line    6)
  * r in constraint:                       Simple Constraints. (line   64)
! * RAMPD:                                 AVR Options.        (line  446)
! * RAMPX:                                 AVR Options.        (line  446)
! * RAMPY:                                 AVR Options.        (line  446)
! * RAMPZ:                                 AVR Options.        (line  446)
  * range1 GCC_COLORS capability:          Diagnostic Message Formatting Options.
                                                               (line  107)
  * range2 GCC_COLORS capability:          Diagnostic Message Formatting Options.
*************** Keyword Index
*** 69627,69633 ****
  * section variable attribute:            Common Variable Attributes.
                                                               (line  307)
  * secure_call function attribute, ARC:   ARC Function Attributes.
!                                                              (line   54)
  * selectany variable attribute:          Microsoft Windows Variable Attributes.
                                                               (line   16)
  * sentinel function attribute:           Common Function Attributes.
--- 69818,69824 ----
  * section variable attribute:            Common Variable Attributes.
                                                               (line  307)
  * secure_call function attribute, ARC:   ARC Function Attributes.
!                                                              (line   53)
  * selectany variable attribute:          Microsoft Windows Variable Attributes.
                                                               (line   16)
  * sentinel function attribute:           Common Function Attributes.
*************** Keyword Index
*** 69645,69651 ****
  * shortcall function attribute, PowerPC: PowerPC Function Attributes.
                                                               (line   10)
  * short_call function attribute, ARC:    ARC Function Attributes.
!                                                              (line   27)
  * short_call function attribute, ARM:    ARM Function Attributes.
                                                               (line   38)
  * short_call function attribute, Epiphany: Epiphany Function Attributes.
--- 69836,69842 ----
  * shortcall function attribute, PowerPC: PowerPC Function Attributes.
                                                               (line   10)
  * short_call function attribute, ARC:    ARC Function Attributes.
!                                                              (line   26)
  * short_call function attribute, ARM:    ARM Function Attributes.
                                                               (line   38)
  * short_call function attribute, Epiphany: Epiphany Function Attributes.
*************** Keyword Index
*** 69670,69676 ****
  * significand:                           Other Builtins.     (line    6)
  * significandf:                          Other Builtins.     (line    6)
  * significandl:                          Other Builtins.     (line    6)
! * SIMD:                                  C Dialect Options.  (line  412)
  * simd function attribute:               Common Function Attributes.
                                                               (line 1180)
  * simple constraints:                    Simple Constraints. (line    6)
--- 69861,69867 ----
  * significand:                           Other Builtins.     (line    6)
  * significandf:                          Other Builtins.     (line    6)
  * significandl:                          Other Builtins.     (line    6)
! * SIMD:                                  C Dialect Options.  (line  410)
  * simd function attribute:               Common Function Attributes.
                                                               (line 1180)
  * simple constraints:                    Simple Constraints. (line    6)
*************** Keyword Index
*** 69691,69697 ****
  * snprintf:                              Other Builtins.     (line    6)
  * Solaris 2 options:                     Solaris 2 Options.  (line    6)
  * SOURCE_DATE_EPOCH:                     Environment Variables.
!                                                              (line  194)
  * SPARC options:                         SPARC Options.      (line    6)
  * Spec Files:                            Spec Files.         (line    6)
  * specified registers:                   Explicit Register Variables.
--- 69882,69888 ----
  * snprintf:                              Other Builtins.     (line    6)
  * Solaris 2 options:                     Solaris 2 Options.  (line    6)
  * SOURCE_DATE_EPOCH:                     Environment Variables.
!                                                              (line  193)
  * SPARC options:                         SPARC Options.      (line    6)
  * Spec Files:                            Spec Files.         (line    6)
  * specified registers:                   Explicit Register Variables.
*************** Keyword Index
*** 69759,69765 ****
  * subscripting and function values:      Subscripting.       (line    6)
  * suffixes for C++ source:               Invoking G++.       (line    6)
  * SUNPRO_DEPENDENCIES:                   Environment Variables.
!                                                              (line  188)
  * suppressing warnings:                  Warning Options.    (line    6)
  * surprises in C++:                      C++ Misunderstandings.
                                                               (line    6)
--- 69950,69956 ----
  * subscripting and function values:      Subscripting.       (line    6)
  * suffixes for C++ source:               Invoking G++.       (line    6)
  * SUNPRO_DEPENDENCIES:                   Environment Variables.
!                                                              (line  187)
  * suppressing warnings:                  Warning Options.    (line    6)
  * surprises in C++:                      C++ Misunderstandings.
                                                               (line    6)
*************** Keyword Index
*** 70336,70342 ****
  * X in constraint:                       Simple Constraints. (line  122)
  * X3.159-1989:                           Standards.          (line   13)
  * x86 named address spaces:              Named Address Spaces.
!                                                              (line  185)
  * x86 Options:                           x86 Options.        (line    6)
  * x86 Windows Options:                   x86 Windows Options.
                                                               (line    6)
--- 70527,70533 ----
  * X in constraint:                       Simple Constraints. (line  122)
  * X3.159-1989:                           Standards.          (line   13)
  * x86 named address spaces:              Named Address Spaces.
!                                                              (line  184)
  * x86 Options:                           x86 Options.        (line    6)
  * x86 Windows Options:                   x86 Windows Options.
                                                               (line    6)
*************** Keyword Index
*** 70363,70802 ****
  
  Tag Table:
  Node: Top2135
! Node: G++ and GCC4093
! Node: Standards6139
! Node: Invoking GCC19766
! Node: Option Summary24993
! Node: Overall Options83928
! Node: Invoking G++111454
! Node: C Dialect Options112977
! Node: C++ Dialect Options134016
! Node: Objective-C and Objective-C++ Dialect Options196575
! Node: Diagnostic Message Formatting Options208322
! Node: Warning Options238895
! Ref: Wtrigraphs343793
! Node: Static Analyzer Options389156
! Node: Debugging Options409708
! Node: Optimize Options430945
! Ref: Type-punning503405
! Node: Instrumentation Options623696
! Node: Preprocessor Options671808
! Ref: dashMF676655
! Ref: fdollars-in-identifiers681317
! Node: Assembler Options694642
! Node: Link Options695333
! Ref: Link Options-Footnote-1712293
! Node: Directory Options712629
! Node: Code Gen Options721032
! Node: Developer Options749905
! Node: Submodel Options791290
! Node: AArch64 Options793122
! Ref: aarch64-feature-modifiers808695
! Node: Adapteva Epiphany Options814256
! Node: AMD GCN Options820208
! Node: ARC Options821771
! Node: ARM Options842540
! Node: AVR Options884565
! Node: Blackfin Options911102
! Node: C6X Options918994
! Node: CRIS Options920537
! Node: CR16 Options923723
! Node: C-SKY Options924635
! Node: Darwin Options930362
! Node: DEC Alpha Options937803
! Node: eBPF Options949419
! Node: FR30 Options951795
! Node: FT32 Options952355
! Node: FRV Options953301
! Node: GNU/Linux Options960065
! Node: H8/300 Options961446
! Node: HPPA Options962898
! Node: IA-64 Options972430
! Node: LM32 Options980558
! Node: LoongArch Options981086
! Node: M32C Options987364
! Node: M32R/D Options988642
! Node: M680x0 Options992187
! Node: MCore Options1006342
! Node: MeP Options1007844
! Node: MicroBlaze Options1011804
! Node: MIPS Options1014869
! Node: MMIX Options1051666
! Node: MN10300 Options1054143
! Node: Moxie Options1056686
! Node: MSP430 Options1057173
! Node: NDS32 Options1064934
! Node: Nios II Options1067104
! Node: Nvidia PTX Options1080320
! Node: OpenRISC Options1083816
! Node: PDP-11 Options1086570
! Node: picoChip Options1087819
! Node: PowerPC Options1089957
! Node: PRU Options1090177
! Node: RISC-V Options1092386
! Node: RL78 Options1100787
! Node: RS/6000 and PowerPC Options1104562
! Node: RX Options1146078
! Node: S/390 and zSeries Options1154680
! Node: Score Options1165480
! Node: SH Options1166329
! Node: Solaris 2 Options1181469
! Node: SPARC Options1182707
! Node: System V Options1198359
! Node: TILE-Gx Options1199187
! Node: TILEPro Options1200205
! Node: V850 Options1200709
! Node: VAX Options1207396
! Node: Visium Options1208088
! Node: VMS Options1210396
! Node: VxWorks Options1211212
! Node: x86 Options1212364
! Node: x86 Windows Options1281467
! Node: Xstormy16 Options1284273
! Node: Xtensa Options1284567
! Node: zSeries Options1290703
! Node: Spec Files1290899
! Node: Environment Variables1316978
! Node: Precompiled Headers1326411
! Node: C++ Modules1332620
! Ref: C++ Modules-Footnote-11338615
! Node: C++ Module Mapper1338868
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! Node: C++ Compiled Module Interface1345850
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! Ref: C++ Compiled Module Interface-Footnote-21349323
! Node: C Implementation1349379
! Node: Translation implementation1351070
! Node: Environment implementation1351661
! Node: Identifiers implementation1352215
! Node: Characters implementation1353301
! Node: Integers implementation1356951
! Node: Floating point implementation1359000
! Node: Arrays and pointers implementation1362063
! Ref: Arrays and pointers implementation-Footnote-11363523
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! Node: C Extensions1377384
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! Node: Labels as Values1390952
! Ref: Labels as Values-Footnote-11393479
! Node: Nested Functions1393664
! Node: Nonlocal Gotos1397618
! Node: Constructing Calls1399884
! Node: Typeof1404596
! Node: Conditionals1408525
! Node: __int1281409414
! Node: Long Long1409939
! Node: Complex1411430
! Node: Floating Types1416175
! Node: Half-Precision1419696
! Node: Decimal Float1423164
! Node: Hex Floats1425018
! Node: Fixed-Point1426092
! Node: Named Address Spaces1429350
! Ref: AVR Named Address Spaces1430036
! Node: Zero Length1437330
! Node: Empty Structures1441511
! Node: Variable Length1441917
! Node: Variadic Macros1444635
! Node: Escaped Newlines1447013
! Node: Subscripting1447874
! Node: Pointer Arith1448599
! Node: Variadic Pointer Args1449176
! Node: Pointers to Arrays1449901
! Node: Initializers1450654
! Node: Compound Literals1451155
! Node: Designated Inits1454722
! Node: Case Ranges1458646
! Node: Cast to Union1459327
! Node: Mixed Labels and Declarations1461061
! Node: Function Attributes1461698
! Node: Common Function Attributes1466209
! Ref: Common Function Attributes-Footnote-11543150
! Node: AArch64 Function Attributes1543467
! Node: AMD GCN Function Attributes1549661
! Node: ARC Function Attributes1552714
! Node: ARM Function Attributes1555651
! Node: AVR Function Attributes1560790
! Node: Blackfin Function Attributes1565325
! Node: BPF Function Attributes1567822
! Node: CR16 Function Attributes1568410
! Node: C-SKY Function Attributes1568929
! Node: Epiphany Function Attributes1570228
! Node: H8/300 Function Attributes1572983
! Node: IA-64 Function Attributes1574181
! Node: M32C Function Attributes1575223
! Node: M32R/D Function Attributes1577561
! Node: m68k Function Attributes1579035
! Node: MCORE Function Attributes1579979
! Node: MeP Function Attributes1580790
! Node: MicroBlaze Function Attributes1582091
! Node: Microsoft Windows Function Attributes1583598
! Node: MIPS Function Attributes1588167
! Node: MSP430 Function Attributes1593785
! Node: NDS32 Function Attributes1597864
! Node: Nios II Function Attributes1600288
! Node: Nvidia PTX Function Attributes1601585
! Node: PowerPC Function Attributes1602200
! Node: RISC-V Function Attributes1608974
! Node: RL78 Function Attributes1610390
! Node: RX Function Attributes1611629
! Node: S/390 Function Attributes1614176
! Node: SH Function Attributes1616004
! Node: Symbian OS Function Attributes1619432
! Node: V850 Function Attributes1619768
! Node: Visium Function Attributes1620313
! Node: x86 Function Attributes1620841
! Node: Xstormy16 Function Attributes1644796
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! Node: Common Variable Attributes1646836
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! Node: M32R/D Variable Attributes1676970
! Node: MeP Variable Attributes1677753
! Node: Microsoft Windows Variable Attributes1679846
! Node: MSP430 Variable Attributes1682299
! Node: Nvidia PTX Variable Attributes1683513
! Node: PowerPC Variable Attributes1684130
! Node: RL78 Variable Attributes1684687
! Node: V850 Variable Attributes1685106
! Node: x86 Variable Attributes1685739
! Node: Xstormy16 Variable Attributes1686795
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! Node: Enumerator Attributes1717595
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! Node: Attribute Syntax1720610
! Node: Function Prototypes1731868
! Node: C++ Comments1733648
! Node: Dollar Signs1734167
! Node: Character Escapes1734632
! Node: Alignment1734916
! Node: Inline1736569
! Node: Volatiles1741386
! Node: Using Assembly Language with C1744285
! Node: Basic Asm1745522
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! Ref: Volatile1755259
! Ref: AssemblerTemplate1759372
! Ref: OutputOperands1763612
! Ref: FlagOutputOperands1770575
! Ref: InputOperands1773522
! Ref: Clobbers and Scratch Registers1777790
! Ref: GotoLabels1786431
! Ref: x86Operandmodifiers1790054
! Ref: x86floatingpointasmoperands1794870
! Ref: msp430Operandmodifiers1798199
! Node: Constraints1799857
! Node: Simple Constraints1800963
! Node: Multi-Alternative1808277
! Node: Modifiers1809952
! Node: Machine Constraints1812751
! Node: Asm Labels1870522
! Node: Explicit Register Variables1872142
! Ref: Explicit Reg Vars1872356
! Node: Global Register Variables1872965
! Ref: Global Reg Vars1873173
! Node: Local Register Variables1877955
! Ref: Local Reg Vars1878175
! Node: Size of an asm1881803
! Node: Alternate Keywords1883281
! Node: Incomplete Enums1884786
! Node: Function Names1885543
! Node: Return Address1887447
! Node: Vector Extensions1892034
! Node: Offsetof1903017
! Node: __sync Builtins1903850
! Node: __atomic Builtins1910293
! Node: Integer Overflow Builtins1923806
! Node: x86 specific memory model extensions for transactional memory1930289
! Node: Object Size Checking1931555
! Node: Other Builtins1938571
! Node: Target Builtins1991175
! Node: AArch64 Built-in Functions1992950
! Node: Alpha Built-in Functions1993646
! Node: Altera Nios II Built-in Functions1996740
! Node: ARC Built-in Functions2001179
! Node: ARC SIMD Built-in Functions2006391
! Node: ARM iWMMXt Built-in Functions2015389
! Node: ARM C Language Extensions (ACLE)2022525
! Node: ARM Floating Point Status and Control Intrinsics2023802
! Node: ARM ARMv8-M Security Extensions2024289
! Node: AVR Built-in Functions2025581
! Node: Blackfin Built-in Functions2029347
! Node: BPF Built-in Functions2029967
! Node: FR-V Built-in Functions2031426
! Node: Argument Types2032289
! Node: Directly-mapped Integer Functions2034120
! Node: Directly-mapped Media Functions2035280
! Node: Raw read/write Functions2043562
! Node: Other Built-in Functions2044470
! Node: MIPS DSP Built-in Functions2045656
! Node: MIPS Paired-Single Support2058411
! Node: MIPS Loongson Built-in Functions2059910
! Node: Paired-Single Arithmetic2066432
! Node: Paired-Single Built-in Functions2067455
! Node: MIPS-3D Built-in Functions2070122
! Node: MIPS SIMD Architecture (MSA) Support2075516
! Node: MIPS SIMD Architecture Built-in Functions2078356
! Node: Other MIPS Built-in Functions2105210
! Node: MSP430 Built-in Functions2106219
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! Node: picoChip Built-in Functions2108913
! Node: Basic PowerPC Built-in Functions2110262
! Node: Basic PowerPC Built-in Functions Available on all Configurations2111120
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! Node: RX Built-in Functions2255731
! Node: S/390 System z Built-in Functions2259733
! Node: SH Built-in Functions2264963
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! Node: S/390 Pragmas2357182
! Node: Darwin Pragmas2357748
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! Node: Structure-Layout Pragmas2361602
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! Node: Contributors2630399
! Node: Option Index2671373
! Node: Keyword Index2970472
  
  End Tag Table
--- 70554,70999 ----
  
  Tag Table:
  Node: Top2135
! Node: G++ and GCC4105
! Node: Standards6151
! Node: Invoking GCC19778
! Node: Option Summary25005
! Node: Overall Options83977
! Node: Invoking G++111503
! Node: C Dialect Options113026
! Node: C++ Dialect Options134065
! Node: Objective-C and Objective-C++ Dialect Options196624
! Node: Diagnostic Message Formatting Options208529
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! Ref: Wtrigraphs344000
! Node: Static Analyzer Options389363
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! Node: Optimize Options431152
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! Node: Instrumentation Options623903
! Node: Preprocessor Options672015
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! Ref: fdollars-in-identifiers681524
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! Node: Code Gen Options721239
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! Node: ARC Options821995
! Node: ARM Options842764
! Node: AVR Options884789
! Node: Blackfin Options912498
! Node: C6X Options920390
! Node: CRIS Options921933
! Node: CR16 Options925119
! Node: C-SKY Options926031
! Node: Darwin Options931758
! Node: DEC Alpha Options939538
! Node: eBPF Options951154
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! Node: H8/300 Options963181
! Node: HPPA Options964633
! Node: IA-64 Options974165
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! Node: Solaris 2 Options1184283
! Node: SPARC Options1185521
! Node: System V Options1201173
! Node: TILE-Gx Options1202001
! Node: TILEPro Options1203019
! Node: V850 Options1203523
! Node: VAX Options1210210
! Node: Visium Options1210902
! Node: VMS Options1213210
! Node: VxWorks Options1214026
! Node: x86 Options1215178
! Node: x86 Windows Options1284656
! Node: Xstormy16 Options1287462
! Node: Xtensa Options1287756
! Node: zSeries Options1293892
! Node: Spec Files1294088
! Node: Environment Variables1320167
! Node: Precompiled Headers1329600
! Node: C++ Modules1335809
! Ref: C++ Modules-Footnote-11341804
! Node: C++ Module Mapper1342057
! Node: C++ Module Preprocessing1347210
! Node: C++ Compiled Module Interface1349039
! Ref: C++ Compiled Module Interface-Footnote-11352423
! Ref: C++ Compiled Module Interface-Footnote-21352512
! Node: C Implementation1352568
! Node: Translation implementation1354259
! Node: Environment implementation1354850
! Node: Identifiers implementation1355404
! Node: Characters implementation1356490
! Node: Integers implementation1360140
! Node: Floating point implementation1362189
! Node: Arrays and pointers implementation1365252
! Ref: Arrays and pointers implementation-Footnote-11366712
! Node: Hints implementation1366838
! Node: Structures unions enumerations and bit-fields implementation1368333
! Node: Qualifiers implementation1370557
! Node: Declarators implementation1372618
! Node: Statements implementation1372959
! Node: Preprocessing directives implementation1373285
! Node: Library functions implementation1375606
! Node: Architecture implementation1376255
! Node: Locale-specific behavior implementation1377900
! Node: C++ Implementation1378205
! Node: Conditionally-supported behavior1379489
! Node: Exception handling1380106
! Node: C Extensions1380573
! Node: Statement Exprs1385796
! Node: Local Labels1391168
! Node: Labels as Values1394141
! Ref: Labels as Values-Footnote-11396668
! Node: Nested Functions1396853
! Node: Nonlocal Gotos1400807
! Node: Constructing Calls1403073
! Node: Typeof1407785
! Node: Conditionals1411714
! Node: __int1281412603
! Node: Long Long1413128
! Node: Complex1414619
! Node: Floating Types1419364
! Node: Half-Precision1422885
! Node: Decimal Float1426353
! Node: Hex Floats1428207
! Node: Fixed-Point1429281
! Node: Named Address Spaces1432539
! Ref: AVR Named Address Spaces1433225
! Node: Zero Length1440519
! Node: Empty Structures1444700
! Node: Variable Length1445106
! Node: Variadic Macros1447824
! Node: Escaped Newlines1450202
! Node: Subscripting1451063
! Node: Pointer Arith1451788
! Node: Variadic Pointer Args1452365
! Node: Pointers to Arrays1453090
! Node: Initializers1453843
! Node: Compound Literals1454344
! Node: Designated Inits1457911
! Node: Case Ranges1461835
! Node: Cast to Union1462516
! Node: Mixed Labels and Declarations1464250
! Node: Function Attributes1464887
! Node: Common Function Attributes1469398
! Ref: Common Function Attributes-Footnote-11546339
! Node: AArch64 Function Attributes1546656
! Node: AMD GCN Function Attributes1552850
! Node: ARC Function Attributes1555903
! Node: ARM Function Attributes1558840
! Node: AVR Function Attributes1563979
! Node: Blackfin Function Attributes1568514
! Node: BPF Function Attributes1571011
! Node: CR16 Function Attributes1571599
! Node: C-SKY Function Attributes1572118
! Node: Epiphany Function Attributes1573417
! Node: H8/300 Function Attributes1576172
! Node: IA-64 Function Attributes1577370
! Node: M32C Function Attributes1578412
! Node: M32R/D Function Attributes1580750
! Node: m68k Function Attributes1582224
! Node: MCORE Function Attributes1583168
! Node: MeP Function Attributes1583979
! Node: MicroBlaze Function Attributes1585280
! Node: Microsoft Windows Function Attributes1586787
! Node: MIPS Function Attributes1591356
! Node: MSP430 Function Attributes1596974
! Node: NDS32 Function Attributes1601053
! Node: Nios II Function Attributes1603477
! Node: Nvidia PTX Function Attributes1604774
! Node: PowerPC Function Attributes1605389
! Node: RISC-V Function Attributes1612163
! Node: RL78 Function Attributes1613579
! Node: RX Function Attributes1614818
! Node: S/390 Function Attributes1617365
! Node: SH Function Attributes1619193
! Node: Symbian OS Function Attributes1622621
! Node: V850 Function Attributes1622957
! Node: Visium Function Attributes1623502
! Node: x86 Function Attributes1624030
! Node: Xstormy16 Function Attributes1647985
! Node: Variable Attributes1648492
! Node: Common Variable Attributes1650025
! Node: ARC Variable Attributes1671932
! Node: AVR Variable Attributes1672314
! Node: Blackfin Variable Attributes1677477
! Node: H8/300 Variable Attributes1678335
! Node: IA-64 Variable Attributes1679408
! Node: M32R/D Variable Attributes1680159
! Node: MeP Variable Attributes1680942
! Node: Microsoft Windows Variable Attributes1683035
! Node: MSP430 Variable Attributes1685488
! Node: Nvidia PTX Variable Attributes1686702
! Node: PowerPC Variable Attributes1687319
! Node: RL78 Variable Attributes1687876
! Node: V850 Variable Attributes1688295
! Node: x86 Variable Attributes1688928
! Node: Xstormy16 Variable Attributes1689984
! Node: Type Attributes1690554
! Node: Common Type Attributes1692242
! Node: ARC Type Attributes1714603
! Node: ARM Type Attributes1715075
! Node: BPF Type Attributes1715857
! Node: MeP Type Attributes1716374
! Node: PowerPC Type Attributes1716776
! Node: x86 Type Attributes1717765
! Node: Label Attributes1718757
! Node: Enumerator Attributes1720784
! Node: Statement Attributes1722316
! Node: Attribute Syntax1723799
! Node: Function Prototypes1735057
! Node: C++ Comments1736837
! Node: Dollar Signs1737356
! Node: Character Escapes1737821
! Node: Alignment1738105
! Node: Inline1739758
! Node: Volatiles1744575
! Node: Using Assembly Language with C1747474
! Node: Basic Asm1748711
! Node: Extended Asm1754334
! Ref: Volatile1758448
! Ref: AssemblerTemplate1762561
! Ref: OutputOperands1766801
! Ref: FlagOutputOperands1773764
! Ref: InputOperands1776711
! Ref: Clobbers and Scratch Registers1780979
! Ref: GotoLabels1789620
! Ref: x86Operandmodifiers1793243
! Ref: x86floatingpointasmoperands1798059
! Ref: msp430Operandmodifiers1801388
! Node: Constraints1803046
! Node: Simple Constraints1804152
! Node: Multi-Alternative1811466
! Node: Modifiers1813141
! Node: Machine Constraints1815940
! Node: Asm Labels1873711
! Node: Explicit Register Variables1875331
! Ref: Explicit Reg Vars1875545
! Node: Global Register Variables1876154
! Ref: Global Reg Vars1876362
! Node: Local Register Variables1881144
! Ref: Local Reg Vars1881364
! Node: Size of an asm1884992
! Node: Alternate Keywords1886470
! Node: Incomplete Enums1887975
! Node: Function Names1888732
! Node: Return Address1890636
! Node: Vector Extensions1895223
! Node: Offsetof1906206
! Node: __sync Builtins1907039
! Node: __atomic Builtins1913482
! Node: Integer Overflow Builtins1926995
! Node: x86 specific memory model extensions for transactional memory1933478
! Node: Object Size Checking1934744
! Node: Other Builtins1941760
! Node: Target Builtins1994364
! Node: AArch64 Built-in Functions1996177
! Node: Alpha Built-in Functions1996873
! Node: Altera Nios II Built-in Functions1999967
! Node: ARC Built-in Functions2004406
! Node: ARC SIMD Built-in Functions2009618
! Node: ARM iWMMXt Built-in Functions2018616
! Node: ARM C Language Extensions (ACLE)2025752
! Node: ARM Floating Point Status and Control Intrinsics2027029
! Node: ARM ARMv8-M Security Extensions2027516
! Node: AVR Built-in Functions2028808
! Node: Blackfin Built-in Functions2032574
! Node: BPF Built-in Functions2033194
! Node: FR-V Built-in Functions2034653
! Node: Argument Types2035522
! Node: Directly-mapped Integer Functions2037353
! Node: Directly-mapped Media Functions2038513
! Node: Raw read/write Functions2046795
! Node: Other Built-in Functions2047703
! Node: LoongArch Base Built-in Functions2048889
! Node: MIPS DSP Built-in Functions2054635
! Node: MIPS Paired-Single Support2067400
! Node: MIPS Loongson Built-in Functions2068899
! Node: Paired-Single Arithmetic2075421
! Node: Paired-Single Built-in Functions2076444
! Node: MIPS-3D Built-in Functions2079111
! Node: MIPS SIMD Architecture (MSA) Support2084505
! Node: MIPS SIMD Architecture Built-in Functions2087345
! Node: Other MIPS Built-in Functions2114199
! Node: MSP430 Built-in Functions2115208
! Node: NDS32 Built-in Functions2116609
! Node: picoChip Built-in Functions2117902
! Node: Basic PowerPC Built-in Functions2119251
! Node: Basic PowerPC Built-in Functions Available on all Configurations2120109
! Node: Basic PowerPC Built-in Functions Available on ISA 2.052128619
! Node: Basic PowerPC Built-in Functions Available on ISA 2.062133454
! Node: Basic PowerPC Built-in Functions Available on ISA 2.072135534
! Node: Basic PowerPC Built-in Functions Available on ISA 3.02136388
! Node: Basic PowerPC Built-in Functions Available on ISA 3.12143366
! Node: PowerPC AltiVec/VSX Built-in Functions2146531
! Node: PowerPC AltiVec Built-in Functions on ISA 2.052154600
! Node: PowerPC AltiVec Built-in Functions Available on ISA 2.062180000
! Node: PowerPC AltiVec Built-in Functions Available on ISA 2.072187066
! Node: PowerPC AltiVec Built-in Functions Available on ISA 3.02196876
! Node: PowerPC AltiVec Built-in Functions Available on ISA 3.12212599
! Node: PowerPC Hardware Transactional Memory Built-in Functions2245883
! Node: PowerPC Atomic Memory Operation Functions2254433
! Node: PowerPC Matrix-Multiply Assist Built-in Functions2256996
! Node: PRU Built-in Functions2263121
! Node: RISC-V Built-in Functions2264309
! Node: RX Built-in Functions2264720
! Node: S/390 System z Built-in Functions2268722
! Node: SH Built-in Functions2273952
! Node: SPARC VIS Built-in Functions2275680
! Node: TI C6X Built-in Functions2284211
! Node: TILE-Gx Built-in Functions2285262
! Node: TILEPro Built-in Functions2286387
! Node: x86 Built-in Functions2287495
! Node: x86 transactional memory intrinsics2352845
! Node: x86 control-flow protection intrinsics2356112
! Node: Target Format Checks2357883
! Node: Solaris Format Checks2358315
! Node: Darwin Format Checks2358741
! Node: Pragmas2359704
! Node: AArch64 Pragmas2360645
! Node: ARM Pragmas2361102
! Node: M32C Pragmas2361729
! Node: MeP Pragmas2362801
! Node: PRU Pragmas2364853
! Node: RS/6000 and PowerPC Pragmas2365431
! Node: S/390 Pragmas2366171
! Node: Darwin Pragmas2366737
! Node: Solaris Pragmas2367790
! Node: Symbol-Renaming Pragmas2368954
! Node: Structure-Layout Pragmas2370591
! Node: Weak Pragmas2372871
! Node: Diagnostic Pragmas2373606
! Node: Visibility Pragmas2378357
! Node: Push/Pop Macro Pragmas2379042
! Node: Function Specific Option Pragmas2380015
! Node: Loop-Specific Pragmas2381981
! Node: Unnamed Fields2383581
! Node: Thread-Local2385778
! Node: C99 Thread-Local Edits2387884
! Node: C++98 Thread-Local Edits2389882
! Node: Binary constants2393327
! Node: C++ Extensions2393998
! Node: C++ Volatiles2395628
! Node: Restricted Pointers2397976
! Node: Vague Linkage2399567
! Node: C++ Interface2403190
! Ref: C++ Interface-Footnote-12406987
! Node: Template Instantiation2407125
! Node: Bound member functions2413216
! Node: C++ Attributes2414748
! Node: Function Multiversioning2418820
! Node: Type Traits2420628
! Node: C++ Concepts2427599
! Node: Deprecated Features2429105
! Node: Backwards Compatibility2430930
! Node: Objective-C2432002
! Node: GNU Objective-C runtime API2432609
! Node: Modern GNU Objective-C runtime API2433616
! Node: Traditional GNU Objective-C runtime API2436052
! Node: Executing code before main2436779
! Node: What you can and what you cannot do in +load2439523
! Node: Type encoding2441893
! Node: Legacy type encoding2447259
! Node: @encode2448349
! Node: Method signatures2448894
! Node: Garbage Collection2450886
! Node: Constant string objects2453576
! Node: compatibility_alias2456085
! Node: Exceptions2456810
! Node: Synchronization2459520
! Node: Fast enumeration2460704
! Node: Using fast enumeration2461016
! Node: c99-like fast enumeration syntax2462227
! Node: Fast enumeration details2462930
! Node: Fast enumeration protocol2465270
! Node: Messaging with the GNU Objective-C runtime2468422
! Node: Dynamically registering methods2469794
! Node: Forwarding hook2471485
! Node: Compatibility2474525
! Node: Gcov2481081
! Node: Gcov Intro2481616
! Node: Invoking Gcov2484334
! Node: Gcov and Optimization2507067
! Node: Gcov Data Files2510820
! Node: Cross-profiling2512229
! Node: Gcov-tool2514083
! Node: Gcov-tool Intro2514508
! Node: Invoking Gcov-tool2516478
! Node: Gcov-dump2519056
! Node: Gcov-dump Intro2519379
! Node: Invoking Gcov-dump2519646
! Node: lto-dump2520303
! Node: lto-dump Intro2520602
! Node: Invoking lto-dump2520852
! Node: Trouble2521948
! Node: Actual Bugs2523365
! Node: Interoperation2523812
! Node: Incompatibilities2530703
! Node: Fixed Headers2538855
! Node: Standard Libraries2540513
! Node: Disappointments2541885
! Node: C++ Misunderstandings2546244
! Node: Static Definitions2547055
! Node: Name lookup2548108
! Ref: Name lookup-Footnote-12552889
! Node: Temporaries2553078
! Node: Copy Assignment2555054
! Node: Non-bugs2556889
! Node: Warnings and Errors2567395
! Node: Bugs2569157
! Node: Bug Criteria2569624
! Node: Bug Reporting2571834
! Node: Service2572052
! Node: Contributing2572873
! Node: Funding2573619
! Node: GNU Project2576109
! Node: Copying2576757
! Node: GNU Free Documentation License2614268
! Node: Contributors2639388
! Node: Option Index2680362
! Node: Keyword Index2979753
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/gcc/doc/gccinstall.info gcc-12.4.0/gcc/doc/gccinstall.info
*** gcc-12.3.0/gcc/doc/gccinstall.info	Mon May  8 12:27:46 2023
--- gcc-12.4.0/gcc/doc/gccinstall.info	Thu Jun 20 08:26:15 2024
***************
*** 1,4 ****
! This is gccinstall.info, produced by makeinfo version 6.5 from
  install.texi.
  
  Copyright (C) 1988-2022 Free Software Foundation, Inc.
--- 1,4 ----
! This is gccinstall.info, produced by makeinfo version 6.8 from
  install.texi.
  
  Copyright (C) 1988-2022 Free Software Foundation, Inc.
*************** Perl version between 5.6.1 and 5.6.24
*** 264,269 ****
--- 264,272 ----
  
       Used by 'automake'.
  
+      If available, enables parallel testing of 'libgomp' in case that
+      'flock' is not available.
+ 
     Several support libraries are necessary to build GCC, some are
  required, others optional.  While any sufficiently new version of
  required tools usually work, library requirements are generally
*************** Concept Index
*** 4849,4855 ****
  * Menu:
  
  * Binaries:                              Binaries.           (line    6)
! * build_configargs:                      Configuration.      (line 1833)
  * Configuration:                         Configuration.      (line    6)
  * Downloading GCC:                       Downloading the source.
                                                               (line    6)
--- 4852,4858 ----
  * Menu:
  
  * Binaries:                              Binaries.           (line    6)
! * build_configargs:                      Configuration.      (line 1832)
  * Configuration:                         Configuration.      (line    6)
  * Downloading GCC:                       Downloading the source.
                                                               (line    6)
*************** Concept Index
*** 4858,4864 ****
  * FDL, GNU Free Documentation License:   GNU Free Documentation License.
                                                               (line    6)
  * Host specific installation:            Specific.           (line    6)
! * host_configargs:                       Configuration.      (line 1837)
  * Installing GCC: Binaries:              Binaries.           (line    6)
  * Installing GCC: Building:              Building.           (line    6)
  * Installing GCC: Configuration:         Configuration.      (line    6)
--- 4861,4867 ----
  * FDL, GNU Free Documentation License:   GNU Free Documentation License.
                                                               (line    6)
  * Host specific installation:            Specific.           (line    6)
! * host_configargs:                       Configuration.      (line 1836)
  * Installing GCC: Binaries:              Binaries.           (line    6)
  * Installing GCC: Building:              Building.           (line    6)
  * Installing GCC: Configuration:         Configuration.      (line    6)
*************** Concept Index
*** 4868,4874 ****
  * Specific installation notes:           Specific.           (line    6)
  * Target specific installation:          Specific.           (line    6)
  * Target specific installation notes:    Specific.           (line    6)
! * target_configargs:                     Configuration.      (line 1841)
  * Testing:                               Testing.            (line    6)
  * Testsuite:                             Testing.            (line    6)
  
--- 4871,4877 ----
  * Specific installation notes:           Specific.           (line    6)
  * Target specific installation:          Specific.           (line    6)
  * Target specific installation notes:    Specific.           (line    6)
! * target_configargs:                     Configuration.      (line 1840)
  * Testing:                               Testing.            (line    6)
  * Testsuite:                             Testing.            (line    6)
  
*************** Node: Installing GCC2201
*** 4880,4981 ****
  Node: Prerequisites3837
  Ref: GNAT-prerequisite5825
  Ref: GDC-prerequisite7222
! Node: Downloading the source16784
! Node: Configuration18455
! Ref: with-gnu-as36755
! Ref: with-as37650
! Ref: with-gnu-ld39059
! Ref: WithAixSoname64770
! Ref: AixLdCommand65431
! Node: Building107756
! Node: Testing123963
! Node: Final install131794
! Node: Binaries137095
! Node: Specific138202
! Ref: aarch64-x-x138736
! Ref: alpha-x-x140756
! Ref: amd64-x-solaris2140970
! Ref: amdgcn-x-amdhsa141052
! Ref: arc-x-elf32141578
! Ref: arc-linux-uclibc141754
! Ref: arm-x-eabi141895
! Ref: avr142148
! Ref: bfin142729
! Ref: cr16142992
! Ref: cris143408
! Ref: dos143734
! Ref: epiphany-x-elf144059
! Ref: x-x-freebsd144164
! Ref: ft32-x-elf145812
! Ref: h8300-hms145910
! Ref: hppa-hp-hpux146262
! Ref: hppa-hp-hpux10148634
! Ref: hppa-hp-hpux11149047
! Ref: x-x-linux-gnu154449
! Ref: ix86-x-linux154772
! Ref: ix86-x-solaris2155085
! Ref: ia64-x-linux156161
! Ref: ia64-x-hpux156408
! Ref: x-ibm-aix156963
! Ref: TransferAixShobj160625
! Ref: iq2000-x-elf164435
! Ref: lm32-x-elf164575
! Ref: lm32-x-uclinux164679
! Ref: loongarch164807
! Ref: m32c-x-elf165501
! Ref: m32r-x-elf165603
! Ref: m68k-x-x165705
! Ref: m68k-x-uclinux166743
! Ref: microblaze-x-elf166988
! Ref: mips-x-x167107
! Ref: moxie-x-elf169017
! Ref: msp430-x-elf169064
! Ref: nds32le-x-elf169621
! Ref: nds32be-x-elf169693
! Ref: nvptx-x-none169762
! Ref: or1k-x-elf170273
! Ref: or1k-x-linux170404
! Ref: powerpc-x-x170485
! Ref: powerpc-x-darwin170676
! Ref: powerpc-x-elf171171
! Ref: powerpc-x-linux-gnu171256
! Ref: powerpc-x-netbsd171351
! Ref: powerpc-x-eabisim171439
! Ref: powerpc-x-eabi171565
! Ref: powerpcle-x-elf171641
! Ref: powerpcle-x-eabisim171733
! Ref: powerpcle-x-eabi171866
! Ref: rl78-x-elf171949
! Ref: riscv32-x-elf172055
! Ref: riscv32-x-linux172244
! Ref: riscv64-x-elf172401
! Ref: riscv64-x-linux172590
! Ref: rx-x-elf172747
! Ref: s390-x-linux172793
! Ref: s390x-x-linux172865
! Ref: s390x-ibm-tpf172952
! Ref: x-x-solaris2173083
! Ref: sparc-x-x176517
! Ref: sparc-sun-solaris2177019
! Ref: sparc-x-linux178162
! Ref: sparc64-x-solaris2178193
! Ref: sparcv9-x-solaris2178911
! Ref: c6x-x-x178998
! Ref: tilegx-*-linux179090
! Ref: tilegxbe-*-linux179232
! Ref: tilepro-*-linux179375
! Ref: visium-x-elf179496
! Ref: x-x-vxworks179604
! Ref: x86-64-x-x181127
! Ref: x86-64-x-solaris2181455
! Ref: xtensa-x-elf182105
! Ref: xtensa-x-linux182776
! Ref: windows183117
! Ref: x-x-cygwin184913
! Ref: x-x-mingw32185466
! Ref: older185848
! Ref: elf187965
! Node: GNU Free Documentation License188223
! Node: Concept Index213358
  
  End Tag Table
--- 4883,4989 ----
  Node: Prerequisites3837
  Ref: GNAT-prerequisite5825
  Ref: GDC-prerequisite7222
! Node: Downloading the source16886
! Node: Configuration18557
! Ref: with-gnu-as36857
! Ref: with-as37752
! Ref: with-gnu-ld39161
! Ref: WithAixSoname64872
! Ref: AixLdCommand65533
! Node: Building107858
! Node: Testing124065
! Node: Final install131896
! Node: Binaries137197
! Node: Specific138304
! Ref: aarch64-x-x138838
! Ref: alpha-x-x140858
! Ref: amd64-x-solaris2141072
! Ref: amdgcn-x-amdhsa141154
! Ref: arc-x-elf32141680
! Ref: arc-linux-uclibc141856
! Ref: arm-x-eabi141997
! Ref: avr142250
! Ref: bfin142831
! Ref: cr16143094
! Ref: cris143510
! Ref: dos143836
! Ref: epiphany-x-elf144161
! Ref: x-x-freebsd144266
! Ref: ft32-x-elf145914
! Ref: h8300-hms146012
! Ref: hppa-hp-hpux146364
! Ref: hppa-hp-hpux10148736
! Ref: hppa-hp-hpux11149149
! Ref: x-x-linux-gnu154551
! Ref: ix86-x-linux154874
! Ref: ix86-x-solaris2155187
! Ref: ia64-x-linux156263
! Ref: ia64-x-hpux156510
! Ref: x-ibm-aix157065
! Ref: TransferAixShobj160727
! Ref: iq2000-x-elf164537
! Ref: lm32-x-elf164677
! Ref: lm32-x-uclinux164781
! Ref: loongarch164909
! Ref: m32c-x-elf165603
! Ref: m32r-x-elf165705
! Ref: m68k-x-x165807
! Ref: m68k-x-uclinux166845
! Ref: microblaze-x-elf167090
! Ref: mips-x-x167209
! Ref: moxie-x-elf169119
! Ref: msp430-x-elf169166
! Ref: nds32le-x-elf169723
! Ref: nds32be-x-elf169795
! Ref: nvptx-x-none169864
! Ref: or1k-x-elf170375
! Ref: or1k-x-linux170506
! Ref: powerpc-x-x170587
! Ref: powerpc-x-darwin170778
! Ref: powerpc-x-elf171273
! Ref: powerpc-x-linux-gnu171358
! Ref: powerpc-x-netbsd171453
! Ref: powerpc-x-eabisim171541
! Ref: powerpc-x-eabi171667
! Ref: powerpcle-x-elf171743
! Ref: powerpcle-x-eabisim171835
! Ref: powerpcle-x-eabi171968
! Ref: rl78-x-elf172051
! Ref: riscv32-x-elf172157
! Ref: riscv32-x-linux172346
! Ref: riscv64-x-elf172503
! Ref: riscv64-x-linux172692
! Ref: rx-x-elf172849
! Ref: s390-x-linux172895
! Ref: s390x-x-linux172967
! Ref: s390x-ibm-tpf173054
! Ref: x-x-solaris2173185
! Ref: sparc-x-x176619
! Ref: sparc-sun-solaris2177121
! Ref: sparc-x-linux178264
! Ref: sparc64-x-solaris2178295
! Ref: sparcv9-x-solaris2179013
! Ref: c6x-x-x179100
! Ref: tilegx-*-linux179192
! Ref: tilegxbe-*-linux179334
! Ref: tilepro-*-linux179477
! Ref: visium-x-elf179598
! Ref: x-x-vxworks179706
! Ref: x86-64-x-x181229
! Ref: x86-64-x-solaris2181557
! Ref: xtensa-x-elf182207
! Ref: xtensa-x-linux182878
! Ref: windows183219
! Ref: x-x-cygwin185015
! Ref: x-x-mingw32185568
! Ref: older185950
! Ref: elf188067
! Node: GNU Free Documentation License188325
! Node: Concept Index213460
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/gcc/doc/gccint.info gcc-12.4.0/gcc/doc/gccint.info
*** gcc-12.3.0/gcc/doc/gccint.info	Mon May  8 12:27:51 2023
--- gcc-12.4.0/gcc/doc/gccint.info	Thu Jun 20 08:26:24 2024
***************
*** 1,4 ****
! This is gccint.info, produced by makeinfo version 6.5 from gccint.texi.
  
  Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
--- 1,4 ----
! This is gccint.info, produced by makeinfo version 6.8 from gccint.texi.
  
  Copyright (C) 1988-2022 Free Software Foundation, Inc.
  
*************** Copies published by the Free Software Fo
*** 47,53 ****
  development.
  
  
! File: gccint.info,  Node: Top,  Next: Contributing
  
  Introduction
  ************
--- 47,53 ----
  development.
  
  
! File: gccint.info,  Node: Top,  Next: Contributing,  Up: (dir)
  
  Introduction
  ************
*************** Introduction
*** 55,61 ****
  This manual documents the internals of the GNU compilers, including how
  to port them to new targets and some information about how to write
  front ends for new languages.  It corresponds to the compilers (GCC)
! version 12.3.0.  The use of the GNU compilers is documented in a
  separate manual.  *Note Introduction: (gcc)Top.
  
   This manual is mainly a reference manual rather than a tutorial.  It
--- 55,61 ----
  This manual documents the internals of the GNU compilers, including how
  to port them to new targets and some information about how to write
  front ends for new languages.  It corresponds to the compilers (GCC)
! version 12.4.0.  The use of the GNU compilers is documented in a
  separate manual.  *Note Introduction: (gcc)Top.
  
   This manual is mainly a reference manual rather than a tutorial.  It
*************** kinds of expressions:
*** 10930,10936 ****
       vector.  For example { 0, 1 } could be seen as two patterns with
       one element each or one pattern with two elements (BASE0 and
       BASE1).  The canonical encoding is always the one with the fewest
!      patterns or (if both encodings have the same number of petterns)
       the one with the fewest encoded elements.
  
       'vector_cst_encoding_nelts (V)' gives the total number of encoded
--- 10930,10936 ----
       vector.  For example { 0, 1 } could be seen as two patterns with
       one element each or one pattern with two elements (BASE0 and
       BASE1).  The canonical encoding is always the one with the fewest
!      patterns or (if both encodings have the same number of patterns)
       the one with the fewest encoded elements.
  
       'vector_cst_encoding_nelts (V)' gives the total number of encoded
*************** File: gccint.info,  Node: GIMPLE_CALL,
*** 14304,14310 ****
       call needs no further simplification.  All the call flags in
       'call_expr' are copied over to the new 'GIMPLE_CALL'.
  
!  -- GIMPLE function: gcall *gimple_build_call_vec (tree fn, 'vec'
            args)
       Identical to 'gimple_build_call' but the arguments are stored in a
       'vec'.
--- 14304,14310 ----
       call needs no further simplification.  All the call flags in
       'call_expr' are copied over to the new 'GIMPLE_CALL'.
  
!  -- GIMPLE function: gcall *gimple_build_call_vec (tree fn, vec
            args)
       Identical to 'gimple_build_call' but the arguments are stored in a
       'vec'.
*************** File: gccint.info,  Node: GIMPLE_SWITCH,
*** 15111,15117 ****
  -----------------------
  
   -- GIMPLE function: gswitch *gimple_build_switch (tree index, tree
!           default_label, 'vec' *args)
       Build a 'GIMPLE_SWITCH' statement.  'INDEX' is the index variable
       to switch on, and 'DEFAULT_LABEL' represents the default label.
       'ARGS' is a vector of 'CASE_LABEL_EXPR' trees that contain the
--- 15111,15117 ----
  -----------------------
  
   -- GIMPLE function: gswitch *gimple_build_switch (tree index, tree
!           default_label, vec *args)
       Build a 'GIMPLE_SWITCH' statement.  'INDEX' is the index variable
       to switch on, and 'DEFAULT_LABEL' represents the default label.
       'ARGS' is a vector of 'CASE_LABEL_EXPR' trees that contain the
*************** The simplest RTL expressions are those t
*** 17798,17804 ****
       vector.  For example { 0, 1 } could be seen as two patterns with
       one element each or one pattern with two elements (BASE0 and
       BASE1).  The canonical encoding is always the one with the fewest
!      patterns or (if both encodings have the same number of petterns)
       the one with the fewest encoded elements.
  
       'const_vector_encoding_nelts (V)' gives the total number of encoded
--- 17798,17804 ----
       vector.  For example { 0, 1 } could be seen as two patterns with
       one element each or one pattern with two elements (BASE0 and
       BASE1).  The canonical encoding is always the one with the fewest
!      patterns or (if both encodings have the same number of patterns)
       the one with the fewest encoded elements.
  
       'const_vector_encoding_nelts (V)' gives the total number of encoded
*************** alphabetical order.
*** 49364,49370 ****
  
     * Ralf Corsepius for SH testing and minor bug fixing.
  
!    * Franc,ois-Xavier Coudert for contributions to GNU Fortran.
  
     * Stan Cox for care and feeding of the x86 port and lots of behind
       the scenes hacking.
--- 49364,49370 ----
  
     * Ralf Corsepius for SH testing and minor bug fixing.
  
!    * François-Xavier Coudert for contributions to GNU Fortran.
  
     * Stan Cox for care and feeding of the x86 port and lots of behind
       the scenes hacking.
*************** alphabetical order.
*** 49407,49413 ****
       disbursement, configuration architecture, libio maintenance, and
       early math work.
  
!    * Franc,ois Dumont for his work on libstdc++-v3, especially
       maintaining and improving 'debug-mode' and associative and
       unordered containers.
  
--- 49407,49413 ----
       disbursement, configuration architecture, libio maintenance, and
       early math work.
  
!    * François Dumont for his work on libstdc++-v3, especially
       maintaining and improving 'debug-mode' and associative and
       unordered containers.
  
*************** alphabetical order.
*** 49666,49678 ****
  
     * Weiwen Liu for testing and various bug fixes.
  
!    * Manuel Lo'pez-Iba'n~ez for improving '-Wconversion' and many other
       diagnostics fixes and improvements.
  
     * Dave Love for his ongoing work with the Fortran front end and
       runtime libraries.
  
!    * Martin von Lo"wis for internal consistency checking infrastructure,
       various C++ improvements including namespace support, and tons of
       assistance with libstdc++/compiler merges.
  
--- 49666,49678 ----
  
     * Weiwen Liu for testing and various bug fixes.
  
!    * Manuel López-Ibáñez for improving '-Wconversion' and many other
       diagnostics fixes and improvements.
  
     * Dave Love for his ongoing work with the Fortran front end and
       runtime libraries.
  
!    * Martin von Löwis for internal consistency checking infrastructure,
       various C++ improvements including namespace support, and tons of
       assistance with libstdc++/compiler merges.
  
*************** alphabetical order.
*** 49864,49870 ****
  
     * Craig Rodrigues for processing tons of bug reports.
  
!    * Ola Ro"nnerup for work on mt_alloc.
  
     * Gavin Romig-Koch for lots of behind the scenes MIPS work.
  
--- 49864,49870 ----
  
     * Craig Rodrigues for processing tons of bug reports.
  
!    * Ola Rönnerup for work on mt_alloc.
  
     * Gavin Romig-Koch for lots of behind the scenes MIPS work.
  
*************** alphabetical order.
*** 49878,49884 ****
  
     * Paul Rubin wrote most of the preprocessor.
  
!    * Pe'tur Runo'lfsson for major performance improvements in C++
       formatted I/O and large file support in C++ filebuf.
  
     * Chip Salzenberg for libstdc++ patches and improvements to locales,
--- 49878,49884 ----
  
     * Paul Rubin wrote most of the preprocessor.
  
!    * Pétur Runólfsson for major performance improvements in C++
       formatted I/O and large file support in C++ filebuf.
  
     * Chip Salzenberg for libstdc++ patches and improvements to locales,
*************** alphabetical order.
*** 49899,49905 ****
  
     * William Schelter did most of the work on the Intel 80386 support.
  
!    * Tobias Schlu"ter for work on GNU Fortran.
  
     * Bernd Schmidt for various code generation improvements and major
       work in the reload pass, serving as release manager for GCC 2.95.3,
--- 49899,49905 ----
  
     * William Schelter did most of the work on the Intel 80386 support.
  
!    * Tobias Schlüter for work on GNU Fortran.
  
     * Bernd Schmidt for various code generation improvements and major
       work in the reload pass, serving as release manager for GCC 2.95.3,
*************** contributions to testing:
*** 50396,50402 ****
  
     * Robert A. French
  
!    * Jo"rgen Freyh
  
     * Mark K. Gardner
  
--- 50396,50402 ----
  
     * Robert A. French
  
!    * Jörgen Freyh
  
     * Mark K. Gardner
  
*************** Concept Index
*** 50618,50660 ****
  * __absvsi2:                             Integer library routines.
                                                               (line  105)
  * __addda3:                              Fixed-point fractional library routines.
!                                                              (line   52)
  * __adddf3:                              Soft float library routines.
                                                               (line   22)
  * __adddq3:                              Fixed-point fractional library routines.
!                                                              (line   39)
  * __addha3:                              Fixed-point fractional library routines.
!                                                              (line   49)
  * __addhq3:                              Fixed-point fractional library routines.
!                                                              (line   37)
  * __addqq3:                              Fixed-point fractional library routines.
!                                                              (line   35)
  * __addsa3:                              Fixed-point fractional library routines.
!                                                              (line   51)
  * __addsf3:                              Soft float library routines.
                                                               (line   21)
  * __addsq3:                              Fixed-point fractional library routines.
!                                                              (line   38)
  * __addta3:                              Fixed-point fractional library routines.
!                                                              (line   53)
  * __addtf3:                              Soft float library routines.
                                                               (line   23)
  * __adduda3:                             Fixed-point fractional library routines.
!                                                              (line   59)
  * __addudq3:                             Fixed-point fractional library routines.
!                                                              (line   47)
  * __adduha3:                             Fixed-point fractional library routines.
!                                                              (line   55)
  * __adduhq3:                             Fixed-point fractional library routines.
!                                                              (line   43)
  * __adduqq3:                             Fixed-point fractional library routines.
!                                                              (line   41)
  * __addusa3:                             Fixed-point fractional library routines.
!                                                              (line   57)
  * __addusq3:                             Fixed-point fractional library routines.
!                                                              (line   45)
  * __adduta3:                             Fixed-point fractional library routines.
!                                                              (line   61)
  * __addvdi3:                             Integer library routines.
                                                               (line  110)
  * __addvsi3:                             Integer library routines.
--- 50618,50660 ----
  * __absvsi2:                             Integer library routines.
                                                               (line  105)
  * __addda3:                              Fixed-point fractional library routines.
!                                                              (line   44)
  * __adddf3:                              Soft float library routines.
                                                               (line   22)
  * __adddq3:                              Fixed-point fractional library routines.
!                                                              (line   31)
  * __addha3:                              Fixed-point fractional library routines.
!                                                              (line   41)
  * __addhq3:                              Fixed-point fractional library routines.
!                                                              (line   29)
  * __addqq3:                              Fixed-point fractional library routines.
!                                                              (line   27)
  * __addsa3:                              Fixed-point fractional library routines.
!                                                              (line   43)
  * __addsf3:                              Soft float library routines.
                                                               (line   21)
  * __addsq3:                              Fixed-point fractional library routines.
!                                                              (line   30)
  * __addta3:                              Fixed-point fractional library routines.
!                                                              (line   45)
  * __addtf3:                              Soft float library routines.
                                                               (line   23)
  * __adduda3:                             Fixed-point fractional library routines.
!                                                              (line   51)
  * __addudq3:                             Fixed-point fractional library routines.
!                                                              (line   39)
  * __adduha3:                             Fixed-point fractional library routines.
!                                                              (line   47)
  * __adduhq3:                             Fixed-point fractional library routines.
!                                                              (line   35)
  * __adduqq3:                             Fixed-point fractional library routines.
!                                                              (line   33)
  * __addusa3:                             Fixed-point fractional library routines.
!                                                              (line   49)
  * __addusq3:                             Fixed-point fractional library routines.
!                                                              (line   37)
  * __adduta3:                             Fixed-point fractional library routines.
!                                                              (line   53)
  * __addvdi3:                             Integer library routines.
                                                               (line  110)
  * __addvsi3:                             Integer library routines.
*************** Concept Index
*** 50662,50724 ****
  * __addxf3:                              Soft float library routines.
                                                               (line   25)
  * __ashlda3:                             Fixed-point fractional library routines.
!                                                              (line  358)
  * __ashldi3:                             Integer library routines.
                                                               (line   13)
  * __ashldq3:                             Fixed-point fractional library routines.
!                                                              (line  346)
  * __ashlha3:                             Fixed-point fractional library routines.
!                                                              (line  356)
  * __ashlhq3:                             Fixed-point fractional library routines.
!                                                              (line  344)
  * __ashlqq3:                             Fixed-point fractional library routines.
!                                                              (line  343)
  * __ashlsa3:                             Fixed-point fractional library routines.
!                                                              (line  357)
  * __ashlsi3:                             Integer library routines.
                                                               (line   12)
  * __ashlsq3:                             Fixed-point fractional library routines.
!                                                              (line  345)
  * __ashlta3:                             Fixed-point fractional library routines.
!                                                              (line  359)
  * __ashlti3:                             Integer library routines.
                                                               (line   14)
  * __ashluda3:                            Fixed-point fractional library routines.
!                                                              (line  365)
  * __ashludq3:                            Fixed-point fractional library routines.
!                                                              (line  354)
  * __ashluha3:                            Fixed-point fractional library routines.
!                                                              (line  361)
  * __ashluhq3:                            Fixed-point fractional library routines.
!                                                              (line  350)
  * __ashluqq3:                            Fixed-point fractional library routines.
!                                                              (line  348)
  * __ashlusa3:                            Fixed-point fractional library routines.
!                                                              (line  363)
  * __ashlusq3:                            Fixed-point fractional library routines.
!                                                              (line  352)
  * __ashluta3:                            Fixed-point fractional library routines.
!                                                              (line  367)
  * __ashrda3:                             Fixed-point fractional library routines.
!                                                              (line  378)
  * __ashrdi3:                             Integer library routines.
                                                               (line   18)
  * __ashrdq3:                             Fixed-point fractional library routines.
!                                                              (line  374)
  * __ashrha3:                             Fixed-point fractional library routines.
!                                                              (line  376)
  * __ashrhq3:                             Fixed-point fractional library routines.
!                                                              (line  372)
  * __ashrqq3:                             Fixed-point fractional library routines.
!                                                              (line  371)
  * __ashrsa3:                             Fixed-point fractional library routines.
!                                                              (line  377)
  * __ashrsi3:                             Integer library routines.
                                                               (line   17)
  * __ashrsq3:                             Fixed-point fractional library routines.
!                                                              (line  373)
  * __ashrta3:                             Fixed-point fractional library routines.
!                                                              (line  379)
  * __ashrti3:                             Integer library routines.
                                                               (line   19)
  * __bid_adddd3:                          Decimal float library routines.
--- 50662,50724 ----
  * __addxf3:                              Soft float library routines.
                                                               (line   25)
  * __ashlda3:                             Fixed-point fractional library routines.
!                                                              (line  350)
  * __ashldi3:                             Integer library routines.
                                                               (line   13)
  * __ashldq3:                             Fixed-point fractional library routines.
!                                                              (line  338)
  * __ashlha3:                             Fixed-point fractional library routines.
!                                                              (line  348)
  * __ashlhq3:                             Fixed-point fractional library routines.
!                                                              (line  336)
  * __ashlqq3:                             Fixed-point fractional library routines.
!                                                              (line  335)
  * __ashlsa3:                             Fixed-point fractional library routines.
!                                                              (line  349)
  * __ashlsi3:                             Integer library routines.
                                                               (line   12)
  * __ashlsq3:                             Fixed-point fractional library routines.
!                                                              (line  337)
  * __ashlta3:                             Fixed-point fractional library routines.
!                                                              (line  351)
  * __ashlti3:                             Integer library routines.
                                                               (line   14)
  * __ashluda3:                            Fixed-point fractional library routines.
!                                                              (line  357)
  * __ashludq3:                            Fixed-point fractional library routines.
!                                                              (line  346)
  * __ashluha3:                            Fixed-point fractional library routines.
!                                                              (line  353)
  * __ashluhq3:                            Fixed-point fractional library routines.
!                                                              (line  342)
  * __ashluqq3:                            Fixed-point fractional library routines.
!                                                              (line  340)
  * __ashlusa3:                            Fixed-point fractional library routines.
!                                                              (line  355)
  * __ashlusq3:                            Fixed-point fractional library routines.
!                                                              (line  344)
  * __ashluta3:                            Fixed-point fractional library routines.
!                                                              (line  359)
  * __ashrda3:                             Fixed-point fractional library routines.
!                                                              (line  370)
  * __ashrdi3:                             Integer library routines.
                                                               (line   18)
  * __ashrdq3:                             Fixed-point fractional library routines.
!                                                              (line  366)
  * __ashrha3:                             Fixed-point fractional library routines.
!                                                              (line  368)
  * __ashrhq3:                             Fixed-point fractional library routines.
!                                                              (line  364)
  * __ashrqq3:                             Fixed-point fractional library routines.
!                                                              (line  363)
  * __ashrsa3:                             Fixed-point fractional library routines.
!                                                              (line  369)
  * __ashrsi3:                             Integer library routines.
                                                               (line   17)
  * __ashrsq3:                             Fixed-point fractional library routines.
!                                                              (line  365)
  * __ashrta3:                             Fixed-point fractional library routines.
!                                                              (line  371)
  * __ashrti3:                             Integer library routines.
                                                               (line   19)
  * __bid_adddd3:                          Decimal float library routines.
*************** Concept Index
*** 50917,50963 ****
  * __clzti2:                              Integer library routines.
                                                               (line  131)
  * __cmpda2:                              Fixed-point fractional library routines.
!                                                              (line  458)
  * __cmpdf2:                              Soft float library routines.
                                                               (line  163)
  * __cmpdi2:                              Integer library routines.
                                                               (line   86)
  * __cmpdq2:                              Fixed-point fractional library routines.
!                                                              (line  447)
  * __cmpha2:                              Fixed-point fractional library routines.
!                                                              (line  456)
  * __cmphq2:                              Fixed-point fractional library routines.
!                                                              (line  445)
  * __cmpqq2:                              Fixed-point fractional library routines.
!                                                              (line  444)
  * __cmpsa2:                              Fixed-point fractional library routines.
!                                                              (line  457)
  * __cmpsf2:                              Soft float library routines.
                                                               (line  162)
  * __cmpsq2:                              Fixed-point fractional library routines.
!                                                              (line  446)
  * __cmpta2:                              Fixed-point fractional library routines.
!                                                              (line  459)
  * __cmptf2:                              Soft float library routines.
                                                               (line  164)
  * __cmpti2:                              Integer library routines.
                                                               (line   87)
  * __cmpuda2:                             Fixed-point fractional library routines.
!                                                              (line  464)
  * __cmpudq2:                             Fixed-point fractional library routines.
!                                                              (line  454)
  * __cmpuha2:                             Fixed-point fractional library routines.
!                                                              (line  461)
  * __cmpuhq2:                             Fixed-point fractional library routines.
!                                                              (line  451)
  * __cmpuqq2:                             Fixed-point fractional library routines.
!                                                              (line  449)
  * __cmpusa2:                             Fixed-point fractional library routines.
!                                                              (line  463)
  * __cmpusq2:                             Fixed-point fractional library routines.
!                                                              (line  452)
  * __cmputa2:                             Fixed-point fractional library routines.
!                                                              (line  466)
  * __CTOR_LIST__:                         Initialization.     (line   25)
  * __ctzdi2:                              Integer library routines.
                                                               (line  137)
--- 50917,50963 ----
  * __clzti2:                              Integer library routines.
                                                               (line  131)
  * __cmpda2:                              Fixed-point fractional library routines.
!                                                              (line  450)
  * __cmpdf2:                              Soft float library routines.
                                                               (line  163)
  * __cmpdi2:                              Integer library routines.
                                                               (line   86)
  * __cmpdq2:                              Fixed-point fractional library routines.
!                                                              (line  439)
  * __cmpha2:                              Fixed-point fractional library routines.
!                                                              (line  448)
  * __cmphq2:                              Fixed-point fractional library routines.
!                                                              (line  437)
  * __cmpqq2:                              Fixed-point fractional library routines.
!                                                              (line  436)
  * __cmpsa2:                              Fixed-point fractional library routines.
!                                                              (line  449)
  * __cmpsf2:                              Soft float library routines.
                                                               (line  162)
  * __cmpsq2:                              Fixed-point fractional library routines.
!                                                              (line  438)
  * __cmpta2:                              Fixed-point fractional library routines.
!                                                              (line  451)
  * __cmptf2:                              Soft float library routines.
                                                               (line  164)
  * __cmpti2:                              Integer library routines.
                                                               (line   87)
  * __cmpuda2:                             Fixed-point fractional library routines.
!                                                              (line  456)
  * __cmpudq2:                             Fixed-point fractional library routines.
!                                                              (line  446)
  * __cmpuha2:                             Fixed-point fractional library routines.
!                                                              (line  453)
  * __cmpuhq2:                             Fixed-point fractional library routines.
!                                                              (line  443)
  * __cmpuqq2:                             Fixed-point fractional library routines.
!                                                              (line  441)
  * __cmpusa2:                             Fixed-point fractional library routines.
!                                                              (line  455)
  * __cmpusq2:                             Fixed-point fractional library routines.
!                                                              (line  444)
  * __cmputa2:                             Fixed-point fractional library routines.
!                                                              (line  458)
  * __CTOR_LIST__:                         Initialization.     (line   25)
  * __ctzdi2:                              Integer library routines.
                                                               (line  137)
*************** Concept Index
*** 50966,50972 ****
  * __ctzti2:                              Integer library routines.
                                                               (line  138)
  * __divda3:                              Fixed-point fractional library routines.
!                                                              (line  234)
  * __divdc3:                              Soft float library routines.
                                                               (line  250)
  * __divdf3:                              Soft float library routines.
--- 50966,50972 ----
  * __ctzti2:                              Integer library routines.
                                                               (line  138)
  * __divda3:                              Fixed-point fractional library routines.
!                                                              (line  226)
  * __divdc3:                              Soft float library routines.
                                                               (line  250)
  * __divdf3:                              Soft float library routines.
*************** Concept Index
*** 50974,50988 ****
  * __divdi3:                              Integer library routines.
                                                               (line   24)
  * __divdq3:                              Fixed-point fractional library routines.
!                                                              (line  229)
  * __divha3:                              Fixed-point fractional library routines.
!                                                              (line  231)
  * __divhq3:                              Fixed-point fractional library routines.
!                                                              (line  227)
  * __divqq3:                              Fixed-point fractional library routines.
!                                                              (line  225)
  * __divsa3:                              Fixed-point fractional library routines.
!                                                              (line  233)
  * __divsc3:                              Soft float library routines.
                                                               (line  248)
  * __divsf3:                              Soft float library routines.
--- 50974,50988 ----
  * __divdi3:                              Integer library routines.
                                                               (line   24)
  * __divdq3:                              Fixed-point fractional library routines.
!                                                              (line  221)
  * __divha3:                              Fixed-point fractional library routines.
!                                                              (line  223)
  * __divhq3:                              Fixed-point fractional library routines.
!                                                              (line  219)
  * __divqq3:                              Fixed-point fractional library routines.
!                                                              (line  217)
  * __divsa3:                              Fixed-point fractional library routines.
!                                                              (line  225)
  * __divsc3:                              Soft float library routines.
                                                               (line  248)
  * __divsf3:                              Soft float library routines.
*************** Concept Index
*** 50990,50998 ****
  * __divsi3:                              Integer library routines.
                                                               (line   23)
  * __divsq3:                              Fixed-point fractional library routines.
!                                                              (line  228)
  * __divta3:                              Fixed-point fractional library routines.
!                                                              (line  235)
  * __divtc3:                              Soft float library routines.
                                                               (line  252)
  * __divtf3:                              Soft float library routines.
--- 50990,50998 ----
  * __divsi3:                              Integer library routines.
                                                               (line   23)
  * __divsq3:                              Fixed-point fractional library routines.
!                                                              (line  220)
  * __divta3:                              Fixed-point fractional library routines.
!                                                              (line  227)
  * __divtc3:                              Soft float library routines.
                                                               (line  252)
  * __divtf3:                              Soft float library routines.
*************** Concept Index
*** 51301,52553 ****
  * __floatuntixf:                         Soft float library routines.
                                                               (line  153)
  * __fractdadf:                           Fixed-point fractional library routines.
!                                                              (line  643)
  * __fractdadi:                           Fixed-point fractional library routines.
!                                                              (line  640)
  * __fractdadq:                           Fixed-point fractional library routines.
!                                                              (line  623)
  * __fractdaha2:                          Fixed-point fractional library routines.
!                                                              (line  624)
  * __fractdahi:                           Fixed-point fractional library routines.
!                                                              (line  638)
  * __fractdahq:                           Fixed-point fractional library routines.
!                                                              (line  621)
  * __fractdaqi:                           Fixed-point fractional library routines.
!                                                              (line  637)
  * __fractdaqq:                           Fixed-point fractional library routines.
!                                                              (line  620)
  * __fractdasa2:                          Fixed-point fractional library routines.
!                                                              (line  625)
  * __fractdasf:                           Fixed-point fractional library routines.
!                                                              (line  642)
  * __fractdasi:                           Fixed-point fractional library routines.
!                                                              (line  639)
  * __fractdasq:                           Fixed-point fractional library routines.
!                                                              (line  622)
  * __fractdata2:                          Fixed-point fractional library routines.
!                                                              (line  626)
  * __fractdati:                           Fixed-point fractional library routines.
!                                                              (line  641)
  * __fractdauda:                          Fixed-point fractional library routines.
!                                                              (line  634)
  * __fractdaudq:                          Fixed-point fractional library routines.
!                                                              (line  630)
  * __fractdauha:                          Fixed-point fractional library routines.
!                                                              (line  632)
  * __fractdauhq:                          Fixed-point fractional library routines.
!                                                              (line  628)
  * __fractdauqq:                          Fixed-point fractional library routines.
!                                                              (line  627)
  * __fractdausa:                          Fixed-point fractional library routines.
!                                                              (line  633)
  * __fractdausq:                          Fixed-point fractional library routines.
!                                                              (line  629)
  * __fractdauta:                          Fixed-point fractional library routines.
!                                                              (line  635)
  * __fractdfda:                           Fixed-point fractional library routines.
!                                                              (line 1032)
  * __fractdfdq:                           Fixed-point fractional library routines.
!                                                              (line 1029)
  * __fractdfha:                           Fixed-point fractional library routines.
!                                                              (line 1030)
  * __fractdfhq:                           Fixed-point fractional library routines.
!                                                              (line 1027)
  * __fractdfqq:                           Fixed-point fractional library routines.
!                                                              (line 1026)
  * __fractdfsa:                           Fixed-point fractional library routines.
!                                                              (line 1031)
  * __fractdfsq:                           Fixed-point fractional library routines.
!                                                              (line 1028)
  * __fractdfta:                           Fixed-point fractional library routines.
!                                                              (line 1033)
  * __fractdfuda:                          Fixed-point fractional library routines.
!                                                              (line 1040)
  * __fractdfudq:                          Fixed-point fractional library routines.
!                                                              (line 1037)
  * __fractdfuha:                          Fixed-point fractional library routines.
!                                                              (line 1038)
  * __fractdfuhq:                          Fixed-point fractional library routines.
!                                                              (line 1035)
  * __fractdfuqq:                          Fixed-point fractional library routines.
!                                                              (line 1034)
  * __fractdfusa:                          Fixed-point fractional library routines.
!                                                              (line 1039)
  * __fractdfusq:                          Fixed-point fractional library routines.
!                                                              (line 1036)
  * __fractdfuta:                          Fixed-point fractional library routines.
!                                                              (line 1041)
  * __fractdida:                           Fixed-point fractional library routines.
!                                                              (line  982)
  * __fractdidq:                           Fixed-point fractional library routines.
!                                                              (line  979)
  * __fractdiha:                           Fixed-point fractional library routines.
!                                                              (line  980)
  * __fractdihq:                           Fixed-point fractional library routines.
!                                                              (line  977)
  * __fractdiqq:                           Fixed-point fractional library routines.
!                                                              (line  976)
  * __fractdisa:                           Fixed-point fractional library routines.
!                                                              (line  981)
  * __fractdisq:                           Fixed-point fractional library routines.
!                                                              (line  978)
  * __fractdita:                           Fixed-point fractional library routines.
!                                                              (line  983)
  * __fractdiuda:                          Fixed-point fractional library routines.
!                                                              (line  990)
  * __fractdiudq:                          Fixed-point fractional library routines.
!                                                              (line  987)
  * __fractdiuha:                          Fixed-point fractional library routines.
!                                                              (line  988)
  * __fractdiuhq:                          Fixed-point fractional library routines.
!                                                              (line  985)
  * __fractdiuqq:                          Fixed-point fractional library routines.
!                                                              (line  984)
  * __fractdiusa:                          Fixed-point fractional library routines.
!                                                              (line  989)
  * __fractdiusq:                          Fixed-point fractional library routines.
!                                                              (line  986)
  * __fractdiuta:                          Fixed-point fractional library routines.
!                                                              (line  991)
  * __fractdqda:                           Fixed-point fractional library routines.
!                                                              (line  551)
  * __fractdqdf:                           Fixed-point fractional library routines.
!                                                              (line  573)
  * __fractdqdi:                           Fixed-point fractional library routines.
!                                                              (line  570)
  * __fractdqha:                           Fixed-point fractional library routines.
!                                                              (line  549)
  * __fractdqhi:                           Fixed-point fractional library routines.
!                                                              (line  568)
  * __fractdqhq2:                          Fixed-point fractional library routines.
!                                                              (line  547)
  * __fractdqqi:                           Fixed-point fractional library routines.
!                                                              (line  567)
  * __fractdqqq2:                          Fixed-point fractional library routines.
!                                                              (line  546)
  * __fractdqsa:                           Fixed-point fractional library routines.
!                                                              (line  550)
  * __fractdqsf:                           Fixed-point fractional library routines.
!                                                              (line  572)
  * __fractdqsi:                           Fixed-point fractional library routines.
!                                                              (line  569)
  * __fractdqsq2:                          Fixed-point fractional library routines.
!                                                              (line  548)
  * __fractdqta:                           Fixed-point fractional library routines.
!                                                              (line  552)
  * __fractdqti:                           Fixed-point fractional library routines.
-                                                              (line  571)
- * __fractdquda:                          Fixed-point fractional library routines.
                                                               (line  563)
  * __fractdqudq:                          Fixed-point fractional library routines.
!                                                              (line  558)
  * __fractdquha:                          Fixed-point fractional library routines.
!                                                              (line  560)
  * __fractdquhq:                          Fixed-point fractional library routines.
!                                                              (line  555)
  * __fractdquqq:                          Fixed-point fractional library routines.
!                                                              (line  553)
  * __fractdqusa:                          Fixed-point fractional library routines.
!                                                              (line  562)
  * __fractdqusq:                          Fixed-point fractional library routines.
!                                                              (line  556)
  * __fractdquta:                          Fixed-point fractional library routines.
!                                                              (line  565)
  * __fracthada2:                          Fixed-point fractional library routines.
!                                                              (line  579)
  * __fracthadf:                           Fixed-point fractional library routines.
!                                                              (line  597)
  * __fracthadi:                           Fixed-point fractional library routines.
!                                                              (line  594)
  * __fracthadq:                           Fixed-point fractional library routines.
!                                                              (line  577)
  * __fracthahi:                           Fixed-point fractional library routines.
!                                                              (line  592)
  * __fracthahq:                           Fixed-point fractional library routines.
!                                                              (line  575)
  * __fracthaqi:                           Fixed-point fractional library routines.
!                                                              (line  591)
  * __fracthaqq:                           Fixed-point fractional library routines.
!                                                              (line  574)
  * __fracthasa2:                          Fixed-point fractional library routines.
!                                                              (line  578)
  * __fracthasf:                           Fixed-point fractional library routines.
!                                                              (line  596)
  * __fracthasi:                           Fixed-point fractional library routines.
!                                                              (line  593)
  * __fracthasq:                           Fixed-point fractional library routines.
!                                                              (line  576)
  * __fracthata2:                          Fixed-point fractional library routines.
!                                                              (line  580)
  * __fracthati:                           Fixed-point fractional library routines.
!                                                              (line  595)
  * __fracthauda:                          Fixed-point fractional library routines.
!                                                              (line  588)
  * __fracthaudq:                          Fixed-point fractional library routines.
!                                                              (line  584)
  * __fracthauha:                          Fixed-point fractional library routines.
!                                                              (line  586)
  * __fracthauhq:                          Fixed-point fractional library routines.
!                                                              (line  582)
  * __fracthauqq:                          Fixed-point fractional library routines.
!                                                              (line  581)
  * __fracthausa:                          Fixed-point fractional library routines.
!                                                              (line  587)
  * __fracthausq:                          Fixed-point fractional library routines.
!                                                              (line  583)
  * __fracthauta:                          Fixed-point fractional library routines.
!                                                              (line  589)
  * __fracthida:                           Fixed-point fractional library routines.
!                                                              (line  950)
  * __fracthidq:                           Fixed-point fractional library routines.
!                                                              (line  947)
  * __fracthiha:                           Fixed-point fractional library routines.
!                                                              (line  948)
  * __fracthihq:                           Fixed-point fractional library routines.
!                                                              (line  945)
  * __fracthiqq:                           Fixed-point fractional library routines.
!                                                              (line  944)
  * __fracthisa:                           Fixed-point fractional library routines.
!                                                              (line  949)
  * __fracthisq:                           Fixed-point fractional library routines.
!                                                              (line  946)
  * __fracthita:                           Fixed-point fractional library routines.
!                                                              (line  951)
  * __fracthiuda:                          Fixed-point fractional library routines.
!                                                              (line  958)
  * __fracthiudq:                          Fixed-point fractional library routines.
!                                                              (line  955)
  * __fracthiuha:                          Fixed-point fractional library routines.
!                                                              (line  956)
  * __fracthiuhq:                          Fixed-point fractional library routines.
!                                                              (line  953)
  * __fracthiuqq:                          Fixed-point fractional library routines.
!                                                              (line  952)
  * __fracthiusa:                          Fixed-point fractional library routines.
!                                                              (line  957)
  * __fracthiusq:                          Fixed-point fractional library routines.
!                                                              (line  954)
  * __fracthiuta:                          Fixed-point fractional library routines.
!                                                              (line  959)
  * __fracthqda:                           Fixed-point fractional library routines.
!                                                              (line  505)
  * __fracthqdf:                           Fixed-point fractional library routines.
!                                                              (line  521)
  * __fracthqdi:                           Fixed-point fractional library routines.
!                                                              (line  518)
  * __fracthqdq2:                          Fixed-point fractional library routines.
!                                                              (line  502)
  * __fracthqha:                           Fixed-point fractional library routines.
!                                                              (line  503)
  * __fracthqhi:                           Fixed-point fractional library routines.
!                                                              (line  516)
  * __fracthqqi:                           Fixed-point fractional library routines.
!                                                              (line  515)
  * __fracthqqq2:                          Fixed-point fractional library routines.
!                                                              (line  500)
  * __fracthqsa:                           Fixed-point fractional library routines.
!                                                              (line  504)
  * __fracthqsf:                           Fixed-point fractional library routines.
!                                                              (line  520)
  * __fracthqsi:                           Fixed-point fractional library routines.
!                                                              (line  517)
  * __fracthqsq2:                          Fixed-point fractional library routines.
!                                                              (line  501)
  * __fracthqta:                           Fixed-point fractional library routines.
!                                                              (line  506)
  * __fracthqti:                           Fixed-point fractional library routines.
!                                                              (line  519)
  * __fracthquda:                          Fixed-point fractional library routines.
!                                                              (line  513)
  * __fracthqudq:                          Fixed-point fractional library routines.
!                                                              (line  510)
  * __fracthquha:                          Fixed-point fractional library routines.
!                                                              (line  511)
  * __fracthquhq:                          Fixed-point fractional library routines.
!                                                              (line  508)
  * __fracthquqq:                          Fixed-point fractional library routines.
!                                                              (line  507)
  * __fracthqusa:                          Fixed-point fractional library routines.
!                                                              (line  512)
  * __fracthqusq:                          Fixed-point fractional library routines.
!                                                              (line  509)
  * __fracthquta:                          Fixed-point fractional library routines.
!                                                              (line  514)
  * __fractqida:                           Fixed-point fractional library routines.
!                                                              (line  932)
  * __fractqidq:                           Fixed-point fractional library routines.
!                                                              (line  929)
  * __fractqiha:                           Fixed-point fractional library routines.
!                                                              (line  930)
  * __fractqihq:                           Fixed-point fractional library routines.
!                                                              (line  927)
  * __fractqiqq:                           Fixed-point fractional library routines.
!                                                              (line  926)
  * __fractqisa:                           Fixed-point fractional library routines.
!                                                              (line  931)
  * __fractqisq:                           Fixed-point fractional library routines.
!                                                              (line  928)
  * __fractqita:                           Fixed-point fractional library routines.
!                                                              (line  933)
  * __fractqiuda:                          Fixed-point fractional library routines.
!                                                              (line  941)
  * __fractqiudq:                          Fixed-point fractional library routines.
!                                                              (line  937)
  * __fractqiuha:                          Fixed-point fractional library routines.
!                                                              (line  939)
  * __fractqiuhq:                          Fixed-point fractional library routines.
!                                                              (line  935)
  * __fractqiuqq:                          Fixed-point fractional library routines.
!                                                              (line  934)
  * __fractqiusa:                          Fixed-point fractional library routines.
!                                                              (line  940)
  * __fractqiusq:                          Fixed-point fractional library routines.
!                                                              (line  936)
  * __fractqiuta:                          Fixed-point fractional library routines.
!                                                              (line  942)
  * __fractqqda:                           Fixed-point fractional library routines.
!                                                              (line  481)
  * __fractqqdf:                           Fixed-point fractional library routines.
!                                                              (line  499)
  * __fractqqdi:                           Fixed-point fractional library routines.
!                                                              (line  496)
  * __fractqqdq2:                          Fixed-point fractional library routines.
!                                                              (line  478)
  * __fractqqha:                           Fixed-point fractional library routines.
!                                                              (line  479)
  * __fractqqhi:                           Fixed-point fractional library routines.
!                                                              (line  494)
  * __fractqqhq2:                          Fixed-point fractional library routines.
!                                                              (line  476)
  * __fractqqqi:                           Fixed-point fractional library routines.
!                                                              (line  493)
  * __fractqqsa:                           Fixed-point fractional library routines.
!                                                              (line  480)
  * __fractqqsf:                           Fixed-point fractional library routines.
!                                                              (line  498)
  * __fractqqsi:                           Fixed-point fractional library routines.
!                                                              (line  495)
  * __fractqqsq2:                          Fixed-point fractional library routines.
!                                                              (line  477)
  * __fractqqta:                           Fixed-point fractional library routines.
!                                                              (line  482)
  * __fractqqti:                           Fixed-point fractional library routines.
!                                                              (line  497)
  * __fractqquda:                          Fixed-point fractional library routines.
!                                                              (line  490)
  * __fractqqudq:                          Fixed-point fractional library routines.
!                                                              (line  486)
  * __fractqquha:                          Fixed-point fractional library routines.
!                                                              (line  488)
  * __fractqquhq:                          Fixed-point fractional library routines.
!                                                              (line  484)
  * __fractqquqq:                          Fixed-point fractional library routines.
!                                                              (line  483)
  * __fractqqusa:                          Fixed-point fractional library routines.
!                                                              (line  489)
  * __fractqqusq:                          Fixed-point fractional library routines.
!                                                              (line  485)
  * __fractqquta:                          Fixed-point fractional library routines.
!                                                              (line  491)
  * __fractsada2:                          Fixed-point fractional library routines.
!                                                              (line  603)
  * __fractsadf:                           Fixed-point fractional library routines.
!                                                              (line  619)
  * __fractsadi:                           Fixed-point fractional library routines.
!                                                              (line  616)
  * __fractsadq:                           Fixed-point fractional library routines.
!                                                              (line  601)
  * __fractsaha2:                          Fixed-point fractional library routines.
!                                                              (line  602)
  * __fractsahi:                           Fixed-point fractional library routines.
!                                                              (line  614)
  * __fractsahq:                           Fixed-point fractional library routines.
!                                                              (line  599)
  * __fractsaqi:                           Fixed-point fractional library routines.
!                                                              (line  613)
  * __fractsaqq:                           Fixed-point fractional library routines.
!                                                              (line  598)
  * __fractsasf:                           Fixed-point fractional library routines.
!                                                              (line  618)
  * __fractsasi:                           Fixed-point fractional library routines.
!                                                              (line  615)
  * __fractsasq:                           Fixed-point fractional library routines.
!                                                              (line  600)
  * __fractsata2:                          Fixed-point fractional library routines.
!                                                              (line  604)
  * __fractsati:                           Fixed-point fractional library routines.
!                                                              (line  617)
  * __fractsauda:                          Fixed-point fractional library routines.
!                                                              (line  611)
  * __fractsaudq:                          Fixed-point fractional library routines.
!                                                              (line  608)
  * __fractsauha:                          Fixed-point fractional library routines.
!                                                              (line  609)
  * __fractsauhq:                          Fixed-point fractional library routines.
!                                                              (line  606)
  * __fractsauqq:                          Fixed-point fractional library routines.
!                                                              (line  605)
  * __fractsausa:                          Fixed-point fractional library routines.
!                                                              (line  610)
  * __fractsausq:                          Fixed-point fractional library routines.
!                                                              (line  607)
  * __fractsauta:                          Fixed-point fractional library routines.
!                                                              (line  612)
  * __fractsfda:                           Fixed-point fractional library routines.
!                                                              (line 1016)
  * __fractsfdq:                           Fixed-point fractional library routines.
!                                                              (line 1013)
  * __fractsfha:                           Fixed-point fractional library routines.
!                                                              (line 1014)
  * __fractsfhq:                           Fixed-point fractional library routines.
!                                                              (line 1011)
  * __fractsfqq:                           Fixed-point fractional library routines.
!                                                              (line 1010)
  * __fractsfsa:                           Fixed-point fractional library routines.
!                                                              (line 1015)
  * __fractsfsq:                           Fixed-point fractional library routines.
!                                                              (line 1012)
  * __fractsfta:                           Fixed-point fractional library routines.
!                                                              (line 1017)
  * __fractsfuda:                          Fixed-point fractional library routines.
!                                                              (line 1024)
  * __fractsfudq:                          Fixed-point fractional library routines.
!                                                              (line 1021)
  * __fractsfuha:                          Fixed-point fractional library routines.
!                                                              (line 1022)
  * __fractsfuhq:                          Fixed-point fractional library routines.
!                                                              (line 1019)
  * __fractsfuqq:                          Fixed-point fractional library routines.
!                                                              (line 1018)
  * __fractsfusa:                          Fixed-point fractional library routines.
!                                                              (line 1023)
  * __fractsfusq:                          Fixed-point fractional library routines.
!                                                              (line 1020)
  * __fractsfuta:                          Fixed-point fractional library routines.
!                                                              (line 1025)
  * __fractsida:                           Fixed-point fractional library routines.
!                                                              (line  966)
  * __fractsidq:                           Fixed-point fractional library routines.
!                                                              (line  963)
  * __fractsiha:                           Fixed-point fractional library routines.
!                                                              (line  964)
  * __fractsihq:                           Fixed-point fractional library routines.
!                                                              (line  961)
  * __fractsiqq:                           Fixed-point fractional library routines.
!                                                              (line  960)
  * __fractsisa:                           Fixed-point fractional library routines.
!                                                              (line  965)
  * __fractsisq:                           Fixed-point fractional library routines.
!                                                              (line  962)
  * __fractsita:                           Fixed-point fractional library routines.
!                                                              (line  967)
  * __fractsiuda:                          Fixed-point fractional library routines.
!                                                              (line  974)
  * __fractsiudq:                          Fixed-point fractional library routines.
!                                                              (line  971)
  * __fractsiuha:                          Fixed-point fractional library routines.
!                                                              (line  972)
  * __fractsiuhq:                          Fixed-point fractional library routines.
!                                                              (line  969)
  * __fractsiuqq:                          Fixed-point fractional library routines.
!                                                              (line  968)
  * __fractsiusa:                          Fixed-point fractional library routines.
!                                                              (line  973)
  * __fractsiusq:                          Fixed-point fractional library routines.
!                                                              (line  970)
  * __fractsiuta:                          Fixed-point fractional library routines.
!                                                              (line  975)
  * __fractsqda:                           Fixed-point fractional library routines.
!                                                              (line  527)
  * __fractsqdf:                           Fixed-point fractional library routines.
!                                                              (line  545)
  * __fractsqdi:                           Fixed-point fractional library routines.
!                                                              (line  542)
  * __fractsqdq2:                          Fixed-point fractional library routines.
!                                                              (line  524)
  * __fractsqha:                           Fixed-point fractional library routines.
!                                                              (line  525)
  * __fractsqhi:                           Fixed-point fractional library routines.
!                                                              (line  540)
  * __fractsqhq2:                          Fixed-point fractional library routines.
!                                                              (line  523)
  * __fractsqqi:                           Fixed-point fractional library routines.
!                                                              (line  539)
  * __fractsqqq2:                          Fixed-point fractional library routines.
!                                                              (line  522)
  * __fractsqsa:                           Fixed-point fractional library routines.
!                                                              (line  526)
  * __fractsqsf:                           Fixed-point fractional library routines.
!                                                              (line  544)
  * __fractsqsi:                           Fixed-point fractional library routines.
!                                                              (line  541)
  * __fractsqta:                           Fixed-point fractional library routines.
!                                                              (line  528)
  * __fractsqti:                           Fixed-point fractional library routines.
!                                                              (line  543)
  * __fractsquda:                          Fixed-point fractional library routines.
!                                                              (line  536)
  * __fractsqudq:                          Fixed-point fractional library routines.
!                                                              (line  532)
  * __fractsquha:                          Fixed-point fractional library routines.
!                                                              (line  534)
  * __fractsquhq:                          Fixed-point fractional library routines.
!                                                              (line  530)
  * __fractsquqq:                          Fixed-point fractional library routines.
!                                                              (line  529)
  * __fractsqusa:                          Fixed-point fractional library routines.
!                                                              (line  535)
  * __fractsqusq:                          Fixed-point fractional library routines.
!                                                              (line  531)
  * __fractsquta:                          Fixed-point fractional library routines.
!                                                              (line  537)
  * __fracttada2:                          Fixed-point fractional library routines.
!                                                              (line  650)
  * __fracttadf:                           Fixed-point fractional library routines.
!                                                              (line  671)
  * __fracttadi:                           Fixed-point fractional library routines.
!                                                              (line  668)
  * __fracttadq:                           Fixed-point fractional library routines.
!                                                              (line  647)
  * __fracttaha2:                          Fixed-point fractional library routines.
!                                                              (line  648)
  * __fracttahi:                           Fixed-point fractional library routines.
!                                                              (line  666)
  * __fracttahq:                           Fixed-point fractional library routines.
!                                                              (line  645)
  * __fracttaqi:                           Fixed-point fractional library routines.
!                                                              (line  665)
  * __fracttaqq:                           Fixed-point fractional library routines.
!                                                              (line  644)
  * __fracttasa2:                          Fixed-point fractional library routines.
!                                                              (line  649)
  * __fracttasf:                           Fixed-point fractional library routines.
!                                                              (line  670)
  * __fracttasi:                           Fixed-point fractional library routines.
!                                                              (line  667)
  * __fracttasq:                           Fixed-point fractional library routines.
!                                                              (line  646)
  * __fracttati:                           Fixed-point fractional library routines.
-                                                              (line  669)
- * __fracttauda:                          Fixed-point fractional library routines.
                                                               (line  661)
  * __fracttaudq:                          Fixed-point fractional library routines.
!                                                              (line  656)
  * __fracttauha:                          Fixed-point fractional library routines.
!                                                              (line  658)
  * __fracttauhq:                          Fixed-point fractional library routines.
!                                                              (line  653)
  * __fracttauqq:                          Fixed-point fractional library routines.
!                                                              (line  651)
  * __fracttausa:                          Fixed-point fractional library routines.
!                                                              (line  660)
  * __fracttausq:                          Fixed-point fractional library routines.
!                                                              (line  654)
  * __fracttauta:                          Fixed-point fractional library routines.
!                                                              (line  663)
  * __fracttida:                           Fixed-point fractional library routines.
!                                                              (line  998)
  * __fracttidq:                           Fixed-point fractional library routines.
!                                                              (line  995)
  * __fracttiha:                           Fixed-point fractional library routines.
!                                                              (line  996)
  * __fracttihq:                           Fixed-point fractional library routines.
!                                                              (line  993)
  * __fracttiqq:                           Fixed-point fractional library routines.
!                                                              (line  992)
  * __fracttisa:                           Fixed-point fractional library routines.
!                                                              (line  997)
  * __fracttisq:                           Fixed-point fractional library routines.
!                                                              (line  994)
  * __fracttita:                           Fixed-point fractional library routines.
!                                                              (line  999)
  * __fracttiuda:                          Fixed-point fractional library routines.
!                                                              (line 1007)
  * __fracttiudq:                          Fixed-point fractional library routines.
!                                                              (line 1003)
  * __fracttiuha:                          Fixed-point fractional library routines.
!                                                              (line 1005)
  * __fracttiuhq:                          Fixed-point fractional library routines.
!                                                              (line 1001)
  * __fracttiuqq:                          Fixed-point fractional library routines.
!                                                              (line 1000)
  * __fracttiusa:                          Fixed-point fractional library routines.
!                                                              (line 1006)
  * __fracttiusq:                          Fixed-point fractional library routines.
!                                                              (line 1002)
  * __fracttiuta:                          Fixed-point fractional library routines.
!                                                              (line 1008)
  * __fractudada:                          Fixed-point fractional library routines.
!                                                              (line  865)
  * __fractudadf:                          Fixed-point fractional library routines.
!                                                              (line  888)
  * __fractudadi:                          Fixed-point fractional library routines.
!                                                              (line  885)
  * __fractudadq:                          Fixed-point fractional library routines.
!                                                              (line  861)
  * __fractudaha:                          Fixed-point fractional library routines.
!                                                              (line  863)
  * __fractudahi:                          Fixed-point fractional library routines.
!                                                              (line  883)
  * __fractudahq:                          Fixed-point fractional library routines.
!                                                              (line  859)
  * __fractudaqi:                          Fixed-point fractional library routines.
!                                                              (line  882)
  * __fractudaqq:                          Fixed-point fractional library routines.
!                                                              (line  858)
  * __fractudasa:                          Fixed-point fractional library routines.
!                                                              (line  864)
  * __fractudasf:                          Fixed-point fractional library routines.
!                                                              (line  887)
  * __fractudasi:                          Fixed-point fractional library routines.
!                                                              (line  884)
  * __fractudasq:                          Fixed-point fractional library routines.
!                                                              (line  860)
  * __fractudata:                          Fixed-point fractional library routines.
!                                                              (line  866)
  * __fractudati:                          Fixed-point fractional library routines.
!                                                              (line  886)
  * __fractudaudq:                         Fixed-point fractional library routines.
!                                                              (line  874)
  * __fractudauha2:                        Fixed-point fractional library routines.
!                                                              (line  876)
  * __fractudauhq:                         Fixed-point fractional library routines.
!                                                              (line  870)
  * __fractudauqq:                         Fixed-point fractional library routines.
!                                                              (line  868)
  * __fractudausa2:                        Fixed-point fractional library routines.
!                                                              (line  878)
  * __fractudausq:                         Fixed-point fractional library routines.
!                                                              (line  872)
  * __fractudauta2:                        Fixed-point fractional library routines.
!                                                              (line  880)
  * __fractudqda:                          Fixed-point fractional library routines.
!                                                              (line  772)
  * __fractudqdf:                          Fixed-point fractional library routines.
!                                                              (line  798)
  * __fractudqdi:                          Fixed-point fractional library routines.
!                                                              (line  794)
  * __fractudqdq:                          Fixed-point fractional library routines.
!                                                              (line  767)
  * __fractudqha:                          Fixed-point fractional library routines.
!                                                              (line  769)
  * __fractudqhi:                          Fixed-point fractional library routines.
!                                                              (line  792)
  * __fractudqhq:                          Fixed-point fractional library routines.
!                                                              (line  764)
  * __fractudqqi:                          Fixed-point fractional library routines.
!                                                              (line  790)
  * __fractudqqq:                          Fixed-point fractional library routines.
!                                                              (line  762)
  * __fractudqsa:                          Fixed-point fractional library routines.
!                                                              (line  771)
  * __fractudqsf:                          Fixed-point fractional library routines.
!                                                              (line  797)
  * __fractudqsi:                          Fixed-point fractional library routines.
!                                                              (line  793)
  * __fractudqsq:                          Fixed-point fractional library routines.
!                                                              (line  765)
  * __fractudqta:                          Fixed-point fractional library routines.
!                                                              (line  774)
  * __fractudqti:                          Fixed-point fractional library routines.
!                                                              (line  795)
  * __fractudquda:                         Fixed-point fractional library routines.
!                                                              (line  786)
  * __fractudquha:                         Fixed-point fractional library routines.
!                                                              (line  782)
  * __fractudquhq2:                        Fixed-point fractional library routines.
!                                                              (line  778)
  * __fractudquqq2:                        Fixed-point fractional library routines.
!                                                              (line  776)
  * __fractudqusa:                         Fixed-point fractional library routines.
!                                                              (line  784)
  * __fractudqusq2:                        Fixed-point fractional library routines.
!                                                              (line  780)
  * __fractudquta:                         Fixed-point fractional library routines.
!                                                              (line  788)
  * __fractuhada:                          Fixed-point fractional library routines.
!                                                              (line  806)
  * __fractuhadf:                          Fixed-point fractional library routines.
!                                                              (line  829)
  * __fractuhadi:                          Fixed-point fractional library routines.
!                                                              (line  826)
  * __fractuhadq:                          Fixed-point fractional library routines.
!                                                              (line  802)
  * __fractuhaha:                          Fixed-point fractional library routines.
!                                                              (line  804)
  * __fractuhahi:                          Fixed-point fractional library routines.
!                                                              (line  824)
  * __fractuhahq:                          Fixed-point fractional library routines.
!                                                              (line  800)
  * __fractuhaqi:                          Fixed-point fractional library routines.
!                                                              (line  823)
  * __fractuhaqq:                          Fixed-point fractional library routines.
!                                                              (line  799)
  * __fractuhasa:                          Fixed-point fractional library routines.
!                                                              (line  805)
  * __fractuhasf:                          Fixed-point fractional library routines.
!                                                              (line  828)
  * __fractuhasi:                          Fixed-point fractional library routines.
!                                                              (line  825)
  * __fractuhasq:                          Fixed-point fractional library routines.
!                                                              (line  801)
  * __fractuhata:                          Fixed-point fractional library routines.
!                                                              (line  807)
  * __fractuhati:                          Fixed-point fractional library routines.
-                                                              (line  827)
- * __fractuhauda2:                        Fixed-point fractional library routines.
                                                               (line  819)
  * __fractuhaudq:                         Fixed-point fractional library routines.
!                                                              (line  815)
  * __fractuhauhq:                         Fixed-point fractional library routines.
!                                                              (line  811)
  * __fractuhauqq:                         Fixed-point fractional library routines.
!                                                              (line  809)
  * __fractuhausa2:                        Fixed-point fractional library routines.
!                                                              (line  817)
  * __fractuhausq:                         Fixed-point fractional library routines.
!                                                              (line  813)
  * __fractuhauta2:                        Fixed-point fractional library routines.
!                                                              (line  821)
  * __fractuhqda:                          Fixed-point fractional library routines.
!                                                              (line  709)
  * __fractuhqdf:                          Fixed-point fractional library routines.
!                                                              (line  730)
  * __fractuhqdi:                          Fixed-point fractional library routines.
!                                                              (line  727)
  * __fractuhqdq:                          Fixed-point fractional library routines.
!                                                              (line  706)
  * __fractuhqha:                          Fixed-point fractional library routines.
!                                                              (line  707)
  * __fractuhqhi:                          Fixed-point fractional library routines.
!                                                              (line  725)
  * __fractuhqhq:                          Fixed-point fractional library routines.
!                                                              (line  704)
  * __fractuhqqi:                          Fixed-point fractional library routines.
!                                                              (line  724)
  * __fractuhqqq:                          Fixed-point fractional library routines.
!                                                              (line  703)
  * __fractuhqsa:                          Fixed-point fractional library routines.
!                                                              (line  708)
  * __fractuhqsf:                          Fixed-point fractional library routines.
!                                                              (line  729)
  * __fractuhqsi:                          Fixed-point fractional library routines.
!                                                              (line  726)
  * __fractuhqsq:                          Fixed-point fractional library routines.
!                                                              (line  705)
  * __fractuhqta:                          Fixed-point fractional library routines.
!                                                              (line  710)
  * __fractuhqti:                          Fixed-point fractional library routines.
-                                                              (line  728)
- * __fractuhquda:                         Fixed-point fractional library routines.
                                                               (line  720)
  * __fractuhqudq2:                        Fixed-point fractional library routines.
!                                                              (line  715)
  * __fractuhquha:                         Fixed-point fractional library routines.
!                                                              (line  717)
  * __fractuhquqq2:                        Fixed-point fractional library routines.
!                                                              (line  711)
  * __fractuhqusa:                         Fixed-point fractional library routines.
!                                                              (line  719)
  * __fractuhqusq2:                        Fixed-point fractional library routines.
!                                                              (line  713)
  * __fractuhquta:                         Fixed-point fractional library routines.
!                                                              (line  722)
  * __fractunsdadi:                        Fixed-point fractional library routines.
!                                                              (line 1562)
  * __fractunsdahi:                        Fixed-point fractional library routines.
!                                                              (line 1560)
  * __fractunsdaqi:                        Fixed-point fractional library routines.
!                                                              (line 1559)
  * __fractunsdasi:                        Fixed-point fractional library routines.
!                                                              (line 1561)
  * __fractunsdati:                        Fixed-point fractional library routines.
!                                                              (line 1563)
  * __fractunsdida:                        Fixed-point fractional library routines.
!                                                              (line 1714)
  * __fractunsdidq:                        Fixed-point fractional library routines.
!                                                              (line 1711)
  * __fractunsdiha:                        Fixed-point fractional library routines.
!                                                              (line 1712)
  * __fractunsdihq:                        Fixed-point fractional library routines.
!                                                              (line 1709)
  * __fractunsdiqq:                        Fixed-point fractional library routines.
!                                                              (line 1708)
  * __fractunsdisa:                        Fixed-point fractional library routines.
!                                                              (line 1713)
  * __fractunsdisq:                        Fixed-point fractional library routines.
!                                                              (line 1710)
  * __fractunsdita:                        Fixed-point fractional library routines.
!                                                              (line 1715)
  * __fractunsdiuda:                       Fixed-point fractional library routines.
!                                                              (line 1726)
  * __fractunsdiudq:                       Fixed-point fractional library routines.
!                                                              (line 1721)
  * __fractunsdiuha:                       Fixed-point fractional library routines.
!                                                              (line 1723)
  * __fractunsdiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1718)
  * __fractunsdiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1716)
  * __fractunsdiusa:                       Fixed-point fractional library routines.
!                                                              (line 1725)
  * __fractunsdiusq:                       Fixed-point fractional library routines.
!                                                              (line 1719)
  * __fractunsdiuta:                       Fixed-point fractional library routines.
!                                                              (line 1728)
  * __fractunsdqdi:                        Fixed-point fractional library routines.
!                                                              (line 1546)
  * __fractunsdqhi:                        Fixed-point fractional library routines.
!                                                              (line 1544)
  * __fractunsdqqi:                        Fixed-point fractional library routines.
!                                                              (line 1543)
  * __fractunsdqsi:                        Fixed-point fractional library routines.
!                                                              (line 1545)
  * __fractunsdqti:                        Fixed-point fractional library routines.
!                                                              (line 1547)
  * __fractunshadi:                        Fixed-point fractional library routines.
!                                                              (line 1552)
  * __fractunshahi:                        Fixed-point fractional library routines.
!                                                              (line 1550)
  * __fractunshaqi:                        Fixed-point fractional library routines.
!                                                              (line 1549)
  * __fractunshasi:                        Fixed-point fractional library routines.
!                                                              (line 1551)
  * __fractunshati:                        Fixed-point fractional library routines.
!                                                              (line 1553)
  * __fractunshida:                        Fixed-point fractional library routines.
!                                                              (line 1670)
  * __fractunshidq:                        Fixed-point fractional library routines.
!                                                              (line 1667)
  * __fractunshiha:                        Fixed-point fractional library routines.
!                                                              (line 1668)
  * __fractunshihq:                        Fixed-point fractional library routines.
!                                                              (line 1665)
  * __fractunshiqq:                        Fixed-point fractional library routines.
!                                                              (line 1664)
  * __fractunshisa:                        Fixed-point fractional library routines.
!                                                              (line 1669)
  * __fractunshisq:                        Fixed-point fractional library routines.
!                                                              (line 1666)
  * __fractunshita:                        Fixed-point fractional library routines.
!                                                              (line 1671)
  * __fractunshiuda:                       Fixed-point fractional library routines.
!                                                              (line 1682)
  * __fractunshiudq:                       Fixed-point fractional library routines.
!                                                              (line 1677)
  * __fractunshiuha:                       Fixed-point fractional library routines.
!                                                              (line 1679)
  * __fractunshiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1674)
  * __fractunshiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1672)
  * __fractunshiusa:                       Fixed-point fractional library routines.
!                                                              (line 1681)
  * __fractunshiusq:                       Fixed-point fractional library routines.
!                                                              (line 1675)
  * __fractunshiuta:                       Fixed-point fractional library routines.
!                                                              (line 1684)
  * __fractunshqdi:                        Fixed-point fractional library routines.
!                                                              (line 1536)
  * __fractunshqhi:                        Fixed-point fractional library routines.
!                                                              (line 1534)
  * __fractunshqqi:                        Fixed-point fractional library routines.
!                                                              (line 1533)
  * __fractunshqsi:                        Fixed-point fractional library routines.
!                                                              (line 1535)
  * __fractunshqti:                        Fixed-point fractional library routines.
!                                                              (line 1537)
  * __fractunsqida:                        Fixed-point fractional library routines.
!                                                              (line 1648)
  * __fractunsqidq:                        Fixed-point fractional library routines.
!                                                              (line 1645)
  * __fractunsqiha:                        Fixed-point fractional library routines.
!                                                              (line 1646)
  * __fractunsqihq:                        Fixed-point fractional library routines.
!                                                              (line 1643)
  * __fractunsqiqq:                        Fixed-point fractional library routines.
!                                                              (line 1642)
  * __fractunsqisa:                        Fixed-point fractional library routines.
!                                                              (line 1647)
  * __fractunsqisq:                        Fixed-point fractional library routines.
!                                                              (line 1644)
  * __fractunsqita:                        Fixed-point fractional library routines.
!                                                              (line 1649)
  * __fractunsqiuda:                       Fixed-point fractional library routines.
!                                                              (line 1660)
  * __fractunsqiudq:                       Fixed-point fractional library routines.
!                                                              (line 1655)
  * __fractunsqiuha:                       Fixed-point fractional library routines.
!                                                              (line 1657)
  * __fractunsqiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1652)
  * __fractunsqiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1650)
  * __fractunsqiusa:                       Fixed-point fractional library routines.
!                                                              (line 1659)
  * __fractunsqiusq:                       Fixed-point fractional library routines.
!                                                              (line 1653)
  * __fractunsqiuta:                       Fixed-point fractional library routines.
!                                                              (line 1662)
  * __fractunsqqdi:                        Fixed-point fractional library routines.
!                                                              (line 1531)
  * __fractunsqqhi:                        Fixed-point fractional library routines.
!                                                              (line 1529)
  * __fractunsqqqi:                        Fixed-point fractional library routines.
!                                                              (line 1528)
  * __fractunsqqsi:                        Fixed-point fractional library routines.
!                                                              (line 1530)
  * __fractunsqqti:                        Fixed-point fractional library routines.
!                                                              (line 1532)
  * __fractunssadi:                        Fixed-point fractional library routines.
!                                                              (line 1557)
  * __fractunssahi:                        Fixed-point fractional library routines.
!                                                              (line 1555)
  * __fractunssaqi:                        Fixed-point fractional library routines.
!                                                              (line 1554)
  * __fractunssasi:                        Fixed-point fractional library routines.
!                                                              (line 1556)
  * __fractunssati:                        Fixed-point fractional library routines.
!                                                              (line 1558)
  * __fractunssida:                        Fixed-point fractional library routines.
!                                                              (line 1692)
  * __fractunssidq:                        Fixed-point fractional library routines.
!                                                              (line 1689)
  * __fractunssiha:                        Fixed-point fractional library routines.
!                                                              (line 1690)
  * __fractunssihq:                        Fixed-point fractional library routines.
!                                                              (line 1687)
  * __fractunssiqq:                        Fixed-point fractional library routines.
!                                                              (line 1686)
  * __fractunssisa:                        Fixed-point fractional library routines.
!                                                              (line 1691)
  * __fractunssisq:                        Fixed-point fractional library routines.
!                                                              (line 1688)
  * __fractunssita:                        Fixed-point fractional library routines.
!                                                              (line 1693)
  * __fractunssiuda:                       Fixed-point fractional library routines.
!                                                              (line 1704)
  * __fractunssiudq:                       Fixed-point fractional library routines.
!                                                              (line 1699)
  * __fractunssiuha:                       Fixed-point fractional library routines.
!                                                              (line 1701)
  * __fractunssiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1696)
  * __fractunssiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1694)
  * __fractunssiusa:                       Fixed-point fractional library routines.
!                                                              (line 1703)
  * __fractunssiusq:                       Fixed-point fractional library routines.
!                                                              (line 1697)
  * __fractunssiuta:                       Fixed-point fractional library routines.
!                                                              (line 1706)
  * __fractunssqdi:                        Fixed-point fractional library routines.
!                                                              (line 1541)
  * __fractunssqhi:                        Fixed-point fractional library routines.
!                                                              (line 1539)
  * __fractunssqqi:                        Fixed-point fractional library routines.
!                                                              (line 1538)
  * __fractunssqsi:                        Fixed-point fractional library routines.
!                                                              (line 1540)
  * __fractunssqti:                        Fixed-point fractional library routines.
!                                                              (line 1542)
  * __fractunstadi:                        Fixed-point fractional library routines.
!                                                              (line 1567)
  * __fractunstahi:                        Fixed-point fractional library routines.
!                                                              (line 1565)
  * __fractunstaqi:                        Fixed-point fractional library routines.
!                                                              (line 1564)
  * __fractunstasi:                        Fixed-point fractional library routines.
!                                                              (line 1566)
  * __fractunstati:                        Fixed-point fractional library routines.
!                                                              (line 1568)
  * __fractunstida:                        Fixed-point fractional library routines.
!                                                              (line 1737)
  * __fractunstidq:                        Fixed-point fractional library routines.
!                                                              (line 1733)
  * __fractunstiha:                        Fixed-point fractional library routines.
!                                                              (line 1735)
  * __fractunstihq:                        Fixed-point fractional library routines.
!                                                              (line 1731)
  * __fractunstiqq:                        Fixed-point fractional library routines.
!                                                              (line 1730)
  * __fractunstisa:                        Fixed-point fractional library routines.
!                                                              (line 1736)
  * __fractunstisq:                        Fixed-point fractional library routines.
!                                                              (line 1732)
  * __fractunstita:                        Fixed-point fractional library routines.
!                                                              (line 1738)
  * __fractunstiuda:                       Fixed-point fractional library routines.
!                                                              (line 1752)
  * __fractunstiudq:                       Fixed-point fractional library routines.
!                                                              (line 1746)
  * __fractunstiuha:                       Fixed-point fractional library routines.
!                                                              (line 1748)
  * __fractunstiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1742)
  * __fractunstiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1740)
  * __fractunstiusa:                       Fixed-point fractional library routines.
!                                                              (line 1750)
  * __fractunstiusq:                       Fixed-point fractional library routines.
!                                                              (line 1744)
  * __fractunstiuta:                       Fixed-point fractional library routines.
!                                                              (line 1754)
  * __fractunsudadi:                       Fixed-point fractional library routines.
!                                                              (line 1628)
  * __fractunsudahi:                       Fixed-point fractional library routines.
!                                                              (line 1624)
  * __fractunsudaqi:                       Fixed-point fractional library routines.
!                                                              (line 1622)
  * __fractunsudasi:                       Fixed-point fractional library routines.
!                                                              (line 1626)
  * __fractunsudati:                       Fixed-point fractional library routines.
!                                                              (line 1630)
  * __fractunsudqdi:                       Fixed-point fractional library routines.
!                                                              (line 1602)
  * __fractunsudqhi:                       Fixed-point fractional library routines.
!                                                              (line 1598)
  * __fractunsudqqi:                       Fixed-point fractional library routines.
!                                                              (line 1596)
  * __fractunsudqsi:                       Fixed-point fractional library routines.
!                                                              (line 1600)
  * __fractunsudqti:                       Fixed-point fractional library routines.
!                                                              (line 1604)
  * __fractunsuhadi:                       Fixed-point fractional library routines.
!                                                              (line 1612)
  * __fractunsuhahi:                       Fixed-point fractional library routines.
!                                                              (line 1608)
  * __fractunsuhaqi:                       Fixed-point fractional library routines.
!                                                              (line 1606)
  * __fractunsuhasi:                       Fixed-point fractional library routines.
!                                                              (line 1610)
  * __fractunsuhati:                       Fixed-point fractional library routines.
!                                                              (line 1614)
  * __fractunsuhqdi:                       Fixed-point fractional library routines.
!                                                              (line 1583)
  * __fractunsuhqhi:                       Fixed-point fractional library routines.
!                                                              (line 1581)
  * __fractunsuhqqi:                       Fixed-point fractional library routines.
!                                                              (line 1580)
  * __fractunsuhqsi:                       Fixed-point fractional library routines.
!                                                              (line 1582)
  * __fractunsuhqti:                       Fixed-point fractional library routines.
-                                                              (line 1584)
- * __fractunsuqqdi:                       Fixed-point fractional library routines.
                                                               (line 1576)
  * __fractunsuqqhi:                       Fixed-point fractional library routines.
!                                                              (line 1572)
  * __fractunsuqqqi:                       Fixed-point fractional library routines.
!                                                              (line 1570)
  * __fractunsuqqsi:                       Fixed-point fractional library routines.
!                                                              (line 1574)
  * __fractunsuqqti:                       Fixed-point fractional library routines.
!                                                              (line 1578)
  * __fractunsusadi:                       Fixed-point fractional library routines.
!                                                              (line 1619)
  * __fractunsusahi:                       Fixed-point fractional library routines.
!                                                              (line 1617)
  * __fractunsusaqi:                       Fixed-point fractional library routines.
!                                                              (line 1616)
  * __fractunsusasi:                       Fixed-point fractional library routines.
!                                                              (line 1618)
  * __fractunsusati:                       Fixed-point fractional library routines.
!                                                              (line 1620)
  * __fractunsusqdi:                       Fixed-point fractional library routines.
!                                                              (line 1592)
  * __fractunsusqhi:                       Fixed-point fractional library routines.
!                                                              (line 1588)
  * __fractunsusqqi:                       Fixed-point fractional library routines.
!                                                              (line 1586)
  * __fractunsusqsi:                       Fixed-point fractional library routines.
!                                                              (line 1590)
  * __fractunsusqti:                       Fixed-point fractional library routines.
!                                                              (line 1594)
  * __fractunsutadi:                       Fixed-point fractional library routines.
!                                                              (line 1638)
  * __fractunsutahi:                       Fixed-point fractional library routines.
!                                                              (line 1634)
  * __fractunsutaqi:                       Fixed-point fractional library routines.
!                                                              (line 1632)
  * __fractunsutasi:                       Fixed-point fractional library routines.
!                                                              (line 1636)
  * __fractunsutati:                       Fixed-point fractional library routines.
!                                                              (line 1640)
  * __fractuqqda:                          Fixed-point fractional library routines.
!                                                              (line  679)
  * __fractuqqdf:                          Fixed-point fractional library routines.
!                                                              (line  702)
  * __fractuqqdi:                          Fixed-point fractional library routines.
!                                                              (line  699)
  * __fractuqqdq:                          Fixed-point fractional library routines.
!                                                              (line  675)
  * __fractuqqha:                          Fixed-point fractional library routines.
!                                                              (line  677)
  * __fractuqqhi:                          Fixed-point fractional library routines.
!                                                              (line  697)
  * __fractuqqhq:                          Fixed-point fractional library routines.
!                                                              (line  673)
  * __fractuqqqi:                          Fixed-point fractional library routines.
!                                                              (line  696)
  * __fractuqqqq:                          Fixed-point fractional library routines.
!                                                              (line  672)
  * __fractuqqsa:                          Fixed-point fractional library routines.
!                                                              (line  678)
  * __fractuqqsf:                          Fixed-point fractional library routines.
!                                                              (line  701)
  * __fractuqqsi:                          Fixed-point fractional library routines.
!                                                              (line  698)
  * __fractuqqsq:                          Fixed-point fractional library routines.
!                                                              (line  674)
  * __fractuqqta:                          Fixed-point fractional library routines.
!                                                              (line  680)
  * __fractuqqti:                          Fixed-point fractional library routines.
-                                                              (line  700)
- * __fractuqquda:                         Fixed-point fractional library routines.
                                                               (line  692)
  * __fractuqqudq2:                        Fixed-point fractional library routines.
!                                                              (line  686)
  * __fractuqquha:                         Fixed-point fractional library routines.
!                                                              (line  688)
  * __fractuqquhq2:                        Fixed-point fractional library routines.
!                                                              (line  682)
  * __fractuqqusa:                         Fixed-point fractional library routines.
!                                                              (line  690)
  * __fractuqqusq2:                        Fixed-point fractional library routines.
!                                                              (line  684)
  * __fractuqquta:                         Fixed-point fractional library routines.
!                                                              (line  694)
  * __fractusada:                          Fixed-point fractional library routines.
!                                                              (line  836)
  * __fractusadf:                          Fixed-point fractional library routines.
!                                                              (line  857)
  * __fractusadi:                          Fixed-point fractional library routines.
!                                                              (line  854)
  * __fractusadq:                          Fixed-point fractional library routines.
!                                                              (line  833)
  * __fractusaha:                          Fixed-point fractional library routines.
!                                                              (line  834)
  * __fractusahi:                          Fixed-point fractional library routines.
!                                                              (line  852)
  * __fractusahq:                          Fixed-point fractional library routines.
!                                                              (line  831)
  * __fractusaqi:                          Fixed-point fractional library routines.
!                                                              (line  851)
  * __fractusaqq:                          Fixed-point fractional library routines.
!                                                              (line  830)
  * __fractusasa:                          Fixed-point fractional library routines.
!                                                              (line  835)
  * __fractusasf:                          Fixed-point fractional library routines.
!                                                              (line  856)
  * __fractusasi:                          Fixed-point fractional library routines.
!                                                              (line  853)
  * __fractusasq:                          Fixed-point fractional library routines.
!                                                              (line  832)
  * __fractusata:                          Fixed-point fractional library routines.
!                                                              (line  837)
  * __fractusati:                          Fixed-point fractional library routines.
-                                                              (line  855)
- * __fractusauda2:                        Fixed-point fractional library routines.
                                                               (line  847)
  * __fractusaudq:                         Fixed-point fractional library routines.
!                                                              (line  843)
  * __fractusauha2:                        Fixed-point fractional library routines.
!                                                              (line  845)
  * __fractusauhq:                         Fixed-point fractional library routines.
!                                                              (line  840)
  * __fractusauqq:                         Fixed-point fractional library routines.
!                                                              (line  838)
  * __fractusausq:                         Fixed-point fractional library routines.
!                                                              (line  841)
  * __fractusauta2:                        Fixed-point fractional library routines.
!                                                              (line  849)
  * __fractusqda:                          Fixed-point fractional library routines.
!                                                              (line  738)
  * __fractusqdf:                          Fixed-point fractional library routines.
!                                                              (line  761)
  * __fractusqdi:                          Fixed-point fractional library routines.
!                                                              (line  758)
  * __fractusqdq:                          Fixed-point fractional library routines.
!                                                              (line  734)
  * __fractusqha:                          Fixed-point fractional library routines.
!                                                              (line  736)
  * __fractusqhi:                          Fixed-point fractional library routines.
!                                                              (line  756)
  * __fractusqhq:                          Fixed-point fractional library routines.
!                                                              (line  732)
  * __fractusqqi:                          Fixed-point fractional library routines.
!                                                              (line  755)
  * __fractusqqq:                          Fixed-point fractional library routines.
!                                                              (line  731)
  * __fractusqsa:                          Fixed-point fractional library routines.
!                                                              (line  737)
  * __fractusqsf:                          Fixed-point fractional library routines.
!                                                              (line  760)
  * __fractusqsi:                          Fixed-point fractional library routines.
!                                                              (line  757)
  * __fractusqsq:                          Fixed-point fractional library routines.
!                                                              (line  733)
  * __fractusqta:                          Fixed-point fractional library routines.
!                                                              (line  739)
  * __fractusqti:                          Fixed-point fractional library routines.
-                                                              (line  759)
- * __fractusquda:                         Fixed-point fractional library routines.
                                                               (line  751)
  * __fractusqudq2:                        Fixed-point fractional library routines.
!                                                              (line  745)
  * __fractusquha:                         Fixed-point fractional library routines.
!                                                              (line  747)
  * __fractusquhq2:                        Fixed-point fractional library routines.
!                                                              (line  743)
  * __fractusquqq2:                        Fixed-point fractional library routines.
!                                                              (line  741)
  * __fractusqusa:                         Fixed-point fractional library routines.
!                                                              (line  749)
  * __fractusquta:                         Fixed-point fractional library routines.
!                                                              (line  753)
  * __fractutada:                          Fixed-point fractional library routines.
!                                                              (line  899)
  * __fractutadf:                          Fixed-point fractional library routines.
!                                                              (line  925)
  * __fractutadi:                          Fixed-point fractional library routines.
!                                                              (line  921)
  * __fractutadq:                          Fixed-point fractional library routines.
!                                                              (line  894)
  * __fractutaha:                          Fixed-point fractional library routines.
!                                                              (line  896)
  * __fractutahi:                          Fixed-point fractional library routines.
!                                                              (line  919)
  * __fractutahq:                          Fixed-point fractional library routines.
!                                                              (line  891)
  * __fractutaqi:                          Fixed-point fractional library routines.
!                                                              (line  917)
  * __fractutaqq:                          Fixed-point fractional library routines.
!                                                              (line  889)
  * __fractutasa:                          Fixed-point fractional library routines.
!                                                              (line  898)
  * __fractutasf:                          Fixed-point fractional library routines.
!                                                              (line  924)
  * __fractutasi:                          Fixed-point fractional library routines.
!                                                              (line  920)
  * __fractutasq:                          Fixed-point fractional library routines.
!                                                              (line  892)
  * __fractutata:                          Fixed-point fractional library routines.
!                                                              (line  901)
  * __fractutati:                          Fixed-point fractional library routines.
!                                                              (line  922)
  * __fractutauda2:                        Fixed-point fractional library routines.
!                                                              (line  915)
  * __fractutaudq:                         Fixed-point fractional library routines.
!                                                              (line  909)
  * __fractutauha2:                        Fixed-point fractional library routines.
!                                                              (line  911)
  * __fractutauhq:                         Fixed-point fractional library routines.
!                                                              (line  905)
  * __fractutauqq:                         Fixed-point fractional library routines.
!                                                              (line  903)
  * __fractutausa2:                        Fixed-point fractional library routines.
!                                                              (line  913)
  * __fractutausq:                         Fixed-point fractional library routines.
!                                                              (line  907)
  * __gedf2:                               Soft float library routines.
                                                               (line  205)
  * __gesf2:                               Soft float library routines.
--- 51301,52553 ----
  * __floatuntixf:                         Soft float library routines.
                                                               (line  153)
  * __fractdadf:                           Fixed-point fractional library routines.
!                                                              (line  635)
  * __fractdadi:                           Fixed-point fractional library routines.
!                                                              (line  632)
  * __fractdadq:                           Fixed-point fractional library routines.
!                                                              (line  615)
  * __fractdaha2:                          Fixed-point fractional library routines.
!                                                              (line  616)
  * __fractdahi:                           Fixed-point fractional library routines.
!                                                              (line  630)
  * __fractdahq:                           Fixed-point fractional library routines.
!                                                              (line  613)
  * __fractdaqi:                           Fixed-point fractional library routines.
!                                                              (line  629)
  * __fractdaqq:                           Fixed-point fractional library routines.
!                                                              (line  612)
  * __fractdasa2:                          Fixed-point fractional library routines.
!                                                              (line  617)
  * __fractdasf:                           Fixed-point fractional library routines.
!                                                              (line  634)
  * __fractdasi:                           Fixed-point fractional library routines.
!                                                              (line  631)
  * __fractdasq:                           Fixed-point fractional library routines.
!                                                              (line  614)
  * __fractdata2:                          Fixed-point fractional library routines.
!                                                              (line  618)
  * __fractdati:                           Fixed-point fractional library routines.
!                                                              (line  633)
  * __fractdauda:                          Fixed-point fractional library routines.
!                                                              (line  626)
  * __fractdaudq:                          Fixed-point fractional library routines.
!                                                              (line  622)
  * __fractdauha:                          Fixed-point fractional library routines.
!                                                              (line  624)
  * __fractdauhq:                          Fixed-point fractional library routines.
!                                                              (line  620)
  * __fractdauqq:                          Fixed-point fractional library routines.
!                                                              (line  619)
  * __fractdausa:                          Fixed-point fractional library routines.
!                                                              (line  625)
  * __fractdausq:                          Fixed-point fractional library routines.
!                                                              (line  621)
  * __fractdauta:                          Fixed-point fractional library routines.
!                                                              (line  627)
  * __fractdfda:                           Fixed-point fractional library routines.
!                                                              (line 1024)
  * __fractdfdq:                           Fixed-point fractional library routines.
!                                                              (line 1021)
  * __fractdfha:                           Fixed-point fractional library routines.
!                                                              (line 1022)
  * __fractdfhq:                           Fixed-point fractional library routines.
!                                                              (line 1019)
  * __fractdfqq:                           Fixed-point fractional library routines.
!                                                              (line 1018)
  * __fractdfsa:                           Fixed-point fractional library routines.
!                                                              (line 1023)
  * __fractdfsq:                           Fixed-point fractional library routines.
!                                                              (line 1020)
  * __fractdfta:                           Fixed-point fractional library routines.
!                                                              (line 1025)
  * __fractdfuda:                          Fixed-point fractional library routines.
!                                                              (line 1032)
  * __fractdfudq:                          Fixed-point fractional library routines.
!                                                              (line 1029)
  * __fractdfuha:                          Fixed-point fractional library routines.
!                                                              (line 1030)
  * __fractdfuhq:                          Fixed-point fractional library routines.
!                                                              (line 1027)
  * __fractdfuqq:                          Fixed-point fractional library routines.
!                                                              (line 1026)
  * __fractdfusa:                          Fixed-point fractional library routines.
!                                                              (line 1031)
  * __fractdfusq:                          Fixed-point fractional library routines.
!                                                              (line 1028)
  * __fractdfuta:                          Fixed-point fractional library routines.
!                                                              (line 1033)
  * __fractdida:                           Fixed-point fractional library routines.
!                                                              (line  974)
  * __fractdidq:                           Fixed-point fractional library routines.
!                                                              (line  971)
  * __fractdiha:                           Fixed-point fractional library routines.
!                                                              (line  972)
  * __fractdihq:                           Fixed-point fractional library routines.
!                                                              (line  969)
  * __fractdiqq:                           Fixed-point fractional library routines.
!                                                              (line  968)
  * __fractdisa:                           Fixed-point fractional library routines.
!                                                              (line  973)
  * __fractdisq:                           Fixed-point fractional library routines.
!                                                              (line  970)
  * __fractdita:                           Fixed-point fractional library routines.
!                                                              (line  975)
  * __fractdiuda:                          Fixed-point fractional library routines.
!                                                              (line  982)
  * __fractdiudq:                          Fixed-point fractional library routines.
!                                                              (line  979)
  * __fractdiuha:                          Fixed-point fractional library routines.
!                                                              (line  980)
  * __fractdiuhq:                          Fixed-point fractional library routines.
!                                                              (line  977)
  * __fractdiuqq:                          Fixed-point fractional library routines.
!                                                              (line  976)
  * __fractdiusa:                          Fixed-point fractional library routines.
!                                                              (line  981)
  * __fractdiusq:                          Fixed-point fractional library routines.
!                                                              (line  978)
  * __fractdiuta:                          Fixed-point fractional library routines.
!                                                              (line  983)
  * __fractdqda:                           Fixed-point fractional library routines.
!                                                              (line  543)
  * __fractdqdf:                           Fixed-point fractional library routines.
!                                                              (line  565)
  * __fractdqdi:                           Fixed-point fractional library routines.
!                                                              (line  562)
  * __fractdqha:                           Fixed-point fractional library routines.
!                                                              (line  541)
  * __fractdqhi:                           Fixed-point fractional library routines.
!                                                              (line  560)
  * __fractdqhq2:                          Fixed-point fractional library routines.
!                                                              (line  539)
  * __fractdqqi:                           Fixed-point fractional library routines.
!                                                              (line  559)
  * __fractdqqq2:                          Fixed-point fractional library routines.
!                                                              (line  538)
  * __fractdqsa:                           Fixed-point fractional library routines.
!                                                              (line  542)
  * __fractdqsf:                           Fixed-point fractional library routines.
!                                                              (line  564)
  * __fractdqsi:                           Fixed-point fractional library routines.
!                                                              (line  561)
  * __fractdqsq2:                          Fixed-point fractional library routines.
!                                                              (line  540)
  * __fractdqta:                           Fixed-point fractional library routines.
!                                                              (line  544)
  * __fractdqti:                           Fixed-point fractional library routines.
                                                               (line  563)
+ * __fractdquda:                          Fixed-point fractional library routines.
+                                                              (line  555)
  * __fractdqudq:                          Fixed-point fractional library routines.
!                                                              (line  550)
  * __fractdquha:                          Fixed-point fractional library routines.
!                                                              (line  552)
  * __fractdquhq:                          Fixed-point fractional library routines.
!                                                              (line  547)
  * __fractdquqq:                          Fixed-point fractional library routines.
!                                                              (line  545)
  * __fractdqusa:                          Fixed-point fractional library routines.
!                                                              (line  554)
  * __fractdqusq:                          Fixed-point fractional library routines.
!                                                              (line  548)
  * __fractdquta:                          Fixed-point fractional library routines.
!                                                              (line  557)
  * __fracthada2:                          Fixed-point fractional library routines.
!                                                              (line  571)
  * __fracthadf:                           Fixed-point fractional library routines.
!                                                              (line  589)
  * __fracthadi:                           Fixed-point fractional library routines.
!                                                              (line  586)
  * __fracthadq:                           Fixed-point fractional library routines.
!                                                              (line  569)
  * __fracthahi:                           Fixed-point fractional library routines.
!                                                              (line  584)
  * __fracthahq:                           Fixed-point fractional library routines.
!                                                              (line  567)
  * __fracthaqi:                           Fixed-point fractional library routines.
!                                                              (line  583)
  * __fracthaqq:                           Fixed-point fractional library routines.
!                                                              (line  566)
  * __fracthasa2:                          Fixed-point fractional library routines.
!                                                              (line  570)
  * __fracthasf:                           Fixed-point fractional library routines.
!                                                              (line  588)
  * __fracthasi:                           Fixed-point fractional library routines.
!                                                              (line  585)
  * __fracthasq:                           Fixed-point fractional library routines.
!                                                              (line  568)
  * __fracthata2:                          Fixed-point fractional library routines.
!                                                              (line  572)
  * __fracthati:                           Fixed-point fractional library routines.
!                                                              (line  587)
  * __fracthauda:                          Fixed-point fractional library routines.
!                                                              (line  580)
  * __fracthaudq:                          Fixed-point fractional library routines.
!                                                              (line  576)
  * __fracthauha:                          Fixed-point fractional library routines.
!                                                              (line  578)
  * __fracthauhq:                          Fixed-point fractional library routines.
!                                                              (line  574)
  * __fracthauqq:                          Fixed-point fractional library routines.
!                                                              (line  573)
  * __fracthausa:                          Fixed-point fractional library routines.
!                                                              (line  579)
  * __fracthausq:                          Fixed-point fractional library routines.
!                                                              (line  575)
  * __fracthauta:                          Fixed-point fractional library routines.
!                                                              (line  581)
  * __fracthida:                           Fixed-point fractional library routines.
!                                                              (line  942)
  * __fracthidq:                           Fixed-point fractional library routines.
!                                                              (line  939)
  * __fracthiha:                           Fixed-point fractional library routines.
!                                                              (line  940)
  * __fracthihq:                           Fixed-point fractional library routines.
!                                                              (line  937)
  * __fracthiqq:                           Fixed-point fractional library routines.
!                                                              (line  936)
  * __fracthisa:                           Fixed-point fractional library routines.
!                                                              (line  941)
  * __fracthisq:                           Fixed-point fractional library routines.
!                                                              (line  938)
  * __fracthita:                           Fixed-point fractional library routines.
!                                                              (line  943)
  * __fracthiuda:                          Fixed-point fractional library routines.
!                                                              (line  950)
  * __fracthiudq:                          Fixed-point fractional library routines.
!                                                              (line  947)
  * __fracthiuha:                          Fixed-point fractional library routines.
!                                                              (line  948)
  * __fracthiuhq:                          Fixed-point fractional library routines.
!                                                              (line  945)
  * __fracthiuqq:                          Fixed-point fractional library routines.
!                                                              (line  944)
  * __fracthiusa:                          Fixed-point fractional library routines.
!                                                              (line  949)
  * __fracthiusq:                          Fixed-point fractional library routines.
!                                                              (line  946)
  * __fracthiuta:                          Fixed-point fractional library routines.
!                                                              (line  951)
  * __fracthqda:                           Fixed-point fractional library routines.
!                                                              (line  497)
  * __fracthqdf:                           Fixed-point fractional library routines.
!                                                              (line  513)
  * __fracthqdi:                           Fixed-point fractional library routines.
!                                                              (line  510)
  * __fracthqdq2:                          Fixed-point fractional library routines.
!                                                              (line  494)
  * __fracthqha:                           Fixed-point fractional library routines.
!                                                              (line  495)
  * __fracthqhi:                           Fixed-point fractional library routines.
!                                                              (line  508)
  * __fracthqqi:                           Fixed-point fractional library routines.
!                                                              (line  507)
  * __fracthqqq2:                          Fixed-point fractional library routines.
!                                                              (line  492)
  * __fracthqsa:                           Fixed-point fractional library routines.
!                                                              (line  496)
  * __fracthqsf:                           Fixed-point fractional library routines.
!                                                              (line  512)
  * __fracthqsi:                           Fixed-point fractional library routines.
!                                                              (line  509)
  * __fracthqsq2:                          Fixed-point fractional library routines.
!                                                              (line  493)
  * __fracthqta:                           Fixed-point fractional library routines.
!                                                              (line  498)
  * __fracthqti:                           Fixed-point fractional library routines.
!                                                              (line  511)
  * __fracthquda:                          Fixed-point fractional library routines.
!                                                              (line  505)
  * __fracthqudq:                          Fixed-point fractional library routines.
!                                                              (line  502)
  * __fracthquha:                          Fixed-point fractional library routines.
!                                                              (line  503)
  * __fracthquhq:                          Fixed-point fractional library routines.
!                                                              (line  500)
  * __fracthquqq:                          Fixed-point fractional library routines.
!                                                              (line  499)
  * __fracthqusa:                          Fixed-point fractional library routines.
!                                                              (line  504)
  * __fracthqusq:                          Fixed-point fractional library routines.
!                                                              (line  501)
  * __fracthquta:                          Fixed-point fractional library routines.
!                                                              (line  506)
  * __fractqida:                           Fixed-point fractional library routines.
!                                                              (line  924)
  * __fractqidq:                           Fixed-point fractional library routines.
!                                                              (line  921)
  * __fractqiha:                           Fixed-point fractional library routines.
!                                                              (line  922)
  * __fractqihq:                           Fixed-point fractional library routines.
!                                                              (line  919)
  * __fractqiqq:                           Fixed-point fractional library routines.
!                                                              (line  918)
  * __fractqisa:                           Fixed-point fractional library routines.
!                                                              (line  923)
  * __fractqisq:                           Fixed-point fractional library routines.
!                                                              (line  920)
  * __fractqita:                           Fixed-point fractional library routines.
!                                                              (line  925)
  * __fractqiuda:                          Fixed-point fractional library routines.
!                                                              (line  933)
  * __fractqiudq:                          Fixed-point fractional library routines.
!                                                              (line  929)
  * __fractqiuha:                          Fixed-point fractional library routines.
!                                                              (line  931)
  * __fractqiuhq:                          Fixed-point fractional library routines.
!                                                              (line  927)
  * __fractqiuqq:                          Fixed-point fractional library routines.
!                                                              (line  926)
  * __fractqiusa:                          Fixed-point fractional library routines.
!                                                              (line  932)
  * __fractqiusq:                          Fixed-point fractional library routines.
!                                                              (line  928)
  * __fractqiuta:                          Fixed-point fractional library routines.
!                                                              (line  934)
  * __fractqqda:                           Fixed-point fractional library routines.
!                                                              (line  473)
  * __fractqqdf:                           Fixed-point fractional library routines.
!                                                              (line  491)
  * __fractqqdi:                           Fixed-point fractional library routines.
!                                                              (line  488)
  * __fractqqdq2:                          Fixed-point fractional library routines.
!                                                              (line  470)
  * __fractqqha:                           Fixed-point fractional library routines.
!                                                              (line  471)
  * __fractqqhi:                           Fixed-point fractional library routines.
!                                                              (line  486)
  * __fractqqhq2:                          Fixed-point fractional library routines.
!                                                              (line  468)
  * __fractqqqi:                           Fixed-point fractional library routines.
!                                                              (line  485)
  * __fractqqsa:                           Fixed-point fractional library routines.
!                                                              (line  472)
  * __fractqqsf:                           Fixed-point fractional library routines.
!                                                              (line  490)
  * __fractqqsi:                           Fixed-point fractional library routines.
!                                                              (line  487)
  * __fractqqsq2:                          Fixed-point fractional library routines.
!                                                              (line  469)
  * __fractqqta:                           Fixed-point fractional library routines.
!                                                              (line  474)
  * __fractqqti:                           Fixed-point fractional library routines.
!                                                              (line  489)
  * __fractqquda:                          Fixed-point fractional library routines.
!                                                              (line  482)
  * __fractqqudq:                          Fixed-point fractional library routines.
!                                                              (line  478)
  * __fractqquha:                          Fixed-point fractional library routines.
!                                                              (line  480)
  * __fractqquhq:                          Fixed-point fractional library routines.
!                                                              (line  476)
  * __fractqquqq:                          Fixed-point fractional library routines.
!                                                              (line  475)
  * __fractqqusa:                          Fixed-point fractional library routines.
!                                                              (line  481)
  * __fractqqusq:                          Fixed-point fractional library routines.
!                                                              (line  477)
  * __fractqquta:                          Fixed-point fractional library routines.
!                                                              (line  483)
  * __fractsada2:                          Fixed-point fractional library routines.
!                                                              (line  595)
  * __fractsadf:                           Fixed-point fractional library routines.
!                                                              (line  611)
  * __fractsadi:                           Fixed-point fractional library routines.
!                                                              (line  608)
  * __fractsadq:                           Fixed-point fractional library routines.
!                                                              (line  593)
  * __fractsaha2:                          Fixed-point fractional library routines.
!                                                              (line  594)
  * __fractsahi:                           Fixed-point fractional library routines.
!                                                              (line  606)
  * __fractsahq:                           Fixed-point fractional library routines.
!                                                              (line  591)
  * __fractsaqi:                           Fixed-point fractional library routines.
!                                                              (line  605)
  * __fractsaqq:                           Fixed-point fractional library routines.
!                                                              (line  590)
  * __fractsasf:                           Fixed-point fractional library routines.
!                                                              (line  610)
  * __fractsasi:                           Fixed-point fractional library routines.
!                                                              (line  607)
  * __fractsasq:                           Fixed-point fractional library routines.
!                                                              (line  592)
  * __fractsata2:                          Fixed-point fractional library routines.
!                                                              (line  596)
  * __fractsati:                           Fixed-point fractional library routines.
!                                                              (line  609)
  * __fractsauda:                          Fixed-point fractional library routines.
!                                                              (line  603)
  * __fractsaudq:                          Fixed-point fractional library routines.
!                                                              (line  600)
  * __fractsauha:                          Fixed-point fractional library routines.
!                                                              (line  601)
  * __fractsauhq:                          Fixed-point fractional library routines.
!                                                              (line  598)
  * __fractsauqq:                          Fixed-point fractional library routines.
!                                                              (line  597)
  * __fractsausa:                          Fixed-point fractional library routines.
!                                                              (line  602)
  * __fractsausq:                          Fixed-point fractional library routines.
!                                                              (line  599)
  * __fractsauta:                          Fixed-point fractional library routines.
!                                                              (line  604)
  * __fractsfda:                           Fixed-point fractional library routines.
!                                                              (line 1008)
  * __fractsfdq:                           Fixed-point fractional library routines.
!                                                              (line 1005)
  * __fractsfha:                           Fixed-point fractional library routines.
!                                                              (line 1006)
  * __fractsfhq:                           Fixed-point fractional library routines.
!                                                              (line 1003)
  * __fractsfqq:                           Fixed-point fractional library routines.
!                                                              (line 1002)
  * __fractsfsa:                           Fixed-point fractional library routines.
!                                                              (line 1007)
  * __fractsfsq:                           Fixed-point fractional library routines.
!                                                              (line 1004)
  * __fractsfta:                           Fixed-point fractional library routines.
!                                                              (line 1009)
  * __fractsfuda:                          Fixed-point fractional library routines.
!                                                              (line 1016)
  * __fractsfudq:                          Fixed-point fractional library routines.
!                                                              (line 1013)
  * __fractsfuha:                          Fixed-point fractional library routines.
!                                                              (line 1014)
  * __fractsfuhq:                          Fixed-point fractional library routines.
!                                                              (line 1011)
  * __fractsfuqq:                          Fixed-point fractional library routines.
!                                                              (line 1010)
  * __fractsfusa:                          Fixed-point fractional library routines.
!                                                              (line 1015)
  * __fractsfusq:                          Fixed-point fractional library routines.
!                                                              (line 1012)
  * __fractsfuta:                          Fixed-point fractional library routines.
!                                                              (line 1017)
  * __fractsida:                           Fixed-point fractional library routines.
!                                                              (line  958)
  * __fractsidq:                           Fixed-point fractional library routines.
!                                                              (line  955)
  * __fractsiha:                           Fixed-point fractional library routines.
!                                                              (line  956)
  * __fractsihq:                           Fixed-point fractional library routines.
!                                                              (line  953)
  * __fractsiqq:                           Fixed-point fractional library routines.
!                                                              (line  952)
  * __fractsisa:                           Fixed-point fractional library routines.
!                                                              (line  957)
  * __fractsisq:                           Fixed-point fractional library routines.
!                                                              (line  954)
  * __fractsita:                           Fixed-point fractional library routines.
!                                                              (line  959)
  * __fractsiuda:                          Fixed-point fractional library routines.
!                                                              (line  966)
  * __fractsiudq:                          Fixed-point fractional library routines.
!                                                              (line  963)
  * __fractsiuha:                          Fixed-point fractional library routines.
!                                                              (line  964)
  * __fractsiuhq:                          Fixed-point fractional library routines.
!                                                              (line  961)
  * __fractsiuqq:                          Fixed-point fractional library routines.
!                                                              (line  960)
  * __fractsiusa:                          Fixed-point fractional library routines.
!                                                              (line  965)
  * __fractsiusq:                          Fixed-point fractional library routines.
!                                                              (line  962)
  * __fractsiuta:                          Fixed-point fractional library routines.
!                                                              (line  967)
  * __fractsqda:                           Fixed-point fractional library routines.
!                                                              (line  519)
  * __fractsqdf:                           Fixed-point fractional library routines.
!                                                              (line  537)
  * __fractsqdi:                           Fixed-point fractional library routines.
!                                                              (line  534)
  * __fractsqdq2:                          Fixed-point fractional library routines.
!                                                              (line  516)
  * __fractsqha:                           Fixed-point fractional library routines.
!                                                              (line  517)
  * __fractsqhi:                           Fixed-point fractional library routines.
!                                                              (line  532)
  * __fractsqhq2:                          Fixed-point fractional library routines.
!                                                              (line  515)
  * __fractsqqi:                           Fixed-point fractional library routines.
!                                                              (line  531)
  * __fractsqqq2:                          Fixed-point fractional library routines.
!                                                              (line  514)
  * __fractsqsa:                           Fixed-point fractional library routines.
!                                                              (line  518)
  * __fractsqsf:                           Fixed-point fractional library routines.
!                                                              (line  536)
  * __fractsqsi:                           Fixed-point fractional library routines.
!                                                              (line  533)
  * __fractsqta:                           Fixed-point fractional library routines.
!                                                              (line  520)
  * __fractsqti:                           Fixed-point fractional library routines.
!                                                              (line  535)
  * __fractsquda:                          Fixed-point fractional library routines.
!                                                              (line  528)
  * __fractsqudq:                          Fixed-point fractional library routines.
!                                                              (line  524)
  * __fractsquha:                          Fixed-point fractional library routines.
!                                                              (line  526)
  * __fractsquhq:                          Fixed-point fractional library routines.
!                                                              (line  522)
  * __fractsquqq:                          Fixed-point fractional library routines.
!                                                              (line  521)
  * __fractsqusa:                          Fixed-point fractional library routines.
!                                                              (line  527)
  * __fractsqusq:                          Fixed-point fractional library routines.
!                                                              (line  523)
  * __fractsquta:                          Fixed-point fractional library routines.
!                                                              (line  529)
  * __fracttada2:                          Fixed-point fractional library routines.
!                                                              (line  642)
  * __fracttadf:                           Fixed-point fractional library routines.
!                                                              (line  663)
  * __fracttadi:                           Fixed-point fractional library routines.
!                                                              (line  660)
  * __fracttadq:                           Fixed-point fractional library routines.
!                                                              (line  639)
  * __fracttaha2:                          Fixed-point fractional library routines.
!                                                              (line  640)
  * __fracttahi:                           Fixed-point fractional library routines.
!                                                              (line  658)
  * __fracttahq:                           Fixed-point fractional library routines.
!                                                              (line  637)
  * __fracttaqi:                           Fixed-point fractional library routines.
!                                                              (line  657)
  * __fracttaqq:                           Fixed-point fractional library routines.
!                                                              (line  636)
  * __fracttasa2:                          Fixed-point fractional library routines.
!                                                              (line  641)
  * __fracttasf:                           Fixed-point fractional library routines.
!                                                              (line  662)
  * __fracttasi:                           Fixed-point fractional library routines.
!                                                              (line  659)
  * __fracttasq:                           Fixed-point fractional library routines.
!                                                              (line  638)
  * __fracttati:                           Fixed-point fractional library routines.
                                                               (line  661)
+ * __fracttauda:                          Fixed-point fractional library routines.
+                                                              (line  653)
  * __fracttaudq:                          Fixed-point fractional library routines.
!                                                              (line  648)
  * __fracttauha:                          Fixed-point fractional library routines.
!                                                              (line  650)
  * __fracttauhq:                          Fixed-point fractional library routines.
!                                                              (line  645)
  * __fracttauqq:                          Fixed-point fractional library routines.
!                                                              (line  643)
  * __fracttausa:                          Fixed-point fractional library routines.
!                                                              (line  652)
  * __fracttausq:                          Fixed-point fractional library routines.
!                                                              (line  646)
  * __fracttauta:                          Fixed-point fractional library routines.
!                                                              (line  655)
  * __fracttida:                           Fixed-point fractional library routines.
!                                                              (line  990)
  * __fracttidq:                           Fixed-point fractional library routines.
!                                                              (line  987)
  * __fracttiha:                           Fixed-point fractional library routines.
!                                                              (line  988)
  * __fracttihq:                           Fixed-point fractional library routines.
!                                                              (line  985)
  * __fracttiqq:                           Fixed-point fractional library routines.
!                                                              (line  984)
  * __fracttisa:                           Fixed-point fractional library routines.
!                                                              (line  989)
  * __fracttisq:                           Fixed-point fractional library routines.
!                                                              (line  986)
  * __fracttita:                           Fixed-point fractional library routines.
!                                                              (line  991)
  * __fracttiuda:                          Fixed-point fractional library routines.
!                                                              (line  999)
  * __fracttiudq:                          Fixed-point fractional library routines.
!                                                              (line  995)
  * __fracttiuha:                          Fixed-point fractional library routines.
!                                                              (line  997)
  * __fracttiuhq:                          Fixed-point fractional library routines.
!                                                              (line  993)
  * __fracttiuqq:                          Fixed-point fractional library routines.
!                                                              (line  992)
  * __fracttiusa:                          Fixed-point fractional library routines.
!                                                              (line  998)
  * __fracttiusq:                          Fixed-point fractional library routines.
!                                                              (line  994)
  * __fracttiuta:                          Fixed-point fractional library routines.
!                                                              (line 1000)
  * __fractudada:                          Fixed-point fractional library routines.
!                                                              (line  857)
  * __fractudadf:                          Fixed-point fractional library routines.
!                                                              (line  880)
  * __fractudadi:                          Fixed-point fractional library routines.
!                                                              (line  877)
  * __fractudadq:                          Fixed-point fractional library routines.
!                                                              (line  853)
  * __fractudaha:                          Fixed-point fractional library routines.
!                                                              (line  855)
  * __fractudahi:                          Fixed-point fractional library routines.
!                                                              (line  875)
  * __fractudahq:                          Fixed-point fractional library routines.
!                                                              (line  851)
  * __fractudaqi:                          Fixed-point fractional library routines.
!                                                              (line  874)
  * __fractudaqq:                          Fixed-point fractional library routines.
!                                                              (line  850)
  * __fractudasa:                          Fixed-point fractional library routines.
!                                                              (line  856)
  * __fractudasf:                          Fixed-point fractional library routines.
!                                                              (line  879)
  * __fractudasi:                          Fixed-point fractional library routines.
!                                                              (line  876)
  * __fractudasq:                          Fixed-point fractional library routines.
!                                                              (line  852)
  * __fractudata:                          Fixed-point fractional library routines.
!                                                              (line  858)
  * __fractudati:                          Fixed-point fractional library routines.
!                                                              (line  878)
  * __fractudaudq:                         Fixed-point fractional library routines.
!                                                              (line  866)
  * __fractudauha2:                        Fixed-point fractional library routines.
!                                                              (line  868)
  * __fractudauhq:                         Fixed-point fractional library routines.
!                                                              (line  862)
  * __fractudauqq:                         Fixed-point fractional library routines.
!                                                              (line  860)
  * __fractudausa2:                        Fixed-point fractional library routines.
!                                                              (line  870)
  * __fractudausq:                         Fixed-point fractional library routines.
!                                                              (line  864)
  * __fractudauta2:                        Fixed-point fractional library routines.
!                                                              (line  872)
  * __fractudqda:                          Fixed-point fractional library routines.
!                                                              (line  764)
  * __fractudqdf:                          Fixed-point fractional library routines.
!                                                              (line  790)
  * __fractudqdi:                          Fixed-point fractional library routines.
!                                                              (line  786)
  * __fractudqdq:                          Fixed-point fractional library routines.
!                                                              (line  759)
  * __fractudqha:                          Fixed-point fractional library routines.
!                                                              (line  761)
  * __fractudqhi:                          Fixed-point fractional library routines.
!                                                              (line  784)
  * __fractudqhq:                          Fixed-point fractional library routines.
!                                                              (line  756)
  * __fractudqqi:                          Fixed-point fractional library routines.
!                                                              (line  782)
  * __fractudqqq:                          Fixed-point fractional library routines.
!                                                              (line  754)
  * __fractudqsa:                          Fixed-point fractional library routines.
!                                                              (line  763)
  * __fractudqsf:                          Fixed-point fractional library routines.
!                                                              (line  789)
  * __fractudqsi:                          Fixed-point fractional library routines.
!                                                              (line  785)
  * __fractudqsq:                          Fixed-point fractional library routines.
!                                                              (line  757)
  * __fractudqta:                          Fixed-point fractional library routines.
!                                                              (line  766)
  * __fractudqti:                          Fixed-point fractional library routines.
!                                                              (line  787)
  * __fractudquda:                         Fixed-point fractional library routines.
!                                                              (line  778)
  * __fractudquha:                         Fixed-point fractional library routines.
!                                                              (line  774)
  * __fractudquhq2:                        Fixed-point fractional library routines.
!                                                              (line  770)
  * __fractudquqq2:                        Fixed-point fractional library routines.
!                                                              (line  768)
  * __fractudqusa:                         Fixed-point fractional library routines.
!                                                              (line  776)
  * __fractudqusq2:                        Fixed-point fractional library routines.
!                                                              (line  772)
  * __fractudquta:                         Fixed-point fractional library routines.
!                                                              (line  780)
  * __fractuhada:                          Fixed-point fractional library routines.
!                                                              (line  798)
  * __fractuhadf:                          Fixed-point fractional library routines.
!                                                              (line  821)
  * __fractuhadi:                          Fixed-point fractional library routines.
!                                                              (line  818)
  * __fractuhadq:                          Fixed-point fractional library routines.
!                                                              (line  794)
  * __fractuhaha:                          Fixed-point fractional library routines.
!                                                              (line  796)
  * __fractuhahi:                          Fixed-point fractional library routines.
!                                                              (line  816)
  * __fractuhahq:                          Fixed-point fractional library routines.
!                                                              (line  792)
  * __fractuhaqi:                          Fixed-point fractional library routines.
!                                                              (line  815)
  * __fractuhaqq:                          Fixed-point fractional library routines.
!                                                              (line  791)
  * __fractuhasa:                          Fixed-point fractional library routines.
!                                                              (line  797)
  * __fractuhasf:                          Fixed-point fractional library routines.
!                                                              (line  820)
  * __fractuhasi:                          Fixed-point fractional library routines.
!                                                              (line  817)
  * __fractuhasq:                          Fixed-point fractional library routines.
!                                                              (line  793)
  * __fractuhata:                          Fixed-point fractional library routines.
!                                                              (line  799)
  * __fractuhati:                          Fixed-point fractional library routines.
                                                               (line  819)
+ * __fractuhauda2:                        Fixed-point fractional library routines.
+                                                              (line  811)
  * __fractuhaudq:                         Fixed-point fractional library routines.
!                                                              (line  807)
  * __fractuhauhq:                         Fixed-point fractional library routines.
!                                                              (line  803)
  * __fractuhauqq:                         Fixed-point fractional library routines.
!                                                              (line  801)
  * __fractuhausa2:                        Fixed-point fractional library routines.
!                                                              (line  809)
  * __fractuhausq:                         Fixed-point fractional library routines.
!                                                              (line  805)
  * __fractuhauta2:                        Fixed-point fractional library routines.
!                                                              (line  813)
  * __fractuhqda:                          Fixed-point fractional library routines.
!                                                              (line  701)
  * __fractuhqdf:                          Fixed-point fractional library routines.
!                                                              (line  722)
  * __fractuhqdi:                          Fixed-point fractional library routines.
!                                                              (line  719)
  * __fractuhqdq:                          Fixed-point fractional library routines.
!                                                              (line  698)
  * __fractuhqha:                          Fixed-point fractional library routines.
!                                                              (line  699)
  * __fractuhqhi:                          Fixed-point fractional library routines.
!                                                              (line  717)
  * __fractuhqhq:                          Fixed-point fractional library routines.
!                                                              (line  696)
  * __fractuhqqi:                          Fixed-point fractional library routines.
!                                                              (line  716)
  * __fractuhqqq:                          Fixed-point fractional library routines.
!                                                              (line  695)
  * __fractuhqsa:                          Fixed-point fractional library routines.
!                                                              (line  700)
  * __fractuhqsf:                          Fixed-point fractional library routines.
!                                                              (line  721)
  * __fractuhqsi:                          Fixed-point fractional library routines.
!                                                              (line  718)
  * __fractuhqsq:                          Fixed-point fractional library routines.
!                                                              (line  697)
  * __fractuhqta:                          Fixed-point fractional library routines.
!                                                              (line  702)
  * __fractuhqti:                          Fixed-point fractional library routines.
                                                               (line  720)
+ * __fractuhquda:                         Fixed-point fractional library routines.
+                                                              (line  712)
  * __fractuhqudq2:                        Fixed-point fractional library routines.
!                                                              (line  707)
  * __fractuhquha:                         Fixed-point fractional library routines.
!                                                              (line  709)
  * __fractuhquqq2:                        Fixed-point fractional library routines.
!                                                              (line  703)
  * __fractuhqusa:                         Fixed-point fractional library routines.
!                                                              (line  711)
  * __fractuhqusq2:                        Fixed-point fractional library routines.
!                                                              (line  705)
  * __fractuhquta:                         Fixed-point fractional library routines.
!                                                              (line  714)
  * __fractunsdadi:                        Fixed-point fractional library routines.
!                                                              (line 1554)
  * __fractunsdahi:                        Fixed-point fractional library routines.
!                                                              (line 1552)
  * __fractunsdaqi:                        Fixed-point fractional library routines.
!                                                              (line 1551)
  * __fractunsdasi:                        Fixed-point fractional library routines.
!                                                              (line 1553)
  * __fractunsdati:                        Fixed-point fractional library routines.
!                                                              (line 1555)
  * __fractunsdida:                        Fixed-point fractional library routines.
!                                                              (line 1706)
  * __fractunsdidq:                        Fixed-point fractional library routines.
!                                                              (line 1703)
  * __fractunsdiha:                        Fixed-point fractional library routines.
!                                                              (line 1704)
  * __fractunsdihq:                        Fixed-point fractional library routines.
!                                                              (line 1701)
  * __fractunsdiqq:                        Fixed-point fractional library routines.
!                                                              (line 1700)
  * __fractunsdisa:                        Fixed-point fractional library routines.
!                                                              (line 1705)
  * __fractunsdisq:                        Fixed-point fractional library routines.
!                                                              (line 1702)
  * __fractunsdita:                        Fixed-point fractional library routines.
!                                                              (line 1707)
  * __fractunsdiuda:                       Fixed-point fractional library routines.
!                                                              (line 1718)
  * __fractunsdiudq:                       Fixed-point fractional library routines.
!                                                              (line 1713)
  * __fractunsdiuha:                       Fixed-point fractional library routines.
!                                                              (line 1715)
  * __fractunsdiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1710)
  * __fractunsdiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1708)
  * __fractunsdiusa:                       Fixed-point fractional library routines.
!                                                              (line 1717)
  * __fractunsdiusq:                       Fixed-point fractional library routines.
!                                                              (line 1711)
  * __fractunsdiuta:                       Fixed-point fractional library routines.
!                                                              (line 1720)
  * __fractunsdqdi:                        Fixed-point fractional library routines.
!                                                              (line 1538)
  * __fractunsdqhi:                        Fixed-point fractional library routines.
!                                                              (line 1536)
  * __fractunsdqqi:                        Fixed-point fractional library routines.
!                                                              (line 1535)
  * __fractunsdqsi:                        Fixed-point fractional library routines.
!                                                              (line 1537)
  * __fractunsdqti:                        Fixed-point fractional library routines.
!                                                              (line 1539)
  * __fractunshadi:                        Fixed-point fractional library routines.
!                                                              (line 1544)
  * __fractunshahi:                        Fixed-point fractional library routines.
!                                                              (line 1542)
  * __fractunshaqi:                        Fixed-point fractional library routines.
!                                                              (line 1541)
  * __fractunshasi:                        Fixed-point fractional library routines.
!                                                              (line 1543)
  * __fractunshati:                        Fixed-point fractional library routines.
!                                                              (line 1545)
  * __fractunshida:                        Fixed-point fractional library routines.
!                                                              (line 1662)
  * __fractunshidq:                        Fixed-point fractional library routines.
!                                                              (line 1659)
  * __fractunshiha:                        Fixed-point fractional library routines.
!                                                              (line 1660)
  * __fractunshihq:                        Fixed-point fractional library routines.
!                                                              (line 1657)
  * __fractunshiqq:                        Fixed-point fractional library routines.
!                                                              (line 1656)
  * __fractunshisa:                        Fixed-point fractional library routines.
!                                                              (line 1661)
  * __fractunshisq:                        Fixed-point fractional library routines.
!                                                              (line 1658)
  * __fractunshita:                        Fixed-point fractional library routines.
!                                                              (line 1663)
  * __fractunshiuda:                       Fixed-point fractional library routines.
!                                                              (line 1674)
  * __fractunshiudq:                       Fixed-point fractional library routines.
!                                                              (line 1669)
  * __fractunshiuha:                       Fixed-point fractional library routines.
!                                                              (line 1671)
  * __fractunshiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1666)
  * __fractunshiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1664)
  * __fractunshiusa:                       Fixed-point fractional library routines.
!                                                              (line 1673)
  * __fractunshiusq:                       Fixed-point fractional library routines.
!                                                              (line 1667)
  * __fractunshiuta:                       Fixed-point fractional library routines.
!                                                              (line 1676)
  * __fractunshqdi:                        Fixed-point fractional library routines.
!                                                              (line 1528)
  * __fractunshqhi:                        Fixed-point fractional library routines.
!                                                              (line 1526)
  * __fractunshqqi:                        Fixed-point fractional library routines.
!                                                              (line 1525)
  * __fractunshqsi:                        Fixed-point fractional library routines.
!                                                              (line 1527)
  * __fractunshqti:                        Fixed-point fractional library routines.
!                                                              (line 1529)
  * __fractunsqida:                        Fixed-point fractional library routines.
!                                                              (line 1640)
  * __fractunsqidq:                        Fixed-point fractional library routines.
!                                                              (line 1637)
  * __fractunsqiha:                        Fixed-point fractional library routines.
!                                                              (line 1638)
  * __fractunsqihq:                        Fixed-point fractional library routines.
!                                                              (line 1635)
  * __fractunsqiqq:                        Fixed-point fractional library routines.
!                                                              (line 1634)
  * __fractunsqisa:                        Fixed-point fractional library routines.
!                                                              (line 1639)
  * __fractunsqisq:                        Fixed-point fractional library routines.
!                                                              (line 1636)
  * __fractunsqita:                        Fixed-point fractional library routines.
!                                                              (line 1641)
  * __fractunsqiuda:                       Fixed-point fractional library routines.
!                                                              (line 1652)
  * __fractunsqiudq:                       Fixed-point fractional library routines.
!                                                              (line 1647)
  * __fractunsqiuha:                       Fixed-point fractional library routines.
!                                                              (line 1649)
  * __fractunsqiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1644)
  * __fractunsqiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1642)
  * __fractunsqiusa:                       Fixed-point fractional library routines.
!                                                              (line 1651)
  * __fractunsqiusq:                       Fixed-point fractional library routines.
!                                                              (line 1645)
  * __fractunsqiuta:                       Fixed-point fractional library routines.
!                                                              (line 1654)
  * __fractunsqqdi:                        Fixed-point fractional library routines.
!                                                              (line 1523)
  * __fractunsqqhi:                        Fixed-point fractional library routines.
!                                                              (line 1521)
  * __fractunsqqqi:                        Fixed-point fractional library routines.
!                                                              (line 1520)
  * __fractunsqqsi:                        Fixed-point fractional library routines.
!                                                              (line 1522)
  * __fractunsqqti:                        Fixed-point fractional library routines.
!                                                              (line 1524)
  * __fractunssadi:                        Fixed-point fractional library routines.
!                                                              (line 1549)
  * __fractunssahi:                        Fixed-point fractional library routines.
!                                                              (line 1547)
  * __fractunssaqi:                        Fixed-point fractional library routines.
!                                                              (line 1546)
  * __fractunssasi:                        Fixed-point fractional library routines.
!                                                              (line 1548)
  * __fractunssati:                        Fixed-point fractional library routines.
!                                                              (line 1550)
  * __fractunssida:                        Fixed-point fractional library routines.
!                                                              (line 1684)
  * __fractunssidq:                        Fixed-point fractional library routines.
!                                                              (line 1681)
  * __fractunssiha:                        Fixed-point fractional library routines.
!                                                              (line 1682)
  * __fractunssihq:                        Fixed-point fractional library routines.
!                                                              (line 1679)
  * __fractunssiqq:                        Fixed-point fractional library routines.
!                                                              (line 1678)
  * __fractunssisa:                        Fixed-point fractional library routines.
!                                                              (line 1683)
  * __fractunssisq:                        Fixed-point fractional library routines.
!                                                              (line 1680)
  * __fractunssita:                        Fixed-point fractional library routines.
!                                                              (line 1685)
  * __fractunssiuda:                       Fixed-point fractional library routines.
!                                                              (line 1696)
  * __fractunssiudq:                       Fixed-point fractional library routines.
!                                                              (line 1691)
  * __fractunssiuha:                       Fixed-point fractional library routines.
!                                                              (line 1693)
  * __fractunssiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1688)
  * __fractunssiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1686)
  * __fractunssiusa:                       Fixed-point fractional library routines.
!                                                              (line 1695)
  * __fractunssiusq:                       Fixed-point fractional library routines.
!                                                              (line 1689)
  * __fractunssiuta:                       Fixed-point fractional library routines.
!                                                              (line 1698)
  * __fractunssqdi:                        Fixed-point fractional library routines.
!                                                              (line 1533)
  * __fractunssqhi:                        Fixed-point fractional library routines.
!                                                              (line 1531)
  * __fractunssqqi:                        Fixed-point fractional library routines.
!                                                              (line 1530)
  * __fractunssqsi:                        Fixed-point fractional library routines.
!                                                              (line 1532)
  * __fractunssqti:                        Fixed-point fractional library routines.
!                                                              (line 1534)
  * __fractunstadi:                        Fixed-point fractional library routines.
!                                                              (line 1559)
  * __fractunstahi:                        Fixed-point fractional library routines.
!                                                              (line 1557)
  * __fractunstaqi:                        Fixed-point fractional library routines.
!                                                              (line 1556)
  * __fractunstasi:                        Fixed-point fractional library routines.
!                                                              (line 1558)
  * __fractunstati:                        Fixed-point fractional library routines.
!                                                              (line 1560)
  * __fractunstida:                        Fixed-point fractional library routines.
!                                                              (line 1729)
  * __fractunstidq:                        Fixed-point fractional library routines.
!                                                              (line 1725)
  * __fractunstiha:                        Fixed-point fractional library routines.
!                                                              (line 1727)
  * __fractunstihq:                        Fixed-point fractional library routines.
!                                                              (line 1723)
  * __fractunstiqq:                        Fixed-point fractional library routines.
!                                                              (line 1722)
  * __fractunstisa:                        Fixed-point fractional library routines.
!                                                              (line 1728)
  * __fractunstisq:                        Fixed-point fractional library routines.
!                                                              (line 1724)
  * __fractunstita:                        Fixed-point fractional library routines.
!                                                              (line 1730)
  * __fractunstiuda:                       Fixed-point fractional library routines.
!                                                              (line 1744)
  * __fractunstiudq:                       Fixed-point fractional library routines.
!                                                              (line 1738)
  * __fractunstiuha:                       Fixed-point fractional library routines.
!                                                              (line 1740)
  * __fractunstiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1734)
  * __fractunstiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1732)
  * __fractunstiusa:                       Fixed-point fractional library routines.
!                                                              (line 1742)
  * __fractunstiusq:                       Fixed-point fractional library routines.
!                                                              (line 1736)
  * __fractunstiuta:                       Fixed-point fractional library routines.
!                                                              (line 1746)
  * __fractunsudadi:                       Fixed-point fractional library routines.
!                                                              (line 1620)
  * __fractunsudahi:                       Fixed-point fractional library routines.
!                                                              (line 1616)
  * __fractunsudaqi:                       Fixed-point fractional library routines.
!                                                              (line 1614)
  * __fractunsudasi:                       Fixed-point fractional library routines.
!                                                              (line 1618)
  * __fractunsudati:                       Fixed-point fractional library routines.
!                                                              (line 1622)
  * __fractunsudqdi:                       Fixed-point fractional library routines.
!                                                              (line 1594)
  * __fractunsudqhi:                       Fixed-point fractional library routines.
!                                                              (line 1590)
  * __fractunsudqqi:                       Fixed-point fractional library routines.
!                                                              (line 1588)
  * __fractunsudqsi:                       Fixed-point fractional library routines.
!                                                              (line 1592)
  * __fractunsudqti:                       Fixed-point fractional library routines.
!                                                              (line 1596)
  * __fractunsuhadi:                       Fixed-point fractional library routines.
!                                                              (line 1604)
  * __fractunsuhahi:                       Fixed-point fractional library routines.
!                                                              (line 1600)
  * __fractunsuhaqi:                       Fixed-point fractional library routines.
!                                                              (line 1598)
  * __fractunsuhasi:                       Fixed-point fractional library routines.
!                                                              (line 1602)
  * __fractunsuhati:                       Fixed-point fractional library routines.
!                                                              (line 1606)
  * __fractunsuhqdi:                       Fixed-point fractional library routines.
!                                                              (line 1575)
  * __fractunsuhqhi:                       Fixed-point fractional library routines.
!                                                              (line 1573)
  * __fractunsuhqqi:                       Fixed-point fractional library routines.
!                                                              (line 1572)
  * __fractunsuhqsi:                       Fixed-point fractional library routines.
!                                                              (line 1574)
  * __fractunsuhqti:                       Fixed-point fractional library routines.
                                                               (line 1576)
+ * __fractunsuqqdi:                       Fixed-point fractional library routines.
+                                                              (line 1568)
  * __fractunsuqqhi:                       Fixed-point fractional library routines.
!                                                              (line 1564)
  * __fractunsuqqqi:                       Fixed-point fractional library routines.
!                                                              (line 1562)
  * __fractunsuqqsi:                       Fixed-point fractional library routines.
!                                                              (line 1566)
  * __fractunsuqqti:                       Fixed-point fractional library routines.
!                                                              (line 1570)
  * __fractunsusadi:                       Fixed-point fractional library routines.
!                                                              (line 1611)
  * __fractunsusahi:                       Fixed-point fractional library routines.
!                                                              (line 1609)
  * __fractunsusaqi:                       Fixed-point fractional library routines.
!                                                              (line 1608)
  * __fractunsusasi:                       Fixed-point fractional library routines.
!                                                              (line 1610)
  * __fractunsusati:                       Fixed-point fractional library routines.
!                                                              (line 1612)
  * __fractunsusqdi:                       Fixed-point fractional library routines.
!                                                              (line 1584)
  * __fractunsusqhi:                       Fixed-point fractional library routines.
!                                                              (line 1580)
  * __fractunsusqqi:                       Fixed-point fractional library routines.
!                                                              (line 1578)
  * __fractunsusqsi:                       Fixed-point fractional library routines.
!                                                              (line 1582)
  * __fractunsusqti:                       Fixed-point fractional library routines.
!                                                              (line 1586)
  * __fractunsutadi:                       Fixed-point fractional library routines.
!                                                              (line 1630)
  * __fractunsutahi:                       Fixed-point fractional library routines.
!                                                              (line 1626)
  * __fractunsutaqi:                       Fixed-point fractional library routines.
!                                                              (line 1624)
  * __fractunsutasi:                       Fixed-point fractional library routines.
!                                                              (line 1628)
  * __fractunsutati:                       Fixed-point fractional library routines.
!                                                              (line 1632)
  * __fractuqqda:                          Fixed-point fractional library routines.
!                                                              (line  671)
  * __fractuqqdf:                          Fixed-point fractional library routines.
!                                                              (line  694)
  * __fractuqqdi:                          Fixed-point fractional library routines.
!                                                              (line  691)
  * __fractuqqdq:                          Fixed-point fractional library routines.
!                                                              (line  667)
  * __fractuqqha:                          Fixed-point fractional library routines.
!                                                              (line  669)
  * __fractuqqhi:                          Fixed-point fractional library routines.
!                                                              (line  689)
  * __fractuqqhq:                          Fixed-point fractional library routines.
!                                                              (line  665)
  * __fractuqqqi:                          Fixed-point fractional library routines.
!                                                              (line  688)
  * __fractuqqqq:                          Fixed-point fractional library routines.
!                                                              (line  664)
  * __fractuqqsa:                          Fixed-point fractional library routines.
!                                                              (line  670)
  * __fractuqqsf:                          Fixed-point fractional library routines.
!                                                              (line  693)
  * __fractuqqsi:                          Fixed-point fractional library routines.
!                                                              (line  690)
  * __fractuqqsq:                          Fixed-point fractional library routines.
!                                                              (line  666)
  * __fractuqqta:                          Fixed-point fractional library routines.
!                                                              (line  672)
  * __fractuqqti:                          Fixed-point fractional library routines.
                                                               (line  692)
+ * __fractuqquda:                         Fixed-point fractional library routines.
+                                                              (line  684)
  * __fractuqqudq2:                        Fixed-point fractional library routines.
!                                                              (line  678)
  * __fractuqquha:                         Fixed-point fractional library routines.
!                                                              (line  680)
  * __fractuqquhq2:                        Fixed-point fractional library routines.
!                                                              (line  674)
  * __fractuqqusa:                         Fixed-point fractional library routines.
!                                                              (line  682)
  * __fractuqqusq2:                        Fixed-point fractional library routines.
!                                                              (line  676)
  * __fractuqquta:                         Fixed-point fractional library routines.
!                                                              (line  686)
  * __fractusada:                          Fixed-point fractional library routines.
!                                                              (line  828)
  * __fractusadf:                          Fixed-point fractional library routines.
!                                                              (line  849)
  * __fractusadi:                          Fixed-point fractional library routines.
!                                                              (line  846)
  * __fractusadq:                          Fixed-point fractional library routines.
!                                                              (line  825)
  * __fractusaha:                          Fixed-point fractional library routines.
!                                                              (line  826)
  * __fractusahi:                          Fixed-point fractional library routines.
!                                                              (line  844)
  * __fractusahq:                          Fixed-point fractional library routines.
!                                                              (line  823)
  * __fractusaqi:                          Fixed-point fractional library routines.
!                                                              (line  843)
  * __fractusaqq:                          Fixed-point fractional library routines.
!                                                              (line  822)
  * __fractusasa:                          Fixed-point fractional library routines.
!                                                              (line  827)
  * __fractusasf:                          Fixed-point fractional library routines.
!                                                              (line  848)
  * __fractusasi:                          Fixed-point fractional library routines.
!                                                              (line  845)
  * __fractusasq:                          Fixed-point fractional library routines.
!                                                              (line  824)
  * __fractusata:                          Fixed-point fractional library routines.
!                                                              (line  829)
  * __fractusati:                          Fixed-point fractional library routines.
                                                               (line  847)
+ * __fractusauda2:                        Fixed-point fractional library routines.
+                                                              (line  839)
  * __fractusaudq:                         Fixed-point fractional library routines.
!                                                              (line  835)
  * __fractusauha2:                        Fixed-point fractional library routines.
!                                                              (line  837)
  * __fractusauhq:                         Fixed-point fractional library routines.
!                                                              (line  832)
  * __fractusauqq:                         Fixed-point fractional library routines.
!                                                              (line  830)
  * __fractusausq:                         Fixed-point fractional library routines.
!                                                              (line  833)
  * __fractusauta2:                        Fixed-point fractional library routines.
!                                                              (line  841)
  * __fractusqda:                          Fixed-point fractional library routines.
!                                                              (line  730)
  * __fractusqdf:                          Fixed-point fractional library routines.
!                                                              (line  753)
  * __fractusqdi:                          Fixed-point fractional library routines.
!                                                              (line  750)
  * __fractusqdq:                          Fixed-point fractional library routines.
!                                                              (line  726)
  * __fractusqha:                          Fixed-point fractional library routines.
!                                                              (line  728)
  * __fractusqhi:                          Fixed-point fractional library routines.
!                                                              (line  748)
  * __fractusqhq:                          Fixed-point fractional library routines.
!                                                              (line  724)
  * __fractusqqi:                          Fixed-point fractional library routines.
!                                                              (line  747)
  * __fractusqqq:                          Fixed-point fractional library routines.
!                                                              (line  723)
  * __fractusqsa:                          Fixed-point fractional library routines.
!                                                              (line  729)
  * __fractusqsf:                          Fixed-point fractional library routines.
!                                                              (line  752)
  * __fractusqsi:                          Fixed-point fractional library routines.
!                                                              (line  749)
  * __fractusqsq:                          Fixed-point fractional library routines.
!                                                              (line  725)
  * __fractusqta:                          Fixed-point fractional library routines.
!                                                              (line  731)
  * __fractusqti:                          Fixed-point fractional library routines.
                                                               (line  751)
+ * __fractusquda:                         Fixed-point fractional library routines.
+                                                              (line  743)
  * __fractusqudq2:                        Fixed-point fractional library routines.
!                                                              (line  737)
  * __fractusquha:                         Fixed-point fractional library routines.
!                                                              (line  739)
  * __fractusquhq2:                        Fixed-point fractional library routines.
!                                                              (line  735)
  * __fractusquqq2:                        Fixed-point fractional library routines.
!                                                              (line  733)
  * __fractusqusa:                         Fixed-point fractional library routines.
!                                                              (line  741)
  * __fractusquta:                         Fixed-point fractional library routines.
!                                                              (line  745)
  * __fractutada:                          Fixed-point fractional library routines.
!                                                              (line  891)
  * __fractutadf:                          Fixed-point fractional library routines.
!                                                              (line  917)
  * __fractutadi:                          Fixed-point fractional library routines.
!                                                              (line  913)
  * __fractutadq:                          Fixed-point fractional library routines.
!                                                              (line  886)
  * __fractutaha:                          Fixed-point fractional library routines.
!                                                              (line  888)
  * __fractutahi:                          Fixed-point fractional library routines.
!                                                              (line  911)
  * __fractutahq:                          Fixed-point fractional library routines.
!                                                              (line  883)
  * __fractutaqi:                          Fixed-point fractional library routines.
!                                                              (line  909)
  * __fractutaqq:                          Fixed-point fractional library routines.
!                                                              (line  881)
  * __fractutasa:                          Fixed-point fractional library routines.
!                                                              (line  890)
  * __fractutasf:                          Fixed-point fractional library routines.
!                                                              (line  916)
  * __fractutasi:                          Fixed-point fractional library routines.
!                                                              (line  912)
  * __fractutasq:                          Fixed-point fractional library routines.
!                                                              (line  884)
  * __fractutata:                          Fixed-point fractional library routines.
!                                                              (line  893)
  * __fractutati:                          Fixed-point fractional library routines.
!                                                              (line  914)
  * __fractutauda2:                        Fixed-point fractional library routines.
!                                                              (line  907)
  * __fractutaudq:                         Fixed-point fractional library routines.
!                                                              (line  901)
  * __fractutauha2:                        Fixed-point fractional library routines.
!                                                              (line  903)
  * __fractutauhq:                         Fixed-point fractional library routines.
!                                                              (line  897)
  * __fractutauqq:                         Fixed-point fractional library routines.
!                                                              (line  895)
  * __fractutausa2:                        Fixed-point fractional library routines.
!                                                              (line  905)
  * __fractutausq:                         Fixed-point fractional library routines.
!                                                              (line  899)
  * __gedf2:                               Soft float library routines.
                                                               (line  205)
  * __gesf2:                               Soft float library routines.
*************** Concept Index
*** 52573,52593 ****
  * __lshrti3:                             Integer library routines.
                                                               (line   31)
  * __lshruda3:                            Fixed-point fractional library routines.
!                                                              (line  396)
  * __lshrudq3:                            Fixed-point fractional library routines.
!                                                              (line  390)
  * __lshruha3:                            Fixed-point fractional library routines.
!                                                              (line  392)
  * __lshruhq3:                            Fixed-point fractional library routines.
!                                                              (line  386)
  * __lshruqq3:                            Fixed-point fractional library routines.
!                                                              (line  384)
  * __lshrusa3:                            Fixed-point fractional library routines.
!                                                              (line  394)
  * __lshrusq3:                            Fixed-point fractional library routines.
!                                                              (line  388)
  * __lshruta3:                            Fixed-point fractional library routines.
!                                                              (line  398)
  * __ltdf2:                               Soft float library routines.
                                                               (line  211)
  * __ltsf2:                               Soft float library routines.
--- 52573,52593 ----
  * __lshrti3:                             Integer library routines.
                                                               (line   31)
  * __lshruda3:                            Fixed-point fractional library routines.
!                                                              (line  388)
  * __lshrudq3:                            Fixed-point fractional library routines.
!                                                              (line  382)
  * __lshruha3:                            Fixed-point fractional library routines.
!                                                              (line  384)
  * __lshruhq3:                            Fixed-point fractional library routines.
!                                                              (line  378)
  * __lshruqq3:                            Fixed-point fractional library routines.
!                                                              (line  376)
  * __lshrusa3:                            Fixed-point fractional library routines.
!                                                              (line  386)
  * __lshrusq3:                            Fixed-point fractional library routines.
!                                                              (line  380)
  * __lshruta3:                            Fixed-point fractional library routines.
!                                                              (line  390)
  * __ltdf2:                               Soft float library routines.
                                                               (line  211)
  * __ltsf2:                               Soft float library routines.
*************** Concept Index
*** 52608,52614 ****
  * __morestack_segments:                  Miscellaneous routines.
                                                               (line   44)
  * __mulda3:                              Fixed-point fractional library routines.
!                                                              (line  178)
  * __muldc3:                              Soft float library routines.
                                                               (line  239)
  * __muldf3:                              Soft float library routines.
--- 52608,52614 ----
  * __morestack_segments:                  Miscellaneous routines.
                                                               (line   44)
  * __mulda3:                              Fixed-point fractional library routines.
!                                                              (line  170)
  * __muldc3:                              Soft float library routines.
                                                               (line  239)
  * __muldf3:                              Soft float library routines.
*************** Concept Index
*** 52616,52630 ****
  * __muldi3:                              Integer library routines.
                                                               (line   42)
  * __muldq3:                              Fixed-point fractional library routines.
!                                                              (line  165)
  * __mulha3:                              Fixed-point fractional library routines.
!                                                              (line  175)
  * __mulhq3:                              Fixed-point fractional library routines.
!                                                              (line  163)
  * __mulqq3:                              Fixed-point fractional library routines.
!                                                              (line  161)
  * __mulsa3:                              Fixed-point fractional library routines.
!                                                              (line  177)
  * __mulsc3:                              Soft float library routines.
                                                               (line  237)
  * __mulsf3:                              Soft float library routines.
--- 52616,52630 ----
  * __muldi3:                              Integer library routines.
                                                               (line   42)
  * __muldq3:                              Fixed-point fractional library routines.
!                                                              (line  157)
  * __mulha3:                              Fixed-point fractional library routines.
!                                                              (line  167)
  * __mulhq3:                              Fixed-point fractional library routines.
!                                                              (line  155)
  * __mulqq3:                              Fixed-point fractional library routines.
!                                                              (line  153)
  * __mulsa3:                              Fixed-point fractional library routines.
!                                                              (line  169)
  * __mulsc3:                              Soft float library routines.
                                                               (line  237)
  * __mulsf3:                              Soft float library routines.
*************** Concept Index
*** 52632,52640 ****
  * __mulsi3:                              Integer library routines.
                                                               (line   41)
  * __mulsq3:                              Fixed-point fractional library routines.
!                                                              (line  164)
  * __multa3:                              Fixed-point fractional library routines.
!                                                              (line  179)
  * __multc3:                              Soft float library routines.
                                                               (line  241)
  * __multf3:                              Soft float library routines.
--- 52632,52640 ----
  * __mulsi3:                              Integer library routines.
                                                               (line   41)
  * __mulsq3:                              Fixed-point fractional library routines.
!                                                              (line  156)
  * __multa3:                              Fixed-point fractional library routines.
!                                                              (line  171)
  * __multc3:                              Soft float library routines.
                                                               (line  241)
  * __multf3:                              Soft float library routines.
*************** Concept Index
*** 52642,52662 ****
  * __multi3:                              Integer library routines.
                                                               (line   43)
  * __muluda3:                             Fixed-point fractional library routines.
!                                                              (line  185)
  * __muludq3:                             Fixed-point fractional library routines.
!                                                              (line  173)
  * __muluha3:                             Fixed-point fractional library routines.
!                                                              (line  181)
  * __muluhq3:                             Fixed-point fractional library routines.
!                                                              (line  169)
  * __muluqq3:                             Fixed-point fractional library routines.
!                                                              (line  167)
  * __mulusa3:                             Fixed-point fractional library routines.
!                                                              (line  183)
  * __mulusq3:                             Fixed-point fractional library routines.
!                                                              (line  171)
  * __muluta3:                             Fixed-point fractional library routines.
!                                                              (line  187)
  * __mulvdi3:                             Integer library routines.
                                                               (line  114)
  * __mulvsi3:                             Integer library routines.
--- 52642,52662 ----
  * __multi3:                              Integer library routines.
                                                               (line   43)
  * __muluda3:                             Fixed-point fractional library routines.
!                                                              (line  177)
  * __muludq3:                             Fixed-point fractional library routines.
!                                                              (line  165)
  * __muluha3:                             Fixed-point fractional library routines.
!                                                              (line  173)
  * __muluhq3:                             Fixed-point fractional library routines.
!                                                              (line  161)
  * __muluqq3:                             Fixed-point fractional library routines.
!                                                              (line  159)
  * __mulusa3:                             Fixed-point fractional library routines.
!                                                              (line  175)
  * __mulusq3:                             Fixed-point fractional library routines.
!                                                              (line  163)
  * __muluta3:                             Fixed-point fractional library routines.
!                                                              (line  179)
  * __mulvdi3:                             Integer library routines.
                                                               (line  114)
  * __mulvsi3:                             Integer library routines.
*************** Concept Index
*** 52668,52714 ****
  * __nedf2:                               Soft float library routines.
                                                               (line  199)
  * __negda2:                              Fixed-point fractional library routines.
!                                                              (line  306)
  * __negdf2:                              Soft float library routines.
                                                               (line   55)
  * __negdi2:                              Integer library routines.
                                                               (line   46)
  * __negdq2:                              Fixed-point fractional library routines.
!                                                              (line  296)
  * __negha2:                              Fixed-point fractional library routines.
!                                                              (line  304)
  * __neghq2:                              Fixed-point fractional library routines.
!                                                              (line  294)
  * __negqq2:                              Fixed-point fractional library routines.
!                                                              (line  293)
  * __negsa2:                              Fixed-point fractional library routines.
!                                                              (line  305)
  * __negsf2:                              Soft float library routines.
                                                               (line   54)
  * __negsq2:                              Fixed-point fractional library routines.
!                                                              (line  295)
  * __negta2:                              Fixed-point fractional library routines.
!                                                              (line  307)
  * __negtf2:                              Soft float library routines.
                                                               (line   56)
  * __negti2:                              Integer library routines.
                                                               (line   47)
  * __neguda2:                             Fixed-point fractional library routines.
!                                                              (line  311)
  * __negudq2:                             Fixed-point fractional library routines.
!                                                              (line  302)
  * __neguha2:                             Fixed-point fractional library routines.
!                                                              (line  308)
  * __neguhq2:                             Fixed-point fractional library routines.
!                                                              (line  299)
  * __neguqq2:                             Fixed-point fractional library routines.
!                                                              (line  297)
  * __negusa2:                             Fixed-point fractional library routines.
!                                                              (line  310)
  * __negusq2:                             Fixed-point fractional library routines.
!                                                              (line  300)
  * __neguta2:                             Fixed-point fractional library routines.
!                                                              (line  313)
  * __negvdi2:                             Integer library routines.
                                                               (line  118)
  * __negvsi2:                             Integer library routines.
--- 52668,52714 ----
  * __nedf2:                               Soft float library routines.
                                                               (line  199)
  * __negda2:                              Fixed-point fractional library routines.
!                                                              (line  298)
  * __negdf2:                              Soft float library routines.
                                                               (line   55)
  * __negdi2:                              Integer library routines.
                                                               (line   46)
  * __negdq2:                              Fixed-point fractional library routines.
!                                                              (line  288)
  * __negha2:                              Fixed-point fractional library routines.
!                                                              (line  296)
  * __neghq2:                              Fixed-point fractional library routines.
!                                                              (line  286)
  * __negqq2:                              Fixed-point fractional library routines.
!                                                              (line  285)
  * __negsa2:                              Fixed-point fractional library routines.
!                                                              (line  297)
  * __negsf2:                              Soft float library routines.
                                                               (line   54)
  * __negsq2:                              Fixed-point fractional library routines.
!                                                              (line  287)
  * __negta2:                              Fixed-point fractional library routines.
!                                                              (line  299)
  * __negtf2:                              Soft float library routines.
                                                               (line   56)
  * __negti2:                              Integer library routines.
                                                               (line   47)
  * __neguda2:                             Fixed-point fractional library routines.
!                                                              (line  303)
  * __negudq2:                             Fixed-point fractional library routines.
!                                                              (line  294)
  * __neguha2:                             Fixed-point fractional library routines.
!                                                              (line  300)
  * __neguhq2:                             Fixed-point fractional library routines.
!                                                              (line  291)
  * __neguqq2:                             Fixed-point fractional library routines.
!                                                              (line  289)
  * __negusa2:                             Fixed-point fractional library routines.
!                                                              (line  302)
  * __negusq2:                             Fixed-point fractional library routines.
!                                                              (line  292)
  * __neguta2:                             Fixed-point fractional library routines.
!                                                              (line  305)
  * __negvdi2:                             Integer library routines.
                                                               (line  118)
  * __negvsi2:                             Integer library routines.
*************** Concept Index
*** 52740,53742 ****
  * __powixf2:                             Soft float library routines.
                                                               (line  234)
  * __satfractdadq:                        Fixed-point fractional library routines.
!                                                              (line 1160)
  * __satfractdaha2:                       Fixed-point fractional library routines.
!                                                              (line 1161)
  * __satfractdahq:                        Fixed-point fractional library routines.
!                                                              (line 1158)
  * __satfractdaqq:                        Fixed-point fractional library routines.
!                                                              (line 1157)
  * __satfractdasa2:                       Fixed-point fractional library routines.
!                                                              (line 1162)
  * __satfractdasq:                        Fixed-point fractional library routines.
!                                                              (line 1159)
  * __satfractdata2:                       Fixed-point fractional library routines.
!                                                              (line 1163)
  * __satfractdauda:                       Fixed-point fractional library routines.
!                                                              (line 1173)
  * __satfractdaudq:                       Fixed-point fractional library routines.
!                                                              (line 1168)
  * __satfractdauha:                       Fixed-point fractional library routines.
!                                                              (line 1170)
  * __satfractdauhq:                       Fixed-point fractional library routines.
!                                                              (line 1166)
  * __satfractdauqq:                       Fixed-point fractional library routines.
!                                                              (line 1164)
  * __satfractdausa:                       Fixed-point fractional library routines.
!                                                              (line 1172)
  * __satfractdausq:                       Fixed-point fractional library routines.
!                                                              (line 1167)
  * __satfractdauta:                       Fixed-point fractional library routines.
!                                                              (line 1174)
  * __satfractdfda:                        Fixed-point fractional library routines.
!                                                              (line 1513)
  * __satfractdfdq:                        Fixed-point fractional library routines.
!                                                              (line 1510)
  * __satfractdfha:                        Fixed-point fractional library routines.
!                                                              (line 1511)
  * __satfractdfhq:                        Fixed-point fractional library routines.
!                                                              (line 1508)
  * __satfractdfqq:                        Fixed-point fractional library routines.
!                                                              (line 1507)
  * __satfractdfsa:                        Fixed-point fractional library routines.
!                                                              (line 1512)
  * __satfractdfsq:                        Fixed-point fractional library routines.
!                                                              (line 1509)
  * __satfractdfta:                        Fixed-point fractional library routines.
!                                                              (line 1514)
  * __satfractdfuda:                       Fixed-point fractional library routines.
!                                                              (line 1522)
  * __satfractdfudq:                       Fixed-point fractional library routines.
!                                                              (line 1518)
  * __satfractdfuha:                       Fixed-point fractional library routines.
!                                                              (line 1520)
  * __satfractdfuhq:                       Fixed-point fractional library routines.
!                                                              (line 1516)
  * __satfractdfuqq:                       Fixed-point fractional library routines.
!                                                              (line 1515)
  * __satfractdfusa:                       Fixed-point fractional library routines.
!                                                              (line 1521)
  * __satfractdfusq:                       Fixed-point fractional library routines.
!                                                              (line 1517)
  * __satfractdfuta:                       Fixed-point fractional library routines.
!                                                              (line 1523)
  * __satfractdida:                        Fixed-point fractional library routines.
!                                                              (line 1463)
  * __satfractdidq:                        Fixed-point fractional library routines.
!                                                              (line 1460)
  * __satfractdiha:                        Fixed-point fractional library routines.
!                                                              (line 1461)
  * __satfractdihq:                        Fixed-point fractional library routines.
!                                                              (line 1458)
  * __satfractdiqq:                        Fixed-point fractional library routines.
!                                                              (line 1457)
  * __satfractdisa:                        Fixed-point fractional library routines.
!                                                              (line 1462)
  * __satfractdisq:                        Fixed-point fractional library routines.
!                                                              (line 1459)
  * __satfractdita:                        Fixed-point fractional library routines.
!                                                              (line 1464)
  * __satfractdiuda:                       Fixed-point fractional library routines.
!                                                              (line 1471)
  * __satfractdiudq:                       Fixed-point fractional library routines.
!                                                              (line 1468)
  * __satfractdiuha:                       Fixed-point fractional library routines.
!                                                              (line 1469)
  * __satfractdiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1466)
  * __satfractdiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1465)
  * __satfractdiusa:                       Fixed-point fractional library routines.
!                                                              (line 1470)
  * __satfractdiusq:                       Fixed-point fractional library routines.
!                                                              (line 1467)
  * __satfractdiuta:                       Fixed-point fractional library routines.
!                                                              (line 1472)
  * __satfractdqda:                        Fixed-point fractional library routines.
!                                                              (line 1105)
  * __satfractdqha:                        Fixed-point fractional library routines.
!                                                              (line 1103)
  * __satfractdqhq2:                       Fixed-point fractional library routines.
!                                                              (line 1101)
  * __satfractdqqq2:                       Fixed-point fractional library routines.
!                                                              (line 1100)
  * __satfractdqsa:                        Fixed-point fractional library routines.
!                                                              (line 1104)
  * __satfractdqsq2:                       Fixed-point fractional library routines.
!                                                              (line 1102)
  * __satfractdqta:                        Fixed-point fractional library routines.
!                                                              (line 1106)
  * __satfractdquda:                       Fixed-point fractional library routines.
!                                                              (line 1117)
  * __satfractdqudq:                       Fixed-point fractional library routines.
!                                                              (line 1112)
  * __satfractdquha:                       Fixed-point fractional library routines.
!                                                              (line 1114)
  * __satfractdquhq:                       Fixed-point fractional library routines.
!                                                              (line 1109)
  * __satfractdquqq:                       Fixed-point fractional library routines.
!                                                              (line 1107)
  * __satfractdqusa:                       Fixed-point fractional library routines.
!                                                              (line 1116)
  * __satfractdqusq:                       Fixed-point fractional library routines.
!                                                              (line 1110)
  * __satfractdquta:                       Fixed-point fractional library routines.
!                                                              (line 1119)
  * __satfracthada2:                       Fixed-point fractional library routines.
!                                                              (line 1126)
  * __satfracthadq:                        Fixed-point fractional library routines.
!                                                              (line 1124)
  * __satfracthahq:                        Fixed-point fractional library routines.
!                                                              (line 1122)
  * __satfracthaqq:                        Fixed-point fractional library routines.
!                                                              (line 1121)
  * __satfracthasa2:                       Fixed-point fractional library routines.
!                                                              (line 1125)
  * __satfracthasq:                        Fixed-point fractional library routines.
!                                                              (line 1123)
  * __satfracthata2:                       Fixed-point fractional library routines.
!                                                              (line 1127)
  * __satfracthauda:                       Fixed-point fractional library routines.
!                                                              (line 1138)
  * __satfracthaudq:                       Fixed-point fractional library routines.
!                                                              (line 1133)
  * __satfracthauha:                       Fixed-point fractional library routines.
!                                                              (line 1135)
  * __satfracthauhq:                       Fixed-point fractional library routines.
!                                                              (line 1130)
  * __satfracthauqq:                       Fixed-point fractional library routines.
!                                                              (line 1128)
  * __satfracthausa:                       Fixed-point fractional library routines.
!                                                              (line 1137)
  * __satfracthausq:                       Fixed-point fractional library routines.
!                                                              (line 1131)
  * __satfracthauta:                       Fixed-point fractional library routines.
!                                                              (line 1140)
  * __satfracthida:                        Fixed-point fractional library routines.
!                                                              (line 1431)
  * __satfracthidq:                        Fixed-point fractional library routines.
!                                                              (line 1428)
  * __satfracthiha:                        Fixed-point fractional library routines.
!                                                              (line 1429)
  * __satfracthihq:                        Fixed-point fractional library routines.
!                                                              (line 1426)
  * __satfracthiqq:                        Fixed-point fractional library routines.
!                                                              (line 1425)
  * __satfracthisa:                        Fixed-point fractional library routines.
!                                                              (line 1430)
  * __satfracthisq:                        Fixed-point fractional library routines.
!                                                              (line 1427)
  * __satfracthita:                        Fixed-point fractional library routines.
!                                                              (line 1432)
  * __satfracthiuda:                       Fixed-point fractional library routines.
!                                                              (line 1439)
  * __satfracthiudq:                       Fixed-point fractional library routines.
!                                                              (line 1436)
  * __satfracthiuha:                       Fixed-point fractional library routines.
!                                                              (line 1437)
  * __satfracthiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1434)
  * __satfracthiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1433)
  * __satfracthiusa:                       Fixed-point fractional library routines.
!                                                              (line 1438)
  * __satfracthiusq:                       Fixed-point fractional library routines.
!                                                              (line 1435)
  * __satfracthiuta:                       Fixed-point fractional library routines.
!                                                              (line 1440)
  * __satfracthqda:                        Fixed-point fractional library routines.
!                                                              (line 1071)
  * __satfracthqdq2:                       Fixed-point fractional library routines.
!                                                              (line 1068)
  * __satfracthqha:                        Fixed-point fractional library routines.
!                                                              (line 1069)
  * __satfracthqqq2:                       Fixed-point fractional library routines.
!                                                              (line 1066)
  * __satfracthqsa:                        Fixed-point fractional library routines.
!                                                              (line 1070)
  * __satfracthqsq2:                       Fixed-point fractional library routines.
!                                                              (line 1067)
  * __satfracthqta:                        Fixed-point fractional library routines.
!                                                              (line 1072)
  * __satfracthquda:                       Fixed-point fractional library routines.
!                                                              (line 1079)
  * __satfracthqudq:                       Fixed-point fractional library routines.
!                                                              (line 1076)
  * __satfracthquha:                       Fixed-point fractional library routines.
!                                                              (line 1077)
  * __satfracthquhq:                       Fixed-point fractional library routines.
!                                                              (line 1074)
  * __satfracthquqq:                       Fixed-point fractional library routines.
!                                                              (line 1073)
  * __satfracthqusa:                       Fixed-point fractional library routines.
!                                                              (line 1078)
  * __satfracthqusq:                       Fixed-point fractional library routines.
!                                                              (line 1075)
  * __satfracthquta:                       Fixed-point fractional library routines.
!                                                              (line 1080)
  * __satfractqida:                        Fixed-point fractional library routines.
!                                                              (line 1409)
  * __satfractqidq:                        Fixed-point fractional library routines.
!                                                              (line 1406)
  * __satfractqiha:                        Fixed-point fractional library routines.
!                                                              (line 1407)
  * __satfractqihq:                        Fixed-point fractional library routines.
!                                                              (line 1404)
  * __satfractqiqq:                        Fixed-point fractional library routines.
!                                                              (line 1403)
  * __satfractqisa:                        Fixed-point fractional library routines.
!                                                              (line 1408)
  * __satfractqisq:                        Fixed-point fractional library routines.
!                                                              (line 1405)
  * __satfractqita:                        Fixed-point fractional library routines.
!                                                              (line 1410)
  * __satfractqiuda:                       Fixed-point fractional library routines.
!                                                              (line 1421)
  * __satfractqiudq:                       Fixed-point fractional library routines.
!                                                              (line 1416)
  * __satfractqiuha:                       Fixed-point fractional library routines.
!                                                              (line 1418)
  * __satfractqiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1413)
  * __satfractqiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1411)
  * __satfractqiusa:                       Fixed-point fractional library routines.
!                                                              (line 1420)
  * __satfractqiusq:                       Fixed-point fractional library routines.
!                                                              (line 1414)
  * __satfractqiuta:                       Fixed-point fractional library routines.
!                                                              (line 1423)
  * __satfractqqda:                        Fixed-point fractional library routines.
!                                                              (line 1050)
  * __satfractqqdq2:                       Fixed-point fractional library routines.
!                                                              (line 1047)
  * __satfractqqha:                        Fixed-point fractional library routines.
!                                                              (line 1048)
  * __satfractqqhq2:                       Fixed-point fractional library routines.
!                                                              (line 1045)
  * __satfractqqsa:                        Fixed-point fractional library routines.
!                                                              (line 1049)
  * __satfractqqsq2:                       Fixed-point fractional library routines.
!                                                              (line 1046)
  * __satfractqqta:                        Fixed-point fractional library routines.
!                                                              (line 1051)
  * __satfractqquda:                       Fixed-point fractional library routines.
!                                                              (line 1062)
  * __satfractqqudq:                       Fixed-point fractional library routines.
!                                                              (line 1057)
  * __satfractqquha:                       Fixed-point fractional library routines.
!                                                              (line 1059)
  * __satfractqquhq:                       Fixed-point fractional library routines.
!                                                              (line 1054)
  * __satfractqquqq:                       Fixed-point fractional library routines.
!                                                              (line 1052)
  * __satfractqqusa:                       Fixed-point fractional library routines.
!                                                              (line 1061)
  * __satfractqqusq:                       Fixed-point fractional library routines.
!                                                              (line 1055)
  * __satfractqquta:                       Fixed-point fractional library routines.
!                                                              (line 1064)
  * __satfractsada2:                       Fixed-point fractional library routines.
!                                                              (line 1147)
  * __satfractsadq:                        Fixed-point fractional library routines.
!                                                              (line 1145)
  * __satfractsaha2:                       Fixed-point fractional library routines.
!                                                              (line 1146)
  * __satfractsahq:                        Fixed-point fractional library routines.
!                                                              (line 1143)
  * __satfractsaqq:                        Fixed-point fractional library routines.
!                                                              (line 1142)
  * __satfractsasq:                        Fixed-point fractional library routines.
!                                                              (line 1144)
  * __satfractsata2:                       Fixed-point fractional library routines.
!                                                              (line 1148)
  * __satfractsauda:                       Fixed-point fractional library routines.
!                                                              (line 1155)
  * __satfractsaudq:                       Fixed-point fractional library routines.
!                                                              (line 1152)
  * __satfractsauha:                       Fixed-point fractional library routines.
!                                                              (line 1153)
  * __satfractsauhq:                       Fixed-point fractional library routines.
!                                                              (line 1150)
  * __satfractsauqq:                       Fixed-point fractional library routines.
!                                                              (line 1149)
  * __satfractsausa:                       Fixed-point fractional library routines.
!                                                              (line 1154)
  * __satfractsausq:                       Fixed-point fractional library routines.
!                                                              (line 1151)
  * __satfractsauta:                       Fixed-point fractional library routines.
!                                                              (line 1156)
  * __satfractsfda:                        Fixed-point fractional library routines.
!                                                              (line 1497)
  * __satfractsfdq:                        Fixed-point fractional library routines.
!                                                              (line 1494)
  * __satfractsfha:                        Fixed-point fractional library routines.
!                                                              (line 1495)
  * __satfractsfhq:                        Fixed-point fractional library routines.
!                                                              (line 1492)
  * __satfractsfqq:                        Fixed-point fractional library routines.
!                                                              (line 1491)
  * __satfractsfsa:                        Fixed-point fractional library routines.
!                                                              (line 1496)
  * __satfractsfsq:                        Fixed-point fractional library routines.
!                                                              (line 1493)
  * __satfractsfta:                        Fixed-point fractional library routines.
!                                                              (line 1498)
  * __satfractsfuda:                       Fixed-point fractional library routines.
!                                                              (line 1505)
  * __satfractsfudq:                       Fixed-point fractional library routines.
!                                                              (line 1502)
  * __satfractsfuha:                       Fixed-point fractional library routines.
!                                                              (line 1503)
  * __satfractsfuhq:                       Fixed-point fractional library routines.
!                                                              (line 1500)
  * __satfractsfuqq:                       Fixed-point fractional library routines.
!                                                              (line 1499)
  * __satfractsfusa:                       Fixed-point fractional library routines.
!                                                              (line 1504)
  * __satfractsfusq:                       Fixed-point fractional library routines.
!                                                              (line 1501)
  * __satfractsfuta:                       Fixed-point fractional library routines.
!                                                              (line 1506)
  * __satfractsida:                        Fixed-point fractional library routines.
!                                                              (line 1447)
  * __satfractsidq:                        Fixed-point fractional library routines.
!                                                              (line 1444)
  * __satfractsiha:                        Fixed-point fractional library routines.
!                                                              (line 1445)
  * __satfractsihq:                        Fixed-point fractional library routines.
!                                                              (line 1442)
  * __satfractsiqq:                        Fixed-point fractional library routines.
!                                                              (line 1441)
  * __satfractsisa:                        Fixed-point fractional library routines.
!                                                              (line 1446)
  * __satfractsisq:                        Fixed-point fractional library routines.
!                                                              (line 1443)
  * __satfractsita:                        Fixed-point fractional library routines.
!                                                              (line 1448)
  * __satfractsiuda:                       Fixed-point fractional library routines.
!                                                              (line 1455)
  * __satfractsiudq:                       Fixed-point fractional library routines.
!                                                              (line 1452)
  * __satfractsiuha:                       Fixed-point fractional library routines.
!                                                              (line 1453)
  * __satfractsiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1450)
  * __satfractsiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1449)
  * __satfractsiusa:                       Fixed-point fractional library routines.
!                                                              (line 1454)
  * __satfractsiusq:                       Fixed-point fractional library routines.
!                                                              (line 1451)
  * __satfractsiuta:                       Fixed-point fractional library routines.
!                                                              (line 1456)
  * __satfractsqda:                        Fixed-point fractional library routines.
!                                                              (line 1086)
  * __satfractsqdq2:                       Fixed-point fractional library routines.
!                                                              (line 1083)
  * __satfractsqha:                        Fixed-point fractional library routines.
!                                                              (line 1084)
  * __satfractsqhq2:                       Fixed-point fractional library routines.
!                                                              (line 1082)
  * __satfractsqqq2:                       Fixed-point fractional library routines.
!                                                              (line 1081)
  * __satfractsqsa:                        Fixed-point fractional library routines.
!                                                              (line 1085)
  * __satfractsqta:                        Fixed-point fractional library routines.
!                                                              (line 1087)
  * __satfractsquda:                       Fixed-point fractional library routines.
!                                                              (line 1097)
  * __satfractsqudq:                       Fixed-point fractional library routines.
!                                                              (line 1092)
  * __satfractsquha:                       Fixed-point fractional library routines.
!                                                              (line 1094)
  * __satfractsquhq:                       Fixed-point fractional library routines.
!                                                              (line 1090)
  * __satfractsquqq:                       Fixed-point fractional library routines.
!                                                              (line 1088)
  * __satfractsqusa:                       Fixed-point fractional library routines.
!                                                              (line 1096)
  * __satfractsqusq:                       Fixed-point fractional library routines.
!                                                              (line 1091)
  * __satfractsquta:                       Fixed-point fractional library routines.
!                                                              (line 1098)
  * __satfracttada2:                       Fixed-point fractional library routines.
!                                                              (line 1182)
  * __satfracttadq:                        Fixed-point fractional library routines.
!                                                              (line 1179)
  * __satfracttaha2:                       Fixed-point fractional library routines.
!                                                              (line 1180)
  * __satfracttahq:                        Fixed-point fractional library routines.
!                                                              (line 1177)
  * __satfracttaqq:                        Fixed-point fractional library routines.
!                                                              (line 1176)
  * __satfracttasa2:                       Fixed-point fractional library routines.
!                                                              (line 1181)
  * __satfracttasq:                        Fixed-point fractional library routines.
!                                                              (line 1178)
  * __satfracttauda:                       Fixed-point fractional library routines.
!                                                              (line 1193)
  * __satfracttaudq:                       Fixed-point fractional library routines.
!                                                              (line 1188)
  * __satfracttauha:                       Fixed-point fractional library routines.
!                                                              (line 1190)
  * __satfracttauhq:                       Fixed-point fractional library routines.
!                                                              (line 1185)
  * __satfracttauqq:                       Fixed-point fractional library routines.
!                                                              (line 1183)
  * __satfracttausa:                       Fixed-point fractional library routines.
!                                                              (line 1192)
  * __satfracttausq:                       Fixed-point fractional library routines.
!                                                              (line 1186)
  * __satfracttauta:                       Fixed-point fractional library routines.
!                                                              (line 1195)
  * __satfracttida:                        Fixed-point fractional library routines.
!                                                              (line 1479)
  * __satfracttidq:                        Fixed-point fractional library routines.
!                                                              (line 1476)
  * __satfracttiha:                        Fixed-point fractional library routines.
!                                                              (line 1477)
  * __satfracttihq:                        Fixed-point fractional library routines.
!                                                              (line 1474)
  * __satfracttiqq:                        Fixed-point fractional library routines.
!                                                              (line 1473)
  * __satfracttisa:                        Fixed-point fractional library routines.
!                                                              (line 1478)
  * __satfracttisq:                        Fixed-point fractional library routines.
!                                                              (line 1475)
  * __satfracttita:                        Fixed-point fractional library routines.
!                                                              (line 1480)
  * __satfracttiuda:                       Fixed-point fractional library routines.
!                                                              (line 1488)
  * __satfracttiudq:                       Fixed-point fractional library routines.
!                                                              (line 1484)
  * __satfracttiuha:                       Fixed-point fractional library routines.
!                                                              (line 1486)
  * __satfracttiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1482)
  * __satfracttiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1481)
  * __satfracttiusa:                       Fixed-point fractional library routines.
!                                                              (line 1487)
  * __satfracttiusq:                       Fixed-point fractional library routines.
!                                                              (line 1483)
  * __satfracttiuta:                       Fixed-point fractional library routines.
!                                                              (line 1489)
  * __satfractudada:                       Fixed-point fractional library routines.
!                                                              (line 1358)
  * __satfractudadq:                       Fixed-point fractional library routines.
!                                                              (line 1353)
  * __satfractudaha:                       Fixed-point fractional library routines.
!                                                              (line 1355)
  * __satfractudahq:                       Fixed-point fractional library routines.
!                                                              (line 1351)
  * __satfractudaqq:                       Fixed-point fractional library routines.
!                                                              (line 1349)
  * __satfractudasa:                       Fixed-point fractional library routines.
!                                                              (line 1357)
  * __satfractudasq:                       Fixed-point fractional library routines.
!                                                              (line 1352)
  * __satfractudata:                       Fixed-point fractional library routines.
!                                                              (line 1359)
  * __satfractudaudq:                      Fixed-point fractional library routines.
!                                                              (line 1367)
  * __satfractudauha2:                     Fixed-point fractional library routines.
!                                                              (line 1369)
  * __satfractudauhq:                      Fixed-point fractional library routines.
!                                                              (line 1363)
  * __satfractudauqq:                      Fixed-point fractional library routines.
!                                                              (line 1361)
  * __satfractudausa2:                     Fixed-point fractional library routines.
!                                                              (line 1371)
  * __satfractudausq:                      Fixed-point fractional library routines.
!                                                              (line 1365)
  * __satfractudauta2:                     Fixed-point fractional library routines.
!                                                              (line 1373)
  * __satfractudqda:                       Fixed-point fractional library routines.
!                                                              (line 1282)
  * __satfractudqdq:                       Fixed-point fractional library routines.
!                                                              (line 1277)
  * __satfractudqha:                       Fixed-point fractional library routines.
!                                                              (line 1279)
  * __satfractudqhq:                       Fixed-point fractional library routines.
!                                                              (line 1274)
  * __satfractudqqq:                       Fixed-point fractional library routines.
!                                                              (line 1272)
  * __satfractudqsa:                       Fixed-point fractional library routines.
!                                                              (line 1281)
  * __satfractudqsq:                       Fixed-point fractional library routines.
!                                                              (line 1275)
  * __satfractudqta:                       Fixed-point fractional library routines.
!                                                              (line 1284)
  * __satfractudquda:                      Fixed-point fractional library routines.
!                                                              (line 1296)
  * __satfractudquha:                      Fixed-point fractional library routines.
!                                                              (line 1292)
  * __satfractudquhq2:                     Fixed-point fractional library routines.
!                                                              (line 1288)
  * __satfractudquqq2:                     Fixed-point fractional library routines.
!                                                              (line 1286)
  * __satfractudqusa:                      Fixed-point fractional library routines.
!                                                              (line 1294)
  * __satfractudqusq2:                     Fixed-point fractional library routines.
!                                                              (line 1290)
  * __satfractudquta:                      Fixed-point fractional library routines.
!                                                              (line 1298)
  * __satfractuhada:                       Fixed-point fractional library routines.
!                                                              (line 1310)
  * __satfractuhadq:                       Fixed-point fractional library routines.
!                                                              (line 1305)
  * __satfractuhaha:                       Fixed-point fractional library routines.
!                                                              (line 1307)
  * __satfractuhahq:                       Fixed-point fractional library routines.
!                                                              (line 1302)
  * __satfractuhaqq:                       Fixed-point fractional library routines.
!                                                              (line 1300)
  * __satfractuhasa:                       Fixed-point fractional library routines.
!                                                              (line 1309)
  * __satfractuhasq:                       Fixed-point fractional library routines.
!                                                              (line 1303)
  * __satfractuhata:                       Fixed-point fractional library routines.
!                                                              (line 1312)
  * __satfractuhauda2:                     Fixed-point fractional library routines.
!                                                              (line 1324)
  * __satfractuhaudq:                      Fixed-point fractional library routines.
!                                                              (line 1320)
  * __satfractuhauhq:                      Fixed-point fractional library routines.
!                                                              (line 1316)
  * __satfractuhauqq:                      Fixed-point fractional library routines.
!                                                              (line 1314)
  * __satfractuhausa2:                     Fixed-point fractional library routines.
!                                                              (line 1322)
  * __satfractuhausq:                      Fixed-point fractional library routines.
!                                                              (line 1318)
  * __satfractuhauta2:                     Fixed-point fractional library routines.
!                                                              (line 1326)
  * __satfractuhqda:                       Fixed-point fractional library routines.
!                                                              (line 1231)
  * __satfractuhqdq:                       Fixed-point fractional library routines.
!                                                              (line 1228)
  * __satfractuhqha:                       Fixed-point fractional library routines.
!                                                              (line 1229)
  * __satfractuhqhq:                       Fixed-point fractional library routines.
!                                                              (line 1226)
  * __satfractuhqqq:                       Fixed-point fractional library routines.
!                                                              (line 1225)
  * __satfractuhqsa:                       Fixed-point fractional library routines.
!                                                              (line 1230)
  * __satfractuhqsq:                       Fixed-point fractional library routines.
!                                                              (line 1227)
  * __satfractuhqta:                       Fixed-point fractional library routines.
!                                                              (line 1232)
  * __satfractuhquda:                      Fixed-point fractional library routines.
!                                                              (line 1242)
  * __satfractuhqudq2:                     Fixed-point fractional library routines.
!                                                              (line 1237)
  * __satfractuhquha:                      Fixed-point fractional library routines.
!                                                              (line 1239)
  * __satfractuhquqq2:                     Fixed-point fractional library routines.
!                                                              (line 1233)
  * __satfractuhqusa:                      Fixed-point fractional library routines.
!                                                              (line 1241)
  * __satfractuhqusq2:                     Fixed-point fractional library routines.
!                                                              (line 1235)
  * __satfractuhquta:                      Fixed-point fractional library routines.
!                                                              (line 1244)
  * __satfractunsdida:                     Fixed-point fractional library routines.
!                                                              (line 1841)
  * __satfractunsdidq:                     Fixed-point fractional library routines.
!                                                              (line 1837)
  * __satfractunsdiha:                     Fixed-point fractional library routines.
!                                                              (line 1839)
  * __satfractunsdihq:                     Fixed-point fractional library routines.
!                                                              (line 1835)
  * __satfractunsdiqq:                     Fixed-point fractional library routines.
!                                                              (line 1834)
  * __satfractunsdisa:                     Fixed-point fractional library routines.
!                                                              (line 1840)
  * __satfractunsdisq:                     Fixed-point fractional library routines.
!                                                              (line 1836)
  * __satfractunsdita:                     Fixed-point fractional library routines.
!                                                              (line 1842)
  * __satfractunsdiuda:                    Fixed-point fractional library routines.
!                                                              (line 1856)
  * __satfractunsdiudq:                    Fixed-point fractional library routines.
!                                                              (line 1850)
  * __satfractunsdiuha:                    Fixed-point fractional library routines.
!                                                              (line 1852)
  * __satfractunsdiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1846)
  * __satfractunsdiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1844)
  * __satfractunsdiusa:                    Fixed-point fractional library routines.
!                                                              (line 1854)
  * __satfractunsdiusq:                    Fixed-point fractional library routines.
!                                                              (line 1848)
  * __satfractunsdiuta:                    Fixed-point fractional library routines.
!                                                              (line 1858)
  * __satfractunshida:                     Fixed-point fractional library routines.
!                                                              (line 1793)
  * __satfractunshidq:                     Fixed-point fractional library routines.
!                                                              (line 1789)
  * __satfractunshiha:                     Fixed-point fractional library routines.
!                                                              (line 1791)
  * __satfractunshihq:                     Fixed-point fractional library routines.
!                                                              (line 1787)
  * __satfractunshiqq:                     Fixed-point fractional library routines.
!                                                              (line 1786)
  * __satfractunshisa:                     Fixed-point fractional library routines.
!                                                              (line 1792)
  * __satfractunshisq:                     Fixed-point fractional library routines.
!                                                              (line 1788)
  * __satfractunshita:                     Fixed-point fractional library routines.
!                                                              (line 1794)
  * __satfractunshiuda:                    Fixed-point fractional library routines.
!                                                              (line 1808)
  * __satfractunshiudq:                    Fixed-point fractional library routines.
!                                                              (line 1802)
  * __satfractunshiuha:                    Fixed-point fractional library routines.
!                                                              (line 1804)
  * __satfractunshiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1798)
  * __satfractunshiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1796)
  * __satfractunshiusa:                    Fixed-point fractional library routines.
!                                                              (line 1806)
  * __satfractunshiusq:                    Fixed-point fractional library routines.
!                                                              (line 1800)
  * __satfractunshiuta:                    Fixed-point fractional library routines.
!                                                              (line 1810)
  * __satfractunsqida:                     Fixed-point fractional library routines.
!                                                              (line 1767)
  * __satfractunsqidq:                     Fixed-point fractional library routines.
!                                                              (line 1763)
  * __satfractunsqiha:                     Fixed-point fractional library routines.
!                                                              (line 1765)
  * __satfractunsqihq:                     Fixed-point fractional library routines.
!                                                              (line 1761)
  * __satfractunsqiqq:                     Fixed-point fractional library routines.
!                                                              (line 1760)
  * __satfractunsqisa:                     Fixed-point fractional library routines.
!                                                              (line 1766)
  * __satfractunsqisq:                     Fixed-point fractional library routines.
!                                                              (line 1762)
  * __satfractunsqita:                     Fixed-point fractional library routines.
!                                                              (line 1768)
  * __satfractunsqiuda:                    Fixed-point fractional library routines.
!                                                              (line 1782)
  * __satfractunsqiudq:                    Fixed-point fractional library routines.
!                                                              (line 1776)
  * __satfractunsqiuha:                    Fixed-point fractional library routines.
!                                                              (line 1778)
  * __satfractunsqiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1772)
  * __satfractunsqiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1770)
  * __satfractunsqiusa:                    Fixed-point fractional library routines.
!                                                              (line 1780)
  * __satfractunsqiusq:                    Fixed-point fractional library routines.
!                                                              (line 1774)
  * __satfractunsqiuta:                    Fixed-point fractional library routines.
!                                                              (line 1784)
  * __satfractunssida:                     Fixed-point fractional library routines.
!                                                              (line 1818)
  * __satfractunssidq:                     Fixed-point fractional library routines.
!                                                              (line 1815)
  * __satfractunssiha:                     Fixed-point fractional library routines.
!                                                              (line 1816)
  * __satfractunssihq:                     Fixed-point fractional library routines.
!                                                              (line 1813)
  * __satfractunssiqq:                     Fixed-point fractional library routines.
!                                                              (line 1812)
  * __satfractunssisa:                     Fixed-point fractional library routines.
!                                                              (line 1817)
  * __satfractunssisq:                     Fixed-point fractional library routines.
!                                                              (line 1814)
  * __satfractunssita:                     Fixed-point fractional library routines.
!                                                              (line 1819)
  * __satfractunssiuda:                    Fixed-point fractional library routines.
!                                                              (line 1830)
  * __satfractunssiudq:                    Fixed-point fractional library routines.
!                                                              (line 1825)
  * __satfractunssiuha:                    Fixed-point fractional library routines.
!                                                              (line 1827)
  * __satfractunssiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1822)
  * __satfractunssiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1820)
  * __satfractunssiusa:                    Fixed-point fractional library routines.
!                                                              (line 1829)
  * __satfractunssiusq:                    Fixed-point fractional library routines.
!                                                              (line 1823)
  * __satfractunssiuta:                    Fixed-point fractional library routines.
!                                                              (line 1832)
  * __satfractunstida:                     Fixed-point fractional library routines.
!                                                              (line 1870)
  * __satfractunstidq:                     Fixed-point fractional library routines.
!                                                              (line 1865)
  * __satfractunstiha:                     Fixed-point fractional library routines.
!                                                              (line 1867)
  * __satfractunstihq:                     Fixed-point fractional library routines.
!                                                              (line 1862)
  * __satfractunstiqq:                     Fixed-point fractional library routines.
!                                                              (line 1860)
  * __satfractunstisa:                     Fixed-point fractional library routines.
!                                                              (line 1869)
  * __satfractunstisq:                     Fixed-point fractional library routines.
!                                                              (line 1863)
  * __satfractunstita:                     Fixed-point fractional library routines.
!                                                              (line 1872)
  * __satfractunstiuda:                    Fixed-point fractional library routines.
!                                                              (line 1886)
  * __satfractunstiudq:                    Fixed-point fractional library routines.
!                                                              (line 1880)
  * __satfractunstiuha:                    Fixed-point fractional library routines.
!                                                              (line 1882)
  * __satfractunstiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1876)
  * __satfractunstiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1874)
  * __satfractunstiusa:                    Fixed-point fractional library routines.
!                                                              (line 1884)
  * __satfractunstiusq:                    Fixed-point fractional library routines.
!                                                              (line 1878)
  * __satfractunstiuta:                    Fixed-point fractional library routines.
!                                                              (line 1888)
  * __satfractuqqda:                       Fixed-point fractional library routines.
!                                                              (line 1207)
  * __satfractuqqdq:                       Fixed-point fractional library routines.
!                                                              (line 1202)
  * __satfractuqqha:                       Fixed-point fractional library routines.
!                                                              (line 1204)
  * __satfractuqqhq:                       Fixed-point fractional library routines.
!                                                              (line 1199)
  * __satfractuqqqq:                       Fixed-point fractional library routines.
!                                                              (line 1197)
  * __satfractuqqsa:                       Fixed-point fractional library routines.
!                                                              (line 1206)
  * __satfractuqqsq:                       Fixed-point fractional library routines.
!                                                              (line 1200)
  * __satfractuqqta:                       Fixed-point fractional library routines.
!                                                              (line 1209)
  * __satfractuqquda:                      Fixed-point fractional library routines.
!                                                              (line 1221)
  * __satfractuqqudq2:                     Fixed-point fractional library routines.
!                                                              (line 1215)
  * __satfractuqquha:                      Fixed-point fractional library routines.
!                                                              (line 1217)
  * __satfractuqquhq2:                     Fixed-point fractional library routines.
!                                                              (line 1211)
  * __satfractuqqusa:                      Fixed-point fractional library routines.
!                                                              (line 1219)
  * __satfractuqqusq2:                     Fixed-point fractional library routines.
!                                                              (line 1213)
  * __satfractuqquta:                      Fixed-point fractional library routines.
!                                                              (line 1223)
  * __satfractusada:                       Fixed-point fractional library routines.
!                                                              (line 1334)
  * __satfractusadq:                       Fixed-point fractional library routines.
!                                                              (line 1331)
  * __satfractusaha:                       Fixed-point fractional library routines.
!                                                              (line 1332)
  * __satfractusahq:                       Fixed-point fractional library routines.
!                                                              (line 1329)
  * __satfractusaqq:                       Fixed-point fractional library routines.
!                                                              (line 1328)
  * __satfractusasa:                       Fixed-point fractional library routines.
!                                                              (line 1333)
  * __satfractusasq:                       Fixed-point fractional library routines.
!                                                              (line 1330)
  * __satfractusata:                       Fixed-point fractional library routines.
!                                                              (line 1335)
  * __satfractusauda2:                     Fixed-point fractional library routines.
!                                                              (line 1345)
  * __satfractusaudq:                      Fixed-point fractional library routines.
!                                                              (line 1341)
  * __satfractusauha2:                     Fixed-point fractional library routines.
!                                                              (line 1343)
  * __satfractusauhq:                      Fixed-point fractional library routines.
!                                                              (line 1338)
  * __satfractusauqq:                      Fixed-point fractional library routines.
!                                                              (line 1336)
  * __satfractusausq:                      Fixed-point fractional library routines.
!                                                              (line 1339)
  * __satfractusauta2:                     Fixed-point fractional library routines.
!                                                              (line 1347)
  * __satfractusqda:                       Fixed-point fractional library routines.
!                                                              (line 1255)
  * __satfractusqdq:                       Fixed-point fractional library routines.
!                                                              (line 1250)
  * __satfractusqha:                       Fixed-point fractional library routines.
!                                                              (line 1252)
  * __satfractusqhq:                       Fixed-point fractional library routines.
!                                                              (line 1248)
  * __satfractusqqq:                       Fixed-point fractional library routines.
!                                                              (line 1246)
  * __satfractusqsa:                       Fixed-point fractional library routines.
!                                                              (line 1254)
  * __satfractusqsq:                       Fixed-point fractional library routines.
!                                                              (line 1249)
  * __satfractusqta:                       Fixed-point fractional library routines.
!                                                              (line 1256)
  * __satfractusquda:                      Fixed-point fractional library routines.
!                                                              (line 1268)
  * __satfractusqudq2:                     Fixed-point fractional library routines.
!                                                              (line 1262)
  * __satfractusquha:                      Fixed-point fractional library routines.
!                                                              (line 1264)
  * __satfractusquhq2:                     Fixed-point fractional library routines.
!                                                              (line 1260)
  * __satfractusquqq2:                     Fixed-point fractional library routines.
!                                                              (line 1258)
  * __satfractusqusa:                      Fixed-point fractional library routines.
!                                                              (line 1266)
  * __satfractusquta:                      Fixed-point fractional library routines.
!                                                              (line 1270)
  * __satfractutada:                       Fixed-point fractional library routines.
!                                                              (line 1385)
  * __satfractutadq:                       Fixed-point fractional library routines.
!                                                              (line 1380)
  * __satfractutaha:                       Fixed-point fractional library routines.
!                                                              (line 1382)
  * __satfractutahq:                       Fixed-point fractional library routines.
!                                                              (line 1377)
  * __satfractutaqq:                       Fixed-point fractional library routines.
!                                                              (line 1375)
  * __satfractutasa:                       Fixed-point fractional library routines.
!                                                              (line 1384)
  * __satfractutasq:                       Fixed-point fractional library routines.
!                                                              (line 1378)
  * __satfractutata:                       Fixed-point fractional library routines.
!                                                              (line 1387)
  * __satfractutauda2:                     Fixed-point fractional library routines.
!                                                              (line 1401)
  * __satfractutaudq:                      Fixed-point fractional library routines.
!                                                              (line 1395)
  * __satfractutauha2:                     Fixed-point fractional library routines.
!                                                              (line 1397)
  * __satfractutauhq:                      Fixed-point fractional library routines.
!                                                              (line 1391)
  * __satfractutauqq:                      Fixed-point fractional library routines.
!                                                              (line 1389)
  * __satfractutausa2:                     Fixed-point fractional library routines.
!                                                              (line 1399)
  * __satfractutausq:                      Fixed-point fractional library routines.
!                                                              (line 1393)
  * __splitstack_find:                     Miscellaneous routines.
                                                               (line   15)
  * __ssaddda3:                            Fixed-point fractional library routines.
!                                                              (line   74)
  * __ssadddq3:                            Fixed-point fractional library routines.
!                                                              (line   69)
  * __ssaddha3:                            Fixed-point fractional library routines.
!                                                              (line   71)
  * __ssaddhq3:                            Fixed-point fractional library routines.
!                                                              (line   67)
  * __ssaddqq3:                            Fixed-point fractional library routines.
!                                                              (line   65)
  * __ssaddsa3:                            Fixed-point fractional library routines.
!                                                              (line   73)
  * __ssaddsq3:                            Fixed-point fractional library routines.
!                                                              (line   68)
  * __ssaddta3:                            Fixed-point fractional library routines.
!                                                              (line   75)
  * __ssashlda3:                           Fixed-point fractional library routines.
!                                                              (line  409)
  * __ssashldq3:                           Fixed-point fractional library routines.
!                                                              (line  405)
  * __ssashlha3:                           Fixed-point fractional library routines.
!                                                              (line  407)
  * __ssashlhq3:                           Fixed-point fractional library routines.
!                                                              (line  403)
  * __ssashlsa3:                           Fixed-point fractional library routines.
!                                                              (line  408)
  * __ssashlsq3:                           Fixed-point fractional library routines.
!                                                              (line  404)
  * __ssashlta3:                           Fixed-point fractional library routines.
!                                                              (line  410)
  * __ssdivda3:                            Fixed-point fractional library routines.
!                                                              (line  268)
  * __ssdivdq3:                            Fixed-point fractional library routines.
!                                                              (line  263)
  * __ssdivha3:                            Fixed-point fractional library routines.
!                                                              (line  265)
  * __ssdivhq3:                            Fixed-point fractional library routines.
!                                                              (line  261)
  * __ssdivqq3:                            Fixed-point fractional library routines.
!                                                              (line  259)
  * __ssdivsa3:                            Fixed-point fractional library routines.
!                                                              (line  267)
  * __ssdivsq3:                            Fixed-point fractional library routines.
!                                                              (line  262)
  * __ssdivta3:                            Fixed-point fractional library routines.
!                                                              (line  269)
  * __ssmulda3:                            Fixed-point fractional library routines.
!                                                              (line  200)
  * __ssmuldq3:                            Fixed-point fractional library routines.
!                                                              (line  195)
  * __ssmulha3:                            Fixed-point fractional library routines.
!                                                              (line  197)
  * __ssmulhq3:                            Fixed-point fractional library routines.
!                                                              (line  193)
  * __ssmulqq3:                            Fixed-point fractional library routines.
!                                                              (line  191)
  * __ssmulsa3:                            Fixed-point fractional library routines.
!                                                              (line  199)
  * __ssmulsq3:                            Fixed-point fractional library routines.
!                                                              (line  194)
  * __ssmulta3:                            Fixed-point fractional library routines.
!                                                              (line  201)
  * __ssnegda2:                            Fixed-point fractional library routines.
!                                                              (line  323)
  * __ssnegdq2:                            Fixed-point fractional library routines.
!                                                              (line  320)
  * __ssnegha2:                            Fixed-point fractional library routines.
!                                                              (line  321)
  * __ssneghq2:                            Fixed-point fractional library routines.
!                                                              (line  318)
  * __ssnegqq2:                            Fixed-point fractional library routines.
!                                                              (line  317)
  * __ssnegsa2:                            Fixed-point fractional library routines.
!                                                              (line  322)
  * __ssnegsq2:                            Fixed-point fractional library routines.
!                                                              (line  319)
  * __ssnegta2:                            Fixed-point fractional library routines.
!                                                              (line  324)
  * __sssubda3:                            Fixed-point fractional library routines.
!                                                              (line  136)
  * __sssubdq3:                            Fixed-point fractional library routines.
!                                                              (line  131)
  * __sssubha3:                            Fixed-point fractional library routines.
!                                                              (line  133)
  * __sssubhq3:                            Fixed-point fractional library routines.
!                                                              (line  129)
  * __sssubqq3:                            Fixed-point fractional library routines.
!                                                              (line  127)
  * __sssubsa3:                            Fixed-point fractional library routines.
!                                                              (line  135)
  * __sssubsq3:                            Fixed-point fractional library routines.
!                                                              (line  130)
  * __sssubta3:                            Fixed-point fractional library routines.
!                                                              (line  137)
  * __subda3:                              Fixed-point fractional library routines.
!                                                              (line  114)
  * __subdf3:                              Soft float library routines.
                                                               (line   30)
  * __subdq3:                              Fixed-point fractional library routines.
!                                                              (line  101)
  * __subha3:                              Fixed-point fractional library routines.
!                                                              (line  111)
  * __subhq3:                              Fixed-point fractional library routines.
!                                                              (line   99)
  * __subqq3:                              Fixed-point fractional library routines.
!                                                              (line   97)
  * __subsa3:                              Fixed-point fractional library routines.
!                                                              (line  113)
  * __subsf3:                              Soft float library routines.
                                                               (line   29)
  * __subsq3:                              Fixed-point fractional library routines.
!                                                              (line  100)
  * __subta3:                              Fixed-point fractional library routines.
!                                                              (line  115)
  * __subtf3:                              Soft float library routines.
                                                               (line   31)
  * __subuda3:                             Fixed-point fractional library routines.
!                                                              (line  121)
  * __subudq3:                             Fixed-point fractional library routines.
!                                                              (line  109)
  * __subuha3:                             Fixed-point fractional library routines.
!                                                              (line  117)
  * __subuhq3:                             Fixed-point fractional library routines.
!                                                              (line  105)
  * __subuqq3:                             Fixed-point fractional library routines.
!                                                              (line  103)
  * __subusa3:                             Fixed-point fractional library routines.
!                                                              (line  119)
  * __subusq3:                             Fixed-point fractional library routines.
!                                                              (line  107)
  * __subuta3:                             Fixed-point fractional library routines.
!                                                              (line  123)
  * __subvdi3:                             Integer library routines.
                                                               (line  122)
  * __subvsi3:                             Integer library routines.
--- 52740,53742 ----
  * __powixf2:                             Soft float library routines.
                                                               (line  234)
  * __satfractdadq:                        Fixed-point fractional library routines.
!                                                              (line 1152)
  * __satfractdaha2:                       Fixed-point fractional library routines.
!                                                              (line 1153)
  * __satfractdahq:                        Fixed-point fractional library routines.
!                                                              (line 1150)
  * __satfractdaqq:                        Fixed-point fractional library routines.
!                                                              (line 1149)
  * __satfractdasa2:                       Fixed-point fractional library routines.
!                                                              (line 1154)
  * __satfractdasq:                        Fixed-point fractional library routines.
!                                                              (line 1151)
  * __satfractdata2:                       Fixed-point fractional library routines.
!                                                              (line 1155)
  * __satfractdauda:                       Fixed-point fractional library routines.
!                                                              (line 1165)
  * __satfractdaudq:                       Fixed-point fractional library routines.
!                                                              (line 1160)
  * __satfractdauha:                       Fixed-point fractional library routines.
!                                                              (line 1162)
  * __satfractdauhq:                       Fixed-point fractional library routines.
!                                                              (line 1158)
  * __satfractdauqq:                       Fixed-point fractional library routines.
!                                                              (line 1156)
  * __satfractdausa:                       Fixed-point fractional library routines.
!                                                              (line 1164)
  * __satfractdausq:                       Fixed-point fractional library routines.
!                                                              (line 1159)
  * __satfractdauta:                       Fixed-point fractional library routines.
!                                                              (line 1166)
  * __satfractdfda:                        Fixed-point fractional library routines.
!                                                              (line 1505)
  * __satfractdfdq:                        Fixed-point fractional library routines.
!                                                              (line 1502)
  * __satfractdfha:                        Fixed-point fractional library routines.
!                                                              (line 1503)
  * __satfractdfhq:                        Fixed-point fractional library routines.
!                                                              (line 1500)
  * __satfractdfqq:                        Fixed-point fractional library routines.
!                                                              (line 1499)
  * __satfractdfsa:                        Fixed-point fractional library routines.
!                                                              (line 1504)
  * __satfractdfsq:                        Fixed-point fractional library routines.
!                                                              (line 1501)
  * __satfractdfta:                        Fixed-point fractional library routines.
!                                                              (line 1506)
  * __satfractdfuda:                       Fixed-point fractional library routines.
!                                                              (line 1514)
  * __satfractdfudq:                       Fixed-point fractional library routines.
!                                                              (line 1510)
  * __satfractdfuha:                       Fixed-point fractional library routines.
!                                                              (line 1512)
  * __satfractdfuhq:                       Fixed-point fractional library routines.
!                                                              (line 1508)
  * __satfractdfuqq:                       Fixed-point fractional library routines.
!                                                              (line 1507)
  * __satfractdfusa:                       Fixed-point fractional library routines.
!                                                              (line 1513)
  * __satfractdfusq:                       Fixed-point fractional library routines.
!                                                              (line 1509)
  * __satfractdfuta:                       Fixed-point fractional library routines.
!                                                              (line 1515)
  * __satfractdida:                        Fixed-point fractional library routines.
!                                                              (line 1455)
  * __satfractdidq:                        Fixed-point fractional library routines.
!                                                              (line 1452)
  * __satfractdiha:                        Fixed-point fractional library routines.
!                                                              (line 1453)
  * __satfractdihq:                        Fixed-point fractional library routines.
!                                                              (line 1450)
  * __satfractdiqq:                        Fixed-point fractional library routines.
!                                                              (line 1449)
  * __satfractdisa:                        Fixed-point fractional library routines.
!                                                              (line 1454)
  * __satfractdisq:                        Fixed-point fractional library routines.
!                                                              (line 1451)
  * __satfractdita:                        Fixed-point fractional library routines.
!                                                              (line 1456)
  * __satfractdiuda:                       Fixed-point fractional library routines.
!                                                              (line 1463)
  * __satfractdiudq:                       Fixed-point fractional library routines.
!                                                              (line 1460)
  * __satfractdiuha:                       Fixed-point fractional library routines.
!                                                              (line 1461)
  * __satfractdiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1458)
  * __satfractdiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1457)
  * __satfractdiusa:                       Fixed-point fractional library routines.
!                                                              (line 1462)
  * __satfractdiusq:                       Fixed-point fractional library routines.
!                                                              (line 1459)
  * __satfractdiuta:                       Fixed-point fractional library routines.
!                                                              (line 1464)
  * __satfractdqda:                        Fixed-point fractional library routines.
!                                                              (line 1097)
  * __satfractdqha:                        Fixed-point fractional library routines.
!                                                              (line 1095)
  * __satfractdqhq2:                       Fixed-point fractional library routines.
!                                                              (line 1093)
  * __satfractdqqq2:                       Fixed-point fractional library routines.
!                                                              (line 1092)
  * __satfractdqsa:                        Fixed-point fractional library routines.
!                                                              (line 1096)
  * __satfractdqsq2:                       Fixed-point fractional library routines.
!                                                              (line 1094)
  * __satfractdqta:                        Fixed-point fractional library routines.
!                                                              (line 1098)
  * __satfractdquda:                       Fixed-point fractional library routines.
!                                                              (line 1109)
  * __satfractdqudq:                       Fixed-point fractional library routines.
!                                                              (line 1104)
  * __satfractdquha:                       Fixed-point fractional library routines.
!                                                              (line 1106)
  * __satfractdquhq:                       Fixed-point fractional library routines.
!                                                              (line 1101)
  * __satfractdquqq:                       Fixed-point fractional library routines.
!                                                              (line 1099)
  * __satfractdqusa:                       Fixed-point fractional library routines.
!                                                              (line 1108)
  * __satfractdqusq:                       Fixed-point fractional library routines.
!                                                              (line 1102)
  * __satfractdquta:                       Fixed-point fractional library routines.
!                                                              (line 1111)
  * __satfracthada2:                       Fixed-point fractional library routines.
!                                                              (line 1118)
  * __satfracthadq:                        Fixed-point fractional library routines.
!                                                              (line 1116)
  * __satfracthahq:                        Fixed-point fractional library routines.
!                                                              (line 1114)
  * __satfracthaqq:                        Fixed-point fractional library routines.
!                                                              (line 1113)
  * __satfracthasa2:                       Fixed-point fractional library routines.
!                                                              (line 1117)
  * __satfracthasq:                        Fixed-point fractional library routines.
!                                                              (line 1115)
  * __satfracthata2:                       Fixed-point fractional library routines.
!                                                              (line 1119)
  * __satfracthauda:                       Fixed-point fractional library routines.
!                                                              (line 1130)
  * __satfracthaudq:                       Fixed-point fractional library routines.
!                                                              (line 1125)
  * __satfracthauha:                       Fixed-point fractional library routines.
!                                                              (line 1127)
  * __satfracthauhq:                       Fixed-point fractional library routines.
!                                                              (line 1122)
  * __satfracthauqq:                       Fixed-point fractional library routines.
!                                                              (line 1120)
  * __satfracthausa:                       Fixed-point fractional library routines.
!                                                              (line 1129)
  * __satfracthausq:                       Fixed-point fractional library routines.
!                                                              (line 1123)
  * __satfracthauta:                       Fixed-point fractional library routines.
!                                                              (line 1132)
  * __satfracthida:                        Fixed-point fractional library routines.
!                                                              (line 1423)
  * __satfracthidq:                        Fixed-point fractional library routines.
!                                                              (line 1420)
  * __satfracthiha:                        Fixed-point fractional library routines.
!                                                              (line 1421)
  * __satfracthihq:                        Fixed-point fractional library routines.
!                                                              (line 1418)
  * __satfracthiqq:                        Fixed-point fractional library routines.
!                                                              (line 1417)
  * __satfracthisa:                        Fixed-point fractional library routines.
!                                                              (line 1422)
  * __satfracthisq:                        Fixed-point fractional library routines.
!                                                              (line 1419)
  * __satfracthita:                        Fixed-point fractional library routines.
!                                                              (line 1424)
  * __satfracthiuda:                       Fixed-point fractional library routines.
!                                                              (line 1431)
  * __satfracthiudq:                       Fixed-point fractional library routines.
!                                                              (line 1428)
  * __satfracthiuha:                       Fixed-point fractional library routines.
!                                                              (line 1429)
  * __satfracthiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1426)
  * __satfracthiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1425)
  * __satfracthiusa:                       Fixed-point fractional library routines.
!                                                              (line 1430)
  * __satfracthiusq:                       Fixed-point fractional library routines.
!                                                              (line 1427)
  * __satfracthiuta:                       Fixed-point fractional library routines.
!                                                              (line 1432)
  * __satfracthqda:                        Fixed-point fractional library routines.
!                                                              (line 1063)
  * __satfracthqdq2:                       Fixed-point fractional library routines.
!                                                              (line 1060)
  * __satfracthqha:                        Fixed-point fractional library routines.
!                                                              (line 1061)
  * __satfracthqqq2:                       Fixed-point fractional library routines.
!                                                              (line 1058)
  * __satfracthqsa:                        Fixed-point fractional library routines.
!                                                              (line 1062)
  * __satfracthqsq2:                       Fixed-point fractional library routines.
!                                                              (line 1059)
  * __satfracthqta:                        Fixed-point fractional library routines.
!                                                              (line 1064)
  * __satfracthquda:                       Fixed-point fractional library routines.
!                                                              (line 1071)
  * __satfracthqudq:                       Fixed-point fractional library routines.
!                                                              (line 1068)
  * __satfracthquha:                       Fixed-point fractional library routines.
!                                                              (line 1069)
  * __satfracthquhq:                       Fixed-point fractional library routines.
!                                                              (line 1066)
  * __satfracthquqq:                       Fixed-point fractional library routines.
!                                                              (line 1065)
  * __satfracthqusa:                       Fixed-point fractional library routines.
!                                                              (line 1070)
  * __satfracthqusq:                       Fixed-point fractional library routines.
!                                                              (line 1067)
  * __satfracthquta:                       Fixed-point fractional library routines.
!                                                              (line 1072)
  * __satfractqida:                        Fixed-point fractional library routines.
!                                                              (line 1401)
  * __satfractqidq:                        Fixed-point fractional library routines.
!                                                              (line 1398)
  * __satfractqiha:                        Fixed-point fractional library routines.
!                                                              (line 1399)
  * __satfractqihq:                        Fixed-point fractional library routines.
!                                                              (line 1396)
  * __satfractqiqq:                        Fixed-point fractional library routines.
!                                                              (line 1395)
  * __satfractqisa:                        Fixed-point fractional library routines.
!                                                              (line 1400)
  * __satfractqisq:                        Fixed-point fractional library routines.
!                                                              (line 1397)
  * __satfractqita:                        Fixed-point fractional library routines.
!                                                              (line 1402)
  * __satfractqiuda:                       Fixed-point fractional library routines.
!                                                              (line 1413)
  * __satfractqiudq:                       Fixed-point fractional library routines.
!                                                              (line 1408)
  * __satfractqiuha:                       Fixed-point fractional library routines.
!                                                              (line 1410)
  * __satfractqiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1405)
  * __satfractqiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1403)
  * __satfractqiusa:                       Fixed-point fractional library routines.
!                                                              (line 1412)
  * __satfractqiusq:                       Fixed-point fractional library routines.
!                                                              (line 1406)
  * __satfractqiuta:                       Fixed-point fractional library routines.
!                                                              (line 1415)
  * __satfractqqda:                        Fixed-point fractional library routines.
!                                                              (line 1042)
  * __satfractqqdq2:                       Fixed-point fractional library routines.
!                                                              (line 1039)
  * __satfractqqha:                        Fixed-point fractional library routines.
!                                                              (line 1040)
  * __satfractqqhq2:                       Fixed-point fractional library routines.
!                                                              (line 1037)
  * __satfractqqsa:                        Fixed-point fractional library routines.
!                                                              (line 1041)
  * __satfractqqsq2:                       Fixed-point fractional library routines.
!                                                              (line 1038)
  * __satfractqqta:                        Fixed-point fractional library routines.
!                                                              (line 1043)
  * __satfractqquda:                       Fixed-point fractional library routines.
!                                                              (line 1054)
  * __satfractqqudq:                       Fixed-point fractional library routines.
!                                                              (line 1049)
  * __satfractqquha:                       Fixed-point fractional library routines.
!                                                              (line 1051)
  * __satfractqquhq:                       Fixed-point fractional library routines.
!                                                              (line 1046)
  * __satfractqquqq:                       Fixed-point fractional library routines.
!                                                              (line 1044)
  * __satfractqqusa:                       Fixed-point fractional library routines.
!                                                              (line 1053)
  * __satfractqqusq:                       Fixed-point fractional library routines.
!                                                              (line 1047)
  * __satfractqquta:                       Fixed-point fractional library routines.
!                                                              (line 1056)
  * __satfractsada2:                       Fixed-point fractional library routines.
!                                                              (line 1139)
  * __satfractsadq:                        Fixed-point fractional library routines.
!                                                              (line 1137)
  * __satfractsaha2:                       Fixed-point fractional library routines.
!                                                              (line 1138)
  * __satfractsahq:                        Fixed-point fractional library routines.
!                                                              (line 1135)
  * __satfractsaqq:                        Fixed-point fractional library routines.
!                                                              (line 1134)
  * __satfractsasq:                        Fixed-point fractional library routines.
!                                                              (line 1136)
  * __satfractsata2:                       Fixed-point fractional library routines.
!                                                              (line 1140)
  * __satfractsauda:                       Fixed-point fractional library routines.
!                                                              (line 1147)
  * __satfractsaudq:                       Fixed-point fractional library routines.
!                                                              (line 1144)
  * __satfractsauha:                       Fixed-point fractional library routines.
!                                                              (line 1145)
  * __satfractsauhq:                       Fixed-point fractional library routines.
!                                                              (line 1142)
  * __satfractsauqq:                       Fixed-point fractional library routines.
!                                                              (line 1141)
  * __satfractsausa:                       Fixed-point fractional library routines.
!                                                              (line 1146)
  * __satfractsausq:                       Fixed-point fractional library routines.
!                                                              (line 1143)
  * __satfractsauta:                       Fixed-point fractional library routines.
!                                                              (line 1148)
  * __satfractsfda:                        Fixed-point fractional library routines.
!                                                              (line 1489)
  * __satfractsfdq:                        Fixed-point fractional library routines.
!                                                              (line 1486)
  * __satfractsfha:                        Fixed-point fractional library routines.
!                                                              (line 1487)
  * __satfractsfhq:                        Fixed-point fractional library routines.
!                                                              (line 1484)
  * __satfractsfqq:                        Fixed-point fractional library routines.
!                                                              (line 1483)
  * __satfractsfsa:                        Fixed-point fractional library routines.
!                                                              (line 1488)
  * __satfractsfsq:                        Fixed-point fractional library routines.
!                                                              (line 1485)
  * __satfractsfta:                        Fixed-point fractional library routines.
!                                                              (line 1490)
  * __satfractsfuda:                       Fixed-point fractional library routines.
!                                                              (line 1497)
  * __satfractsfudq:                       Fixed-point fractional library routines.
!                                                              (line 1494)
  * __satfractsfuha:                       Fixed-point fractional library routines.
!                                                              (line 1495)
  * __satfractsfuhq:                       Fixed-point fractional library routines.
!                                                              (line 1492)
  * __satfractsfuqq:                       Fixed-point fractional library routines.
!                                                              (line 1491)
  * __satfractsfusa:                       Fixed-point fractional library routines.
!                                                              (line 1496)
  * __satfractsfusq:                       Fixed-point fractional library routines.
!                                                              (line 1493)
  * __satfractsfuta:                       Fixed-point fractional library routines.
!                                                              (line 1498)
  * __satfractsida:                        Fixed-point fractional library routines.
!                                                              (line 1439)
  * __satfractsidq:                        Fixed-point fractional library routines.
!                                                              (line 1436)
  * __satfractsiha:                        Fixed-point fractional library routines.
!                                                              (line 1437)
  * __satfractsihq:                        Fixed-point fractional library routines.
!                                                              (line 1434)
  * __satfractsiqq:                        Fixed-point fractional library routines.
!                                                              (line 1433)
  * __satfractsisa:                        Fixed-point fractional library routines.
!                                                              (line 1438)
  * __satfractsisq:                        Fixed-point fractional library routines.
!                                                              (line 1435)
  * __satfractsita:                        Fixed-point fractional library routines.
!                                                              (line 1440)
  * __satfractsiuda:                       Fixed-point fractional library routines.
!                                                              (line 1447)
  * __satfractsiudq:                       Fixed-point fractional library routines.
!                                                              (line 1444)
  * __satfractsiuha:                       Fixed-point fractional library routines.
!                                                              (line 1445)
  * __satfractsiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1442)
  * __satfractsiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1441)
  * __satfractsiusa:                       Fixed-point fractional library routines.
!                                                              (line 1446)
  * __satfractsiusq:                       Fixed-point fractional library routines.
!                                                              (line 1443)
  * __satfractsiuta:                       Fixed-point fractional library routines.
!                                                              (line 1448)
  * __satfractsqda:                        Fixed-point fractional library routines.
!                                                              (line 1078)
  * __satfractsqdq2:                       Fixed-point fractional library routines.
!                                                              (line 1075)
  * __satfractsqha:                        Fixed-point fractional library routines.
!                                                              (line 1076)
  * __satfractsqhq2:                       Fixed-point fractional library routines.
!                                                              (line 1074)
  * __satfractsqqq2:                       Fixed-point fractional library routines.
!                                                              (line 1073)
  * __satfractsqsa:                        Fixed-point fractional library routines.
!                                                              (line 1077)
  * __satfractsqta:                        Fixed-point fractional library routines.
!                                                              (line 1079)
  * __satfractsquda:                       Fixed-point fractional library routines.
!                                                              (line 1089)
  * __satfractsqudq:                       Fixed-point fractional library routines.
!                                                              (line 1084)
  * __satfractsquha:                       Fixed-point fractional library routines.
!                                                              (line 1086)
  * __satfractsquhq:                       Fixed-point fractional library routines.
!                                                              (line 1082)
  * __satfractsquqq:                       Fixed-point fractional library routines.
!                                                              (line 1080)
  * __satfractsqusa:                       Fixed-point fractional library routines.
!                                                              (line 1088)
  * __satfractsqusq:                       Fixed-point fractional library routines.
!                                                              (line 1083)
  * __satfractsquta:                       Fixed-point fractional library routines.
!                                                              (line 1090)
  * __satfracttada2:                       Fixed-point fractional library routines.
!                                                              (line 1174)
  * __satfracttadq:                        Fixed-point fractional library routines.
!                                                              (line 1171)
  * __satfracttaha2:                       Fixed-point fractional library routines.
!                                                              (line 1172)
  * __satfracttahq:                        Fixed-point fractional library routines.
!                                                              (line 1169)
  * __satfracttaqq:                        Fixed-point fractional library routines.
!                                                              (line 1168)
  * __satfracttasa2:                       Fixed-point fractional library routines.
!                                                              (line 1173)
  * __satfracttasq:                        Fixed-point fractional library routines.
!                                                              (line 1170)
  * __satfracttauda:                       Fixed-point fractional library routines.
!                                                              (line 1185)
  * __satfracttaudq:                       Fixed-point fractional library routines.
!                                                              (line 1180)
  * __satfracttauha:                       Fixed-point fractional library routines.
!                                                              (line 1182)
  * __satfracttauhq:                       Fixed-point fractional library routines.
!                                                              (line 1177)
  * __satfracttauqq:                       Fixed-point fractional library routines.
!                                                              (line 1175)
  * __satfracttausa:                       Fixed-point fractional library routines.
!                                                              (line 1184)
  * __satfracttausq:                       Fixed-point fractional library routines.
!                                                              (line 1178)
  * __satfracttauta:                       Fixed-point fractional library routines.
!                                                              (line 1187)
  * __satfracttida:                        Fixed-point fractional library routines.
!                                                              (line 1471)
  * __satfracttidq:                        Fixed-point fractional library routines.
!                                                              (line 1468)
  * __satfracttiha:                        Fixed-point fractional library routines.
!                                                              (line 1469)
  * __satfracttihq:                        Fixed-point fractional library routines.
!                                                              (line 1466)
  * __satfracttiqq:                        Fixed-point fractional library routines.
!                                                              (line 1465)
  * __satfracttisa:                        Fixed-point fractional library routines.
!                                                              (line 1470)
  * __satfracttisq:                        Fixed-point fractional library routines.
!                                                              (line 1467)
  * __satfracttita:                        Fixed-point fractional library routines.
!                                                              (line 1472)
  * __satfracttiuda:                       Fixed-point fractional library routines.
!                                                              (line 1480)
  * __satfracttiudq:                       Fixed-point fractional library routines.
!                                                              (line 1476)
  * __satfracttiuha:                       Fixed-point fractional library routines.
!                                                              (line 1478)
  * __satfracttiuhq:                       Fixed-point fractional library routines.
!                                                              (line 1474)
  * __satfracttiuqq:                       Fixed-point fractional library routines.
!                                                              (line 1473)
  * __satfracttiusa:                       Fixed-point fractional library routines.
!                                                              (line 1479)
  * __satfracttiusq:                       Fixed-point fractional library routines.
!                                                              (line 1475)
  * __satfracttiuta:                       Fixed-point fractional library routines.
!                                                              (line 1481)
  * __satfractudada:                       Fixed-point fractional library routines.
!                                                              (line 1350)
  * __satfractudadq:                       Fixed-point fractional library routines.
!                                                              (line 1345)
  * __satfractudaha:                       Fixed-point fractional library routines.
!                                                              (line 1347)
  * __satfractudahq:                       Fixed-point fractional library routines.
!                                                              (line 1343)
  * __satfractudaqq:                       Fixed-point fractional library routines.
!                                                              (line 1341)
  * __satfractudasa:                       Fixed-point fractional library routines.
!                                                              (line 1349)
  * __satfractudasq:                       Fixed-point fractional library routines.
!                                                              (line 1344)
  * __satfractudata:                       Fixed-point fractional library routines.
!                                                              (line 1351)
  * __satfractudaudq:                      Fixed-point fractional library routines.
!                                                              (line 1359)
  * __satfractudauha2:                     Fixed-point fractional library routines.
!                                                              (line 1361)
  * __satfractudauhq:                      Fixed-point fractional library routines.
!                                                              (line 1355)
  * __satfractudauqq:                      Fixed-point fractional library routines.
!                                                              (line 1353)
  * __satfractudausa2:                     Fixed-point fractional library routines.
!                                                              (line 1363)
  * __satfractudausq:                      Fixed-point fractional library routines.
!                                                              (line 1357)
  * __satfractudauta2:                     Fixed-point fractional library routines.
!                                                              (line 1365)
  * __satfractudqda:                       Fixed-point fractional library routines.
!                                                              (line 1274)
  * __satfractudqdq:                       Fixed-point fractional library routines.
!                                                              (line 1269)
  * __satfractudqha:                       Fixed-point fractional library routines.
!                                                              (line 1271)
  * __satfractudqhq:                       Fixed-point fractional library routines.
!                                                              (line 1266)
  * __satfractudqqq:                       Fixed-point fractional library routines.
!                                                              (line 1264)
  * __satfractudqsa:                       Fixed-point fractional library routines.
!                                                              (line 1273)
  * __satfractudqsq:                       Fixed-point fractional library routines.
!                                                              (line 1267)
  * __satfractudqta:                       Fixed-point fractional library routines.
!                                                              (line 1276)
  * __satfractudquda:                      Fixed-point fractional library routines.
!                                                              (line 1288)
  * __satfractudquha:                      Fixed-point fractional library routines.
!                                                              (line 1284)
  * __satfractudquhq2:                     Fixed-point fractional library routines.
!                                                              (line 1280)
  * __satfractudquqq2:                     Fixed-point fractional library routines.
!                                                              (line 1278)
  * __satfractudqusa:                      Fixed-point fractional library routines.
!                                                              (line 1286)
  * __satfractudqusq2:                     Fixed-point fractional library routines.
!                                                              (line 1282)
  * __satfractudquta:                      Fixed-point fractional library routines.
!                                                              (line 1290)
  * __satfractuhada:                       Fixed-point fractional library routines.
!                                                              (line 1302)
  * __satfractuhadq:                       Fixed-point fractional library routines.
!                                                              (line 1297)
  * __satfractuhaha:                       Fixed-point fractional library routines.
!                                                              (line 1299)
  * __satfractuhahq:                       Fixed-point fractional library routines.
!                                                              (line 1294)
  * __satfractuhaqq:                       Fixed-point fractional library routines.
!                                                              (line 1292)
  * __satfractuhasa:                       Fixed-point fractional library routines.
!                                                              (line 1301)
  * __satfractuhasq:                       Fixed-point fractional library routines.
!                                                              (line 1295)
  * __satfractuhata:                       Fixed-point fractional library routines.
!                                                              (line 1304)
  * __satfractuhauda2:                     Fixed-point fractional library routines.
!                                                              (line 1316)
  * __satfractuhaudq:                      Fixed-point fractional library routines.
!                                                              (line 1312)
  * __satfractuhauhq:                      Fixed-point fractional library routines.
!                                                              (line 1308)
  * __satfractuhauqq:                      Fixed-point fractional library routines.
!                                                              (line 1306)
  * __satfractuhausa2:                     Fixed-point fractional library routines.
!                                                              (line 1314)
  * __satfractuhausq:                      Fixed-point fractional library routines.
!                                                              (line 1310)
  * __satfractuhauta2:                     Fixed-point fractional library routines.
!                                                              (line 1318)
  * __satfractuhqda:                       Fixed-point fractional library routines.
!                                                              (line 1223)
  * __satfractuhqdq:                       Fixed-point fractional library routines.
!                                                              (line 1220)
  * __satfractuhqha:                       Fixed-point fractional library routines.
!                                                              (line 1221)
  * __satfractuhqhq:                       Fixed-point fractional library routines.
!                                                              (line 1218)
  * __satfractuhqqq:                       Fixed-point fractional library routines.
!                                                              (line 1217)
  * __satfractuhqsa:                       Fixed-point fractional library routines.
!                                                              (line 1222)
  * __satfractuhqsq:                       Fixed-point fractional library routines.
!                                                              (line 1219)
  * __satfractuhqta:                       Fixed-point fractional library routines.
!                                                              (line 1224)
  * __satfractuhquda:                      Fixed-point fractional library routines.
!                                                              (line 1234)
  * __satfractuhqudq2:                     Fixed-point fractional library routines.
!                                                              (line 1229)
  * __satfractuhquha:                      Fixed-point fractional library routines.
!                                                              (line 1231)
  * __satfractuhquqq2:                     Fixed-point fractional library routines.
!                                                              (line 1225)
  * __satfractuhqusa:                      Fixed-point fractional library routines.
!                                                              (line 1233)
  * __satfractuhqusq2:                     Fixed-point fractional library routines.
!                                                              (line 1227)
  * __satfractuhquta:                      Fixed-point fractional library routines.
!                                                              (line 1236)
  * __satfractunsdida:                     Fixed-point fractional library routines.
!                                                              (line 1833)
  * __satfractunsdidq:                     Fixed-point fractional library routines.
!                                                              (line 1829)
  * __satfractunsdiha:                     Fixed-point fractional library routines.
!                                                              (line 1831)
  * __satfractunsdihq:                     Fixed-point fractional library routines.
!                                                              (line 1827)
  * __satfractunsdiqq:                     Fixed-point fractional library routines.
!                                                              (line 1826)
  * __satfractunsdisa:                     Fixed-point fractional library routines.
!                                                              (line 1832)
  * __satfractunsdisq:                     Fixed-point fractional library routines.
!                                                              (line 1828)
  * __satfractunsdita:                     Fixed-point fractional library routines.
!                                                              (line 1834)
  * __satfractunsdiuda:                    Fixed-point fractional library routines.
!                                                              (line 1848)
  * __satfractunsdiudq:                    Fixed-point fractional library routines.
!                                                              (line 1842)
  * __satfractunsdiuha:                    Fixed-point fractional library routines.
!                                                              (line 1844)
  * __satfractunsdiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1838)
  * __satfractunsdiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1836)
  * __satfractunsdiusa:                    Fixed-point fractional library routines.
!                                                              (line 1846)
  * __satfractunsdiusq:                    Fixed-point fractional library routines.
!                                                              (line 1840)
  * __satfractunsdiuta:                    Fixed-point fractional library routines.
!                                                              (line 1850)
  * __satfractunshida:                     Fixed-point fractional library routines.
!                                                              (line 1785)
  * __satfractunshidq:                     Fixed-point fractional library routines.
!                                                              (line 1781)
  * __satfractunshiha:                     Fixed-point fractional library routines.
!                                                              (line 1783)
  * __satfractunshihq:                     Fixed-point fractional library routines.
!                                                              (line 1779)
  * __satfractunshiqq:                     Fixed-point fractional library routines.
!                                                              (line 1778)
  * __satfractunshisa:                     Fixed-point fractional library routines.
!                                                              (line 1784)
  * __satfractunshisq:                     Fixed-point fractional library routines.
!                                                              (line 1780)
  * __satfractunshita:                     Fixed-point fractional library routines.
!                                                              (line 1786)
  * __satfractunshiuda:                    Fixed-point fractional library routines.
!                                                              (line 1800)
  * __satfractunshiudq:                    Fixed-point fractional library routines.
!                                                              (line 1794)
  * __satfractunshiuha:                    Fixed-point fractional library routines.
!                                                              (line 1796)
  * __satfractunshiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1790)
  * __satfractunshiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1788)
  * __satfractunshiusa:                    Fixed-point fractional library routines.
!                                                              (line 1798)
  * __satfractunshiusq:                    Fixed-point fractional library routines.
!                                                              (line 1792)
  * __satfractunshiuta:                    Fixed-point fractional library routines.
!                                                              (line 1802)
  * __satfractunsqida:                     Fixed-point fractional library routines.
!                                                              (line 1759)
  * __satfractunsqidq:                     Fixed-point fractional library routines.
!                                                              (line 1755)
  * __satfractunsqiha:                     Fixed-point fractional library routines.
!                                                              (line 1757)
  * __satfractunsqihq:                     Fixed-point fractional library routines.
!                                                              (line 1753)
  * __satfractunsqiqq:                     Fixed-point fractional library routines.
!                                                              (line 1752)
  * __satfractunsqisa:                     Fixed-point fractional library routines.
!                                                              (line 1758)
  * __satfractunsqisq:                     Fixed-point fractional library routines.
!                                                              (line 1754)
  * __satfractunsqita:                     Fixed-point fractional library routines.
!                                                              (line 1760)
  * __satfractunsqiuda:                    Fixed-point fractional library routines.
!                                                              (line 1774)
  * __satfractunsqiudq:                    Fixed-point fractional library routines.
!                                                              (line 1768)
  * __satfractunsqiuha:                    Fixed-point fractional library routines.
!                                                              (line 1770)
  * __satfractunsqiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1764)
  * __satfractunsqiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1762)
  * __satfractunsqiusa:                    Fixed-point fractional library routines.
!                                                              (line 1772)
  * __satfractunsqiusq:                    Fixed-point fractional library routines.
!                                                              (line 1766)
  * __satfractunsqiuta:                    Fixed-point fractional library routines.
!                                                              (line 1776)
  * __satfractunssida:                     Fixed-point fractional library routines.
!                                                              (line 1810)
  * __satfractunssidq:                     Fixed-point fractional library routines.
!                                                              (line 1807)
  * __satfractunssiha:                     Fixed-point fractional library routines.
!                                                              (line 1808)
  * __satfractunssihq:                     Fixed-point fractional library routines.
!                                                              (line 1805)
  * __satfractunssiqq:                     Fixed-point fractional library routines.
!                                                              (line 1804)
  * __satfractunssisa:                     Fixed-point fractional library routines.
!                                                              (line 1809)
  * __satfractunssisq:                     Fixed-point fractional library routines.
!                                                              (line 1806)
  * __satfractunssita:                     Fixed-point fractional library routines.
!                                                              (line 1811)
  * __satfractunssiuda:                    Fixed-point fractional library routines.
!                                                              (line 1822)
  * __satfractunssiudq:                    Fixed-point fractional library routines.
!                                                              (line 1817)
  * __satfractunssiuha:                    Fixed-point fractional library routines.
!                                                              (line 1819)
  * __satfractunssiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1814)
  * __satfractunssiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1812)
  * __satfractunssiusa:                    Fixed-point fractional library routines.
!                                                              (line 1821)
  * __satfractunssiusq:                    Fixed-point fractional library routines.
!                                                              (line 1815)
  * __satfractunssiuta:                    Fixed-point fractional library routines.
!                                                              (line 1824)
  * __satfractunstida:                     Fixed-point fractional library routines.
!                                                              (line 1862)
  * __satfractunstidq:                     Fixed-point fractional library routines.
!                                                              (line 1857)
  * __satfractunstiha:                     Fixed-point fractional library routines.
!                                                              (line 1859)
  * __satfractunstihq:                     Fixed-point fractional library routines.
!                                                              (line 1854)
  * __satfractunstiqq:                     Fixed-point fractional library routines.
!                                                              (line 1852)
  * __satfractunstisa:                     Fixed-point fractional library routines.
!                                                              (line 1861)
  * __satfractunstisq:                     Fixed-point fractional library routines.
!                                                              (line 1855)
  * __satfractunstita:                     Fixed-point fractional library routines.
!                                                              (line 1864)
  * __satfractunstiuda:                    Fixed-point fractional library routines.
!                                                              (line 1878)
  * __satfractunstiudq:                    Fixed-point fractional library routines.
!                                                              (line 1872)
  * __satfractunstiuha:                    Fixed-point fractional library routines.
!                                                              (line 1874)
  * __satfractunstiuhq:                    Fixed-point fractional library routines.
!                                                              (line 1868)
  * __satfractunstiuqq:                    Fixed-point fractional library routines.
!                                                              (line 1866)
  * __satfractunstiusa:                    Fixed-point fractional library routines.
!                                                              (line 1876)
  * __satfractunstiusq:                    Fixed-point fractional library routines.
!                                                              (line 1870)
  * __satfractunstiuta:                    Fixed-point fractional library routines.
!                                                              (line 1880)
  * __satfractuqqda:                       Fixed-point fractional library routines.
!                                                              (line 1199)
  * __satfractuqqdq:                       Fixed-point fractional library routines.
!                                                              (line 1194)
  * __satfractuqqha:                       Fixed-point fractional library routines.
!                                                              (line 1196)
  * __satfractuqqhq:                       Fixed-point fractional library routines.
!                                                              (line 1191)
  * __satfractuqqqq:                       Fixed-point fractional library routines.
!                                                              (line 1189)
  * __satfractuqqsa:                       Fixed-point fractional library routines.
!                                                              (line 1198)
  * __satfractuqqsq:                       Fixed-point fractional library routines.
!                                                              (line 1192)
  * __satfractuqqta:                       Fixed-point fractional library routines.
!                                                              (line 1201)
  * __satfractuqquda:                      Fixed-point fractional library routines.
!                                                              (line 1213)
  * __satfractuqqudq2:                     Fixed-point fractional library routines.
!                                                              (line 1207)
  * __satfractuqquha:                      Fixed-point fractional library routines.
!                                                              (line 1209)
  * __satfractuqquhq2:                     Fixed-point fractional library routines.
!                                                              (line 1203)
  * __satfractuqqusa:                      Fixed-point fractional library routines.
!                                                              (line 1211)
  * __satfractuqqusq2:                     Fixed-point fractional library routines.
!                                                              (line 1205)
  * __satfractuqquta:                      Fixed-point fractional library routines.
!                                                              (line 1215)
  * __satfractusada:                       Fixed-point fractional library routines.
!                                                              (line 1326)
  * __satfractusadq:                       Fixed-point fractional library routines.
!                                                              (line 1323)
  * __satfractusaha:                       Fixed-point fractional library routines.
!                                                              (line 1324)
  * __satfractusahq:                       Fixed-point fractional library routines.
!                                                              (line 1321)
  * __satfractusaqq:                       Fixed-point fractional library routines.
!                                                              (line 1320)
  * __satfractusasa:                       Fixed-point fractional library routines.
!                                                              (line 1325)
  * __satfractusasq:                       Fixed-point fractional library routines.
!                                                              (line 1322)
  * __satfractusata:                       Fixed-point fractional library routines.
!                                                              (line 1327)
  * __satfractusauda2:                     Fixed-point fractional library routines.
!                                                              (line 1337)
  * __satfractusaudq:                      Fixed-point fractional library routines.
!                                                              (line 1333)
  * __satfractusauha2:                     Fixed-point fractional library routines.
!                                                              (line 1335)
  * __satfractusauhq:                      Fixed-point fractional library routines.
!                                                              (line 1330)
  * __satfractusauqq:                      Fixed-point fractional library routines.
!                                                              (line 1328)
  * __satfractusausq:                      Fixed-point fractional library routines.
!                                                              (line 1331)
  * __satfractusauta2:                     Fixed-point fractional library routines.
!                                                              (line 1339)
  * __satfractusqda:                       Fixed-point fractional library routines.
!                                                              (line 1247)
  * __satfractusqdq:                       Fixed-point fractional library routines.
!                                                              (line 1242)
  * __satfractusqha:                       Fixed-point fractional library routines.
!                                                              (line 1244)
  * __satfractusqhq:                       Fixed-point fractional library routines.
!                                                              (line 1240)
  * __satfractusqqq:                       Fixed-point fractional library routines.
!                                                              (line 1238)
  * __satfractusqsa:                       Fixed-point fractional library routines.
!                                                              (line 1246)
  * __satfractusqsq:                       Fixed-point fractional library routines.
!                                                              (line 1241)
  * __satfractusqta:                       Fixed-point fractional library routines.
!                                                              (line 1248)
  * __satfractusquda:                      Fixed-point fractional library routines.
!                                                              (line 1260)
  * __satfractusqudq2:                     Fixed-point fractional library routines.
!                                                              (line 1254)
  * __satfractusquha:                      Fixed-point fractional library routines.
!                                                              (line 1256)
  * __satfractusquhq2:                     Fixed-point fractional library routines.
!                                                              (line 1252)
  * __satfractusquqq2:                     Fixed-point fractional library routines.
!                                                              (line 1250)
  * __satfractusqusa:                      Fixed-point fractional library routines.
!                                                              (line 1258)
  * __satfractusquta:                      Fixed-point fractional library routines.
!                                                              (line 1262)
  * __satfractutada:                       Fixed-point fractional library routines.
!                                                              (line 1377)
  * __satfractutadq:                       Fixed-point fractional library routines.
!                                                              (line 1372)
  * __satfractutaha:                       Fixed-point fractional library routines.
!                                                              (line 1374)
  * __satfractutahq:                       Fixed-point fractional library routines.
!                                                              (line 1369)
  * __satfractutaqq:                       Fixed-point fractional library routines.
!                                                              (line 1367)
  * __satfractutasa:                       Fixed-point fractional library routines.
!                                                              (line 1376)
  * __satfractutasq:                       Fixed-point fractional library routines.
!                                                              (line 1370)
  * __satfractutata:                       Fixed-point fractional library routines.
!                                                              (line 1379)
  * __satfractutauda2:                     Fixed-point fractional library routines.
!                                                              (line 1393)
  * __satfractutaudq:                      Fixed-point fractional library routines.
!                                                              (line 1387)
  * __satfractutauha2:                     Fixed-point fractional library routines.
!                                                              (line 1389)
  * __satfractutauhq:                      Fixed-point fractional library routines.
!                                                              (line 1383)
  * __satfractutauqq:                      Fixed-point fractional library routines.
!                                                              (line 1381)
  * __satfractutausa2:                     Fixed-point fractional library routines.
!                                                              (line 1391)
  * __satfractutausq:                      Fixed-point fractional library routines.
!                                                              (line 1385)
  * __splitstack_find:                     Miscellaneous routines.
                                                               (line   15)
  * __ssaddda3:                            Fixed-point fractional library routines.
!                                                              (line   66)
  * __ssadddq3:                            Fixed-point fractional library routines.
!                                                              (line   61)
  * __ssaddha3:                            Fixed-point fractional library routines.
!                                                              (line   63)
  * __ssaddhq3:                            Fixed-point fractional library routines.
!                                                              (line   59)
  * __ssaddqq3:                            Fixed-point fractional library routines.
!                                                              (line   57)
  * __ssaddsa3:                            Fixed-point fractional library routines.
!                                                              (line   65)
  * __ssaddsq3:                            Fixed-point fractional library routines.
!                                                              (line   60)
  * __ssaddta3:                            Fixed-point fractional library routines.
!                                                              (line   67)
  * __ssashlda3:                           Fixed-point fractional library routines.
!                                                              (line  401)
  * __ssashldq3:                           Fixed-point fractional library routines.
!                                                              (line  397)
  * __ssashlha3:                           Fixed-point fractional library routines.
!                                                              (line  399)
  * __ssashlhq3:                           Fixed-point fractional library routines.
!                                                              (line  395)
  * __ssashlsa3:                           Fixed-point fractional library routines.
!                                                              (line  400)
  * __ssashlsq3:                           Fixed-point fractional library routines.
!                                                              (line  396)
  * __ssashlta3:                           Fixed-point fractional library routines.
!                                                              (line  402)
  * __ssdivda3:                            Fixed-point fractional library routines.
!                                                              (line  260)
  * __ssdivdq3:                            Fixed-point fractional library routines.
!                                                              (line  255)
  * __ssdivha3:                            Fixed-point fractional library routines.
!                                                              (line  257)
  * __ssdivhq3:                            Fixed-point fractional library routines.
!                                                              (line  253)
  * __ssdivqq3:                            Fixed-point fractional library routines.
!                                                              (line  251)
  * __ssdivsa3:                            Fixed-point fractional library routines.
!                                                              (line  259)
  * __ssdivsq3:                            Fixed-point fractional library routines.
!                                                              (line  254)
  * __ssdivta3:                            Fixed-point fractional library routines.
!                                                              (line  261)
  * __ssmulda3:                            Fixed-point fractional library routines.
!                                                              (line  192)
  * __ssmuldq3:                            Fixed-point fractional library routines.
!                                                              (line  187)
  * __ssmulha3:                            Fixed-point fractional library routines.
!                                                              (line  189)
  * __ssmulhq3:                            Fixed-point fractional library routines.
!                                                              (line  185)
  * __ssmulqq3:                            Fixed-point fractional library routines.
!                                                              (line  183)
  * __ssmulsa3:                            Fixed-point fractional library routines.
!                                                              (line  191)
  * __ssmulsq3:                            Fixed-point fractional library routines.
!                                                              (line  186)
  * __ssmulta3:                            Fixed-point fractional library routines.
!                                                              (line  193)
  * __ssnegda2:                            Fixed-point fractional library routines.
!                                                              (line  315)
  * __ssnegdq2:                            Fixed-point fractional library routines.
!                                                              (line  312)
  * __ssnegha2:                            Fixed-point fractional library routines.
!                                                              (line  313)
  * __ssneghq2:                            Fixed-point fractional library routines.
!                                                              (line  310)
  * __ssnegqq2:                            Fixed-point fractional library routines.
!                                                              (line  309)
  * __ssnegsa2:                            Fixed-point fractional library routines.
!                                                              (line  314)
  * __ssnegsq2:                            Fixed-point fractional library routines.
!                                                              (line  311)
  * __ssnegta2:                            Fixed-point fractional library routines.
!                                                              (line  316)
  * __sssubda3:                            Fixed-point fractional library routines.
!                                                              (line  128)
  * __sssubdq3:                            Fixed-point fractional library routines.
!                                                              (line  123)
  * __sssubha3:                            Fixed-point fractional library routines.
!                                                              (line  125)
  * __sssubhq3:                            Fixed-point fractional library routines.
!                                                              (line  121)
  * __sssubqq3:                            Fixed-point fractional library routines.
!                                                              (line  119)
  * __sssubsa3:                            Fixed-point fractional library routines.
!                                                              (line  127)
  * __sssubsq3:                            Fixed-point fractional library routines.
!                                                              (line  122)
  * __sssubta3:                            Fixed-point fractional library routines.
!                                                              (line  129)
  * __subda3:                              Fixed-point fractional library routines.
!                                                              (line  106)
  * __subdf3:                              Soft float library routines.
                                                               (line   30)
  * __subdq3:                              Fixed-point fractional library routines.
!                                                              (line   93)
  * __subha3:                              Fixed-point fractional library routines.
!                                                              (line  103)
  * __subhq3:                              Fixed-point fractional library routines.
!                                                              (line   91)
  * __subqq3:                              Fixed-point fractional library routines.
!                                                              (line   89)
  * __subsa3:                              Fixed-point fractional library routines.
!                                                              (line  105)
  * __subsf3:                              Soft float library routines.
                                                               (line   29)
  * __subsq3:                              Fixed-point fractional library routines.
!                                                              (line   92)
  * __subta3:                              Fixed-point fractional library routines.
!                                                              (line  107)
  * __subtf3:                              Soft float library routines.
                                                               (line   31)
  * __subuda3:                             Fixed-point fractional library routines.
!                                                              (line  113)
  * __subudq3:                             Fixed-point fractional library routines.
!                                                              (line  101)
  * __subuha3:                             Fixed-point fractional library routines.
!                                                              (line  109)
  * __subuhq3:                             Fixed-point fractional library routines.
!                                                              (line   97)
  * __subuqq3:                             Fixed-point fractional library routines.
!                                                              (line   95)
  * __subusa3:                             Fixed-point fractional library routines.
!                                                              (line  111)
  * __subusq3:                             Fixed-point fractional library routines.
!                                                              (line   99)
  * __subuta3:                             Fixed-point fractional library routines.
!                                                              (line  115)
  * __subvdi3:                             Integer library routines.
                                                               (line  122)
  * __subvsi3:                             Integer library routines.
*************** Concept Index
*** 53768,53788 ****
  * __udivti3:                             Integer library routines.
                                                               (line   54)
  * __udivuda3:                            Fixed-point fractional library routines.
!                                                              (line  252)
  * __udivudq3:                            Fixed-point fractional library routines.
!                                                              (line  246)
  * __udivuha3:                            Fixed-point fractional library routines.
!                                                              (line  248)
  * __udivuhq3:                            Fixed-point fractional library routines.
!                                                              (line  242)
  * __udivuqq3:                            Fixed-point fractional library routines.
!                                                              (line  240)
  * __udivusa3:                            Fixed-point fractional library routines.
!                                                              (line  250)
  * __udivusq3:                            Fixed-point fractional library routines.
!                                                              (line  244)
  * __udivuta3:                            Fixed-point fractional library routines.
!                                                              (line  254)
  * __umoddi3:                             Integer library routines.
                                                               (line   69)
  * __umodsi3:                             Integer library routines.
--- 53768,53788 ----
  * __udivti3:                             Integer library routines.
                                                               (line   54)
  * __udivuda3:                            Fixed-point fractional library routines.
!                                                              (line  244)
  * __udivudq3:                            Fixed-point fractional library routines.
!                                                              (line  238)
  * __udivuha3:                            Fixed-point fractional library routines.
!                                                              (line  240)
  * __udivuhq3:                            Fixed-point fractional library routines.
!                                                              (line  234)
  * __udivuqq3:                            Fixed-point fractional library routines.
!                                                              (line  232)
  * __udivusa3:                            Fixed-point fractional library routines.
!                                                              (line  242)
  * __udivusq3:                            Fixed-point fractional library routines.
!                                                              (line  236)
  * __udivuta3:                            Fixed-point fractional library routines.
!                                                              (line  246)
  * __umoddi3:                             Integer library routines.
                                                               (line   69)
  * __umodsi3:                             Integer library routines.
*************** Concept Index
*** 53796,53896 ****
  * __unordtf2:                            Soft float library routines.
                                                               (line  173)
  * __usadduda3:                           Fixed-point fractional library routines.
!                                                              (line   91)
  * __usaddudq3:                           Fixed-point fractional library routines.
!                                                              (line   85)
  * __usadduha3:                           Fixed-point fractional library routines.
!                                                              (line   87)
  * __usadduhq3:                           Fixed-point fractional library routines.
!                                                              (line   81)
  * __usadduqq3:                           Fixed-point fractional library routines.
!                                                              (line   79)
  * __usaddusa3:                           Fixed-point fractional library routines.
!                                                              (line   89)
  * __usaddusq3:                           Fixed-point fractional library routines.
!                                                              (line   83)
  * __usadduta3:                           Fixed-point fractional library routines.
!                                                              (line   93)
  * __usashluda3:                          Fixed-point fractional library routines.
!                                                              (line  427)
  * __usashludq3:                          Fixed-point fractional library routines.
!                                                              (line  421)
  * __usashluha3:                          Fixed-point fractional library routines.
!                                                              (line  423)
  * __usashluhq3:                          Fixed-point fractional library routines.
!                                                              (line  417)
  * __usashluqq3:                          Fixed-point fractional library routines.
!                                                              (line  415)
  * __usashlusa3:                          Fixed-point fractional library routines.
!                                                              (line  425)
  * __usashlusq3:                          Fixed-point fractional library routines.
!                                                              (line  419)
  * __usashluta3:                          Fixed-point fractional library routines.
!                                                              (line  429)
  * __usdivuda3:                           Fixed-point fractional library routines.
!                                                              (line  286)
  * __usdivudq3:                           Fixed-point fractional library routines.
!                                                              (line  280)
  * __usdivuha3:                           Fixed-point fractional library routines.
!                                                              (line  282)
  * __usdivuhq3:                           Fixed-point fractional library routines.
!                                                              (line  276)
  * __usdivuqq3:                           Fixed-point fractional library routines.
!                                                              (line  274)
  * __usdivusa3:                           Fixed-point fractional library routines.
!                                                              (line  284)
  * __usdivusq3:                           Fixed-point fractional library routines.
!                                                              (line  278)
  * __usdivuta3:                           Fixed-point fractional library routines.
!                                                              (line  288)
  * __usmuluda3:                           Fixed-point fractional library routines.
!                                                              (line  218)
  * __usmuludq3:                           Fixed-point fractional library routines.
!                                                              (line  212)
  * __usmuluha3:                           Fixed-point fractional library routines.
!                                                              (line  214)
  * __usmuluhq3:                           Fixed-point fractional library routines.
!                                                              (line  208)
  * __usmuluqq3:                           Fixed-point fractional library routines.
!                                                              (line  206)
  * __usmulusa3:                           Fixed-point fractional library routines.
!                                                              (line  216)
  * __usmulusq3:                           Fixed-point fractional library routines.
!                                                              (line  210)
  * __usmuluta3:                           Fixed-point fractional library routines.
!                                                              (line  220)
  * __usneguda2:                           Fixed-point fractional library routines.
!                                                              (line  337)
  * __usnegudq2:                           Fixed-point fractional library routines.
!                                                              (line  332)
  * __usneguha2:                           Fixed-point fractional library routines.
!                                                              (line  334)
  * __usneguhq2:                           Fixed-point fractional library routines.
!                                                              (line  329)
  * __usneguqq2:                           Fixed-point fractional library routines.
!                                                              (line  327)
  * __usnegusa2:                           Fixed-point fractional library routines.
!                                                              (line  336)
  * __usnegusq2:                           Fixed-point fractional library routines.
!                                                              (line  330)
  * __usneguta2:                           Fixed-point fractional library routines.
!                                                              (line  339)
  * __ussubuda3:                           Fixed-point fractional library routines.
!                                                              (line  154)
  * __ussubudq3:                           Fixed-point fractional library routines.
!                                                              (line  148)
  * __ussubuha3:                           Fixed-point fractional library routines.
!                                                              (line  150)
  * __ussubuhq3:                           Fixed-point fractional library routines.
!                                                              (line  144)
  * __ussubuqq3:                           Fixed-point fractional library routines.
!                                                              (line  142)
  * __ussubusa3:                           Fixed-point fractional library routines.
!                                                              (line  152)
  * __ussubusq3:                           Fixed-point fractional library routines.
!                                                              (line  146)
  * __ussubuta3:                           Fixed-point fractional library routines.
!                                                              (line  156)
  * abort:                                 Portability.        (line   20)
  * abs:                                   Arithmetic.         (line  206)
  * abs and attributes:                    Expressions.        (line   83)
--- 53796,53896 ----
  * __unordtf2:                            Soft float library routines.
                                                               (line  173)
  * __usadduda3:                           Fixed-point fractional library routines.
!                                                              (line   83)
  * __usaddudq3:                           Fixed-point fractional library routines.
!                                                              (line   77)
  * __usadduha3:                           Fixed-point fractional library routines.
!                                                              (line   79)
  * __usadduhq3:                           Fixed-point fractional library routines.
!                                                              (line   73)
  * __usadduqq3:                           Fixed-point fractional library routines.
!                                                              (line   71)
  * __usaddusa3:                           Fixed-point fractional library routines.
!                                                              (line   81)
  * __usaddusq3:                           Fixed-point fractional library routines.
!                                                              (line   75)
  * __usadduta3:                           Fixed-point fractional library routines.
!                                                              (line   85)
  * __usashluda3:                          Fixed-point fractional library routines.
!                                                              (line  419)
  * __usashludq3:                          Fixed-point fractional library routines.
!                                                              (line  413)
  * __usashluha3:                          Fixed-point fractional library routines.
!                                                              (line  415)
  * __usashluhq3:                          Fixed-point fractional library routines.
!                                                              (line  409)
  * __usashluqq3:                          Fixed-point fractional library routines.
!                                                              (line  407)
  * __usashlusa3:                          Fixed-point fractional library routines.
!                                                              (line  417)
  * __usashlusq3:                          Fixed-point fractional library routines.
!                                                              (line  411)
  * __usashluta3:                          Fixed-point fractional library routines.
!                                                              (line  421)
  * __usdivuda3:                           Fixed-point fractional library routines.
!                                                              (line  278)
  * __usdivudq3:                           Fixed-point fractional library routines.
!                                                              (line  272)
  * __usdivuha3:                           Fixed-point fractional library routines.
!                                                              (line  274)
  * __usdivuhq3:                           Fixed-point fractional library routines.
!                                                              (line  268)
  * __usdivuqq3:                           Fixed-point fractional library routines.
!                                                              (line  266)
  * __usdivusa3:                           Fixed-point fractional library routines.
!                                                              (line  276)
  * __usdivusq3:                           Fixed-point fractional library routines.
!                                                              (line  270)
  * __usdivuta3:                           Fixed-point fractional library routines.
!                                                              (line  280)
  * __usmuluda3:                           Fixed-point fractional library routines.
!                                                              (line  210)
  * __usmuludq3:                           Fixed-point fractional library routines.
!                                                              (line  204)
  * __usmuluha3:                           Fixed-point fractional library routines.
!                                                              (line  206)
  * __usmuluhq3:                           Fixed-point fractional library routines.
!                                                              (line  200)
  * __usmuluqq3:                           Fixed-point fractional library routines.
!                                                              (line  198)
  * __usmulusa3:                           Fixed-point fractional library routines.
!                                                              (line  208)
  * __usmulusq3:                           Fixed-point fractional library routines.
!                                                              (line  202)
  * __usmuluta3:                           Fixed-point fractional library routines.
!                                                              (line  212)
  * __usneguda2:                           Fixed-point fractional library routines.
!                                                              (line  329)
  * __usnegudq2:                           Fixed-point fractional library routines.
!                                                              (line  324)
  * __usneguha2:                           Fixed-point fractional library routines.
!                                                              (line  326)
  * __usneguhq2:                           Fixed-point fractional library routines.
!                                                              (line  321)
  * __usneguqq2:                           Fixed-point fractional library routines.
!                                                              (line  319)
  * __usnegusa2:                           Fixed-point fractional library routines.
!                                                              (line  328)
  * __usnegusq2:                           Fixed-point fractional library routines.
!                                                              (line  322)
  * __usneguta2:                           Fixed-point fractional library routines.
!                                                              (line  331)
  * __ussubuda3:                           Fixed-point fractional library routines.
!                                                              (line  146)
  * __ussubudq3:                           Fixed-point fractional library routines.
!                                                              (line  140)
  * __ussubuha3:                           Fixed-point fractional library routines.
!                                                              (line  142)
  * __ussubuhq3:                           Fixed-point fractional library routines.
!                                                              (line  136)
  * __ussubuqq3:                           Fixed-point fractional library routines.
!                                                              (line  134)
  * __ussubusa3:                           Fixed-point fractional library routines.
!                                                              (line  144)
  * __ussubusq3:                           Fixed-point fractional library routines.
!                                                              (line  138)
  * __ussubuta3:                           Fixed-point fractional library routines.
!                                                              (line  148)
  * abort:                                 Portability.        (line   20)
  * abs:                                   Arithmetic.         (line  206)
  * abs and attributes:                    Expressions.        (line   83)
*************** Concept Index
*** 54061,54067 ****
  * AS_NEEDS_DASH_FOR_PIPED_INPUT:         Driver.             (line   88)
  * atan2M3 instruction pattern:           Standard Names.     (line 1196)
  * atanM2 instruction pattern:            Standard Names.     (line 1094)
! * atomic:                                GTY Options.        (line  205)
  * atomic_addMODE instruction pattern:    Standard Names.     (line 2700)
  * atomic_add_fetchMODE instruction pattern: Standard Names.  (line 2729)
  * atomic_add_fetch_cmp_0MODE instruction pattern: Standard Names.
--- 54061,54067 ----
  * AS_NEEDS_DASH_FOR_PIPED_INPUT:         Driver.             (line   88)
  * atan2M3 instruction pattern:           Standard Names.     (line 1196)
  * atanM2 instruction pattern:            Standard Names.     (line 1094)
! * atomic:                                GTY Options.        (line  204)
  * atomic_addMODE instruction pattern:    Standard Names.     (line 2700)
  * atomic_add_fetchMODE instruction pattern: Standard Names.  (line 2729)
  * atomic_add_fetch_cmp_0MODE instruction pattern: Standard Names.
*************** Concept Index
*** 56896,56902 ****
  * source code, location information:     Guidelines for Diagnostics.
                                                               (line  183)
  * spaceshipM3 instruction pattern:       Standard Names.     (line 2890)
! * special:                               GTY Options.        (line  246)
  * special predicates:                    Predicates.         (line   31)
  * SPECS:                                 Target Fragment.    (line  194)
  * speculation_barrier instruction pattern: Standard Names.   (line 2498)
--- 56896,56902 ----
  * source code, location information:     Guidelines for Diagnostics.
                                                               (line  183)
  * spaceshipM3 instruction pattern:       Standard Names.     (line 2890)
! * special:                               GTY Options.        (line  245)
  * special predicates:                    Predicates.         (line   31)
  * SPECS:                                 Target Fragment.    (line  194)
  * speculation_barrier instruction pattern: Standard Names.   (line 2498)
*************** Concept Index
*** 58020,58026 ****
  * use:                                   Side Effects.       (line  161)
  * used:                                  Flags.              (line  325)
  * used, in symbol_ref:                   Flags.              (line  211)
! * user:                                  GTY Options.        (line  253)
  * user experience guidelines:            User Experience Guidelines.
                                                               (line    6)
  * user gc:                               User GC.            (line    6)
--- 58020,58026 ----
  * use:                                   Side Effects.       (line  161)
  * used:                                  Flags.              (line  325)
  * used, in symbol_ref:                   Flags.              (line  211)
! * user:                                  GTY Options.        (line  252)
  * user experience guidelines:            User Experience Guidelines.
                                                               (line    6)
  * user gc:                               User GC.            (line    6)
*************** Concept Index
*** 58273,58732 ****
  
  Tag Table:
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! Ref: arm_v8_2a_fp16_scalar_ok241499
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! Ref: arm_simd32_ok246361
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! Node: poly_int388837
! Node: Overview of poly_int390317
! Node: Consequences of using poly_int392921
! Node: Comparisons involving poly_int394556
! Node: Comparison functions for poly_int396194
! Node: Properties of the poly_int comparisons397401
! Node: Comparing potentially-unordered poly_ints399843
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! Node: Checking for a poly_int marker value402778
! Node: Range checks on poly_ints403627
! Node: Sorting poly_ints406281
! Node: Arithmetic on poly_ints407054
! Node: Using poly_int with C++ arithmetic operators407855
! Node: wi arithmetic on poly_ints409386
! Node: Division of poly_ints410238
! Node: Other poly_int arithmetic411745
! Node: Alignment of poly_ints413151
! Node: Computing bounds on poly_ints416428
! Node: Converting poly_ints417817
! Node: Miscellaneous poly_int routines421364
! Node: Guidelines for using poly_int422004
! Node: GENERIC426936
! Node: Deficiencies428758
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! Node: Macros and Functions433123
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! Node: GIMPLE sequences645692
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+ End:
diff -Nrcpad gcc-12.3.0/gcc/doc/gcov-dump.1 gcc-12.4.0/gcc/doc/gcov-dump.1
*** gcc-12.3.0/gcc/doc/gcov-dump.1	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/gcov-dump.1	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
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***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
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! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
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! .    if !\nF==2 \{\
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--- 54,73 ----
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! .nr rF 0
! .if \n(.g .if rF .nr rF 1
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! .        if !\nF==2 \{\
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***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GCOV-DUMP 1"
! .TH GCOV-DUMP 1 "2023-05-08" "gcc-12.3.0" "GNU"
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--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GCOV-DUMP 1"
! .TH GCOV-DUMP 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** any later version published by the Free
*** 197,203 ****
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fIgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
--- 201,207 ----
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fBgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/gcov-tool.1 gcc-12.4.0/gcc/doc/gcov-tool.1
*** gcc-12.3.0/gcc/doc/gcov-tool.1	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/gcov-tool.1	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GCOV-TOOL 1"
! .TH GCOV-TOOL 1 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GCOV-TOOL 1"
! .TH GCOV-TOOL 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** Set the verbose mode.
*** 340,346 ****
  .RE
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7), \fIgcc\fR\|(1), \fIgcov\fR\|(1) and the Info entry for
  \&\fIgcc\fR.
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
--- 344,350 ----
  .RE
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBgfdl\fR\|(7), \fBfsf\-funding\fR\|(7), \fBgcc\fR\|(1), \fBgcov\fR\|(1) and the Info entry for
  \&\fIgcc\fR.
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
*************** any later version published by the Free
*** 352,358 ****
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fIgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
--- 356,362 ----
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fBgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/gcov.1 gcc-12.4.0/gcc/doc/gcov.1
*** gcc-12.3.0/gcc/doc/gcov.1	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/gcov.1	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GCOV 1"
! .TH GCOV 1 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GCOV 1"
! .TH GCOV 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** That can help users to find profile clas
*** 1013,1019 ****
  to a misleading profile.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7), \fIgcc\fR\|(1) and the Info entry for \fIgcc\fR.
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 1996\-2022 Free Software Foundation, Inc.
--- 1017,1023 ----
  to a misleading profile.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBgfdl\fR\|(7), \fBfsf\-funding\fR\|(7), \fBgcc\fR\|(1) and the Info entry for \fIgcc\fR.
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 1996\-2022 Free Software Foundation, Inc.
*************** any later version published by the Free
*** 1024,1030 ****
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fIgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
--- 1028,1034 ----
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fBgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/generic.texi gcc-12.4.0/gcc/doc/generic.texi
*** gcc-12.3.0/gcc/doc/generic.texi	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/doc/generic.texi	Thu Jun 20 08:08:06 2024
*************** vector.  For example @{ 0, 1 @} could be
*** 1144,1150 ****
  one element each or one pattern with two elements (@var{base0} and
  @var{base1}).  The canonical encoding is always the one with the
  fewest patterns or (if both encodings have the same number of
! petterns) the one with the fewest encoded elements.
  
  @samp{vector_cst_encoding_nelts (@var{v})} gives the total number of
  encoded elements in @var{v}, which is 6 in the example above.
--- 1144,1150 ----
  one element each or one pattern with two elements (@var{base0} and
  @var{base1}).  The canonical encoding is always the one with the
  fewest patterns or (if both encodings have the same number of
! patterns) the one with the fewest encoded elements.
  
  @samp{vector_cst_encoding_nelts (@var{v})} gives the total number of
  encoded elements in @var{v}, which is 6 in the example above.
diff -Nrcpad gcc-12.3.0/gcc/doc/gfdl.7 gcc-12.4.0/gcc/doc/gfdl.7
*** gcc-12.3.0/gcc/doc/gfdl.7	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/gfdl.7	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GFDL 7"
! .TH GFDL 7 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GFDL 7"
! .TH GFDL 7 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** free software license, such as the \s-1G
*** 637,643 ****
  to permit their use in free software.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIfsf\-funding\fR\|(7).
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
--- 641,647 ----
  to permit their use in free software.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBfsf\-funding\fR\|(7).
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
diff -Nrcpad gcc-12.3.0/gcc/doc/gfortran.1 gcc-12.4.0/gcc/doc/gfortran.1
*** gcc-12.3.0/gcc/doc/gfortran.1	Mon May  8 12:27:46 2023
--- gcc-12.4.0/gcc/doc/gfortran.1	Thu Jun 20 08:26:15 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GFORTRAN 1"
! .TH GFORTRAN 1 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GFORTRAN 1"
! .TH GFORTRAN 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** For instructions on reporting bugs, see
*** 1777,1784 ****
  <\fBhttps://gcc.gnu.org/bugs/\fR>.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
! \&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIgcc\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIdbx\fR\|(1)
  and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIgfortran\fR, \fIas\fR,
  \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
  .SH "AUTHOR"
--- 1781,1788 ----
  <\fBhttps://gcc.gnu.org/bugs/\fR>.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgpl\fR\|(7), \fBgfdl\fR\|(7), \fBfsf\-funding\fR\|(7),
! \&\fBcpp\fR\|(1), \fBgcov\fR\|(1), \fBgcc\fR\|(1), \fBas\fR\|(1), \fBld\fR\|(1), \fBgdb\fR\|(1), \fBdbx\fR\|(1)
  and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIgfortran\fR, \fIas\fR,
  \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
  .SH "AUTHOR"
*************** under the terms of the \s-1GNU\s0 Free D
*** 1794,1800 ****
  any later version published by the Free Software Foundation; with the
  Invariant Sections being \*(L"Funding Free Software\*(R", the Front-Cover
  Texts being (a) (see below), and with the Back-Cover Texts being (b)
! (see below).  A copy of the license is included in the \fIgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
--- 1798,1804 ----
  any later version published by the Free Software Foundation; with the
  Invariant Sections being \*(L"Funding Free Software\*(R", the Front-Cover
  Texts being (a) (see below), and with the Back-Cover Texts being (b)
! (see below).  A copy of the license is included in the \fBgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/gpl.7 gcc-12.4.0/gcc/doc/gpl.7
*** gcc-12.3.0/gcc/doc/gpl.7	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/gpl.7	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "GPL 7"
! .TH GPL 7 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "GPL 7"
! .TH GPL 7 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** the \s-1GNU\s0 Lesser General Public Lic
*** 837,843 ****
  first, please read <\fBhttps://www.gnu.org/licenses/why\-not\-lgpl.html\fR>.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7).
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 2007 Free Software Foundation, Inc.
--- 841,847 ----
  first, please read <\fBhttps://www.gnu.org/licenses/why\-not\-lgpl.html\fR>.
  .SH "SEE ALSO"
  .IX Header "SEE ALSO"
! \&\fBgfdl\fR\|(7), \fBfsf\-funding\fR\|(7).
  .SH "COPYRIGHT"
  .IX Header "COPYRIGHT"
  Copyright (c) 2007 Free Software Foundation, Inc.
diff -Nrcpad gcc-12.3.0/gcc/doc/install.texi gcc-12.4.0/gcc/doc/install.texi
*** gcc-12.3.0/gcc/doc/install.texi	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/doc/install.texi	Thu Jun 20 08:08:06 2024
*************** tables.
*** 375,380 ****
--- 375,383 ----
  
  Used by @command{automake}.
  
+ If available, enables parallel testing of @samp{libgomp} in case that
+ @command{flock} is not available.
+ 
  @end table
  
  Several support libraries are necessary to build GCC, some are required,
diff -Nrcpad gcc-12.3.0/gcc/doc/invoke.texi gcc-12.4.0/gcc/doc/invoke.texi
*** gcc-12.3.0/gcc/doc/invoke.texi	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/doc/invoke.texi	Thu Jun 20 08:08:06 2024
*************** Objective-C and Objective-C++ Dialects}.
*** 1004,1010 ****
  -mcond-move-float  -mno-cond-move-float @gol
  -memcpy  -mno-memcpy -mstrict-align -mno-strict-align @gol
  -mmax-inline-memcpy-size=@var{n} @gol
! -mcmodel=@var{code-model}}
  
  @emph{M32R/D Options}
  @gccoptlist{-m32r2  -m32rx  -m32r @gol
--- 1004,1010 ----
  -mcond-move-float  -mno-cond-move-float @gol
  -memcpy  -mno-memcpy -mstrict-align -mno-strict-align @gol
  -mmax-inline-memcpy-size=@var{n} @gol
! -mcmodel=@var{code-model} -mrelax -mpass-mrelax-to-as}
  
  @emph{M32R/D Options}
  @gccoptlist{-m32r2  -m32rx  -m32r @gol
*************** See RS/6000 and PowerPC Options.
*** 1434,1440 ****
  -m96bit-long-double  -mlong-double-64  -mlong-double-80  -mlong-double-128 @gol
  -mregparm=@var{num}  -msseregparm @gol
  -mveclibabi=@var{type}  -mvect8-ret-in-mem @gol
! -mpc32  -mpc64  -mpc80  -mstackrealign @gol
  -momit-leaf-frame-pointer  -mno-red-zone  -mno-tls-direct-seg-refs @gol
  -mcmodel=@var{code-model}  -mabi=@var{name}  -maddress-mode=@var{mode} @gol
  -m32  -m64  -mx32  -m16  -miamcu  -mlarge-data-threshold=@var{num} @gol
--- 1434,1440 ----
  -m96bit-long-double  -mlong-double-64  -mlong-double-80  -mlong-double-128 @gol
  -mregparm=@var{num}  -msseregparm @gol
  -mveclibabi=@var{type}  -mvect8-ret-in-mem @gol
! -mpc32  -mpc64  -mpc80 -mdaz-ftz -mstackrealign @gol
  -momit-leaf-frame-pointer  -mno-red-zone  -mno-tls-direct-seg-refs @gol
  -mcmodel=@var{code-model}  -mabi=@var{name}  -maddress-mode=@var{mode} @gol
  -m32  -m64  -mx32  -m16  -miamcu  -mlarge-data-threshold=@var{num} @gol
*************** and Objective-C++ programs:
*** 4521,4530 ****
  Use @var{class-name} as the name of the class to instantiate for each
  literal string specified with the syntax @code{@@"@dots{}"}.  The default
  class name is @code{NXConstantString} if the GNU runtime is being used, and
! @code{NSConstantString} if the NeXT runtime is being used (see below).  The
! @option{-fconstant-cfstrings} option, if also present, overrides the
! @option{-fconstant-string-class} setting and cause @code{@@"@dots{}"} literals
! to be laid out as constant CoreFoundation strings.
  
  @item -fgnu-runtime
  @opindex fgnu-runtime
--- 4521,4532 ----
  Use @var{class-name} as the name of the class to instantiate for each
  literal string specified with the syntax @code{@@"@dots{}"}.  The default
  class name is @code{NXConstantString} if the GNU runtime is being used, and
! @code{NSConstantString} if the NeXT runtime is being used (see below).  On
! Darwin (macOS, MacOS X) platforms, the @option{-fconstant-cfstrings} option, if
! also present, overrides the @option{-fconstant-string-class} setting and cause
! @code{@@"@dots{}"} literals to be laid out as constant CoreFoundation strings.
! Note that @option{-fconstant-cfstrings} is an alias for the target-specific
! @option{-mconstant-cfstrings} equivalent.
  
  @item -fgnu-runtime
  @opindex fgnu-runtime
*************** This warning is enabled by @option{-Wall
*** 6647,6653 ****
  @item -Wmissing-include-dirs @r{(C, C++, Objective-C, Objective-C++ and Fortran only)}
  @opindex Wmissing-include-dirs
  @opindex Wno-missing-include-dirs
! Warn if a user-supplied include directory does not exist. This opions is disabled
  by default for C, C++, Objective-C and Objective-C++. For Fortran, it is partially
  enabled by default by warning for -I and -J, only.
  
--- 6649,6655 ----
  @item -Wmissing-include-dirs @r{(C, C++, Objective-C, Objective-C++ and Fortran only)}
  @opindex Wmissing-include-dirs
  @opindex Wno-missing-include-dirs
! Warn if a user-supplied include directory does not exist. This option is disabled
  by default for C, C++, Objective-C and Objective-C++. For Fortran, it is partially
  enabled by default by warning for -I and -J, only.
  
*************** performance of the code.  Permissible va
*** 19216,19222 ****
  @samp{cortex-a75.cortex-a55}, @samp{cortex-a76.cortex-a55},
  @samp{cortex-r82}, @samp{cortex-x1}, @samp{cortex-x2},
  @samp{cortex-a510}, @samp{cortex-a710}, @samp{ampere1},
! @samp{ampere1a}, @samp{native}.
  
  The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
  @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53},
--- 19218,19224 ----
  @samp{cortex-a75.cortex-a55}, @samp{cortex-a76.cortex-a55},
  @samp{cortex-r82}, @samp{cortex-x1}, @samp{cortex-x2},
  @samp{cortex-a510}, @samp{cortex-a710}, @samp{ampere1},
! @samp{ampere1a}, @samp{cobalt-100} and @samp{native}.
  
  The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
  @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53},
*************** This is by default ON@.
*** 22804,22813 ****
  @opindex gfull
  Emit debugging information for all symbols and types.
  
  @item -mmacosx-version-min=@var{version}
! The earliest version of MacOS X that this executable will run on
! is @var{version}.  Typical values of @var{version} include @code{10.1},
! @code{10.2}, and @code{10.3.9}.
  
  If the compiler was built to use the system's headers by default,
  then the default for this option is the system version on which the
--- 22806,22826 ----
  @opindex gfull
  Emit debugging information for all symbols and types.
  
+ @opindex fconstant-cfstrings
+ @item -fconstant-cfstrings
+ The @option{-fconstant-cfstrings} is an alias for @option{-mconstant-cfstrings}.
+ 
+ @opindex mconstant-cfstrings
+ @item -mconstant-cfstrings
+ When the NeXT runtime is being used (the default on these systems), override
+ any @option{-fconstant-string-class} setting and cause @code{@@"@dots{}"}
+ literals to be laid out as constant CoreFoundation strings.
+ 
+ @opindex mmacosx-version-min
  @item -mmacosx-version-min=@var{version}
! The earliest version of MacOS X that this executable will run on is
! @var{version}.  Typical values supported for @var{version} include @code{12},
! @code{10.12}, and @code{10.5.8}.
  
  If the compiler was built to use the system's headers by default,
  then the default for this option is the system version on which the
*************** global symbol: The data got table must b
*** 24626,24631 ****
--- 24639,24666 ----
  @end itemize
  @end table
  The default code model is @code{normal}.
+ 
+ @item -mrelax
+ @itemx -mno-relax
+ Take (do not take) advantage of linker relaxations.  If
+ @option{-mpass-mrelax-to-as} is enabled, this option is also passed to
+ the assembler.  The default is determined during GCC build-time by
+ detecting corresponding assembler support:
+ @option{-mrelax} if the assembler supports both the @option{-mrelax}
+ option and the conditional branch relaxation (it's required or the
+ @code{.align} directives and conditional branch instructions in the
+ assembly code outputted by GCC may be rejected by the assembler because
+ of a relocation overflow), @option{-mno-relax} otherwise.
+ 
+ @item -mpass-mrelax-to-as
+ @itemx -mno-pass-mrelax-to-as
+ Pass (do not pass) the @option{-mrelax} or @option{-mno-relax} option
+ to the assembler.  The default is determined during GCC build-time by
+ detecting corresponding assembler support:
+ @option{-mpass-mrelax-to-as} if the assembler supports the
+ @option{-mrelax} option, @option{-mno-pass-mrelax-to-as} otherwise.
+ This option is mostly useful for debugging, or interoperation with
+ assemblers different from the build-time one.
  @end table
  
  @node M32C Options
*************** are enabled by default; routines in such
*** 32078,32083 ****
--- 32113,32127 ----
  loss of accuracy, typically through so-called ``catastrophic cancellation'',
  when this option is used to set the precision to less than extended precision.
  
+ @item -mdaz-ftz
+ @opindex mdaz-ftz
+ 
+ The flush-to-zero (FTZ) and denormals-are-zero (DAZ) flags in the MXCSR register
+ are used to control floating-point calculations.SSE and AVX instructions
+ including scalar and vector instructions could benefit from enabling the FTZ
+ and DAZ flags when @option{-mdaz-ftz} is specified. Don't set FTZ/DAZ flags
+ when @option{-mno-daz-ftz} is specified.
+ 
  @item -mstackrealign
  @opindex mstackrealign
  Realign the stack at entry.  On the x86, the @option{-mstackrealign}
*************** on x86-64 processors in 64-bit environme
*** 33092,33098 ****
  Generate code for a 16-bit, 32-bit or 64-bit environment.
  The @option{-m32} option sets @code{int}, @code{long}, and pointer types
  to 32 bits, and
! generates code that runs on any i386 system.
  
  The @option{-m64} option sets @code{int} to 32 bits and @code{long} and pointer
  types to 64 bits, and generates code for the x86-64 architecture.
--- 33136,33142 ----
  Generate code for a 16-bit, 32-bit or 64-bit environment.
  The @option{-m32} option sets @code{int}, @code{long}, and pointer types
  to 32 bits, and
! generates code that runs in 32-bit mode.
  
  The @option{-m64} option sets @code{int} to 32 bits and @code{long} and pointer
  types to 64 bits, and generates code for the x86-64 architecture.
diff -Nrcpad gcc-12.3.0/gcc/doc/lto-dump.1 gcc-12.4.0/gcc/doc/lto-dump.1
*** gcc-12.3.0/gcc/doc/lto-dump.1	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/doc/lto-dump.1	Thu Jun 20 08:11:52 2024
***************
*** 1,4 ****
! .\" Automatically generated by Pod::Man 4.09 (Pod::Simple 3.35)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
--- 1,4 ----
! .\" Automatically generated by Pod::Man 4.14 (Pod::Simple 3.43)
  .\"
  .\" Standard preamble:
  .\" ========================================================================
***************
*** 54,69 ****
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .if !\nF .nr F 0
! .if \nF>0 \{\
! .    de IX
! .    tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .    if !\nF==2 \{\
! .        nr % 0
! .        nr F 2
  .    \}
  .\}
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
--- 54,73 ----
  .\" Avoid warning from groff about undefined register 'F'.
  .de IX
  ..
! .nr rF 0
! .if \n(.g .if rF .nr rF 1
! .if (\n(rF:(\n(.g==0)) \{\
! .    if \nF \{\
! .        de IX
! .        tm Index:\\$1\t\\n%\t"\\$2"
  ..
! .        if !\nF==2 \{\
! .            nr % 0
! .            nr F 2
! .        \}
  .    \}
  .\}
+ .rr rF
  .\"
  .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
  .\" Fear.  Run.  Save yourself.  No user-serviceable parts.
***************
*** 129,135 ****
  .\" ========================================================================
  .\"
  .IX Title "LTO-DUMP 1"
! .TH LTO-DUMP 1 "2023-05-08" "gcc-12.3.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
--- 133,139 ----
  .\" ========================================================================
  .\"
  .IX Title "LTO-DUMP 1"
! .TH LTO-DUMP 1 "2024-06-20" "gcc-12.4.0" "GNU"
  .\" For nroff, turn off justification.  Always turn off hyphenation; it makes
  .\" way too many mistakes in technical documents.
  .if n .ad l
*************** any later version published by the Free
*** 218,224 ****
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fIgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
--- 222,228 ----
  Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
  Free Software\*(R", the Front-Cover texts being (a) (see below), and with
  the Back-Cover Texts being (b) (see below).  A copy of the license is
! included in the \fBgfdl\fR\|(7) man page.
  .PP
  (a) The \s-1FSF\s0's Front-Cover Text is:
  .PP
diff -Nrcpad gcc-12.3.0/gcc/doc/rtl.texi gcc-12.4.0/gcc/doc/rtl.texi
*** gcc-12.3.0/gcc/doc/rtl.texi	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/doc/rtl.texi	Thu Jun 20 08:08:06 2024
*************** vector.  For example @{ 0, 1 @} could be
*** 1843,1849 ****
  one element each or one pattern with two elements (@var{base0} and
  @var{base1}).  The canonical encoding is always the one with the
  fewest patterns or (if both encodings have the same number of
! petterns) the one with the fewest encoded elements.
  
  @samp{const_vector_encoding_nelts (@var{v})} gives the total number of
  encoded elements in @var{v}, which is 6 in the example above.
--- 1843,1849 ----
  one element each or one pattern with two elements (@var{base0} and
  @var{base1}).  The canonical encoding is always the one with the
  fewest patterns or (if both encodings have the same number of
! patterns) the one with the fewest encoded elements.
  
  @samp{const_vector_encoding_nelts (@var{v})} gives the total number of
  encoded elements in @var{v}, which is 6 in the example above.
diff -Nrcpad gcc-12.3.0/gcc/dwarf2out.cc gcc-12.4.0/gcc/dwarf2out.cc
*** gcc-12.3.0/gcc/dwarf2out.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/dwarf2out.cc	Thu Jun 20 08:08:06 2024
*************** process_scope_var (tree stmt, tree decl,
*** 26508,26514 ****
  
    if (die != NULL && die->die_parent == NULL)
      add_child_die (context_die, die);
!   else if (TREE_CODE (decl_or_origin) == IMPORTED_DECL)
      {
        if (early_dwarf)
  	dwarf2out_imported_module_or_decl_1 (decl_or_origin, DECL_NAME (decl_or_origin),
--- 26508,26515 ----
  
    if (die != NULL && die->die_parent == NULL)
      add_child_die (context_die, die);
! 
!   if (TREE_CODE (decl_or_origin) == IMPORTED_DECL)
      {
        if (early_dwarf)
  	dwarf2out_imported_module_or_decl_1 (decl_or_origin, DECL_NAME (decl_or_origin),
*************** prune_unused_types_walk (dw_die_ref die)
*** 30107,30114 ****
--- 30108,30120 ----
      case DW_TAG_reference_type:
      case DW_TAG_rvalue_reference_type:
      case DW_TAG_volatile_type:
+     case DW_TAG_restrict_type:
+     case DW_TAG_shared_type:
+     case DW_TAG_atomic_type:
+     case DW_TAG_immutable_type:
      case DW_TAG_typedef:
      case DW_TAG_array_type:
+     case DW_TAG_coarray_type:
      case DW_TAG_friend:
      case DW_TAG_enumeration_type:
      case DW_TAG_subroutine_type:
*************** prune_unused_types_walk (dw_die_ref die)
*** 30117,30122 ****
--- 30123,30130 ----
      case DW_TAG_subrange_type:
      case DW_TAG_ptr_to_member_type:
      case DW_TAG_file_type:
+     case DW_TAG_unspecified_type:
+     case DW_TAG_dynamic_type:
        /* Type nodes are useful only when other DIEs reference them --- don't
  	 mark them.  */
        /* FALLTHROUGH */
*************** dwarf2out_finish (const char *filename)
*** 32154,32177 ****
        reset_dies (comp_unit_die ());
        for (limbo_die_node *node = cu_die_list; node; node = node->next)
  	reset_dies (node->die);
- 
-       hash_table comdat_type_table (100);
        for (ctnode = comdat_type_list; ctnode != NULL; ctnode = ctnode->next)
  	{
- 	  comdat_type_node **slot
- 	      = comdat_type_table.find_slot (ctnode, INSERT);
- 
- 	  /* Don't reset types twice.  */
- 	  if (*slot != HTAB_EMPTY_ENTRY)
- 	    continue;
- 
  	  /* Remove the pointer to the line table.  */
  	  remove_AT (ctnode->root_die, DW_AT_stmt_list);
- 
  	  if (debug_info_level >= DINFO_LEVEL_TERSE)
  	    reset_dies (ctnode->root_die);
- 
- 	  *slot = ctnode;
  	}
  
        /* Reset die CU symbol so we don't output it twice.  */
--- 32162,32173 ----
diff -Nrcpad gcc-12.3.0/gcc/fold-const.cc gcc-12.4.0/gcc/fold-const.cc
*** gcc-12.3.0/gcc/fold-const.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fold-const.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 84,89 ****
--- 84,90 ----
  #include "vec-perm-indices.h"
  #include "asan.h"
  #include "gimple-range.h"
+ #include "internal-fn.h"
  
  /* Nonzero if we are folding constants inside an initializer or a C++
     manifestly-constant-evaluated context; zero otherwise.
*************** static tree
*** 6188,6194 ****
  merge_truthop_with_opposite_arm (location_t loc, tree op, tree cmpop,
  				 bool rhs_only)
  {
-   tree type = TREE_TYPE (cmpop);
    enum tree_code code = TREE_CODE (cmpop);
    enum tree_code truthop_code = TREE_CODE (op);
    tree lhs = TREE_OPERAND (op, 0);
--- 6189,6194 ----
*************** merge_truthop_with_opposite_arm (locatio
*** 6204,6209 ****
--- 6204,6211 ----
    if (TREE_CODE_CLASS (code) != tcc_comparison)
      return NULL_TREE;
  
+   tree type = TREE_TYPE (TREE_OPERAND (cmpop, 0));
+ 
    if (rhs_code == truthop_code)
      {
        tree newrhs = merge_truthop_with_opposite_arm (loc, rhs, cmpop, rhs_only);
*************** native_encode_initializer (tree init, un
*** 8422,8427 ****
--- 8424,8431 ----
  		  if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN)
  		    return 0;
  
+ 		  if (TREE_CODE (val) == NON_LVALUE_EXPR)
+ 		    val = TREE_OPERAND (val, 0);
  		  if (TREE_CODE (val) != INTEGER_CST)
  		    return 0;
  
*************** multiple_of_p (tree type, const_tree top
*** 14273,14279 ****
  	      && TREE_CODE (op2) == INTEGER_CST
  	      && integer_pow2p (bottom)
  	      && wi::multiple_of_p (wi::to_widest (op2),
! 				    wi::to_widest (bottom), UNSIGNED))
  	    return 1;
  
  	  op1 = gimple_assign_rhs1 (stmt);
--- 14277,14283 ----
  	      && TREE_CODE (op2) == INTEGER_CST
  	      && integer_pow2p (bottom)
  	      && wi::multiple_of_p (wi::to_widest (op2),
! 				    wi::to_widest (bottom), SIGNED))
  	    return 1;
  
  	  op1 = gimple_assign_rhs1 (stmt);
*************** tree_call_nonnegative_warnv_p (tree type
*** 14858,14864 ****
      CASE_CFN_FFS:
      CASE_CFN_PARITY:
      CASE_CFN_POPCOUNT:
-     CASE_CFN_CLZ:
      CASE_CFN_CLRSB:
      case CFN_BUILT_IN_BSWAP16:
      case CFN_BUILT_IN_BSWAP32:
--- 14862,14867 ----
*************** tree_call_nonnegative_warnv_p (tree type
*** 14867,14872 ****
--- 14870,14891 ----
        /* Always true.  */
        return true;
  
+     CASE_CFN_CLZ:
+       if (fn != CFN_CLZ)
+ 	return true;
+       else if (INTEGRAL_TYPE_P (TREE_TYPE (arg0)))
+ 	{
+ 	  tree atype = TREE_TYPE (arg0);
+ 	  int val = 0;
+ 	  if (direct_internal_fn_supported_p (IFN_CLZ, atype,
+ 					      OPTIMIZE_FOR_BOTH)
+ 	      && CLZ_DEFINED_VALUE_AT_ZERO (SCALAR_INT_TYPE_MODE (atype),
+ 					    val) == 2
+ 	      && val >= 0)
+ 	    return true;
+ 	}
+       break;
+ 
      CASE_CFN_SQRT:
      CASE_CFN_SQRT_FN:
        /* sqrt(-0.0) is -0.0.  */
diff -Nrcpad gcc-12.3.0/gcc/fortran/ChangeLog gcc-12.4.0/gcc/fortran/ChangeLog
*** gcc-12.3.0/gcc/fortran/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/fortran/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,206 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-05-28  Tobias Burnus  
+ 
+ 	Backported from master:
+ 	2024-05-20  Tobias Burnus  
+ 
+ 	PR fortran/115150
+ 	* trans-intrinsic.cc (gfc_conv_intrinsic_bound): Fix SHAPE
+ 	for zero-size arrays
+ 
+ 2024-05-06  Paul Thomas  
+ 
+ 	Backported from master:
+ 	2024-04-02  Paul Thomas  
+ 
+ 	PR fortran/106999
+ 	* interface.cc (gfc_compare_interfaces): Add error for a
+ 	subroutine proc pointer passed to a variable formal.
+ 	(compare_parameter): If a procedure pointer is being passed to
+ 	a non-procedure formal arg, and there is an an interface, use
+ 	gfc_compare_interfaces to check and provide a more useful error
+ 	message.
+ 
+ 2024-05-06  Paul Thomas  
+ 
+ 	Backported from master:
+ 	2024-05-06  Paul Thomas  
+ 
+ 	PR fortran/114739
+ 	* primary.cc (gfc_match_varspec): Check for default type before
+ 	checking for derived types with the right component name.
+ 
+ 2024-04-26  Paul Thomas  
+ 
+ 	Backported from master:
+ 	2023-05-23  Paul Thomas  
+ 
+ 	PR fortran/103716
+ 	* resolve.cc (gfc_resolve_ref): Conversion of array_ref into an
+ 	element should be done for all characters without a len expr,
+ 	not just deferred lens, and for integer expressions.
+ 	* trans-expr.cc (conv_inquiry): For len and kind inquiry refs,
+ 	set the se string_length to NULL_TREE.
+ 
+ 2024-04-26  Andre Vehreschild  
+ 
+ 	Backported from master:
+ 	2023-07-12  Andre Vehreschild  
+ 
+ 	PR fortran/102003
+ 	* expr.cc (find_inquiry_ref): Replace len of pdt_string by
+ 	constant.
+ 	(simplify_ref_chain): Ensure input to find_inquiry_ref is
+ 	NULL.
+ 	(gfc_match_init_expr): Prevent PDT analysis for function calls.
+ 	(gfc_pdt_find_component_copy_initializer): Get the initializer
+ 	value for given component.
+ 	* gfortran.h (gfc_pdt_find_component_copy_initializer): New
+ 	function.
+ 	* simplify.cc (gfc_simplify_len): Replace len() of PDT with pdt
+ 	component ref or constant.
+ 
+ 2024-04-06  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2024-03-28  Harald Anlauf  
+ 
+ 	PR fortran/114474
+ 	* primary.cc (gfc_variable_attr): Catch variables used in structure
+ 	constructors within DATA statements that are still tagged with a
+ 	temporary type BT_PROCEDURE from match_actual_arg and which have the
+ 	target attribute, and fix their typespec.
+ 
+ 2024-04-02  Mikael Morin  
+ 
+ 	Backported from master:
+ 	2024-03-22  Mikael Morin  
+ 
+ 	PR fortran/107426
+ 	* gfortran.h (gfc_save_module_list, gfc_restore_old_module_list):
+ 	New declarations.
+ 	* module.cc (old_module_list_tail): New global variable.
+ 	(gfc_save_module_list, gfc_restore_old_module_list): New functions.
+ 	(gfc_use_modules): Set module_list and old_module_list_tail.
+ 	* parse.cc (next_statement): Save module_list before doing any work.
+ 	(reject_statement): Restore module_list to its saved value.
+ 
+ 2024-03-29  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2024-03-29  Harald Anlauf  
+ 
+ 	PR fortran/50410
+ 	* trans-expr.cc (gfc_conv_structure): Check for NULL pointer.
+ 
+ 2024-03-20  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2024-03-18  Harald Anlauf  
+ 
+ 	PR fortran/103715
+ 	* frontend-passes.cc (check_externals_expr): Prevent invalid read
+ 	in case of mismatch of external subroutine with function.
+ 
+ 2024-02-09  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2024-01-27  Harald Anlauf  
+ 
+ 	PR fortran/104908
+ 	* trans-array.cc (gfc_conv_array_ref): Restrict use of transformed
+ 	descriptor (sym->backend_decl) to the unlimited polymorphic case.
+ 
+ 2023-12-01  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2023-11-26  Harald Anlauf  
+ 
+ 	PR fortran/111880
+ 	* resolve.cc (resolve_common_vars): Do not call gfc_add_in_common
+ 	for symbols that are USE associated or used in a submodule.
+ 
+ 2023-10-21  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2023-10-17  Harald Anlauf  
+ 
+ 	PR fortran/111837
+ 	* frontend-passes.cc (traverse_io_block): Dependency check of loop
+ 	nest shall be triangular, not banded.
+ 
+ 2023-08-06  Steve Kargl  
+ 
+ 	Backported from master:
+ 	2022-12-18  Steve Kargl  
+ 
+ 	PR fortran/107397
+ 	* decl.cc (add_init_expr_to_sym): Add check with new error message.
+ 
+ 2023-07-20  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2023-07-17  Harald Anlauf  
+ 
+ 	PR fortran/95947
+ 	PR fortran/110658
+ 	* trans-expr.cc (gfc_conv_procedure_call): For intrinsic procedures
+ 	whose result characteristics depends on the first argument and which
+ 	can be of type character, the character length will not be deferred.
+ 
+ 2023-07-14  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2023-07-11  Harald Anlauf  
+ 
+ 	PR fortran/110288
+ 	* symbol.cc (gfc_copy_formal_args_intr): When deriving the formal
+ 	argument attributes from the actual ones for intrinsic procedure
+ 	calls, take special care of CHARACTER arguments that we do not
+ 	wrongly treat them formally as deferred-length.
+ 
+ 2023-07-08  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2023-07-08  Harald Anlauf  
+ 
+ 	PR fortran/110585
+ 	* arith.cc (gfc_compare_expr): Handle equality comparison of constant
+ 	complex gfc_expr arguments.
+ 
+ 2023-06-09  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-06-09  Jakub Jelinek  
+ 
+ 	PR fortran/96024
+ 	* primary.cc (gfc_convert_to_structure_constructor): Only do
+ 	constant string ctor length verification and truncation/padding
+ 	if constant length has INTEGER type.
+ 
+ 2023-06-04  Steve Kargl  
+ 
+ 	Backported from master:
+ 	2023-06-02  Steve Kargl  
+ 
+ 	PR fortran/100607
+ 	* resolve.cc (resolve_select_rank): Remove duplicate error.
+ 	(resolve_fl_var_and_proc): Prevent NULL pointer dereference and
+ 	suppress error message for temporary.
+ 
+ 2023-05-20  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2023-05-15  Harald Anlauf  
+ 
+ 	PR fortran/109846
+ 	* expr.cc (gfc_check_vardef_context): Check appropriate pointer
+ 	attribute for CLASS vs. non-CLASS function result in variable
+ 	definition context.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/fortran/arith.cc gcc-12.4.0/gcc/fortran/arith.cc
*** gcc-12.3.0/gcc/fortran/arith.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/arith.cc	Thu Jun 20 08:08:06 2024
*************** gfc_compare_expr (gfc_expr *op1, gfc_exp
*** 1080,1085 ****
--- 1080,1090 ----
  	    || (op1->value.logical && !op2->value.logical));
        break;
  
+     case BT_COMPLEX:
+       gcc_assert (op == INTRINSIC_EQ);
+       rc = mpc_cmp (op1->value.complex, op2->value.complex);
+       break;
+ 
      default:
        gfc_internal_error ("gfc_compare_expr(): Bad basic type");
      }
diff -Nrcpad gcc-12.3.0/gcc/fortran/decl.cc gcc-12.4.0/gcc/fortran/decl.cc
*** gcc-12.3.0/gcc/fortran/decl.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/decl.cc	Thu Jun 20 08:08:06 2024
*************** add_init_expr_to_sym (const char *name,
*** 2220,2225 ****
--- 2220,2233 ----
  	    sym->ts.f90_type = init->ts.f90_type;
  	}
  
+       /* Catch the case:  type(t), parameter :: x = z'1'.  */
+       if (sym->ts.type == BT_DERIVED && init->ts.type == BT_BOZ)
+ 	{
+ 	  gfc_error ("Entity %qs at %L is incompatible with a BOZ "
+ 		     "literal constant", name, &sym->declared_at);
+ 	  return false;
+ 	}
+ 
        /* Add initializer.  Make sure we keep the ranks sane.  */
        if (sym->attr.dimension && init->rank == 0)
  	{
diff -Nrcpad gcc-12.3.0/gcc/fortran/expr.cc gcc-12.4.0/gcc/fortran/expr.cc
*** gcc-12.3.0/gcc/fortran/expr.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/expr.cc	Thu Jun 20 08:08:06 2024
*************** find_inquiry_ref (gfc_expr *p, gfc_expr
*** 1850,1855 ****
--- 1850,1862 ----
  	  else if (tmp->expr_type == EXPR_CONSTANT)
  	    *newp = gfc_get_int_expr (gfc_default_integer_kind,
  				      NULL, tmp->value.character.length);
+ 	  else if (gfc_init_expr_flag
+ 		   && tmp->ts.u.cl->length->symtree->n.sym->attr.pdt_len)
+ 	    *newp = gfc_pdt_find_component_copy_initializer (tmp->symtree->n
+ 							     .sym,
+ 							     tmp->ts.u.cl
+ 							     ->length->symtree
+ 							     ->n.sym->name);
  	  else
  	    goto cleanup;
  
*************** find_inquiry_ref (gfc_expr *p, gfc_expr
*** 1890,1896 ****
  		    mpc_imagref (tmp->value.complex), GFC_RND_MODE);
  	  break;
  	}
!       tmp = gfc_copy_expr (*newp);
      }
  
    if (!(*newp))
--- 1897,1905 ----
  		    mpc_imagref (tmp->value.complex), GFC_RND_MODE);
  	  break;
  	}
!       // TODO: Fix leaking expr tmp, when simplify is done twice.
!       if (inquiry->next)
! 	gfc_replace_expr (tmp, *newp);
      }
  
    if (!(*newp))
*************** static bool
*** 2055,2061 ****
  simplify_ref_chain (gfc_ref *ref, int type, gfc_expr **p)
  {
    int n;
!   gfc_expr *newp;
  
    for (; ref; ref = ref->next)
      {
--- 2064,2070 ----
  simplify_ref_chain (gfc_ref *ref, int type, gfc_expr **p)
  {
    int n;
!   gfc_expr *newp = NULL;
  
    for (; ref; ref = ref->next)
      {
*************** gfc_match_init_expr (gfc_expr **result)
*** 3217,3223 ****
        return m;
      }
  
!   if (gfc_derived_parameter_expr (expr))
      {
        *result = expr;
        gfc_init_expr_flag = false;
--- 3226,3232 ----
        return m;
      }
  
!   if (expr->expr_type != EXPR_FUNCTION && gfc_derived_parameter_expr (expr))
      {
        *result = expr;
        gfc_init_expr_flag = false;
*************** gfc_check_vardef_context (gfc_expr* e, b
*** 6254,6260 ****
        && !(sym->attr.flavor == FL_PROCEDURE && sym == sym->result)
        && !(sym->attr.flavor == FL_PROCEDURE && sym->attr.proc_pointer)
        && !(sym->attr.flavor == FL_PROCEDURE
! 	   && sym->attr.function && sym->attr.pointer))
      {
        if (context)
  	gfc_error ("%qs in variable definition context (%s) at %L is not"
--- 6263,6269 ----
        && !(sym->attr.flavor == FL_PROCEDURE && sym == sym->result)
        && !(sym->attr.flavor == FL_PROCEDURE && sym->attr.proc_pointer)
        && !(sym->attr.flavor == FL_PROCEDURE
! 	   && sym->attr.function && attr.pointer))
      {
        if (context)
  	gfc_error ("%qs in variable definition context (%s) at %L is not"
*************** gfc_check_vardef_context (gfc_expr* e, b
*** 6530,6532 ****
--- 6539,6557 ----
  
    return true;
  }
+ 
+ gfc_expr*
+ gfc_pdt_find_component_copy_initializer (gfc_symbol *sym, const char *name)
+ {
+   /* The actual length of a pdt is in its components.  In the
+      initializer of the current ref is only the default value.
+      Therefore traverse the chain of components and pick the correct
+      one's initializer expressions.  */
+   for (gfc_component *comp = sym->ts.u.derived->components; comp != NULL;
+        comp = comp->next)
+     {
+       if (!strcmp (comp->name, name))
+ 	return gfc_copy_expr (comp->initializer);
+     }
+   return NULL;
+ }
diff -Nrcpad gcc-12.3.0/gcc/fortran/frontend-passes.cc gcc-12.4.0/gcc/fortran/frontend-passes.cc
*** gcc-12.3.0/gcc/fortran/frontend-passes.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/frontend-passes.cc	Thu Jun 20 08:08:06 2024
*************** traverse_io_block (gfc_code *code, bool
*** 1326,1332 ****
        if (iters[i])
  	{
  	  gfc_expr *var = iters[i]->var;
! 	  for (int j = i - 1; j < i; j++)
  	    {
  	      if (iters[j]
  		  && (var_in_expr (var, iters[j]->start)
--- 1326,1332 ----
        if (iters[i])
  	{
  	  gfc_expr *var = iters[i]->var;
! 	  for (int j = 0; j < i; j++)
  	    {
  	      if (iters[j]
  		  && (var_in_expr (var, iters[j]->start)
*************** check_externals_expr (gfc_expr **ep, int
*** 5794,5799 ****
--- 5794,5802 ----
    if (e->expr_type != EXPR_FUNCTION)
      return 0;
  
+   if (e->symtree && e->symtree->n.sym->attr.subroutine)
+     return 0;
+ 
    sym = e->value.function.esym;
    if (sym == NULL)
      return 0;
diff -Nrcpad gcc-12.3.0/gcc/fortran/gfortran.h gcc-12.4.0/gcc/fortran/gfortran.h
*** gcc-12.3.0/gcc/fortran/gfortran.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/gfortran.h	Thu Jun 20 08:08:06 2024
*************** gfc_expr* gfc_find_stat_co (gfc_expr *);
*** 3667,3672 ****
--- 3667,3673 ----
  gfc_expr* gfc_build_intrinsic_call (gfc_namespace *, gfc_isym_id, const char*,
  				    locus, unsigned, ...);
  bool gfc_check_vardef_context (gfc_expr*, bool, bool, bool, const char*);
+ gfc_expr* gfc_pdt_find_component_copy_initializer (gfc_symbol *, const char *);
  
  
  /* st.cc */
*************** void gfc_module_done_2 (void);
*** 3800,3805 ****
--- 3801,3808 ----
  void gfc_dump_module (const char *, int);
  bool gfc_check_symbol_access (gfc_symbol *);
  void gfc_free_use_stmts (gfc_use_list *);
+ void gfc_save_module_list ();
+ void gfc_restore_old_module_list ();
  const char *gfc_dt_lower_string (const char *);
  const char *gfc_dt_upper_string (const char *);
  
diff -Nrcpad gcc-12.3.0/gcc/fortran/gfortran.info gcc-12.4.0/gcc/fortran/gfortran.info
*** gcc-12.3.0/gcc/fortran/gfortran.info	Mon May  8 12:27:48 2023
--- gcc-12.4.0/gcc/fortran/gfortran.info	Thu Jun 20 08:26:18 2024
***************
*** 1,4 ****
! This is gfortran.info, produced by makeinfo version 6.5 from
  gfortran.texi.
  
  Copyright (C) 1999-2022 Free Software Foundation, Inc.
--- 1,4 ----
! This is gfortran.info, produced by makeinfo version 6.8 from
  gfortran.texi.
  
  Copyright (C) 1999-2022 Free Software Foundation, Inc.
*************** the other form by either removing 'no-'
*** 1597,1603 ****
  
       Use of '-fno-underscoring' is not recommended unless you are
       experimenting with issues such as integration of GNU Fortran into
!      existing system environments (vis-a`-vis existing libraries, tools,
       and so on).
  
       For example, with '-funderscoring', and assuming that 'j()' and
--- 1597,1603 ----
  
       Use of '-fno-underscoring' is not recommended unless you are
       experimenting with issues such as integration of GNU Fortran into
!      existing system environments (vis-à-vis existing libraries, tools,
       and so on).
  
       For example, with '-funderscoring', and assuming that 'j()' and
*************** significant help to the GNU Fortran proj
*** 19616,19622 ****
     - Steven Bosscher
     - Paul Brook
     - Tobias Burnus
!    - Franc,ois-Xavier Coudert
     - Bud Davis
     - Jerry DeLisle
     - Erik Edelmann
--- 19616,19622 ----
     - Steven Bosscher
     - Paul Brook
     - Tobias Burnus
!    - François-Xavier Coudert
     - Bud Davis
     - Jerry DeLisle
     - Erik Edelmann
*************** significant help to the GNU Fortran proj
*** 19638,19644 ****
     - Tim Prince
     - Christopher D. Rickett
     - Richard Sandiford
!    - Tobias Schlu"ter
     - Roger Sayle
     - Paul Thomas
     - Andy Vaught
--- 19638,19644 ----
     - Tim Prince
     - Christopher D. Rickett
     - Richard Sandiford
!    - Tobias Schlüter
     - Roger Sayle
     - Paul Thomas
     - Andy Vaught
*************** patches, and much needed feedback and en
*** 19651,19657 ****
  project:
  
     - Bill Clodius
!    - Dominique d'Humie`res
     - Kate Hedstrom
     - Erik Schnetter
     - Gerhard Steinmetz
--- 19651,19657 ----
  project:
  
     - Bill Clodius
!    - Dominique d'Humières
     - Kate Hedstrom
     - Erik Schnetter
     - Gerhard Steinmetz
*************** Node: Option Index767842
*** 23171,23173 ****
--- 23171,23178 ----
  Node: Keyword Index786903
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/gcc/fortran/interface.cc gcc-12.4.0/gcc/fortran/interface.cc
*** gcc-12.3.0/gcc/fortran/interface.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/interface.cc	Thu Jun 20 08:08:06 2024
*************** gfc_compare_interfaces (gfc_symbol *s1,
*** 1746,1751 ****
--- 1746,1759 ----
        return false;
      }
  
+   if (s2->attr.subroutine && s1->attr.flavor == FL_VARIABLE)
+     {
+       if (errmsg != NULL)
+ 	snprintf (errmsg, err_len, "subroutine proc pointer '%s' passed "
+ 		  "to dummy variable '%s'", name2, s1->name);
+       return false;
+     }
+ 
    /* Do strict checks on all characteristics
       (for dummy procedures and procedure pointer assignments).  */
    if (!generic_flag && strict_flag)
*************** compare_parameter (gfc_symbol *formal, g
*** 2381,2392 ****
      {
        gfc_symbol *act_sym = actual->symtree->n.sym;
  
!       if (formal->attr.flavor != FL_PROCEDURE)
  	{
  	  if (where)
  	    gfc_error ("Invalid procedure argument at %L", &actual->where);
  	  return false;
  	}
  
        if (!gfc_compare_interfaces (formal, act_sym, act_sym->name, 0, 1, err,
  				   sizeof(err), NULL, NULL))
--- 2389,2410 ----
      {
        gfc_symbol *act_sym = actual->symtree->n.sym;
  
!       if (formal->attr.flavor != FL_PROCEDURE && !act_sym->ts.interface)
  	{
  	  if (where)
  	    gfc_error ("Invalid procedure argument at %L", &actual->where);
  	  return false;
  	}
+       else if (act_sym->ts.interface
+ 	       && !gfc_compare_interfaces (formal, act_sym->ts.interface,
+ 					   act_sym->name, 0, 1, err,
+ 					   sizeof(err),NULL, NULL))
+ 	{
+ 	  if (where)
+ 	    gfc_error_opt (0, "Interface mismatch in dummy procedure %qs at %L:"
+ 			   " %s", formal->name, &actual->where, err);
+ 	  return false;
+ 	}
  
        if (!gfc_compare_interfaces (formal, act_sym, act_sym->name, 0, 1, err,
  				   sizeof(err), NULL, NULL))
diff -Nrcpad gcc-12.3.0/gcc/fortran/module.cc gcc-12.4.0/gcc/fortran/module.cc
*** gcc-12.3.0/gcc/fortran/module.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/module.cc	Thu Jun 20 08:08:06 2024
*************** static const char *module_name;
*** 195,201 ****
--- 195,206 ----
  /* The name of the .smod file that the submodule will write to.  */
  static const char *submodule_name;
  
+ /* The list of use statements to apply to the current namespace
+    before parsing the non-use statements.  */
  static gfc_use_list *module_list;
+ /* The end of the MODULE_LIST list above at the time the recognition
+    of the current statement started.  */
+ static gfc_use_list **old_module_list_tail;
  
  /* If we're reading an intrinsic module, this is its ID.  */
  static intmod_id current_intmod;
*************** gfc_use_modules (void)
*** 7542,7547 ****
--- 7547,7554 ----
        gfc_use_module (module_list);
        free (module_list);
      }
+   module_list = NULL;
+   old_module_list_tail = &module_list;
    gfc_rename_list = NULL;
  }
  
*************** gfc_free_use_stmts (gfc_use_list *use_st
*** 7565,7570 ****
--- 7572,7601 ----
  }
  
  
+ /* Remember the end of the MODULE_LIST list, so that the list can be restored
+    to its previous state if the current statement is erroneous.  */
+ 
+ void
+ gfc_save_module_list ()
+ {
+   gfc_use_list **tail = &module_list;
+   while (*tail != NULL)
+     tail = &(*tail)->next;
+   old_module_list_tail = tail;
+ }
+ 
+ 
+ /* Restore the MODULE_LIST list to its previous value and free the use
+    statements that are no longer part of the list.  */
+ 
+ void
+ gfc_restore_old_module_list ()
+ {
+   gfc_free_use_stmts (*old_module_list_tail);
+   *old_module_list_tail = NULL;
+ }
+ 
+ 
  void
  gfc_module_init_2 (void)
  {
diff -Nrcpad gcc-12.3.0/gcc/fortran/parse.cc gcc-12.4.0/gcc/fortran/parse.cc
*** gcc-12.3.0/gcc/fortran/parse.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/parse.cc	Thu Jun 20 08:08:06 2024
*************** next_statement (void)
*** 1600,1605 ****
--- 1600,1606 ----
    locus old_locus;
  
    gfc_enforce_clean_symbol_state ();
+   gfc_save_module_list ();
  
    gfc_new_block = NULL;
  
*************** reject_statement (void)
*** 2875,2880 ****
--- 2876,2884 ----
  
    gfc_reject_data (gfc_current_ns);
  
+   /* Don't queue use-association of a module if we reject the use statement.  */
+   gfc_restore_old_module_list ();
+ 
    gfc_new_block = NULL;
    gfc_undo_symbols ();
    gfc_clear_warning ();
diff -Nrcpad gcc-12.3.0/gcc/fortran/primary.cc gcc-12.4.0/gcc/fortran/primary.cc
*** gcc-12.3.0/gcc/fortran/primary.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/primary.cc	Thu Jun 20 08:08:06 2024
*************** gfc_match_varspec (gfc_expr *primary, in
*** 2207,2212 ****
--- 2207,2221 ----
        match mm;
        old_loc = gfc_current_locus;
        mm = gfc_match_name (name);
+ 
+       /* Check to see if this has a default type.  */
+       if (sym->ts.type == BT_UNKNOWN && tgt_expr == NULL
+ 	  && gfc_get_default_type (sym->name, sym->ns)->type != BT_UNKNOWN)
+ 	{
+ 	  gfc_set_default_type (sym, 0, sym->ns);
+ 	  primary->ts = sym->ts;
+ 	}
+ 
        if (mm == MATCH_YES && is_inquiry_ref (name, &tmp))
  	inquiry = true;
        gfc_current_locus = old_loc;
*************** gfc_variable_attr (gfc_expr *expr, gfc_t
*** 2664,2669 ****
--- 2673,2690 ----
    if (ts != NULL && expr->ts.type == BT_UNKNOWN)
      *ts = sym->ts;
  
+   /* Catch left-overs from match_actual_arg, where an actual argument of a
+      procedure is given a temporary ts.type == BT_PROCEDURE.  The fixup is
+      needed for structure constructors in DATA statements, where a pointer
+      is associated with a data target, and the argument has not been fully
+      resolved yet.  Components references are dealt with further below.  */
+   if (ts != NULL
+       && expr->ts.type == BT_PROCEDURE
+       && expr->ref == NULL
+       && attr.flavor != FL_PROCEDURE
+       && attr.target)
+     *ts = sym->ts;
+ 
    has_inquiry_part = false;
    for (ref = expr->ref; ref; ref = ref->next)
      if (ref->type == REF_INQUIRY)
*************** gfc_convert_to_structure_constructor (gf
*** 3196,3205 ****
  	goto cleanup;
  
        /* For a constant string constructor, make sure the length is
! 	 correct; truncate of fill with blanks if needed.  */
        if (this_comp->ts.type == BT_CHARACTER && !this_comp->attr.allocatable
  	  && this_comp->ts.u.cl && this_comp->ts.u.cl->length
  	  && this_comp->ts.u.cl->length->expr_type == EXPR_CONSTANT
  	  && actual->expr->ts.type == BT_CHARACTER
  	  && actual->expr->expr_type == EXPR_CONSTANT)
  	{
--- 3217,3227 ----
  	goto cleanup;
  
        /* For a constant string constructor, make sure the length is
! 	 correct; truncate or fill with blanks if needed.  */
        if (this_comp->ts.type == BT_CHARACTER && !this_comp->attr.allocatable
  	  && this_comp->ts.u.cl && this_comp->ts.u.cl->length
  	  && this_comp->ts.u.cl->length->expr_type == EXPR_CONSTANT
+ 	  && this_comp->ts.u.cl->length->ts.type == BT_INTEGER
  	  && actual->expr->ts.type == BT_CHARACTER
  	  && actual->expr->expr_type == EXPR_CONSTANT)
  	{
diff -Nrcpad gcc-12.3.0/gcc/fortran/resolve.cc gcc-12.4.0/gcc/fortran/resolve.cc
*** gcc-12.3.0/gcc/fortran/resolve.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/resolve.cc	Thu Jun 20 08:08:06 2024
*************** resolve_common_vars (gfc_common_head *co
*** 965,972 ****
  
        /* gfc_add_in_common may have been called before, but the reported errors
  	 have been ignored to continue parsing.
! 	 We do the checks again here.  */
!       if (!csym->attr.use_assoc)
  	{
  	  gfc_add_in_common (&csym->attr, csym->name, &common_block->where);
  	  gfc_notify_std (GFC_STD_F2018_OBS, "COMMON block at %L",
--- 965,972 ----
  
        /* gfc_add_in_common may have been called before, but the reported errors
  	 have been ignored to continue parsing.
! 	 We do the checks again here, unless the symbol is USE associated.  */
!       if (!csym->attr.use_assoc && !csym->attr.used_in_submodule)
  	{
  	  gfc_add_in_common (&csym->attr, csym->name, &common_block->where);
  	  gfc_notify_std (GFC_STD_F2018_OBS, "COMMON block at %L",
*************** gfc_resolve_ref (gfc_expr *expr)
*** 5461,5467 ****
  	case REF_INQUIRY:
  	  /* Implement requirement in note 9.7 of F2018 that the result of the
  	     LEN inquiry be a scalar.  */
! 	  if (ref->u.i == INQUIRY_LEN && array_ref && expr->ts.deferred)
  	    {
  	      array_ref->u.ar.type = AR_ELEMENT;
  	      expr->rank = 0;
--- 5461,5469 ----
  	case REF_INQUIRY:
  	  /* Implement requirement in note 9.7 of F2018 that the result of the
  	     LEN inquiry be a scalar.  */
! 	  if (ref->u.i == INQUIRY_LEN && array_ref
! 	      && ((expr->ts.type == BT_CHARACTER && !expr->ts.u.cl->length)
! 		  || expr->ts.type == BT_INTEGER))
  	    {
  	      array_ref->u.ar.type = AR_ELEMENT;
  	      expr->rank = 0;
*************** resolve_select_rank (gfc_code *code, gfc
*** 9923,9933 ****
  			       || gfc_expr_attr (code->expr1).pointer))
  	gfc_error ("RANK (*) at %L cannot be used with the pointer or "
  		   "allocatable selector at %L", &c->where, &code->expr1->where);
- 
-       if (case_value == -1 && (gfc_expr_attr (code->expr1).allocatable
- 			       || gfc_expr_attr (code->expr1).pointer))
- 	gfc_error ("RANK (*) at %L cannot be used with the pointer or "
- 		   "allocatable selector at %L", &c->where, &code->expr1->where);
      }
  
    /* Add EXEC_SELECT to switch on rank.  */
--- 9925,9930 ----
*************** resolve_fl_var_and_proc (gfc_symbol *sym
*** 12913,12919 ****
  
        if (allocatable)
  	{
! 	  if (dimension && as->type != AS_ASSUMED_RANK)
  	    {
  	      gfc_error ("Allocatable array %qs at %L must have a deferred "
  			 "shape or assumed rank", sym->name, &sym->declared_at);
--- 12910,12919 ----
  
        if (allocatable)
  	{
! 	  if (dimension
! 	      && as
! 	      && as->type != AS_ASSUMED_RANK
! 	      && !sym->attr.select_rank_temporary)
  	    {
  	      gfc_error ("Allocatable array %qs at %L must have a deferred "
  			 "shape or assumed rank", sym->name, &sym->declared_at);
diff -Nrcpad gcc-12.3.0/gcc/fortran/simplify.cc gcc-12.4.0/gcc/fortran/simplify.cc
*** gcc-12.3.0/gcc/fortran/simplify.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/simplify.cc	Thu Jun 20 08:08:06 2024
*************** gfc_simplify_len (gfc_expr *e, gfc_expr
*** 4525,4543 ****
        return range_check (result, "LEN");
      }
    else if (e->expr_type == EXPR_VARIABLE && e->ts.type == BT_CHARACTER
! 	   && e->symtree->n.sym
! 	   && e->symtree->n.sym->ts.type != BT_DERIVED
! 	   && e->symtree->n.sym->assoc && e->symtree->n.sym->assoc->target
! 	   && e->symtree->n.sym->assoc->target->ts.type == BT_DERIVED
! 	   && e->symtree->n.sym->assoc->target->symtree->n.sym
! 	   && UNLIMITED_POLY (e->symtree->n.sym->assoc->target->symtree->n.sym))
! 
!     /* The expression in assoc->target points to a ref to the _data component
!        of the unlimited polymorphic entity.  To get the _len component the last
!        _data ref needs to be stripped and a ref to the _len component added.  */
!     return gfc_get_len_component (e->symtree->n.sym->assoc->target, k);
!   else
!     return NULL;
  }
  
  
--- 4525,4574 ----
        return range_check (result, "LEN");
      }
    else if (e->expr_type == EXPR_VARIABLE && e->ts.type == BT_CHARACTER
! 	   && e->symtree->n.sym)
!     {
!       if (e->symtree->n.sym->ts.type != BT_DERIVED
! 	  && e->symtree->n.sym->assoc && e->symtree->n.sym->assoc->target
! 	  && e->symtree->n.sym->assoc->target->ts.type == BT_DERIVED
! 	  && e->symtree->n.sym->assoc->target->symtree->n.sym
! 	  && UNLIMITED_POLY (e->symtree->n.sym->assoc->target->symtree->n.sym))
! 	/* The expression in assoc->target points to a ref to the _data
! 	   component of the unlimited polymorphic entity.  To get the _len
! 	   component the last _data ref needs to be stripped and a ref to the
! 	   _len component added.  */
! 	return gfc_get_len_component (e->symtree->n.sym->assoc->target, k);
!       else if (e->symtree->n.sym->ts.type == BT_DERIVED
! 	       && e->ref && e->ref->type == REF_COMPONENT
! 	       && e->ref->u.c.component->attr.pdt_string
! 	       && e->ref->u.c.component->ts.type == BT_CHARACTER
! 	       && e->ref->u.c.component->ts.u.cl->length)
! 	{
! 	  if (gfc_init_expr_flag)
! 	    {
! 	      gfc_expr* tmp;
! 	      tmp = gfc_pdt_find_component_copy_initializer (e->symtree->n.sym,
! 							     e->ref->u.c
! 							     .component->ts.u.cl
! 							     ->length->symtree
! 							     ->name);
! 	      if (tmp)
! 		return tmp;
! 	    }
! 	  else
! 	    {
! 	      gfc_expr *len_expr = gfc_copy_expr (e);
! 	      gfc_free_ref_list (len_expr->ref);
! 	      len_expr->ref = NULL;
! 	      gfc_find_component (len_expr->symtree->n.sym->ts.u.derived, e->ref
! 				  ->u.c.component->ts.u.cl->length->symtree
! 				  ->name,
! 				  false, true, &len_expr->ref);
! 	      len_expr->ts = len_expr->ref->u.c.component->ts;
! 	      return len_expr;
! 	    }
! 	}
!     }
!   return NULL;
  }
  
  
diff -Nrcpad gcc-12.3.0/gcc/fortran/symbol.cc gcc-12.4.0/gcc/fortran/symbol.cc
*** gcc-12.3.0/gcc/fortran/symbol.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/symbol.cc	Thu Jun 20 08:08:06 2024
*************** gfc_copy_formal_args_intr (gfc_symbol *d
*** 4719,4724 ****
--- 4719,4731 ----
        formal_arg->sym->attr.flavor = FL_VARIABLE;
        formal_arg->sym->attr.dummy = 1;
  
+       /* Do not treat an actual deferred-length character argument wrongly
+ 	 as template for the formal argument.  */
+       if (formal_arg->sym->ts.type == BT_CHARACTER
+ 	  && !(formal_arg->sym->attr.allocatable
+ 	       || formal_arg->sym->attr.pointer))
+ 	formal_arg->sym->ts.deferred = false;
+ 
        if (formal_arg->sym->ts.type == BT_CHARACTER)
  	formal_arg->sym->ts.u.cl = gfc_new_charlen (gfc_current_ns, NULL);
  
diff -Nrcpad gcc-12.3.0/gcc/fortran/trans-array.cc gcc-12.4.0/gcc/fortran/trans-array.cc
*** gcc-12.3.0/gcc/fortran/trans-array.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/trans-array.cc	Thu Jun 20 08:08:06 2024
*************** gfc_conv_array_ref (gfc_se * se, gfc_arr
*** 3911,3917 ****
      }
  
    decl = se->expr;
!   if (IS_CLASS_ARRAY (sym) && sym->attr.dummy && ar->as->type != AS_DEFERRED)
      decl = sym->backend_decl;
  
    cst_offset = offset = gfc_index_zero_node;
--- 3911,3920 ----
      }
  
    decl = se->expr;
!   if (UNLIMITED_POLY(sym)
!       && IS_CLASS_ARRAY (sym)
!       && sym->attr.dummy
!       && ar->as->type != AS_DEFERRED)
      decl = sym->backend_decl;
  
    cst_offset = offset = gfc_index_zero_node;
diff -Nrcpad gcc-12.3.0/gcc/fortran/trans-expr.cc gcc-12.4.0/gcc/fortran/trans-expr.cc
*** gcc-12.3.0/gcc/fortran/trans-expr.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/trans-expr.cc	Thu Jun 20 08:08:06 2024
*************** conv_inquiry (gfc_se * se, gfc_ref * ref
*** 2854,2864 ****
--- 2854,2866 ----
      case INQUIRY_KIND:
        res = build_int_cst (gfc_typenode_for_spec (&expr->ts),
  			   ts->kind);
+       se->string_length = NULL_TREE;
        break;
  
      case INQUIRY_LEN:
        res = fold_convert (gfc_typenode_for_spec (&expr->ts),
  			  se->string_length);
+       se->string_length = NULL_TREE;
        break;
  
      default:
*************** gfc_conv_procedure_call (gfc_se * se, gf
*** 7428,7434 ****
  	     (and other intrinsics?) and dummy functions.  In the case of SPREAD,
  	     we take the character length of the first argument for the result.
  	     For dummies, we have to look through the formal argument list for
! 	     this function and use the character length found there.*/
  	  if (ts.deferred)
  	    cl.backend_decl = gfc_create_var (gfc_charlen_type_node, "slen");
  	  else if (!sym->attr.dummy)
--- 7430,7441 ----
  	     (and other intrinsics?) and dummy functions.  In the case of SPREAD,
  	     we take the character length of the first argument for the result.
  	     For dummies, we have to look through the formal argument list for
! 	     this function and use the character length found there.
! 	     Likewise, we handle the case of deferred-length character dummy
! 	     arguments to intrinsics that determine the characteristics of
! 	     the result, which cannot be deferred-length.  */
! 	  if (expr->value.function.isym)
! 	    ts.deferred = false;
  	  if (ts.deferred)
  	    cl.backend_decl = gfc_create_var (gfc_charlen_type_node, "slen");
  	  else if (!sym->attr.dummy)
*************** gfc_conv_structure (gfc_se * se, gfc_exp
*** 9293,9299 ****
    cm = expr->ts.u.derived->components;
  
    for (c = gfc_constructor_first (expr->value.constructor);
!        c; c = gfc_constructor_next (c), cm = cm->next)
      {
        /* Skip absent members in default initializers and allocatable
  	 components.  Although the latter have a default initializer
--- 9300,9306 ----
    cm = expr->ts.u.derived->components;
  
    for (c = gfc_constructor_first (expr->value.constructor);
!        c && cm; c = gfc_constructor_next (c), cm = cm->next)
      {
        /* Skip absent members in default initializers and allocatable
  	 components.  Although the latter have a default initializer
diff -Nrcpad gcc-12.3.0/gcc/fortran/trans-intrinsic.cc gcc-12.4.0/gcc/fortran/trans-intrinsic.cc
*** gcc-12.3.0/gcc/fortran/trans-intrinsic.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fortran/trans-intrinsic.cc	Thu Jun 20 08:08:06 2024
*************** gfc_conv_intrinsic_bound (gfc_se * se, g
*** 3083,3089 ****
  				      lbound, gfc_index_one_node);
  	}
        else if (op == GFC_ISYM_SHAPE)
! 	se->expr = size;
        else
  	gcc_unreachable ();
  
--- 3083,3091 ----
  				      lbound, gfc_index_one_node);
  	}
        else if (op == GFC_ISYM_SHAPE)
! 	se->expr = fold_build2_loc (input_location, MAX_EXPR,
! 				    gfc_array_index_type, size,
! 				    gfc_index_zero_node);
        else
  	gcc_unreachable ();
  
diff -Nrcpad gcc-12.3.0/gcc/fwprop.cc gcc-12.4.0/gcc/fwprop.cc
*** gcc-12.3.0/gcc/fwprop.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/fwprop.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 25,30 ****
--- 25,31 ----
  #include "coretypes.h"
  #include "backend.h"
  #include "rtl.h"
+ #include "rtlanal.h"
  #include "df.h"
  #include "rtl-ssa.h"
  
*************** reg_single_def_p (rtx x)
*** 353,373 ****
    return REG_P (x) && crtl->ssa->single_dominating_def (REGNO (x));
  }
  
- /* Return true if X contains a paradoxical subreg.  */
- 
- static bool
- contains_paradoxical_subreg_p (rtx x)
- {
-   subrtx_var_iterator::array_type array;
-   FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST)
-     {
-       x = *iter;
-       if (SUBREG_P (x) && paradoxical_subreg_p (x))
- 	return true;
-     }
-   return false;
- }
- 
  /* Try to substitute (set DEST SRC), which defines DEF, into note NOTE of
     USE_INSN.  Return the number of substitutions on success, otherwise return
     -1 and leave USE_INSN unchanged.
--- 354,359 ----
diff -Nrcpad gcc-12.3.0/gcc/generic-match-head.cc gcc-12.4.0/gcc/generic-match-head.cc
*** gcc-12.3.0/gcc/generic-match-head.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/generic-match-head.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 39,44 ****
--- 39,46 ----
  #include "dbgcnt.h"
  #include "tm.h"
  #include "tree-pass.h"
+ #include "attribs.h"
+ #include "asan.h"
  
  /* Routine to determine if the types T1 and T2 are effectively
     the same for GENERIC.  If T1 or T2 is not a type, the test
diff -Nrcpad gcc-12.3.0/gcc/gengtype-lex.cc gcc-12.4.0/gcc/gengtype-lex.cc
*** gcc-12.3.0/gcc/gengtype-lex.cc	Mon May  8 12:16:07 2023
--- gcc-12.4.0/gcc/gengtype-lex.cc	Thu Jun 20 08:11:52 2024
*************** int yy_flex_debug = 0;
*** 1188,1194 ****
  #define YY_MORE_ADJ 0
  #define YY_RESTORE_YY_MORE_OFFSET
  char *yytext;
! #line 1 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  /* -*- indented-text -*- */
  /* Process source files and output type information.
     Copyright (C) 2002-2022 Free Software Foundation, Inc.
--- 1188,1194 ----
  #define YY_MORE_ADJ 0
  #define YY_RESTORE_YY_MORE_OFFSET
  char *yytext;
! #line 1 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  /* -*- indented-text -*- */
  /* Process source files and output type information.
     Copyright (C) 2002-2022 Free Software Foundation, Inc.
*************** You should have received a copy of the G
*** 1209,1215 ****
  along with GCC; see the file COPYING3.  If not see
  .  */
  #define YY_NO_INPUT 1
! #line 24 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  #ifdef HOST_GENERATOR_FILE
  #include "config.h"
  #define GENERATOR_FILE 1
--- 1209,1215 ----
  along with GCC; see the file COPYING3.  If not see
  .  */
  #define YY_NO_INPUT 1
! #line 24 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  #ifdef HOST_GENERATOR_FILE
  #include "config.h"
  #define GENERATOR_FILE 1
*************** update_lineno (const char *l, size_t len
*** 1238,1244 ****
  }
  
  #line 1235 "gengtype-lex.cc"
! #line 59 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
      /* Include '::' in identifiers to capture C++ scope qualifiers.  */
  
  #line 1239 "gengtype-lex.cc"
--- 1238,1244 ----
  }
  
  #line 1235 "gengtype-lex.cc"
! #line 59 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
      /* Include '::' in identifiers to capture C++ scope qualifiers.  */
  
  #line 1239 "gengtype-lex.cc"
*************** YY_DECL
*** 1462,1468 ****
  		}
  
  	{
! #line 67 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  
    /* Do this on entry to yylex():  */
    *yylval = 0;
--- 1462,1468 ----
  		}
  
  	{
! #line 67 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  
    /* Do this on entry to yylex():  */
    *yylval = 0;
*************** YY_LINENO_REWIND_TO(yy_cp - 1);
*** 1534,1540 ****
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 78 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return TYPEDEF;
--- 1534,1540 ----
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 78 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return TYPEDEF;
*************** YY_LINENO_REWIND_TO(yy_cp - 1);
*** 1547,1553 ****
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 82 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return STRUCT;
--- 1547,1553 ----
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 82 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return STRUCT;
*************** YY_LINENO_REWIND_TO(yy_cp - 1);
*** 1560,1566 ****
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 86 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return UNION;
--- 1560,1566 ----
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 86 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return UNION;
*************** YY_LINENO_REWIND_TO(yy_cp - 1);
*** 1573,1579 ****
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 90 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return STRUCT;
--- 1573,1579 ----
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 90 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return STRUCT;
*************** YY_LINENO_REWIND_TO(yy_cp - 1);
*** 1586,1592 ****
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 94 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return EXTERN;
--- 1586,1592 ----
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 94 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return EXTERN;
*************** YY_LINENO_REWIND_TO(yy_cp - 1);
*** 1599,1605 ****
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 98 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return STATIC;
--- 1599,1605 ----
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 98 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    BEGIN(in_struct);
    return STATIC;
*************** YY_RULE_SETUP
*** 1610,1634 ****
  
  case 7:
  YY_RULE_SETUP
! #line 106 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { BEGIN(in_struct_comment); }
  	YY_BREAK
  case 8:
  /* rule 8 can match eol */
  YY_RULE_SETUP
! #line 107 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 9:
  /* rule 9 can match eol */
  YY_RULE_SETUP
! #line 109 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { update_lineno (yytext, yyleng); }
  	YY_BREAK
  case 10:
  /* rule 10 can match eol */
  YY_RULE_SETUP
! #line 110 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 11:
--- 1610,1634 ----
  
  case 7:
  YY_RULE_SETUP
! #line 106 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { BEGIN(in_struct_comment); }
  	YY_BREAK
  case 8:
  /* rule 8 can match eol */
  YY_RULE_SETUP
! #line 107 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 9:
  /* rule 9 can match eol */
  YY_RULE_SETUP
! #line 109 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { update_lineno (yytext, yyleng); }
  	YY_BREAK
  case 10:
  /* rule 10 can match eol */
  YY_RULE_SETUP
! #line 110 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 11:
*************** YY_LINENO_REWIND_TO(yy_bp + 5);
*** 1638,1644 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 5;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 112 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  /* don't care */
  	YY_BREAK
  case 12:
--- 1638,1644 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 5;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 112 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  /* don't care */
  	YY_BREAK
  case 12:
*************** case 12:
*** 1647,1663 ****
  YY_LINENO_REWIND_TO(yy_cp - 1);
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
! #line 114 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 13:
  /* rule 13 can match eol */
! #line 115 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 14:
  /* rule 14 can match eol */
! #line 116 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 15:
  /* rule 15 can match eol */
  YY_RULE_SETUP
! #line 116 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
      *yylval = XDUPVAR (const char, yytext, yyleng, yyleng + 1);
      return IGNORABLE_CXX_KEYWORD;
--- 1647,1663 ----
  YY_LINENO_REWIND_TO(yy_cp - 1);
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
! #line 114 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 13:
  /* rule 13 can match eol */
! #line 115 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 14:
  /* rule 14 can match eol */
! #line 116 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 15:
  /* rule 15 can match eol */
  YY_RULE_SETUP
! #line 116 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
      *yylval = XDUPVAR (const char, yytext, yyleng, yyleng + 1);
      return IGNORABLE_CXX_KEYWORD;
*************** YY_LINENO_REWIND_TO(yy_bp + 3);
*** 1670,1676 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 3;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 120 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return GTY_TOKEN; }
  	YY_BREAK
  case 17:
--- 1670,1676 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 3;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 120 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return GTY_TOKEN; }
  	YY_BREAK
  case 17:
*************** YY_LINENO_REWIND_TO(yy_bp + 5);
*** 1680,1686 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 5;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 121 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return UNION; }
  	YY_BREAK
  case 18:
--- 1680,1686 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 5;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 121 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return UNION; }
  	YY_BREAK
  case 18:
*************** YY_LINENO_REWIND_TO(yy_bp + 6);
*** 1690,1696 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 6;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 122 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return STRUCT; }
  	YY_BREAK
  case 19:
--- 1690,1696 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 6;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 122 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return STRUCT; }
  	YY_BREAK
  case 19:
*************** YY_LINENO_REWIND_TO(yy_bp + 5);
*** 1700,1706 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 5;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 123 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return STRUCT; }
  	YY_BREAK
  case 20:
--- 1700,1706 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 5;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 123 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return STRUCT; }
  	YY_BREAK
  case 20:
*************** YY_LINENO_REWIND_TO(yy_bp + 7);
*** 1710,1716 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 7;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 124 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return TYPEDEF; }
  	YY_BREAK
  case 21:
--- 1710,1716 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 7;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 124 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return TYPEDEF; }
  	YY_BREAK
  case 21:
*************** YY_LINENO_REWIND_TO(yy_bp + 4);
*** 1720,1726 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 4;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 125 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return ENUM; }
  	YY_BREAK
  case 22:
--- 1720,1726 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 4;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 125 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return ENUM; }
  	YY_BREAK
  case 22:
*************** YY_LINENO_REWIND_TO(yy_bp + 9);
*** 1730,1736 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 9;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 126 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return PTR_ALIAS; }
  	YY_BREAK
  case 23:
--- 1730,1736 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 9;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 126 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return PTR_ALIAS; }
  	YY_BREAK
  case 23:
*************** YY_LINENO_REWIND_TO(yy_bp + 10);
*** 1740,1746 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 10;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 127 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return NESTED_PTR; }
  	YY_BREAK
  case 24:
--- 1740,1746 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 10;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 127 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return NESTED_PTR; }
  	YY_BREAK
  case 24:
*************** YY_LINENO_REWIND_TO(yy_bp + 4);
*** 1750,1761 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 4;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 128 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return USER_GTY; }
  	YY_BREAK
  case 25:
  YY_RULE_SETUP
! #line 129 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1);
    return NUM;
--- 1750,1761 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 4;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 128 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return USER_GTY; }
  	YY_BREAK
  case 25:
  YY_RULE_SETUP
! #line 129 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1);
    return NUM;
*************** case 26:
*** 1767,1777 ****
  YY_LINENO_REWIND_TO(yy_cp - 1);
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
! #line 135 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 27:
  /* rule 27 can match eol */
  YY_RULE_SETUP
! #line 135 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    size_t len;
  
--- 1767,1777 ----
  YY_LINENO_REWIND_TO(yy_cp - 1);
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
! #line 135 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 27:
  /* rule 27 can match eol */
  YY_RULE_SETUP
! #line 135 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    size_t len;
  
*************** YY_LINENO_REWIND_TO(yy_cp - 1);
*** 1790,1796 ****
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 146 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1);
    return ID;
--- 1790,1796 ----
  (yy_c_buf_p) = yy_cp -= 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 146 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1);
    return ID;
*************** YY_RULE_SETUP
*** 1799,1805 ****
  case 29:
  /* rule 29 can match eol */
  YY_RULE_SETUP
! #line 151 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1);
    return STRING;
--- 1799,1805 ----
  case 29:
  /* rule 29 can match eol */
  YY_RULE_SETUP
! #line 151 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1);
    return STRING;
*************** YY_RULE_SETUP
*** 1809,1815 ****
  case 30:
  /* rule 30 can match eol */
  YY_RULE_SETUP
! #line 156 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1);
    return ARRAY;
--- 1809,1815 ----
  case 30:
  /* rule 30 can match eol */
  YY_RULE_SETUP
! #line 156 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1);
    return ARRAY;
*************** YY_RULE_SETUP
*** 1818,1824 ****
  case 31:
  /* rule 31 can match eol */
  YY_RULE_SETUP
! #line 160 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng);
    return CHAR;
--- 1818,1824 ----
  case 31:
  /* rule 31 can match eol */
  YY_RULE_SETUP
! #line 160 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng);
    return CHAR;
*************** YY_RULE_SETUP
*** 1826,1849 ****
  	YY_BREAK
  case 32:
  YY_RULE_SETUP
! #line 165 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return ELLIPSIS; }
  	YY_BREAK
  case 33:
  YY_RULE_SETUP
! #line 166 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { return yytext[0]; }
  	YY_BREAK
  /* ignore pp-directives */
  case 34:
  /* rule 34 can match eol */
  YY_RULE_SETUP
! #line 169 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {lexer_line.line++;}
  	YY_BREAK
  case 35:
  YY_RULE_SETUP
! #line 171 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    error_at_line (&lexer_line, "unexpected character `%s'", yytext);
  }
--- 1826,1849 ----
  	YY_BREAK
  case 32:
  YY_RULE_SETUP
! #line 165 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return ELLIPSIS; }
  	YY_BREAK
  case 33:
  YY_RULE_SETUP
! #line 166 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { return yytext[0]; }
  	YY_BREAK
  /* ignore pp-directives */
  case 34:
  /* rule 34 can match eol */
  YY_RULE_SETUP
! #line 169 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {lexer_line.line++;}
  	YY_BREAK
  case 35:
  YY_RULE_SETUP
! #line 171 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    error_at_line (&lexer_line, "unexpected character `%s'", yytext);
  }
*************** YY_RULE_SETUP
*** 1851,1886 ****
  
  case 36:
  YY_RULE_SETUP
! #line 176 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { BEGIN(in_comment); }
  	YY_BREAK
  case 37:
  /* rule 37 can match eol */
  YY_RULE_SETUP
! #line 177 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 38:
  /* rule 38 can match eol */
  YY_RULE_SETUP
! #line 178 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 39:
! #line 180 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 40:
  /* rule 40 can match eol */
! #line 181 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 41:
  /* rule 41 can match eol */
  YY_RULE_SETUP
! #line 181 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  case 42:
  /* rule 42 can match eol */
  YY_RULE_SETUP
! #line 182 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { update_lineno (yytext, yyleng); }
  	YY_BREAK
  case 43:
--- 1851,1886 ----
  
  case 36:
  YY_RULE_SETUP
! #line 176 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { BEGIN(in_comment); }
  	YY_BREAK
  case 37:
  /* rule 37 can match eol */
  YY_RULE_SETUP
! #line 177 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 38:
  /* rule 38 can match eol */
  YY_RULE_SETUP
! #line 178 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 39:
! #line 180 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 40:
  /* rule 40 can match eol */
! #line 181 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 41:
  /* rule 41 can match eol */
  YY_RULE_SETUP
! #line 181 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  case 42:
  /* rule 42 can match eol */
  YY_RULE_SETUP
! #line 182 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { update_lineno (yytext, yyleng); }
  	YY_BREAK
  case 43:
*************** YY_LINENO_REWIND_TO(yy_bp + 1);
*** 1890,1910 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 183 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  
  case 44:
  /* rule 44 can match eol */
  YY_RULE_SETUP
! #line 186 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 45:
! #line 188 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 46:
  YY_RULE_SETUP
! #line 188 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  case 47:
--- 1890,1910 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 183 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  
  case 44:
  /* rule 44 can match eol */
  YY_RULE_SETUP
! #line 186 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { lexer_line.line++; }
  	YY_BREAK
  case 45:
! #line 188 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 46:
  YY_RULE_SETUP
! #line 188 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  case 47:
*************** YY_LINENO_REWIND_TO(yy_bp + 1);
*** 1914,1938 ****
  (yy_c_buf_p) = yy_cp = yy_bp + 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 189 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  
  case 48:
  YY_RULE_SETUP
! #line 192 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { BEGIN(INITIAL); } 
  	YY_BREAK
  case 49:
  YY_RULE_SETUP
! #line 193 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  { BEGIN(in_struct); }
  	YY_BREAK
  case 50:
! #line 196 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  case 51:
  YY_RULE_SETUP
! #line 196 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  {
    error_at_line (&lexer_line, 
  		 "unterminated comment or string; unexpected EOF");
--- 1914,1938 ----
  (yy_c_buf_p) = yy_cp = yy_bp + 1;
  YY_DO_BEFORE_ACTION; /* set up yytext again */
  YY_RULE_SETUP
! #line 189 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  
  case 48:
  YY_RULE_SETUP
! #line 192 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { BEGIN(INITIAL); } 
  	YY_BREAK
  case 49:
  YY_RULE_SETUP
! #line 193 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  { BEGIN(in_struct); }
  	YY_BREAK
  case 50:
! #line 196 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  case 51:
  YY_RULE_SETUP
! #line 196 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  {
    error_at_line (&lexer_line, 
  		 "unterminated comment or string; unexpected EOF");
*************** YY_RULE_SETUP
*** 1941,1952 ****
  case 52:
  /* rule 52 can match eol */
  YY_RULE_SETUP
! #line 201 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  case 53:
  YY_RULE_SETUP
! #line 203 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  YY_FATAL_ERROR( "flex scanner jammed" );
  	YY_BREAK
  #line 1947 "gengtype-lex.cc"
--- 1941,1952 ----
  case 52:
  /* rule 52 can match eol */
  YY_RULE_SETUP
! #line 201 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  /* do nothing */
  	YY_BREAK
  case 53:
  YY_RULE_SETUP
! #line 203 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  YY_FATAL_ERROR( "flex scanner jammed" );
  	YY_BREAK
  #line 1947 "gengtype-lex.cc"
*************** void yyfree (void * ptr )
*** 2924,2930 ****
  
  #define YYTABLES_NAME "yytables"
  
! #line 203 "/home/rguenther/src/releases/gcc-12.3.0/gcc-12.3.0/gcc/gengtype-lex.l"
  
  
  void
--- 2924,2930 ----
  
  #define YYTABLES_NAME "yytables"
  
! #line 203 "/d/gcc-12.4.0/gcc-12.4.0/gcc/gengtype-lex.l"
  
  
  void
diff -Nrcpad gcc-12.3.0/gcc/genmatch.cc gcc-12.4.0/gcc/genmatch.cc
*** gcc-12.3.0/gcc/genmatch.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/genmatch.cc	Thu Jun 20 08:08:06 2024
*************** expr::gen_transform (FILE *f, int indent
*** 2548,2554 ****
  	{
  	  fprintf_indent (f, indent, "if (TREE_TYPE (_o%d[0]) != %s)\n",
  			  depth, type);
! 	  indent += 2;
  	}
        if (opr->kind == id_base::CODE)
  	fprintf_indent (f, indent, "_r%d = fold_build%d_loc (loc, %s, %s",
--- 2548,2555 ----
  	{
  	  fprintf_indent (f, indent, "if (TREE_TYPE (_o%d[0]) != %s)\n",
  			  depth, type);
! 	  fprintf_indent (f, indent + 2, "{\n");
! 	  indent += 4;
  	}
        if (opr->kind == id_base::CODE)
  	fprintf_indent (f, indent, "_r%d = fold_build%d_loc (loc, %s, %s",
*************** expr::gen_transform (FILE *f, int indent
*** 2571,2577 ****
  	}
        if (*opr == CONVERT_EXPR)
  	{
! 	  indent -= 2;
  	  fprintf_indent (f, indent, "else\n");
  	  fprintf_indent (f, indent, "  _r%d = _o%d[0];\n", depth, depth);
  	}
--- 2572,2579 ----
  	}
        if (*opr == CONVERT_EXPR)
  	{
! 	  fprintf_indent (f, indent - 2, "}\n");
! 	  indent -= 4;
  	  fprintf_indent (f, indent, "else\n");
  	  fprintf_indent (f, indent, "  _r%d = _o%d[0];\n", depth, depth);
  	}
diff -Nrcpad gcc-12.3.0/gcc/ggc-common.cc gcc-12.4.0/gcc/ggc-common.cc
*** gcc-12.3.0/gcc/ggc-common.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ggc-common.cc	Thu Jun 20 08:08:06 2024
*************** gt_pch_save (FILE *f)
*** 670,676 ****
      {
        gcc_assert ((uintptr_t) addr >= (uintptr_t) mmi.preferred_base
  		  && ((uintptr_t) addr + sizeof (void *)
! 		      < (uintptr_t) mmi.preferred_base + mmi.size));
        if (addr == last_addr)
  	continue;
        if (last_addr == NULL)
--- 670,676 ----
      {
        gcc_assert ((uintptr_t) addr >= (uintptr_t) mmi.preferred_base
  		  && ((uintptr_t) addr + sizeof (void *)
! 		      <= (uintptr_t) mmi.preferred_base + mmi.size));
        if (addr == last_addr)
  	continue;
        if (last_addr == NULL)
diff -Nrcpad gcc-12.3.0/gcc/gimple-fold.cc gcc-12.4.0/gcc/gimple-fold.cc
*** gcc-12.3.0/gcc/gimple-fold.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-fold.cc	Thu Jun 20 08:08:06 2024
*************** get_base_constructor (tree base, poly_in
*** 7770,7781 ****
      }
  }
  
! /* CTOR is CONSTRUCTOR of an array type.  Fold a reference of SIZE bits
!    to the memory at bit OFFSET.     When non-null, TYPE is the expected
!    type of the reference; otherwise the type of the referenced element
!    is used instead. When SIZE is zero, attempt to fold a reference to
!    the entire element which OFFSET refers to.  Increment *SUBOFF by
!    the bit offset of the accessed element.  */
  
  static tree
  fold_array_ctor_reference (tree type, tree ctor,
--- 7770,7780 ----
      }
  }
  
! /* CTOR is a CONSTRUCTOR of an array or vector type.  Fold a reference of SIZE
!    bits to the memory at bit OFFSET.  If non-null, TYPE is the expected type of
!    the reference; otherwise the type of the referenced element is used instead.
!    When SIZE is zero, attempt to fold a reference to the entire element OFFSET
!    refers to.  Increment *SUBOFF by the bit offset of the accessed element.  */
  
  static tree
  fold_array_ctor_reference (tree type, tree ctor,
*************** fold_array_ctor_reference (tree type, tr
*** 7940,7952 ****
    return type ? build_zero_cst (type) : NULL_TREE;
  }
  
! /* CTOR is CONSTRUCTOR of an aggregate or vector.  Fold a reference
!    of SIZE bits to the memory at bit OFFSET.   When non-null, TYPE
!    is the expected type of the reference; otherwise the type of
!    the referenced member is used instead.  When SIZE is zero,
!    attempt to fold a reference to the entire member which OFFSET
!    refers to; in this case.  Increment *SUBOFF by the bit offset
!    of the accessed member.  */
  
  static tree
  fold_nonarray_ctor_reference (tree type, tree ctor,
--- 7939,7949 ----
    return type ? build_zero_cst (type) : NULL_TREE;
  }
  
! /* CTOR is a CONSTRUCTOR of a record or union type.  Fold a reference of SIZE
!    bits to the memory at bit OFFSET.  If non-null, TYPE is the expected type of
!    the reference; otherwise the type of the referenced member is used instead.
!    When SIZE is zero, attempt to fold a reference to the entire member OFFSET
!    refers to.  Increment *SUBOFF by the bit offset of the accessed member.  */
  
  static tree
  fold_nonarray_ctor_reference (tree type, tree ctor,
*************** fold_nonarray_ctor_reference (tree type,
*** 7958,7965 ****
    unsigned HOST_WIDE_INT cnt;
    tree cfield, cval;
  
!   FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), cnt, cfield,
! 			    cval)
      {
        tree byte_offset = DECL_FIELD_OFFSET (cfield);
        tree field_offset = DECL_FIELD_BIT_OFFSET (cfield);
--- 7955,7961 ----
    unsigned HOST_WIDE_INT cnt;
    tree cfield, cval;
  
!   FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), cnt, cfield, cval)
      {
        tree byte_offset = DECL_FIELD_OFFSET (cfield);
        tree field_offset = DECL_FIELD_BIT_OFFSET (cfield);
*************** fold_nonarray_ctor_reference (tree type,
*** 8031,8036 ****
--- 8027,8045 ----
  	    return NULL_TREE;
  
  	  offset_int inner_offset = offset_int (offset) - bitoffset;
+ 
+ 	  /* Integral bit-fields are left-justified on big-endian targets, so
+ 	     we must arrange for native_encode_int to start at their MSB.  */
+ 	  if (DECL_BIT_FIELD (cfield) && INTEGRAL_TYPE_P (TREE_TYPE (cfield)))
+ 	    {
+ 	      if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN)
+ 		return NULL_TREE;
+ 	      const unsigned int encoding_size
+ 		= GET_MODE_BITSIZE (SCALAR_INT_TYPE_MODE (TREE_TYPE (cfield)));
+ 	      if (BYTES_BIG_ENDIAN)
+ 		inner_offset += encoding_size - wi::to_offset (field_size);
+ 	    }
+ 
  	  return fold_ctor_reference (type, cval,
  				      inner_offset.to_uhwi (), size,
  				      from_decl, suboff);
*************** fold_nonarray_ctor_reference (tree type,
*** 8043,8049 ****
    return build_zero_cst (type);
  }
  
! /* CTOR is value initializing memory.  Fold a reference of TYPE and
     bit size POLY_SIZE to the memory at bit POLY_OFFSET.  When POLY_SIZE
     is zero, attempt to fold a reference to the entire subobject
     which OFFSET refers to.  This is used when folding accesses to
--- 8052,8058 ----
    return build_zero_cst (type);
  }
  
! /* CTOR is a value initializing memory.  Fold a reference of TYPE and
     bit size POLY_SIZE to the memory at bit POLY_OFFSET.  When POLY_SIZE
     is zero, attempt to fold a reference to the entire subobject
     which OFFSET refers to.  This is used when folding accesses to
*************** fold_ctor_reference (tree type, tree cto
*** 8084,8090 ****
  	}
        return ret;
      }
!   /* For constants and byte-aligned/sized reads try to go through
       native_encode/interpret.  */
    if (CONSTANT_CLASS_P (ctor)
        && BITS_PER_UNIT == 8
--- 8093,8100 ----
  	}
        return ret;
      }
! 
!   /* For constants and byte-aligned/sized reads, try to go through
       native_encode/interpret.  */
    if (CONSTANT_CLASS_P (ctor)
        && BITS_PER_UNIT == 8
*************** fold_ctor_reference (tree type, tree cto
*** 8100,8106 ****
        if (len > 0)
  	return native_interpret_expr (type, buf, len);
      }
!   if (TREE_CODE (ctor) == CONSTRUCTOR)
      {
        unsigned HOST_WIDE_INT dummy = 0;
        if (!suboff)
--- 8110,8121 ----
        if (len > 0)
  	return native_interpret_expr (type, buf, len);
      }
! 
!   /* For constructors, try first a recursive local processing, but in any case
!      this requires the native storage order.  */
!   if (TREE_CODE (ctor) == CONSTRUCTOR
!       && !(AGGREGATE_TYPE_P (TREE_TYPE (ctor))
! 	   && TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (ctor))))
      {
        unsigned HOST_WIDE_INT dummy = 0;
        if (!suboff)
*************** fold_ctor_reference (tree type, tree cto
*** 8115,8123 ****
  	ret = fold_nonarray_ctor_reference (type, ctor, offset, size,
  					    from_decl, suboff);
  
!       /* Fall back to native_encode_initializer.  Needs to be done
! 	 only in the outermost fold_ctor_reference call (because it itself
! 	 recurses into CONSTRUCTORs) and doesn't update suboff.  */
        if (ret == NULL_TREE
  	  && suboff == &dummy
  	  && BITS_PER_UNIT == 8
--- 8130,8138 ----
  	ret = fold_nonarray_ctor_reference (type, ctor, offset, size,
  					    from_decl, suboff);
  
!       /* Otherwise fall back to native_encode_initializer.  This may be done
! 	 only from the outermost fold_ctor_reference call (because it itself
! 	 recurses into CONSTRUCTORs and doesn't update suboff).  */
        if (ret == NULL_TREE
  	  && suboff == &dummy
  	  && BITS_PER_UNIT == 8
diff -Nrcpad gcc-12.3.0/gcc/gimple-match-head.cc gcc-12.4.0/gcc/gimple-match-head.cc
*** gcc-12.3.0/gcc/gimple-match-head.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-match-head.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 45,50 ****
--- 45,52 ----
  #include "dbgcnt.h"
  #include "tm.h"
  #include "gimple-range.h"
+ #include "attribs.h"
+ #include "asan.h"
  
  /* Forward declarations of the private auto-generated matchers.
     They expect valueized operands in canonical order and do not
diff -Nrcpad gcc-12.3.0/gcc/gimple-range-cache.cc gcc-12.4.0/gcc/gimple-range-cache.cc
*** gcc-12.3.0/gcc/gimple-range-cache.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-range-cache.cc	Thu Jun 20 08:08:06 2024
*************** block_range_cache::set_bb_range (tree na
*** 448,454 ****
  {
    unsigned v = SSA_NAME_VERSION (name);
    if (v >= m_ssa_ranges.length ())
!     m_ssa_ranges.safe_grow_cleared (num_ssa_names + 1);
  
    if (!m_ssa_ranges[v])
      {
--- 448,454 ----
  {
    unsigned v = SSA_NAME_VERSION (name);
    if (v >= m_ssa_ranges.length ())
!     m_ssa_ranges.safe_grow_cleared (num_ssa_names);
  
    if (!m_ssa_ranges[v])
      {
*************** void
*** 515,521 ****
  block_range_cache::dump (FILE *f)
  {
    unsigned x;
!   for (x = 0; x < m_ssa_ranges.length (); ++x)
      {
        if (m_ssa_ranges[x])
  	{
--- 515,521 ----
  block_range_cache::dump (FILE *f)
  {
    unsigned x;
!   for (x = 1; x < m_ssa_ranges.length (); ++x)
      {
        if (m_ssa_ranges[x])
  	{
*************** block_range_cache::dump (FILE *f, basic_
*** 538,546 ****
    bool summarize_varying = false;
    for (x = 1; x < m_ssa_ranges.length (); ++x)
      {
        if (!gimple_range_ssa_p (ssa_name (x)))
  	continue;
!       if (m_ssa_ranges[x] && m_ssa_ranges[x]->get_bb_range (r, bb))
  	{
  	  if (!print_varying && r.varying_p ())
  	    {
--- 538,549 ----
    bool summarize_varying = false;
    for (x = 1; x < m_ssa_ranges.length (); ++x)
      {
+       if (!m_ssa_ranges[x])
+ 	continue;
+ 
        if (!gimple_range_ssa_p (ssa_name (x)))
  	continue;
!       if (m_ssa_ranges[x]->get_bb_range (r, bb))
  	{
  	  if (!print_varying && r.varying_p ())
  	    {
*************** block_range_cache::dump (FILE *f, basic_
*** 557,567 ****
    if (summarize_varying)
      {
        fprintf (f, "VARYING_P on entry : ");
!       for (x = 1; x < num_ssa_names; ++x)
  	{
  	  if (!gimple_range_ssa_p (ssa_name (x)))
  	    continue;
! 	  if (m_ssa_ranges[x] && m_ssa_ranges[x]->get_bb_range (r, bb))
  	    {
  	      if (r.varying_p ())
  		{
--- 560,573 ----
    if (summarize_varying)
      {
        fprintf (f, "VARYING_P on entry : ");
!       for (x = 1; x < m_ssa_ranges.length (); ++x)
  	{
+ 	  if (!m_ssa_ranges[x])
+ 	    continue;
+ 
  	  if (!gimple_range_ssa_p (ssa_name (x)))
  	    continue;
! 	  if (m_ssa_ranges[x]->get_bb_range (r, bb))
  	    {
  	      if (r.varying_p ())
  		{
diff -Nrcpad gcc-12.3.0/gcc/gimple-range-gori.cc gcc-12.4.0/gcc/gimple-range-gori.cc
*** gcc-12.3.0/gcc/gimple-range-gori.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-range-gori.cc	Thu Jun 20 08:08:06 2024
*************** gori_compute::logical_combine (irange &r
*** 880,885 ****
--- 880,886 ----
  	res = false;
        if (idx)
  	tracer.trailer (idx, "logical_combine", res, NULL_TREE, r);
+       return res;
      }
  
    switch (code)
diff -Nrcpad gcc-12.3.0/gcc/gimple-ssa-backprop.cc gcc-12.4.0/gcc/gimple-ssa-backprop.cc
*** gcc-12.3.0/gcc/gimple-ssa-backprop.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-ssa-backprop.cc	Thu Jun 20 08:08:06 2024
*************** strip_sign_op_1 (tree rhs)
*** 688,694 ****
      switch (gimple_assign_rhs_code (assign))
        {
        case ABS_EXPR:
-       case ABSU_EXPR:
        case NEGATE_EXPR:
  	return gimple_assign_rhs1 (assign);
  
--- 688,693 ----
diff -Nrcpad gcc-12.3.0/gcc/gimple-ssa-sprintf.cc gcc-12.4.0/gcc/gimple-ssa-sprintf.cc
*** gcc-12.3.0/gcc/gimple-ssa-sprintf.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-ssa-sprintf.cc	Thu Jun 20 08:08:06 2024
*************** format_character (const directive &dir,
*** 2166,2173 ****
  
    res.knownrange = true;
  
!   if (dir.specifier == 'C'
!       || dir.modifier == FMT_LEN_l)
      {
        /* A wide character can result in as few as zero bytes.  */
        res.range.min = 0;
--- 2166,2172 ----
  
    res.knownrange = true;
  
!   if (dir.specifier == 'C' || dir.modifier == FMT_LEN_l)
      {
        /* A wide character can result in as few as zero bytes.  */
        res.range.min = 0;
*************** format_character (const directive &dir,
*** 2178,2187 ****
  	{
  	  if (min == 0 && max == 0)
  	    {
! 	      /* The NUL wide character results in no bytes.  */
! 	      res.range.max = 0;
! 	      res.range.likely = 0;
! 	      res.range.unlikely = 0;
  	    }
  	  else if (min >= 0 && min < 128)
  	    {
--- 2177,2189 ----
  	{
  	  if (min == 0 && max == 0)
  	    {
! 	      /* In strict reading of older ISO C or POSIX, this required
! 		 no characters to be emitted.  ISO C23 changes that, so
! 		 does POSIX, to match what has been implemented in most of the
! 		 implementations, namely emitting a single NUL character.
! 		 Let's use 0 for minimum and 1 for all the other values.  */
! 	      res.range.max = 1;
! 	      res.range.likely = res.range.unlikely = 1;
  	    }
  	  else if (min >= 0 && min < 128)
  	    {
*************** format_character (const directive &dir,
*** 2189,2199 ****
  		 is not a 1-to-1 mapping to the source character set or
  		 if the source set is not ASCII.  */
  	      bool one_2_one_ascii
! 		= (target_to_host_charmap[0] == 1 && target_to_host ('a') == 97);
  
  	      /* A wide character in the ASCII range most likely results
  		 in a single byte, and only unlikely in up to MB_LEN_MAX.  */
! 	      res.range.max = one_2_one_ascii ? 1 : target_mb_len_max ();;
  	      res.range.likely = 1;
  	      res.range.unlikely = target_mb_len_max ();
  	      res.mayfail = !one_2_one_ascii;
--- 2191,2202 ----
  		 is not a 1-to-1 mapping to the source character set or
  		 if the source set is not ASCII.  */
  	      bool one_2_one_ascii
! 		= (target_to_host_charmap[0] == 1
! 		   && target_to_host ('a') == 97);
  
  	      /* A wide character in the ASCII range most likely results
  		 in a single byte, and only unlikely in up to MB_LEN_MAX.  */
! 	      res.range.max = one_2_one_ascii ? 1 : target_mb_len_max ();
  	      res.range.likely = 1;
  	      res.range.unlikely = target_mb_len_max ();
  	      res.mayfail = !one_2_one_ascii;
*************** format_character (const directive &dir,
*** 2224,2230 ****
        /* A plain '%c' directive.  Its output is exactly 1.  */
        res.range.min = res.range.max = 1;
        res.range.likely = res.range.unlikely = 1;
-       res.knownrange = true;
      }
  
    /* Bump up the byte counters if WIDTH is greater.  */
--- 2227,2232 ----
diff -Nrcpad gcc-12.3.0/gcc/gimple-ssa-store-merging.cc gcc-12.4.0/gcc/gimple-ssa-store-merging.cc
*** gcc-12.3.0/gcc/gimple-ssa-store-merging.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-ssa-store-merging.cc	Thu Jun 20 08:08:06 2024
*************** imm_store_chain_info::output_merged_stor
*** 4605,4616 ****
  		    }
  		  else if ((BYTES_BIG_ENDIAN ? start_gap : end_gap) > 0)
  		    {
! 		      const unsigned HOST_WIDE_INT imask
! 			= (HOST_WIDE_INT_1U << info->bitsize) - 1;
  		      tem = gimple_build (&seq, loc,
  					  BIT_AND_EXPR, TREE_TYPE (tem), tem,
! 					  build_int_cst (TREE_TYPE (tem),
! 							 imask));
  		    }
  		  const HOST_WIDE_INT shift
  		    = (BYTES_BIG_ENDIAN ? end_gap : start_gap);
--- 4605,4617 ----
  		    }
  		  else if ((BYTES_BIG_ENDIAN ? start_gap : end_gap) > 0)
  		    {
! 		      wide_int imask
! 			= wi::mask (info->bitsize, false,
! 				    TYPE_PRECISION (TREE_TYPE (tem)));
  		      tem = gimple_build (&seq, loc,
  					  BIT_AND_EXPR, TREE_TYPE (tem), tem,
! 					  wide_int_to_tree (TREE_TYPE (tem),
! 							    imask));
  		    }
  		  const HOST_WIDE_INT shift
  		    = (BYTES_BIG_ENDIAN ? end_gap : start_gap);
diff -Nrcpad gcc-12.3.0/gcc/gimple-ssa-warn-access.cc gcc-12.4.0/gcc/gimple-ssa-warn-access.cc
*** gcc-12.3.0/gcc/gimple-ssa-warn-access.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimple-ssa-warn-access.cc	Thu Jun 20 08:08:06 2024
*************** new_delete_mismatch_p (const demangle_co
*** 1688,1693 ****
--- 1688,1694 ----
  
      case DEMANGLE_COMPONENT_FUNCTION_PARAM:
      case DEMANGLE_COMPONENT_TEMPLATE_PARAM:
+     case DEMANGLE_COMPONENT_UNNAMED_TYPE:
        return newc.u.s_number.number != delc.u.s_number.number;
  
      case DEMANGLE_COMPONENT_CHARACTER:
diff -Nrcpad gcc-12.3.0/gcc/gimplify.cc gcc-12.4.0/gcc/gimplify.cc
*** gcc-12.3.0/gcc/gimplify.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/gimplify.cc	Thu Jun 20 08:08:06 2024
*************** gimplify_switch_expr (tree *expr_p, gimp
*** 2764,2769 ****
--- 2764,2770 ----
  
        switch_stmt = gimple_build_switch (SWITCH_COND (switch_expr),
  					 default_case, labels);
+       gimple_set_location (switch_stmt, EXPR_LOCATION (switch_expr));
        /* For the benefit of -Wimplicit-fallthrough, if switch_body_seq
  	 ends with a GIMPLE_LABEL holding SWITCH_BREAK_LABEL_P LABEL_DECL,
  	 wrap the GIMPLE_SWITCH up to that GIMPLE_LABEL into a GIMPLE_BIND,
*************** gimplify_asm_expr (tree *expr_p, gimple_
*** 6847,6853 ****
        stmt = gimple_build_asm_vec (TREE_STRING_POINTER (ASM_STRING (expr)),
  				   inputs, outputs, clobbers, labels);
  
!       gimple_asm_set_volatile (stmt, ASM_VOLATILE_P (expr) || noutputs == 0);
        gimple_asm_set_input (stmt, ASM_INPUT_P (expr));
        gimple_asm_set_inline (stmt, ASM_INLINE_P (expr));
  
--- 6848,6859 ----
        stmt = gimple_build_asm_vec (TREE_STRING_POINTER (ASM_STRING (expr)),
  				   inputs, outputs, clobbers, labels);
  
!       /* asm is volatile if it was marked by the user as volatile or
! 	 there are no outputs or this is an asm goto.  */
!       gimple_asm_set_volatile (stmt,
! 			       ASM_VOLATILE_P (expr)
! 			       || noutputs == 0
! 			       || labels);
        gimple_asm_set_input (stmt, ASM_INPUT_P (expr));
        gimple_asm_set_inline (stmt, ASM_INLINE_P (expr));
  
diff -Nrcpad gcc-12.3.0/gcc/go/ChangeLog gcc-12.4.0/gcc/go/ChangeLog
*** gcc-12.3.0/gcc/go/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/go/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,15 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2023-06-28  Paul E. Murphy  
+ 
+ 	Backported from master:
+ 	2023-06-22  Paul E. Murphy  
+ 
+ 	* go-backend.cc [TARGET_AIX]: Rename and update usage to TARGET_AIX_OS.
+ 	* go-lang.cc: Likewise.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/go/go-backend.cc gcc-12.4.0/gcc/go/go-backend.cc
*** gcc-12.3.0/gcc/go/go-backend.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/go/go-backend.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 45,52 ****
  #define GO_EXPORT_SECTION_NAME ".go_export"
  #endif
  
! #ifndef TARGET_AIX
! #define TARGET_AIX 0
  #endif
  
  /* This file holds all the cases where the Go frontend needs
--- 45,52 ----
  #define GO_EXPORT_SECTION_NAME ".go_export"
  #endif
  
! #ifndef TARGET_AIX_OS
! #define TARGET_AIX_OS 0
  #endif
  
  /* This file holds all the cases where the Go frontend needs
*************** go_write_export_data (const char *bytes,
*** 107,113 ****
      {
        gcc_assert (targetm_common.have_named_sections);
        sec = get_section (GO_EXPORT_SECTION_NAME,
! 			 TARGET_AIX ? SECTION_EXCLUDE : SECTION_DEBUG,
  			 NULL);
      }
  
--- 107,113 ----
      {
        gcc_assert (targetm_common.have_named_sections);
        sec = get_section (GO_EXPORT_SECTION_NAME,
! 			 TARGET_AIX_OS ? SECTION_EXCLUDE : SECTION_DEBUG,
  			 NULL);
      }
  
diff -Nrcpad gcc-12.3.0/gcc/go/go-lang.cc gcc-12.4.0/gcc/go/go-lang.cc
*** gcc-12.3.0/gcc/go/go-lang.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/go/go-lang.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 39,46 ****
  #include "go-c.h"
  #include "go-gcc.h"
  
! #ifndef TARGET_AIX
! #define TARGET_AIX 0
  #endif
  
  /* Language-dependent contents of a type.  */
--- 39,46 ----
  #include "go-c.h"
  #include "go-gcc.h"
  
! #ifndef TARGET_AIX_OS
! #define TARGET_AIX_OS 0
  #endif
  
  /* Language-dependent contents of a type.  */
*************** go_langhook_init (void)
*** 119,127 ****
    args.compiling_runtime = go_compiling_runtime;
    args.debug_escape_level = go_debug_escape_level;
    args.debug_escape_hash = go_debug_escape_hash;
!   args.nil_check_size_threshold = TARGET_AIX ? -1 : 4096;
    args.debug_optimization = go_debug_optimization;
!   args.need_eqtype = TARGET_AIX ? true : false;
    args.linemap = go_get_linemap();
    args.backend = go_get_backend();
    go_create_gogo (&args);
--- 119,127 ----
    args.compiling_runtime = go_compiling_runtime;
    args.debug_escape_level = go_debug_escape_level;
    args.debug_escape_hash = go_debug_escape_hash;
!   args.nil_check_size_threshold = TARGET_AIX_OS ? -1 : 4096;
    args.debug_optimization = go_debug_optimization;
!   args.need_eqtype = TARGET_AIX_OS ? true : false;
    args.linemap = go_get_linemap();
    args.backend = go_get_backend();
    go_create_gogo (&args);
diff -Nrcpad gcc-12.3.0/gcc/go/gofrontend/expressions.cc gcc-12.4.0/gcc/go/gofrontend/expressions.cc
*** gcc-12.3.0/gcc/go/gofrontend/expressions.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/go/gofrontend/expressions.cc	Thu Jun 20 08:08:06 2024
*************** Call_expression::intrinsify(Gogo* gogo,
*** 12325,12331 ****
            return Runtime::make_call(code, loc, 3, a1, a2, a3);
          }
      }
!   else if (package == "internal/abi")
      {
        if (is_method)
  	return NULL;
--- 12325,12332 ----
            return Runtime::make_call(code, loc, 3, a1, a2, a3);
          }
      }
!   else if (package == "internal/abi"
! 	   || package == "bootstrap/internal/abi") // for bootstrapping gc
      {
        if (is_method)
  	return NULL;
diff -Nrcpad gcc-12.3.0/gcc/go/gofrontend/gogo.cc gcc-12.4.0/gcc/go/gofrontend/gogo.cc
*** gcc-12.3.0/gcc/go/gofrontend/gogo.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/go/gofrontend/gogo.cc	Thu Jun 20 08:08:06 2024
*************** class Create_function_descriptors : publ
*** 3331,3336 ****
--- 3331,3339 ----
    int
    expression(Expression**);
  
+   static bool
+   skip_descriptor(Gogo* gogo, const Named_object*);
+ 
   private:
    Gogo* gogo_;
  };
*************** class Create_function_descriptors : publ
*** 3341,3346 ****
--- 3344,3352 ----
  int
  Create_function_descriptors::function(Named_object* no)
  {
+   if (Create_function_descriptors::skip_descriptor(this->gogo_, no))
+     return TRAVERSE_CONTINUE;
+ 
    if (no->is_function()
        && no->func_value()->enclosing() == NULL
        && !no->func_value()->is_method()
*************** Create_function_descriptors::expression(
*** 3428,3433 ****
--- 3434,3461 ----
    return TRAVERSE_CONTINUE;
  }
  
+ // The gc compiler has some special cases that it always compiles as
+ // intrinsics.  For those we don't want to generate a function
+ // descriptor, as there will be no code for it to refer to.
+ 
+ bool
+ Create_function_descriptors::skip_descriptor(Gogo* gogo,
+ 					     const Named_object* no)
+ {
+   const std::string& pkgpath(no->package() == NULL
+ 			     ? gogo->pkgpath()
+ 			     : no->package()->pkgpath());
+ 
+   // internal/abi is the standard library package,
+   // bootstrap/internal/abi is the name used when bootstrapping the gc
+   // compiler.
+ 
+   return ((pkgpath == "internal/abi"
+ 	   || pkgpath == "bootstrap/internal/abi")
+ 	  && (no->name() == "FuncPCABI0"
+ 	      || no->name() == "FuncPCABIInternal"));
+ }
+ 
  // Create function descriptors as needed.  We need a function
  // descriptor for all exported functions and for all functions that
  // are referenced without being called.
*************** Gogo::create_function_descriptors()
*** 3449,3455 ****
        if (no->is_function_declaration()
  	  && !no->func_declaration_value()->type()->is_method()
  	  && !Linemap::is_predeclared_location(no->location())
! 	  && !Gogo::is_hidden_name(no->name()))
  	fndecls.push_back(no);
      }
    for (std::vector::const_iterator p = fndecls.begin();
--- 3477,3484 ----
        if (no->is_function_declaration()
  	  && !no->func_declaration_value()->type()->is_method()
  	  && !Linemap::is_predeclared_location(no->location())
! 	  && !Gogo::is_hidden_name(no->name())
! 	  && !Create_function_descriptors::skip_descriptor(this, no))
  	fndecls.push_back(no);
      }
    for (std::vector::const_iterator p = fndecls.begin();
diff -Nrcpad gcc-12.3.0/gcc/internal-fn.cc gcc-12.4.0/gcc/internal-fn.cc
*** gcc-12.3.0/gcc/internal-fn.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/internal-fn.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 52,57 ****
--- 52,59 ----
  #include "explow.h"
  #include "rtl-iter.h"
  #include "gimple-range.h"
+ #include "tree-ssa-live.h"
+ #include "tree-outof-ssa.h"
  
  /* For lang_hooks.types.type_for_mode.  */
  #include "langhooks.h"
*************** expand_mul_overflow (location_t loc, tre
*** 1393,1399 ****
--- 1395,1405 ----
    rtx target = NULL_RTX;
    signop sign;
    enum insn_code icode;
+   int save_flag_trapv = flag_trapv;
  
+   /* We don't want any __mulv?i3 etc. calls from the expansion of
+      these internal functions, so disable -ftrapv temporarily.  */
+   flag_trapv = 0;
    done_label = gen_label_rtx ();
    do_error = gen_label_rtx ();
  
*************** expand_mul_overflow (location_t loc, tre
*** 2235,2240 ****
--- 2241,2247 ----
        else
  	expand_arith_overflow_result_store (lhs, target, mode, res);
      }
+   flag_trapv = save_flag_trapv;
  }
  
  /* Expand UBSAN_CHECK_* internal function if it has vector operands.  */
*************** expand_vector_ubsan_overflow (location_t
*** 2255,2261 ****
--- 2262,2272 ----
    rtx resvr = NULL_RTX;
    unsigned HOST_WIDE_INT const_cnt = 0;
    bool use_loop_p = (!cnt.is_constant (&const_cnt) || const_cnt > 4);
+   int save_flag_trapv = flag_trapv;
  
+   /* We don't want any __mulv?i3 etc. calls from the expansion of
+      these internal functions, so disable -ftrapv temporarily.  */
+   flag_trapv = 0;
    if (lhs)
      {
        optab op;
*************** expand_vector_ubsan_overflow (location_t
*** 2385,2390 ****
--- 2396,2402 ----
      }
    else if (resvr)
      emit_move_insn (lhsr, resvr);
+   flag_trapv = save_flag_trapv;
  }
  
  /* Expand UBSAN_CHECK_ADD call STMT.  */
*************** expand_arith_overflow (enum tree_code co
*** 2463,2469 ****
--- 2475,2485 ----
    prec0 = MIN (prec0, pr);
    pr = get_min_precision (arg1, uns1_p ? UNSIGNED : SIGNED);
    prec1 = MIN (prec1, pr);
+   int save_flag_trapv = flag_trapv;
  
+   /* We don't want any __mulv?i3 etc. calls from the expansion of
+      these internal functions, so disable -ftrapv temporarily.  */
+   flag_trapv = 0;
    /* If uns0_p && uns1_p, precop is minimum needed precision
       of unsigned type to hold the exact result, otherwise
       precop is minimum needed precision of signed type to
*************** expand_arith_overflow (enum tree_code co
*** 2504,2509 ****
--- 2520,2526 ----
  	  ops.location = loc;
  	  rtx tem = expand_expr_real_2 (&ops, NULL_RTX, mode, EXPAND_NORMAL);
  	  expand_arith_overflow_result_store (lhs, target, mode, tem);
+ 	  flag_trapv = save_flag_trapv;
  	  return;
  	}
  
*************** expand_arith_overflow (enum tree_code co
*** 2527,2542 ****
--- 2544,2562 ----
  	      if (integer_zerop (arg0) && !unsr_p)
  		{
  		  expand_neg_overflow (loc, lhs, arg1, false, NULL);
+ 		  flag_trapv = save_flag_trapv;
  		  return;
  		}
  	      /* FALLTHRU */
  	    case PLUS_EXPR:
  	      expand_addsub_overflow (loc, code, lhs, arg0, arg1, unsr_p,
  				      unsr_p, unsr_p, false, NULL);
+ 	      flag_trapv = save_flag_trapv;
  	      return;
  	    case MULT_EXPR:
  	      expand_mul_overflow (loc, lhs, arg0, arg1, unsr_p,
  				   unsr_p, unsr_p, false, NULL);
+ 	      flag_trapv = save_flag_trapv;
  	      return;
  	    default:
  	      gcc_unreachable ();
*************** expand_arith_overflow (enum tree_code co
*** 2582,2587 ****
--- 2602,2608 ----
  	  else
  	    expand_mul_overflow (loc, lhs, arg0, arg1, unsr_p,
  				 uns0_p, uns1_p, false, NULL);
+ 	  flag_trapv = save_flag_trapv;
  	  return;
  	}
  
*************** expand_call_mem_ref (tree type, gcall *s
*** 2663,2670 ****
    tree tmp = addr;
    if (TREE_CODE (tmp) == SSA_NAME)
      {
!       gimple *def = SSA_NAME_DEF_STMT (tmp);
!       if (gimple_assign_single_p (def))
  	tmp = gimple_assign_rhs1 (def);
      }
  
--- 2684,2691 ----
    tree tmp = addr;
    if (TREE_CODE (tmp) == SSA_NAME)
      {
!       gimple *def = get_gimple_for_ssa_name (tmp);
!       if (def && gimple_assign_single_p (def))
  	tmp = gimple_assign_rhs1 (def);
      }
  
diff -Nrcpad gcc-12.3.0/gcc/ipa-cp.cc gcc-12.4.0/gcc/ipa-cp.cc
*** gcc-12.3.0/gcc/ipa-cp.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ipa-cp.cc	Thu Jun 20 08:08:06 2024
*************** ipacp_value_safe_for_type (tree param_ty
*** 1402,1408 ****
  
  /* Return true iff X and Y should be considered equal values by IPA-CP.  */
  
! static bool
  values_equal_for_ipcp_p (tree x, tree y)
  {
    gcc_checking_assert (x != NULL_TREE && y != NULL_TREE);
--- 1402,1408 ----
  
  /* Return true iff X and Y should be considered equal values by IPA-CP.  */
  
! bool
  values_equal_for_ipcp_p (tree x, tree y)
  {
    gcc_checking_assert (x != NULL_TREE && y != NULL_TREE);
diff -Nrcpad gcc-12.3.0/gcc/ipa-icf-gimple.cc gcc-12.4.0/gcc/ipa-icf-gimple.cc
*** gcc-12.3.0/gcc/ipa-icf-gimple.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ipa-icf-gimple.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 41,47 ****
--- 41,51 ----
  #include "gimple-walk.h"
  
  #include "tree-ssa-alias-compare.h"
+ #include "alloc-pool.h"
+ #include "symbol-summary.h"
  #include "ipa-icf-gimple.h"
+ #include "sreal.h"
+ #include "ipa-prop.h"
  
  namespace ipa_icf_gimple {
  
*************** func_checker::compare_gimple_call (gcall
*** 714,719 ****
--- 718,748 ----
        && !compatible_types_p (TREE_TYPE (t1), TREE_TYPE (t2)))
      return return_false_with_msg ("GIMPLE internal call LHS type mismatch");
  
+   if (!gimple_call_internal_p (s1))
+     {
+       cgraph_edge *e1 = cgraph_node::get (m_source_func_decl)->get_edge (s1);
+       cgraph_edge *e2 = cgraph_node::get (m_target_func_decl)->get_edge (s2);
+       class ipa_edge_args *args1 = ipa_edge_args_sum->get (e1);
+       class ipa_edge_args *args2 = ipa_edge_args_sum->get (e2);
+       if ((args1 != nullptr) != (args2 != nullptr))
+ 	return return_false_with_msg ("ipa_edge_args mismatch");
+       if (args1)
+ 	{
+ 	  int n1 = ipa_get_cs_argument_count (args1);
+ 	  int n2 = ipa_get_cs_argument_count (args2);
+ 	  if (n1 != n2)
+ 	    return return_false_with_msg ("ipa_edge_args nargs mismatch");
+ 	  for (int i = 0; i < n1; i++)
+ 	    {
+ 	      struct ipa_jump_func *jf1 = ipa_get_ith_jump_func (args1, i);
+ 	      struct ipa_jump_func *jf2 = ipa_get_ith_jump_func (args2, i);
+ 	      if (((jf1 != nullptr) != (jf2 != nullptr))
+ 		  || (jf1 && !ipa_jump_functions_equivalent_p (jf1, jf2)))
+ 		return return_false_with_msg ("jump function mismatch");
+ 	    }
+ 	}
+     }
+ 
    return compare_operand (t1, t2, get_operand_access_type (&map, t1));
  }
  
diff -Nrcpad gcc-12.3.0/gcc/ipa-icf.cc gcc-12.4.0/gcc/ipa-icf.cc
*** gcc-12.3.0/gcc/ipa-icf.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ipa-icf.cc	Thu Jun 20 08:08:06 2024
*************** sem_item_optimizer::merge_classes (unsig
*** 3389,3394 ****
--- 3389,3395 ----
  	  continue;
  
  	sem_item *source = c->members[0];
+ 	bool this_merged_p = false;
  
  	if (DECL_NAME (source->decl)
  	    && MAIN_NAME_P (DECL_NAME (source->decl)))
*************** sem_item_optimizer::merge_classes (unsig
*** 3435,3441 ****
  	    if (dbg_cnt (merged_ipa_icf))
  	      {
  		bool merged = source->merge (alias);
! 		merged_p |= merged;
  
  		if (merged && alias->type == VAR)
  		  {
--- 3436,3442 ----
  	    if (dbg_cnt (merged_ipa_icf))
  	      {
  		bool merged = source->merge (alias);
! 		this_merged_p |= merged;
  
  		if (merged && alias->type == VAR)
  		  {
*************** sem_item_optimizer::merge_classes (unsig
*** 3444,3449 ****
--- 3445,3479 ----
  		  }
  	      }
  	  }
+ 
+ 	merged_p |= this_merged_p;
+ 	if (this_merged_p
+ 	    && source->type == FUNC
+ 	    && (!flag_wpa || flag_checking))
+ 	  {
+ 	    unsigned i;
+ 	    tree name;
+ 	    FOR_EACH_SSA_NAME (i, name, DECL_STRUCT_FUNCTION (source->decl))
+ 	      {
+ 		/* We need to either merge or reset SSA_NAME_*_INFO.
+ 		   For merging we don't preserve the mapping between
+ 		   original and alias SSA_NAMEs from successful equals
+ 		   calls.  */
+ 		if (POINTER_TYPE_P (TREE_TYPE (name)))
+ 		  {
+ 		    if (SSA_NAME_PTR_INFO (name))
+ 		      {
+ 			gcc_checking_assert (!flag_wpa);
+ 			SSA_NAME_PTR_INFO (name) = NULL;
+ 		      }
+ 		  }
+ 		else if (SSA_NAME_RANGE_INFO (name))
+ 		  {
+ 		    gcc_checking_assert (!flag_wpa);
+ 		    SSA_NAME_RANGE_INFO (name) = NULL;
+ 		  }
+ 	      }
+ 	  }
        }
  
    if (!m_merged_variables.is_empty ())
diff -Nrcpad gcc-12.3.0/gcc/ipa-param-manipulation.cc gcc-12.4.0/gcc/ipa-param-manipulation.cc
*** gcc-12.3.0/gcc/ipa-param-manipulation.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ipa-param-manipulation.cc	Thu Jun 20 08:08:06 2024
*************** isra_get_ref_base_and_offset (tree expr,
*** 625,638 ****
    return true;
  }
  
  /* Modify actual arguments of a function call in statement currently belonging
     to CS, and make it call CS->callee->decl.  Return the new statement that
     replaced the old one.  When invoked, cfun and current_function_decl have to
!    be set to the caller.  */
  
  gcall *
  ipa_param_adjustments::modify_call (cgraph_edge *cs,
! 				    bool update_references)
  {
    gcall *stmt = cs->call_stmt;
    tree callee_decl = cs->callee->decl;
--- 625,689 ----
    return true;
  }
  
+ /* Remove all statements that use NAME directly or indirectly.  KILLED_SSAS
+    contains the SSA_NAMEs that are already being or have been processed and new
+    ones need to be added to it.  The function only has to process situations
+    handled by ssa_name_only_returned_p in ipa-sra.cc with the exception that it
+    can assume it must never reach a use in a return statement.  */
+ 
+ static void
+ purge_all_uses (tree name, hash_set  *killed_ssas)
+ {
+   imm_use_iterator imm_iter;
+   gimple *stmt;
+   auto_vec  worklist;
+ 
+   worklist.safe_push (name);
+   while (!worklist.is_empty ())
+     {
+       tree cur_name = worklist.pop ();
+       FOR_EACH_IMM_USE_STMT (stmt, imm_iter, cur_name)
+ 	{
+ 	  if (gimple_debug_bind_p (stmt))
+ 	    {
+ 	      /* When runing within tree-inline, we will never end up here but
+ 		 adding the SSAs to killed_ssas will do the trick in this case
+ 		 and the respective debug statements will get reset. */
+ 	      gimple_debug_bind_reset_value (stmt);
+ 	      update_stmt (stmt);
+ 	      continue;
+ 	    }
+ 
+ 	  tree lhs = NULL_TREE;
+ 	  if (is_gimple_assign (stmt))
+ 	    lhs = gimple_assign_lhs (stmt);
+ 	  else if (gimple_code (stmt) == GIMPLE_PHI)
+ 	    lhs = gimple_phi_result (stmt);
+ 	  gcc_assert (lhs
+ 		      && (TREE_CODE (lhs) == SSA_NAME)
+ 		      && !gimple_vdef (stmt));
+ 	  if (!killed_ssas->add (lhs))
+ 	    {
+ 	      worklist.safe_push (lhs);
+ 	      gimple_stmt_iterator gsi = gsi_for_stmt (stmt);
+ 	      gsi_remove (&gsi, true);
+ 	    }
+ 	}
+     }
+ }
+ 
  /* Modify actual arguments of a function call in statement currently belonging
     to CS, and make it call CS->callee->decl.  Return the new statement that
     replaced the old one.  When invoked, cfun and current_function_decl have to
!    be set to the caller.  When called from within tree-inline, KILLED_SSAs has
!    to contain the pointer to killed_new_ssa_names within the copy_body_data
!    structure and SSAs discovered to be useless (if LHS is removed) will be
!    added to it, otherwise it needs to be NULL.  */
  
  gcall *
  ipa_param_adjustments::modify_call (cgraph_edge *cs,
! 				    bool update_references,
! 				    hash_set  *killed_ssas)
  {
    gcall *stmt = cs->call_stmt;
    tree callee_decl = cs->callee->decl;
*************** ipa_param_adjustments::modify_call (cgra
*** 719,724 ****
--- 770,781 ----
  	  }
        if (repl)
  	{
+ 	  if (!useless_type_conversion_p(apm->type, repl->typed.type))
+ 	    {
+ 	      repl = force_value_to_type (apm->type, repl);
+ 	      repl = force_gimple_operand_gsi (&gsi, repl,
+ 					       true, NULL, true, GSI_SAME_STMT);
+ 	    }
  	  vargs.quick_push (repl);
  	  continue;
  	}
*************** ipa_param_adjustments::modify_call (cgra
*** 942,973 ****
  
    gcall *new_stmt = gimple_build_call_vec (callee_decl, vargs);
  
!   tree ssa_to_remove = NULL;
    if (tree lhs = gimple_call_lhs (stmt))
      {
        if (!m_skip_return)
  	gimple_call_set_lhs (new_stmt, lhs);
        else if (TREE_CODE (lhs) == SSA_NAME)
  	{
! 	  /* LHS should now by a default-def SSA.  Unfortunately default-def
! 	     SSA_NAMEs need a backing variable (or at least some code examining
! 	     SSAs assumes it is non-NULL).  So we either have to re-use the
! 	     decl we have at hand or introdice a new one.  */
! 	  tree repl = create_tmp_var (TREE_TYPE (lhs), "removed_return");
! 	  repl = get_or_create_ssa_default_def (cfun, repl);
! 	  SSA_NAME_IS_DEFAULT_DEF (repl) = true;
! 	  imm_use_iterator ui;
! 	  use_operand_p use_p;
! 	  gimple *using_stmt;
! 	  FOR_EACH_IMM_USE_STMT (using_stmt, ui, lhs)
  	    {
! 	      FOR_EACH_IMM_USE_ON_STMT (use_p, ui)
! 		{
! 		  SET_USE (use_p, repl);
! 		}
! 	      update_stmt (using_stmt);
  	    }
! 	  ssa_to_remove = lhs;
  	}
      }
  
--- 999,1018 ----
  
    gcall *new_stmt = gimple_build_call_vec (callee_decl, vargs);
  
!   hash_set  *ssas_to_remove = NULL;
    if (tree lhs = gimple_call_lhs (stmt))
      {
        if (!m_skip_return)
  	gimple_call_set_lhs (new_stmt, lhs);
        else if (TREE_CODE (lhs) == SSA_NAME)
  	{
! 	  if (!killed_ssas)
  	    {
! 	      ssas_to_remove = new hash_set (8);
! 	      killed_ssas = ssas_to_remove;
  	    }
! 	  killed_ssas->add (lhs);
! 	  purge_all_uses (lhs, killed_ssas);
  	}
      }
  
*************** ipa_param_adjustments::modify_call (cgra
*** 986,993 ****
        fprintf (dump_file, "\n");
      }
    gsi_replace (&gsi, new_stmt, true);
!   if (ssa_to_remove)
!     release_ssa_name (ssa_to_remove);
    if (update_references)
      do
        {
--- 1031,1041 ----
        fprintf (dump_file, "\n");
      }
    gsi_replace (&gsi, new_stmt, true);
!   if (ssas_to_remove)
!     {
!       ipa_release_ssas_in_hash (ssas_to_remove);
!       delete ssas_to_remove;
!     }
    if (update_references)
      do
        {
*************** ipa_edge_modifications_finalize ()
*** 2398,2401 ****
--- 2446,2475 ----
    ipa_edge_modifications = NULL;
  }
  
+ /* Helper used to sort a vector of SSA_NAMES. */
  
+ static int
+ compare_ssa_versions (const void *va, const void *vb)
+ {
+   const_tree const a = *(const_tree const*)va;
+   const_tree const b = *(const_tree const*)vb;
+ 
+   if (SSA_NAME_VERSION (a) < SSA_NAME_VERSION (b))
+     return -1;
+   if (SSA_NAME_VERSION (a) > SSA_NAME_VERSION (b))
+     return 1;
+   return 0;
+ }
+ 
+ /* Call release_ssa_name on all elements in KILLED_SSAS in a defined order.  */
+ 
+ void
+ ipa_release_ssas_in_hash (hash_set  *killed_ssas)
+ {
+   auto_vec ssas_to_release;
+   for (tree sn : *killed_ssas)
+     ssas_to_release.safe_push (sn);
+   ssas_to_release.qsort (compare_ssa_versions);
+   for (tree sn : ssas_to_release)
+     release_ssa_name (sn);
+ }
diff -Nrcpad gcc-12.3.0/gcc/ipa-param-manipulation.h gcc-12.4.0/gcc/ipa-param-manipulation.h
*** gcc-12.3.0/gcc/ipa-param-manipulation.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ipa-param-manipulation.h	Thu Jun 20 08:08:06 2024
*************** public:
*** 224,230 ****
  
    /* Modify a call statement arguments (and possibly remove the return value)
       as described in the data fields of this class.  */
!   gcall *modify_call (cgraph_edge *cs, bool update_references);
    /* Return if the first parameter is left intact.  */
    bool first_param_intact_p ();
    /* Build a function type corresponding to the modified call.  */
--- 224,231 ----
  
    /* Modify a call statement arguments (and possibly remove the return value)
       as described in the data fields of this class.  */
!   gcall *modify_call (cgraph_edge *cs, bool update_references,
! 		      hash_set  *killed_ssas);
    /* Return if the first parameter is left intact.  */
    bool first_param_intact_p ();
    /* Build a function type corresponding to the modified call.  */
*************** void push_function_arg_decls (vec
*** 430,435 ****
  void push_function_arg_types (vec *types, tree fntype);
  void ipa_verify_edge_has_no_modifications (cgraph_edge *cs);
  void ipa_edge_modifications_finalize ();
! 
  
  #endif	/* IPA_PARAM_MANIPULATION_H */
--- 431,436 ----
  void push_function_arg_types (vec *types, tree fntype);
  void ipa_verify_edge_has_no_modifications (cgraph_edge *cs);
  void ipa_edge_modifications_finalize ();
! void ipa_release_ssas_in_hash (hash_set  *killed_ssas);
  
  #endif	/* IPA_PARAM_MANIPULATION_H */
diff -Nrcpad gcc-12.3.0/gcc/ipa-prop.cc gcc-12.4.0/gcc/ipa-prop.cc
*** gcc-12.3.0/gcc/ipa-prop.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ipa-prop.cc	Thu Jun 20 08:08:06 2024
*************** ipcp_transform_function (struct cgraph_n
*** 6096,6101 ****
--- 6096,6258 ----
    return modified_mem_access ? TODO_update_ssa_only_virtuals : 0;
  }
  
+ /* Return true if the two pass_through components of two jump functions are
+    known to be equivalent.  AGG_JF denotes whether they are part of aggregate
+    functions or not.  The function can be used before the IPA phase of IPA-CP
+    or inlining because it cannot cope with refdesc changes these passes can
+    carry out.  */
+ 
+ static bool
+ ipa_agg_pass_through_jf_equivalent_p (ipa_pass_through_data *ipt1,
+ 				      ipa_pass_through_data *ipt2,
+ 				      bool agg_jf)
+ 
+ {
+   gcc_assert (agg_jf ||
+ 	      (!ipt1->refdesc_decremented && !ipt2->refdesc_decremented));
+   if (ipt1->operation != ipt2->operation
+       || ipt1->formal_id != ipt2->formal_id
+       || (!agg_jf && (ipt1->agg_preserved != ipt2->agg_preserved)))
+     return false;
+   if (((ipt1->operand != NULL_TREE) != (ipt2->operand != NULL_TREE))
+       || (ipt1->operand
+ 	  && !values_equal_for_ipcp_p (ipt1->operand, ipt2->operand)))
+     return false;
+   return true;
+ }
+ 
+ /* Return true if the two aggregate jump functions are known to be equivalent.
+    The function can be used before the IPA phase of IPA-CP or inlining because
+    it cannot cope with refdesc changes these passes can carry out.  */
+ 
+ static bool
+ ipa_agg_jump_functions_equivalent_p (ipa_agg_jf_item *ajf1,
+ 				     ipa_agg_jf_item *ajf2)
+ {
+   if (ajf1->offset != ajf2->offset
+       || ajf1->jftype != ajf2->jftype
+       || !types_compatible_p (ajf1->type, ajf2->type))
+     return false;
+ 
+   switch (ajf1->jftype)
+     {
+     case IPA_JF_CONST:
+       if (!values_equal_for_ipcp_p (ajf1->value.constant,
+ 				    ajf2->value.constant))
+ 	return false;
+       break;
+     case IPA_JF_PASS_THROUGH:
+       {
+ 	ipa_pass_through_data *ipt1 = &ajf1->value.pass_through;
+ 	ipa_pass_through_data *ipt2 = &ajf2->value.pass_through;
+ 	if (!ipa_agg_pass_through_jf_equivalent_p (ipt1, ipt2, true))
+ 	  return false;
+       }
+       break;
+     case IPA_JF_LOAD_AGG:
+       {
+ 	ipa_load_agg_data *ila1 = &ajf1->value.load_agg;
+ 	ipa_load_agg_data *ila2 = &ajf2->value.load_agg;
+ 	if (!ipa_agg_pass_through_jf_equivalent_p (&ila1->pass_through,
+ 						   &ila2->pass_through, true))
+ 	  return false;
+ 	if (ila1->offset != ila2->offset
+ 	    || ila1->by_ref != ila2->by_ref
+ 	    || !types_compatible_p (ila1->type, ila2->type))
+ 	  return false;
+       }
+       break;
+     default:
+ 	gcc_unreachable ();
+     }
+   return true;
+ }
+ 
+ /* Return true if the two jump functions are known to be equivalent.  The
+    function can be used before the IPA phase of IPA-CP or inlining because it
+    cannot cope with refdesc changes these passes can carry out.  */
+ 
+ bool
+ ipa_jump_functions_equivalent_p (ipa_jump_func *jf1, ipa_jump_func *jf2)
+ {
+   if (jf1->type != jf2->type)
+     return false;
+ 
+   switch (jf1->type)
+     {
+     case IPA_JF_UNKNOWN:
+       break;
+     case IPA_JF_CONST:
+       {
+ 	tree cst1 = ipa_get_jf_constant (jf1);
+ 	tree cst2 = ipa_get_jf_constant (jf2);
+ 	if (!values_equal_for_ipcp_p (cst1, cst2))
+ 	  return false;
+ 
+ 	ipa_cst_ref_desc *rd1 = jfunc_rdesc_usable (jf1);
+ 	ipa_cst_ref_desc *rd2 = jfunc_rdesc_usable (jf2);
+ 	if (rd1 && rd2)
+ 	  {
+ 	    gcc_assert (rd1->refcount == 1
+ 			&& rd2->refcount == 1);
+ 	    gcc_assert (!rd1->next_duplicate && !rd2->next_duplicate);
+ 	  }
+ 	else if (rd1)
+ 	  return false;
+ 	else if (rd2)
+ 	  return false;
+       }
+       break;
+     case IPA_JF_PASS_THROUGH:
+       {
+ 	ipa_pass_through_data *ipt1 = &jf1->value.pass_through;
+ 	ipa_pass_through_data *ipt2 = &jf2->value.pass_through;
+ 	if (!ipa_agg_pass_through_jf_equivalent_p (ipt1, ipt2, false))
+ 	  return false;
+       }
+       break;
+     case IPA_JF_ANCESTOR:
+       {
+ 	ipa_ancestor_jf_data *ia1 = &jf1->value.ancestor;
+ 	ipa_ancestor_jf_data *ia2 = &jf2->value.ancestor;
+ 
+ 	if (ia1->formal_id != ia2->formal_id
+ 	    || ia1->agg_preserved != ia2->agg_preserved
+ 	    || ia1->keep_null != ia2->keep_null
+ 	    || ia1->offset != ia2->offset)
+ 	  return false;
+       }
+       break;
+     default:
+       gcc_unreachable ();
+     }
+ 
+   if (((jf1->bits != nullptr) != (jf2->bits != nullptr))
+       || (jf1->bits && ((jf1->bits->value != jf2->bits->value)
+ 			|| (jf1->bits->mask != jf2->bits->mask))))
+     return false;
+ 
+   if (((jf1->m_vr != nullptr) != (jf2->m_vr != nullptr))
+       || (jf1->m_vr && *jf1->m_vr != *jf2->m_vr))
+     return false;
+ 
+   unsigned alen = vec_safe_length (jf1->agg.items);
+   if (vec_safe_length (jf2->agg.items) != alen)
+     return false;
+ 
+   if (!alen)
+     return true;
+ 
+   if (jf1->agg.by_ref != jf2->agg.by_ref)
+     return false;
+ 
+   for (unsigned i = 0 ; i < alen; i++)
+     if (!ipa_agg_jump_functions_equivalent_p (&(*jf1->agg.items)[i],
+ 					      &(*jf2->agg.items)[i]))
+       return false;
+ 
+   return true;
+ }
  
  /* Return true if OTHER describes same agg value.  */
  bool
diff -Nrcpad gcc-12.3.0/gcc/ipa-prop.h gcc-12.4.0/gcc/ipa-prop.h
*** gcc-12.3.0/gcc/ipa-prop.h	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/ipa-prop.h	Thu Jun 20 08:08:06 2024
*************** bool ipcp_get_parm_bits (tree, tree *, w
*** 1229,1239 ****
--- 1229,1242 ----
  bool unadjusted_ptr_and_unit_offset (tree op, tree *ret,
  				     poly_int64 *offset_ret);
  
+ bool ipa_jump_functions_equivalent_p (ipa_jump_func *jf1, ipa_jump_func *jf2);
+ 
  /* From tree-sra.cc:  */
  tree build_ref_for_offset (location_t, tree, poly_int64, bool, tree,
  			   gimple_stmt_iterator *, bool);
  
  /* In ipa-cp.cc  */
  void ipa_cp_cc_finalize (void);
+ bool values_equal_for_ipcp_p (tree x, tree y);
  
  #endif /* IPA_PROP_H */
diff -Nrcpad gcc-12.3.0/gcc/jit/ChangeLog gcc-12.4.0/gcc/jit/ChangeLog
*** gcc-12.3.0/gcc/jit/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/jit/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,16 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-04-22  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-04-02  Iain Sandoe  
+ 
+ 	* Make-lang.in: Implement exports list, and use a shared
+ 	libgcc.
+ 	* libgccjit.exports: New file.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/jit/Make-lang.in gcc-12.4.0/gcc/jit/Make-lang.in
*** gcc-12.3.0/gcc/jit/Make-lang.in	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/jit/Make-lang.in	Thu Jun 20 08:08:06 2024
*************** else
*** 55,61 ****
  
  ifneq (,$(findstring darwin,$(host)))
  
! LIBGCCJIT_AGE = 1
  LIBGCCJIT_BASENAME = libgccjit
  
  LIBGCCJIT_SONAME = \
--- 55,71 ----
  
  ifneq (,$(findstring darwin,$(host)))
  
! # NOTE that we are building here for the host, and so tests for target-
! # specific functionality will only work when host == target.  This causes
! # fails when building cross-compilers with different object formats (at
! # least when the respective linkers do not accept the same command line
! # options).  Fortunately, for Darwin we can safely hard-code the relevant
! # host options, since all usable linkers support them).
! 
! LIBGCCJIT_CURRENT = 24
! LIBGCCJIT_REVISION = 0
! LIBGCCJIT_AGE = 24
! LIBGCCJIT_COMPAT = 0
  LIBGCCJIT_BASENAME = libgccjit
  
  LIBGCCJIT_SONAME = \
*************** LIBGCCJIT_SONAME = \
*** 63,80 ****
  LIBGCCJIT_FILENAME = $(LIBGCCJIT_BASENAME).$(LIBGCCJIT_VERSION_NUM).dylib
  LIBGCCJIT_LINKER_NAME = $(LIBGCCJIT_BASENAME).dylib
  
! # Conditionalize the use of the LD_VERSION_SCRIPT_OPTION and
! # LD_SONAME_OPTION depending if configure found them, using $(if)
! # We have to define a COMMA here, otherwise the commas in the "true"
! # result are treated as separators by the $(if).
  COMMA := ,
  LIBGCCJIT_VERSION_SCRIPT_OPTION = \
! 	$(if $(LD_VERSION_SCRIPT_OPTION),\
! 	  -Wl$(COMMA)$(LD_VERSION_SCRIPT_OPTION)$(COMMA)$(srcdir)/jit/libgccjit.map)
  
  LIBGCCJIT_SONAME_OPTION = \
! 	$(if $(LD_SONAME_OPTION), \
! 	     -Wl$(COMMA)$(LD_SONAME_OPTION)$(COMMA)$(LIBGCCJIT_SONAME))
  
  LIBGCCJIT_SONAME_SYMLINK = $(LIBGCCJIT_FILENAME)
  LIBGCCJIT_LINKER_NAME_SYMLINK = $(LIBGCCJIT_LINKER_NAME)
--- 73,90 ----
  LIBGCCJIT_FILENAME = $(LIBGCCJIT_BASENAME).$(LIBGCCJIT_VERSION_NUM).dylib
  LIBGCCJIT_LINKER_NAME = $(LIBGCCJIT_BASENAME).dylib
  
! # Darwin does not have a version script option. Exported symbols are controlled
! # by the following, and library versioning is done using libtool.
! # We have to define a COMMA here, otherwise the commas are treated as
! # separators.
  COMMA := ,
  LIBGCCJIT_VERSION_SCRIPT_OPTION = \
!   -Wl$(COMMA)-exported_symbols_list$(COMMA)$(srcdir)/jit/libgccjit.exports
  
+ # For Darwin host, we need a l64 or ld64-compatible linker, that uses
+ # -install_name to introduce this.
  LIBGCCJIT_SONAME_OPTION = \
!   -Wl$(COMMA)-install_name$(COMMA)$(LIBGCCJIT_SONAME)
  
  LIBGCCJIT_SONAME_SYMLINK = $(LIBGCCJIT_FILENAME)
  LIBGCCJIT_LINKER_NAME_SYMLINK = $(LIBGCCJIT_LINKER_NAME)
*************** ifneq (,$(findstring mingw,$(target)))
*** 143,157 ****
  # Create import library
  LIBGCCJIT_EXTRA_OPTS = -Wl,--out-implib,$(LIBGCCJIT_IMPORT_LIB)
  else
- 
  ifneq (,$(findstring darwin,$(host)))
! # TODO : Construct a Darwin-style symbol export file.
! LIBGCCJIT_EXTRA_OPTS = -Wl,-compatibility_version,$(LIBGCCJIT_VERSION_NUM) \
! 	-Wl,-current_version,$(LIBGCCJIT_VERSION_NUM).$(LIBGCCJIT_MINOR_NUM).$(LIBGCCJIT_AGE) \
! 	$(LIBGCCJIT_VERSION_SCRIPT_OPTION) \
! 	$(LIBGCCJIT_SONAME_OPTION)
  else
! 
  LIBGCCJIT_EXTRA_OPTS = $(LIBGCCJIT_VERSION_SCRIPT_OPTION) \
  	$(LIBGCCJIT_SONAME_OPTION)
  endif
--- 153,170 ----
  # Create import library
  LIBGCCJIT_EXTRA_OPTS = -Wl,--out-implib,$(LIBGCCJIT_IMPORT_LIB)
  else
  ifneq (,$(findstring darwin,$(host)))
! LIBGCCJIT_VERS = $(LIBGCCJIT_CURRENT).$(LIBGCCJIT_REVISION).$(LIBGCCJIT_AGE)
! LIBGCCJIT_EXTRA_OPTS = -Wl,-current_version,$(LIBGCCJIT_VERS) \
!  -Wl,-compatibility_version,$(LIBGCCJIT_COMPAT) \
!   $(LIBGCCJIT_VERSION_SCRIPT_OPTION) $(LIBGCCJIT_SONAME_OPTION)
! # Use the default (shared) libgcc.
! JIT_LDFLAGS = $(filter-out -static-libgcc, $(LDFLAGS))
! ifeq (,$(findstring darwin8,$(host)))
! JIT_LDFLAGS += -Wl,-rpath,@loader_path
! endif
  else
! JIT_LDFLAGS = $(LDFLAGS)
  LIBGCCJIT_EXTRA_OPTS = $(LIBGCCJIT_VERSION_SCRIPT_OPTION) \
  	$(LIBGCCJIT_SONAME_OPTION)
  endif
*************** $(LIBGCCJIT_FILENAME): $(jit_OBJS) \
*** 165,171 ****
  	$(LIBDEPS) $(srcdir)/jit/libgccjit.map \
  	$(EXTRA_GCC_OBJS) $(jit.prev)
  	@$(call LINK_PROGRESS,$(INDEX.jit),start)
! 	+$(LLINKER) $(ALL_LINKERFLAGS) $(LDFLAGS) -o $@ -shared \
  	     $(jit_OBJS) libbackend.a libcommon-target.a libcommon.a \
  	     $(CPPLIB) $(LIBDECNUMBER) $(EXTRA_GCC_LIBS) $(LIBS) $(BACKENDLIBS) \
  	     $(EXTRA_GCC_OBJS) \
--- 178,184 ----
  	$(LIBDEPS) $(srcdir)/jit/libgccjit.map \
  	$(EXTRA_GCC_OBJS) $(jit.prev)
  	@$(call LINK_PROGRESS,$(INDEX.jit),start)
! 	+$(LLINKER) $(ALL_LINKERFLAGS) $(JIT_LDFLAGS) -o $@ -shared \
  	     $(jit_OBJS) libbackend.a libcommon-target.a libcommon.a \
  	     $(CPPLIB) $(LIBDECNUMBER) $(EXTRA_GCC_LIBS) $(LIBS) $(BACKENDLIBS) \
  	     $(EXTRA_GCC_OBJS) \
diff -Nrcpad gcc-12.3.0/gcc/jit/libgccjit.exports gcc-12.4.0/gcc/jit/libgccjit.exports
*** gcc-12.3.0/gcc/jit/libgccjit.exports	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/jit/libgccjit.exports	Thu Jun 20 08:08:06 2024
***************
*** 0 ****
--- 1,219 ----
+ # Linker export list for Darwin libgccjit.dylib
+ 
+ #   Contributed by Iain Sandoe .
+ #
+ # This file is part of GCC.
+ #
+ # GCC is free software you can redistribute it and/or modify it
+ # under the terms of the GNU General Public License as published by
+ # the Free Software Foundation either version 3, or (at your option)
+ # any later version.
+ #
+ # GCC is distributed in the hope that it will be useful, but
+ # WITHOUT ANY WARRANTY without even the implied warranty of
+ # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ # General Public License for more details.
+ #
+ # You should have received a copy of the GNU General Public License
+ # along with GCC see the file COPYING3.  If not see
+ # .  */
+ 
+ # The initial release of the library.
+ # Keep this list sorted alphabetically:
+ _gcc_jit_block_add_assignment
+ _gcc_jit_block_add_assignment_op
+ _gcc_jit_block_add_comment
+ _gcc_jit_block_add_eval
+ _gcc_jit_block_as_object
+ _gcc_jit_block_end_with_conditional
+ _gcc_jit_block_end_with_jump
+ _gcc_jit_block_end_with_return
+ _gcc_jit_block_end_with_void_return
+ _gcc_jit_block_get_function
+ _gcc_jit_context_acquire
+ _gcc_jit_context_compile
+ _gcc_jit_context_compile_to_file
+ _gcc_jit_context_dump_to_file
+ _gcc_jit_context_dump_reproducer_to_file
+ _gcc_jit_context_enable_dump
+ _gcc_jit_context_get_builtin_function
+ _gcc_jit_context_get_first_error
+ _gcc_jit_context_get_last_error
+ _gcc_jit_context_get_type
+ _gcc_jit_context_get_int_type
+ _gcc_jit_context_new_array_access
+ _gcc_jit_context_new_array_type
+ _gcc_jit_context_new_binary_op
+ _gcc_jit_context_new_call
+ _gcc_jit_context_new_call_through_ptr
+ _gcc_jit_context_new_cast
+ _gcc_jit_context_new_child_context
+ _gcc_jit_context_new_comparison
+ _gcc_jit_context_new_field
+ _gcc_jit_context_new_function
+ _gcc_jit_context_new_function_ptr_type
+ _gcc_jit_context_new_global
+ _gcc_jit_context_new_location
+ _gcc_jit_context_new_opaque_struct
+ _gcc_jit_context_new_param
+ _gcc_jit_context_new_rvalue_from_double
+ _gcc_jit_context_new_rvalue_from_int
+ _gcc_jit_context_new_rvalue_from_long
+ _gcc_jit_context_new_rvalue_from_ptr
+ _gcc_jit_context_new_string_literal
+ _gcc_jit_context_new_struct_type
+ _gcc_jit_context_new_unary_op
+ _gcc_jit_context_new_union_type
+ _gcc_jit_context_null
+ _gcc_jit_context_one
+ _gcc_jit_context_release
+ _gcc_jit_context_set_bool_option
+ _gcc_jit_context_set_int_option
+ _gcc_jit_context_set_logfile
+ _gcc_jit_context_set_str_option
+ _gcc_jit_context_zero
+ _gcc_jit_field_as_object
+ _gcc_jit_function_as_object
+ _gcc_jit_function_dump_to_dot
+ _gcc_jit_function_get_param
+ _gcc_jit_function_new_block
+ _gcc_jit_function_new_local
+ _gcc_jit_location_as_object
+ _gcc_jit_lvalue_as_object
+ _gcc_jit_lvalue_as_rvalue
+ _gcc_jit_lvalue_access_field
+ _gcc_jit_lvalue_get_address
+ _gcc_jit_object_get_context
+ _gcc_jit_object_get_debug_string
+ _gcc_jit_param_as_lvalue
+ _gcc_jit_param_as_object
+ _gcc_jit_param_as_rvalue
+ _gcc_jit_result_get_code
+ _gcc_jit_result_get_global
+ _gcc_jit_result_release
+ _gcc_jit_rvalue_access_field
+ _gcc_jit_rvalue_as_object
+ _gcc_jit_rvalue_dereference
+ _gcc_jit_rvalue_dereference_field
+ _gcc_jit_rvalue_get_type
+ _gcc_jit_struct_as_type
+ _gcc_jit_struct_set_fields
+ _gcc_jit_type_as_object
+ _gcc_jit_type_get_const
+ _gcc_jit_type_get_pointer
+ _gcc_jit_type_get_volatile
+ 
+ # Add support for adding arbitrary command-line options (PR jit/66628).
+ # LIBGCCJIT_ABI_1
+ _gcc_jit_context_add_command_line_option
+ 
+ # Add support for disabling the check for unreachable blocks (PR jit/66546).
+ # LIBGCCJIT_ABI_2
+ _gcc_jit_context_set_bool_allow_unreachable_blocks
+ 
+ # Add support for switch statements.
+ # LIBGCCJIT_ABI_3
+ _gcc_jit_block_end_with_switch
+ _gcc_jit_case_as_object
+ _gcc_jit_context_new_case
+ 
+ # Add timing API.
+ #LIBGCCJIT_ABI_4
+ _gcc_jit_context_get_timer
+ _gcc_jit_context_set_timer
+ _gcc_jit_timer_new
+ _gcc_jit_timer_release
+ _gcc_jit_timer_push
+ _gcc_jit_timer_pop
+ _gcc_jit_timer_print
+ 
+ # LIBGCCJIT_ABI_5
+ _gcc_jit_context_set_bool_use_external_driver
+ 
+ # LIBGCCJIT_ABI_6
+ _gcc_jit_rvalue_set_bool_require_tail_call
+ 
+ # LIBGCCJIT_ABI_7
+ _gcc_jit_type_get_aligned
+ 
+ # LIBGCCJIT_ABI_8
+ _gcc_jit_type_get_vector
+ 
+ # LIBGCCJIT_ABI_9
+ _gcc_jit_function_get_address
+ 
+ # LIBGCCJIT_ABI_10
+ _gcc_jit_context_new_rvalue_from_vector
+ 
+ # LIBGCCJIT_ABI_11
+ _gcc_jit_context_add_driver_option
+ 
+ # LIBGCCJIT_ABI_12
+ _gcc_jit_context_new_bitfield
+ 
+ # LIBGCCJIT_ABI_13
+ _gcc_jit_version_major
+ _gcc_jit_version_minor
+ _gcc_jit_version_patchlevel
+ 
+ # LIBGCCJIT_ABI_14
+ _gcc_jit_global_set_initializer
+ 
+ # LIBGCCJIT_ABI_15
+ _gcc_jit_block_add_extended_asm
+ _gcc_jit_block_end_with_extended_asm_goto
+ _gcc_jit_extended_asm_as_object
+ _gcc_jit_extended_asm_set_volatile_flag
+ _gcc_jit_extended_asm_set_inline_flag
+ _gcc_jit_extended_asm_add_output_operand
+ _gcc_jit_extended_asm_add_input_operand
+ _gcc_jit_extended_asm_add_clobber
+ _gcc_jit_context_add_top_level_asm
+ 
+ # LIBGCCJIT_ABI_16
+ _gcc_jit_function_get_return_type
+ _gcc_jit_function_get_param_count
+ _gcc_jit_function_type_get_return_type
+ _gcc_jit_function_type_get_param_count
+ _gcc_jit_function_type_get_param_type
+ _gcc_jit_type_unqualified
+ _gcc_jit_type_dyncast_array
+ _gcc_jit_type_is_bool
+ _gcc_jit_type_dyncast_function_ptr_type
+ _gcc_jit_type_is_integral
+ _gcc_jit_type_is_pointer
+ _gcc_jit_type_dyncast_vector
+ _gcc_jit_vector_type_get_element_type
+ _gcc_jit_vector_type_get_num_units
+ _gcc_jit_struct_get_field
+ _gcc_jit_type_is_struct
+ _gcc_jit_struct_get_field_count
+ 
+ # LIBGCCJIT_ABI_17
+ _gcc_jit_lvalue_set_tls_model
+ 
+ # LIBGCCJIT_ABI_18
+ _gcc_jit_lvalue_set_link_section
+ 
+ #LIBGCCJIT_ABI_19
+ _gcc_jit_context_new_array_constructor
+ _gcc_jit_context_new_struct_constructor
+ _gcc_jit_context_new_union_constructor
+ _gcc_jit_global_set_initializer_rvalue
+ 
+ # LIBGCCJIT_ABI_20
+ _gcc_jit_compatible_types
+ _gcc_jit_type_get_size
+ 
+ # LIBGCCJIT_ABI_21
+ _gcc_jit_context_new_bitcast
+ 
+ # LIBGCCJIT_ABI_22
+ _gcc_jit_lvalue_set_register_name
+ 
+ # LIBGCCJIT_ABI_23
+ _gcc_jit_context_set_bool_print_errors_to_stderr
+ 
+ # LIBGCCJIT_ABI_24
+ _gcc_jit_lvalue_set_alignment
+ _gcc_jit_lvalue_get_alignment
diff -Nrcpad gcc-12.3.0/gcc/lra-constraints.cc gcc-12.4.0/gcc/lra-constraints.cc
*** gcc-12.3.0/gcc/lra-constraints.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/lra-constraints.cc	Thu Jun 20 08:08:06 2024
*************** lra_constraints (bool first_p)
*** 5139,5144 ****
--- 5139,5149 ----
  					   loc_equivalence_callback, curr_insn);
  	      if (old != *curr_id->operand_loc[0])
  		{
+ 		  /* If we substitute pseudo by shared equivalence, we can fail
+ 		     to update LRA reg info and this can result in many
+ 		     unexpected consequences.  So keep rtl unshared:  */
+ 		  *curr_id->operand_loc[0]
+ 		    = copy_rtx (*curr_id->operand_loc[0]);
  		  lra_update_insn_regno_info (curr_insn);
  		  changed_p = true;
  		}
diff -Nrcpad gcc-12.3.0/gcc/lra-eliminations.cc gcc-12.4.0/gcc/lra-eliminations.cc
*** gcc-12.3.0/gcc/lra-eliminations.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/lra-eliminations.cc	Thu Jun 20 08:08:06 2024
*************** lra_eliminate_regs_1 (rtx_insn *insn, rt
*** 397,404 ****
  	      rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
  
  	      if (! update_p && ! full_p)
! 		return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
! 	      
  	      if (maybe_ne (update_sp_offset, 0))
  		offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
  	      else
--- 397,404 ----
  	      rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
  
  	      if (! update_p && ! full_p)
! 		return simplify_gen_binary (PLUS, Pmode, to, XEXP (x, 1));
! 
  	      if (maybe_ne (update_sp_offset, 0))
  		offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
  	      else
diff -Nrcpad gcc-12.3.0/gcc/lra.cc gcc-12.4.0/gcc/lra.cc
*** gcc-12.3.0/gcc/lra.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/lra.cc	Thu Jun 20 08:08:06 2024
*************** lra (FILE *f)
*** 2535,2543 ****
    if (inserted_p)
      commit_edge_insertions ();
  
!   /* Replacing pseudos with their memory equivalents might have
!      created shared rtx.  Subsequent passes would get confused
!      by this, so unshare everything here.  */
    unshare_all_rtl_again (get_insns ());
  
    if (flag_checking)
--- 2535,2542 ----
    if (inserted_p)
      commit_edge_insertions ();
  
!   /* Subsequent passes expect that rtl is unshared, so unshare everything
!      here.  */
    unshare_all_rtl_again (get_insns ());
  
    if (flag_checking)
diff -Nrcpad gcc-12.3.0/gcc/lto/ChangeLog gcc-12.4.0/gcc/lto/ChangeLog
*** gcc-12.3.0/gcc/lto/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/lto/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/lto-wrapper.cc gcc-12.4.0/gcc/lto-wrapper.cc
*** gcc-12.3.0/gcc/lto-wrapper.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/lto-wrapper.cc	Thu Jun 20 08:08:06 2024
*************** find_option (vec &opt
*** 193,207 ****
    return find_option (options, option->opt_index);
  }
  
! /* Merge -flto FOPTION into vector of DECODED_OPTIONS.  */
  
  static void
  merge_flto_options (vec &decoded_options,
! 		    cl_decoded_option *foption)
  {
    int existing_opt = find_option (decoded_options, foption);
    if (existing_opt == -1)
      decoded_options.safe_push (*foption);
    else
      {
        if (strcmp (foption->arg, decoded_options[existing_opt].arg) != 0)
--- 193,210 ----
    return find_option (options, option->opt_index);
  }
  
! /* Merge -flto FOPTION into vector of DECODED_OPTIONS.  If FORCE is true
!    then FOPTION overrides previous settings.  */
  
  static void
  merge_flto_options (vec &decoded_options,
! 		    cl_decoded_option *foption, bool force)
  {
    int existing_opt = find_option (decoded_options, foption);
    if (existing_opt == -1)
      decoded_options.safe_push (*foption);
+   else if (force)
+     decoded_options[existing_opt].arg = foption->arg;
    else
      {
        if (strcmp (foption->arg, decoded_options[existing_opt].arg) != 0)
*************** merge_and_complain (vecarg, "jobserver") == 0)
  	    jobserver_requested = true;
  	  break;
--- 1543,1550 ----
  	  break;
  
  	case OPT_flto_:
! 	  /* Override IL file settings with a linker -flto= option.  */
! 	  merge_flto_options (fdecoded_options, option, true);
  	  if (strcmp (option->arg, "jobserver") == 0)
  	    jobserver_requested = true;
  	  break;
diff -Nrcpad gcc-12.3.0/gcc/match.pd gcc-12.4.0/gcc/match.pd
*** gcc-12.3.0/gcc/match.pd	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/match.pd	Thu Jun 20 08:08:06 2024
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 904,909 ****
--- 904,923 ----
         && tree_nop_conversion_p (type, TREE_TYPE (@1)))
     (lshift @0 @2)))
  
+ /* Shifts by precision or greater result in zero.  */
+ (for shift (lshift rshift)
+  (simplify
+   (shift @0 uniform_integer_cst_p@1)
+   (if ((GIMPLE || !sanitize_flags_p (SANITIZE_SHIFT_EXPONENT))
+        /* Leave arithmetic right shifts of possibly negative values alone.  */
+        && (TYPE_UNSIGNED (type)
+            || shift == LSHIFT_EXPR
+ 	   || tree_expr_nonnegative_p (@0))
+        /* Use a signed compare to leave negative shift counts alone.  */
+        && wi::ges_p (wi::to_wide (uniform_integer_cst_p (@1)),
+ 		     element_precision (type)))
+    { build_zero_cst (type); })))
+ 
  /* Fold (1 << (C - x)) where C = precision(type) - 1
     into ((1 << C) >> x). */
  (simplify
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 1723,1729 ****
  /* (x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2) */
  (simplify
    (bit_and (bit_ior @0 CONSTANT_CLASS_P@1) CONSTANT_CLASS_P@2)
!   (bit_ior (bit_and @0 @2) (bit_and @1 @2)))
  
  /* Combine successive equal operations with constants.  */
  (for bitop (bit_and bit_ior bit_xor)
--- 1737,1743 ----
  /* (x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2) */
  (simplify
    (bit_and (bit_ior @0 CONSTANT_CLASS_P@1) CONSTANT_CLASS_P@2)
!   (bit_ior (bit_and @0 @2) (bit_and! @1 @2)))
  
  /* Combine successive equal operations with constants.  */
  (for bitop (bit_and bit_ior bit_xor)
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 1732,1738 ****
    (if (!CONSTANT_CLASS_P (@0))
     /* This is the canonical form regardless of whether (bitop @1 @2) can be
        folded to a constant.  */
!    (bitop @0 (bitop @1 @2))
     /* In this case we have three constants and (bitop @0 @1) doesn't fold
        to a constant.  This can happen if @0 or @1 is a POLY_INT_CST and if
        the values involved are such that the operation can't be decided at
--- 1746,1752 ----
    (if (!CONSTANT_CLASS_P (@0))
     /* This is the canonical form regardless of whether (bitop @1 @2) can be
        folded to a constant.  */
!    (bitop @0 (bitop! @1 @2))
     /* In this case we have three constants and (bitop @0 @1) doesn't fold
        to a constant.  This can happen if @0 or @1 is a POLY_INT_CST and if
        the values involved are such that the operation can't be decided at
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 2635,2647 ****
  	 forever if something doesn't simplify into a constant.  */
        (if (!CONSTANT_CLASS_P (@0))
         (if (outer_op == PLUS_EXPR)
! 	(plus (view_convert @0) (inner_op @2 (view_convert @1)))
! 	(minus (view_convert @0) (neg_inner_op @2 (view_convert @1)))))
        (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0))
  	   || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0)))
         (if (outer_op == PLUS_EXPR)
! 	(view_convert (plus @0 (inner_op (view_convert @2) @1)))
! 	(view_convert (minus @0 (neg_inner_op (view_convert @2) @1))))
         /* If the constant operation overflows we cannot do the transform
  	  directly as we would introduce undefined overflow, for example
  	  with (a - 1) + INT_MIN.  */
--- 2649,2661 ----
  	 forever if something doesn't simplify into a constant.  */
        (if (!CONSTANT_CLASS_P (@0))
         (if (outer_op == PLUS_EXPR)
! 	(plus (view_convert @0) (inner_op! @2 (view_convert @1)))
! 	(minus (view_convert @0) (neg_inner_op! @2 (view_convert @1)))))
        (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0))
  	   || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0)))
         (if (outer_op == PLUS_EXPR)
! 	(view_convert (plus @0 (inner_op! (view_convert @2) @1)))
! 	(view_convert (minus @0 (neg_inner_op! (view_convert @2) @1))))
         /* If the constant operation overflows we cannot do the transform
  	  directly as we would introduce undefined overflow, for example
  	  with (a - 1) + INT_MIN.  */
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 2672,2681 ****
       /* If all 3 captures are CONSTANT_CLASS_P, punt, as we might recurse
  	forever if something doesn't simplify into a constant.  */
       (if (!CONSTANT_CLASS_P (@0))
!       (minus (outer_op (view_convert @1) @2) (view_convert @0)))
       (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0))
  	  || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0)))
!       (view_convert (minus (outer_op @1 (view_convert @2)) @0))
        (if (types_match (type, @0))
         (with { tree cst = const_binop (outer_op, type, @1, @2); }
  	(if (cst && !TREE_OVERFLOW (cst))
--- 2686,2695 ----
       /* If all 3 captures are CONSTANT_CLASS_P, punt, as we might recurse
  	forever if something doesn't simplify into a constant.  */
       (if (!CONSTANT_CLASS_P (@0))
!       (minus (outer_op! (view_convert @1) @2) (view_convert @0)))
       (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0))
  	  || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0)))
!       (view_convert (minus (outer_op! @1 (view_convert @2)) @0))
        (if (types_match (type, @0))
         (with { tree cst = const_binop (outer_op, type, @1, @2); }
  	(if (cst && !TREE_OVERFLOW (cst))
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 2691,2700 ****
      /* If all 3 captures are CONSTANT_CLASS_P, punt, as we might recurse
        forever if something doesn't simplify into a constant.  */
      (if (!CONSTANT_CLASS_P (@0))
!      (plus (view_convert @0) (minus @1 (view_convert @2))))
      (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0))
  	 || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0)))
!      (view_convert (plus @0 (minus (view_convert @1) @2)))
       (if (types_match (type, @0))
        (with { tree cst = const_binop (MINUS_EXPR, type, @1, @2); }
         (if (cst && !TREE_OVERFLOW (cst))
--- 2705,2714 ----
      /* If all 3 captures are CONSTANT_CLASS_P, punt, as we might recurse
        forever if something doesn't simplify into a constant.  */
      (if (!CONSTANT_CLASS_P (@0))
!      (plus (view_convert @0) (minus! @1 (view_convert @2))))
      (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0))
  	 || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0)))
!      (view_convert (plus @0 (minus! (view_convert @1) @2)))
       (if (types_match (type, @0))
        (with { tree cst = const_binop (MINUS_EXPR, type, @1, @2); }
         (if (cst && !TREE_OVERFLOW (cst))
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 3711,3729 ****
        int inside_ptr = POINTER_TYPE_P (inside_type);
        int inside_float = FLOAT_TYPE_P (inside_type);
        int inside_vec = VECTOR_TYPE_P (inside_type);
!       unsigned int inside_prec = TYPE_PRECISION (inside_type);
        int inside_unsignedp = TYPE_UNSIGNED (inside_type);
        int inter_int = INTEGRAL_TYPE_P (inter_type);
        int inter_ptr = POINTER_TYPE_P (inter_type);
        int inter_float = FLOAT_TYPE_P (inter_type);
        int inter_vec = VECTOR_TYPE_P (inter_type);
!       unsigned int inter_prec = TYPE_PRECISION (inter_type);
        int inter_unsignedp = TYPE_UNSIGNED (inter_type);
        int final_int = INTEGRAL_TYPE_P (type);
        int final_ptr = POINTER_TYPE_P (type);
        int final_float = FLOAT_TYPE_P (type);
        int final_vec = VECTOR_TYPE_P (type);
!       unsigned int final_prec = TYPE_PRECISION (type);
        int final_unsignedp = TYPE_UNSIGNED (type);
      }
     (switch
--- 3725,3743 ----
        int inside_ptr = POINTER_TYPE_P (inside_type);
        int inside_float = FLOAT_TYPE_P (inside_type);
        int inside_vec = VECTOR_TYPE_P (inside_type);
!       unsigned int inside_prec = element_precision (inside_type);
        int inside_unsignedp = TYPE_UNSIGNED (inside_type);
        int inter_int = INTEGRAL_TYPE_P (inter_type);
        int inter_ptr = POINTER_TYPE_P (inter_type);
        int inter_float = FLOAT_TYPE_P (inter_type);
        int inter_vec = VECTOR_TYPE_P (inter_type);
!       unsigned int inter_prec = element_precision (inter_type);
        int inter_unsignedp = TYPE_UNSIGNED (inter_type);
        int final_int = INTEGRAL_TYPE_P (type);
        int final_ptr = POINTER_TYPE_P (type);
        int final_float = FLOAT_TYPE_P (type);
        int final_vec = VECTOR_TYPE_P (type);
!       unsigned int final_prec = element_precision (type);
        int final_unsignedp = TYPE_UNSIGNED (type);
      }
     (switch
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 3811,3816 ****
--- 3825,3831 ----
  (simplify
     (float (fix_trunc @0))
     (if (!flag_trapping_math
+ 	&& !HONOR_SIGNED_ZEROS (type)
  	&& types_match (type, TREE_TYPE (@0))
  	&& direct_internal_fn_supported_p (IFN_TRUNC, type,
  					  OPTIMIZE_FOR_BOTH))
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 4186,4191 ****
--- 4201,4210 ----
  /* (v ? w : 0) ? a : b is just (v & w) ? a : b
     Currently disabled after pass lvec because ARM understands
     VEC_COND_EXPR but not a plain v==w fed to BIT_IOR_EXPR.  */
+ #if GIMPLE
+ /* These can only be done in gimple as fold likes to convert:
+    (CMP) & N into (CMP) ? N : 0
+    and we try to match the same pattern again and again. */
  (simplify
   (vec_cond (vec_cond:s @0 @3 integer_zerop) @1 @2)
   (if (optimize_vectors_before_lowering_p () && types_match (@0, @3))
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 4220,4225 ****
--- 4239,4245 ----
   (vec_cond @0 @3 (vec_cond:s @1 @2 @3))
   (if (optimize_vectors_before_lowering_p () && types_match (@0, @1))
    (vec_cond (bit_and (bit_not @0) @1) @2 @3)))
+ #endif
  
  /* Canonicalize mask ? { 0, ... } : { -1, ...} to ~mask if the mask
     types are compatible.  */
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 5359,5377 ****
  		   >= TYPE_PRECISION (TREE_TYPE (@10)))
  		  && (TYPE_UNSIGNED (TREE_TYPE (@00))
  		      == TYPE_UNSIGNED (TREE_TYPE (@10))))
! 	      || (TREE_CODE (@10) == INTEGER_CST
  		  && INTEGRAL_TYPE_P (TREE_TYPE (@00))
! 		  && int_fits_type_p (@10, TREE_TYPE (@00)))))
        (cmp @00 (convert @10))
!       (if (TREE_CODE (@10) == INTEGER_CST
  	   && INTEGRAL_TYPE_P (TREE_TYPE (@00))
! 	   && !int_fits_type_p (@10, TREE_TYPE (@00)))
         (with
  	{
  	  tree min = lower_bound_in_type (TREE_TYPE (@10), TREE_TYPE (@00));
  	  tree max = upper_bound_in_type (TREE_TYPE (@10), TREE_TYPE (@00));
! 	  bool above = integer_nonzerop (const_binop (LT_EXPR, type, max, @10));
! 	  bool below = integer_nonzerop (const_binop (LT_EXPR, type, @10, min));
  	}
  	(if (above || below)
  	 (if (cmp == EQ_EXPR || cmp == NE_EXPR)
--- 5379,5397 ----
  		   >= TYPE_PRECISION (TREE_TYPE (@10)))
  		  && (TYPE_UNSIGNED (TREE_TYPE (@00))
  		      == TYPE_UNSIGNED (TREE_TYPE (@10))))
! 	      || (TREE_CODE (@1) == INTEGER_CST
  		  && INTEGRAL_TYPE_P (TREE_TYPE (@00))
! 		  && int_fits_type_p (@1, TREE_TYPE (@00)))))
        (cmp @00 (convert @10))
!       (if (TREE_CODE (@1) == INTEGER_CST
  	   && INTEGRAL_TYPE_P (TREE_TYPE (@00))
! 	   && !int_fits_type_p (@1, TREE_TYPE (@00)))
         (with
  	{
  	  tree min = lower_bound_in_type (TREE_TYPE (@10), TREE_TYPE (@00));
  	  tree max = upper_bound_in_type (TREE_TYPE (@10), TREE_TYPE (@00));
! 	  bool above = integer_nonzerop (const_binop (LT_EXPR, type, max, @1));
! 	  bool below = integer_nonzerop (const_binop (LT_EXPR, type, @1, min));
  	}
  	(if (above || below)
  	 (if (cmp == EQ_EXPR || cmp == NE_EXPR)
diff -Nrcpad gcc-12.3.0/gcc/objc/ChangeLog gcc-12.4.0/gcc/objc/ChangeLog
*** gcc-12.3.0/gcc/objc/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/objc/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,63 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-05-09  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-05-02  Iain Sandoe  
+ 
+ 	* objc-next-runtime-abi-02.cc (WEAK_PROTOCOLS_AFTER): New.
+ 	(next_runtime_abi_02_protocol_decl): Use WEAK_PROTOCOLS_AFTER
+ 	to determine this ABI change.
+ 	(build_v2_protocol_list_address_table): Likewise.
+ 
+ 2024-04-20  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-01-18  Iain Sandoe  
+ 
+ 	* objc-act.cc (objc_init): Initialize interface and class
+ 	name hash maps before the preprocessor uses them.
+ 
+ 2024-04-19  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-01-28  Iain Sandoe  
+ 
+ 	* objc-next-runtime-abi-02.cc (build_v2_address_table): Prevent
+ 	over-alignment of Objective-C metadata by setting DECL_USER_ALIGN
+ 	on relevant variables.
+ 	(build_v2_protocol_list_address_table): Likewise.
+ 	(generate_v2_protocol_list): Likewise.
+ 	(generate_v2_meth_descriptor_table): Likewise.
+ 	(generate_v2_meth_type_list): Likewise.
+ 	(generate_v2_property_table): Likewise.
+ 	(generate_v2_dispatch_table): Likewise.
+ 	(generate_v2_ivars_list): Likewise.
+ 	(generate_v2_class_structs): Likewise.
+ 	(build_ehtype): Likewise.
+ 	* objc-runtime-shared-support.cc (generate_strings): Likewise.
+ 
+ 2024-04-19  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-01-12  Iain Sandoe  
+ 
+ 	* objc-next-runtime-abi-02.cc
+ 	(build_v2_objc_method_fixup_call): Early exit for cases
+ 	where the sender or receiver are known to be in error.
+ 
+ 2024-04-12  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2022-05-03  Iain Sandoe  
+ 
+ 	* objc-next-runtime-abi-02.cc (next_runtime_abi_02_protocol_decl): Do
+ 	not dead-strip the runtime meta-data symbols.
+ 	(build_v2_classrefs_table): Likewise.
+ 	(build_v2_protocol_list_address_table): Likewise.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/objc/objc-act.cc gcc-12.4.0/gcc/objc/objc-act.cc
*** gcc-12.3.0/gcc/objc/objc-act.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/objc/objc-act.cc	Thu Jun 20 08:08:06 2024
*************** bool
*** 347,352 ****
--- 347,357 ----
  objc_init (void)
  {
    bool ok;
+ 
+   /* Set up stuff used by the preprocessor as well as FE parser.  */
+   interface_hash_init ();
+   hash_init ();
+ 
  #ifdef OBJCPLUS
    if (cxx_init () == false)
  #else
*************** objc_init (void)
*** 376,383 ****
  
    /* Set up stuff used by FE parser and all runtimes.  */
    errbuf = XNEWVEC (char, 1024 * 10);
-   interface_hash_init ();
-   hash_init ();
    objc_encoding_init ();
    /* ... and then check flags and set-up for the selected runtime ... */
    if (flag_next_runtime && flag_objc_abi >= 2)
--- 381,386 ----
diff -Nrcpad gcc-12.3.0/gcc/objc/objc-next-runtime-abi-02.cc gcc-12.4.0/gcc/objc/objc-next-runtime-abi-02.cc
*** gcc-12.3.0/gcc/objc/objc-next-runtime-abi-02.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/objc/objc-next-runtime-abi-02.cc	Thu Jun 20 08:08:06 2024
*************** along with GCC; see the file COPYING3.
*** 72,77 ****
--- 72,78 ----
  #define TAG_MSGSENDSUPER_STRET	"objc_msgSendSuper2_stret"
  
  #define USE_FIXUP_BEFORE	100600
+ #define WEAK_PROTOCOLS_AFTER	100700
  #define TAG_FIXUP		"_fixup"
  
  
*************** next_runtime_abi_02_protocol_decl (tree
*** 1025,1031 ****
    /* static struct _objc_protocol _OBJC_Protocol_; */
    snprintf (buf, BUFSIZE, "_OBJC_Protocol_%s",
  	    IDENTIFIER_POINTER (PROTOCOL_NAME (p)));
!   if (flag_next_runtime >= USE_FIXUP_BEFORE)
      {
        decl = create_hidden_decl (objc_v2_protocol_template, buf);
        DECL_WEAK (decl) = true;
--- 1026,1032 ----
    /* static struct _objc_protocol _OBJC_Protocol_; */
    snprintf (buf, BUFSIZE, "_OBJC_Protocol_%s",
  	    IDENTIFIER_POINTER (PROTOCOL_NAME (p)));
!   if (flag_next_runtime >= WEAK_PROTOCOLS_AFTER)
      {
        decl = create_hidden_decl (objc_v2_protocol_template, buf);
        DECL_WEAK (decl) = true;
*************** next_runtime_abi_02_protocol_decl (tree
*** 1033,1038 ****
--- 1034,1040 ----
    else
      decl = start_var_decl (objc_v2_protocol_template, buf);
    OBJCMETA (decl, objc_meta, meta_protocol);
+   DECL_PRESERVE_P (decl) = 1;
    return decl;
  }
  
*************** build_v2_objc_method_fixup_call (int sup
*** 1656,1661 ****
--- 1658,1665 ----
    rcv_p = (super_flag ? objc_super_type : objc_object_type);
  
    lookup_object = build_c_cast (input_location, rcv_p, lookup_object);
+   if (sender == error_mark_node || lookup_object == error_mark_node)
+     return error_mark_node;
  
    /* Use SAVE_EXPR to avoid evaluating the receiver twice.  */
    lookup_object = save_expr (lookup_object);
*************** build_v2_classrefs_table (void)
*** 2115,2122 ****
  	  expr = convert (objc_class_type, build_fold_addr_expr (expr));
  	}
        /* The runtime wants this, even if it appears unused, so we must force the
! 	 output.
!       DECL_PRESERVE_P (decl) = 1; */
        finish_var_decl (decl, expr);
      }
  }
--- 2119,2126 ----
  	  expr = convert (objc_class_type, build_fold_addr_expr (expr));
  	}
        /* The runtime wants this, even if it appears unused, so we must force the
! 	 output.  */
!       DECL_PRESERVE_P (decl) = 1;
        finish_var_decl (decl, expr);
      }
  }
*************** build_v2_address_table (vec
*** 2243,2248 ****
--- 2247,2253 ----
    DECL_PRESERVE_P (decl) = 1;
    expr = objc_build_constructor (type, initlist);
    OBJCMETA (decl, objc_meta, attr);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl, expr);
  }
  
*************** build_v2_protocol_list_address_table (vo
*** 2308,2314 ****
        gcc_assert (ref->id && TREE_CODE (ref->id) == PROTOCOL_INTERFACE_TYPE);
        snprintf (buf, BUFSIZE, "_OBJC_LabelProtocol_%s",
  		IDENTIFIER_POINTER (PROTOCOL_NAME (ref->id)));
!       if (flag_next_runtime >= USE_FIXUP_BEFORE)
  	{
  	  decl = create_hidden_decl (objc_protocol_type, buf, /*is def=*/true);
  	  DECL_WEAK (decl) = true;
--- 2313,2319 ----
        gcc_assert (ref->id && TREE_CODE (ref->id) == PROTOCOL_INTERFACE_TYPE);
        snprintf (buf, BUFSIZE, "_OBJC_LabelProtocol_%s",
  		IDENTIFIER_POINTER (PROTOCOL_NAME (ref->id)));
!       if (flag_next_runtime >= WEAK_PROTOCOLS_AFTER)
  	{
  	  decl = create_hidden_decl (objc_protocol_type, buf, /*is def=*/true);
  	  DECL_WEAK (decl) = true;
*************** build_v2_protocol_list_address_table (vo
*** 2317,2322 ****
--- 2322,2329 ----
  	decl = create_global_decl (objc_protocol_type, buf, /*is def=*/true);
        expr = convert (objc_protocol_type, build_fold_addr_expr (ref->refdecl));
        OBJCMETA (decl, objc_meta, meta_label_protocollist);
+       DECL_PRESERVE_P (decl) = 1;
+       DECL_USER_ALIGN (decl) = 1;
        finish_var_decl (decl, expr);
      }
  
*************** generate_v2_protocol_list (tree i_or_p,
*** 2395,2400 ****
--- 2402,2408 ----
    /* ObjC2 puts all these in the base section.  */
    OBJCMETA (refs_decl, objc_meta, meta_base);
    DECL_PRESERVE_P (refs_decl) = 1;
+   DECL_USER_ALIGN (refs_decl) = 1;
    finish_var_decl (refs_decl,
  		   objc_build_constructor (TREE_TYPE (refs_decl),initlist));
    return refs_decl;
*************** generate_v2_meth_descriptor_table (tree
*** 2503,2508 ****
--- 2511,2517 ----
    CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, initlist);
    /* Get into the right section.  */
    OBJCMETA (decl, objc_meta, attr);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl, objc_build_constructor (method_list_template, v));
    return decl;
  }
*************** generate_v2_meth_type_list (vec& a
*** 2521,2533 ****
  	    IDENTIFIER_POINTER (PROTOCOL_NAME (protocol)));
    tree decl = start_var_decl (list_type, nam);
    free (nam);
-   OBJCMETA (decl, objc_meta, meta_base);
    vec *v = NULL;
  
    for (unsigned i = 0; i < size; ++i)
      CONSTRUCTOR_APPEND_ELT (v, NULL_TREE,
  			    add_objc_string (METHOD_ENCODING (all_meths[i]),
  					     meth_var_types));
    finish_var_decl (decl, objc_build_constructor (list_type, v));
    return decl;
  }
--- 2530,2543 ----
  	    IDENTIFIER_POINTER (PROTOCOL_NAME (protocol)));
    tree decl = start_var_decl (list_type, nam);
    free (nam);
    vec *v = NULL;
  
    for (unsigned i = 0; i < size; ++i)
      CONSTRUCTOR_APPEND_ELT (v, NULL_TREE,
  			    add_objc_string (METHOD_ENCODING (all_meths[i]),
  					     meth_var_types));
+   OBJCMETA (decl, objc_meta, meta_base);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl, objc_build_constructor (list_type, v));
    return decl;
  }
*************** generate_v2_property_table (tree context
*** 2650,2655 ****
--- 2660,2666 ----
    CONSTRUCTOR_APPEND_ELT (inits, NULL_TREE, initlist);
  
    OBJCMETA (decl, objc_meta, meta_base);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl, objc_build_constructor (TREE_TYPE (decl), inits));
    return decl;
  }
*************** generate_v2_dispatch_table (tree chain,
*** 2861,2866 ****
--- 2872,2878 ----
    CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, initlist);
  
    OBJCMETA (decl, objc_meta, attr);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl,
  		   objc_build_constructor (TREE_TYPE (decl), v));
    return decl;
*************** generate_v2_ivars_list (tree chain, cons
*** 3158,3163 ****
--- 3170,3176 ----
  			  build_int_cst (integer_type_node, size));
    CONSTRUCTOR_APPEND_ELT (inits, NULL_TREE, initlist);
    OBJCMETA (decl, objc_meta, attr);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl, objc_build_constructor (TREE_TYPE (decl), inits));
    generating_instance_variables = 0;
    return decl;
*************** generate_v2_class_structs (struct imp_en
*** 3425,3431 ****
    decl = start_var_decl (objc_v2_class_ro_template,
  			 newabi_append_ro (IDENTIFIER_POINTER
  						(DECL_NAME (metaclass_decl))));
- 
    /* TODO: ivarLayout needs t be built.  */
    initlist =
  	build_v2_class_ro_t_initializer (TREE_TYPE (decl), name_expr,
--- 3438,3443 ----
*************** generate_v2_class_structs (struct imp_en
*** 3435,3440 ****
--- 3447,3453 ----
  					class_ivars, NULL_TREE);
    /* The ROs sit in the default const section.  */
    OBJCMETA (decl, objc_meta, meta_base);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl, initlist);
  
    /* static struct class_t _OBJC_METACLASS_Foo = { ... }; */
*************** generate_v2_class_structs (struct imp_en
*** 3446,3451 ****
--- 3459,3465 ----
  				      build_fold_addr_expr (UOBJC_V2_CACHE_decl),
  				      build_fold_addr_expr (UOBJC_V2_VTABLE_decl));
    /* The class section attributes are set when they are created.  */
+   DECL_USER_ALIGN (metaclass_decl) = 1;
    finish_var_decl (metaclass_decl, initlist);
    impent->meta_decl = metaclass_decl;
  
*************** generate_v2_class_structs (struct imp_en
*** 3525,3530 ****
--- 3539,3545 ----
  					 inst_ivars, props);
    /* The ROs sit in the default const section.  */
    OBJCMETA (decl, objc_meta, meta_base);
+   DECL_USER_ALIGN (decl) = 1;
    finish_var_decl (decl, initlist);
  
    /* static struct class_t _OBJC_CLASS_Foo = { ... }; */
*************** generate_v2_class_structs (struct imp_en
*** 3536,3541 ****
--- 3551,3557 ----
  					build_fold_addr_expr (UOBJC_V2_VTABLE_decl));
  
    /* The class section attributes are set when they are created.  */
+   DECL_USER_ALIGN (class_decl) = 1;
    finish_var_decl (class_decl, initlist);
    impent->class_decl = class_decl;
  
*************** build_ehtype (tree name, const char *eh_
*** 3710,3715 ****
--- 3726,3732 ----
      DECL_WEAK (ehtype_decl) = 1;
    inits = objc2_build_ehtype_initializer (name_expr, class_name_expr);
    OBJCMETA (ehtype_decl, objc_meta, meta_ehtype);
+   DECL_USER_ALIGN (ehtype_decl) = 1;
    finish_var_decl (ehtype_decl, inits);
    return ehtype_decl;
  }
diff -Nrcpad gcc-12.3.0/gcc/objc/objc-runtime-shared-support.cc gcc-12.4.0/gcc/objc/objc-runtime-shared-support.cc
*** gcc-12.3.0/gcc/objc/objc-runtime-shared-support.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/objc/objc-runtime-shared-support.cc	Thu Jun 20 08:08:06 2024
*************** generate_strings (void)
*** 684,689 ****
--- 684,690 ----
        decl = TREE_PURPOSE (chain);
        string_expr = my_build_string (IDENTIFIER_LENGTH (string) + 1,
  				     IDENTIFIER_POINTER (string));
+       DECL_USER_ALIGN (decl) = 1;
        finish_var_decl (decl, string_expr);
      }
  
*************** generate_strings (void)
*** 693,698 ****
--- 694,700 ----
        decl = TREE_PURPOSE (chain);
        string_expr = my_build_string (IDENTIFIER_LENGTH (string) + 1,
  				     IDENTIFIER_POINTER (string));
+       DECL_USER_ALIGN (decl) = 1;
        finish_var_decl (decl, string_expr);
      }
  
*************** generate_strings (void)
*** 702,707 ****
--- 704,710 ----
        decl = TREE_PURPOSE (chain);
        string_expr = my_build_string (IDENTIFIER_LENGTH (string) + 1,
  				     IDENTIFIER_POINTER (string));
+       DECL_USER_ALIGN (decl) = 1;
        finish_var_decl (decl, string_expr);
      }
  
*************** generate_strings (void)
*** 711,716 ****
--- 714,720 ----
        decl = TREE_PURPOSE (chain);
        string_expr = my_build_string (IDENTIFIER_LENGTH (string) + 1,
  				     IDENTIFIER_POINTER (string));
+       DECL_USER_ALIGN (decl) = 1;
        finish_var_decl (decl, string_expr);
      }
  }
diff -Nrcpad gcc-12.3.0/gcc/objcp/ChangeLog gcc-12.4.0/gcc/objcp/ChangeLog
*** gcc-12.3.0/gcc/objcp/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/objcp/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/omp-expand.cc gcc-12.4.0/gcc/omp-expand.cc
*** gcc-12.3.0/gcc/omp-expand.cc	Mon May  8 12:14:39 2023
--- gcc-12.4.0/gcc/omp-expand.cc	Thu Jun 20 08:08:06 2024
*************** expand_omp_for_init_vars (struct omp_for
*** 2564,2570 ****
  	      tree factor = fd->factor;
  	      gcond *cond_stmt
  		= expand_omp_build_cond (gsi, NE_EXPR, factor,
! 					 build_zero_cst (TREE_TYPE (factor)));
  	      edge e = split_block (gsi_bb (*gsi), cond_stmt);
  	      basic_block bb0 = e->src;
  	      e->flags = EDGE_TRUE_VALUE;
--- 2564,2571 ----
  	      tree factor = fd->factor;
  	      gcond *cond_stmt
  		= expand_omp_build_cond (gsi, NE_EXPR, factor,
! 					 build_zero_cst (TREE_TYPE (factor)),
! 					 true);
  	      edge e = split_block (gsi_bb (*gsi), cond_stmt);
  	      basic_block bb0 = e->src;
  	      e->flags = EDGE_TRUE_VALUE;
diff -Nrcpad gcc-12.3.0/gcc/po/ChangeLog gcc-12.4.0/gcc/po/ChangeLog
*** gcc-12.3.0/gcc/po/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/po/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/range-op.cc gcc-12.4.0/gcc/range-op.cc
*** gcc-12.3.0/gcc/range-op.cc	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/range-op.cc	Thu Jun 20 08:08:07 2024
*************** operator_addr_expr::op1_range (irange &r
*** 3825,3831 ****
  			       const irange &op2,
  			       relation_kind rel ATTRIBUTE_UNUSED) const
  {
!   return operator_addr_expr::fold_range (r, type, lhs, op2);
  }
  
  
--- 3825,3841 ----
  			       const irange &op2,
  			       relation_kind rel ATTRIBUTE_UNUSED) const
  {
!    if (empty_range_varying (r, type, lhs, op2))
!     return true;
! 
!   // Return a non-null pointer of the LHS type (passed in op2), but only
!   // if we cant overflow, eitherwise a no-zero offset could wrap to zero.
!   // See PR 111009.
!   if (!contains_zero_p (lhs) && TYPE_OVERFLOW_UNDEFINED (type))
!     r = range_nonzero (type);
!   else
!     r.set_varying (type);
!   return true;
  }
  
  
diff -Nrcpad gcc-12.3.0/gcc/rtl-ssa/blocks.cc gcc-12.4.0/gcc/rtl-ssa/blocks.cc
*** gcc-12.3.0/gcc/rtl-ssa/blocks.cc	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/rtl-ssa/blocks.cc	Thu Jun 20 08:08:07 2024
*************** function_info::place_phis (build_info &b
*** 639,645 ****
        if (bitmap_empty_p (&frontiers[b1]))
  	continue;
  
!       bitmap b1_def = &DF_LR_BB_INFO (BASIC_BLOCK_FOR_FN (m_fn, b1))->def;
        bitmap_iterator bmi;
        unsigned int b2;
        EXECUTE_IF_SET_IN_BITMAP (&frontiers[b1], 0, b2, bmi)
--- 639,650 ----
        if (bitmap_empty_p (&frontiers[b1]))
  	continue;
  
!       // Defs in B1 that are possibly in LR_IN in the dominance frontier
!       // blocks.
!       auto_bitmap b1_def;
!       bitmap_and (b1_def, &DF_LR_BB_INFO (BASIC_BLOCK_FOR_FN (m_fn, b1))->def,
! 		  DF_LR_OUT (BASIC_BLOCK_FOR_FN (m_fn, b1)));
! 
        bitmap_iterator bmi;
        unsigned int b2;
        EXECUTE_IF_SET_IN_BITMAP (&frontiers[b1], 0, b2, bmi)
diff -Nrcpad gcc-12.3.0/gcc/rtlanal.cc gcc-12.4.0/gcc/rtlanal.cc
*** gcc-12.3.0/gcc/rtlanal.cc	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/rtlanal.cc	Thu Jun 20 08:08:07 2024
*************** set_noop_p (const_rtx set)
*** 1639,1650 ****
      return 1;
  
    if (MEM_P (dst) && MEM_P (src))
!     return rtx_equal_p (dst, src) && !side_effects_p (dst);
  
    if (GET_CODE (dst) == ZERO_EXTRACT)
!     return rtx_equal_p (XEXP (dst, 0), src)
! 	   && !BITS_BIG_ENDIAN && XEXP (dst, 2) == const0_rtx
! 	   && !side_effects_p (src);
  
    if (GET_CODE (dst) == STRICT_LOW_PART)
      dst = XEXP (dst, 0);
--- 1639,1653 ----
      return 1;
  
    if (MEM_P (dst) && MEM_P (src))
!     return (rtx_equal_p (dst, src)
! 	    && !side_effects_p (dst)
! 	    && !side_effects_p (src));
  
    if (GET_CODE (dst) == ZERO_EXTRACT)
!     return (rtx_equal_p (XEXP (dst, 0), src)
! 	    && !BITS_BIG_ENDIAN && XEXP (dst, 2) == const0_rtx
! 	    && !side_effects_p (src)
! 	    && !side_effects_p (XEXP (dst, 0)));
  
    if (GET_CODE (dst) == STRICT_LOW_PART)
      dst = XEXP (dst, 0);
*************** vec_series_lowpart_p (machine_mode resul
*** 6990,6992 ****
--- 6993,7010 ----
      }
    return false;
  }
+ 
+ /* Return true if X contains a paradoxical subreg.  */
+ 
+ bool
+ contains_paradoxical_subreg_p (rtx x)
+ {
+   subrtx_var_iterator::array_type array;
+   FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST)
+     {
+       x = *iter;
+       if (SUBREG_P (x) && paradoxical_subreg_p (x))
+ 	return true;
+     }
+   return false;
+ }
diff -Nrcpad gcc-12.3.0/gcc/rtlanal.h gcc-12.4.0/gcc/rtlanal.h
*** gcc-12.3.0/gcc/rtlanal.h	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/rtlanal.h	Thu Jun 20 08:08:07 2024
*************** vec_series_highpart_p (machine_mode resu
*** 338,341 ****
--- 338,343 ----
  bool
  vec_series_lowpart_p (machine_mode result_mode, machine_mode op_mode, rtx sel);
  
+ bool
+ contains_paradoxical_subreg_p (rtx x);
  #endif
diff -Nrcpad gcc-12.3.0/gcc/symtab.cc gcc-12.4.0/gcc/symtab.cc
*** gcc-12.3.0/gcc/symtab.cc	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/symtab.cc	Thu Jun 20 08:08:07 2024
*************** symtab_node::verify (void)
*** 1368,1373 ****
--- 1368,1465 ----
    timevar_pop (TV_CGRAPH_VERIFY);
  }
  
+ /* Return true and set *DATA to true if NODE is an ifunc resolver.  */
+ 
+ static bool
+ check_ifunc_resolver (cgraph_node *node, void *data)
+ {
+   if (node->ifunc_resolver)
+     {
+       bool *is_ifunc_resolver = (bool *) data;
+       *is_ifunc_resolver = true;
+       return true;
+     }
+   return false;
+ }
+ 
+ static bitmap ifunc_ref_map;
+ 
+ /* Return true if any caller of NODE is an ifunc resolver.  */
+ 
+ static bool
+ is_caller_ifunc_resolver (cgraph_node *node)
+ {
+   bool is_ifunc_resolver = false;
+ 
+   for (cgraph_edge *e = node->callers; e; e = e->next_caller)
+     {
+       /* Return true if caller is known to be an IFUNC resolver.  */
+       if (e->caller->called_by_ifunc_resolver)
+ 	return true;
+ 
+       /* Check for recursive call.  */
+       if (e->caller == node)
+ 	continue;
+ 
+       /* Skip if it has been visited.  */
+       unsigned int uid = e->caller->get_uid ();
+       if (!bitmap_set_bit (ifunc_ref_map, uid))
+ 	continue;
+ 
+       if (is_caller_ifunc_resolver (e->caller))
+ 	{
+ 	  /* Return true if caller is an IFUNC resolver.  */
+ 	  e->caller->called_by_ifunc_resolver = true;
+ 	  return true;
+ 	}
+ 
+       /* Check if caller's alias is an IFUNC resolver.  */
+       e->caller->call_for_symbol_and_aliases (check_ifunc_resolver,
+ 					      &is_ifunc_resolver,
+ 					      true);
+       if (is_ifunc_resolver)
+ 	{
+ 	  /* Return true if caller's alias is an IFUNC resolver.  */
+ 	  e->caller->called_by_ifunc_resolver = true;
+ 	  return true;
+ 	}
+     }
+ 
+   return false;
+ }
+ 
+ /* Check symbol table for callees of IFUNC resolvers.  */
+ 
+ void
+ symtab_node::check_ifunc_callee_symtab_nodes (void)
+ {
+   symtab_node *node;
+ 
+   bitmap_obstack_initialize (NULL);
+   ifunc_ref_map = BITMAP_ALLOC (NULL);
+ 
+   FOR_EACH_SYMBOL (node)
+     {
+       cgraph_node *cnode = dyn_cast  (node);
+       if (!cnode)
+ 	continue;
+ 
+       unsigned int uid = cnode->get_uid ();
+       if (bitmap_bit_p (ifunc_ref_map, uid))
+ 	continue;
+       bitmap_set_bit (ifunc_ref_map, uid);
+ 
+       bool is_ifunc_resolver = false;
+       cnode->call_for_symbol_and_aliases (check_ifunc_resolver,
+ 					  &is_ifunc_resolver, true);
+       if (is_ifunc_resolver || is_caller_ifunc_resolver (cnode))
+ 	cnode->called_by_ifunc_resolver = true;
+     }
+ 
+   BITMAP_FREE (ifunc_ref_map);
+   bitmap_obstack_release (NULL);
+ }
+ 
  /* Verify symbol table for internal consistency.  */
  
  DEBUG_FUNCTION void
diff -Nrcpad gcc-12.3.0/gcc/system.h gcc-12.4.0/gcc/system.h
*** gcc-12.3.0/gcc/system.h	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/system.h	Thu Jun 20 08:08:07 2024
*************** extern int fprintf_unlocked (FILE *, con
*** 194,220 ****
  #undef fread_unlocked
  #undef fwrite_unlocked
  
! /* Include  before "safe-ctype.h" to avoid GCC poisoning
!    the ctype macros through safe-ctype.h */
! 
! #ifdef __cplusplus
! #ifdef INCLUDE_STRING
! # include 
! #endif
! #endif
! 
! /* There are an extraordinary number of issues with .
!    The last straw is that it varies with the locale.  Use libiberty's
!    replacement instead.  */
! #include "safe-ctype.h"
! 
! #include 
! 
! #include 
! 
! #if !defined (errno) && defined (HAVE_DECL_ERRNO) && !HAVE_DECL_ERRNO
! extern int errno;
! #endif
  
  #ifdef __cplusplus
  #if defined (INCLUDE_ALGORITHM) || !defined (HAVE_SWAP_IN_UTILITY)
--- 194,201 ----
  #undef fread_unlocked
  #undef fwrite_unlocked
  
! /* Include C++ standard headers before "safe-ctype.h" to avoid GCC
!    poisoning the ctype macros through safe-ctype.h */
  
  #ifdef __cplusplus
  #if defined (INCLUDE_ALGORITHM) || !defined (HAVE_SWAP_IN_UTILITY)
*************** extern int errno;
*** 229,234 ****
--- 210,218 ----
  #ifdef INCLUDE_SET
  # include 
  #endif
+ #ifdef INCLUDE_STRING
+ # include 
+ #endif
  #ifdef INCLUDE_VECTOR
  # include 
  #endif
*************** extern int errno;
*** 245,250 ****
--- 229,247 ----
  # include 
  #endif
  
+ /* There are an extraordinary number of issues with .
+    The last straw is that it varies with the locale.  Use libiberty's
+    replacement instead.  */
+ #include "safe-ctype.h"
+ 
+ #include 
+ 
+ #include 
+ 
+ #if !defined (errno) && defined (HAVE_DECL_ERRNO) && !HAVE_DECL_ERRNO
+ extern int errno;
+ #endif
+ 
  /* Some of glibc's string inlines cause warnings.  Plus we'd rather
     rely on (and therefore test) GCC's string builtins.  */
  #define __NO_STRING_INLINES
diff -Nrcpad gcc-12.3.0/gcc/testsuite/ChangeLog gcc-12.4.0/gcc/testsuite/ChangeLog
*** gcc-12.3.0/gcc/testsuite/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gcc/testsuite/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,6257 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-12  Vladimir N. Makarov  
+ 
+ 	Backported from master:
+ 	2023-09-25  Vladimir N. Makarov  
+ 
+ 	PR middle-end/111497
+ 	* g++.target/i386/pr111497.C: new test.
+ 
+ 2024-06-12  Richard Biener  
+ 
+ 	Backported from master:
+ 	2022-12-05  Richard Biener  
+ 
+ 	PR middle-end/40635
+ 	* gcc.dg/uninit-pr40635.c: New testcase.
+ 
+ 2024-06-12  Torbjörn SVENSSON  
+ 
+ 	Backported from master:
+ 	2024-06-12  Torbjörn SVENSSON  
+ 		    Yvan ROUX  
+ 
+ 	PR target/115253
+ 	* gcc.target/arm/cmse/extend-return.c: Update test case
+ 	condition for Armv8.1-M.
+ 
+ 2024-06-11  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2024-05-20  Andrew Pinski  
+ 
+ 	PR tree-optimization/115143
+ 	* gcc.c-torture/compile/pr115143-1.c: New test.
+ 	* gcc.c-torture/compile/pr115143-2.c: New test.
+ 	* gcc.c-torture/compile/pr115143-3.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-06-06  Jakub Jelinek  
+ 
+ 	PR c/114493
+ 	* gcc.dg/pr114493-1.c: New test.
+ 	* gcc.dg/pr114493-2.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-06-04  Jakub Jelinek  
+ 
+ 	PR middle-end/108789
+ 	* gcc.c-torture/execute/pr108789.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-05-15  Jakub Jelinek  
+ 
+ 	PR rtl-optimization/114902
+ 	PR rtl-optimization/115092
+ 	* gcc.dg/pr114902.c: New test.
+ 	* gcc.dg/pr115092.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-05-07  Jakub Jelinek  
+ 
+ 	PR sanitizer/114956
+ 	* gcc.dg/asan/pr114956.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-30  Jakub Jelinek  
+ 
+ 	PR tree-optimization/114876
+ 	* gcc.dg/pr114876.c: New test.
+ 	* gcc.dg/tree-ssa/builtin-sprintf-warn-1.c: Adjust expected
+ 	diagnostics.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-25  Jakub Jelinek  
+ 
+ 	PR fortran/114825
+ 	* gfortran.dg/gomp/pr114825.f90: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-19  Jakub Jelinek  
+ 
+ 	PR rtl-optimization/114768
+ 	* gcc.dg/pr114768.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-18  Jakub Jelinek  
+ 
+ 	PR middle-end/114753
+ 	* gcc.dg/pr114753.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-15  Jakub Jelinek  
+ 
+ 	PR c++/114634
+ 	* g++.dg/ext/attrib68.C: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-12  Jakub Jelinek  
+ 
+ 	PR c++/114691
+ 	* g++.dg/ext/pr114691.C: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-11  Jakub Jelinek  
+ 
+ 	PR middle-end/110027
+ 	* gcc.dg/asan/pr110027.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-09  Jakub Jelinek  
+ 
+ 	PR c++/114580
+ 	* g++.dg/cpp2a/is-constant-evaluated15.C: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-05  Jakub Jelinek  
+ 
+ 	PR tree-optimization/114566
+ 	* gcc.target/i386/avx512f-pr114566.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-04  Jakub Jelinek  
+ 
+ 	PR c++/114537
+ 	* g++.dg/cpp2a/bit-cast16.C: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-03-14  Jakub Jelinek  
+ 
+ 	PR middle-end/113907
+ 	* gcc.dg/pr113907-1.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-03-14  Jakub Jelinek  
+ 
+ 	PR target/114310
+ 	* gcc.dg/pr114310.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-03-07  Jakub Jelinek  
+ 
+ 	PR rtl-optimization/110079
+ 	* gcc.dg/pr110079.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-03-04  Jakub Jelinek  
+ 
+ 	PR target/114184
+ 	* gcc.target/i386/pr114184.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-02-22  Jakub Jelinek  
+ 
+ 	PR c/114007
+ 	* gcc.dg/c23-attr-syntax-8.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-02-12  Jakub Jelinek  
+ 
+ 	PR c++/113674
+ 	* c-c++-common/Wattributes-3.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-01-30  Jakub Jelinek  
+ 
+ 	PR tree-optimization/113603
+ 	* gcc.c-torture/compile/pr113603.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-01-18  Jakub Jelinek  
+ 
+ 	PR target/113122
+ 	* gcc.target/i386/pr113122-1.c: New test.
+ 	* gcc.target/i386/pr113122-2.c: New test.
+ 	* gcc.target/i386/pr113122-3.c: New test.
+ 	* gcc.target/i386/pr113122-4.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-01-16  Jakub Jelinek  
+ 
+ 	PR tree-optimization/113372
+ 	PR middle-end/90348
+ 	PR middle-end/110115
+ 	PR middle-end/111422
+ 	* gcc.c-torture/execute/pr90348.c: New test.
+ 	* gcc.c-torture/execute/pr110115.c: New test.
+ 	* gcc.c-torture/execute/pr111422.c: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-01-09  Jakub Jelinek  
+ 
+ 	PR c/113262
+ 	* gcc.dg/pr113262.c: New test.
+ 
+ 2024-06-11  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-21  Richard Biener  
+ 
+ 	PR tree-optimization/111070
+ 	* gcc.dg/pr111070.c: New testcase.
+ 
+ 2024-06-10  Eric Botcazou  
+ 
+ 	* gnat.dg/incomplete8.adb: New test.
+ 
+ 2024-06-04  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2024-02-16  Andrew Pinski  
+ 
+ 	PR c++/97990
+ 	* g++.dg/torture/vector-struct-1.C: New test.
+ 
+ 2024-06-04  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-06-26  Richard Biener  
+ 
+ 	PR tree-optimization/110381
+ 	* gcc.dg/vect/pr110381.c: New testcase.
+ 
+ 2024-06-04  Richard Sandiford  
+ 
+ 	Backported from master:
+ 	2024-01-29  Richard Sandiford  
+ 
+ 	PR target/113281
+ 	* gcc.dg/vect/pr113281-1.c: New test.
+ 	* gcc.dg/vect/pr113281-2.c: Likewise.
+ 	* gcc.dg/vect/pr113281-3.c: Likewise.
+ 	* gcc.dg/vect/pr113281-4.c: Likewise.
+ 	* gcc.dg/vect/pr113281-5.c: Likewise.
+ 
+ 2024-06-04  Richard Sandiford  
+ 
+ 	Backported from master:
+ 	2024-05-24  Richard Sandiford  
+ 
+ 	PR tree-optimization/115192
+ 	* gcc.dg/vect/pr115192.c: New test.
+ 
+ 2024-06-03  Uros Bizjak  
+ 
+ 	Backported from master:
+ 	2024-05-31  Uros Bizjak  
+ 
+ 	PR target/115297
+ 	* gcc.target/alpha/pr115297.c: New test.
+ 
+ 2024-05-28  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-05-22  Jakub Jelinek  
+ 
+ 	PR sanitizer/115172
+ 	* gcc.dg/asan/pr115172.c: New test.
+ 
+ 2024-05-28  Tobias Burnus  
+ 
+ 	Backported from master:
+ 	2024-05-20  Tobias Burnus  
+ 
+ 	PR fortran/115150
+ 	* gfortran.dg/shape_12.f90: New test.
+ 
+ 2024-05-28  Martin Jambor  
+ 
+ 	Backported from master:
+ 	2024-05-14  Martin Jambor  
+ 
+ 	PR ipa/113907
+ 	* gcc.dg/lto/pr113907_0.c: New.
+ 	* gcc.dg/lto/pr113907_1.c: Likewise.
+ 	* gcc.dg/lto/pr113907_2.c: Likewise.
+ 
+ 2024-05-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2024-03-28  Jason Merrill  
+ 
+ 	PR c++/100667
+ 	* g++.dg/ext/is_constructible8.C: New test.
+ 
+ 2024-05-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2023-09-22  Jason Merrill  
+ 
+ 	PR c++/111529
+ 	* g++.dg/ext/unroll-4.C: New test.
+ 
+ 2024-05-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2024-01-25  Jason Merrill  
+ 
+ 	PR c++/113598
+ 	* g++.dg/cpp0x/initlist-pmf2.C: New test.
+ 
+ 2024-05-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2024-04-02  Jason Merrill  
+ 
+ 	PR c++/114561
+ 	PR c++/114562
+ 	* g++.dg/conversion/ref10.C: New test.
+ 	* g++.dg/conversion/ref11.C: New test.
+ 
+ 2024-05-22  Torbjörn SVENSSON  
+ 
+ 	Backported from master:
+ 	2024-05-22  Torbjörn SVENSSON  
+ 
+ 	* gcc.target/arm/cmse/extend-param.c: Add regression test. Add
+ 	-fshort-enums.
+ 	* gcc.target/arm/cmse/extend-return.c: Add -fshort-enums option.
+ 
+ 2024-05-17  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-01-31  Richard Biener  
+ 
+ 	PR middle-end/110176
+ 	* gcc.dg/torture/pr110176.c: New testcase.
+ 
+ 2024-05-17  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-17  Richard Biener  
+ 
+ 	PR tree-optimization/111039
+ 	* gcc.dg/pr111039.c: New testcase.
+ 
+ 2024-05-17  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-11-20  Richard Biener  
+ 
+ 	PR tree-optimization/112281
+ 	* gcc.dg/torture/pr112281-1.c: New testcase.
+ 	* gcc.dg/torture/pr112281-2.c: Likewise.
+ 
+ 2024-05-17  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-11-13  Richard Biener  
+ 
+ 	PR tree-optimization/112495
+ 	* gcc.target/i386/pr112495.c: New testcase.
+ 
+ 2024-05-17  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-01-11  Richard Biener  
+ 
+ 	PR tree-optimization/112505
+ 	* gcc.dg/vect/pr112505.c: New testcase.
+ 
+ 2024-05-17  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-01-23  Richard Biener  
+ 
+ 	PR debug/112718
+ 	* gcc.dg/debug/pr112718.c: New testcase.
+ 
+ 2024-05-17  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-12-14  Richard Biener  
+ 
+ 	PR tree-optimization/112793
+ 	* g++.dg/vect/pr112793.cc: New testcase.
+ 
+ 2024-05-16  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-03-26  Richard Biener  
+ 
+ 	PR tree-optimization/114027
+ 	* gcc.dg/vect/pr114027.c: Fix iteration count.
+ 
+ 2024-05-16  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-02-22  Richard Biener  
+ 
+ 	PR tree-optimization/114027
+ 	* gcc.dg/vect/pr114027.c: New testcase.
+ 
+ 2024-05-16  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-05-08  Richard Biener  
+ 
+ 	PR tree-optimization/114375
+ 	* gcc.dg/vect/vect-pr114375.c: New testcase.
+ 
+ 2024-05-16  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-03-21  Richard Biener  
+ 
+ 	PR tree-optimization/114231
+ 	* gcc.dg/vect/pr114231.c: New testcase.
+ 
+ 2024-05-16  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-05-03  Richard Biener  
+ 
+ 	PR gcov-profile/114715
+ 	* gcc.misc-tests/gcov-24.c: New testcase.
+ 
+ 2024-05-15  Martin Jambor  
+ 
+ 	Backported from master:
+ 	2024-04-08  Martin Jambor  
+ 
+ 	PR ipa/108007
+ 	PR ipa/112616
+ 	* gcc.dg/ipa/pr108007.c: New test.
+ 	* gcc.dg/ipa/pr112616.c: Likewise.
+ 	* g++.dg/ipa/pr113757.C: New file.
+ 
+ 2024-05-15  Martin Jambor  
+ 
+ 	Backported from master:
+ 	2024-04-05  Patrick O'Neill  
+ 		    Martin Jambor  
+ 
+ 	PR ipa/114247
+ 	* gcc.dg/ipa/pr114247.c: New test.
+ 
+ 2024-05-13  Andrew MacLeod  
+ 
+ 	PR tree-optimization/111009
+ 	* gcc.dg/pr111009.c: New.
+ 
+ 2024-05-09  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-05-09  Jakub Jelinek  
+ 
+ 	PR c++/89224
+ 	* g++.dg/torture/vector-subaccess-1.C: Add -Wno-psabi as additional
+ 	options.
+ 
+ 2024-05-09  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2023-09-25  Andrew Pinski  
+ 
+ 	PR tree-optimization/110386
+ 	* gcc.c-torture/compile/pr110386-1.c: New test.
+ 	* gcc.c-torture/compile/pr110386-2.c: New test.
+ 
+ 2024-05-08  Marek Polacek  
+ 
+ 	Backported from master:
+ 	2024-02-22  Marek Polacek  
+ 
+ 	* g++.dg/warn/Wmismatched-new-delete-8.C: Use __SIZE_TYPE__.
+ 
+ 2024-05-08  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2024-02-22  Andrew Pinski  
+ 
+ 	PR tree-optimization/109804
+ 	* g++.dg/warn/Wmismatched-new-delete-8.C: New test.
+ 
+ 2024-05-08  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2023-09-10  Andrew Pinski  
+ 
+ 	PR tree-optimization/111331
+ 	* gcc.c-torture/execute/pr111331-1.c: New test.
+ 	* gcc.c-torture/execute/pr111331-2.c: New test.
+ 	* gcc.c-torture/execute/pr111331-3.c: New test.
+ 
+ 2024-05-08  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2024-03-11  Andrew Pinski  
+ 
+ 	PR middle-end/95351
+ 	* gcc.dg/float_opposite_arm-1.c: New test.
+ 
+ 2024-05-08  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2024-05-07  Andrew Pinski  
+ 
+ 	PR c++/89224
+ 	* g++.dg/torture/vector-subaccess-1.C: New test.
+ 	* gcc.dg/pr83415.c: Change warning to error.
+ 
+ 2024-05-07  Georg-Johann Lay  
+ 
+ 	Backported from master:
+ 	2024-05-06  Georg-Johann Lay  
+ 
+ 	PR ipa/92606
+ 	* gcc.target/avr/torture/pr92606.c: New test.
+ 
+ 2024-05-06  Paul Thomas  
+ 
+ 	Backported from master:
+ 	2024-04-02  Paul Thomas  
+ 
+ 	PR fortran/106999
+ 	* gfortran.dg/pr106999.f90: New test.
+ 
+ 2024-05-06  Paul Thomas  
+ 
+ 	Backported from master:
+ 	2024-05-06  Paul Thomas  
+ 
+ 	PR fortran/114739
+ 	* gfortran.dg/pr114739.f90: New test.
+ 	* gfortran.dg/derived_comp_array_ref_8.f90: Add 'implicit none'
+ 	for consistency with expected error message.
+ 	* gfortran.dg/nullify_4.f90: ditto
+ 	* gfortran.dg/pointer_init_6.f90: ditto
+ 	* gfortran.dg/pr107397.f90: ditto
+ 	* gfortran.dg/pr88138.f90: ditto
+ 
+ 2024-05-02  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-04-10  Richard Biener  
+ 
+ 	PR tree-optimization/114672
+ 	* gcc.dg/torture/pr114672.c: New testcase.
+ 
+ 2024-05-02  Will Schmidt  
+ 
+ 	Backported from master:
+ 	2024-04-12  Will Schmidt  
+ 		    Peter Bergner  
+ 
+ 	PR target/101865
+ 	* gcc.target/powerpc/predefine-p7-novsx.c: New test.
+ 	* gcc.target/powerpc/predefine-p8-noaltivec-novsx.c: New test.
+ 	* gcc.target/powerpc/predefine-p8-noaltivec.c: New test.
+ 	* gcc.target/powerpc/predefine-p8-novsx.c: New test.
+ 	* gcc.target/powerpc/predefine-p8-pragma-vsx.c: New test.
+ 	* gcc.target/powerpc/predefine-p9-novsx.c: New test.
+ 
+ 2024-05-01  Jeevitha  
+ 
+ 	Backported from master:
+ 	2024-03-07  Jeevitha Palanisamy  
+ 
+ 	PR target/113950
+ 	* gcc.target/powerpc/pr113950.c: New testcase.
+ 
+ 2024-04-30  Joe Ramsay  
+ 
+ 	Backported from master:
+ 	2024-03-15  Joe Ramsay  
+ 
+ 	* gcc.target/aarch64/no_merge_trunc_signed_zero.c: New test.
+ 
+ 2024-04-30  Yang Yujie  
+ 
+ 	Backported from master:
+ 	2023-12-12  Yang Yujie  
+ 
+ 	* gcc.target/loongarch/eh_return-normal-return.c: New test.
+ 
+ 2024-04-26  Paul Thomas  
+ 
+ 	Backported from master:
+ 	2023-05-23  Paul Thomas  
+ 
+ 	PR fortran/103716
+ 	* gfortran.dg/pr103716.f90 : New test.
+ 
+ 2024-04-26  Andre Vehreschild  
+ 
+ 	Backported from master:
+ 	2023-07-12  Andre Vehreschild  
+ 
+ 	* gfortran.dg/pdt_33.f03: New test.
+ 
+ 2024-04-25  Richard Ball  
+ 
+ 	Backported from master:
+ 	2024-04-25  Richard Ball  
+ 
+ 	* gcc.target/arm/cmse/extend-param.c: New test.
+ 	* gcc.target/arm/cmse/extend-return.c: New test.
+ 
+ 2024-04-25  Kewen Lin  
+ 	    Andrew Pinski  
+ 
+ 	PR target/88309
+ 	* gcc.target/powerpc/pr88309.c: New test.
+ 
+ 2024-04-23  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-03-26  Jakub Jelinek  
+ 
+ 	PR sanitizer/111736
+ 	* gcc.dg/tsan/pr111736.c: New test.
+ 
+ 2024-04-23  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-03-22  Jakub Jelinek  
+ 
+ 	PR sanitizer/111736
+ 	* gcc.dg/ubsan/pr111736.c: New test.
+ 
+ 2024-04-23  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-03-21  Richard Biener  
+ 
+ 	PR tree-optimization/111736
+ 	* gcc.target/i386/pr111736.c: New testcase.
+ 
+ 2024-04-22  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-04-02  Iain Sandoe  
+ 
+ 	PR testsuite/114034
+ 	* g++.dg/gcov/gcov-dump-1.C: Remove extra -lgcov.
+ 	* g++.dg/gcov/gcov-dump-2.C: Likewise.
+ 
+ 2024-04-21  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-04-02  Iain Sandoe  
+ 
+ 	PR testsuite/114036
+ 	* gcc.misc-tests/gcov-14.c: Allow for 'Foo' to be undefined
+ 	on Darwin link lines.
+ 
+ 2024-04-21  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-03-19  Iain Sandoe  
+ 
+ 	PR target/114049
+ 	* gcc.dg/framework-1.c: Use an IOKit header instead of a
+ 	Kernel one.
+ 
+ 2024-04-21  Francois-Xavier Coudert  
+ 
+ 	Backported from master:
+ 	2024-02-10  Francois-Xavier Coudert  
+ 
+ 	* gcc.dg/ssp-2.c: Ignore warning that
+ 	-multiply_defined is obsolete
+ 
+ 2024-04-21  Francois-Xavier Coudert  
+ 
+ 	Backported from master:
+ 	2024-02-10  Francois-Xavier Coudert  
+ 
+ 	* gcc.dg/darwin-ld-2.c: Ignore warning
+ 	that -bind_at_load is deprecated.
+ 
+ 2024-04-21  Francois-Xavier Coudert  
+ 
+ 	Backported from master:
+ 	2023-12-11  Francois-Xavier Coudert  
+ 
+ 	PR testsuite/112297
+ 	* gcc.target/i386/pr100936.c: Require nonpic target.
+ 
+ 2024-04-21  Francois-Xavier Coudert  
+ 
+ 	Backported from master:
+ 	2023-10-30  Francois-Xavier Coudert  
+ 
+ 	* gcc.target/i386/pr105554.c: Require ifunc.
+ 
+ 2024-04-21  Francois-Xavier Coudert  
+ 
+ 	Backported from master:
+ 	2023-09-29  Francois-Xavier Coudert  
+ 
+ 	* gcc.dg/debug/dwarf2/inline4.c: Ajdust regexp to match darwin
+ 	output.
+ 
+ 2024-04-20  Francois-Xavier Coudert  
+ 
+ 	Backported from master:
+ 	2023-10-30  Francois-Xavier Coudert  
+ 
+ 	* gcc.dg/pie-2.c: Skip test on darwin.
+ 
+ 2024-04-20  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-10-02  Iain Sandoe  
+ 
+ 	* g++.dg/debug/dwarf2/pr85550.C: Skip for Darwin.
+ 
+ 2024-04-20  Francois-Xavier Coudert  
+ 
+ 	Backported from master:
+ 	2023-09-08  Francois-Xavier Coudert  
+ 
+ 	* gcc.dg/darwin-segaddr.c: Adjust for darwin linker warning.
+ 	* gcc.dg/pie-7.c: Likewise.
+ 
+ 2024-04-20  Francois-Xavier Coudert  
+ 
+ 	Backported from master:
+ 	2023-08-20  Francois-Xavier Coudert  
+ 
+ 	* gcc.dg/darwin-minversion-link.c: Account for macOS 13 and 14.
+ 
+ 2024-04-20  Francois-Xavier Coudert  
+ 
+ 	Backported from master:
+ 	2023-08-20  Francois-Xavier Coudert  
+ 
+ 	* gcc.dg/ipa/ipa-icf-38.c: Require alias support.
+ 
+ 2024-04-20  Francois-Xavier Coudert  
+ 
+ 	Backported from master:
+ 	2023-08-20  Francois-Xavier Coudert  
+ 
+ 	PR analyzer/104042
+ 	* gcc.dg/analyzer/analyzer.exp: Pass -D_FORTIFY_SOURCE=0 on Darwin.
+ 
+ 2024-04-20  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-02-02  Iain Sandoe  
+ 		    Francois-Xavier Coudert  
+ 
+ 	* lib/target-supports.exp (check_effective_target_shared):
+ 	Allow the external symbols referenced in the test to be undefined.
+ 
+ 2024-04-20  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-01-18  Iain Sandoe  
+ 
+ 	* jit.dg/test-setting-alignment.c:  Handle Darwin in
+ 	jit-verify-assemble output.
+ 
+ 2024-04-20  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-01-18  Iain Sandoe  
+ 
+ 	* jit.dg/jit.exp: Accept target clauses in jit-verify-assembler
+ 	handling.
+ 
+ 2024-04-20  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-01-18  Iain Sandoe  
+ 
+ 	* jit.dg/test-link-section-assembler.c: Accept any whitespace
+ 	between the .section directive and its arguments.
+ 
+ 2024-04-19  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-06-23  Iain Sandoe  
+ 
+ 	* objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h: Make
+ 	this header use pragma system_header.
+ 
+ 2024-04-19  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-01-28  Iain Sandoe  
+ 
+ 	* obj-c++.dg/encode-10.mm: Remove unneeded '-lobjc' option addition.
+ 	* obj-c++.dg/encode-9.mm: Likewise.
+ 
+ 2024-04-19  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-01-18  Iain Sandoe  
+ 
+ 	PR target/105522
+ 	* gcc.dg/pr105522.c: New file.
+ 
+ 2024-04-19  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-11-29  Iain Sandoe  
+ 
+ 	* lib/target-supports.exp: Test an asm line that fails on broken
+ 	Darwin assembler versions.
+ 
+ 2024-04-15  H.J. Lu  
+ 
+ 	Backported from master:
+ 	2024-04-03  H.J. Lu  
+ 
+ 	PR tree-optimization/114115
+ 	* gcc.dg/pr114115.c: New test.
+ 
+ 2024-04-15  Tamar Christina  
+ 
+ 	* g++.target/aarch64/acle/ls64.C: Add +ls64.
+ 	* g++.target/aarch64/acle/ls64_lto.C: Likewise.
+ 	* gcc.target/aarch64/acle/ls64_lto.c: Likewise.
+ 	* gcc.target/aarch64/acle/pr110100.c: Likewise.
+ 	* gcc.target/aarch64/acle/pr110132.c: Likewise.
+ 	* gcc.target/aarch64/pragma_cpp_predefs_2.c: Correct header checks.
+ 
+ 2024-04-15  Tamar Christina  
+ 
+ 	PR tree-optimization/113552
+ 	* gcc.target/aarch64/pr113552.c: New test.
+ 	* gcc.target/aarch64/simd_pcs_attribute-3.c: Remove bogus check.
+ 
+ 2024-04-11  Kito Cheng  
+ 
+ 	Backported from master:
+ 	2024-02-29  Kito Cheng  
+ 
+ 	* gcc.target/riscv/pr114130.c: New.
+ 
+ 2024-04-06  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2024-03-28  Harald Anlauf  
+ 
+ 	PR fortran/114474
+ 	* gfortran.dg/data_pointer_3.f90: New test.
+ 
+ 2024-04-02  Qing Zhao  
+ 
+ 	Backported from master:
+ 	2023-09-15  Qing Zhao  
+ 
+ 	PR tree-optimization/111407
+ 	* gcc.dg/pr111407.c: New test.
+ 
+ 2024-04-02  Mikael Morin  
+ 
+ 	Backported from master:
+ 	2024-03-22  Mikael Morin  
+ 
+ 	PR fortran/107426
+ 	* gfortran.dg/pr89943_3.f90: Update error pattern.
+ 	* gfortran.dg/pr89943_4.f90: Likewise.
+ 	* gfortran.dg/use_31.f90: New test.
+ 
+ 2024-03-29  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2024-03-29  Harald Anlauf  
+ 
+ 	PR fortran/50410
+ 	* gfortran.dg/data_initialized_4.f90: New test.
+ 
+ 2024-03-27  Richard Sandiford  
+ 
+ 	Backported from master:
+ 	2024-03-05  Richard Sandiford  
+ 
+ 	PR sanitizer/97696
+ 	* gcc.target/aarch64/sve/pr97696.c: New test.
+ 
+ 2024-03-20  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2024-03-18  Harald Anlauf  
+ 
+ 	PR fortran/103715
+ 	* gfortran.dg/pr103715.f90: New test.
+ 
+ 2024-03-19  Uros Bizjak  
+ 
+ 	PR target/111822
+ 	* g++.target/i386/pr111822.C (dg-do): Compile only for ia32 targets.
+ 	(dg-options): Add -march=x86-64.
+ 
+ 2024-03-14  liuhongt  
+ 
+ 	Backported from master:
+ 	2024-03-14  liuhongt  
+ 
+ 	* g++.target/i386/pr111822.C: New test.
+ 
+ 2024-03-10  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2024-03-10  Iain Buclaw  
+ 
+ 	PR d/112285
+ 	PR d/112290
+ 	* gdc.dg/pr112285.d: New test.
+ 	* gdc.dg/pr112290.d: New test.
+ 	* gdc.test/compilable/previewin.d: Adjust testcase.
+ 
+ 2024-03-09  Lulu Cheng  
+ 
+ 	Backported from master:
+ 	2024-03-09  Lulu Cheng  
+ 
+ 	* g++.target/loongarch/atomic-cas-int.C: New test.
+ 
+ 2024-03-07  Eric Botcazou  
+ 
+ 	* gnat.dg/predicate15.adb: New test.
+ 
+ 2024-03-03  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2024-03-03  Iain Buclaw  
+ 
+ 	PR d/114171
+ 	* gdc.dg/torture/pr114171.d: New test.
+ 
+ 2024-03-03  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2024-02-12  Iain Buclaw  
+ 
+ 	PR d/113758
+ 	* gdc.dg/torture/pr113758.d: New test.
+ 
+ 2024-03-03  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2024-02-12  Iain Buclaw  
+ 
+ 	PR d/113125
+ 	* gdc.dg/imports/pr113125.d: New test.
+ 	* gdc.dg/pr113125.d: New test.
+ 
+ 2024-03-01  Richard Biener  
+ 
+ 	Backported from master:
+ 	2024-02-06  Richard Biener  
+ 
+ 	PR tree-optimization/110221
+ 	* gfortran.dg/pr110221.f: New testcase.
+ 
+ 2024-02-27  Eric Botcazou  
+ 
+ 	* gnat.dg/opt104.ads, gnat.dg/opt104.adb: New test.
+ 
+ 2024-02-27  Jeevitha  
+ 
+ 	Backported from master:
+ 	2023-08-31  Jeevitha Palanisamy  
+ 
+ 	PR target/110411
+ 	* gcc.target/powerpc/pr110411-1.c: New testcase.
+ 	* gcc.target/powerpc/pr110411-2.c: New testcase.
+ 
+ 2024-02-27  H.J. Lu  
+ 
+ 	Backported from master:
+ 	2024-02-26  H.J. Lu  
+ 
+ 	PR target/114098
+ 	* gcc.target/i386/amxtile-4.c: New test.
+ 
+ 2024-02-26  Eric Botcazou  
+ 
+ 	* gnat.dg/access10.adb: New test.
+ 
+ 2024-02-23  Richard Earnshaw  
+ 
+ 	Backported from master:
+ 	2024-02-23  Richard Earnshaw  
+ 
+ 	PR target/108120
+ 	* gcc.target/arm/neon-recip-div-1.c: New file.
+ 
+ 2024-02-19  Andre Vieira  
+ 
+ 	Backported from master:
+ 	2023-12-20  Andre Vieira  
+ 
+ 	* gcc.target/aarch64/pr112787.c: New test.
+ 
+ 2024-02-15  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-02-15  Jakub Jelinek  
+ 
+ 	PR middle-end/107385
+ 	* gcc.dg/pr107385.c: Require lra effective target.
+ 
+ 2024-02-15  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-02-15  Jakub Jelinek  
+ 
+ 	PR middle-end/107385
+ 	* gcc.dg/pr107385.c: New test.
+ 
+ 2024-02-15  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-02-15  Jakub Jelinek  
+ 
+ 	PR middle-end/113921
+ 	* gcc.target/i386/pr113921.c: New test.
+ 
+ 2024-02-14  Alex Coplan  
+ 
+ 	Backported from master:
+ 	2024-02-07  Alex Coplan  
+ 
+ 	PR target/111677
+ 	* gcc.target/aarch64/torture/pr111677.c: New test.
+ 
+ 2024-02-14  Richard Biener  
+ 
+ 	PR tree-optimization/113896
+ 	* g++.dg/torture/pr113896.C: New testcase.
+ 
+ 2024-02-09  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2024-01-27  Harald Anlauf  
+ 
+ 	PR fortran/104908
+ 	* gfortran.dg/pr104908.f90: New test.
+ 
+ 2024-02-06  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2024-02-06  Jason Merrill  
+ 
+ 	PR c++/107291
+ 	* g++.dg/cpp2a/spaceship-eq17.C: New test.
+ 
+ 2024-02-05  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2023-06-02  Jason Merrill  
+ 
+ 	PR c++/95226
+ 	PR c++/109359
+ 	* g++.dg/ext/frounding-math1.C: New test.
+ 
+ 2024-02-05  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2024-02-05  Jason Merrill  
+ 
+ 	PR c++/111286
+ 	* g++.dg/cpp0x/initlist-array22.C: New test.
+ 
+ 2024-02-02  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2024-02-02  Jason Merrill  
+ 
+ 	PR c++/110084
+ 	* g++.dg/cpp2a/spaceship-synth-neg3.C: Check error message.
+ 	* g++.dg/cpp2a/spaceship-eq16.C: New test.
+ 
+ 2024-02-02  Martin Jambor  
+ 
+ 	Backported from master:
+ 	2024-01-24  Martin Jambor  
+ 
+ 	PR tree-optimization/110422
+ 	* gcc.dg/torture/pr110422.c: New test.
+ 
+ 2024-02-01  Marek Polacek  
+ 
+ 	Backported from master:
+ 	2024-02-01  Marek Polacek  
+ 
+ 	PR c++/112437
+ 	* g++.dg/cpp2a/concepts-throw1.C: New test.
+ 	* g++.dg/eh/throw4.C: New test.
+ 
+ 2024-01-27  Lewis Hyatt  
+ 
+ 	PR preprocessor/105608
+ 	* g++.dg/pch/line-map-1.C: New test.
+ 	* g++.dg/pch/line-map-1.Hs: New test.
+ 	* g++.dg/pch/line-map-2.C: New test.
+ 	* g++.dg/pch/line-map-2.Hs: New test.
+ 	* g++.dg/pch/line-map-3.Hs: New file.
+ 
+ 2024-01-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2024-01-24  Jason Merrill  
+ 
+ 	PR c++/113347
+ 	* g++.dg/eh/return3.C: New test.
+ 
+ 2024-01-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2023-12-20  Jason Merrill  
+ 
+ 	PR c++/103185
+ 	* g++.dg/cpp1z/array-prvalue2.C: New test.
+ 	* g++.dg/cpp1z/eval-order3.C: Test swapped operands.
+ 
+ 2024-01-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2023-12-20  Jason Merrill  
+ 
+ 	PR c++/113088
+ 	PR c++/33799
+ 	* g++.dg/eh/return2.C: New test.
+ 
+ 2024-01-24  Jason Merrill  
+ 
+ 	Backported from master:
+ 	2023-08-31  Jason Merrill  
+ 
+ 	PR c++/92407
+ 	* g++.dg/opt/nrv22.C: New test.
+ 
+ 2024-01-15  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2024-01-15  Patrick Palka  
+ 
+ 	PR c++/109899
+ 	* g++.dg/cpp0x/initlist-array21.C: New test.
+ 
+ 2024-01-08  Georg-Johann Lay  
+ 
+ 	Backported from master:
+ 	2024-01-08  Georg-Johann Lay  
+ 
+ 	PR target/112952
+ 	* gcc.target/avr/attribute-io.h: New file.
+ 	* gcc.target/avr/pr112952-0.c: New test.
+ 	* gcc.target/avr/pr112952-1.c: New test.
+ 	* gcc.target/avr/pr112952-2.c: New test.
+ 	* gcc.target/avr/pr112952-3.c: New test.
+ 
+ 2023-12-24  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-09-22  Patrick Palka  
+ 
+ 	PR c++/111485
+ 	* g++.dg/cpp2a/concepts-ttp5.C: New test.
+ 	* g++.dg/cpp2a/concepts-ttp6.C: New test.
+ 
+ 2023-12-20  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-04-25  Patrick Palka  
+ 
+ 	PR c++/108975
+ 	* g++.dg/cpp0x/lambda/lambda-const11a.C: New test.
+ 
+ 2023-12-19  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-12-19  Jakub Jelinek  
+ 
+ 	PR target/112816
+ 	* gcc.target/i386/sse2-pr112816-2.c: New test.
+ 
+ 2023-12-18  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-12-18  Jakub Jelinek  
+ 
+ 	PR tree-optimization/113013
+ 	* gcc.dg/pr113013.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-12-08  Jakub Jelinek  
+ 
+ 	PR sanitizer/112727
+ 	* c-c++-common/ubsan/pr112727.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-11-29  Jakub Jelinek  
+ 
+ 	PR middle-end/112733
+ 	* gcc.dg/pr112733.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-12-05  Jakub Jelinek  
+ 
+ 	PR target/112845
+ 	* gcc.dg/pr112845.c: New file.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-12-04  Jakub Jelinek  
+ 
+ 	PR target/112837
+ 	* gcc.dg/pr112837.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-12-04  Jakub Jelinek  
+ 
+ 	PR target/112816
+ 	* gcc.target/i386/sse2-pr112816.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-12-04  Jakub Jelinek  
+ 
+ 	PR c++/112795
+ 	* g++.dg/ext/unroll-5.C: New test.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-11-25  Jakub Jelinek  
+ 
+ 	PR target/111408
+ 	* gcc.c-torture/execute/pr111408.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-11-13  Jakub Jelinek  
+ 
+ 	PR tree-optimization/111967
+ 	* gcc.dg/tree-ssa/pr111967.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-11-09  Jakub Jelinek  
+ 
+ 	PR c/112339
+ 	* c-c++-common/ubsan/Wno-attributes-1.c: New test.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-07-19  Jakub Jelinek  
+ 
+ 	PR tree-optimization/110731
+ 	* gcc.dg/pr110731.c: New test.
+ 
+ 2023-12-15  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-24  Richard Biener  
+ 
+ 	PR debug/111080
+ 	* gcc.dg/debug/dwarf2/pr111080.c: New testcase.
+ 
+ 2023-12-15  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-25  Richard Biener  
+ 
+ 	PR tree-optimization/111137
+ 	* gcc.dg/torture/pr111137.c: New testcase.
+ 
+ 2023-12-15  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-31  Richard Biener  
+ 
+ 	PR middle-end/111253
+ 	* gcc.dg/Wfree-nonheap-object-7.c: New testcase.
+ 
+ 2023-12-12  liuhongt  
+ 
+ 	Backported from master:
+ 	2023-12-12  liuhongt  
+ 
+ 	* gcc.target/i386/pr112891.c: New test.
+ 	* gcc.target/i386/pr112891-2.c: New test.
+ 
+ 2023-12-01  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2023-11-26  Harald Anlauf  
+ 
+ 	PR fortran/111880
+ 	* gfortran.dg/pr111880.f90: New test.
+ 
+ 2023-11-27  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-11-16  Patrick Palka  
+ 
+ 	PR c++/111703
+ 	PR c++/107939
+ 	* g++.dg/cpp2a/concepts-fn8.C: Extend test.
+ 	* g++.dg/diagnostic/constexpr4.C: New test.
+ 
+ 2023-11-27  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-11-15  Patrick Palka  
+ 
+ 	PR c++/111703
+ 	PR c++/112269
+ 	* g++.dg/cpp2a/concepts-fn8.C: New test.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-10-23  Richard Biener  
+ 
+ 	PR tree-optimization/111917
+ 	* gcc.dg/torture/pr111917.c: New testcase.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-10-17  Richard Biener  
+ 
+ 	PR middle-end/111818
+ 	* gcc.dg/torture/pr111818.c: New testcase.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-09-28  Richard Biener  
+ 
+ 	PR tree-optimization/111614
+ 	* gcc.dg/torture/pr111614.c: New testcase.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-10-12  Richard Biener  
+ 
+ 	PR tree-optimization/111764
+ 	* gcc.dg/vect/pr111764.c: New testcase.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-10-20  Richard Biener  
+ 
+ 	PR tree-optimization/111445
+ 	* gcc.dg/torture/pr111445.c: New testcase.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-18  Richard Biener  
+ 
+ 	PR tree-optimization/111019
+ 	* g++.dg/torture/pr111019.C: New testcase.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-08-03  Richard Biener  
+ 
+ 	PR tree-optimization/110702
+ 	* gcc.dg/torture/pr110702.c: New testcase.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-07-06  Richard Biener  
+ 
+ 	PR tree-optimization/110556
+ 	* gcc.dg/torture/pr110556.c: New testcase.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-07-06  Richard Biener  
+ 
+ 	PR tree-optimization/110515
+ 	* g++.dg/opt/pr110515.C: New testcase.
+ 
+ 2023-11-27  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-06-20  Richard Biener  
+ 
+ 	PR debug/110295
+ 	* g++.dg/debug/pr110295.C: New testcase.
+ 
+ 2023-11-24  Uros Bizjak  
+ 
+ 	Backported from master:
+ 	2023-11-23  Uros Bizjak  
+ 
+ 	PR target/112672
+ 	* gcc.target/i386/pr112672.c: New test.
+ 
+ 2023-11-22  Maciej W. Rozycki  
+ 
+ 	Backported from master:
+ 	2023-11-22  Maciej W. Rozycki  
+ 
+ 	PR target/111815
+ 	* gcc.dg/torture/pr111815.c: New test.
+ 
+ 2023-11-17  Jason Merrill  
+ 
+ 	PR c++/112301
+ 	PR c++/102191
+ 	PR c++/33799
+ 	* g++.dg/eh/return1.C: Add more cases.
+ 
+ 2023-11-17  Jason Merrill  
+ 
+ 	PR c++/33799
+ 	* g++.dg/eh/return1.C: Add label cases.
+ 
+ 2023-11-16  Eric Botcazou  
+ 
+ 	* gnat.dg/varsize4.adb (Func): Initialize Byte_Read parameter.
+ 
+ 2023-11-16  Eric Botcazou  
+ 
+ 	* gnat.dg/varsize4.ads, gnat.dg/varsize4.adb: New test.
+ 	* gnat.dg/varsize4_pkg.ads: New helper.
+ 
+ 2023-11-16  Xi Ruoyao  
+ 
+ 	Backported from master:
+ 	2023-11-15  Xi Ruoyao  
+ 
+ 	* gcc.target/loongarch/cas-acquire.c: New test.
+ 
+ 2023-11-15  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-11-06  Kewen Lin  
+ 
+ 	PR target/111828
+ 	* lib/target-supports.exp
+ 	(check_effective_target_powerpc_as_p10_htm): New proc.
+ 	* g++.target/powerpc/pr111828-1.C: New test.
+ 	* g++.target/powerpc/pr111828-2.C: New test.
+ 
+ 2023-11-10  liuhongt  
+ 
+ 	Backported from master:
+ 	2023-11-10  liuhongt  
+ 
+ 	* g++.target/i386/pr112443.C: New test.
+ 
+ 2023-10-29  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2023-10-29  Iain Buclaw  
+ 
+ 	PR d/110712
+ 	* gdc.dg/pr110712.d: New test.
+ 
+ 2023-10-28  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2023-10-28  Iain Buclaw  
+ 
+ 	PR d/112270
+ 	* gdc.dg/pr112270.d: New test.
+ 
+ 2023-10-26  chenxiaolong  
+ 
+ 	Backported from master:
+ 	2023-10-25  chenxiaolong  
+ 
+ 	* gcc.target/loongarch/builtin_thread_pointer.c: New test.
+ 
+ 2023-10-26  liuhongt  
+ 
+ 	Backported from master:
+ 	2023-07-06  liuhongt  
+ 
+ 	* gcc.target/i386/pr110170-3.c: New test.
+ 
+ 2023-10-23  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-10-12  Kewen Lin  
+ 
+ 	PR target/111367
+ 	* g++.target/powerpc/pr111367.C: New test.
+ 
+ 2023-10-21  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2023-10-17  Harald Anlauf  
+ 
+ 	PR fortran/111837
+ 	* gfortran.dg/implied_do_io_8.f90: New test.
+ 
+ 2023-10-16  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-09-25  Kewen Lin  
+ 
+ 	PR target/111380
+ 	* gcc.target/powerpc/pr111380-1.c: New test.
+ 	* gcc.target/powerpc/pr111380-2.c: New test.
+ 
+ 2023-10-16  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-09-25  Kewen Lin  
+ 
+ 	PR target/111366
+ 	* g++.target/powerpc/pr111366.C: New test.
+ 
+ 2023-10-07  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2023-10-06  Andrew Pinski  
+ 
+ 	PR middle-end/111699
+ 	* gcc.c-torture/compile/pr111699-1.c: New test.
+ 
+ 2023-10-02  Pat Haugen  
+ 
+ 	Backported from master:
+ 	2023-09-19  Pat Haugen  
+ 
+ 	* gcc.target/powerpc/clone1.c: Add xfails.
+ 	* gcc.target/powerpc/clone3.c: Likewise.
+ 	* gcc.target/powerpc/mod-1.c: Update scan strings and add xfails.
+ 	* gcc.target/powerpc/mod-2.c: Likewise.
+ 	* gcc.target/powerpc/p10-vdivq-vmodq.c: Add xfails.
+ 
+ 2023-09-29  Wilco Dijkstra  
+ 
+ 	Backported from master:
+ 	2023-09-28  Wilco Dijkstra  
+ 
+ 	PR target/111121
+ 	* gcc.target/aarch64/mops_4.c: Add memmove testcases.
+ 
+ 2023-09-26  Eric Botcazou  
+ 
+ 	* gnat.dg/opt102.adb:New test.
+ 	* gnat.dg/opt102_pkg.adb, gnat.dg/opt102_pkg.ads: New helper.
+ 
+ 2023-09-20  Richard Sandiford  
+ 
+ 	Backported from master:
+ 	2023-09-15  Richard Sandiford  
+ 
+ 	PR target/111411
+ 	* gcc.dg/rtl/aarch64/pr111411.c: New test.
+ 
+ 2023-09-12  Uros Bizjak  
+ 
+ 	PR target/111340
+ 	* gcc.target/i386/pr111340.c: New test.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* gcc.target/aarch64/stack-protector-8.c: New test.
+ 	* gcc.target/aarch64/stack-protector-9.c: Likewise.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* gcc.target/aarch64/sve/pcs/stack_clash_3.c: Avoid redundant probes.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* gcc.target/aarch64/stack-check-prologue-17.c: Expect the probe
+ 	to be at offset 1024 rather than offset 0.
+ 	* gcc.target/aarch64/stack-check-prologue-18.c: Likewise.
+ 	* gcc.target/aarch64/stack-check-prologue-19.c: Likewise.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* gcc.target/aarch64/stack-check-prologue-18.c: New test.
+ 	* gcc.target/aarch64/stack-check-prologue-19.c: Likewise.
+ 	* gcc.target/aarch64/stack-check-prologue-20.c: Likewise.
+ 
+ 2023-09-12  Richard Sandiford  
+ 
+ 	* gcc.target/aarch64/stack-check-prologue-17.c: New test.
+ 
+ 2023-09-12  Haochen Gui  
+ 
+ 	Backported from master:
+ 	2023-08-31  Haochen Gui  
+ 
+ 	PR target/96762
+ 	* gcc.target/powerpc/pr96762.c: New.
+ 
+ 2023-09-11  liuhongt  
+ 
+ 	Backported from master:
+ 	2023-09-11  liuhongt  
+ 
+ 	* gcc.target/i386/pr111306.c: New test.
+ 
+ 2023-08-30  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-08-30  Jakub Jelinek  
+ 
+ 	PR tree-optimization/110914
+ 	* gcc.c-torture/execute/pr110914.c: New test.
+ 
+ 2023-08-30  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-08-30  Jakub Jelinek  
+ 
+ 	PR tree-optimization/111015
+ 	* gcc.dg/pr111015.c: New test.
+ 
+ 2023-08-16  liuhongt  
+ 
+ 	Backported from master:
+ 	2023-08-16  liuhongt  
+ 
+ 	* gcc.target/i386/avx2-gather-2.c: Adjust options to keep
+ 	gather vectorization.
+ 	* gcc.target/i386/avx2-gather-6.c: Ditto.
+ 	* gcc.target/i386/avx512f-pr88464-1.c: Ditto.
+ 	* gcc.target/i386/avx512f-pr88464-5.c: Ditto.
+ 	* gcc.target/i386/avx512vl-pr88464-1.c: Ditto.
+ 	* gcc.target/i386/avx512vl-pr88464-11.c: Ditto.
+ 	* gcc.target/i386/avx512vl-pr88464-3.c: Ditto.
+ 	* gcc.target/i386/avx512vl-pr88464-9.c: Ditto.
+ 	* gcc.target/i386/pr88531-1b.c: Ditto.
+ 	* gcc.target/i386/pr88531-1c.c: Ditto.
+ 
+ 2023-08-15  Iain Buclaw  
+ 
+ 	PR d/110959
+ 	* gdc.dg/pr110959.d: New test.
+ 	* gdc.test/runnable/test23010.d: New test.
+ 
+ 2023-08-11  Jason Merrill  
+ 
+ 	PR c++/106310
+ 	* g++.dg/template/template-keyword4.C: New test.
+ 
+ 2023-08-11  Jason Merrill  
+ 
+ 	PR c++/106890
+ 	PR c++/109666
+ 	* g++.dg/cpp0x/nsdmi-array2.C: New test.
+ 	* g++.dg/cpp0x/nsdmi-template25.C: New test.
+ 
+ 2023-08-11  Jason Merrill  
+ 
+ 	PR c++/108099
+ 	* g++.dg/ext/int128-7.C: New test.
+ 	* g++.dg/ext/int128-8.C: New test.
+ 	* g++.dg/ext/unsigned-typedef2.C: New test.
+ 	* g++.dg/ext/unsigned-typedef3.C: New test.
+ 
+ 2023-08-07  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-05-09  Patrick Palka  
+ 
+ 	PR c++/109761
+ 	* g++.dg/cpp0x/noexcept78.C: New test.
+ 
+ 2023-08-06  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2022-12-19  Jakub Jelinek  
+ 
+ 	PR fortran/107397
+ 	* gfortran.dg/pr107397.f90: Adjust expected diagnostic wording and
+ 	add space between dg-error string and closing }.
+ 
+ 2023-08-06  Steve Kargl  
+ 
+ 	Backported from master:
+ 	2022-12-18  Steve Kargl  
+ 
+ 	PR fortran/107397
+ 	* gfortran.dg/pr107397.f90: New test.
+ 
+ 2023-08-01  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-07-26  Kewen Lin  
+ 
+ 	PR target/110741
+ 	* g++.target/powerpc/pr110741.C: New test.
+ 
+ 2023-07-20  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2023-07-17  Harald Anlauf  
+ 
+ 	PR fortran/95947
+ 	PR fortran/110658
+ 	* gfortran.dg/deferred_character_37.f90: New test.
+ 
+ 2023-07-19  Maciej W. Rozycki  
+ 
+ 	Backported from master:
+ 	2023-07-11  Maciej W. Rozycki  
+ 
+ 	* gcc.dg/vect/pr97428.c: Limit to `vect_double' targets.
+ 
+ 2023-07-14  Uros Bizjak  
+ 
+ 	Backported from master:
+ 	2023-07-14  Uros Bizjak  
+ 
+ 	PR target/110206
+ 	* gcc.target/i386/pr110206.c: New test.
+ 
+ 2023-07-14  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2023-07-11  Harald Anlauf  
+ 
+ 	PR fortran/110288
+ 	* gfortran.dg/findloc_10.f90: New test.
+ 
+ 2023-07-13  Uros Bizjak  
+ 
+ 	Backported from master:
+ 	2023-07-13  Uros Bizjak  
+ 
+ 	PR target/106966
+ 	* gcc.target/alpha/pr106966.c: New test.
+ 
+ 2023-07-12  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-06-29  Patrick Palka  
+ 
+ 	PR c++/110468
+ 	* g++.dg/cpp0x/noexcept79.C: New test.
+ 
+ 2023-07-08  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2023-07-08  Harald Anlauf  
+ 
+ 	PR fortran/110585
+ 	* gfortran.dg/findloc_9.f90: New test.
+ 
+ 2023-07-07  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2023-07-07  Iain Buclaw  
+ 
+ 	PR d/108842
+ 	* gdc.dg/pr98277.d: Add more tests.
+ 	* gdc.dg/pr108842.d: New test.
+ 
+ 2023-07-05  Michael Meissner  
+ 
+ 	Backported from master:
+ 	2023-06-23   Michael Meissner  
+ 		    Aaron Sawdey   
+ 
+ 	PR target/105325
+ 	* g++.target/powerpc/pr105325.C: New test.
+ 	* gcc.target/powerpc/fusion-p10-ldcmpi.c: Update insn counts.
+ 
+ 2023-07-02  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2023-07-02  Iain Buclaw  
+ 
+ 	PR d/110516
+ 	* gdc.dg/torture/pr110516a.d: New test.
+ 	* gdc.dg/torture/pr110516b.d: New test.
+ 
+ 2023-07-01  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2023-07-01  Iain Buclaw  
+ 
+ 	PR d/110514
+ 	* gdc.dg/pr110514a.d: New test.
+ 	* gdc.dg/pr110514b.d: New test.
+ 	* gdc.dg/pr110514c.d: New test.
+ 	* gdc.dg/pr110514d.d: New test.
+ 
+ 2023-06-30  Eric Botcazou  
+ 
+ 	* gcc.c-torture/execute/20230630-1.c: New test.
+ 	* gcc.c-torture/execute/20230630-2.c: Likewise.
+ 	* gcc.c-torture/execute/20230630-3.c: Likewise
+ 	* gcc.c-torture/execute/20230630-4.c: Likewise
+ 
+ 2023-06-29  liuhongt  
+ 
+ 	* gcc.target/i386/pr110309.c: New test.
+ 
+ 2023-06-29  Hongyu Wang  
+ 
+ 	Backported from master:
+ 	2023-06-26  Hongyu Wang  
+ 
+ 	* gcc.target/i386/mvc17.c: New test.
+ 
+ 2023-06-28  liuhongt  
+ 
+ 	* gcc.target/i386/avx-vzeroupper-29.c: New testcase.
+ 	* gcc.target/i386/avx-vzeroupper-12.c: Adjust testcase.
+ 	* gcc.target/i386/avx-vzeroupper-7.c: Ditto.
+ 	* gcc.target/i386/avx-vzeroupper-9.c: Ditto.
+ 
+ 2023-06-27  Andrew Pinski  
+ 
+ 	Backported from master:
+ 	2023-06-27  Andrew Pinski  
+ 
+ 	PR middle-end/110420
+ 	PR middle-end/103979
+ 	PR middle-end/98619
+ 	* gcc.c-torture/compile/asmgoto-6.c: New test.
+ 
+ 2023-06-26  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2023-06-26  Iain Buclaw  
+ 
+ 	PR d/110359
+ 	* gdc.dg/pr110359.d: New test.
+ 
+ 2023-06-26  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2023-06-26  Iain Buclaw  
+ 
+ 	PR d/110113
+ 	* gdc.test/compilable/test23978.d: New test.
+ 
+ 2023-06-23  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-06-19  Richard Biener  
+ 
+ 	PR tree-optimization/110298
+ 	* gcc.dg/torture/pr110298.c: New testcase.
+ 
+ 2023-06-22  Alex Coplan  
+ 
+ 	Backported from master:
+ 	2023-06-07  Alex Coplan  
+ 
+ 	PR target/110132
+ 	* lib/target-supports.exp (check_effective_target_aarch64_asm_FUNC_ok):
+ 	Extend to ls64.
+ 	* g++.target/aarch64/acle/acle.exp: New.
+ 	* g++.target/aarch64/acle/ls64.C: New test.
+ 	* g++.target/aarch64/acle/ls64_lto.C: New test.
+ 	* gcc.target/aarch64/acle/ls64_lto.c: New test.
+ 	* gcc.target/aarch64/acle/pr110132.c: New test.
+ 
+ 2023-06-22  Alex Coplan  
+ 
+ 	Backported from master:
+ 	2023-06-07  Alex Coplan  
+ 
+ 	PR target/110100
+ 	* gcc.target/aarch64/acle/pr110100.c: New test.
+ 
+ 2023-06-20  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-06-13  Kewen Lin  
+ 
+ 	PR testsuite/110230
+ 	PR target/109932
+ 	* gcc.target/powerpc/pr109932-1.c: Adjust with int128 effective target.
+ 	* gcc.target/powerpc/pr109932-2.c: Ditto.
+ 
+ 2023-06-20  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-06-12  Kewen Lin  
+ 
+ 	PR target/109932
+ 	* gcc.target/powerpc/pr109932-1.c: New test.
+ 	* gcc.target/powerpc/pr109932-2.c: New test.
+ 
+ 2023-06-20  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-06-12  Kewen Lin  
+ 
+ 	PR target/110011
+ 	* gcc.target/powerpc/pr110011.c: New test.
+ 
+ 2023-06-15  Xi Ruoyao  
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  
+ 
+ 	* gcc.target/aarch64/shrink_wrap_1.c (dg-options): Add
+ 	-fno-stack-protector.
+ 	* gcc.target/aarch64/stack-check-cfa-1.c (dg-options): Add
+ 	-fno-stack-protector.
+ 	* gcc.target/aarch64/stack-check-cfa-2.c (dg-options): Add
+ 	-fno-stack-protector.
+ 	* gcc.target/aarch64/test_frame_17.c (dg-options): Add
+ 	-fno-stack-protector.
+ 
+ 2023-06-15  Xi Ruoyao  
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  
+ 
+ 	* gcc.target/aarch64/pr104005.c (dg-options): Add
+ 	-fno-stack-protector.
+ 
+ 2023-06-15  Xi Ruoyao  
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  
+ 
+ 	* gcc.target/aarch64/auto-init-7.c (dg-options): Add
+ 	-fno-stack-protector.
+ 
+ 2023-06-15  Xi Ruoyao  
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  
+ 
+ 	* gcc.target/aarch64/pr103147-10.c (dg-options): Add
+ 	-fno-stack-protector.
+ 	* g++.target/aarch64/pr103147-10.C: Likewise.
+ 
+ 2023-06-15  Xi Ruoyao  
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  
+ 
+ 	* gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp (sve_flags):
+ 	Add -fno-stack-protector.
+ 
+ 2023-06-15  Xi Ruoyao  
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  
+ 
+ 	PR testsuite/70150
+ 	* gcc.target/aarch64/fuse_adrp_add_1.c (dg-options): Add
+ 	-fno-pie.
+ 
+ 2023-06-15  Xi Ruoyao  
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  
+ 
+ 	PR testsuite/70150
+ 	* gcc.dg/tls/pr78796.c (dg-additional-options): Add -fno-pie
+ 	-no-pie for aarch64-*-*.
+ 	* gcc.target/aarch64/pr63304_1.c (dg-options): Add -fno-pie.
+ 	* gcc.target/aarch64/pr70120-2.c (dg-options): Add -fno-pie.
+ 	* gcc.target/aarch64/pr78733.c (dg-options): Add -fno-pie.
+ 	* gcc.target/aarch64/pr79041-2.c (dg-options): Add -fno-pie.
+ 	* gcc.target/aarch64/pr94530.c (dg-options): Add -fno-pie.
+ 	* gcc.target/aarch64/pr94577.c (dg-options): Add -fno-pie.
+ 	* gcc.target/aarch64/reload-valid-spoff.c (dg-options): Add
+ 	-fno-pie.
+ 
+ 2023-06-15  Xi Ruoyao  
+ 
+ 	Backported from master:
+ 	2023-03-07  Xi Ruoyao  
+ 
+ 	PR testsuite/70150
+ 	* gcc.target/aarch64/aapcs64/aapcs64.exp (additional_flags):
+ 	Add -fno-pie -no-pie.
+ 
+ 2023-06-10  Georg-Johann Lay  
+ 
+ 	PR target/109650
+ 	Backport from 2023-05-10 master r14-1688.
+ 	* gcc.target/avr/torture/pr109650-1.c: New test.
+ 	* gcc.target/avr/torture/pr109650-2.c: New test.
+ 
+ 2023-06-09  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-06-02  Iain Sandoe  
+ 
+ 	PR target/110044
+ 	* gcc.target/powerpc/darwin-abi-13-0.c: New test.
+ 	* gcc.target/powerpc/darwin-abi-13-1.c: New test.
+ 	* gcc.target/powerpc/darwin-abi-13-2.c: New test.
+ 	* gcc.target/powerpc/darwin-structs-0.h: New test.
+ 
+ 2023-06-09  liuhongt  
+ 
+ 	* gcc.target/i386/pr110108-2.c: New test.
+ 
+ 2023-06-08  Alex Coplan  
+ 
+ 	Backported from master:
+ 	2023-05-25  Alex Coplan  
+ 
+ 	PR target/109800
+ 	* gcc.target/arm/pure-code/pr109800.c: New test.
+ 
+ 2023-06-08  Kyrylo Tkachov  
+ 
+ 	Backported from master:
+ 	2023-05-24  Kyrylo Tkachov  
+ 
+ 	PR target/109939
+ 	* gcc.target/arm/pr109939.c: New test.
+ 
+ 2023-06-04  Steve Kargl  
+ 
+ 	Backported from master:
+ 	2023-06-02  Steve Kargl  
+ 
+ 	PR fortran/100607
+ 	* gfortran.dg/select_rank_6.f90: New test.
+ 
+ 2023-05-30  Christophe Lyon  
+ 
+ 	Backported from master:
+ 	2023-05-30  Christophe Lyon  
+ 
+ 	* gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c:
+ 	Support both definitions of int32_t.
+ 
+ 2023-05-25  Georg-Johann Lay  
+ 
+ 	PR target/82931
+ 	* gcc.target/avr/pr82931.c: New test.
+ 
+ 2023-05-22   Michael Meissner  
+ 
+ 	PR target/70243
+ 	* gcc.target/powerpc/pr70243.c: New test.  Back port from master
+ 	04/10/2023 change.
+ 
+ 2023-05-22  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-05-21  Jakub Jelinek  
+ 
+ 	PR tree-optimization/109505
+ 	* gcc.target/aarch64/sve/pr109505.c: New test.
+ 
+ 2023-05-20  Harald Anlauf  
+ 
+ 	Backported from master:
+ 	2023-05-15  Harald Anlauf  
+ 
+ 	PR fortran/109846
+ 	* gfortran.dg/ptr-func-5.f90: New test.
+ 
+ 2023-05-20  Triffid Hunter  
+ 
+ 	PR target/105753
+ 	Backport from 2023-05-20 https://gcc.gnu.org/r14-1016
+ 	* gcc.target/avr/torture/pr105753.c: New test.
+ 
+ 2023-05-19  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-05-15  Patrick Palka  
+ 
+ 	* g++.dg/cpp23/feat-cxx2b.C: Test __cpp_auto_cast.
+ 
+ 2023-05-18  Alexandre Oliva  
+ 
+ 	* gcc.target/arm/acle/cde-mve-full-assembly.c: Drop blank
+ 	after tab after vmsr, and lower the case of P0.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	* gcc.target/arm/mve/intrinsics/srshr.c: Update shift value.
+ 	* gcc.target/arm/mve/intrinsics/srshrl.c: Update shift value.
+ 	* gcc.target/arm/mve/intrinsics/uqshl.c: Update shift value.
+ 	* gcc.target/arm/mve/intrinsics/uqshll.c: Update shift value.
+ 	* gcc.target/arm/mve/intrinsics/urshr.c: Update shift value.
+ 	* gcc.target/arm/mve/intrinsics/urshrl.c: Update shift value.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_m_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_m_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_m_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_m_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_s32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_u32.c: Update to ubfx.
+ 	* gcc.target/arm/mve/mve_const_shifts.c: New test.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	PR target/109697
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: XFAIL check.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: XFAIL check.
+ 	* gcc.target/arm/mve/pr108177-1.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-10.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-11.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-12.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-13.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-13-run.c: use mve_fp
+ 	* gcc.target/arm/mve/pr108177-14.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-14-run.c: use mve_fp
+ 	* gcc.target/arm/mve/pr108177-2.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-3.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-4.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-5.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-6.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-7.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-8.c: Relax registers.
+ 	* gcc.target/arm/mve/pr108177-9.c: Relax registers.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	* gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vaddq_m.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vaddq_n.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u8.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_s64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_u64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_s64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_u64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_s64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_u64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_s64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_u64.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_f16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_f16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_f16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_f16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u16.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_f32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_f32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_f32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_f32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_s32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_u32.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c: Removed.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c: Removed.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	* gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c: Add testcases.
+ 	* gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c: Add testcases.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	Backported from master:
+ 	2023-05-18  Stam Markianos-Wright  
+ 
+ 	* gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c: New.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/asrl.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/lsll.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/sqrshr.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/sqshl.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/sqshll.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/srshr.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/srshrl.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/uqrshl.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/uqrshll_sat48.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/uqshl.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/uqshll.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/urshr.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/urshrl.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadciq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vadcq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vandq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbicq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp16q.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp16q_m.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp32q.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp32q_m.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp64q.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp64q_m.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp8q.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vctp8q_m.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/veorq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmsq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmsq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovnbq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmovntq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vornq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vorrq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpnot.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vpselq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovntq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshlq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshlq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev16q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev16q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndaq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndaq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndmq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndmq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndnq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndnq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndpq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndpq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndxq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndxq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbciq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsbcq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlcq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_r_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_r_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_r_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_r_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_r_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_r_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshlq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsliq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsriq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst1q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_f32.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrwq_u32.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vld1q_f16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld1q_z_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld4q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst2q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vst4q_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrbq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vstrhq_u32.c: Likewise.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	Backported from master:
+ 	2023-04-06  Stam Markianos-Wright  
+ 
+ 	* gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c: Remove unused variables.
+ 	* gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c: Remove unused variables.
+ 
+ 2023-05-18  Murray Steele  
+ 
+ 	Backported from master:
+ 	2023-01-18  Murray Steele  
+ 
+ 	* gcc.target/arm/mve/general/preserve_user_namespace_1.c: New test.
+ 
+ 2023-05-18  Andre Vieira  
+ 
+ 	Backported from master:
+ 	2023-01-24  Andre Vieira  
+ 
+ 	* gcc.target/arm/mve/pr108177-1-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-1.c: New test.
+ 	* gcc.target/arm/mve/pr108177-10-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-10.c: New test.
+ 	* gcc.target/arm/mve/pr108177-11-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-11.c: New test.
+ 	* gcc.target/arm/mve/pr108177-12-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-12.c: New test.
+ 	* gcc.target/arm/mve/pr108177-13-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-13.c: New test.
+ 	* gcc.target/arm/mve/pr108177-14-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-14.c: New test.
+ 	* gcc.target/arm/mve/pr108177-2-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-2.c: New test.
+ 	* gcc.target/arm/mve/pr108177-3-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-3.c: New test.
+ 	* gcc.target/arm/mve/pr108177-4-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-4.c: New test.
+ 	* gcc.target/arm/mve/pr108177-5-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-5.c: New test.
+ 	* gcc.target/arm/mve/pr108177-6-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-6.c: New test.
+ 	* gcc.target/arm/mve/pr108177-7-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-7.c: New test.
+ 	* gcc.target/arm/mve/pr108177-8-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-8.c: New test.
+ 	* gcc.target/arm/mve/pr108177-9-run.c: New test.
+ 	* gcc.target/arm/mve/pr108177-9.c: New test.
+ 	* gcc.target/arm/mve/pr108177-main.x: New test include.
+ 	* gcc.target/arm/mve/pr108177.x: New test include.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	Backported from master:
+ 	2023-04-04  Stam Markianos-Wright  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Tighten test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Tighten test.
+ 
+ 2023-05-18  Stam Markianos-Wright  
+ 
+ 	Backported from master:
+ 	2023-01-16  Stam Markianos-Wright  
+ 
+ 	PR target/96795
+ 	PR target/107515
+ 	* gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c: New test.
+ 	* gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c: New test.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c: Add missing extern
+ 	"C".
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vld2q_f16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vld2q_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld2q_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld2q_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld2q_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld2q_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld2q_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vld2q_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqnegq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqnegq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqnegq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqabsq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqabsq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqabsq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_f16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_f16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vnegq_f16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vnegq_x_s8.c: Likewise.
+ 	* gcc.target/arm/simd/mve-vneg.c: Update test.
+ 	* gcc.target/arm/simd/mve-vshr.c: Likewise
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vclzq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks.  Use
+ 	extern "C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclzq_x_u8.c: Likewise.
+ 	* gcc.target/arm/simd/mve-vclz.c: Update test.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2023-01-25  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vclsq_m_s16.c: Use
+ 	check-function-bodies instead of scan-assembler checks. Use extern
+ 	"C" for C++ testing.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vclsq_x_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-12-08  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_s16.c: Extern functions
+ 	as "C".
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Christophe Lyon  
+ 
+ 	Backported from master:
+ 	2022-09-30  Christophe Lyon  
+ 
+ 	* gcc.target/arm/mve/mve_load_memory_modes.c: Update expected
+ 	registers.
+ 	* gcc.target/arm/mve/mve_store_memory_modes.c: Likewise.
+ 
+ 2023-05-18  Christophe Lyon  
+ 
+ 	Backported from master:
+ 	2022-10-03  Christophe Lyon  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vrev64q_m_s16-clobber.c: New test.
+ 
+ 2023-05-18  Christophe Lyon  
+ 
+ 	Backported from master:
+ 	2022-12-01  Christophe Lyon  
+ 
+ 	* gcc.target/arm/simd/mve-compare-1.c: Update.
+ 	* gcc.target/arm/simd/mve-compare-scalar-1.c: Update.
+ 	* gcc.target/arm/simd/mve-vabs.c: Update.
+ 	* gcc.target/arm/simd/mve-vadd-1.c: Update.
+ 	* gcc.target/arm/simd/mve-vadd-scalar-1.c: Update.
+ 	* gcc.target/arm/simd/mve-vcmp.c: Update.
+ 	* gcc.target/arm/simd/pr101325.c: Update.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c: Improve tests.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_s8.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqsubq_u8.c:
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c:
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c:
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c:
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c: Improve tests.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vqaddq_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Improve tests.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c: Improve tests.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c: Improve tests.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vsubq_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vsubq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmulq_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmulq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddlvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvaq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vaddvq_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vabsq_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabsq_x_s8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vabdq_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabdq_x_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vabavq_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vminaq_m_s16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminaq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminq_x_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_p_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmphiq_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpleq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpltq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcmpneq_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c: Improve tests.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c: Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c : Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c : Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_n_u16.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_n_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_n_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c : Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c : Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c:
+ 	Update test.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c:
+ 	Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c:
+ 	Likewise.
+ 
+ 2023-05-18  Andrea Corallo  
+ 
+ 	Backported from master:
+ 	2022-11-28  Andrea Corallo  
+ 
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Improve test.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Likewise.
+ 	* gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Likewise.
+ 
+ 2023-05-17  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-05-17  Jakub Jelinek  
+ 
+ 	PR c++/109868
+ 	* g++.dg/init/pr109868.C: New test.
+ 
+ 2023-05-15  Jason Merrill  
+ 
+ 	PR c++/109241
+ 	* g++.dg/cpp1y/lambda-generic-local-class2.C: New test.
+ 
+ 2023-05-15  Richard Biener  
+ 
+ 	PR testsuite/108776
+ 	* c-c++-common/rotate-11.c: Add --param logical-op-non-short-circuit=1.
+ 
+ 2023-05-15  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-05-15  Richard Biener  
+ 
+ 	* gcc.dg/vect/pr108950.c: Re-order dg-require-effective-target
+ 	and dg-do.
+ 
+ 2023-05-10  Richard Biener  
+ 
+ 	Backported from master:
+ 	2023-05-10  Richard Biener  
+ 
+ 	* g++.dg/torture/pr106922.C: Force _GLIBCXX_USE_CXX11_ABI to 1.
+ 
+ 2023-05-09  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2023-04-01  Patrick Palka  
+ 
+ 	PR c++/109160
+ 	* g++.dg/cpp2a/concepts-placeholder12.C: New test.
+ 
+ 2023-05-09  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-05-09  Jakub Jelinek  
+ 
+ 	PR tree-optimization/109778
+ 	* gcc.dg/lto/pr109778_0.c: New test.
+ 	* gcc.dg/lto/pr109778_1.c: New file.
+ 
+ 2023-05-09  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-05-09  Jakub Jelinek  
+ 
+ 	PR tree-optimization/109778
+ 	* gcc.c-torture/execute/pr109778.c: New test.
+ 
+ 2023-05-09  Martin Uecker  
+ 
+ 	Backported from master:
+ 	2023-02-18  Martin Uecker  
+ 
+ 	PR c/105660
+ 	PR c/105660
+ 	* gcc.dg/pr105660-1.c: New test.
+ 	* gcc.dg/pr105660-2.c: New test.
+ 
+ 2023-05-09  Kewen Lin  
+ 
+ 	Backported from master:
+ 	2023-04-26  Kewen Lin  
+ 
+ 	PR target/109069
+ 	* gcc.target/powerpc/pr109069-1.c: New test.
+ 	* gcc.target/powerpc/pr109069-2-run.c: New test.
+ 	* gcc.target/powerpc/pr109069-2.c: New test.
+ 	* gcc.target/powerpc/pr109069-2.h: New test.
+ 
+ 2023-05-09  Jason Merrill  
+ 
+ 	PR c++/106740
+ 	PR c++/105852
+ 	* g++.dg/template/friend78.C: New test.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gcc/testsuite/c-c++-common/Wattributes-3.c gcc-12.4.0/gcc/testsuite/c-c++-common/Wattributes-3.c
*** gcc-12.3.0/gcc/testsuite/c-c++-common/Wattributes-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/c-c++-common/Wattributes-3.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,13 ----
+ /* PR c++/113674 */
+ /* { dg-do compile { target { c || c++11 } } } */
+ /* { dg-options "" } */
+ 
+ [[____noreturn____]] int foo (int i)		/* { dg-warning "'__noreturn__' attribute (directive )?ignored" } */
+ {
+   return i;
+ }
+ 
+ [[____maybe_unused____]] int bar (int i)	/* { dg-warning "'__maybe_unused__' attribute (directive )?ignored" } */
+ {
+   return i;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/c-c++-common/rotate-11.c gcc-12.4.0/gcc/testsuite/c-c++-common/rotate-11.c
*** gcc-12.3.0/gcc/testsuite/c-c++-common/rotate-11.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/c-c++-common/rotate-11.c	Thu Jun 20 08:08:07 2024
***************
*** 1,6 ****
  /* PR tree-optimization/108440 */
  /* { dg-do compile { target { { ilp32 || lp64 } || llp64 } } } */
! /* { dg-options "-O2 -fdump-tree-optimized" } */
  /* { dg-final { scan-tree-dump-times " r<< " 5 "optimized" } } */
  /* { dg-final { scan-tree-dump-times " \\\& 7;" 4 "optimized" } } */
  
--- 1,6 ----
  /* PR tree-optimization/108440 */
  /* { dg-do compile { target { { ilp32 || lp64 } || llp64 } } } */
! /* { dg-options "-O2 -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
  /* { dg-final { scan-tree-dump-times " r<< " 5 "optimized" } } */
  /* { dg-final { scan-tree-dump-times " \\\& 7;" 4 "optimized" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/c-c++-common/ubsan/Wno-attributes-1.c gcc-12.4.0/gcc/testsuite/c-c++-common/ubsan/Wno-attributes-1.c
*** gcc-12.3.0/gcc/testsuite/c-c++-common/ubsan/Wno-attributes-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/c-c++-common/ubsan/Wno-attributes-1.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,9 ----
+ /* PR c/112339 */
+ /* { dg-do compile { target { c++11 || c } } } */
+ /* { dg-options "-Wno-attributes=foo::no_sanitize -fsanitize=undefined" } */
+ /* { dg-additional-options "-std=c2x" { target c } } */
+ 
+ [[foo::no_sanitize("bounds")]] void
+ foo (void)
+ {
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/c-c++-common/ubsan/pr112727.c gcc-12.4.0/gcc/testsuite/c-c++-common/ubsan/pr112727.c
*** gcc-12.3.0/gcc/testsuite/c-c++-common/ubsan/pr112727.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/c-c++-common/ubsan/pr112727.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,17 ----
+ /* PR sanitizer/112727 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fsanitize=shift-exponent,bounds-strict -Wuninitialized" } */
+ 
+ #ifndef __cplusplus
+ #define bool _Bool
+ #endif
+ 
+ struct S { bool s[8]; };
+ 
+ void
+ foo (const struct S *x)
+ {
+   unsigned n = 0;
+   for (unsigned j = 0; j < 8; j++)
+     n |= ((!x->s[j]) ? 1 : 0) << (16 + j);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/conversion/ref10.C gcc-12.4.0/gcc/testsuite/g++.dg/conversion/ref10.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/conversion/ref10.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/conversion/ref10.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,5 ----
+ // PR c++/114561
+ 
+ void create(void* u) {
+   const void* const& r = ( (void)0, u );
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/conversion/ref11.C gcc-12.4.0/gcc/testsuite/g++.dg/conversion/ref11.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/conversion/ref11.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/conversion/ref11.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,33 ----
+ // PR c++/114562
+ // { dg-do compile { target c++11 } }
+ 
+ template 
+ struct Optional {
+   Optional(T&&);
+ };
+ 
+ struct MyClass {
+   MyClass(Optional);
+ };
+ 
+ // const void* NONE = nullptr; // Correct Error
+ void* NONE = nullptr; // Crash
+ 
+ void beforeParam();
+ 
+ template
+ struct Create {
+   template  static T create(U &&) noexcept;
+ };
+ 
+ 
+ template 
+ template
+ T Create::create(U && u) noexcept {
+   return T( ( (beforeParam()), (u) ) ); // { dg-error "cannot bind rvalue reference" }
+   // return T( (u) ); // Correct Error
+ }
+ 
+ void test_func() {
+   Create::create(NONE);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/initlist-array21.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/initlist-array21.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/initlist-array21.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/initlist-array21.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,12 ----
+ // PR c++/109899
+ // { dg-do compile { target c++11 } }
+ 
+ struct A { A(); ~A(); };
+ 
+ template
+ using array = T[42];
+ 
+ template
+ void f() {
+   array{};
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/initlist-array22.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/initlist-array22.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/initlist-array22.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/initlist-array22.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,12 ----
+ // PR c++/111286
+ // { dg-do compile { target c++11 } }
+ // { dg-additional-options -Wno-unused }
+ 
+ struct A {
+   A() noexcept {}
+ };
+ 
+ void foo() {
+   using T = const A (&)[1];
+   T{};
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/initlist-pmf2.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/initlist-pmf2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/initlist-pmf2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/initlist-pmf2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,12 ----
+ // PR c++/113598
+ // { dg-additional-options -Wno-c++11-extensions }
+ 
+ struct Cpu
+ {
+   int op_nop();
+ };
+ typedef int(Cpu::*OpCode)();
+ void f()
+ {
+   new OpCode[256]{&Cpu::op_nop};
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const11a.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const11a.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const11a.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const11a.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,21 ----
+ // PR c++/108975
+ // A version of lambda-const11.C using a generic lambda.
+ // { dg-do compile { target c++14 } }
+ 
+ template void g();
+ template struct A { };
+ 
+ template
+ void f() {
+   constexpr int dim = 1;
+   auto l = [&](auto) {
+     int n[dim * 1];
+     using ty1 = decltype(g());
+     using ty2 = A;
+   };
+   l(0);
+   // In f, we shouldn't actually capture dim.
+   static_assert (sizeof(l) == 1, "");
+ }
+ 
+ template void f();
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/noexcept78.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/noexcept78.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/noexcept78.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/noexcept78.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,16 ----
+ // PR c++/109761
+ // { dg-do compile { target c++11 } }
+ 
+ struct base {
+   virtual void foo() noexcept { }
+   virtual ~base() { }
+ };
+ 
+ struct outer : base {
+   struct nested {
+     void foo() noexcept(noexcept(g())); // { dg-bogus "looser" }
+     ~nested() noexcept(noexcept(g()));  // { dg-bogus "looser" }
+   };
+   static void g();
+ };
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/noexcept79.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/noexcept79.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/noexcept79.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/noexcept79.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,18 ----
+ // PR c++/110468
+ // { dg-do compile { target c++11 } }
+ 
+ template
+ struct variant {
+   variant() noexcept(T > 0);
+ };
+ 
+ template
+ struct A {
+   variant m = {};
+ };
+ 
+ struct B {
+   B(A<1>);
+ };
+ 
+ B b = {{}};
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-array2.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-array2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-array2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-array2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,15 ----
+ // PR c++/109666
+ // { dg-do compile { target c++11 } }
+ 
+ struct Point {
+   int value_;
+ };
+ template  struct StaticVector {
+   static StaticVector create() {
+     StaticVector output;
+     return output;
+   }
+   Point _M_elems[n]{};
+ 
+ };
+ void f() { StaticVector<3>::create(); }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-template25.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-template25.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-template25.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp0x/nsdmi-template25.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,18 ----
+ // PR c++/106890
+ // { dg-do compile { target c++11 } }
+ 
+ struct A
+ {
+   int p;
+ };
+ 
+ template
+ struct B : virtual public A
+ {
+   B() { }
+   B(int) { }
+ 
+   int k = this->p;
+ };
+ 
+ template struct B;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp1y/lambda-generic-local-class2.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp1y/lambda-generic-local-class2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp1y/lambda-generic-local-class2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp1y/lambda-generic-local-class2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,13 ----
+ // PR c++/109241
+ // { dg-do compile { target c++14 } }
+ // { dg-options "" } no pedantic
+ 
+ void g() {
+   [](auto) {
+     [](auto) {
+       ({
+         struct A {};
+       });
+     };
+   }(1);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp1z/array-prvalue2.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp1z/array-prvalue2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp1z/array-prvalue2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp1z/array-prvalue2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,5 ----
+ // PR c++/103185
+ // { dg-do compile { target c++11 } }
+ 
+ using intarr = int[];
+ static_assert(__is_same(decltype(0[intarr{0}]), int&&), "");
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp1z/eval-order3.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp1z/eval-order3.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp1z/eval-order3.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp1z/eval-order3.C	Thu Jun 20 08:08:07 2024
*************** void g()
*** 166,171 ****
--- 166,176 ----
    ip(24)[f(25)-25] = 0;
    last=0;
  
+   // even with swapped operands
+   (f(20)-20)[afn(21)].memfn(f(22),23);
+   (f(24)-24)[ip(25)] = 0;
+   last=0;
+ 
    // a << b
    aref(24) << f(25);
    iref(26) << f(27);
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C	Thu Jun 20 08:08:07 2024
***************
*** 557,559 ****
--- 557,565 ----
  #elif __cpp_multidimensional_subscript != 202110
  #  error "__cpp_multidimensional_subscript != 202110"
  #endif
+ 
+ #ifndef __cpp_auto_cast
+ #  error "__cpp_auto_cast"
+ #elif __cpp_auto_cast != 202110
+ #  error "__cpp_auto_cast != 202110"
+ #endif
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/bit-cast16.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/bit-cast16.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/bit-cast16.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/bit-cast16.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,16 ----
+ // PR c++/114537
+ // { dg-do compile { target c++20 } }
+ 
+ namespace std {
+ template
+ constexpr T
+ bit_cast (const F& f) noexcept
+ {
+   return __builtin_bit_cast (T, f);
+ }
+ }
+ 
+ struct A { signed char b : 1 = 0; signed char c : 7 = 0; };
+ struct D { unsigned char e; };
+ constexpr unsigned char f = std::bit_cast (A{}).e;
+ static_assert (f == 0);
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-fn8.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-fn8.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-fn8.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-fn8.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,26 ----
+ // PR c++/111703
+ // { dg-do compile { target c++20 } }
+ 
+ template
+ constexpr bool always_true() { return true; }
+ 
+ struct P {
+   P() = default;
+ 
+   template
+     requires (always_true()) // { dg-bogus "used before its definition" }
+   constexpr P(const T&) { }
+ 
+   int n, m;
+ };
+ 
+ void (*f)(P);
+ P (*h)(P);
+ 
+ template
+ constexpr bool g() {
+   P x;
+   f(x); // { dg-bogus "from here" }
+   f(h(x)); // { dg-bogus "from here" }
+   return true;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-placeholder12.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-placeholder12.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-placeholder12.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-placeholder12.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,29 ----
+ // PR c++/109160
+ // { dg-do compile { target c++20 } }
+ 
+ template
+ concept C = B;
+ 
+ template struct X { };
+ 
+ template
+ struct A {
+   template auto V> static void f();
+   template auto V> static void g(X);
+   template auto V> static inline int value;
+   template auto V> struct D { };
+ };
+ 
+ int main() {
+   A::f<0>();
+   A::f<0>(); // { dg-error "no match|constraints" }
+ 
+   A::g(X<0>{});
+   A::g(X<0>{}); // { dg-error "no match|constraints" }
+ 
+   bool v1 = A::value<0>;
+   bool v2 = A::value<0>;  // { dg-error "constraints" }
+ 
+   A::D<0> d1;
+   A::D<0> d2; // { dg-error "constraints" }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-throw1.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-throw1.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-throw1.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-throw1.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,8 ----
+ // PR c++/112437
+ // { dg-do compile { target c++20 } }
+ 
+ struct S {};
+ template 
+ concept Throwable = requires(T x) { throw x; };
+ 
+ bool a = Throwable;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp5.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp5.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp5.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp5.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,24 ----
+ // PR c++/111485
+ // { dg-do compile { target c++20 } }
+ 
+ template constexpr bool always_true = true;
+ 
+ template concept C = always_true;
+ template concept D = C || true;
+ 
+ template class TT> struct example;
+ template class UU> using example_t = example;
+ 
+ template
+ struct A {
+   template class TT> struct example;
+ 
+   template class UU> using example_t = example;
+ 
+   template
+   struct B {
+     template class UU> using example_t = example;
+   };
+ };
+ 
+ template struct A::B;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp6.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp6.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp6.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/concepts-ttp6.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,17 ----
+ // PR c++/111485
+ // { dg-do compile { target c++20 } }
+ 
+ template constexpr bool always_true = true;
+ 
+ template concept C = always_true;
+ 
+ template requires C class TT>
+ void f();
+ 
+ template requires C
+ struct A;
+ 
+ int main() {
+   f();
+   f(); // { dg-error "no match|constraint mismatch" }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated15.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated15.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated15.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated15.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,28 ----
+ // PR c++/114580
+ // { dg-do compile { target c++17 } }
+ // { dg-options "-Wtautological-compare" }
+ 
+ namespace std {
+   constexpr inline bool
+   is_constant_evaluated () noexcept
+   {
+ #if __cpp_if_consteval >= 202106L
+     if consteval { return true; } else { return false; }
+ #else
+     return __builtin_is_constant_evaluated ();
+ #endif
+   }
+ }
+ 
+ template 
+ void foo ()
+ {
+   if constexpr ((T) std::is_constant_evaluated ())	// { dg-warning "'std::is_constant_evaluated' always evaluates to true in 'if constexpr'" }
+     ;							// { dg-bogus "'std::is_constant_evaluated' always evaluates to false in a non-'constexpr' function" }
+ }
+ 
+ void
+ bar ()
+ {
+   foo  ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq16.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq16.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq16.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq16.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,11 ----
+ // PR c++/110084
+ // { dg-do compile { target c++20 } }
+ 
+ template 
+ class BadTuple {
+   constexpr bool operator==(const BadTuple&) const;
+ };
+ template
+ constexpr bool BadTuple::operator==(const BadTuple&) const = default;
+ 
+ BadTuple a;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq17.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq17.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq17.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/spaceship-eq17.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,5 ----
+ // PR c++/107291
+ // { dg-do compile { target c++20 } }
+ 
+ struct S4;					   // { dg-message "declared here" }
+ bool operator==(S4 const &, S4 const &) = default; // { dg-error "not a friend" }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg3.C gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg3.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg3.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/cpp2a/spaceship-synth-neg3.C	Thu Jun 20 08:08:07 2024
*************** template
*** 5,11 ****
  struct A {};
  
  struct B {
!     constexpr auto operator<=>(const B&) const = default; // { dg-error "" }
      int value;
  };
  
--- 5,11 ----
  struct A {};
  
  struct B {
!     constexpr auto operator<=>(const B&) const = default; // { dg-error "strong_ordering" }
      int value;
  };
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/debug/dwarf2/pr85550.C gcc-12.4.0/gcc/testsuite/g++.dg/debug/dwarf2/pr85550.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/debug/dwarf2/pr85550.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/debug/dwarf2/pr85550.C	Thu Jun 20 08:08:07 2024
***************
*** 2,7 ****
--- 2,8 ----
  // { dg-do link }
  // { dg-options "-O2 -g -fdebug-types-section" }
  // { dg-skip-if "AIX DWARF5" { powerpc-ibm-aix* } }
+ // { dg-skip-if "No debug linker support" { *-*-darwin* } }
  
  struct A {
    int bar () const { return 0; }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/debug/pr110295.C gcc-12.4.0/gcc/testsuite/g++.dg/debug/pr110295.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/debug/pr110295.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/debug/pr110295.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,19 ----
+ // { dg-do compile }
+ // { dg-options "-g" }
+ 
+ template 
+ struct QCachedT
+ {
+   void operator delete(void *, T *) {}
+ };
+ template
+ void exercise()
+ {
+   struct thing_t
+     : QCachedT
+   {
+   };
+   thing_t *list[1];
+   new thing_t; // { dg-warning "" }
+ }
+ int main() { exercise<1>(); }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/diagnostic/constexpr4.C gcc-12.4.0/gcc/testsuite/g++.dg/diagnostic/constexpr4.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/diagnostic/constexpr4.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/diagnostic/constexpr4.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,9 ----
+ // Verify we diagnose a call to a non-constant function pointer ahead of time.
+ // { dg-do compile { target c++11 } }
+ 
+ bool (*f)(int);
+ 
+ template
+ void g() {
+   static_assert(f(N), ""); // { dg-error "non-constant|'f' is not usable" }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/eh/return1.C gcc-12.4.0/gcc/testsuite/g++.dg/eh/return1.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/eh/return1.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/eh/return1.C	Thu Jun 20 08:08:07 2024
*************** extern "C" int printf (const char *, ...
*** 16,28 ****
  
  struct X
  {
!   X(bool throws) : throws_(throws) { ++c; DEBUG; }
!   X(const X& x); // not defined
    ~X() THROWS
    {
!     ++d; DEBUG;
      if (throws_) { throw 1; }
    }
  private:
    bool throws_;
  };
--- 16,29 ----
  
  struct X
  {
!   X(bool throws) : i(-42), throws_(throws) { ++c; DEBUG; }
!   X(const X& x): i(x.i), throws_(x.throws_) { ++c; DEBUG; }
    ~X() THROWS
    {
!     i = ++d; DEBUG;
      if (throws_) { throw 1; }
    }
+   int i;
  private:
    bool throws_;
  };
*************** X f()
*** 33,38 ****
--- 34,46 ----
    return X(false);
  }
  
+ X f2()
+ {
+  foo:
+   X x(true);
+   return X(false);
+ }
+ 
  X g()
  {
    return X(true),X(false);
*************** X i()
*** 54,59 ****
--- 62,146 ----
    return X(false);
  }
  
+ X i2()
+ {
+   try {
+   foo:
+     X x(true);
+     return X(false);
+   } catch(...) {}
+   return X(false);
+ }
+ 
+ // c++/112301
+ X i3()
+ {
+   try {
+     X x(true);
+     return X(false);
+   } catch(...) { throw; }
+ }
+ 
+ X i4()
+ {
+   try {
+     X x(true);
+     X x2(false);
+     return x2;
+   } catch(...) { throw; }
+ }
+ 
+ X i4a()
+ {
+   try {
+     X x2(false);
+     X x(true);
+     return x2;
+   } catch(...) { throw; }
+ }
+ 
+ X i4b()
+ {
+   X x(true);
+   X x2(false);
+   return x2;
+ }
+ 
+ X i4c()
+ {
+   X x2(false);
+   X x(true);
+   return x2;
+ }
+ 
+ X i5()
+ {
+   X x2(false);
+ 
+   try {
+     X x(true);
+     return x2;
+   } catch(...) {
+     if (x2.i != -42)
+       d += 42;
+     throw;
+   }
+ }
+ 
+ X i6()
+ {
+   X x2(false);
+ 
+   try {
+     X x(true);
+     return x2;
+   } catch(...) {
+     if (x2.i != -42)
+       d += 42;
+   }
+   return x2;
+ }
+ 
  X j()
  {
    try {
*************** int main()
*** 84,89 ****
--- 171,178 ----
    try { f(); }
    catch (...) {}
  
+   try { f2(); } catch (...) {}
+ 
    try { g(); }
    catch (...) {}
  
*************** int main()
*** 93,98 ****
--- 182,196 ----
    try { i(); }
    catch (...) {}
  
+   try { i2(); } catch (...) {}
+   try { i3(); } catch (...) {}
+   try { i4(); } catch (...) {}
+   try { i4a(); } catch (...) {}
+   try { i4b(); } catch (...) {}
+   try { i4c(); } catch (...) {}
+   try { i5(); } catch (...) {}
+   try { i6(); } catch (...) {}
+ 
    try { j(); } catch (...) {}
  
    try { k(); } catch (...) {}
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/eh/return2.C gcc-12.4.0/gcc/testsuite/g++.dg/eh/return2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/eh/return2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/eh/return2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,26 ----
+ // PR c++/113088
+ 
+ #if __cplusplus >= 201103L
+ #define THROWS noexcept(false)
+ #else
+ #define THROWS
+ #endif
+ 
+ struct X {
+   ~X() {}
+ };
+ 
+ struct Y {
+   ~Y() THROWS {}
+ };
+ 
+ X foo() {
+   try {
+     return X();
+   } catch (...) {
+     Y();
+     return X();
+   }
+ 
+   try { } catch (...) { }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/eh/return3.C gcc-12.4.0/gcc/testsuite/g++.dg/eh/return3.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/eh/return3.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/eh/return3.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,17 ----
+ // PR c++/113347
+ 
+ #if __cplusplus < 201103L
+ #define THROWS
+ #else
+ #define THROWS noexcept(false)
+ #endif
+ 
+ struct A { ~A(); };
+ struct B { ~B() THROWS; };
+ 
+ A f()
+ {
+   A a;
+   return a;
+   B();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/eh/throw4.C gcc-12.4.0/gcc/testsuite/g++.dg/eh/throw4.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/eh/throw4.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/eh/throw4.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,13 ----
+ // PR c++/112437
+ // { dg-do compile }
+ 
+ struct S {};
+ 
+ S
+ foo (S s)
+ try {
+   throw s;
+ }
+ catch (...) {
+   throw s;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/attrib68.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/attrib68.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/attrib68.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/attrib68.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,8 ----
+ // PR c++/114634
+ // { dg-do compile }
+ 
+ template 
+ struct A
+ {
+   enum { e __attribute__ ((aligned (16))) };	// { dg-error "alignment may not be specified for 'e'" }
+ };
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/frounding-math1.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/frounding-math1.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/frounding-math1.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/frounding-math1.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,8 ----
+ // PR c++/109359
+ // { dg-additional-options -frounding-math }
+ 
+ // For a while we were emitting two doubles (4 .long directives) as the value
+ // of a float array; it should only be two .longs.
+ 
+ // { dg-final { scan-assembler-times "long" 2 { target x86_64-*-* } } }
+ float xs[] = {0.001914, 0.630539};
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/int128-7.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/int128-7.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/int128-7.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/int128-7.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,4 ----
+ // PR c++/108099
+ // { dg-do compile { target { c++11 && int128 } } }
+ 
+ using i128 = signed __int128_t;	// { dg-error "specified with" }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/int128-8.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/int128-8.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/int128-8.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/int128-8.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,24 ----
+ // PR c++/108099
+ // { dg-do compile { target { c++11 && int128 } } }
+ // { dg-options "" }
+ 
+ using u128 = unsigned __int128_t;
+ using s128 = signed __int128_t;
+ template  struct integral_constant {
+   static constexpr T value = v;
+ };
+ typedef integral_constant  false_type;
+ typedef integral_constant  true_type;
+ template 
+ struct is_same : false_type {};
+ template 
+ struct is_same  : true_type {};
+ static_assert (is_same <__int128, s128>::value, "");
+ static_assert (is_same ::value, "");
+ static_assert (is_same <__int128_t, s128>::value, "");
+ static_assert (is_same ::value, "");
+ static_assert (is_same <__uint128_t, u128>::value, "");
+ static_assert (sizeof (s128) == sizeof (__int128), "");
+ static_assert (sizeof (u128) == sizeof (unsigned __int128), "");
+ static_assert (s128(-1) < 0, "");
+ static_assert (u128(-1) > 0, "");
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/is_constructible8.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/is_constructible8.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/is_constructible8.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/is_constructible8.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,16 ----
+ // PR c++/100667
+ // { dg-do compile { target c++11 } }
+ 
+ struct T;
+ 
+ #define SA(X) static_assert ((X), #X);
+ 
+ SA (__is_constructible(T&&, T));
+ SA (__is_constructible(const T&, T));
+ SA (!__is_constructible(T&, T));
+ SA (__is_nothrow_constructible(T&&, T));
+ SA (__is_nothrow_constructible(const T&, T));
+ SA (!__is_nothrow_constructible(T&, T));
+ SA (__is_trivially_constructible(T&&, T));
+ SA (__is_trivially_constructible(const T&, T));
+ SA (!__is_trivially_constructible(T&, T));
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/pr114691.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/pr114691.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/pr114691.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/pr114691.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,22 ----
+ // PR c++/114691
+ // { dg-do compile }
+ // { dg-options "-O2 -Wall" }
+ 
+ void qux (int);
+ int foo (int);
+ 
+ void
+ bar (int x)
+ {
+   #pragma GCC ivdep
+   while (int y = foo (x))	// { dg-bogus "ignoring loop annotation" }
+     qux (y);
+ }
+ 
+ void
+ baz (int x)
+ {
+   #pragma GCC ivdep
+   for (; int y = foo (x); )	// { dg-bogus "ignoring loop annotation" }
+     qux (y);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/unroll-4.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/unroll-4.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/unroll-4.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/unroll-4.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,16 ----
+ // PR c++/111529
+ // { dg-do compile { target c++11 } }
+ // { dg-additional-options -Wno-c++20-extensions }
+ 
+ template 
+ void f() {
+   []() {
+     #pragma GCC unroll 9
+     for (int i = 1; i; --i) {
+     }
+   };
+ }
+ 
+ int main() {
+   f<0>();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/unroll-5.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/unroll-5.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/unroll-5.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/unroll-5.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,23 ----
+ // PR c++/112795
+ // { dg-do compile { target c++11 } }
+ // { dg-options "-O2 -fdump-tree-cunrolli-details" }
+ 
+ void baz (int);
+ constexpr int n = 3;
+ 
+ template 
+ void
+ foo ()
+ {
+ #pragma GCC unroll(n)
+   for (int i = 0; i != n; ++i)
+     baz (i);
+ }
+ 
+ void
+ qux ()
+ {
+   foo <2> ();
+ }
+ 
+ // { dg-final { scan-tree-dump "loop with 3 iterations completely unrolled" "cunrolli" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/unsigned-typedef2.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/unsigned-typedef2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/unsigned-typedef2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/unsigned-typedef2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,25 ----
+ // PR c++/108099
+ // { dg-do compile { target c++11 } }
+ // { dg-options "" }
+ 
+ typedef long long t64;
+ template  struct integral_constant {
+   static constexpr T value = v;
+ };
+ typedef integral_constant  false_type;
+ typedef integral_constant  true_type;
+ template 
+ struct is_same : false_type {};
+ template 
+ struct is_same  : true_type {};
+ 
+ using s64 = signed t64;
+ static_assert (is_same ::value, "");
+ static_assert (is_same ::value, "");
+ static_assert (sizeof (s64) == sizeof (long long), "");
+ static_assert (s64(-1) < 0, "");
+ 
+ using u64 = unsigned t64;
+ static_assert (is_same ::value, "");
+ static_assert (sizeof (u64) == sizeof (unsigned long long), "");
+ static_assert (u64(-1) > 0, "");
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ext/unsigned-typedef3.C gcc-12.4.0/gcc/testsuite/g++.dg/ext/unsigned-typedef3.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ext/unsigned-typedef3.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ext/unsigned-typedef3.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,25 ----
+ // PR c++/108099
+ // { dg-do compile { target c++11 } }
+ // { dg-options "" }
+ 
+ typedef unsigned long long t64;
+ template  struct integral_constant {
+   static constexpr T value = v;
+ };
+ typedef integral_constant  false_type;
+ typedef integral_constant  true_type;
+ template 
+ struct is_same : false_type {};
+ template 
+ struct is_same  : true_type {};
+ 
+ using s64 = signed t64;
+ static_assert (is_same ::value, "");
+ static_assert (is_same ::value, "");
+ static_assert (sizeof (s64) == sizeof (long long), "");
+ static_assert (s64(-1) < 0, "");
+ 
+ using u64 = unsigned t64;
+ static_assert (is_same ::value, "");
+ static_assert (sizeof (u64) == sizeof (unsigned long long), "");
+ static_assert (u64(-1) > 0, "");
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/gcov/gcov-dump-1.C gcc-12.4.0/gcc/testsuite/g++.dg/gcov/gcov-dump-1.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/gcov/gcov-dump-1.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/gcov/gcov-dump-1.C	Thu Jun 20 08:08:07 2024
***************
*** 1,4 ****
! /* { dg-options "-fprofile-generate -ftest-coverage -lgcov" } */
  /* { dg-do run { target native } } */
  
  int value;
--- 1,4 ----
! /* { dg-options "-fprofile-generate -ftest-coverage " } */
  /* { dg-do run { target native } } */
  
  int value;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/gcov/gcov-dump-2.C gcc-12.4.0/gcc/testsuite/g++.dg/gcov/gcov-dump-2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/gcov/gcov-dump-2.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/gcov/gcov-dump-2.C	Thu Jun 20 08:08:07 2024
***************
*** 1,4 ****
! /* { dg-options "-fprofile-generate -ftest-coverage -lgcov" } */
  /* { dg-do run { target native } } */
  
  int value;
--- 1,4 ----
! /* { dg-options "-fprofile-generate -ftest-coverage " } */
  /* { dg-do run { target native } } */
  
  int value;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/init/pr109868.C gcc-12.4.0/gcc/testsuite/g++.dg/init/pr109868.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/init/pr109868.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/init/pr109868.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,13 ----
+ // PR c++/109868
+ // { dg-do compile }
+ // { dg-options "-O2" }
+ 
+ struct A { virtual void foo (); };
+ struct B { long b; int : 0; };
+ struct C : A { B c; };
+ 
+ void
+ bar (C *p)
+ {
+   *p = C ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/ipa/pr113757.C gcc-12.4.0/gcc/testsuite/g++.dg/ipa/pr113757.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/ipa/pr113757.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/ipa/pr113757.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,14 ----
+ // { dg-do compile }
+ // { dg-options "-O2 -fPIC" }
+ // { dg-require-effective-target fpic }
+ 
+ long size();
+ struct ll {  virtual int hh();  };
+ ll  *slice_owner;
+ int ll::hh() { __builtin_exit(0); }
+ int nn() {
+   if (size())
+     return 0;
+   return slice_owner->hh();
+ }
+ int (*a)() = nn;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/opt/nrv22.C gcc-12.4.0/gcc/testsuite/g++.dg/opt/nrv22.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/opt/nrv22.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/opt/nrv22.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,30 ----
+ // PR c++/92407
+ // { dg-do run }
+ 
+ struct A
+ {
+   A () { a++; }
+   A (const A &) { a++; }
+   ~A () { a--; }
+   static int a;
+ };
+ int A::a = 0;
+ 
+ A
+ foo ()
+ {
+   int cnt = 10;
+ lab:
+   A a;
+   if (cnt--)
+     goto lab;
+   return a;
+ }
+ 
+ int
+ main ()
+ {
+   foo ();
+   if (A::a)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/opt/pr110515.C gcc-12.4.0/gcc/testsuite/g++.dg/opt/pr110515.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/opt/pr110515.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/opt/pr110515.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,223 ----
+ // { dg-do run }
+ // { dg-require-effective-target c++11 }
+ // { dg-options "-O2" }
+ 
+ typedef __UINT64_TYPE__ u64;
+ 
+ struct SmallDenseMap {
+   static constexpr u64 EmptyKey = 0xC0FFEUL;
+   struct V { u64 v; };
+ 
+   bool contains(u64 Val) {
+     V *TheSlot = nullptr;
+     return (LookupSlotFor(Val, TheSlot) ? 1 : 0);
+   }
+ 
+   void try_emplace(u64 Key) {
+     V *TheSlot = nullptr;
+     if (LookupSlotFor(Key, TheSlot))
+       return;
+ 
+     // Otherwise, insert the new element.
+     InsertIntoSlot(TheSlot, Key);
+   }
+ 
+   void moveFromOldSlots(V *OldSlotsBegin, V *OldSlotsEnd) {
+     Size = 0;
+ 
+     V *B_ = u.o.Slots;
+     V *E_ = B_ + u.o.Capacity;
+     for (; B_ != E_; ++B_)
+       B_->v = EmptyKey;
+ 
+     // Insert all the old elements.
+     V *O = OldSlotsBegin;
+     V *E = OldSlotsEnd;
+     for (; O != E; ++O) {
+       if (O->v != EmptyKey) {
+         // Insert the key/value into the new table.
+         V * N = nullptr;
+         LookupSlotFor(O->v, N);
+         N->v = O->v;
+         Size++;
+       }
+     }
+   }
+ 
+   void InsertIntoSlot(V *TheSlot, u64 Key) {
+     unsigned NewSize = Size + 1;
+     unsigned Capacity = getCapacity();
+     // Make sure we always keep at least one Empty value
+     if (NewSize >= Capacity) {
+       //fprintf(stderr, "GROW: size=%u capacity=%u -> ...\n", Size, Capacity);
+       grow();
+       LookupSlotFor(Key, TheSlot);
+       Capacity = getCapacity();
+       //fprintf(stderr, "GROW: ... -> size=%u capacity=%u\n", NewSize, Capacity);
+     }
+ 
+     Size++;
+ 
+     TheSlot->v = Key;
+   }
+ 
+   bool LookupSlotFor(u64 Val,
+                        V *&FoundSlot) {
+     V *SlotsPtr = getSlots();
+     const unsigned Capacity = getCapacity();
+ 
+     for (unsigned i = 0; i < Capacity; ++i) {
+       V *ThisSlot = SlotsPtr + i;
+       if (Val == ThisSlot->v) {
+         FoundSlot = ThisSlot;
+         return true;
+       }
+ 
+       if (ThisSlot->v == EmptyKey) {
+         FoundSlot = ThisSlot;
+         return false;
+       }
+     }
+     // Guarantee that within an array there is a match
+     // or Empty value where to insert a new vaue.
+     __builtin_trap();
+   }
+ 
+   // Needs to bea at least 1 to hld one empty value
+   static constexpr unsigned InlineSlots = 2;
+ 
+   bool Small;
+   unsigned Size;
+ 
+   struct LargeRep {
+     V *Slots;
+     unsigned Capacity;
+   };
+ 
+   union {
+       V i[InlineSlots]; // Small = true
+       LargeRep o;       // Small = false
+   } u;
+ 
+   explicit SmallDenseMap() : Small(true), Size(0) {
+     Size = 0;
+ 
+     V *B = u.i;
+     V *E = B + InlineSlots;
+     for (; B != E; ++B)
+       B->v = EmptyKey;
+   }
+ 
+   void grow() {
+     // assert:
+     if (!Small) __builtin_trap();
+ 
+     // First move the inline Slots into a temporary storage.
+     V TmpStorage[InlineSlots];
+     V *TmpBegin = TmpStorage;
+     V *TmpEnd = TmpBegin;
+ 
+     // Loop over the Slots, moving non-empty, non-tombstones into the
+     // temporary storage. Have the loop move the TmpEnd forward as it goes.
+     V *P = u.i;
+     V *E = P + InlineSlots;
+     for (; P != E; ++P) {
+         if (P->v != EmptyKey) {
+             TmpEnd->v = P->v;
+             ++TmpEnd;
+         }
+     }
+ 
+     Small = false;
+     u.o = LargeRep{new V[128], 128};
+     moveFromOldSlots(TmpBegin, TmpEnd);
+   }
+ 
+   V *getSlots() {
+     if (Small) {
+       V * inl = u.i;
+       return inl;
+     }
+     else {
+       LargeRep * rep = &u.o;
+       return rep->Slots;
+     }
+   }
+ 
+   unsigned getCapacity() {
+     if (Small) {
+       return InlineSlots;
+     }
+     else {
+       LargeRep * rep = &u.o;
+       return rep->Capacity;
+     }
+   }
+ };
+ 
+ #pragma GCC optimize(0)
+ 
+ struct P {
+     u64 f;
+     bool s;
+ };
+ 
+ static u64 ws = 0;
+ static P WorkList[128];
+ 
+ __attribute__((noipa))
+ static void popupateIni() {
+   for (u64 Var : (u64[]){8,7,6,5,4,3,0}) {
+     WorkList[ws++] = P{Var, false};
+   }
+ }
+ 
+ __attribute__((noipa))
+ static void checkCycle(u64 Var) {
+     // Detect cycles.
+     static bool seen[256];
+     if (Var >= 256 || seen[Var]) __builtin_trap();
+     seen[Var] = true;
+ }
+ 
+ 
+ __attribute__((noipa))
+ static void populateDeps(u64 Var) {
+ 
+     WorkList[ws++] = P{Var, true};
+     if (Var == 8)
+         WorkList[ws++] = P{0, false};
+ }
+ 
+ 
+ __attribute__((noipa)) __attribute__((optimize(3)))
+ static void bug() {
+ 
+   // triggers growth on insert
+   SmallDenseMap Visited;
+ 
+   popupateIni();
+ 
+   while (ws > 0) {
+     P Item = WorkList[--ws];
+     u64 Var = Item.f;
+     bool visitedAllDependencies = Item.s;
+ 
+     if (Visited.contains(Var)) {
+       continue;
+     }
+ 
+     if (visitedAllDependencies) {
+       Visited.try_emplace(Var);
+       continue;
+     }
+ 
+     checkCycle(Var);
+     populateDeps(Var);
+   }
+ }
+ 
+ __attribute__((noipa))
+ int main() {
+     bug();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-1.C gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-1.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-1.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-1.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,4 ----
+ /* PR preprocessor/105608 */
+ /* { dg-do compile } */
+ #define MACRO_ON_A_LONG_LINE "this line is long enough that it forces the line table to create an LC_RENAME map, which formerly triggered an ICE after PCH restore"
+ #include "line-map-1.H"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-1.Hs gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-1.Hs
*** gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-1.Hs	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-1.Hs	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1 ----
+ /* This space intentionally left blank.  */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-2.C gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-2.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,6 ----
+ /* PR preprocessor/105608 */
+ /* { dg-do compile } */
+ /* { dg-additional-options "-save-temps" } */
+ #define MACRO_ON_A_LONG_LINE "this line is long enough that it forces the line table to create an LC_RENAME map, which formerly triggered an ICE after PCH restore"
+ #include "line-map-2.H"
+ #error "suppress PCH assembly comparison, which does not work with -save-temps" /* { dg-error "." } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-2.Hs gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-2.Hs
*** gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-2.Hs	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-2.Hs	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1 ----
+ /* This space intentionally left blank.  */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-3.Hs gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-3.Hs
*** gcc-12.3.0/gcc/testsuite/g++.dg/pch/line-map-3.Hs	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/pch/line-map-3.Hs	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1 ----
+ /* This space intentionally left blank.  */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/template/friend78.C gcc-12.4.0/gcc/testsuite/g++.dg/template/friend78.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/template/friend78.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/template/friend78.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,18 ----
+ // PR c++/106740
+ // { dg-additional-options -Wno-non-template-friend }
+ 
+ template  struct EnumClass { friend int toString(EnumClass); };
+ struct AmhsConvInfoCoFw {
+   enum AftnTypeXMsgTypeEnum {};
+   typedef EnumClass AftnTypeXMsgType;
+   const int getAftnTypeXMsgTypeAsStr() const;
+   struct MtcuAxgwInfo {
+     AftnTypeXMsgType mAftnTypeXMsgType;
+   };
+ };
+ const int AmhsConvInfoCoFw::getAftnTypeXMsgTypeAsStr() const {
+   MtcuAxgwInfo __trans_tmp_1;
+   toString(__trans_tmp_1.mAftnTypeXMsgType);
+   return 0;
+ }
+ int toString(AmhsConvInfoCoFw::AftnTypeXMsgType);
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/template/template-keyword4.C gcc-12.4.0/gcc/testsuite/g++.dg/template/template-keyword4.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/template/template-keyword4.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/template/template-keyword4.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,18 ----
+ // PR c++/106310
+ 
+ template 
+ struct set{};
+ 
+ template< typename T >
+ struct Base
+ {
+   template< int > int set(T const &);
+ };
+ 
+ template< typename T >
+ struct Derived : Base< T >
+ {
+   void f(T const &arg) {
+     this->template set< 0 >(arg);
+   }
+ };
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/torture/pr106922.C gcc-12.4.0/gcc/testsuite/g++.dg/torture/pr106922.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/torture/pr106922.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.dg/torture/pr106922.C	Thu Jun 20 08:08:07 2024
***************
*** 4,11 ****
--- 4,19 ----
  // -O1 doesn't iterate VN and thus has bogus uninit diagnostics
  // { dg-skip-if "" { *-*-* } { "-O1" } { "" } }
  
+ // The testcase still emits bogus diagnostics with the pre-C++11 ABI
+ #undef _GLIBCXX_USE_CXX11_ABI
+ #define _GLIBCXX_USE_CXX11_ABI 1
+ 
  #include 
  
+ // When the library is not dual-ABI and defaults to old just compile
+ // an empty TU
+ #if _GLIBCXX_USE_CXX11_ABI
+ 
  #include 
  template 
  using Optional = std::optional;
*************** void test()
*** 46,48 ****
--- 54,57 ----
          externals.external2 = internal2;
      }
  }
+ #endif
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/torture/pr111019.C gcc-12.4.0/gcc/testsuite/g++.dg/torture/pr111019.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/torture/pr111019.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/torture/pr111019.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,65 ----
+ // { dg-do run }
+ // { dg-additional-options "-fstrict-aliasing" }
+ 
+ #include 
+ #include 
+ #include 
+ 
+ class Base
+ {
+ public:
+   Base* previous = nullptr;
+   Base* next = nullptr;
+   Base* target = nullptr;
+ };
+ 
+ class Target : public Base
+ {
+ public:
+   __attribute__((always_inline)) ~Target()
+   {
+     while (this->next)
+     {
+       Base* n = this->next;
+ 
+       if (n->previous)
+         n->previous->next = n->next;
+       if (n->next)
+         n->next->previous = n->previous;
+       n->previous = nullptr;
+       n->next = nullptr;
+       n->target = nullptr;
+     }
+   }
+ };
+ 
+ template 
+ class TargetWithData final : public Target
+ {
+ public:
+   TargetWithData(T data)
+     : data(data)
+   {}
+   T data;
+ };
+ 
+ void test()
+ {
+   printf("test\n");
+   Base ptr;
+   {
+     auto data = std::make_unique>(std::string("asdf"));
+     ptr.target = &*data;
+     ptr.previous = &*data;
+     data->next = &ptr;
+ 
+     assert(ptr.target != nullptr);
+   }
+   assert(ptr.target == nullptr);
+ }
+ 
+ int main(int, char**)
+ {
+   test();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/torture/pr113896.C gcc-12.4.0/gcc/testsuite/g++.dg/torture/pr113896.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/torture/pr113896.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/torture/pr113896.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,35 ----
+ // { dg-do run }
+ // { dg-additional-options "-ffast-math" }
+ 
+ double a1 = 1.0;
+ double a2 = 1.0;
+ 
+ void __attribute__((noipa))
+ f(double K[2], bool b)
+ {
+     double A[] = {
+         b ? a1 : a2,
+         0,
+         0,
+         0
+     };
+ 
+     double sum{};
+     for(double  a : A) sum += a;
+     for(double& a : A) a /= sum;
+ 
+     if (b) {
+         K[0] = A[0]; // 1.0
+         K[1] = A[1]; // 0.0
+     } else {
+         K[0] = A[0] + A[1];
+     }
+ }
+ 
+ int main()
+ {
+   double K[2]{};
+   f(K, true);
+   if (K[0] != 1. || K[1] != 0.)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/torture/vector-struct-1.C gcc-12.4.0/gcc/testsuite/g++.dg/torture/vector-struct-1.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/torture/vector-struct-1.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/torture/vector-struct-1.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,18 ----
+ /* PR c++/97990 */
+ /* This used to crash with lto and strict aliasing enabled as the
+    vector type variant still had TYPE_ALIAS_SET set on it. */
+ 
+ typedef __attribute__((__vector_size__(sizeof(short)))) short TSimd;
+ TSimd hh(int);
+ struct y6
+ {
+   TSimd VALUE;
+   ~y6();
+ };
+ template 
+ auto f2(T1 p1, T2){
+   return hh(p1) <= 0;
+ }
+ void f1(){
+   f2(0, y6{});
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/torture/vector-subaccess-1.C gcc-12.4.0/gcc/testsuite/g++.dg/torture/vector-subaccess-1.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/torture/vector-subaccess-1.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/torture/vector-subaccess-1.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,24 ----
+ /* PR c++/89224 */
+ /* { dg-additional-options "-Wno-psabi" } */
+ 
+ /* The access of `vector[i]` has the same qualifiers as the original
+    vector which was missing. */
+ 
+ typedef __attribute__((vector_size(16))) unsigned char  Int8x8_t;
+ 
+ template 
+ void g(T &x) {
+     __builtin_abort();
+ }
+ template 
+ void g(const T &x) {
+   __builtin_exit(0);
+ }
+ void f(const Int8x8_t x) {
+   g(x[0]);
+ }
+ int main(void)
+ {
+     Int8x8_t x ={};
+     f(x);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/vect/pr112793.cc gcc-12.4.0/gcc/testsuite/g++.dg/vect/pr112793.cc
*** gcc-12.3.0/gcc/testsuite/g++.dg/vect/pr112793.cc	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/vect/pr112793.cc	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,32 ----
+ // { dg-do compile }
+ // { dg-require-effective-target c++11 }
+ // { dg-additional-options "-march=znver2" { target x86_64-*-* i?86-*-* } }
+ 
+ typedef double T;
+ T c, s;
+ T a[16];
+ struct Matrix4 {
+   Matrix4(){}
+   Matrix4(T e, T f, T i, T j) {
+     r[1] = r[4] = e;
+     r[5] = f;
+     r[8] = i;
+     r[9] = j;
+   }
+   Matrix4 operator*(Matrix4 a) {
+     return Matrix4(
+        r[0] * a.r[4] + r[4] + r[15] + r[6],
+        r[1] * a.r[4] + 1 + 2 + 3,  r[0] * r[8] + 1 + 2 + 3,
+        r[1] * r[8] + r[1] + r[14] + r[2] * r[3]);
+   }
+   T r[16] = {};
+ };
+ Matrix4 t1, t2;
+ Matrix4 tt;
+ Matrix4 getRotAltAzToEquatorial()
+ {
+   t2.r[4] =  0;
+   t1.r[1] =  -s;
+   t1.r[8] = 0;
+   return t1 * t2;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-8.C gcc-12.4.0/gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-8.C
*** gcc-12.3.0/gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-8.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-8.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,42 ----
+ /* PR tree-optimization/109804 */
+ /* { dg-do compile { target c++11 } } */
+ /* { dg-options "-Wall" } */
+ 
+ /* Here we used to ICE in new_delete_mismatch_p because
+    we didn't handle unnamed types from the demangler (DEMANGLE_COMPONENT_UNNAMED_TYPE). */
+ 
+ template 
+ static inline T * construct_at(void *at, ARGS && args)
+ {
+  struct Placeable : T
+  {
+   Placeable(ARGS && args) : T(args) { }
+   void * operator new (__SIZE_TYPE__, void *ptr) { return ptr; }
+   void operator delete (void *, void *) { }
+  };
+  return new (at) Placeable(static_cast(args));
+ }
+ template 
+ struct Reconstructible
+ {
+   char _space[sizeof(MT)];
+   Reconstructible() { }
+ };
+ template 
+ struct Constructible : Reconstructible
+ {
+  Constructible(){}
+ };
+ struct A { };
+ struct B
+ {
+  Constructible a { };
+  B(int) { }
+ };
+ Constructible b { };
+ void f()
+ {
+   enum { ENUM_A = 1 };
+   enum { ENUM_B = 1 };
+   construct_at(b._space, ENUM_B);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/aarch64/acle/acle.exp gcc-12.4.0/gcc/testsuite/g++.target/aarch64/acle/acle.exp
*** gcc-12.3.0/gcc/testsuite/g++.target/aarch64/acle/acle.exp	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/aarch64/acle/acle.exp	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,35 ----
+ # Copyright (C) 2014-2023 Free Software Foundation, Inc.
+ 
+ # This program is free software; you can redistribute it and/or modify
+ # it under the terms of the GNU General Public License as published by
+ # the Free Software Foundation; either version 3 of the License, or
+ # (at your option) any later version.
+ #
+ # This program is distributed in the hope that it will be useful,
+ # but WITHOUT ANY WARRANTY; without even the implied warranty of
+ # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ # GNU General Public License for more details.
+ #
+ # You should have received a copy of the GNU General Public License
+ # along with GCC; see the file COPYING3.  If not see
+ # .
+ 
+ # GCC testsuite that uses the `dg.exp' driver.
+ 
+ # Exit immediately if this isn't an AArch64 target.
+ if ![istarget aarch64*-*-*] then {
+   return
+ }
+ 
+ # Load support procs.
+ load_lib g++-dg.exp
+ 
+ # Initialize `dg'.
+ dg-init
+ 
+ # Main loop.
+ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \
+ 	"" ""
+ 
+ # All done.
+ dg-finish
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/aarch64/acle/ls64.C gcc-12.4.0/gcc/testsuite/g++.target/aarch64/acle/ls64.C
*** gcc-12.3.0/gcc/testsuite/g++.target/aarch64/acle/ls64.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/aarch64/acle/ls64.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-march=armv8.7-a+ls64" } */
+ #include 
+ int main()
+ {
+   data512_t d = __arm_ld64b ((const void *)0x1000);
+   __arm_st64b ((void *)0x2000, d);
+   uint64_t x = __arm_st64bv ((void *)0x3000, d);
+   x += __arm_st64bv0 ((void *)0x4000, d);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/aarch64/acle/ls64_lto.C gcc-12.4.0/gcc/testsuite/g++.target/aarch64/acle/ls64_lto.C
*** gcc-12.3.0/gcc/testsuite/g++.target/aarch64/acle/ls64_lto.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/aarch64/acle/ls64_lto.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do link { target aarch64_asm_ls64_ok } } */
+ /* { dg-additional-options "-march=armv8.7-a+ls64 -flto" } */
+ #include 
+ int main()
+ {
+   data512_t d = __arm_ld64b ((const void *)0x1000);
+   __arm_st64b ((void *)0x2000, d);
+   uint64_t x = __arm_st64bv ((void *)0x3000, d);
+   x += __arm_st64bv0 ((void *)0x4000, d);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/aarch64/pr103147-10.C gcc-12.4.0/gcc/testsuite/g++.target/aarch64/pr103147-10.C
*** gcc-12.3.0/gcc/testsuite/g++.target/aarch64/pr103147-10.C	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/g++.target/aarch64/pr103147-10.C	Thu Jun 20 08:08:07 2024
***************
*** 1,4 ****
! /* { dg-options "-O2 -fpack-struct -mstrict-align" } */
  /* { dg-final { check-function-bodies "**" "" "" } } */
  
  #include 
--- 1,4 ----
! /* { dg-options "-O2 -fpack-struct -mstrict-align -fno-stack-protector" } */
  /* { dg-final { check-function-bodies "**" "" "" } } */
  
  #include 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/i386/pr111497.C gcc-12.4.0/gcc/testsuite/g++.target/i386/pr111497.C
*** gcc-12.3.0/gcc/testsuite/g++.target/i386/pr111497.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/i386/pr111497.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,22 ----
+ // { dg-do compile { target ia32 } }
+ // { dg-options "-march=i686 -mtune=generic -fPIC -O2 -g" }
+ 
+ class A;
+ struct B { const char *b1; int b2; };
+ struct C : B { C (const char *x, int y) { b1 = x; b2 = y; } };
+ struct D : C { D (B x) : C (x.b1, x.b2) {} };
+ struct E { E (A *); };
+ struct F : E { D f1, f2, f3, f4, f5, f6; F (A *, const B &, const B &, const B &); };
+ struct G : F { G (A *, const B &, const B &, const B &); };
+ struct H { int h; };
+ struct I { H i; };
+ struct J { I *j; };
+ struct A : J {};
+ inline F::F (A *x, const B &y, const B &z, const B &w)
+   : E(x), f1(y), f2(z), f3(w), f4(y), f5(z), f6(w) {}
+ G::G (A *x, const B &y, const B &z, const B &w) : F(x, y, z, w)
+ {
+   H *h = &x->j->i;
+   if (h)
+     h->h++;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/i386/pr111822.C gcc-12.4.0/gcc/testsuite/g++.target/i386/pr111822.C
*** gcc-12.3.0/gcc/testsuite/g++.target/i386/pr111822.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/i386/pr111822.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,45 ----
+ /* PR target/111822 */
+ /* { dg-do compile { target ia32 } } */
+ /* { dg-options "-O2 -flive-range-shrinkage -fno-dce -fnon-call-exceptions -march=x86-64" } */
+ 
+ typedef union {
+   int *pNativeClosure;
+   struct SQRefCounted *pRefCounted;
+ } SQObjectValue;
+ typedef struct {
+   SQObjectValue _unVal;
+ } SQObject;
+ typedef long SQFUNCTION(struct SQVM *);
+ struct SQVM {
+   void CallNative();
+ };
+ struct SQRefCounted {
+   long long _uiRef;
+ };
+ void Null();
+ struct SQObjectPtr : SQObject {
+   SQObjectPtr() {}
+   SQObjectPtr(int *pNativeClosure) {
+     _unVal.pNativeClosure = pNativeClosure;
+     _unVal.pRefCounted->_uiRef++;
+   }
+   ~SQObjectPtr() { --_unVal.pRefCounted->_uiRef; }
+ };
+ struct CallInfo {
+   SQObjectPtr _closure;
+ };
+ long long _top;
+ SQFUNCTION _function;
+ int *CallNative_nclosure;
+ void SQVM::CallNative() {
+   long long oldtop = _top;
+   CallInfo lci;
+   lci._closure = CallNative_nclosure;
+   try {
+     _function(this);
+   } catch (...) {
+     _top = oldtop;
+   }
+   while (oldtop)
+     Null();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/i386/pr112443.C gcc-12.4.0/gcc/testsuite/g++.target/i386/pr112443.C
*** gcc-12.3.0/gcc/testsuite/g++.target/i386/pr112443.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/i386/pr112443.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,108 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target avx512bw } */
+ /* { dg-require-effective-target avx512vl } */
+ /* { dg-options "-O2 -std=c++17 -mavx512bw -mavx512vl" } */
+ 
+ #include 
+ #include 
+ #include 
+ #include 
+ 
+ #define AVX512BW
+ #define AVX512VL
+ 
+ #include "avx512f-helper.h"
+ 
+ struct TensorIteratorBase{
+   char* in;
+   char* out;
+ 
+   void for_each(std::function loop){
+     loop(out, in, 32);
+   }    
+ };
+ 
+ class Vectorized {
+ protected:
+   __m256i values;
+ 
+   static inline __m256i invert(const __m256i& v) {
+     const auto ones = _mm256_set1_epi64x(-1);
+     return _mm256_xor_si256(ones, v);
+   }
+ public:
+   operator __m256i() const {
+     return values;
+   }
+ 
+   static constexpr int size() {
+     return 32;
+   }
+ 
+   Vectorized() {}
+   Vectorized(__m256i v) : values(v) {}
+   Vectorized(uint8_t v) { values = _mm256_set1_epi8(v); }
+   static Vectorized blendv(const Vectorized& a, const Vectorized& b,
+ 			   const Vectorized& mask) {
+     return _mm256_blendv_epi8(a, b, mask);
+   }
+   static Vectorized loadu(const void* ptr) {
+     return _mm256_loadu_si256(reinterpret_cast(ptr));
+   }
+   void store(void* ptr) const {
+     _mm256_storeu_si256(reinterpret_cast<__m256i*>(ptr), values);
+   }
+ 
+   Vectorized operator<(const Vectorized& other) const {
+     __m256i max = _mm256_max_epu8(values, other);
+     return invert(_mm256_cmpeq_epi8(max, values));
+   }
+   Vectorized operator-(const Vectorized& b) {
+     return _mm256_sub_epi8(values, b);
+   }
+ };
+ 
+ std::ostream& operator<<(std::ostream& stream, const Vectorized& vec) {
+   uint8_t buf[Vectorized::size()];
+   vec.store(buf);
+   stream << "vec[";
+   for (int i = 0; i != Vectorized::size(); i++) {
+     if (i != 0)
+       stream << ", ";
+     stream << buf[i]*1;
+   }
+   stream << "]";
+   return stream;
+ }
+ 
+ void run(TensorIteratorBase iter){
+   Vectorized zero_vec(0);
+   Vectorized one_vec(1);
+ 
+   iter.for_each([=](char* out, char* in, int64_t size) {
+     for (int64_t i = 0; i <= size - Vectorized::size(); i += Vectorized::size()) {
+       auto self_vec = Vectorized::loadu(in + i);
+       auto left = Vectorized::blendv(zero_vec, one_vec, zero_vec < self_vec);
+       auto right = Vectorized::blendv(zero_vec, one_vec, self_vec < zero_vec);
+       auto outv = left - right;
+       outv.store(out + i);
+     }
+   });
+ }
+ 
+ void
+ test_256 (){
+   char in[32];
+   char out[32];
+   for(auto& x: in) x = 1;
+   run(TensorIteratorBase{in, out});
+   Vectorized::loadu (out);
+   for (int i = 0; i != 32; i++)
+     if (out[i] != 1)
+       __builtin_abort ();
+ }
+ 
+ void
+ test_128 ()
+ {
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/loongarch/atomic-cas-int.C gcc-12.4.0/gcc/testsuite/g++.target/loongarch/atomic-cas-int.C
*** gcc-12.3.0/gcc/testsuite/g++.target/loongarch/atomic-cas-int.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/loongarch/atomic-cas-int.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,32 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+ 
+ #include 
+ #include 
+ 
+ __attribute__ ((noinline)) long
+ val_without_const_folding (long val)
+ {
+   return val;
+ }
+ 
+ int
+ main ()
+ {
+   int oldval = 0xaa;
+   int newval = 0xbb;
+   std::atomic amo;
+ 
+   amo.store (oldval);
+ 
+   long longval = val_without_const_folding (0xff80000000000000 + oldval);
+   oldval = static_cast (longval);
+ 
+   amo.compare_exchange_strong (oldval, newval);
+ 
+   if (newval != amo.load (std::memory_order_relaxed))
+     __builtin_abort ();
+ 
+   return 0;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr105325.C gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr105325.C
*** gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr105325.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr105325.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,28 ----
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target lp64 } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-require-effective-target powerpc_prefixed_addr } */
+ /* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
+ 
+ /* PR target/105324.  Test that power10 fusion does not generate an LWA/CMPDI
+    with a large offset that the assembler rejects.  Instead it should a
+    PLWZ/CMPWI combination.
+ 
+    Originally, the code was dying because the fusion load + compare -1/0/1
+    patterns did not handle the possibility that the load might be prefixed.
+    The -fstack-protector option is needed to show the bug.  */
+ 
+ struct Ath__array1D {
+   int _current;
+   int getCnt() { return _current; }
+ };
+ struct extMeasure {
+   int _mapTable[10000];
+   Ath__array1D _metRCTable;
+ };
+ void measureRC() {
+   extMeasure m;
+   for (; m._metRCTable.getCnt();)
+     for (;;)
+       ;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr110741.C gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr110741.C
*** gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr110741.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr110741.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,552 ----
+ /* { dg-do run { target { power10_hw } } } */
+ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+ 
+ #include 
+ 
+ typedef unsigned char uint8_t;
+ 
+ template 
+ static inline vector unsigned long long
+ VSXTernaryLogic (vector unsigned long long a, vector unsigned long long b,
+ 		 vector unsigned long long c)
+ {
+   return vec_ternarylogic (a, b, c, kTernLogOp);
+ }
+ 
+ static vector unsigned long long
+ VSXTernaryLogic (vector unsigned long long a, vector unsigned long long b,
+ 		 vector unsigned long long c, int ternary_logic_op)
+ {
+   switch (ternary_logic_op & 0xFF)
+     {
+     case 0:
+       return VSXTernaryLogic<0> (a, b, c);
+     case 1:
+       return VSXTernaryLogic<1> (a, b, c);
+     case 2:
+       return VSXTernaryLogic<2> (a, b, c);
+     case 3:
+       return VSXTernaryLogic<3> (a, b, c);
+     case 4:
+       return VSXTernaryLogic<4> (a, b, c);
+     case 5:
+       return VSXTernaryLogic<5> (a, b, c);
+     case 6:
+       return VSXTernaryLogic<6> (a, b, c);
+     case 7:
+       return VSXTernaryLogic<7> (a, b, c);
+     case 8:
+       return VSXTernaryLogic<8> (a, b, c);
+     case 9:
+       return VSXTernaryLogic<9> (a, b, c);
+     case 10:
+       return VSXTernaryLogic<10> (a, b, c);
+     case 11:
+       return VSXTernaryLogic<11> (a, b, c);
+     case 12:
+       return VSXTernaryLogic<12> (a, b, c);
+     case 13:
+       return VSXTernaryLogic<13> (a, b, c);
+     case 14:
+       return VSXTernaryLogic<14> (a, b, c);
+     case 15:
+       return VSXTernaryLogic<15> (a, b, c);
+     case 16:
+       return VSXTernaryLogic<16> (a, b, c);
+     case 17:
+       return VSXTernaryLogic<17> (a, b, c);
+     case 18:
+       return VSXTernaryLogic<18> (a, b, c);
+     case 19:
+       return VSXTernaryLogic<19> (a, b, c);
+     case 20:
+       return VSXTernaryLogic<20> (a, b, c);
+     case 21:
+       return VSXTernaryLogic<21> (a, b, c);
+     case 22:
+       return VSXTernaryLogic<22> (a, b, c);
+     case 23:
+       return VSXTernaryLogic<23> (a, b, c);
+     case 24:
+       return VSXTernaryLogic<24> (a, b, c);
+     case 25:
+       return VSXTernaryLogic<25> (a, b, c);
+     case 26:
+       return VSXTernaryLogic<26> (a, b, c);
+     case 27:
+       return VSXTernaryLogic<27> (a, b, c);
+     case 28:
+       return VSXTernaryLogic<28> (a, b, c);
+     case 29:
+       return VSXTernaryLogic<29> (a, b, c);
+     case 30:
+       return VSXTernaryLogic<30> (a, b, c);
+     case 31:
+       return VSXTernaryLogic<31> (a, b, c);
+     case 32:
+       return VSXTernaryLogic<32> (a, b, c);
+     case 33:
+       return VSXTernaryLogic<33> (a, b, c);
+     case 34:
+       return VSXTernaryLogic<34> (a, b, c);
+     case 35:
+       return VSXTernaryLogic<35> (a, b, c);
+     case 36:
+       return VSXTernaryLogic<36> (a, b, c);
+     case 37:
+       return VSXTernaryLogic<37> (a, b, c);
+     case 38:
+       return VSXTernaryLogic<38> (a, b, c);
+     case 39:
+       return VSXTernaryLogic<39> (a, b, c);
+     case 40:
+       return VSXTernaryLogic<40> (a, b, c);
+     case 41:
+       return VSXTernaryLogic<41> (a, b, c);
+     case 42:
+       return VSXTernaryLogic<42> (a, b, c);
+     case 43:
+       return VSXTernaryLogic<43> (a, b, c);
+     case 44:
+       return VSXTernaryLogic<44> (a, b, c);
+     case 45:
+       return VSXTernaryLogic<45> (a, b, c);
+     case 46:
+       return VSXTernaryLogic<46> (a, b, c);
+     case 47:
+       return VSXTernaryLogic<47> (a, b, c);
+     case 48:
+       return VSXTernaryLogic<48> (a, b, c);
+     case 49:
+       return VSXTernaryLogic<49> (a, b, c);
+     case 50:
+       return VSXTernaryLogic<50> (a, b, c);
+     case 51:
+       return VSXTernaryLogic<51> (a, b, c);
+     case 52:
+       return VSXTernaryLogic<52> (a, b, c);
+     case 53:
+       return VSXTernaryLogic<53> (a, b, c);
+     case 54:
+       return VSXTernaryLogic<54> (a, b, c);
+     case 55:
+       return VSXTernaryLogic<55> (a, b, c);
+     case 56:
+       return VSXTernaryLogic<56> (a, b, c);
+     case 57:
+       return VSXTernaryLogic<57> (a, b, c);
+     case 58:
+       return VSXTernaryLogic<58> (a, b, c);
+     case 59:
+       return VSXTernaryLogic<59> (a, b, c);
+     case 60:
+       return VSXTernaryLogic<60> (a, b, c);
+     case 61:
+       return VSXTernaryLogic<61> (a, b, c);
+     case 62:
+       return VSXTernaryLogic<62> (a, b, c);
+     case 63:
+       return VSXTernaryLogic<63> (a, b, c);
+     case 64:
+       return VSXTernaryLogic<64> (a, b, c);
+     case 65:
+       return VSXTernaryLogic<65> (a, b, c);
+     case 66:
+       return VSXTernaryLogic<66> (a, b, c);
+     case 67:
+       return VSXTernaryLogic<67> (a, b, c);
+     case 68:
+       return VSXTernaryLogic<68> (a, b, c);
+     case 69:
+       return VSXTernaryLogic<69> (a, b, c);
+     case 70:
+       return VSXTernaryLogic<70> (a, b, c);
+     case 71:
+       return VSXTernaryLogic<71> (a, b, c);
+     case 72:
+       return VSXTernaryLogic<72> (a, b, c);
+     case 73:
+       return VSXTernaryLogic<73> (a, b, c);
+     case 74:
+       return VSXTernaryLogic<74> (a, b, c);
+     case 75:
+       return VSXTernaryLogic<75> (a, b, c);
+     case 76:
+       return VSXTernaryLogic<76> (a, b, c);
+     case 77:
+       return VSXTernaryLogic<77> (a, b, c);
+     case 78:
+       return VSXTernaryLogic<78> (a, b, c);
+     case 79:
+       return VSXTernaryLogic<79> (a, b, c);
+     case 80:
+       return VSXTernaryLogic<80> (a, b, c);
+     case 81:
+       return VSXTernaryLogic<81> (a, b, c);
+     case 82:
+       return VSXTernaryLogic<82> (a, b, c);
+     case 83:
+       return VSXTernaryLogic<83> (a, b, c);
+     case 84:
+       return VSXTernaryLogic<84> (a, b, c);
+     case 85:
+       return VSXTernaryLogic<85> (a, b, c);
+     case 86:
+       return VSXTernaryLogic<86> (a, b, c);
+     case 87:
+       return VSXTernaryLogic<87> (a, b, c);
+     case 88:
+       return VSXTernaryLogic<88> (a, b, c);
+     case 89:
+       return VSXTernaryLogic<89> (a, b, c);
+     case 90:
+       return VSXTernaryLogic<90> (a, b, c);
+     case 91:
+       return VSXTernaryLogic<91> (a, b, c);
+     case 92:
+       return VSXTernaryLogic<92> (a, b, c);
+     case 93:
+       return VSXTernaryLogic<93> (a, b, c);
+     case 94:
+       return VSXTernaryLogic<94> (a, b, c);
+     case 95:
+       return VSXTernaryLogic<95> (a, b, c);
+     case 96:
+       return VSXTernaryLogic<96> (a, b, c);
+     case 97:
+       return VSXTernaryLogic<97> (a, b, c);
+     case 98:
+       return VSXTernaryLogic<98> (a, b, c);
+     case 99:
+       return VSXTernaryLogic<99> (a, b, c);
+     case 100:
+       return VSXTernaryLogic<100> (a, b, c);
+     case 101:
+       return VSXTernaryLogic<101> (a, b, c);
+     case 102:
+       return VSXTernaryLogic<102> (a, b, c);
+     case 103:
+       return VSXTernaryLogic<103> (a, b, c);
+     case 104:
+       return VSXTernaryLogic<104> (a, b, c);
+     case 105:
+       return VSXTernaryLogic<105> (a, b, c);
+     case 106:
+       return VSXTernaryLogic<106> (a, b, c);
+     case 107:
+       return VSXTernaryLogic<107> (a, b, c);
+     case 108:
+       return VSXTernaryLogic<108> (a, b, c);
+     case 109:
+       return VSXTernaryLogic<109> (a, b, c);
+     case 110:
+       return VSXTernaryLogic<110> (a, b, c);
+     case 111:
+       return VSXTernaryLogic<111> (a, b, c);
+     case 112:
+       return VSXTernaryLogic<112> (a, b, c);
+     case 113:
+       return VSXTernaryLogic<113> (a, b, c);
+     case 114:
+       return VSXTernaryLogic<114> (a, b, c);
+     case 115:
+       return VSXTernaryLogic<115> (a, b, c);
+     case 116:
+       return VSXTernaryLogic<116> (a, b, c);
+     case 117:
+       return VSXTernaryLogic<117> (a, b, c);
+     case 118:
+       return VSXTernaryLogic<118> (a, b, c);
+     case 119:
+       return VSXTernaryLogic<119> (a, b, c);
+     case 120:
+       return VSXTernaryLogic<120> (a, b, c);
+     case 121:
+       return VSXTernaryLogic<121> (a, b, c);
+     case 122:
+       return VSXTernaryLogic<122> (a, b, c);
+     case 123:
+       return VSXTernaryLogic<123> (a, b, c);
+     case 124:
+       return VSXTernaryLogic<124> (a, b, c);
+     case 125:
+       return VSXTernaryLogic<125> (a, b, c);
+     case 126:
+       return VSXTernaryLogic<126> (a, b, c);
+     case 127:
+       return VSXTernaryLogic<127> (a, b, c);
+     case 128:
+       return VSXTernaryLogic<128> (a, b, c);
+     case 129:
+       return VSXTernaryLogic<129> (a, b, c);
+     case 130:
+       return VSXTernaryLogic<130> (a, b, c);
+     case 131:
+       return VSXTernaryLogic<131> (a, b, c);
+     case 132:
+       return VSXTernaryLogic<132> (a, b, c);
+     case 133:
+       return VSXTernaryLogic<133> (a, b, c);
+     case 134:
+       return VSXTernaryLogic<134> (a, b, c);
+     case 135:
+       return VSXTernaryLogic<135> (a, b, c);
+     case 136:
+       return VSXTernaryLogic<136> (a, b, c);
+     case 137:
+       return VSXTernaryLogic<137> (a, b, c);
+     case 138:
+       return VSXTernaryLogic<138> (a, b, c);
+     case 139:
+       return VSXTernaryLogic<139> (a, b, c);
+     case 140:
+       return VSXTernaryLogic<140> (a, b, c);
+     case 141:
+       return VSXTernaryLogic<141> (a, b, c);
+     case 142:
+       return VSXTernaryLogic<142> (a, b, c);
+     case 143:
+       return VSXTernaryLogic<143> (a, b, c);
+     case 144:
+       return VSXTernaryLogic<144> (a, b, c);
+     case 145:
+       return VSXTernaryLogic<145> (a, b, c);
+     case 146:
+       return VSXTernaryLogic<146> (a, b, c);
+     case 147:
+       return VSXTernaryLogic<147> (a, b, c);
+     case 148:
+       return VSXTernaryLogic<148> (a, b, c);
+     case 149:
+       return VSXTernaryLogic<149> (a, b, c);
+     case 150:
+       return VSXTernaryLogic<150> (a, b, c);
+     case 151:
+       return VSXTernaryLogic<151> (a, b, c);
+     case 152:
+       return VSXTernaryLogic<152> (a, b, c);
+     case 153:
+       return VSXTernaryLogic<153> (a, b, c);
+     case 154:
+       return VSXTernaryLogic<154> (a, b, c);
+     case 155:
+       return VSXTernaryLogic<155> (a, b, c);
+     case 156:
+       return VSXTernaryLogic<156> (a, b, c);
+     case 157:
+       return VSXTernaryLogic<157> (a, b, c);
+     case 158:
+       return VSXTernaryLogic<158> (a, b, c);
+     case 159:
+       return VSXTernaryLogic<159> (a, b, c);
+     case 160:
+       return VSXTernaryLogic<160> (a, b, c);
+     case 161:
+       return VSXTernaryLogic<161> (a, b, c);
+     case 162:
+       return VSXTernaryLogic<162> (a, b, c);
+     case 163:
+       return VSXTernaryLogic<163> (a, b, c);
+     case 164:
+       return VSXTernaryLogic<164> (a, b, c);
+     case 165:
+       return VSXTernaryLogic<165> (a, b, c);
+     case 166:
+       return VSXTernaryLogic<166> (a, b, c);
+     case 167:
+       return VSXTernaryLogic<167> (a, b, c);
+     case 168:
+       return VSXTernaryLogic<168> (a, b, c);
+     case 169:
+       return VSXTernaryLogic<169> (a, b, c);
+     case 170:
+       return VSXTernaryLogic<170> (a, b, c);
+     case 171:
+       return VSXTernaryLogic<171> (a, b, c);
+     case 172:
+       return VSXTernaryLogic<172> (a, b, c);
+     case 173:
+       return VSXTernaryLogic<173> (a, b, c);
+     case 174:
+       return VSXTernaryLogic<174> (a, b, c);
+     case 175:
+       return VSXTernaryLogic<175> (a, b, c);
+     case 176:
+       return VSXTernaryLogic<176> (a, b, c);
+     case 177:
+       return VSXTernaryLogic<177> (a, b, c);
+     case 178:
+       return VSXTernaryLogic<178> (a, b, c);
+     case 179:
+       return VSXTernaryLogic<179> (a, b, c);
+     case 180:
+       return VSXTernaryLogic<180> (a, b, c);
+     case 181:
+       return VSXTernaryLogic<181> (a, b, c);
+     case 182:
+       return VSXTernaryLogic<182> (a, b, c);
+     case 183:
+       return VSXTernaryLogic<183> (a, b, c);
+     case 184:
+       return VSXTernaryLogic<184> (a, b, c);
+     case 185:
+       return VSXTernaryLogic<185> (a, b, c);
+     case 186:
+       return VSXTernaryLogic<186> (a, b, c);
+     case 187:
+       return VSXTernaryLogic<187> (a, b, c);
+     case 188:
+       return VSXTernaryLogic<188> (a, b, c);
+     case 189:
+       return VSXTernaryLogic<189> (a, b, c);
+     case 190:
+       return VSXTernaryLogic<190> (a, b, c);
+     case 191:
+       return VSXTernaryLogic<191> (a, b, c);
+     case 192:
+       return VSXTernaryLogic<192> (a, b, c);
+     case 193:
+       return VSXTernaryLogic<193> (a, b, c);
+     case 194:
+       return VSXTernaryLogic<194> (a, b, c);
+     case 195:
+       return VSXTernaryLogic<195> (a, b, c);
+     case 196:
+       return VSXTernaryLogic<196> (a, b, c);
+     case 197:
+       return VSXTernaryLogic<197> (a, b, c);
+     case 198:
+       return VSXTernaryLogic<198> (a, b, c);
+     case 199:
+       return VSXTernaryLogic<199> (a, b, c);
+     case 200:
+       return VSXTernaryLogic<200> (a, b, c);
+     case 201:
+       return VSXTernaryLogic<201> (a, b, c);
+     case 202:
+       return VSXTernaryLogic<202> (a, b, c);
+     case 203:
+       return VSXTernaryLogic<203> (a, b, c);
+     case 204:
+       return VSXTernaryLogic<204> (a, b, c);
+     case 205:
+       return VSXTernaryLogic<205> (a, b, c);
+     case 206:
+       return VSXTernaryLogic<206> (a, b, c);
+     case 207:
+       return VSXTernaryLogic<207> (a, b, c);
+     case 208:
+       return VSXTernaryLogic<208> (a, b, c);
+     case 209:
+       return VSXTernaryLogic<209> (a, b, c);
+     case 210:
+       return VSXTernaryLogic<210> (a, b, c);
+     case 211:
+       return VSXTernaryLogic<211> (a, b, c);
+     case 212:
+       return VSXTernaryLogic<212> (a, b, c);
+     case 213:
+       return VSXTernaryLogic<213> (a, b, c);
+     case 214:
+       return VSXTernaryLogic<214> (a, b, c);
+     case 215:
+       return VSXTernaryLogic<215> (a, b, c);
+     case 216:
+       return VSXTernaryLogic<216> (a, b, c);
+     case 217:
+       return VSXTernaryLogic<217> (a, b, c);
+     case 218:
+       return VSXTernaryLogic<218> (a, b, c);
+     case 219:
+       return VSXTernaryLogic<219> (a, b, c);
+     case 220:
+       return VSXTernaryLogic<220> (a, b, c);
+     case 221:
+       return VSXTernaryLogic<221> (a, b, c);
+     case 222:
+       return VSXTernaryLogic<222> (a, b, c);
+     case 223:
+       return VSXTernaryLogic<223> (a, b, c);
+     case 224:
+       return VSXTernaryLogic<224> (a, b, c);
+     case 225:
+       return VSXTernaryLogic<225> (a, b, c);
+     case 226:
+       return VSXTernaryLogic<226> (a, b, c);
+     case 227:
+       return VSXTernaryLogic<227> (a, b, c);
+     case 228:
+       return VSXTernaryLogic<228> (a, b, c);
+     case 229:
+       return VSXTernaryLogic<229> (a, b, c);
+     case 230:
+       return VSXTernaryLogic<230> (a, b, c);
+     case 231:
+       return VSXTernaryLogic<231> (a, b, c);
+     case 232:
+       return VSXTernaryLogic<232> (a, b, c);
+     case 233:
+       return VSXTernaryLogic<233> (a, b, c);
+     case 234:
+       return VSXTernaryLogic<234> (a, b, c);
+     case 235:
+       return VSXTernaryLogic<235> (a, b, c);
+     case 236:
+       return VSXTernaryLogic<236> (a, b, c);
+     case 237:
+       return VSXTernaryLogic<237> (a, b, c);
+     case 238:
+       return VSXTernaryLogic<238> (a, b, c);
+     case 239:
+       return VSXTernaryLogic<239> (a, b, c);
+     case 240:
+       return VSXTernaryLogic<240> (a, b, c);
+     case 241:
+       return VSXTernaryLogic<241> (a, b, c);
+     case 242:
+       return VSXTernaryLogic<242> (a, b, c);
+     case 243:
+       return VSXTernaryLogic<243> (a, b, c);
+     case 244:
+       return VSXTernaryLogic<244> (a, b, c);
+     case 245:
+       return VSXTernaryLogic<245> (a, b, c);
+     case 246:
+       return VSXTernaryLogic<246> (a, b, c);
+     case 247:
+       return VSXTernaryLogic<247> (a, b, c);
+     case 248:
+       return VSXTernaryLogic<248> (a, b, c);
+     case 249:
+       return VSXTernaryLogic<249> (a, b, c);
+     case 250:
+       return VSXTernaryLogic<250> (a, b, c);
+     case 251:
+       return VSXTernaryLogic<251> (a, b, c);
+     case 252:
+       return VSXTernaryLogic<252> (a, b, c);
+     case 253:
+       return VSXTernaryLogic<253> (a, b, c);
+     case 254:
+       return VSXTernaryLogic<254> (a, b, c);
+     case 255:
+       return VSXTernaryLogic<255> (a, b, c);
+     default:
+       return a;
+     }
+ }
+ 
+ int
+ main (int argc, char **argv)
+ {
+   vector unsigned long long a = {0xD8, 0xDB};
+   vector unsigned long long b = {0x6C, 0x6C};
+   vector unsigned long long c = {0x56, 0x56};
+   vector unsigned long long ternlog_result = VSXTernaryLogic (a, b, c, 0xB6);
+ 
+   if (ternlog_result[0] != 0xffffffffffffff3dull
+       || ternlog_result[1] != 0xffffffffffffff3eull)
+     __builtin_abort ();
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111366.C gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111366.C
*** gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111366.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111366.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,48 ----
+ /* { dg-do compile } */
+ /* Use -Wno-attributes to suppress the possible warning on always_inline.  */
+ /* { dg-options "-O2 -mdejagnu-cpu=power9 -Wno-attributes" } */
+ 
+ /* Verify it doesn't emit any error messages.  */
+ 
+ #include 
+ #define HWY_PRAGMA(tokens) _Pragma (#tokens)
+ #define HWY_PUSH_ATTRIBUTES(targets_str) HWY_PRAGMA (GCC target targets_str)
+ __attribute__ ((always_inline)) void
+ PreventElision ()
+ {
+   asm("");
+ }
+ #define HWY_BEFORE_NAMESPACE() HWY_PUSH_ATTRIBUTES (",cpu=power10")
+ HWY_BEFORE_NAMESPACE () namespace detail
+ {
+   template  struct CappedTagChecker
+   {
+   };
+ }
+ template 
+ using CappedTag = detail::CappedTagChecker;
+ template  struct ForeachCappedR
+ {
+   static void Do (size_t, size_t)
+   {
+     CappedTag d;
+     Test () (int(), d);
+   }
+ };
+ template  struct ForPartialVectors
+ {
+   template  void operator() (T)
+   {
+     ForeachCappedR::Do (1, 1);
+   }
+ };
+ struct TestFloorLog2
+ {
+   template  void operator() (T, DF) { PreventElision (); }
+ };
+ void
+ TestAllFloorLog2 ()
+ {
+   ForPartialVectors () (float());
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111367.C gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111367.C
*** gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111367.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111367.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,22 ----
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -fstack-protector-strong" } */
+ 
+ /* Verify object file can be generated successfully.  */
+ 
+ struct SortAscending
+ {
+ };
+ 
+ typedef unsigned long long size_t;
+ 
+ void VQSort (long long *, size_t, SortAscending);
+ 
+ void
+ BenchAllColdSort ()
+ {
+   typedef long long T;
+   constexpr size_t kSize = 10 * 1000;
+   alignas (16) T items[kSize];
+   VQSort (items, kSize, SortAscending ());
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111828-1.C gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111828-1.C
*** gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111828-1.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111828-1.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,49 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_as_p10_htm } */
+ /* Use -Wno-attributes to suppress the possible warning on always_inline.  */
+ /* { dg-options "-O2 -mdejagnu-cpu=power9 -Wno-attributes" } */
+ 
+ /* Verify it doesn't emit any error messages.  */
+ 
+ #include 
+ #define HWY_PRAGMA(tokens) _Pragma (#tokens)
+ #define HWY_PUSH_ATTRIBUTES(targets_str) HWY_PRAGMA (GCC target targets_str)
+ __attribute__ ((always_inline)) void
+ PreventElision (int output)
+ {
+   asm("nop" : "+r"(output) : : "memory");
+ }
+ #define HWY_BEFORE_NAMESPACE() HWY_PUSH_ATTRIBUTES (",cpu=power10")
+ HWY_BEFORE_NAMESPACE () namespace detail
+ {
+   template  struct CappedTagChecker
+   {
+   };
+ }
+ template 
+ using CappedTag = detail::CappedTagChecker;
+ template  struct ForeachCappedR
+ {
+   static void Do (size_t, size_t)
+   {
+     CappedTag d;
+     Test () (int(), d);
+   }
+ };
+ template  struct ForPartialVectors
+ {
+   template  void operator() (T)
+   {
+     ForeachCappedR::Do (1, 1);
+   }
+ };
+ struct TestFloorLog2
+ {
+   template  void operator() (T, DF) { PreventElision (0x10); }
+ };
+ void
+ TestAllFloorLog2 ()
+ {
+   ForPartialVectors () (float());
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111828-2.C gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111828-2.C
*** gcc-12.3.0/gcc/testsuite/g++.target/powerpc/pr111828-2.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/g++.target/powerpc/pr111828-2.C	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,52 ----
+ /* { dg-do compile } */
+ /* { dg-skip-if "HTM inline asm supported" { powerpc_as_p10_htm } } */
+ /* Use -Wno-attributes to suppress the possible warning on always_inline.  */
+ /* { dg-options "-O2 -mdejagnu-cpu=power9 -Wno-attributes" } */
+ 
+ /* Verify it emits error messages on non-empty inline asm.  */
+ 
+ #include 
+ #define HWY_PRAGMA(tokens) _Pragma (#tokens)
+ #define HWY_PUSH_ATTRIBUTES(targets_str) HWY_PRAGMA (GCC target targets_str)
+ __attribute__ ((always_inline)) void
+ PreventElision (int output) /* { dg-error "inlining failed in call to .* target specific option mismatch" } */
+ {
+   asm("nop" : "+r"(output) : : "memory");
+ }
+ #define HWY_BEFORE_NAMESPACE() HWY_PUSH_ATTRIBUTES (",cpu=power10")
+ HWY_BEFORE_NAMESPACE () namespace detail
+ {
+   template  struct CappedTagChecker
+   {
+   };
+ }
+ template 
+ using CappedTag = detail::CappedTagChecker;
+ template  struct ForeachCappedR
+ {
+   static void Do (size_t, size_t)
+   {
+     CappedTag d;
+     Test () (int(), d);
+   }
+ };
+ template  struct ForPartialVectors
+ {
+   template  void operator() (T)
+   {
+     ForeachCappedR::Do (1, 1);
+   }
+ };
+ struct TestFloorLog2
+ {
+   template  void operator() (T, DF)
+   {
+     PreventElision (0x10); /* { dg-message "called from here" } */
+   }
+ };
+ void
+ TestAllFloorLog2 ()
+ {
+   ForPartialVectors () (float());
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/asmgoto-6.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/asmgoto-6.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/asmgoto-6.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/asmgoto-6.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,26 ----
+ 
+ /* { dg-do compile } */
+ /* PR middle-end/110420 */
+ /* PR middle-end/103979 */
+ /* PR middle-end/98619 */
+ /* Test that the middle-end does not remove the asm goto
+    with an output. */
+ 
+ static int t;
+ void g(void);
+ 
+ void f(void)
+ {
+   int  __gu_val;
+   asm goto("#my asm "
+      : "=&r"(__gu_val)
+      :
+      :
+      : Efault);
+   t = __gu_val;
+   g();
+ Efault:
+ }
+ 
+ /* Make sure "my asm " is still in the assembly. */
+ /* { dg-final { scan-assembler "my asm " } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr110386-1.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr110386-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr110386-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr110386-1.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,9 ----
+ 
+ int f(int a)
+ {
+         int c = c < 0 ? c : -c;
+         c = -c;
+         unsigned b =  c;
+         unsigned t = b*a;
+         return t*t;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr110386-2.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr110386-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr110386-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr110386-2.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+ /* { dg-options "-mavx" } */
+ 
+ #include 
+ 
+ __m128i do_stuff(__m128i XMM0) {
+ 	__m128i ABS0 = _mm_abs_epi32(XMM0);
+ 	__m128i MUL0 = _mm_mullo_epi32(ABS0, XMM0);
+ 	__m128i MUL1 = _mm_mullo_epi32(MUL0, MUL0);
+ 	return MUL1;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr111699-1.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr111699-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr111699-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr111699-1.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,7 ----
+ typedef unsigned char __attribute__((__vector_size__ (8))) V;
+ 
+ void
+ foo (V *v)
+ {
+   *v =  (V) 0x107B9A7FF >= (*v <= 0);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr113603.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr113603.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr113603.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr113603.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,40 ----
+ /* PR tree-optimization/113603 */
+ 
+ int a, e;
+ signed char b;
+ int *c;
+ signed char *d;
+ short f;
+ signed char g[3];
+ 
+ int *
+ foo (void)
+ {
+   for (int i = 0; i < 3; i++)
+     g[i] = 2;
+   int j[100][100] = { {}, {4} };
+   signed char *k = &g[1];
+   do
+     {
+       for (;;)
+ 	{
+ 	  if (c)
+ 	    break;
+ 	  return &a;
+ 	}
+       for (f = 0;; f++)
+ 	{
+ 	  for (b = 0; b < 2; b++)
+ 	    *c = j[b][f];
+ 	  if (e)
+ 	    d = k;
+ 	  *k = *d;
+ 	  if (*c)
+ 	    break;
+ 	  if (f)
+ 	    break;
+ 	}
+     }
+   while (f);
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr115143-1.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr115143-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr115143-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr115143-1.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,21 ----
+ /* PR tree-optimization/115143 */
+ /* This used to ICE.
+    minmax part of phiopt would transform,
+    would transform `a!=0?min(a, b) : 0` into `min(a,b)`
+    which was correct except b was defined by a phi in the inner
+    bb which was not handled. */
+ short a, d;
+ char b;
+ long c;
+ unsigned long e, f;
+ void g(unsigned long h) {
+   if (c ? e : b)
+     if (e)
+       if (d) {
+         a = f ? ({
+           unsigned long i = d ? f : 0, j = e ? h : 0;
+           i < j ? i : j;
+         }) : 0;
+       }
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr115143-2.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr115143-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr115143-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr115143-2.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,30 ----
+ /* { dg-options "-fgimple" } */
+ /* PR tree-optimization/115143 */
+ /* This used to ICE.
+    minmax part of phiopt would transform,
+    would transform `a!=0?min(a, b) : 0` into `min(a,b)`
+    which was correct except b was defined by a phi in the inner
+    bb which was not handled. */
+ unsigned __GIMPLE (ssa,startwith("phiopt"))
+ foo (unsigned a, unsigned b)
+ {
+   unsigned j;
+   unsigned _23;
+   unsigned _12;
+ 
+   __BB(2):
+   if (a_6(D) != 0u)
+     goto __BB3;
+   else
+     goto __BB4;
+ 
+   __BB(3):
+   j_10 = __PHI (__BB2: b_11(D));
+   _23 = __MIN (a_6(D), j_10);
+   goto __BB4;
+ 
+   __BB(4):
+   _12 = __PHI (__BB3: _23, __BB2: 0u);
+   return _12;
+ 
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr115143-3.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr115143-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/compile/pr115143-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/compile/pr115143-3.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,29 ----
+ /* { dg-options "-fgimple" } */
+ /* PR tree-optimization/115143 */
+ /* This used to ICE.
+    minmax part of phiopt would transform,
+    would transform `a!=0?min(a, b) : 0` into `min(a,b)`
+    which was correct except b was defined by a phi in the inner
+    bb which was not handled. */
+ unsigned __GIMPLE (ssa,startwith("phiopt"))
+ foo (unsigned a, unsigned b)
+ {
+   unsigned j;
+   unsigned _23;
+   unsigned _12;
+ 
+   __BB(2):
+   if (a_6(D) > 0u)
+     goto __BB3;
+   else
+     goto __BB4;
+ 
+   __BB(3):
+   j_10 = __PHI (__BB2: b_7(D));
+   _23 = __MIN (a_6(D), j_10);
+   goto __BB4;
+ 
+   __BB(4):
+   _12 = __PHI (__BB3: _23, __BB2: 0u);
+   return _12;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-1.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-1.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,23 ----
+ struct S {
+   short int i : 12;
+   char c1 : 1;
+   char c2 : 1;
+   char c3 : 1;
+   char c4 : 1;
+ };
+ 
+ int main (void)
+ {
+   struct S s0 = { 341, 1, 1, 1, 1 };
+   char *p = (char *) &s0;
+ 
+ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+   if (*p != 85)
+     __builtin_abort ();
+ #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   if (*p != 21)
+     __builtin_abort ();
+ #endif
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-2.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-2.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,29 ----
+ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+ #define REVERSE_SSO __attribute__((scalar_storage_order("big-endian")));
+ #else
+ #define REVERSE_SSO __attribute__((scalar_storage_order("little-endian")));
+ #endif
+ 
+ struct S {
+   short int i : 12;
+   char c1 : 1;
+   char c2 : 1;
+   char c3 : 1;
+   char c4 : 1;
+ } REVERSE_SSO;
+ 
+ int main (void)
+ {
+   struct S s0 = { 341, 1, 1, 1, 1 };
+   char *p = (char *) &s0;
+ 
+ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+   if (*p != 21)
+     __builtin_abort ();
+ #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   if (*p != 85)
+     __builtin_abort ();
+ #endif
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-3.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-3.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,27 ----
+ struct S {
+   int i : 24;
+   char c1 : 1;
+   char c2 : 1;
+   char c3 : 1;
+   char c4 : 1;
+   char c5 : 1;
+   char c6 : 1;
+   char c7 : 1;
+   char c8 : 1;
+ };
+ 
+ int main (void)
+ {
+   struct S s0 = { 1193046, 1, 1, 1, 1, 1, 1, 1, 1 };
+   char *p = (char *) &s0;
+ 
+ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+   if (*p != 86)
+     __builtin_abort ();
+ #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   if (*p != 18)
+     __builtin_abort ();
+ #endif
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-4.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-4.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/20230630-4.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/20230630-4.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,33 ----
+ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+ #define REVERSE_SSO __attribute__((scalar_storage_order("big-endian")));
+ #else
+ #define REVERSE_SSO __attribute__((scalar_storage_order("little-endian")));
+ #endif
+ 
+ struct S {
+   int i : 24;
+   char c1 : 1;
+   char c2 : 1;
+   char c3 : 1;
+   char c4 : 1;
+   char c5 : 1;
+   char c6 : 1;
+   char c7 : 1;
+   char c8 : 1;
+ } REVERSE_SSO;
+ 
+ int main (void)
+ {
+   struct S s0 = { 1193046, 1, 1, 1, 1, 1, 1, 1, 1 };
+   char *p = (char *) &s0;
+ 
+ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+   if (*p != 18)
+     __builtin_abort ();
+ #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   if (*p != 86)
+     __builtin_abort ();
+ #endif
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr108789.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr108789.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr108789.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr108789.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,39 ----
+ /* PR middle-end/108789 */
+ 
+ int
+ add (unsigned *r, const unsigned *a, const unsigned *b)
+ {
+   return __builtin_add_overflow (*a, *b, r);
+ }
+ 
+ int
+ mul (unsigned *r, const unsigned *a, const unsigned *b)
+ {
+   return __builtin_mul_overflow (*a, *b, r);
+ }
+ 
+ int
+ main ()
+ {
+   unsigned x;
+ 
+   /* 1073741824U + 1073741824U should not overflow.  */
+   x = (__INT_MAX__ + 1U) / 2;
+   if (add (&x, &x, &x))
+     __builtin_abort ();
+ 
+   /* 256U * 256U should not overflow */
+   x = 1U << (sizeof (int) * __CHAR_BIT__ / 4);
+   if (mul (&x, &x, &x))
+     __builtin_abort ();
+ 
+   /* 2147483648U + 2147483648U should overflow */
+   x = __INT_MAX__ + 1U;
+   if (!add (&x, &x, &x))
+     __builtin_abort ();
+ 
+   /* 65536U * 65536U should overflow */
+   x = 1U << (sizeof (int) * __CHAR_BIT__ / 2);
+   if (!mul (&x, &x, &x))
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr109778.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr109778.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr109778.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr109778.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR tree-optimization/109778 */
+ 
+ int a, b, c, d, *e = &c;
+ 
+ static inline unsigned
+ foo (unsigned char x)
+ {
+   x = 1 | x << 1;
+   x = x >> 4 | x << 4;
+   return x;
+ }
+ 
+ static inline void
+ bar (unsigned x)
+ {
+   *e = 8 > foo (x + 86) - 86;
+ }
+ 
+ int
+ main ()
+ {
+   d = a && b;
+   bar (d + 4);
+   if (c != 1)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr110115.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr110115.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr110115.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr110115.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,45 ----
+ /* PR middle-end/110115 */
+ 
+ int a;
+ signed char b;
+ 
+ static int
+ foo (signed char *e, int f)
+ {
+   int d;
+   for (d = 0; d < f; d++)
+     e[d] = 0;
+   return d;
+ }
+ 
+ int
+ bar (signed char e, int f)
+ {
+   signed char h[20];
+   int i = foo (h, f);
+   return i;
+ }
+ 
+ int
+ baz ()
+ {
+   switch (a)
+     {
+     case 'f':
+       return 0;
+     default:
+       return ~0;
+     }
+ }
+ 
+ int
+ main ()
+ {
+   {
+     signed char *k[3];
+     int d;
+     for (d = 0; bar (8, 15) - 15 + d < 1; d++)
+       k[baz () + 1] = &b;
+     *k[0] = -*k[0];
+   }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr110914.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr110914.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr110914.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr110914.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,22 ----
+ /* PR tree-optimization/110914 */
+ 
+ __attribute__ ((noipa)) int
+ foo (const char *s, unsigned long l)
+ {
+   unsigned char r = 0;
+   __builtin_memcpy (&r, s, l != 0);
+   return r;
+ }
+ 
+ int
+ main ()
+ {
+   const char *p = "123456";
+   int a = foo (p, __builtin_strlen (p) - 5);
+   int b = foo (p, __builtin_strlen (p) - 6);
+   if (a != '1')
+     __builtin_abort ();
+   if (b != 0)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111331-1.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111331-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111331-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111331-1.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,17 ----
+ int a;
+ int b;
+ int c(int d, int e, int f) {
+   if (d < e)
+     return e;
+   if (d > f)
+     return f;
+   return d;
+ }
+ int main() {
+   int g = -1;
+   a = c(b + 30, 29, g + 29);
+   volatile t = a;
+   if (t != 28)
+     __builtin_abort();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111331-2.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111331-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111331-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111331-2.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,19 ----
+ 
+ int a;
+ int b;
+ 
+ int main() {
+   int d = b+30;
+   {
+         int t;
+         if (d < 29)
+           t =  29;
+         else
+           t = (d > 28) ? 28 : d;
+     a = t;
+   }
+   volatile int t = a;
+   if (a != 28)
+     __builtin_abort();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111331-3.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111331-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111331-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111331-3.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,15 ----
+ int a;
+ int b;
+ 
+ int main() {
+   int d = b+30;
+   {
+     int t;
+     t = d < 29 ? 29 : ((d > 28) ? 28 : d);
+     a = t;
+   }
+   volatile int t = a;
+   if (a != 28)
+     __builtin_abort();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111408.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111408.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111408.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111408.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR target/111408 */
+ 
+ int a, b, c, d;
+ short e;
+ 
+ int
+ foo ()
+ {
+   c = a % (sizeof (int) * 8);
+   if (b & 1 << c)
+     return -1;
+   return 0;
+ }
+ 
+ int
+ main ()
+ {
+   for (; e != 1; e++)
+     {
+       int g = foo ();
+       if (g + d - 9 + d)
+ 	continue;
+       for (;;)
+ 	__builtin_abort ();
+     }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111422.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111422.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr111422.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr111422.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,39 ----
+ /* PR middle-end/111422 */
+ 
+ int a, b;
+ int *c = &b;
+ unsigned d;
+ signed char e;
+ int f = 1;
+ 
+ int
+ foo (int k, signed char *l)
+ {
+   if (k < 6)
+     return a;
+   l[0] = l[1] = l[k - 1] = 8;
+   return 0;
+ }
+ 
+ int
+ bar (int k)
+ {
+   signed char g[11];
+   int h = foo (k, g);
+   return h;
+ }
+ 
+ int
+ main ()
+ {
+   for (; b < 8; b = b + 1)
+     ;
+   int j;
+   int *n[8];
+   for (j = 0; 18446744073709551608ULL + bar (*c) + *c + j < 2; j++)
+     n[j] = &f;
+   for (; e <= 4; e++)
+     d = *n[0] == f;
+   if (d != 1)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr90348.c gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr90348.c
*** gcc-12.3.0/gcc/testsuite/gcc.c-torture/execute/pr90348.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.c-torture/execute/pr90348.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,38 ----
+ /* PR middle-end/90348 */
+ 
+ void __attribute__ ((noipa))
+ set_one (unsigned char *ptr)
+ {
+   *ptr = 1;
+ }
+ 
+ void __attribute__ ((noipa))
+ check_zero (unsigned char const *in, unsigned int len)
+ {
+   for (unsigned int i = 0; i < len; ++i)
+     if (in[i] != 0)
+       __builtin_abort ();
+ }
+ 
+ static void
+ set_one_on_stack (void)
+ {
+   unsigned char buf[1];
+   set_one (buf);
+ }
+ 
+ int
+ main ()
+ {
+   for (int i = 0; i <= 4; ++i)
+     {
+       unsigned char in[4];
+       for (int j = 0; j < i; ++j)
+ 	{
+ 	  in[j] = 0;
+ 	  set_one_on_stack ();
+ 	}
+       check_zero (in, i);
+     }
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/Wfree-nonheap-object-7.c gcc-12.4.0/gcc/testsuite/gcc.dg/Wfree-nonheap-object-7.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/Wfree-nonheap-object-7.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/Wfree-nonheap-object-7.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,26 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -Wfree-nonheap-object" } */
+ 
+ struct local_caches *get_local_caches_lcs;
+ void *calloc(long, long);
+ void *realloc();
+ 
+ struct local_caches {
+   int *t_mem_caches;
+ };
+ 
+ struct local_caches *get_local_caches() {
+   if (get_local_caches_lcs)
+     return get_local_caches_lcs;
+   get_local_caches_lcs = calloc(1, 0);
+   return get_local_caches_lcs;
+ }
+ 
+ void libtrace_ocache_free() {
+   struct local_caches lcs = *get_local_caches(), __trans_tmp_1 = lcs;
+   {
+     struct local_caches *lcs = &__trans_tmp_1;
+     lcs->t_mem_caches += 10;
+     __trans_tmp_1.t_mem_caches = realloc(__trans_tmp_1.t_mem_caches, sizeof(int)); // { dg-warning "called on pointer (?:(?!PHI).)*nonzero offset" }
+   }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/analyzer/analyzer.exp gcc-12.4.0/gcc/testsuite/gcc.dg/analyzer/analyzer.exp
*** gcc-12.3.0/gcc/testsuite/gcc.dg/analyzer/analyzer.exp	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/analyzer/analyzer.exp	Thu Jun 20 08:08:07 2024
*************** if [info exists DEFAULT_CFLAGS] then {
*** 32,37 ****
--- 32,45 ----
  # If a testcase doesn't have special options, use these.
  set DEFAULT_CFLAGS "-fanalyzer -Wanalyzer-too-complex -fanalyzer-call-summaries"
  
+ if { [istarget "*-*-darwin*" ] } {
+   # On macOS, system headers redefine by default some macros (memcpy,
+   # memmove, etc) to checked versions, which defeats the analyzer. We
+   # want to turn this off.
+   # See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104042
+   set DEFAULT_CFLAGS "$DEFAULT_CFLAGS -D_FORTIFY_SOURCE=0"
+ }
+ 
  # Initialize `dg'.
  dg-init
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/asan/pr110027.c gcc-12.4.0/gcc/testsuite/gcc.dg/asan/pr110027.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/asan/pr110027.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/asan/pr110027.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,50 ----
+ /* PR middle-end/110027 */
+ /* { dg-do run } */
+ /* { dg-additional-options "-fstack-protector-strong" { target fstack_protector } } */
+ /* { dg-set-target-env-var ASAN_OPTIONS "detect_stack_use_after_return=1" } */
+ 
+ struct __attribute__((aligned (128))) S { char s[128]; };
+ struct __attribute__((aligned (64))) T { char s[192]; };
+ struct __attribute__((aligned (32))) U { char s[256]; };
+ struct __attribute__((aligned (64))) V { char s[320]; };
+ struct __attribute__((aligned (128))) W { char s[512]; };
+ 
+ __attribute__((noipa)) void
+ foo (void *p, void *q, void *r, void *s)
+ {
+   if (((__UINTPTR_TYPE__) p & 31) != 0
+       || ((__UINTPTR_TYPE__) q & 127) != 0
+       || ((__UINTPTR_TYPE__) r & 63) != 0)
+     __builtin_abort ();
+   (void *) s;
+ }
+ 
+ __attribute__((noipa)) int
+ bar (void)
+ {
+   struct U u;
+   struct S s;
+   struct T t;
+   char p[4];
+   foo (&u, &s, &t, &p);
+   return 42;
+ }
+ 
+ __attribute__((noipa)) int
+ baz (void)
+ {
+   struct W w;
+   struct U u;
+   struct V v;
+   char p[4];
+   foo (&u, &w, &v, &p);
+   return 42;
+ }
+ 
+ int
+ main ()
+ {
+   bar ();
+   baz ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/asan/pr114956.c gcc-12.4.0/gcc/testsuite/gcc.dg/asan/pr114956.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/asan/pr114956.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/asan/pr114956.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR sanitizer/114956 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fsanitize=address,null" } */
+ 
+ int **a;
+ void qux (int *);
+ 
+ __attribute__((always_inline)) static inline int *
+ foo (void)
+ {
+   int b[1];
+   qux (b);
+   return a[1];
+ }
+ 
+ __attribute__((no_sanitize_address)) void
+ bar (void)
+ {
+   *a = foo ();
+ }
+ 
+ void
+ baz (void)
+ {
+   bar ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/asan/pr115172.c gcc-12.4.0/gcc/testsuite/gcc.dg/asan/pr115172.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/asan/pr115172.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/asan/pr115172.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,20 ----
+ /* PR sanitizer/115172 */
+ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+ /* { dg-options "-O2 -fsanitize=address,bool -ffat-lto-objects -fdump-tree-asan1" } */
+ /* { dg-final { scan-tree-dump-not "\.ASAN_CHECK " "asan1" } } */
+ 
+ #ifdef __x86_64__
+ #define SEG __seg_gs
+ #else
+ #define SEG __seg_fs
+ #endif
+ 
+ extern struct S { _Bool b; } s;
+ void bar (void);
+ 
+ void
+ foo (void)
+ {
+   if (*(volatile _Bool SEG *) (__UINTPTR_TYPE__) &s.b)
+     bar ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/c23-attr-syntax-8.c gcc-12.4.0/gcc/testsuite/gcc.dg/c23-attr-syntax-8.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/c23-attr-syntax-8.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/c23-attr-syntax-8.c	Thu Jun 20 08:08:07 2024
***************
*** 0 ****
--- 1,12 ----
+ /* PR c/114007 */
+ /* { dg-do compile } */
+ /* { dg-options "-std=c11" } */
+ 
+ #if __has_c_attribute (gnu::unused)
+ [[gnu::unused]]
+ #endif
+ int i;
+ #if __has_cpp_attribute (gnu::unused)
+ [[gnu::unused]]
+ #endif
+ int j;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/darwin-ld-2.c gcc-12.4.0/gcc/testsuite/gcc.dg/darwin-ld-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/darwin-ld-2.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/darwin-ld-2.c	Thu Jun 20 08:08:08 2024
***************
*** 3,8 ****
--- 3,9 ----
  
  /* { dg-options "-bind_at_load" } */
  /* { dg-do link { target *-*-darwin* } } */
+ /* { dg-prune-output "-bind_at_load is deprecated" } */
  
  int main()
  {
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/darwin-minversion-link.c gcc-12.4.0/gcc/testsuite/gcc.dg/darwin-minversion-link.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/darwin-minversion-link.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/darwin-minversion-link.c	Thu Jun 20 08:08:08 2024
***************
*** 17,22 ****
--- 17,24 ----
  /* { dg-additional-options "-mmacosx-version-min=010.015.06 -DCHECK=101506" { target *-*-darwin19* } } */
  /* { dg-additional-options "-mmacosx-version-min=011.000.00 -DCHECK=110000" { target *-*-darwin20* } } */
  /* { dg-additional-options "-mmacosx-version-min=012.000.00 -DCHECK=120000" { target *-*-darwin21* } } */
+ /* { dg-additional-options "-mmacosx-version-min=013.000.00 -DCHECK=130000" { target *-*-darwin22* } } */
+ /* { dg-additional-options "-mmacosx-version-min=014.000.00 -DCHECK=140000" { target *-*-darwin23* } } */
  
  int
  main ()
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/darwin-segaddr.c gcc-12.4.0/gcc/testsuite/gcc.dg/darwin-segaddr.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/darwin-segaddr.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/darwin-segaddr.c	Thu Jun 20 08:08:08 2024
***************
*** 2,7 ****
--- 2,8 ----
  /* { dg-do run { target *-*-darwin* } } */
  /* { dg-options "-O0 -segaddr __TEST 0x200000 -fno-pie" { target { *-*-darwin* && { ! lp64 } } } } */
  /* { dg-options "-O0 -segaddr __TEST 0x110000000 -fno-pie" { target { *-*-darwin* && lp64 } } } */
+ /* { dg-prune-output "-no_pie is deprecated when targeting new OS versions" } */
  
  extern void abort ();
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/debug/dwarf2/inline4.c gcc-12.4.0/gcc/testsuite/gcc.dg/debug/dwarf2/inline4.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/debug/dwarf2/inline4.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/debug/dwarf2/inline4.c	Thu Jun 20 08:08:08 2024
***************
*** 2,8 ****
     the DW_TAG_inlined_subroutine and the DW_TAG_variable for the local.  */
  /* { dg-options "-O -gdwarf -dA" } */
  /* { dg-do compile } */
! /* { dg-final { scan-assembler "DW_TAG_inlined_subroutine\[^\\(\]*\\(\[^\\)\]*\\)\[^\\(\]*\\(DIE \\(0x\[0-9a-f\]*\\) DW_TAG_formal_parameter\[^\\(\]*\\(DIE \\(0x\[0-9a-f\]*\\) DW_TAG_variable" } } */
  /* { dg-final { scan-assembler-times "DW_TAG_inlined_subroutine" 2 } } */
  
  static int foo (int i)
--- 2,8 ----
     the DW_TAG_inlined_subroutine and the DW_TAG_variable for the local.  */
  /* { dg-options "-O -gdwarf -dA" } */
  /* { dg-do compile } */
! /* { dg-final { scan-assembler "DW_TAG_inlined_subroutine\[^\\(\]*\(\|\\(\[^\\)\]*\\)\)\[^\\(\]*\\(DIE \\(0x\[0-9a-f\]*\\) DW_TAG_formal_parameter\[^\\(\]*\\(DIE \\(0x\[0-9a-f\]*\\) DW_TAG_variable" } } */
  /* { dg-final { scan-assembler-times "DW_TAG_inlined_subroutine" 2 } } */
  
  static int foo (int i)
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/debug/dwarf2/pr111080.c gcc-12.4.0/gcc/testsuite/gcc.dg/debug/dwarf2/pr111080.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/debug/dwarf2/pr111080.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/debug/dwarf2/pr111080.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-do compile } */
+ /* { dg-options "-save-temps -gdwarf-3 -dA" } */
+ 
+ struct foo {
+         int field_number_1;
+         int field_number_2;
+         int field_number_3;
+         int field_number_4;
+         int field_number_5;
+ };
+ 
+ typedef int fun_t(struct foo *restrict);
+ 
+ int main() {
+         return 0;
+ }
+ 
+ /* { dg-final { scan-assembler-not "DW_TAG_structure_type" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/debug/pr112718.c gcc-12.4.0/gcc/testsuite/gcc.dg/debug/pr112718.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/debug/pr112718.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/debug/pr112718.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target lto } */
+ /* { dg-options "-g -fdebug-types-section -flto -ffat-lto-objects" } */
+ 
+ struct {
+   int h;
+   unsigned char data[20 + 24 * 6];
+ } _EC_X9_62_PRIME_192V2;
+ struct {
+   int h;
+   unsigned char data[20 + 24 * 6];
+ } _EC_X9_62_PRIME_192V3;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/float_opposite_arm-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/float_opposite_arm-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/float_opposite_arm-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/float_opposite_arm-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-original -fdump-tree-optimized" } */
+ /* { dg-add-options ieee } */
+ /* PR middle-end/95351 */
+ 
+ int Foo(double possiblyNAN, double b, double c)
+ {
+     return (possiblyNAN <= 2.0) || ((possiblyNAN  > 2.0) && (b > c));
+ }
+ 
+ /* Make sure we don't remove either >/<=  */
+ 
+ /* { dg-final { scan-tree-dump "possiblyNAN > 2.0e.0" "original" } } */
+ /* { dg-final { scan-tree-dump "possiblyNAN_\[0-9\]+.D. > 2.0e.0" "optimized" } } */
+ 
+ /* { dg-final { scan-tree-dump "possiblyNAN <= 2.0e.0" "original" } } */
+ /* { dg-final { scan-tree-dump "possiblyNAN_\[0-9\]+.D. <= 2.0e.0" "optimized" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/framework-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/framework-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/framework-1.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/framework-1.c	Thu Jun 20 08:08:08 2024
***************
*** 1,4 ****
  /* { dg-do compile { target *-*-darwin* } } */
  /* { dg-options "-F." } */
  
! #include 
--- 1,10 ----
  /* { dg-do compile { target *-*-darwin* } } */
  /* { dg-options "-F." } */
  
! /* The intent of the test is to show that we find a framework that
!    is installed in /System/Library/Frameworks when the user has added
!    a '-F' option.  The trick is to choose some header that is present
!    for all the Darwin versions we support and that does not contain any
!    content we cannot parse.  */
! 
! #include 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/ipa-icf-38.c gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/ipa-icf-38.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/ipa-icf-38.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/ipa-icf-38.c	Thu Jun 20 08:08:08 2024
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do link } */
+ /* { dg-require-alias "" } */
  /* { dg-options "-O2 -fdump-ipa-icf-optimized -flto -fdump-tree-optimized" } */
  /* { dg-require-effective-target lto } */
  /* { dg-additional-sources "ipa-icf-38a.c" }*/
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/pr108007.c gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/pr108007.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/pr108007.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/pr108007.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,32 ----
+ /* { dg-do run } */
+ /* { dg-options "-Os -fno-dce -fno-tree-dce -g" } */
+ 
+ /* This tests that when IPA-SRA removes a LHS of a call statement which, in the
+    original source, is fed into a useless operation which however can trap when
+    given nonsensical input, that we remove it even when the user has turned off
+    normal DCE.  */
+ 
+ int a, b, d, e, f = 10000000, h;
+ short c, g;
+ static int *i() {
+   g = f;
+  L:
+   h = e = ~g;
+   g = ~f % g & e;
+   if (!g)
+     goto L;
+   c++;
+   while (g < 1)
+     ;
+   return &a;
+ }
+ static void k() {
+   int *l, m = 2;
+   l = i();
+   for (; d < 1; d++)
+     m |= *l >= b;
+ }
+ int main() {
+   k();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/pr112616.c gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/pr112616.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/pr112616.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/pr112616.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,28 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+ 
+ unsigned a;
+ int b, d, e, f = 2, g, h = 1, *i = &b;
+ volatile int c = 1;
+ static int *o() {
+   long m = ~a;
+   int j = f / b, k = f - 1, n = m << -1 / ~g / k;
+   if (j && n)
+     c;
+   return &e;
+ }
+ static long p() {
+   int *q = 0, **r = &q;
+   if (c) {
+     *i = h;
+     *r = o();
+   }
+   return *q;
+ }
+ int main() {
+   p();
+   int *l = 0;
+   if (d)
+     c = *l;
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/pr114247.c gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/pr114247.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/ipa/pr114247.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/ipa/pr114247.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,31 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2 -fsigned-char -fno-strict-aliasing -fwrapv" } */
+ 
+ union a {
+   unsigned short b;
+   int c;
+   signed short d;
+ };
+ int e, f = 1, g;
+ long h;
+ const int **i;
+ void j(union a k, int l, unsigned m) {
+   const int *a[100];
+   i = &a[0];
+   h = k.d;
+ }
+ static int o(union a k) {
+   k.d = -1;
+   while (1)
+     if (f)
+       break;
+   j(k, g, e);
+   return 0;
+ }
+ int main() {
+   union a n = {1};
+   o(n);
+   if (h != -1)
+     __builtin_abort();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr109778_0.c gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr109778_0.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr109778_0.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr109778_0.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,22 ----
+ /* PR tree-optimization/109778 */
+ /* { dg-lto-do run } */
+ /* { dg-lto-options { "-O2 -flto" } } */
+ /* { dg-require-effective-target int32 } */
+ 
+ int bar (int);
+ 
+ __attribute__((noipa)) int
+ foo (int x)
+ {
+   x = bar (x);
+   x = (x << 16) | (int) ((unsigned) x >> 16);
+   return x & 0x10000000;
+ }
+ 
+ int
+ main ()
+ {
+   if (foo (0) || foo (-1))
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr109778_1.c gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr109778_1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr109778_1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr109778_1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,7 ----
+ int
+ bar (int x)
+ {
+   x &= 0x22222222;
+   x |= (int) 0xf1234567U;
+   return x;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr113907_0.c gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr113907_0.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr113907_0.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr113907_0.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-lto-do run } */
+ /* { dg-lto-options {{-O3 -flto}} }  */
+ 
+ struct bar {int a;};
+ struct foo {int a;};
+ struct barp {struct bar *f; struct bar *g;};
+ extern struct foo **ptr;
+ int test2 (void *);
+ int test3 (void *);
+ int
+ testb(void)
+ {
+   struct bar *fp;
+   test2 ((void *)&fp);
+   fp = (void *) 0;
+   (*ptr)++;
+   test3 ((void *)&fp);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr113907_1.c gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr113907_1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr113907_1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr113907_1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,35 ----
+ __attribute__((used)) int val,val2 = 1;
+ 
+ struct foo {int a;};
+ 
+ struct foo **ptr;
+ 
+ __attribute__ ((noipa))
+ int
+ test2 (void *a)
+ {
+   ptr = (struct foo **)a;
+ }
+ int test3 (void *a);
+ 
+ int
+ test(void)
+ {
+   struct foo *fp;
+   test2 ((void *)&fp);
+   fp = (void *) 0;
+   (*ptr)++;
+   test3 ((void *)&fp);
+ }
+ 
+ int testb (void);
+ 
+ int
+ main()
+ {
+   for (int i = 0; i < val2; i++)
+   if (val)
+     testb ();
+   else
+     test();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr113907_2.c gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr113907_2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/lto/pr113907_2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/lto/pr113907_2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-options "-O3 -flto -fno-strict-aliasing" }  */
+ 
+ __attribute__ ((noinline))
+ int
+ test3 (void *a)
+ {
+   if (!*(void **)a)
+           __builtin_abort ();
+   return 0;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pie-2.c gcc-12.4.0/gcc/testsuite/gcc.dg/pie-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pie-2.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pie-2.c	Thu Jun 20 08:08:08 2024
***************
*** 2,7 ****
--- 2,8 ----
  /* { dg-options "-fPIE" } */
  /* { dg-require-effective-target pie } */
  /* { dg-skip-if "__PIC__ is always 1 for MIPS" { mips*-*-* } } */
+ /* { dg-skip-if "__PIE__ is often not defined on darwin" { *-*-darwin* } } */
  
  #if __PIC__ != 2
  # error __PIC__ is not 2!
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pie-7.c gcc-12.4.0/gcc/testsuite/gcc.dg/pie-7.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pie-7.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pie-7.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
--- 1,6 ----
  /* { dg-do run { target pie } } */
  /* { dg-options "-fno-pie -no-pie" } */
+ /* { dg-prune-output "-no_pie is deprecated when targeting new OS versions" } */
  
  int main(void)
  {
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr105522.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr105522.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr105522.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr105522.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* { dg-do compile { target *-*-darwin* } } */
+ typedef const struct __CFString * CFStringRef;
+ 
+ /* This used to ICE on powerpc darwin, in decode_addr_const.  */
+ const void
+ * create_usage_match(const unsigned int page, const unsigned int usage, int
+ *okay)
+ {
+ 
+   const void *keys[2] = 
+     { (void *) ((CFStringRef) __builtin___CFStringMakeConstantString (""
+       "DeviceUsagePage" ""))
+       , (void *) ((CFStringRef) __builtin___CFStringMakeConstantString (""
+       "DeviceUsage" ""))
+     };
+   return keys[1];
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr105660-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr105660-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr105660-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr105660-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,13 ----
+ /* PR105660
+  * { dg-do compile }
+  * { dg-options "-std=c17" }
+  */
+ 
+ void gatherConservativeVars(int, int, int, int, int, int, int Hnvar, int,
+                             int Hnyt, int Hnxyt, int, int Hstep, double[Hnyt],
+                             double[Hnvar][Hstep][Hnxyt]);
+ void gatherConservativeVars(int, int, int, int, int, int, int Hnvar, int, int Hnyt,
+                             int Hnxyt, int, int Hstep, double[Hnyt],
+                             double[Hnvar][Hstep][Hnxyt]);
+ 
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr105660-2.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr105660-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr105660-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr105660-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* PR105660
+  * { dg-do compile }
+  * { dg-options "-Wall -std=c17" }
+  */
+ 
+ 
+ struct bat_gen_conf_s;
+ void batch_generator_create2(struct bat_gen_conf_s* config, int D, int N, const long bat_dims[D][N], const long tot_dims[D][N], const long tot_strs[D][N], const _Complex float* data[D]);
+ void batch_generator_create2(struct bat_gen_conf_s* config, int D, int N, const long bat_dims[D][N], const long tot_dims[D][N], const long tot_strs[D][N], const _Complex float* data[D]);
+ 
+ 
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr107385.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr107385.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr107385.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr107385.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* PR middle-end/107385 */
+ /* { dg-do run { target lra } } */
+ /* { dg-options "-O2" } */
+ 
+ __attribute__((noipa)) int
+ foo (void)
+ {
+   int x;
+   asm goto ("": "=r" (x) : "0" (15) :: lab);
+   x = 6;
+ lab:
+   return x;
+ }
+ 
+ int
+ main ()
+ {
+   if (foo () != 6)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr110079.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr110079.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr110079.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr110079.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,43 ----
+ /* PR rtl-optimization/110079 */
+ /* { dg-do compile { target lra } } */
+ /* { dg-options "-O2" } */
+ /* { dg-additional-options "-freorder-blocks-and-partition" { target freorder } } */
+ 
+ int a;
+ __attribute__((cold)) int bar (char *);
+ __attribute__((hot)) int baz (char *);
+ 
+ void
+ foo (void)
+ {
+ l1:
+   while (a)
+     ;
+   bar ("");
+   asm goto ("" : : : : l2);
+   asm ("");
+ l2:
+   goto l1;
+ }
+ 
+ void
+ qux (void)
+ {
+   asm goto ("" : : : : l1);
+   bar ("");
+   goto l1;
+ l1:
+   baz ("");
+ }
+ 
+ void
+ corge (void)
+ {
+   asm goto ("" : : : : l1);
+   baz ("");
+ l2:
+   return;
+ l1:
+   bar ("");
+   goto l2;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr110731.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr110731.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr110731.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr110731.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* PR tree-optimization/110731 */
+ /* { dg-do run { target int128 } } */
+ /* { dg-options "-O2" } */
+ 
+ __int128
+ foo (void)
+ {
+   struct S { __int128 f : 119; } s = { ((__int128) -18014398509481984) << 64 };
+   return s.f / 2;
+ }
+ 
+ int
+ main ()
+ {
+   if (foo () != (((__int128) -9007199254740992) << 64))
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr111009.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr111009.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr111009.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr111009.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,38 ----
+ /* PR tree-optimization/111009 */
+ /* { dg-do run } */
+ /* { dg-options "-O3 -fno-strict-overflow" } */
+ 
+ struct dso {
+  struct dso * next;
+  int maj;
+ };
+ 
+ __attribute__((noipa)) static void __dso_id__cmp_(void) {}
+ 
+ __attribute__((noipa))
+ static int bug(struct dso * d, struct dso *dso)
+ {
+  struct dso **p = &d;
+  struct dso *curr = 0;
+ 
+  while (*p) {
+   curr = *p;
+   // prevent null deref below
+   if (!dso) return 1;
+   if (dso == curr) return 1;
+ 
+   int *a = &dso->maj;
+   // null deref
+   if (!(a && *a)) __dso_id__cmp_();
+ 
+   p = &curr->next;
+  }
+  return 0;
+ }
+ 
+ __attribute__((noipa))
+ int main(void) {
+     struct dso d = { 0, 0, };
+     bug(&d, 0);
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr111015.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr111015.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr111015.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr111015.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,28 ----
+ /* PR tree-optimization/111015 */
+ /* { dg-do run { target int128 } } */
+ /* { dg-options "-O2" } */
+ 
+ struct S { unsigned a : 4, b : 4; unsigned __int128 c : 70; } d;
+ 
+ __attribute__((noipa)) void
+ foo (unsigned __int128 x, unsigned char y, unsigned char z)
+ {
+   d.a = y;
+   d.b = z;
+   d.c = x;
+ }
+ 
+ int
+ main ()
+ {
+   foo (-1, 12, 5);
+   if (d.a != 12
+       || d.b != 5
+       || d.c != (-1ULL | (((unsigned __int128) 0x3f) << 64)))
+     __builtin_abort ();
+   foo (0x123456789abcdef0ULL | (((unsigned __int128) 26) << 64), 7, 11);
+   if (d.a != 7
+       || d.b != 11
+       || d.c != (0x123456789abcdef0ULL | (((unsigned __int128) 26) << 64)))
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr111039.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr111039.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr111039.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr111039.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,15 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O" } */
+ 
+ int _setjmp ();
+ void abcd ();
+ void abcde ();
+ void compiler_corruption_function(int flags)
+ {
+   int nowait = flags & 1048576, isexpand = flags & 8388608;
+   abcd();
+   _setjmp(flags);
+   if (nowait && isexpand)
+     flags &= 0;
+   abcde();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr111070.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr111070.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr111070.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr111070.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O" } */
+ 
+ /* common */
+ char c;
+ /* arrays must be 8 byte aligned, regardless of size */
+ char c_ary[1];
+ 
+ /* data */
+ char d = 1;
+ char d_ary[1] = {1};
+ 
+ int main ()
+ {
+   if (((unsigned long)&c_ary[0] & 7) != 0)
+     return 1;
+   if (((unsigned long)&d_ary[0] & 7) != 0)
+     return 1;
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr111407.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr111407.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr111407.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr111407.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,21 ----
+ /* PR tree-optimization/111407*/
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+ enum { SEND_TOFILE } __sigsetjmp();
+ void fclose();
+ void foldergets();
+ void sendpart_stats(int *p1, int a1, int b1) {
+  int *a = p1;
+  fclose();
+  p1 = 0;
+  long t = b1;
+  if (__sigsetjmp()) {
+    {
+      long t1 = a1;
+      a1+=1;
+      fclose(a1*(long)t1);
+    }
+  }
+  if (p1)
+    fclose();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr112733.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr112733.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr112733.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr112733.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* PR middle-end/112733 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+ 
+ signed char a, c;
+ short b;
+ 
+ void
+ foo (void)
+ {
+   signed char *e = &a;
+   c = foo != 0;
+   *e &= c;
+   for (; b; --b)
+     *e &= -128;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr112837.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr112837.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr112837.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr112837.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,11 ----
+ /* PR target/112837 */
+ /* { dg-do compile } */
+ /* { dg-options "-fcompare-elim -fprofile" } */
+ /* { dg-additional-options "-fpie" { target pie } } */
+ /* { dg-require-profiling "-fprofile" } */
+ 
+ void
+ foo (int i)
+ {
+   foo (i);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr112845.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr112845.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr112845.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr112845.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,9 ----
+ /* PR target/112845 */
+ /* { dg-do compile { target cet } } */
+ /* { dg-options "-Os -fcf-protection" } */
+ 
+ unsigned long long
+ foo (void)
+ {
+   return 0xfa1e0ff3ULL << 3;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr113013.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr113013.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr113013.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr113013.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,14 ----
+ /* PR tree-optimization/113013 */
+ /* { dg-do compile } */
+ /* { dg-options "-std=gnu99 -O2" } */
+ 
+ struct S { short x; } s;
+ void *foo () __attribute__((__alloc_size__(1)));
+ struct S *p;
+ 
+ __SIZE_TYPE__
+ bar (void)
+ {
+   p = foo (s);
+   return __builtin_dynamic_object_size (p, 0);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr113262.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr113262.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr113262.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr113262.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* PR c/113262 */
+ /* { dg-do compile } */
+ /* { dg-options "" } */
+ 
+ int [[gnu::copy ("")]] a;	/* { dg-error "'copy' attribute argument cannot be a string" } */
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr113907-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr113907-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr113907-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr113907-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,49 ----
+ /* PR middle-end/113907 */
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+ /* { dg-additional-options "-minline-all-stringops" { target i?86-*-* x86_64-*-* } } */
+ 
+ static inline int
+ foo (int len, void *indata, void *outdata)
+ {
+   if (len < 0 || (len & 7) != 0)
+     return 0;
+   if (len != 0 && indata != outdata)
+     __builtin_memcpy (outdata, indata, len);
+   return len;
+ }
+ 
+ static inline int
+ bar (int len, void *indata, void *outdata)
+ {
+   if (len < 0 || (len & 1) != 0)
+     return 0;
+   if (len != 0 && indata != outdata)
+     __builtin_memcpy (outdata, indata, len);
+   return len;
+ }
+ 
+ int (*volatile p1) (int, void *, void *) = foo;
+ int (*volatile p2) (int, void *, void *) = bar;
+ 
+ __attribute__((noipa)) int
+ baz (int len, void *indata, void *outdata)
+ {
+   if ((len & 6) != 0)
+     bar (len, indata, outdata);
+   else
+     foo (len, indata, outdata);
+ }
+ 
+ struct S { char buf[64]; } s __attribute__((aligned (8)));
+ 
+ int
+ main ()
+ {
+   for (int i = 0; i < 64; ++i)
+     s.buf[i] = ' ' + i;
+   p2 (2, s.buf, s.buf + 33);
+   for (int i = 0; i < 64; ++i)
+     if (s.buf[i] != ' ' + ((i >= 33 && i < 35) ? i - 33 : i))
+       __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114115.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114115.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114115.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114115.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,24 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O0 -fprofile-generate -fdump-tree-optimized" } */
+ /* { dg-require-profiling "-fprofile-generate" } */
+ /* { dg-require-ifunc "" } */
+ 
+ void *foo_ifunc2() __attribute__((ifunc("foo_resolver")));
+ 
+ void bar(void)
+ {
+ }
+ 
+ static int f3()
+ {
+   bar ();
+   return 5;
+ }
+ 
+ void (*foo_resolver(void))(void)
+ {
+   f3();
+   return bar;
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "__gcov_indirect_call_profiler_v" "optimized" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114310.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114310.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114310.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114310.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* PR target/114310 */
+ /* { dg-do run { target int128 } } */
+ 
+ volatile __attribute__((aligned (sizeof (__int128_t)))) __int128_t v = 10;
+ 
+ int
+ main ()
+ {
+ #if __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16
+   if (__sync_val_compare_and_swap (&v, (__int128_t) 10, (__int128_t) 0) != 10)
+     __builtin_abort ();
+   if (__sync_val_compare_and_swap (&v, (__int128_t) 10, (__int128_t) 15) != 0)
+     __builtin_abort ();
+   if (__sync_val_compare_and_swap (&v, (__int128_t) 0, (__int128_t) 42) != 0)
+     __builtin_abort ();
+   if (__sync_val_compare_and_swap (&v, (__int128_t) 31, (__int128_t) 35) != 42)
+     __builtin_abort ();
+ #endif
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114493-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114493-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114493-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114493-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,19 ----
+ /* PR c/114493 */
+ /* { dg-do compile { target lto } } */
+ /* { dg-options "-O2 -flto" } */
+ 
+ void foo (void);
+ struct S;
+ struct S bar (struct S **);
+ struct S qux (const struct S **);
+ 
+ struct __attribute__((__may_alias__)) S {
+   int s;
+ };
+ 
+ struct S
+ baz (void)
+ {
+   foo ();
+   return (struct S) {};
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114493-2.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114493-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114493-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114493-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR c/114493 */
+ /* { dg-do compile { target lto } } */
+ /* { dg-options "-O2 -flto -std=c2x" } */
+ 
+ void foo (void);
+ struct S;
+ struct S bar (struct S **);
+ struct S qux (const struct S **);
+ 
+ void
+ corge (void)
+ {
+   struct S { int s; } s;
+   s.s = 0;
+ }
+ 
+ struct __attribute__((__may_alias__)) S {
+   int s;
+ };
+ 
+ struct S
+ baz (void)
+ {
+   foo ();
+   return (struct S) {};
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114753.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114753.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114753.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114753.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,14 ----
+ /* PR middle-end/114753 */
+ /* { dg-do run } */
+ /* { dg-options "-O2 -ftrapv" } */
+ 
+ int
+ main ()
+ {
+   volatile long long i = __LONG_LONG_MAX__;
+   volatile long long j = 2;
+   long long k;
+   if (!__builtin_mul_overflow (i, j, &k) || k != -2LL)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114768.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114768.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114768.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114768.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,10 ----
+ /* PR rtl-optimization/114768 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fdump-rtl-final" } */
+ /* { dg-final { scan-rtl-dump "\\\(mem/v:" "final" } } */
+ 
+ void
+ foo (int *p)
+ {
+   *p = *(volatile int *) p;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114876.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114876.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114876.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114876.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,34 ----
+ /* PR tree-optimization/114876 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fdump-tree-optimized" } */
+ /* { dg-final { scan-tree-dump-not "return \[01\];" "optimized" } } */
+ /* { dg-final { scan-tree-dump "return 3;" "optimized" } } */
+ /* { dg-final { scan-tree-dump "return 4;" "optimized" } } */
+ 
+ int
+ foo (void)
+ {
+   char buf[64];
+   return __builtin_sprintf (buf, "%lc%lc%lc", (__WINT_TYPE__) 0, (__WINT_TYPE__) 0, (__WINT_TYPE__) 0);
+ }
+ 
+ int
+ bar (void)
+ {
+   char buf[64];
+   return __builtin_sprintf (buf, "%c%c%c", 0, 0, 0);
+ }
+ 
+ int
+ baz (void)
+ {
+   char buf[64];
+   return __builtin_sprintf (buf, "%lc%lc%lca", (__WINT_TYPE__) 0, (__WINT_TYPE__) 0, (__WINT_TYPE__) 0);
+ }
+ 
+ int
+ qux (void)
+ {
+   char buf[64];
+   return __builtin_sprintf (buf, "%c%c%ca", 0, 0, 0);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr114902.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr114902.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr114902.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr114902.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ /* PR rtl-optimization/114902 */
+ /* { dg-do run } */
+ /* { dg-options "-O1 -fno-tree-fre -fno-tree-forwprop -fno-tree-ccp -fno-tree-dominator-opts" } */
+ 
+ __attribute__((noipa))
+ int foo (int x)
+ {
+   int a = ~x;
+   int t = a & 1;
+   int e = -t;
+   int b = e >= -1;
+   if (b)
+     return 0;
+   __builtin_trap ();
+ }
+ 
+ int
+ main ()
+ {
+   foo (-1);
+   foo (0);
+   foo (1);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr115092.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr115092.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr115092.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr115092.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* PR rtl-optimization/115092 */
+ /* { dg-do run } */
+ /* { dg-options "-O1 -fgcse -ftree-pre -fno-tree-dominator-opts -fno-tree-fre -fno-guess-branch-probability" } */
+ 
+ int a, b, c = 1, d, e;
+ 
+ int
+ main ()
+ {
+   int f, g = a;
+   b = -2;
+   f = -(1 >> ((c && b) & ~a));
+   if (f <= b)
+     d = g / e;
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/pr83415.c gcc-12.4.0/gcc/testsuite/gcc.dg/pr83415.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/pr83415.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/pr83415.c	Thu Jun 20 08:08:08 2024
*************** int
*** 7,12 ****
  main (int argc, short *argv[])
  {
    int i = argc;
!   y[i] = 7 - i; /* { dg-warning "read-only" } */
    return 0;
  }
--- 7,12 ----
  main (int argc, short *argv[])
  {
    int i = argc;
!   y[i] = 7 - i; /* { dg-error "read-only" } */
    return 0;
  }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c gcc-12.4.0/gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,57 ----
+ /* { dg-do compile { target aarch64*-*-* } } */
+ /* { dg-require-effective-target lp64 } */
+ /* { dg-options "-O -fdisable-rtl-postreload -fpeephole2 -fno-schedule-fusion" } */
+ 
+ extern int data[];
+ 
+ void __RTL (startwith ("ira")) foo (void *ptr)
+ {
+   (function "foo"
+     (param "ptr"
+       (DECL_RTL (reg/v:DI <0> [ ptr ]))
+       (DECL_RTL_INCOMING (reg/v:DI x0 [ ptr ]))
+     ) ;; param "ptr"
+     (insn-chain
+       (block 2
+ 	(edge-from entry (flags "FALLTHRU"))
+ 	(cnote 3 [bb 2] NOTE_INSN_BASIC_BLOCK)
+ 	(insn 4 (set (reg:DI <0>) (reg:DI x0)))
+ 	(insn 5 (set (reg:DI <1>)
+ 		     (plus:DI (reg:DI <0>) (const_int 768))))
+ 	(insn 6 (set (mem:SI (plus:DI (reg:DI <0>)
+ 				      (const_int 508)) [1 &data+508 S4 A4])
+ 		     (const_int 0)))
+ 	(insn 7 (set (mem:SI (plus:DI (reg:DI <1>)
+ 				      (const_int -256)) [1 &data+512 S4 A4])
+ 		     (const_int 0)))
+ 	(edge-to exit (flags "FALLTHRU"))
+       ) ;; block 2
+     ) ;; insn-chain
+   ) ;; function
+ }
+ 
+ void __RTL (startwith ("ira")) bar (void *ptr)
+ {
+   (function "bar"
+     (param "ptr"
+       (DECL_RTL (reg/v:DI <0> [ ptr ]))
+       (DECL_RTL_INCOMING (reg/v:DI x0 [ ptr ]))
+     ) ;; param "ptr"
+     (insn-chain
+       (block 2
+ 	(edge-from entry (flags "FALLTHRU"))
+ 	(cnote 3 [bb 2] NOTE_INSN_BASIC_BLOCK)
+ 	(insn 4 (set (reg:DI <0>) (reg:DI x0)))
+ 	(insn 5 (set (reg:DI <1>)
+ 		     (plus:DI (reg:DI <0>) (const_int 768))))
+ 	(insn 6 (set (mem:SI (plus:DI (reg:DI <1>)
+ 				      (const_int -256)) [1 &data+512 S4 A4])
+ 		     (const_int 0)))
+ 	(insn 7 (set (mem:SI (plus:DI (reg:DI <0>)
+ 				      (const_int 508)) [1 &data+508 S4 A4])
+ 		     (const_int 0)))
+ 	(edge-to exit (flags "FALLTHRU"))
+       ) ;; block 2
+     ) ;; insn-chain
+   ) ;; function
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/ssp-2.c gcc-12.4.0/gcc/testsuite/gcc.dg/ssp-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/ssp-2.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/ssp-2.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
--- 1,7 ----
  /* { dg-do run { target native } } */
  /* { dg-options "-fstack-protector" } */
  /* { dg-options "-fstack-protector -Wl,-multiply_defined,suppress" { target *-*-darwin* } } */
+ /* { dg-prune-output "-multiply_defined is obsolete" } */
  /* { dg-require-effective-target fstack_protector } */
  
  #include 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/tls/pr78796.c gcc-12.4.0/gcc/testsuite/gcc.dg/tls/pr78796.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/tls/pr78796.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/tls/pr78796.c	Thu Jun 20 08:08:08 2024
***************
*** 1,7 ****
  /* PR target/78796 */
  /* { dg-do run } */
  /* { dg-options "-O2" } */
! /* { dg-additional-options "-mcmodel=large" { target aarch64-*-* } } */
  /* { dg-require-effective-target tls_runtime } */
  /* { dg-add-options tls } */
  
--- 1,7 ----
  /* PR target/78796 */
  /* { dg-do run } */
  /* { dg-options "-O2" } */
! /* { dg-additional-options "-mcmodel=large -fno-pie -no-pie" { target aarch64-*-* } } */
  /* { dg-require-effective-target tls_runtime } */
  /* { dg-add-options tls } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110176.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110176.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110176.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110176.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,46 ----
+ /* { dg-do run } */
+ 
+ int f(_Bool t)
+ {
+         int tt = t;
+         unsigned x = -1;
+         int xx = x;
+         return xx <= tt;
+ }
+ 
+ int a, b;
+ void c() {}
+ __attribute__((noipa))
+ void h() {__builtin_abort();}
+ int d() {
+   unsigned f[1];
+   int i;
+   if (a)
+     goto h;
+   f[0] = -1;
+   while (1) {
+     c();
+     for (; a < 1; a++) {
+       if (0) {
+       j:
+         continue;
+       }
+       i = f[0];
+       if (a)
+         break;
+       b = i >= (b == 0);
+     }
+     if (!b) {
+       if (0) {
+       h:
+         goto j;
+       }
+       return 0;
+     }
+     h();
+   }
+ }
+ int main() {
+   d();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110298.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110298.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110298.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110298.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ 
+ int a, b, c, d, e;
+ int f() {
+   c = 0;
+   for (; c >= 0; c--) {
+     d = 0;
+     for (; d <= 0; d++) {
+       e = 0;
+       for (; d + c + e >= 0; e--)
+         ;
+       a = 1;
+       b = 0;
+       for (; a; ++b)
+         a *= 2;
+       for (; b + d >= 0;)
+         return 0;
+     }
+   }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110422.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110422.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110422.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110422.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ 
+ struct T { int x; };
+ int foo(void) {
+   struct T v;
+   asm goto("" : "+r"(v.x) : : : lab);
+   return 0;
+ lab:
+   return -5;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110556.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110556.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110556.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110556.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,42 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target lp64 } */
+ /* { dg-additional-options "-fno-tree-fre -fno-delete-dead-exceptions -fnon-call-exceptions" } */
+ 
+ typedef __INT32_TYPE__ int32_t;
+ typedef __INT64_TYPE__ int64_t;
+ 
+ static int64_t __attribute__((noinline,noclone))
+ safe_mul_func_int64_t_s_s(int64_t si1, int64_t si2)
+ {
+   return ((((si1 > 0) && (si2 > 0) && (si1 > ( (9223372036854775807L) / si2)))
+            || ((si1 > 0) && (si2 <= 0) && (si2 < ( (-9223372036854775807L -1) / si1)))
+            || ((si1 <= 0) && (si2 > 0) && (si1 < ( (-9223372036854775807L -1) / si2)))
+            || ((si1 <= 0) && (si2 <= 0) && (si1 != 0) && (si2 < ( (9223372036854775807L) / si1))))
+           ? ((si1)) : si1 * si2);
+ }
+ 
+ static int32_t g_93 = 0x947A4BBFL;
+ static int32_t tt = 6;
+ int64_t ty, ty1;
+ 
+ static void func_34(void)
+ {
+  ty=safe_mul_func_int64_t_s_s (g_93, -1L) ;
+ }
+ static void func_30(void)
+ {
+   ty1=safe_mul_func_int64_t_s_s(0, tt);
+ }
+ static void func_6(void)
+ {
+  for (int g_9 = 5; (g_9 >= 0); g_9 -= 1)
+  {
+   func_34();
+   func_30 ();
+  }
+ }
+ 
+ int main ()
+ {
+  func_6();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110702.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110702.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr110702.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr110702.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,31 ----
+ /* { dg-do run } */
+ 
+ void abort (void);
+ 
+ int a, b, c, d;
+ long e[9][7][4];
+ 
+ void f()
+ {
+   for (; a >= 0; a--)
+     {
+       b = 0;
+       for (; b <= 3; b++)
+ 	{
+ 	  c = 0;
+ 	  for (; c <= 3; c++)
+ 	    {
+ 	      int *g = &d;
+ 	      *g = e[0][0][b] | e[a][b][a];
+ 	    }
+ 	}
+     }
+ }
+ 
+ int main()
+ {
+   f();
+   if (a != -1)
+     abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111137.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111137.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111137.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111137.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,30 ----
+ /* { dg-do run } */
+ 
+ int b[3][8];
+ short d;
+ volatile int t = 1;
+ 
+ void __attribute__((noipa))
+ foo()
+ {
+   int  g = t;
+   for (int e = 1; e >= 0; e--)
+     {
+       d = 1;
+       for (; d >= 0; d--)
+ 	{
+ 	  b[0][d * 2 + 1] = 0;
+ 	  b[g - 1 + d][0] ^= 1;
+ 	  b[0][d * 2 + 2] = 0;
+ 	  b[g - 1 + d][1] ^= 1;
+ 	}
+     }
+ }
+ 
+ int
+ main()
+ {
+   foo ();
+   if (b[0][1] != 1)
+     __builtin_abort();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111445.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111445.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111445.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111445.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,29 ----
+ /* { dg-do run } */
+ 
+ extern void abort (void);
+ short a, b;
+ unsigned char c = 255;
+ unsigned cnt;
+ void __attribute__((noipa))
+ check (int x)
+ {
+   if (x != 0)
+     abort ();
+   cnt++;
+ }
+ int main()
+ {
+   int d;
+   unsigned char e;
+   d = 0;
+   for (; a >= 0; a--) {
+     int *f = &d;
+     *f = c;
+   }
+   e = 0;
+   for (; (unsigned char)(d - 255) + e <= 1; e++)
+     check (b);
+   if (cnt != 2)
+     abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111614.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111614.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111614.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111614.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ /* { dg-do compile } */
+ 
+ int a, b, c, d, e;
+ static void f() {
+   int *g = &b;
+   b = 1;
+   for (; b >= 0; b--) {
+     c = 0;
+     for (; c <= 1; c++)
+       e = 0;
+     for (; e <= 1; e++) {
+       int h, i = h = 13;
+       for (; h; h--)
+         i = i << a;
+       d &= i + c + 9 + *g;
+     }
+   }
+ }
+ int main() {
+   f();
+   for (;;)
+     ;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111815.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111815.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111815.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111815.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,26 ----
+ /* { dg-do run } */
+ 
+ char x[] = {
+    0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15,
+   16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
+ };
+ 
+ __attribute__ ((noinline)) char *
+ p (char *a, int o, int i)
+ {
+   return a + ++o + (1 << ++i);
+ }
+ 
+ int
+ main (void)
+ {
+   if (*p (x, 0, 0) != 3)
+     return 1;
+   if (*p (x, 1, 2) != 10)
+     return 1;
+   if (*p (x, 2, 1) != 7)
+     return 1;
+   if (*p (x, 3, 3) != 20)
+     return 1;
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111818.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111818.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111818.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111818.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile } */
+ 
+ static void foo(const volatile unsigned int x, void *p)
+ {
+   __builtin_memcpy(p, (void *)&x, sizeof x);
+ }
+ 
+ void bar(void *number)
+ {
+   foo(0, number);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111917.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111917.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr111917.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr111917.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-funswitch-loops" } */
+ 
+ long t;
+ long a() {
+   long b = t, c = t;
+   for (; b < 31; b++)
+     c <<= 1;
+   return c;
+ }
+ long t1;
+ static
+ int d() {
+   if (!t1)
+     return 0;
+ e:
+ f:
+   for (; a();)
+     ;
+   goto f;
+   return 0;
+ }
+ int main() { d(); }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr112281-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr112281-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr112281-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr112281-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-do run } */
+ /* { dg-additional-options "-ftree-loop-distribution" } */
+ 
+ struct {
+   int : 8;
+   int a;
+ } b, d[4] = {{0}, {0}, {0}, {5}};
+ int c, e;
+ int main() {
+   for (c = 2; c; c--)
+     for (e = 0; e < 2; e++) {
+       d[c] = b = d[c + 1];
+       d[c + 1].a = 0;
+     }
+   if (b.a != 0)
+     __builtin_abort();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr112281-2.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr112281-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr112281-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr112281-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-do run } */
+ /* { dg-additional-options "-ftree-loop-distribution" } */
+ 
+ struct {
+   int : 8;
+   int a;
+ } b, d[4] = {{5}, {0}, {0}, {0}};
+ int c, e;
+ int main() {
+   for (c = 0; c < 2; c++)
+     for (e = 0; e < 2; e++) {
+       d[c + 1] = b = d[c];
+       d[c].a = 0;
+     }
+   if (b.a != 0)
+     __builtin_abort();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr114672.c gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr114672.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/torture/pr114672.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/torture/pr114672.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ 
+ struct {
+   __INT64_TYPE__ m : 60;
+ } s;
+ 
+ short a;
+ short b;
+ 
+ void
+ foo ()
+ {
+   s.m += a * b;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-1.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-1.c	Thu Jun 20 08:08:08 2024
*************** void test_sprintf_chk_c_const (void)
*** 200,210 ****
    T (3, "%c%c", '1', '2');
  
    /* Wide characters.  */
!   T (0, "%lc",     (wint_t)0);   /* { dg-warning "nul past the end" } */
!   T (1, "%lc",     (wint_t)0);
!   T (1, "%lc%lc",  (wint_t)0, (wint_t)0);
    T (2, "%lc",     (wint_t)0);
!   T (2, "%lc%lc",  (wint_t)0, (wint_t)0);
  
    /* The following could result in as few as no bytes and in as many as
       MB_CUR_MAX, but since the MB_CUR_MAX value is a runtime property
--- 200,210 ----
    T (3, "%c%c", '1', '2');
  
    /* Wide characters.  */
!   T (0, "%lc",     (wint_t)0);   /* { dg-warning ".%lc. directive writing up to 1 bytes into a region of size 0" } */
!   T (1, "%lc",     (wint_t)0);   /* { dg-warning "nul past the end" } */
!   T (1, "%lc%lc",  (wint_t)0, (wint_t)0);   /* { dg-warning ".%lc. directive writing up to 1 bytes into a region of size between 0 and 1" } */
    T (2, "%lc",     (wint_t)0);
!   T (2, "%lc%lc",  (wint_t)0, (wint_t)0);   /* { dg-warning "nul past the end" } */
  
    /* The following could result in as few as no bytes and in as many as
       MB_CUR_MAX, but since the MB_CUR_MAX value is a runtime property
*************** void test_snprintf_c_const (char *d)
*** 1550,1556 ****
  
    /* Wide characters.  */
    T (0, "%lc",  (wint_t)0);
!   T (1, "%lc",  (wint_t)0);
    T (2, "%lc",  (wint_t)0);
  
    /* The following could result in as few as a single byte and in as many
--- 1550,1556 ----
  
    /* Wide characters.  */
    T (0, "%lc",  (wint_t)0);
!   T (1, "%lc",  (wint_t)0);      /* { dg-warning "output may be truncated before the last format character" } */
    T (2, "%lc",  (wint_t)0);
  
    /* The following could result in as few as a single byte and in as many
*************** void test_snprintf_chk_c_const (void)
*** 1603,1609 ****
  
    /* Wide characters.  */
    T (0, "%lc",  (wint_t)0);
!   T (1, "%lc",  (wint_t)0);
    T (2, "%lc",  (wint_t)0);
  
    /* The following could result in as few as a single byte and in as many
--- 1603,1609 ----
  
    /* Wide characters.  */
    T (0, "%lc",  (wint_t)0);
!   T (1, "%lc",  (wint_t)0);      /* { dg-warning "output may be truncated before the last format character" } */
    T (2, "%lc",  (wint_t)0);
  
    /* The following could result in as few as a single byte and in as many
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/tree-ssa/pr111967.c gcc-12.4.0/gcc/testsuite/gcc.dg/tree-ssa/pr111967.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/tree-ssa/pr111967.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/tree-ssa/pr111967.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,15 ----
+ /* PR tree-optimization/111967 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fno-tree-forwprop -fdump-tree-evrp-all" } */
+ 
+ void bar (char *);
+ int a;
+ char *b;
+ 
+ void
+ foo (void)
+ {
+   long c = a & 3;
+   if (c)
+     bar (b + c);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/tsan/pr111736.c gcc-12.4.0/gcc/testsuite/gcc.dg/tsan/pr111736.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/tsan/pr111736.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/tsan/pr111736.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* PR sanitizer/111736 */
+ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+ /* { dg-options "-fsanitize=thread -fdump-tree-optimized -ffat-lto-objects" } */
+ /* { dg-final { scan-tree-dump-not "__tsan_read" "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "__tsan_write" "optimized" } } */
+ 
+ #ifdef __x86_64__
+ #define SEG __seg_fs
+ #else
+ #define SEG __seg_gs
+ #endif
+ 
+ void
+ foo (int SEG *p, int SEG *q)
+ {
+   *q = *p;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/ubsan/pr111736.c gcc-12.4.0/gcc/testsuite/gcc.dg/ubsan/pr111736.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/ubsan/pr111736.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/ubsan/pr111736.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ /* PR sanitizer/111736 */
+ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+ /* { dg-options "-fsanitize=null,alignment -fdump-tree-optimized -ffat-lto-objects" } */
+ /* { dg-final { scan-tree-dump-times "__ubsan_handle_type_mismatch" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "p_\[0-9]*.D. \[=!]= 0" "optimized" } } */
+ 
+ #ifdef __x86_64__
+ #define SEG __seg_fs
+ #else
+ #define SEG __seg_gs
+ #endif
+ 
+ int
+ foo (int SEG *p, int *q)
+ {
+   return *p;
+ }
+ 
+ __attribute__((no_sanitize("alignment"))) int
+ bar (int SEG *p, int *q)
+ {
+   return *p;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/uninit-pr40635.c gcc-12.4.0/gcc/testsuite/gcc.dg/uninit-pr40635.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/uninit-pr40635.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/uninit-pr40635.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,33 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O -Wuninitialized" } */
+ 
+ struct hostent {
+     char **h_addr_list;
+ };
+ struct hostent *gethostbyname(const char*);
+ int socket(void);
+ int close(int);
+ int connect(int, const char*);
+ 
+ int get_tcp_socket(const char *machine)
+ {
+   struct hostent *hp;
+   int s42, x;
+   char **addr;
+ 
+   hp = gethostbyname(machine);
+   x = 0;
+   for (addr = hp->h_addr_list; *addr; addr++)
+     {
+       s42 = socket();
+       if (s42 < 0)
+ 	return -1;
+       x = connect(s42, *addr);
+       if (x == 0)
+ 	break;
+       close(s42);
+     }
+   if (x < 0)
+     return -1;
+   return s42;  /* { dg-warning "uninitialized" } */
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr108950.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr108950.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr108950.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr108950.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
- /* { dg-require-effective-target vect_simd_clones } */
  /* { dg-do compile } */
  
  int m;
  short int n;
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-require-effective-target vect_simd_clones } */
  
  int m;
  short int n;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr110381.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr110381.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr110381.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr110381.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,44 ----
+ /* { dg-require-effective-target vect_float_strict } */
+ 
+ #include "tree-vect.h"
+ 
+ struct FOO {
+    double a;
+    double b;
+    double c;
+ };
+ 
+ double __attribute__((noipa))
+ sum_8_foos(const struct FOO* foos)
+ {
+   double sum = 0;
+ 
+   for (int i = 0; i < 8; ++i)
+     {
+       struct FOO foo = foos[i];
+ 
+       /* Need to use an in-order reduction here, preserving
+          the load permutation.  */
+       sum += foo.a;
+       sum += foo.c;
+       sum += foo.b;
+     }
+ 
+   return sum;
+ }
+ 
+ int main()
+ {
+   struct FOO foos[8];
+ 
+   check_vect ();
+ 
+   __builtin_memset (foos, 0, sizeof (foos));
+   foos[0].a = __DBL_MAX__;
+   foos[0].b = 5;
+   foos[0].c = -__DBL_MAX__;
+ 
+   if (sum_8_foos (foos) != 5)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr111764.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr111764.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr111764.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr111764.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ #include "tree-vect.h"
+ 
+ short b = 2;
+ 
+ int main()
+ {
+   check_vect ();
+ 
+   for (int a = 1; a <= 9; a++)
+     b = b * b;
+   if (b != 0)
+     __builtin_abort ();
+ 
+   return 0;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr112505.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr112505.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr112505.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr112505.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-O3" } */
+ 
+ short int w9;
+ struct T {
+   short a : 14;
+   int b;
+ };
+ struct T v;
+ void zc()
+ {
+   for(int i = 0; i < 4; i ++)
+     w9 *= v.b ? v.a-- < 0 : 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-1.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ #include "tree-vect.h"
+ 
+ unsigned char a;
+ 
+ int main() {
+   check_vect ();
+ 
+   short b = a = 0;
+   for (; a != 19; a++)
+     if (a)
+       b = 32872 >> a;
+ 
+   if (b == 0)
+     return 0;
+   else
+     return 1;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-2.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,50 ----
+ /* { dg-do compile } */
+ 
+ #define N 128
+ 
+ short x[N];
+ short y[N];
+ 
+ void
+ f1 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= y[i];
+ }
+ 
+ void
+ f2 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] < 32 ? y[i] : 32);
+ }
+ 
+ void
+ f3 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] < 31 ? y[i] : 31);
+ }
+ 
+ void
+ f4 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] & 31);
+ }
+ 
+ void
+ f5 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= 0x8000 >> y[i];
+ }
+ 
+ void
+ f6 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= 0x8000 >> (y[i] & 31);
+ }
+ 
+ /* { dg-final { scan-tree-dump-not {can narrow[^\n]+>>} "vect" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-3.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-3.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,39 ----
+ /* { dg-do compile } */
+ 
+ #define N 128
+ 
+ short x[N];
+ short y[N];
+ 
+ void
+ f1 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] < 30 ? y[i] : 30);
+ }
+ 
+ void
+ f2 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= ((y[i] & 15) + 2);
+ }
+ 
+ void
+ f3 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] < 16 ? y[i] : 16);
+ }
+ 
+ void
+ f4 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] = 32768 >> ((y[i] & 15) + 3);
+ }
+ 
+ /* { dg-final { scan-tree-dump {can narrow to signed:31 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {can narrow to signed:18 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {can narrow to signed:17 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {can narrow to unsigned:19 without loss [^\n]+>>} "vect" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-4.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-4.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-4.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-4.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,55 ----
+ /* { dg-do compile } */
+ 
+ #define N 128
+ 
+ short x[N];
+ short y[N];
+ 
+ void
+ f1 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] & 15);
+ }
+ 
+ void
+ f2 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= ((y[i] & 7) + 8);
+ }
+ 
+ void
+ f3 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= ((y[i] & 7) ^ 11);
+ }
+ 
+ void
+ f4 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] < 15 ? y[i] : 15);
+ }
+ 
+ void
+ f5 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] >>= (y[i] < 15 ? y[i] : 1);
+ }
+ 
+ void
+ f6 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     x[i] = 32768 >> (y[i] & 15);
+ }
+ 
+ /* { dg-final { scan-tree-dump {:11:[^\n]+can narrow to signed:16 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {:18:[^\n]+can narrow to signed:16 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {:25:[^\n]+can narrow to signed:16 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {:32:[^\n]+can narrow to signed:16 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {:39:[^\n]+can narrow to signed:16 without loss [^\n]+>>} "vect" } } */
+ /* { dg-final { scan-tree-dump {can narrow to unsigned:16 without loss [^\n]+>>} "vect" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-5.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-5.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr113281-5.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr113281-5.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,66 ----
+ /* { dg-do compile } */
+ 
+ #define N 128
+ 
+ short x[N];
+ short y[N];
+ 
+ void
+ f1 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     {
+       int a = y[i];
+       int b = ~a;
+       x[i] = b;
+     }
+ }
+ 
+ void
+ f2 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     {
+       int a = y[i];
+       int b = -a;
+       x[i] = b;
+     }
+ }
+ 
+ void
+ f3 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     {
+       int a = x[i];
+       int b = a / y[i];
+       x[i] = b;
+     }
+ }
+ 
+ void
+ f4 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     {
+       int a = x[i];
+       int b = a < y[i] ? a : y[i];
+       x[i] = b;
+     }
+ }
+ 
+ void
+ f5 (void)
+ {
+   for (int i = 0; i < N; ++i)
+     {
+       int a = x[i];
+       int b = a > y[i] ? a : y[i];
+       x[i] = b;
+     }
+ }
+ 
+ /* { dg-final { scan-tree-dump {can narrow to signed:17 without loss [^\n]+= -} "vect" } } */
+ /* { dg-final { scan-tree-dump {can narrow to signed:16 without loss [^\n]+= ~} "vect" } } */
+ /* { dg-final { scan-tree-dump {can narrow to signed:16 without loss [^\n]+ MIN_EXPR} "vect" } } */
+ /* { dg-final { scan-tree-dump {can narrow to signed:16 without loss [^\n]+ MAX_EXPR} "vect" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr114027.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr114027.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr114027.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr114027.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,26 ----
+ #include "tree-vect.h"
+ 
+ int __attribute__((noipa))
+ foo (int *f, int n)
+ {
+   int res = 0;
+   for (int i = 0; i < n; ++i)
+     {
+       if (f[2*i])
+         res = 2;
+       if (f[2*i+1])
+         res = -2;
+     }
+   return res;
+ }
+ 
+ int f[] = { 1, 1, 1, 1, 1, 1, 1, 1,
+             1, 1, 1, 1, 1, 1, 1, 0 };
+ 
+ int
+ main ()
+ {
+   if (foo (f, 8) != 2)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr114231.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr114231.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr114231.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr114231.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ 
+ void f(long*);
+ int ff[2];
+ void f2(long, long, unsigned long);
+ void k(unsigned long x, unsigned long y)
+ {
+   long t = x >> ff[0];
+   long t1 = ff[1];
+   unsigned long t2 = y >> ff[0];
+   f2(t1, t+t2, t2);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr115192.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr115192.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr115192.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr115192.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,28 ----
+ #include "tree-vect.h"
+ 
+ int data[4 * 16 * 16] __attribute__((aligned(16)));
+ 
+ __attribute__((noipa)) void
+ foo (__SIZE_TYPE__ n)
+ {
+   for (__SIZE_TYPE__ i = 1; i < n; ++i)
+     {
+       data[i * n * 4] = data[(i - 1) * n * 4] + 1;
+       data[i * n * 4 + 1] = data[(i - 1) * n * 4 + 1] + 2;
+     }
+ }
+ 
+ int
+ main ()
+ {
+   check_vect ();
+ 
+   data[0] = 10;
+   data[1] = 20;
+ 
+   foo (3);
+ 
+   if (data[24] != 12 || data[25] != 24)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr97428.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr97428.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/pr97428.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/pr97428.c	Thu Jun 20 08:08:08 2024
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-require-effective-target vect_double } */
  
  typedef struct { double re, im; } dcmlx_t;
  typedef struct { double re[4], im[4]; } dcmlx4_t;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.dg/vect/vect-pr114375.c gcc-12.4.0/gcc/testsuite/gcc.dg/vect/vect-pr114375.c
*** gcc-12.3.0/gcc/testsuite/gcc.dg/vect/vect-pr114375.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.dg/vect/vect-pr114375.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,44 ----
+ /* { dg-additional-options "-mavx2" { target avx2_runtime } } */
+ 
+ #include "tree-vect.h"
+ 
+ int a[512];
+ int b[512];
+ int c[512];
+ 
+ void __attribute__((noipa))
+ foo(int * __restrict p)
+ {
+   for (int i = 0; i < 64; ++i)
+     {
+       int tem = 2, tem2 = 2;
+       if (a[4*i + 1])
+         tem = p[4*i];
+       if (a[4*i])
+         tem2 = p[4*i + 2];
+       b[2*i] = tem2;
+       b[2*i+1] = tem;
+       if (a[4*i + 2])
+         tem = p[4*i + 1];
+       if (a[4*i + 3])
+         tem2 = p[4*i + 3];
+       c[2*i] = tem2;
+       c[2*i+1] = tem;
+     }
+ }
+ int main()
+ {
+   check_vect ();
+ 
+   for (int i = 0; i < 512; ++i)
+     a[i] = (i >> 1) & 1;
+ 
+   foo (a);
+ 
+   if (c[0] != 1 || c[1] != 0 || c[2] != 1 || c[3] != 0
+       || b[0] != 2 || b[1] != 2 || b[2] != 2 || b[3] != 2)
+     abort ();
+ 
+   return 0;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.misc-tests/gcov-14.c gcc-12.4.0/gcc/testsuite/gcc.misc-tests/gcov-14.c
*** gcc-12.3.0/gcc/testsuite/gcc.misc-tests/gcov-14.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.misc-tests/gcov-14.c	Thu Jun 20 08:08:08 2024
***************
*** 3,9 ****
  /* { dg-do run { target native } } */
  /* { dg-options "-O2 -fprofile-arcs -ftest-coverage -fgnu89-inline" } */
  /* The following line arranges that Darwin has behavior like elf weak import.  */
! /* { dg-additional-options "-flat_namespace -undefined suppress" { target *-*-darwin* }  } */
  /* { dg-require-weak "" } */
  /* { dg-skip-if "undefined weak not supported" { { hppa*-*-hpux* } && { ! lp64 } } } */
  /* { dg-skip-if "undefined weak not supported" { powerpc-ibm-aix* } } */
--- 3,9 ----
  /* { dg-do run { target native } } */
  /* { dg-options "-O2 -fprofile-arcs -ftest-coverage -fgnu89-inline" } */
  /* The following line arranges that Darwin has behavior like elf weak import.  */
! /* { dg-additional-options "-Wl,-U,_Foo" { target *-*-darwin* }  } */
  /* { dg-require-weak "" } */
  /* { dg-skip-if "undefined weak not supported" { { hppa*-*-hpux* } && { ! lp64 } } } */
  /* { dg-skip-if "undefined weak not supported" { powerpc-ibm-aix* } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.misc-tests/gcov-24.c gcc-12.4.0/gcc/testsuite/gcc.misc-tests/gcov-24.c
*** gcc-12.3.0/gcc/testsuite/gcc.misc-tests/gcov-24.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.misc-tests/gcov-24.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,30 ----
+ /* { dg-options "-fprofile-arcs -ftest-coverage" } */
+ /* { dg-do run { target native } } */
+ 
+ int main()
+ {
+   int a = 1;
+   int b = 2;
+   int c = -3;
+   switch(a) /* count(1) */
+     {
+     case 1: /* count(1) */
+     c = 3;
+     switch(b) { /* count(1) */
+       case 1: /* count(#####) */
+       c = 4;
+       break;
+       case 2: /* count(1) */
+       c = 5;
+       break;
+     }
+     break;
+     case 2: /* count(#####) */
+     c = 6;
+     break;
+     default: /* count(#####) */
+     break;
+     }
+ }
+ 
+ /* { dg-final { run-gcov gcov-24.c } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp	Thu Jun 20 08:08:08 2024
*************** if { ![istarget aarch64*-*-*] } then {
*** 27,33 ****
  
  torture-init
  set-torture-options $C_TORTURE_OPTIONS
! set additional_flags "-W -Wall -Wno-abi"
  
  # Test parameter passing.  This uses abitest.S which relies on weak
  # symbols.
--- 27,33 ----
  
  torture-init
  set-torture-options $C_TORTURE_OPTIONS
! set additional_flags "-W -Wall -Wno-abi -fno-pie -no-pie"
  
  # Test parameter passing.  This uses abitest.S which relies on weak
  # symbols.
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/acle/ls64_lto.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/acle/ls64_lto.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/acle/ls64_lto.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/acle/ls64_lto.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do link { target aarch64_asm_ls64_ok } } */
+ /* { dg-additional-options "-march=armv8.7-a+ls64 -flto" } */
+ #include 
+ int main(void)
+ {
+   data512_t d = __arm_ld64b ((const void *)0x1000);
+   __arm_st64b ((void *)0x2000, d);
+   uint64_t x = __arm_st64bv ((void *)0x3000, d);
+   x += __arm_st64bv0 ((void *)0x4000, d);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,7 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=armv8.7-a+ls64 -O2" } */
+ #include 
+ void do_st64b(data512_t data) {
+   __arm_st64b((void*)0x10000000, data);
+ }
+ /* { dg-final { scan-assembler {mov\tx([123])?[0-9], 268435456} } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/acle/pr110132.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/acle/pr110132.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/acle/pr110132.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/acle/pr110132.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,15 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-march=armv8.7-a+ls64" } */
+ 
+ /* Check that ls64 builtins can be invoked using a preprocesed testcase
+    without triggering bogus builtin warnings, see PR110132.
+ 
+    Note that this is purely to test GCC internals and user code should
+    include arm_acle.h to make use of these builtins.  */
+ 
+ #pragma GCC aarch64 "arm_acle.h"
+ typedef __arm_data512_t data512_t;
+ void f(void *p, data512_t d)
+ {
+   __arm_st64b (p, d);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/auto-init-7.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/auto-init-7.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/auto-init-7.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/auto-init-7.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* Verify zero initialization for array, union, and structure type automatic variables.  */
  /* { dg-do compile } */
! /* { dg-options "-ftrivial-auto-var-init=zero -fdump-rtl-expand" } */
  
  struct S
  {
--- 1,6 ----
  /* Verify zero initialization for array, union, and structure type automatic variables.  */
  /* { dg-do compile } */
! /* { dg-options "-ftrivial-auto-var-init=zero -fdump-rtl-expand -fno-stack-protector" } */
  
  struct S
  {
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* { dg-do compile } */
  /* { dg-require-effective-target aarch64_small } */
! /* { dg-options "-O3 -mcpu=cortex-a57" } */
  
  enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
                   XGRF_REGS, ALL_REGS, LIM_REG_CLASSES };
--- 1,6 ----
  /* { dg-do compile } */
  /* { dg-require-effective-target aarch64_small } */
! /* { dg-options "-O3 -mcpu=cortex-a57 -fno-pie" } */
  
  enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
                   XGRF_REGS, ALL_REGS, LIM_REG_CLASSES };
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/mops_4.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/mops_4.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/mops_4.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/mops_4.c	Thu Jun 20 08:08:08 2024
*************** copy3 (int *x, int *y, long z, long *res
*** 51,56 ****
--- 51,104 ----
  }
  
  /*
+ ** move1:
+ **	mov	(x[0-9]+), x0
+ **	cpyp	\[\1\]!, \[x1\]!, x2!
+ **	cpym	\[\1\]!, \[x1\]!, x2!
+ **	cpye	\[\1\]!, \[x1\]!, x2!
+ **	str	x0, \[x3\]
+ **	ret
+ */
+ void
+ move1 (int *x, int *y, long z, int **res)
+ {
+   __builtin_memmove (x, y, z);
+   *res = x;
+ }
+ 
+ /*
+ ** move2:
+ **	mov	(x[0-9]+), x1
+ **	cpyp	\[x0\]!, \[\1\]!, x2!
+ **	cpym	\[x0\]!, \[\1\]!, x2!
+ **	cpye	\[x0\]!, \[\1\]!, x2!
+ **	str	x1, \[x3\]
+ **	ret
+ */
+ void
+ move2 (int *x, int *y, long z, int **res)
+ {
+   __builtin_memmove (x, y, z);
+   *res = y;
+ }
+ 
+ /*
+ ** move3:
+ **	mov	(x[0-9]+), x2
+ **	cpyp	\[x0\]!, \[x1\]!, \1!
+ **	cpym	\[x0\]!, \[x1\]!, \1!
+ **	cpye	\[x0\]!, \[x1\]!, \1!
+ **	str	x2, \[x3\]
+ **	ret
+ */
+ void
+ move3 (int *x, int *y, long z, long *res)
+ {
+   __builtin_memmove (x, y, z);
+   *res = z;
+ }
+ 
+ /*
  ** set1:
  **	mov	(x[0-9]+), x0
  **	setp	\[\1\]!, x2!, x1
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/no_merge_trunc_signed_zero.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/no_merge_trunc_signed_zero.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/no_merge_trunc_signed_zero.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/no_merge_trunc_signed_zero.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,24 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fno-trapping-math -fsigned-zeros" } */
+ 
+ #include 
+ 
+ float
+ f1 (float x)
+ {
+   return (int) rintf(x);
+ }
+ 
+ double
+ f2 (double x)
+ {
+   return (long) rint(x);
+ }
+ 
+ /* { dg-final { scan-assembler "frintx\\ts\[0-9\]+, s\[0-9\]+" } } */
+ /* { dg-final { scan-assembler "cvtzs\\ts\[0-9\]+, s\[0-9\]+" } } */
+ /* { dg-final { scan-assembler "scvtf\\ts\[0-9\]+, s\[0-9\]+" } } */
+ /* { dg-final { scan-assembler "frintx\\td\[0-9\]+, d\[0-9\]+" } } */
+ /* { dg-final { scan-assembler "cvtzs\\td\[0-9\]+, d\[0-9\]+" } } */
+ /* { dg-final { scan-assembler "scvtf\\td\[0-9\]+, d\[0-9\]+" } } */
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr103147-10.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr103147-10.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr103147-10.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr103147-10.c	Thu Jun 20 08:08:08 2024
***************
*** 1,4 ****
! /* { dg-options "-O2 -fpack-struct -mstrict-align" } */
  /* { dg-final { check-function-bodies "**" "" "" } } */
  
  #include 
--- 1,4 ----
! /* { dg-options "-O2 -fpack-struct -mstrict-align -fno-stack-protector" } */
  /* { dg-final { check-function-bodies "**" "" "" } } */
  
  #include 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr104005.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr104005.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr104005.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr104005.c	Thu Jun 20 08:08:08 2024
***************
*** 1,4 ****
! /* { dg-options "-O2 -funroll-loops" } */
  
  typedef int v2 __attribute__((vector_size(8)));
  
--- 1,4 ----
! /* { dg-options "-O2 -funroll-loops -fno-stack-protector" } */
  
  typedef int v2 __attribute__((vector_size(8)));
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr112787.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr112787.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr112787.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr112787.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-O2 -march=armv9-a -mcpu=neoverse-n2" } */
+ 
+ typedef int __attribute__((__vector_size__ (64))) vec;
+ 
+ vec fn (vec a, vec b)
+ {
+   return a + b;
+ }
+ 
+ /* { dg-final { scan-assembler-times {add\tv[0-9]+} 4 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr113552.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr113552.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr113552.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr113552.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* { dg-do compile } */
+ /* { dg-options "-Ofast -march=armv8-a" } */
+ 
+ __attribute__ ((__simd__ ("notinbranch"), const))
+ double cos (double);
+ 
+ void foo (float *a, double *b)
+ {
+     for (int i = 0; i < 12; i+=3)
+       {
+         b[i] = cos (5.0 * a[i]);
+         b[i+1] = cos (5.0 * a[i+1]);
+         b[i+2] = cos (5.0 * a[i+2]);
+       }
+ }
+ 
+ /* { dg-final { scan-assembler-times {bl\t_ZGVnN2v_cos} 6 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr63304_1.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr63304_1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr63304_1.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr63304_1.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* { dg-do assemble } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-O1 --save-temps" } */
  #pragma GCC push_options
  #pragma GCC target ("+nothing+simd,cmodel=small")
  
--- 1,6 ----
  /* { dg-do assemble } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-O1 --save-temps -fno-pie" } */
  #pragma GCC push_options
  #pragma GCC target ("+nothing+simd,cmodel=small")
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr70120-2.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr70120-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr70120-2.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr70120-2.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* { dg-do compile } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-Og -freorder-functions -g3 -mcmodel=large" } */
  
  typedef short v32u16 __attribute__ ((vector_size (32)));
  typedef int v32u32 __attribute__ ((vector_size (32)));
--- 1,6 ----
  /* { dg-do compile } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-Og -freorder-functions -g3 -mcmodel=large -fno-pie" } */
  
  typedef short v32u16 __attribute__ ((vector_size (32)));
  typedef int v32u32 __attribute__ ((vector_size (32)));
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr78733.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr78733.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr78733.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr78733.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O2 -mcmodel=large -mpc-relative-literal-loads" } */
  /* { dg-require-effective-target lp64 } */
  /* { dg-skip-if "-mcmodel=large, no support for -fpic" { aarch64-*-* }  { "-fpic" } { "" } } */
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O2 -mcmodel=large -mpc-relative-literal-loads -fno-pie" } */
  /* { dg-require-effective-target lp64 } */
  /* { dg-skip-if "-mcmodel=large, no support for -fpic" { aarch64-*-* }  { "-fpic" } { "" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr79041-2.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr79041-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr79041-2.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr79041-2.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O2 -mcmodel=large -mpc-relative-literal-loads" } */
  /* { dg-require-effective-target lp64 } */
  /* { dg-skip-if "-mcmodel=large, no support for -fpic" { aarch64-*-* }  { "-fpic" } { "" } } */
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O2 -mcmodel=large -mpc-relative-literal-loads -fno-pie" } */
  /* { dg-require-effective-target lp64 } */
  /* { dg-skip-if "-mcmodel=large, no support for -fpic" { aarch64-*-* }  { "-fpic" } { "" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr94530.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr94530.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr94530.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr94530.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* { dg-do compile } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large" } */
  
  extern void bar(const char *);
  
--- 1,6 ----
  /* { dg-do compile } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large -fno-pie" } */
  
  extern void bar(const char *);
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr94577.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr94577.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pr94577.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pr94577.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-mcmodel=large -mabi=ilp32" } */
  
  void
  foo ()
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-mcmodel=large -mabi=ilp32 -fno-pie" } */
  
  void
  foo ()
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_2.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_2.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_2.c	Thu Jun 20 08:08:08 2024
***************
*** 242,249 ****
  
  #pragma GCC push_options
  #pragma GCC target ("arch=armv8.7-a")
! #ifndef __ARM_FEATURE_LS64
! #error "__ARM_FEATURE_LS64 is not defined but should be!"
  #endif
  #pragma GCC pop_options
  
--- 242,249 ----
  
  #pragma GCC push_options
  #pragma GCC target ("arch=armv8.7-a")
! #ifdef __ARM_FEATURE_LS64
! #error "__ARM_FEATURE_LS64 is defined but should not be!"
  #endif
  #pragma GCC pop_options
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* { dg-do compile } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-O2 -mcmodel=large -fno-builtin" }  */
  /* { dg-skip-if "-mcmodel=large -fPIC not currently supported" { aarch64-*-* }  { "-fPIC" } { "" } } */
  
  typedef long unsigned int size_t;
--- 1,6 ----
  /* { dg-do compile } */
  /* { dg-require-effective-target lp64 } */
! /* { dg-options "-O2 -mcmodel=large -fno-builtin -fno-pie" }  */
  /* { dg-skip-if "-mcmodel=large -fPIC not currently supported" { aarch64-*-* }  { "-fPIC" } { "" } } */
  
  typedef long unsigned int size_t;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/shrink_wrap_1.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/shrink_wrap_1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/shrink_wrap_1.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/shrink_wrap_1.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile { target { aarch64*-*-* } } } */
! /* { dg-options "-O2" } */
  /* { dg-final { check-function-bodies "**" "" } } */
  
  /*
--- 1,5 ----
  /* { dg-do compile { target { aarch64*-*-* } } } */
! /* { dg-options "-O2 -fno-stack-protector" } */
  /* { dg-final { check-function-bodies "**" "" } } */
  
  /*
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c	Thu Jun 20 08:08:08 2024
*************** double foo(double x)
*** 18,24 ****
  }
  
  /* { dg-final { scan-assembler-not {\.variant_pcs\tfoo} } } */
! /* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnM1v_foo} 1 } } */
  /* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnM2v_foo} 1 } } */
! /* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnN1v_foo} 1 } } */
  /* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnN2v_foo} 1 } } */
--- 18,24 ----
  }
  
  /* { dg-final { scan-assembler-not {\.variant_pcs\tfoo} } } */
! /* { dg-final { scan-assembler-not {\.variant_pcs\t_ZGVnM1v_foo} } } */
  /* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnM2v_foo} 1 } } */
! /* { dg-final { scan-assembler-not {\.variant_pcs\t_ZGVnN1v_foo} } } */
  /* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnN2v_foo} 1 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-1.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-1.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-1.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=16 -funwind-tables" } */
  /* { dg-require-effective-target supports_stack_clash_protection } */
  
  #define SIZE 128*1024
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=16 -funwind-tables -fno-stack-protector" } */
  /* { dg-require-effective-target supports_stack_clash_protection } */
  
  #define SIZE 128*1024
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-2.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-2.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-2.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=16 -funwind-tables" } */
  /* { dg-require-effective-target supports_stack_clash_protection } */
  
  #define SIZE 1280*1024 + 512
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=16 -funwind-tables -fno-stack-protector" } */
  /* { dg-require-effective-target supports_stack_clash_protection } */
  
  #define SIZE 1280*1024 + 512
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,55 ----
+ /* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
+ void f(int, ...);
+ void g();
+ 
+ /*
+ ** test1:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #1024
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ */
+ int test1(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x);
+     }
+   g();
+   return 1;
+ }
+ 
+ /*
+ ** test2:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #1040
+ **	str	xzr, \[sp, #?1024\]
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ */
+ int test2(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x);
+     }
+   g();
+   return 1;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,100 ----
+ /* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
+ void f(int, ...);
+ void g();
+ 
+ /*
+ ** test1:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #4064
+ **	str	xzr, \[sp, #?1024\]
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ **	str	x26, \[sp, #?4128\]
+ **	...
+ */
+ int test1(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       asm volatile ("" :::
+ 		    "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26");
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x);
+     }
+   g();
+   return 1;
+ }
+ 
+ /*
+ ** test2:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #1040
+ **	str	xzr, \[sp, #?1024\]
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ */
+ int test2(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       asm volatile ("" :::
+ 		    "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26");
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x);
+     }
+   g();
+   return 1;
+ }
+ 
+ /*
+ ** test3:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #1024
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ */
+ int test3(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       asm volatile ("" :::
+ 		    "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26");
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x);
+     }
+   g();
+   return 1;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,100 ----
+ /* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12 -fsanitize=shadow-call-stack -ffixed-x18" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
+ void f(int, ...);
+ void g();
+ 
+ /*
+ ** test1:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #4064
+ **	str	xzr, \[sp, #?1024\]
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ **	str	x26, \[sp, #?4128\]
+ **	...
+ */
+ int test1(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       asm volatile ("" :::
+ 		    "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26");
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x);
+     }
+   g();
+   return 1;
+ }
+ 
+ /*
+ ** test2:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #1040
+ **	str	xzr, \[sp, #?1024\]
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ */
+ int test2(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       asm volatile ("" :::
+ 		    "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26");
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x);
+     }
+   g();
+   return 1;
+ }
+ 
+ /*
+ ** test3:
+ **	...
+ **	str	x30, \[sp\]
+ **	sub	sp, sp, #1024
+ **	cbnz	w0, .*
+ **	bl	g
+ **	...
+ */
+ int test3(int z) {
+   __uint128_t x = 0;
+   int y[0x400];
+   if (z)
+     {
+       asm volatile ("" :::
+ 		    "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26");
+       f(0, 0, 0, 0, 0, 0, 0, &y,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
+ 	x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x);
+     }
+   g();
+   return 1;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,3 ----
+ /* { dg-options "-O2 -fstack-protector-all -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12 -fsanitize=shadow-call-stack -ffixed-x18" } */
+ 
+ #include "stack-check-prologue-19.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,95 ----
+ /* { dg-options " -O -fstack-protector-strong -mstack-protector-guard=sysreg -mstack-protector-guard-reg=tpidr2_el0 -mstack-protector-guard-offset=16" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
+ void g(void *);
+ __SVBool_t *h(void *);
+ 
+ /*
+ ** test1:
+ **	sub	sp, sp, #288
+ **	stp	x29, x30, \[sp, #?272\]
+ **	add	x29, sp, #?272
+ **	mrs	(x[0-9]+), tpidr2_el0
+ **	ldr	(x[0-9]+), \[\1, #?16\]
+ **	str	\2, \[sp, #?264\]
+ **	mov	\2, #?0
+ **	add	x0, sp, #?8
+ **	bl	g
+ **	...
+ **	mrs	.*
+ **	...
+ **	bne	.*
+ **	...
+ **	ldp	x29, x30, \[sp, #?272\]
+ **	add	sp, sp, #?288
+ **	ret
+ **	bl	__stack_chk_fail
+ */
+ int test1() {
+   int y[0x40];
+   g(y);
+   return 1;
+ }
+ 
+ /*
+ ** test2:
+ **	stp	x29, x30, \[sp, #?-16\]!
+ **	mov	x29, sp
+ **	sub	sp, sp, #1040
+ **	mrs	(x[0-9]+), tpidr2_el0
+ **	ldr	(x[0-9]+), \[\1, #?16\]
+ **	str	\2, \[sp, #?1032\]
+ **	mov	\2, #?0
+ **	add	x0, sp, #?8
+ **	bl	g
+ **	...
+ **	mrs	.*
+ **	...
+ **	bne	.*
+ **	...
+ **	add	sp, sp, #?1040
+ **	ldp	x29, x30, \[sp\], #?16
+ **	ret
+ **	bl	__stack_chk_fail
+ */
+ int test2() {
+   int y[0x100];
+   g(y);
+   return 1;
+ }
+ 
+ #pragma GCC target "+sve"
+ 
+ /*
+ ** test3:
+ **	stp	x29, x30, \[sp, #?-16\]!
+ **	mov	x29, sp
+ **	addvl	sp, sp, #-18
+ **	...
+ **	str	p4, \[sp\]
+ **	...
+ **	sub	sp, sp, #272
+ **	mrs	(x[0-9]+), tpidr2_el0
+ **	ldr	(x[0-9]+), \[\1, #?16\]
+ **	str	\2, \[sp, #?264\]
+ **	mov	\2, #?0
+ **	add	x0, sp, #?8
+ **	bl	h
+ **	...
+ **	mrs	.*
+ **	...
+ **	bne	.*
+ **	...
+ **	add	sp, sp, #?272
+ **	...
+ **	ldr	p4, \[sp\]
+ **	...
+ **	addvl	sp, sp, #18
+ **	ldp	x29, x30, \[sp\], #?16
+ **	ret
+ **	bl	__stack_chk_fail
+ */
+ __SVBool_t test3() {
+   int y[0x40];
+   return *h(y);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,33 ----
+ /* { dg-options "-O2 -mcpu=neoverse-v1 -fstack-protector-all" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
+ /*
+ ** main:
+ **	...
+ **	stp	x29, x30, \[sp, #?-[0-9]+\]!
+ **	...
+ **	sub	sp, sp, #[0-9]+
+ **	...
+ **	str	x[0-9]+, \[x29, #?-8\]
+ **	...
+ */
+ int f(const char *);
+ void g(void *);
+ int main(int argc, char* argv[])
+ {
+   int a;
+   int b;
+   char c[2+f(argv[1])];
+   int d[0x100];
+   char y;
+ 
+   y=42; a=4; b=10;
+   c[0] = 'h'; c[1] = '\0';
+ 
+   c[f(argv[2])] = '\0';
+ 
+   __builtin_printf("%d %d\n%s\n", a, b, c);
+   g(d);
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp	Thu Jun 20 08:08:08 2024
*************** if ![info exists DEFAULT_CFLAGS] then {
*** 37,47 ****
  # Initialize `dg'.
  dg-init
  
! # Force SVE if we're not testing it already.
  if { [check_effective_target_aarch64_sve] } {
!     set sve_flags ""
  } else {
!     set sve_flags "-march=armv8.2-a+sve"
  }
  
  # Main loop.
--- 37,48 ----
  # Initialize `dg'.
  dg-init
  
! # Force SVE if we're not testing it already.  And, disable stack protector
! # to avoid test failures with --enable-default-ssp.
  if { [check_effective_target_aarch64_sve] } {
!     set sve_flags "-fno-stack-protector"
  } else {
!     set sve_flags "-march=armv8.2-a+sve -fno-stack-protector"
  }
  
  # Main loop.
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c	Mon May  8 12:14:40 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c	Thu Jun 20 08:08:08 2024
***************
*** 11,21 ****
  **	mov	x11, sp
  **	...
  **	sub	sp, sp, x13
- **	str	p4, \[sp\]
  **	cbz	w0, [^\n]*
  **	...
  **	ptrue	p0\.b, all
- **	ldr	p4, \[sp\]
  **	addvl	sp, sp, #1
  **	ldr	x24, \[sp\], 32
  **	ret
--- 11,20 ----
  **	mov	x11, sp
  **	...
  **	sub	sp, sp, x13
  **	cbz	w0, [^\n]*
+ **	str	p4, \[sp\]
  **	...
  **	ptrue	p0\.b, all
  **	addvl	sp, sp, #1
  **	ldr	x24, \[sp\], 32
  **	ret
*************** test_1 (int n)
*** 39,51 ****
  **	mov	x11, sp
  **	...
  **	sub	sp, sp, x13
- **	str	p4, \[sp\]
  **	cbz	w0, [^\n]*
  **	str	p5, \[sp, #1, mul vl\]
  **	str	p6, \[sp, #2, mul vl\]
  **	...
  **	ptrue	p0\.b, all
- **	ldr	p4, \[sp\]
  **	addvl	sp, sp, #1
  **	ldr	x24, \[sp\], 32
  **	ret
--- 38,49 ----
  **	mov	x11, sp
  **	...
  **	sub	sp, sp, x13
  **	cbz	w0, [^\n]*
+ **	str	p4, \[sp\]
  **	str	p5, \[sp, #1, mul vl\]
  **	str	p6, \[sp, #2, mul vl\]
  **	...
  **	ptrue	p0\.b, all
  **	addvl	sp, sp, #1
  **	ldr	x24, \[sp\], 32
  **	ret
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pr109505.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pr109505.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pr109505.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pr109505.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* PR tree-optimization/109505 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -march=armv8.2-a+sve" } */
+ 
+ #pragma GCC aarch64 "arm_sve.h"
+ 
+ unsigned long
+ foo (unsigned long x)
+ {
+   unsigned long y = svcntb ();
+   return (x | 15) & y;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,29 ----
+ /* { dg-skip-if "" { no_fsanitize_address } } */
+ /* { dg-options "-fsanitize=address -fsanitize-address-use-after-scope" } */
+ 
+ #include 
+ 
+ __attribute__((noinline, noclone)) int
+ foo (char *a)
+ {
+   int i, j = 0;
+   asm volatile ("" : "+r" (a) : : "memory");
+   for (i = 0; i < 12; i++)
+     j += a[i];
+   return j;
+ }
+ 
+ int
+ main ()
+ {
+   int i, j = 0;
+   for (i = 0; i < 4; i++)
+     {
+       char a[12];
+       __SVInt8_t freq;
+       __builtin_bcmp (&freq, a, 10);
+       __builtin_memset (a, 0, sizeof (a));
+       j += foo (a);
+     }
+   return j;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/test_frame_17.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/test_frame_17.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/test_frame_17.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/test_frame_17.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O2" } */
  
  /* Test reuse of stack adjustment temporaries.  */
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O2 -fno-stack-protector" } */
  
  /* Test reuse of stack adjustment temporaries.  */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/torture/pr111677.c gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/torture/pr111677.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/aarch64/torture/pr111677.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/aarch64/torture/pr111677.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,28 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target fopenmp } */
+ /* { dg-options "-ffast-math -fstack-protector-strong -fopenmp" } */
+ typedef struct {
+   long size_z;
+   int width;
+ } dt_bilateral_t;
+ typedef float dt_aligned_pixel_t[4];
+ #pragma omp declare simd
+ void dt_bilateral_splat(dt_bilateral_t *b) {
+   float *buf;
+   long offsets[8];
+   for (; b;) {
+     int firstrow;
+     for (int j = firstrow; j; j++)
+       for (int i; i < b->width; i++) {
+         dt_aligned_pixel_t contrib;
+         for (int k = 0; k < 4; k++)
+           buf[offsets[k]] += contrib[k];
+       }
+     float *dest;
+     for (int j = (long)b; j; j++) {
+       float *src = (float *)b->size_z;
+       for (int i = 0; i < (long)b; i++)
+         dest[i] += src[i];
+     }
+   }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/alpha/pr106966.c gcc-12.4.0/gcc/testsuite/gcc.target/alpha/pr106966.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/alpha/pr106966.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/alpha/pr106966.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,13 ----
+ /* PR target/106906 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -mbuild-constants" } */
+ 
+ void
+ do_console (unsigned short *vga)
+ {
+   vga[0] = 'H';
+   vga[1] = 'e';
+   vga[2] = 'l';
+   vga[3] = 'l';
+   vga[4] = 'o';
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/alpha/pr115297.c gcc-12.4.0/gcc/testsuite/gcc.target/alpha/pr115297.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/alpha/pr115297.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/alpha/pr115297.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,13 ----
+ /* PR target/115297 */
+ /* { dg-do compile } */
+ /* { dg-options "-O1" } */
+ 
+ enum { BPF_F_USER_BUILD_ID } __bpf_get_stack_size;
+ long __bpf_get_stack_flags, bpf_get_stack___trans_tmp_2;
+ 
+ void bpf_get_stack() {
+   unsigned elem_size;
+   int err = elem_size = __bpf_get_stack_flags ?: sizeof(long);
+   if (__builtin_expect(__bpf_get_stack_size % elem_size, 0))
+     bpf_get_stack___trans_tmp_2 = err;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/acle/cde-mve-full-assembly.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/acle/cde-mve-full-assembly.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/acle/cde-mve-full-assembly.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/acle/cde-mve-full-assembly.c	Thu Jun 20 08:08:08 2024
***************
*** 567,646 ****
     contain back references).  */
  /*
  ** test_cde_vcx1q_mfloat16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mfloat32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
--- 567,646 ----
     contain back references).  */
  /*
  ** test_cde_vcx1q_mfloat16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mfloat32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_muint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1q_mint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1t	p0, q0, #32
  ** 	bx	lr
***************
*** 649,728 ****
  
  /*
  ** test_cde_vcx1qa_mfloat16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mfloat32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	 P0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
--- 649,728 ----
  
  /*
  ** test_cde_vcx1qa_mfloat16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mfloat32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_muint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint8x16_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint16x8_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint32x4_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
  */
  /*
  ** test_cde_vcx1qa_mint64x2_tintint:
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
! ** 	(?:vldr\.64	d0, \.L[0-9]*\n\tvldr\.64	d1, \.L[0-9]*\+8|vmsr	p0, r2	@ movhi)
  ** 	vpst
  ** 	vcx1at	p0, q0, #32
  ** 	bx	lr
***************
*** 731,738 ****
  
  /*
  ** test_cde_vcx2q_mfloat16x8_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 731,738 ----
  
  /*
  ** test_cde_vcx2q_mfloat16x8_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 740,747 ****
  */
  /*
  ** test_cde_vcx2q_mfloat16x8_tfloat32x4_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 740,747 ----
  */
  /*
  ** test_cde_vcx2q_mfloat16x8_tfloat32x4_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 749,756 ****
  */
  /*
  ** test_cde_vcx2q_mfloat32x4_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 749,756 ----
  */
  /*
  ** test_cde_vcx2q_mfloat32x4_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 758,765 ****
  */
  /*
  ** test_cde_vcx2q_mint64x2_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 758,765 ----
  */
  /*
  ** test_cde_vcx2q_mint64x2_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 767,774 ****
  */
  /*
  ** test_cde_vcx2q_mint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 767,774 ----
  */
  /*
  ** test_cde_vcx2q_mint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 776,783 ****
  */
  /*
  ** test_cde_vcx2q_muint16x8_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 776,783 ----
  */
  /*
  ** test_cde_vcx2q_muint16x8_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 785,792 ****
  */
  /*
  ** test_cde_vcx2q_muint8x16_tint64x2_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 785,792 ----
  */
  /*
  ** test_cde_vcx2q_muint8x16_tint64x2_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 794,801 ****
  */
  /*
  ** test_cde_vcx2q_muint8x16_tint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 794,801 ----
  */
  /*
  ** test_cde_vcx2q_muint8x16_tint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 803,810 ****
  */
  /*
  ** test_cde_vcx2q_muint8x16_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 803,810 ----
  */
  /*
  ** test_cde_vcx2q_muint8x16_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 812,819 ****
  */
  /*
  ** test_cde_vcx2q_muint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 812,819 ----
  */
  /*
  ** test_cde_vcx2q_muint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2t	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 823,830 ****
  
  /*
  ** test_cde_vcx2qa_mfloat16x8_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 823,830 ----
  
  /*
  ** test_cde_vcx2qa_mfloat16x8_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 832,839 ****
  */
  /*
  ** test_cde_vcx2qa_mfloat16x8_tfloat32x4_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 832,839 ----
  */
  /*
  ** test_cde_vcx2qa_mfloat16x8_tfloat32x4_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 841,848 ****
  */
  /*
  ** test_cde_vcx2qa_mfloat32x4_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 841,848 ----
  */
  /*
  ** test_cde_vcx2qa_mfloat32x4_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 850,857 ****
  */
  /*
  ** test_cde_vcx2qa_mint64x2_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 850,857 ----
  */
  /*
  ** test_cde_vcx2qa_mint64x2_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 859,866 ****
  */
  /*
  ** test_cde_vcx2qa_mint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 859,866 ----
  */
  /*
  ** test_cde_vcx2qa_mint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 868,875 ****
  */
  /*
  ** test_cde_vcx2qa_muint16x8_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 868,875 ----
  */
  /*
  ** test_cde_vcx2qa_muint16x8_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 877,884 ****
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tint64x2_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 877,884 ----
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tint64x2_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 886,893 ****
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 886,893 ----
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 895,902 ****
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 895,902 ----
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tuint16x8_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 904,911 ****
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 904,911 ----
  */
  /*
  ** test_cde_vcx2qa_muint8x16_tuint8x16_tint:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r1	@ movhi)
  ** 	vpst
  ** 	vcx2at	p0, (q[0-7]), q0, #32
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 915,922 ****
  
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 915,922 ----
  
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 924,931 ****
  */
  /*
  ** test_cde_vcx3q_mfloat16x8_tfloat16x8_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 924,931 ----
  */
  /*
  ** test_cde_vcx3q_mfloat16x8_tfloat16x8_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 933,940 ****
  */
  /*
  ** test_cde_vcx3q_mfloat32x4_tuint64x2_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 933,940 ----
  */
  /*
  ** test_cde_vcx3q_mfloat32x4_tuint64x2_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 942,949 ****
  */
  /*
  ** test_cde_vcx3q_muint16x8_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 942,949 ----
  */
  /*
  ** test_cde_vcx3q_muint16x8_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 951,958 ****
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint16x8_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 951,958 ----
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint16x8_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 960,967 ****
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tuint16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 960,967 ----
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tuint16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 969,976 ****
  */
  /*
  ** test_cde_vcx3q_mint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 969,976 ----
  */
  /*
  ** test_cde_vcx3q_mint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 978,985 ****
  */
  /*
  ** test_cde_vcx3q_muint8x16_tint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 978,985 ----
  */
  /*
  ** test_cde_vcx3q_muint8x16_tint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 987,994 ****
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 987,994 ----
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 996,1003 ****
  */
  /*
  ** test_cde_vcx3q_mint64x2_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 996,1003 ----
  */
  /*
  ** test_cde_vcx3q_mint64x2_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1005,1012 ****
  */
  /*
  ** test_cde_vcx3q_muint8x16_tint64x2_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1005,1012 ----
  */
  /*
  ** test_cde_vcx3q_muint8x16_tint64x2_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1014,1021 ****
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1014,1021 ----
  */
  /*
  ** test_cde_vcx3q_muint8x16_tuint8x16_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1023,1030 ****
  */
  /*
  ** test_cde_vcx3q_muint8x16_tint64x2_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1023,1030 ----
  */
  /*
  ** test_cde_vcx3q_muint8x16_tint64x2_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3t	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1034,1041 ****
  
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1034,1041 ----
  
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1043,1050 ****
  */
  /*
  ** test_cde_vcx3qa_mfloat16x8_tfloat16x8_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1043,1050 ----
  */
  /*
  ** test_cde_vcx3qa_mfloat16x8_tfloat16x8_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1052,1059 ****
  */
  /*
  ** test_cde_vcx3qa_mfloat32x4_tuint64x2_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1052,1059 ----
  */
  /*
  ** test_cde_vcx3qa_mfloat32x4_tuint64x2_tfloat16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1061,1068 ****
  */
  /*
  ** test_cde_vcx3qa_muint16x8_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1061,1068 ----
  */
  /*
  ** test_cde_vcx3qa_muint16x8_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1070,1077 ****
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint16x8_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1070,1077 ----
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint16x8_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1079,1086 ****
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tuint16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1079,1086 ----
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tuint16x8_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1088,1095 ****
  */
  /*
  ** test_cde_vcx3qa_mint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1088,1095 ----
  */
  /*
  ** test_cde_vcx3qa_mint8x16_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1097,1104 ****
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1097,1104 ----
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1106,1113 ****
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1106,1113 ----
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1115,1122 ****
  */
  /*
  ** test_cde_vcx3qa_mint64x2_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1115,1122 ----
  */
  /*
  ** test_cde_vcx3qa_mint64x2_tuint8x16_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1124,1131 ****
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tint64x2_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1124,1131 ----
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tint64x2_tuint8x16_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1133,1140 ****
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1133,1140 ----
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tuint8x16_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
***************
*** 1142,1149 ****
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tint64x2_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	 P0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
--- 1142,1149 ----
  */
  /*
  ** test_cde_vcx3qa_muint8x16_tint64x2_tint64x2_t:
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
! ** 	(?:vldr\.64	d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64	d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr	p0, r0	@ movhi)
  ** 	vpst
  ** 	vcx3at	p0, (q[0-7]), q0, q1, #15
  ** 	vmov	q0, \1([[:space:]]+@ [^\n]*)?
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/cmse/extend-param.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/cmse/extend-param.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/cmse/extend-param.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/cmse/extend-param.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,109 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mcmse -fshort-enums" } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ #include 
+ #include 
+ 
+ #define ARRAY_SIZE (256)
+ char array[ARRAY_SIZE];
+ 
+ enum offset
+ {
+     zero = 0,
+     one = 1,
+     two = 2
+ };
+ 
+ /*
+ **__acle_se_unsignSecureFunc:
+ **	...
+ **	uxtb	r0, r0
+ **	...
+ */
+ __attribute__((cmse_nonsecure_entry)) char unsignSecureFunc (unsigned char index) {
+     if (index >= ARRAY_SIZE)
+       return 0;
+     return array[index];
+ }
+ 
+ /*
+ **__acle_se_signSecureFunc:
+ **	...
+ **	sxtb	r0, r0
+ **	...
+ */
+ __attribute__((cmse_nonsecure_entry)) char signSecureFunc (signed char index) {
+     if (index >= ARRAY_SIZE)
+       return 0;
+     return array[index];
+ }
+ 
+ /*
+ **__acle_se_shortUnsignSecureFunc:
+ **	...
+ **	uxth	r0, r0
+ **	...
+ */
+ __attribute__((cmse_nonsecure_entry)) char shortUnsignSecureFunc (unsigned short index) {
+     if (index >= ARRAY_SIZE)
+       return 0;
+     return array[index];
+ }
+ 
+ /*
+ **__acle_se_shortSignSecureFunc:
+ **	...
+ **	sxth	r0, r0
+ **	...
+ */
+ __attribute__((cmse_nonsecure_entry)) char shortSignSecureFunc (signed short index) {
+     if (index >= ARRAY_SIZE)
+       return 0;
+     return array[index];
+ }
+ 
+ /*
+ **__acle_se_enumSecureFunc:
+ **	...
+ **	uxtb	r0, r0
+ **	...
+ */
+ __attribute__((cmse_nonsecure_entry)) char enumSecureFunc (enum offset index) {
+ 
+   // Compiler may optimize away bounds check as value is an unsigned char.
+ 
+   // According to AAPCS caller will zero extend to ensure value is < 256.
+ 
+   if (index >= ARRAY_SIZE)
+     return 0;
+   return array[index];
+ }
+ 
+ /*
+ **__acle_se_boolSecureFunc:
+ **	...
+ **	uxtb	r0, r0
+ **	...
+ */
+ __attribute__((cmse_nonsecure_entry)) char boolSecureFunc (bool index) {
+   if (index >= ARRAY_SIZE)
+     return 0;
+   return array[index];
+ }
+ 
+ /*
+ **__acle_se_boolCharShortEnumSecureFunc:
+ **	...
+ **	uxtb	r0, r0
+ **	uxtb	r1, r1
+ **	uxth	r2, r2
+ **	uxtb	r3, r3
+ **	...
+ */
+ __attribute__((cmse_nonsecure_entry,optimize(0))) char boolCharShortEnumSecureFunc (bool a, unsigned char b, unsigned short c, enum offset d) {
+   size_t index = a + b + c + d;
+   if (index >= ARRAY_SIZE)
+     return 0;
+   return array[index];
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/cmse/extend-return.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/cmse/extend-return.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/cmse/extend-return.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/cmse/extend-return.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,142 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mcmse -fshort-enums" } */
+ /* ARMv8-M expectation with target { ! arm_cmse_clear_ok }.  */
+ /* ARMv8.1-M expectation with target arm_cmse_clear_ok.  */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ #include 
+ #include 
+ 
+ enum offset
+ {
+     zero = 0,
+     one = 1,
+     two = 2
+ };
+ 
+ typedef unsigned char __attribute__ ((cmse_nonsecure_call)) ns_unsign_foo_t (void);
+ typedef signed char __attribute__ ((cmse_nonsecure_call)) ns_sign_foo_t (void);
+ typedef unsigned short __attribute__ ((cmse_nonsecure_call)) ns_short_unsign_foo_t (void);
+ typedef signed short __attribute__ ((cmse_nonsecure_call)) ns_short_sign_foo_t (void);
+ typedef enum offset __attribute__ ((cmse_nonsecure_call)) ns_enum_foo_t (void);
+ typedef bool __attribute__ ((cmse_nonsecure_call)) ns_bool_foo_t (void);
+ 
+ /*
+ **unsignNonsecure0:  { target arm_cmse_clear_ok }
+ **	...
+ **	blxns	r[0-3]
+ **	...
+ **	uxtb	r0, r0
+ **	...
+ */
+ /*
+ **unsignNonsecure0: { target { ! arm_cmse_clear_ok } }
+ **	...
+ **	bl	__gnu_cmse_nonsecure_call
+ **	uxtb	r0, r0
+ **	...
+ */
+ unsigned char unsignNonsecure0 (ns_unsign_foo_t * ns_foo_p)
+ {
+   return ns_foo_p ();
+ }
+ 
+ /*
+ **signNonsecure0:  { target arm_cmse_clear_ok }
+ **	...
+ **	blxns	r[0-3]
+ **	...
+ **	sxtb	r0, r0
+ **	...
+ */
+ /*
+ **signNonsecure0: { target { ! arm_cmse_clear_ok } }
+ **	...
+ **	bl	__gnu_cmse_nonsecure_call
+ **	sxtb	r0, r0
+ **	...
+ */
+ signed char signNonsecure0 (ns_sign_foo_t * ns_foo_p)
+ {
+   return ns_foo_p ();
+ }
+ 
+ /*
+ **shortUnsignNonsecure0:  { target arm_cmse_clear_ok }
+ **	...
+ **	blxns	r[0-3]
+ **	...
+ **	uxth	r0, r0
+ **	...
+ */
+ /*
+ **shortUnsignNonsecure0: { target { ! arm_cmse_clear_ok } }
+ **	...
+ **	bl	__gnu_cmse_nonsecure_call
+ **	uxth	r0, r0
+ **	...
+ */
+ unsigned short shortUnsignNonsecure0 (ns_short_unsign_foo_t * ns_foo_p)
+ {
+   return ns_foo_p ();
+ }
+ 
+ /*
+ **shortSignNonsecure0:  { target arm_cmse_clear_ok }
+ **	...
+ **	blxns	r[0-3]
+ **	...
+ **	sxth	r0, r0
+ **	...
+ */
+ /*
+ **shortSignNonsecure0: { target { ! arm_cmse_clear_ok } }
+ **	...
+ **	bl	__gnu_cmse_nonsecure_call
+ **	sxth	r0, r0
+ **	...
+ */
+ signed short shortSignNonsecure0 (ns_short_sign_foo_t * ns_foo_p)
+ {
+   return ns_foo_p ();
+ }
+ 
+ /*
+ **enumNonsecure0:  { target arm_cmse_clear_ok }
+ **	...
+ **	blxns	r[0-3]
+ **	...
+ **	uxtb	r0, r0
+ **	...
+ */
+ /*
+ **enumNonsecure0: { target { ! arm_cmse_clear_ok } }
+ **	...
+ **	bl	__gnu_cmse_nonsecure_call
+ **	uxtb	r0, r0
+ **	...
+ */
+ unsigned char __attribute__((noipa)) enumNonsecure0 (ns_enum_foo_t * ns_foo_p)
+ {
+   return ns_foo_p ();
+ }
+ 
+ /*
+ **boolNonsecure0:  { target arm_cmse_clear_ok }
+ **	...
+ **	blxns	r[0-3]
+ **	...
+ **	uxtb	r0, r0
+ **	...
+ */
+ /*
+ **boolNonsecure0: { target { ! arm_cmse_clear_ok } }
+ **	...
+ **	bl	__gnu_cmse_nonsecure_call
+ **	uxtb	r0, r0
+ **	...
+ */
+ unsigned char boolNonsecure0 (ns_bool_foo_t * ns_foo_p)
+ {
+   return ns_foo_p ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/general/preserve_user_namespace_1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/general/preserve_user_namespace_1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/general/preserve_user_namespace_1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/general/preserve_user_namespace_1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #define __ARM_MVE_PRESERVE_USER_NAMESPACE
+ #include 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! asrl_reg (int64_t longval3, int32_t x)
  {
!   return asrl (longval3, x);
  }
  
! /* { dg-final { scan-assembler "asrl\\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	asrl	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t value, int32_t shift)
  {
!   return asrl (value, shift);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! lsll_reg (uint64_t longval3, int32_t x)
  {
!   return lsll (longval3, x);
  }
  
! /* { dg-final { scan-assembler "lsll\\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+" } } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	lsll	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t value, int32_t shift)
  {
!   return lsll (value, shift);
  }
  
! /*
! **foo1:
! **	...
! **	lsll	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint64_t
! foo1 (int32_t shift)
! {
!   return lsll (1, shift);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c	Thu Jan  1 00:00:00 1970
***************
*** 1,47 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include 
- int8x16_t foo (int8x16_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- int16x8_t foo1 (int16x8_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- int32x4_t foo2 (int32x4_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- uint8x16_t foo3 (uint8x16_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- uint16x8_t foo4 (uint16x8_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- uint32x4_t foo5 (uint32x4_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- float16x8_t foo6 (float16x8_t a)
- {
-   return vaddq (a, (float16_t)23.6);
- }
- float32x4_t foo7 (float32x4_t a)
- {
-   return vaddq (a, (float32_t)23.46);
- }
- float16x8_t foo8 (float16x8_t a)
- {
-   return vaddq (a, 23.6);
- }
- float32x4_t foo9 (float32x4_t a)
- {
-   return vaddq (a, 23.46);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,61 ----
+ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+ /* { dg-add-options arm_v8_1m_mve_fp } */
+ /* { dg-additional-options "-O2 -Wno-pedantic -Wno-long-long -Wno-incompatible-pointer-types" { target c } } */
+ /* { dg-additional-options "-O2 -Wno-pedantic -Wno-long-long -fpermissive" { target c++ } } */
+ #include "arm_mve.h"
+ 
+ float f1;
+ double f2;
+ float16_t f3;
+ float32_t f4;
+ __fp16 f5;
+ #ifndef __cplusplus
+ _Float16 f6;
+ #endif
+ 
+ float16x8_t floatvec;
+ 
+ /* Test a few different supported ways of passing a scalar int value.
+ The intrinsic vmulq was chosen arbitrarily, but it is representative of
+ all intrinsics that take a non-const scalar value.  */
+ void
+ test_scalars (void)
+ {
+     /* Test a few different supported ways of passing a float value.  */
+     floatvec = vmulq(floatvec, 0.5);
+     floatvec = vmulq(floatvec, 0.5f);
+     floatvec = vmulq(floatvec, (__fp16) 0.5);
+     floatvec = vmulq(floatvec, f1);
+     floatvec = vmulq(floatvec, f2);
+     floatvec = vmulq(floatvec, f3);
+     floatvec = vmulq(floatvec, f4);
+     floatvec = vmulq(floatvec, f5);
+ #ifndef __cplusplus
+     floatvec = vmulq(floatvec, f6);
+     floatvec = vmulq(floatvec, 0.15f16);
+     floatvec = vmulq(floatvec, (_Float16) 0.15);
+ #endif
+ }
+ 
+ /* Next, test a number of valid pointer overloads.  */
+ void
+ foo11 (__fp16 * addr, float16x8_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ #ifndef __cplusplus
+ void
+ foo12 (_Float16 * addr, float16x8_t value)
+ {
+   vst1q (addr, value);
+ }
+ #endif
+ 
+ void
+ foo13 (float * addr, float32x4_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,100 ----
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-additional-options "-O2 -Wno-pedantic -Wno-long-long -Wno-incompatible-pointer-types" { target c } } */
+ /* { dg-additional-options "-O2 -Wno-pedantic -Wno-long-long -fpermissive" { target c++ } } */
+ #include "arm_mve.h"
+ 
+ int i1;
+ short i2;
+ long i3;
+ long long i4;
+ int8_t i5;
+ int16_t i6;
+ int32_t i7;
+ int64_t i8;
+ 
+ int16x8_t intvec;
+ 
+ /* Test a few different supported ways of passing a scalar int value.
+ The intrinsic vmulq was chosen arbitrarily, but it is representative of
+ all intrinsics that take a non-const scalar value.  */
+ void
+ test_scalars (void)
+ {
+     intvec = vmulq(intvec, 2);
+     intvec = vmulq(intvec, (int32_t) 2);
+     intvec = vmulq(intvec, (short) 2);
+     intvec = vmulq(intvec, i1);
+     intvec = vmulq(intvec, i2);
+     intvec = vmulq(intvec, i3);
+     intvec = vmulq(intvec, i4);
+     intvec = vmulq(intvec, i5);
+     intvec = vmulq(intvec, i6);
+     intvec = vmulq(intvec, i7);
+     intvec = vmulq(intvec, i8);
+ }
+ 
+ /* Next, test a number of valid pointer overloads.  */
+ void
+ foo1 (signed char * addr, int8x16_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ void
+ foo2 (short * addr, int16x8_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ /* Glibc defines int32_t as 'int' while newlib defines it as 'long int'.
+ 
+    Although these correspond to the same size, g++ complains when using the
+    'wrong' version:
+   invalid conversion from 'long int*' to 'int32_t*' {aka 'int*'} [-fpermissive]
+ 
+   The trick below is to make this test pass whether using glibc-based or
+   newlib-based toolchains.  */
+ 
+ #if defined(__GLIBC__)
+ #define word_type int
+ #else
+ #define word_type long int
+ #endif
+ void
+ foo3 (word_type * addr, int32x4_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ void
+ foo5 (long long * addr, uint64x2_t value)
+ {
+   vldrdq_gather_offset (addr, value);
+ }
+ 
+ void
+ foo6 (unsigned char * addr, uint8x16_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ void
+ foo7 (unsigned short * addr, uint16x8_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ void
+ foo8 (unsigned word_type * addr, uint32x4_t value)
+ {
+   vst1q (addr, value);
+ }
+ 
+ void
+ foo10 (unsigned long long * addr, uint64x2_t value)
+ {
+   vldrdq_gather_offset (addr, value);
+ }
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_m.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_m.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_m.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_m.c	Thu Jan  1 00:00:00 1970
***************
*** 1,48 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include 
- mve_pred16_t p;
- 
- int32x4_t fn1 (int32x4_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_s32(), vecIdx, 1, p);
- }
- 
- int16x8_t fn2 (int16x8_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_s16(), vecIdx, 1, p);
- }
- 
- int8x16_t fn3 (int8x16_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_s8(), vecIdx, 1, p);
- }
- 
- uint32x4_t fn4 (uint32x4_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_u32(), vecIdx, 1, p);
- }
- 
- uint16x8_t fn5 (uint16x8_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_u16(), vecIdx, 1, p);
- }
- 
- uint8x16_t fn6 (uint8x16_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_u8(), vecIdx, 1, p);
- }
- 
- float32x4_t fn7 (float32x4_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_f32(), vecIdx, (float32_t) 1.23, p);
- }
- 
- float16x8_t fn8 (float16x8_t vecIdx)
- {
-   return vaddq_m(vuninitializedq_f16(), vecIdx, (float16_t) 1.40, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_n.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_n.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_n.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_n.c	Thu Jan  1 00:00:00 1970
***************
*** 1,31 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include 
- int8x16_t foo (int8x16_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- int16x8_t foo1 (int16x8_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- int32x4_t foo2 (int32x4_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- uint8x16_t foo3 (uint8x16_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- uint16x8_t foo4 (uint16x8_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- uint32x4_t foo5 (uint32x4_t a, int16_t b)
- {
-   return vaddq (a, (b<<3));
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (uint16x8_t inactive, int32_t a, mve_pred16_t p)
- {
-   return vddupq_m (inactive, a, 1, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint32x4_t inactive, int32_t a, mve_pred16_t p)
- {
-   return vddupq_m (inactive, a, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint8x16_t
- foo1 (uint8x16_t inactive, int32_t a, mve_pred16_t p)
- {
-   return vddupq_m (inactive, a, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (int32_t a)
- {
-   return vddupq_u16 (a, 4);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (int32_t a)
- {
-   return vddupq_u32 (a, 1);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint8x16_t
- foo1 (int32_t a)
- {
-   return vddupq_u8 (a, 1);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint16x8_t
- foo1 (int32_t a, mve_pred16_t p)
- {
-   return vddupq_x_u16 (a, 1, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint32x4_t
- foo1 (int32_t a, mve_pred16_t p)
- {
-   return vddupq_x_u32 (a, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint8x16_t
- foo1 (int32_t a, mve_pred16_t p)
- {
-   return vddupq_x_u8 (a, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (int32_t a, uint32_t b, mve_pred16_t p)
- {
-   return vdwdupq_x_u16 (a, b, 1, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (int32_t a, uint32_t b, mve_pred16_t p)
- {
-   return vdwdupq_x_u32 (a, b, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint8x16_t
- foo1 (int32_t a, uint32_t b, mve_pred16_t p)
- {
-   return vdwdupq_x_u8 (a, b, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (uint16x8_t inactive, int32_t a, mve_pred16_t p)
- {
-   return vidupq_m (inactive, a, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint32x4_t
- foo1 (uint32x4_t inactive, int32_t a, mve_pred16_t p)
- {
-   return vidupq_m (inactive, a, 1, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint8x16_t
- foo1 (uint8x16_t inactive, int32_t a, mve_pred16_t p)
- {
-   return vidupq_m (inactive, a, 1, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (int32_t a)
- {
-   return vidupq_u16 (a, 4);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint32x4_t
- foo1 (int32_t a)
- {
-   return vidupq_u32 (a, 1);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint8x16_t
- foo1 (int32_t a)
- {
-   return vidupq_u8 (a, 1);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint16x8_t
- foo1 (int32_t a, mve_pred16_t p)
- {
-   return vidupq_x_u16 (a, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint32x4_t
- foo1 (int32_t a, mve_pred16_t p)
- {
-   return vidupq_x_u32 (a, 1, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint8x16_t
- foo1 (int32_t a, mve_pred16_t p)
- {
-   return vidupq_x_u8 (a, 1, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (int32_t a, uint32_t b, mve_pred16_t p)
- {
-   return viwdupq_x_u16 (a, b, 2, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (int32_t a, uint32_t b, mve_pred16_t p)
- {
-   return viwdupq_x_u32 (a, b, 4, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint8x16_t
- foo1 (int32_t a, uint32_t b, mve_pred16_t p)
- {
-   return viwdupq_x_u8 (a, b, 8, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_s64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int64x2_t
- foo1 (int64_t * base, uint64x2_t offset)
- {
-   return vldrdq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_u64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint64x2_t
- foo1 (uint64_t * base, uint64x2_t offset)
- {
-   return vldrdq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_s64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int64x2_t
- foo1 (int64_t * base, uint64x2_t offset, mve_pred16_t p)
- {
-   return vldrdq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_u64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint64x2_t
- foo1 (uint64_t * base, uint64x2_t offset, mve_pred16_t p)
- {
-   return vldrdq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_s64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int64x2_t
- foo1 (int64_t * base, uint64x2_t offset)
- {
-   return vldrdq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_u64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint64x2_t
- foo1 (uint64_t * base, uint64x2_t offset)
- {
-   return vldrdq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_s64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int64x2_t
- foo1 (int64_t * base, uint64x2_t offset, mve_pred16_t p)
- {
-   return vldrdq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_u64.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint64x2_t
- foo1 (uint64_t * base, uint64x2_t offset, mve_pred16_t p)
- {
-   return vldrdq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_f16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16_t * base, uint16x8_t offset)
- {
-   return vldrhq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int16x8_t
- foo1 (int16_t * base, uint16x8_t offset)
- {
-   return vldrhq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int32x4_t
- foo1 (int16_t * base, uint32x4_t offset)
- {
-   return vldrhq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint16x8_t
- foo1 (uint16_t * base, uint16x8_t offset)
- {
-   return vldrhq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint16_t * base, uint32x4_t offset)
- {
-   return vldrhq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_f16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16_t * base, uint16x8_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int16x8_t
- foo1 (int16_t * base, uint16x8_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int32x4_t
- foo1 (int16_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (uint16_t * base, uint16x8_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint16_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_f16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16_t * base, uint16x8_t offset)
- {
-   return vldrhq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- int16x8_t
- foo1 (int16_t * base, uint16x8_t offset)
- {
-   return vldrhq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- int32x4_t
- foo1 (int16_t * base, uint32x4_t offset)
- {
-   return vldrhq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint16x8_t
- foo1 (uint16_t * base, uint16x8_t offset)
- {
-   return vldrhq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint16_t * base, uint32x4_t offset)
- {
-   return vldrhq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_f16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16_t * base, uint16x8_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler "vldrht.f16"  }  } */
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int16x8_t
- foo1 (int16_t * base, uint16x8_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler "vldrht.u16"  }  } */
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- int32x4_t
- foo1 (int16_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u16.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint16x8_t
- foo1 (uint16_t * base, uint16x8_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- uint32x4_t
- foo1 (uint16_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrhq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_f32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32_t * base, uint32x4_t offset)
- {
-   return vldrwq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- int32x4_t
- foo1 (int32_t * base, uint32x4_t offset)
- {
-   return vldrwq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint32_t * base, uint32x4_t offset)
- {
-   return vldrwq_gather_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_f32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrwq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- int32x4_t
- foo1 (int32_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrwq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint32_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrwq_gather_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_f32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32_t * base, uint32x4_t offset)
- {
-   return vldrwq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- int32x4_t
- foo1 (int32_t * base, uint32x4_t offset)
- {
-   return vldrwq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint32_t * base, uint32x4_t offset)
- {
-   return vldrwq_gather_shifted_offset (base, offset);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_f32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrwq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_s32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- int32x4_t
- foo1 (int32_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrwq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_u32.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_ok } */
- /* { dg-add-options arm_v8_1m_mve } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- uint32x4_t
- foo1 (uint32_t * base, uint32x4_t offset, mve_pred16_t p)
- {
-   return vldrwq_gather_shifted_offset_z (base, offset, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c	Thu Jan  1 00:00:00 1970
***************
*** 1,141 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- int
- foowu32( uint32_t * pDataSrc, uint32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     uint32x4_t vecIn1 = vldrwq_u32 ((uint32_t const *) pDataSrc);
-     uint32x4_t vecIn2 = vldrwq_u32 ((uint32_t const *) &pDataSrc[4]);
-     vstrwq_scatter_shifted_offset_u32 (pDataDest, vecOffs1, vecIn1);
-     vstrwq_scatter_shifted_offset_u32 (pDataDest, vecOffs2, vecIn2);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foowf32( float32_t * pDataSrc, float32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     float32x4_t vecIn1 = vldrwq_f32 ((float32_t const *) pDataSrc);
-     float32x4_t vecIn2 = vldrwq_f32 ((float32_t const *) &pDataSrc[4]);
-     vstrwq_scatter_shifted_offset_f32 (pDataDest, vecOffs1, vecIn1);
-     vstrwq_scatter_shifted_offset_f32 (pDataDest, vecOffs2, vecIn2);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foohu16( uint16_t * pDataSrc, uint16_t * pDataDest)
- {
-     const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5};
-     const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14};
-     uint16x8_t vecIn1 = vldrhq_u16 ((uint16_t const *) pDataSrc);
-     uint16x8_t vecIn2 = vldrhq_u16 ((uint16_t const *) &pDataSrc[8]);
-     vstrhq_scatter_shifted_offset_u16 (pDataDest, vecOffs1, vecIn1);
-     vstrhq_scatter_shifted_offset_u16 (pDataDest, vecOffs2, vecIn2);
-     pDataDest[16] = pDataSrc[16];
-     return 0;
- }
- 
- int
- foohu32( uint32_t * pDataSrc, uint32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     uint32x4_t vecIn1 = vldrhq_u32 ((uint16_t const *) pDataSrc);
-     uint32x4_t vecIn2 = vldrhq_u32 ((uint16_t const *) &pDataSrc[4]);
-     vstrhq_scatter_shifted_offset_u32 ((uint16_t *)pDataDest, vecOffs1, vecIn1);
-     vstrhq_scatter_shifted_offset_u32 ((uint16_t *)pDataDest, vecOffs2, vecIn2);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foohf16( float16_t * pDataSrc, float16_t * pDataDest)
- {
-     const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5};
-     const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14};
-     float16x8_t vecIn1 = vldrhq_f16 ((float16_t const *) pDataSrc);
-     float16x8_t vecIn2 = vldrhq_f16 ((float16_t const *) &pDataSrc[8]);
-     vstrhq_scatter_shifted_offset_f16 (pDataDest, vecOffs1, vecIn1);
-     vstrhq_scatter_shifted_offset_f16 (pDataDest, vecOffs2, vecIn2);
-     pDataDest[16] = pDataSrc[16];
-     return 0;
- }
- 
- int
- foodu64( uint64_t * pDataSrc, uint64_t * pDataDest)
- {
-     const uint64x2_t vecOffs1 = { 0, 1};
-     const uint64x2_t vecOffs2 = { 2, 3};
-     uint32x4_t vecIn1 = vldrwq_u32 ((uint32_t const *) pDataSrc);
-     uint32x4_t vecIn2 = vldrwq_u32 ((uint32_t const *) &pDataSrc[2]);
- 
-     vstrdq_scatter_shifted_offset_u64 (pDataDest, vecOffs1, (uint64x2_t) vecIn1);
-     vstrdq_scatter_shifted_offset_u64 (pDataDest, vecOffs2, (uint64x2_t) vecIn2);
- 
-     pDataDest[2] = pDataSrc[2];
-     return 0;
- }
- 
- int
- foows32( int32_t * pDataSrc, int32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     int32x4_t vecIn1 = vldrwq_s32 ((int32_t const *) pDataSrc);
-     int32x4_t vecIn2 = vldrwq_s32 ((int32_t const *) &pDataSrc[4]);
-     vstrwq_scatter_shifted_offset_s32 (pDataDest, vecOffs1, vecIn1);
-     vstrwq_scatter_shifted_offset_s32 (pDataDest, vecOffs2, vecIn2);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foohs16( int16_t * pDataSrc, int16_t * pDataDest)
- {
-     const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5};
-     const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14};
-     int16x8_t vecIn1 = vldrhq_s16 ((int16_t const *) pDataSrc);
-     int16x8_t vecIn2 = vldrhq_s16 ((int16_t const *) &pDataSrc[8]);
-     vstrhq_scatter_shifted_offset_s16 (pDataDest, vecOffs1, vecIn1);
-     vstrhq_scatter_shifted_offset_s16 (pDataDest, vecOffs2, vecIn2);
-     pDataDest[16] = pDataSrc[16];
-     return 0;
- }
- 
- int
- foohs32( int32_t * pDataSrc, int32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     int32x4_t vecIn1 = vldrhq_s32 ((int16_t const *) pDataSrc);
-     int32x4_t vecIn2 = vldrhq_s32 ((int16_t const *) &pDataSrc[4]);
-     vstrhq_scatter_shifted_offset_s32 ((int16_t *)pDataDest, vecOffs1, vecIn1);
-     vstrhq_scatter_shifted_offset_s32 ((int16_t *)pDataDest, vecOffs2, vecIn2);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foods64( int64_t * pDataSrc, int64_t * pDataDest)
- {
-     const uint64x2_t vecOffs1 = { 0, 1};
-     const uint64x2_t vecOffs2 = { 2, 3};
-     int32x4_t vecIn1 = vldrwq_s32 ((int32_t const *) pDataSrc);
-     int32x4_t vecIn2 = vldrwq_s32 ((int32_t const *) &pDataSrc[2]);
- 
-     vstrdq_scatter_shifted_offset_s64 (pDataDest, vecOffs1, (int64x2_t) vecIn1);
-     vstrdq_scatter_shifted_offset_s64 (pDataDest, vecOffs2, (int64x2_t) vecIn2);
- 
-     pDataDest[2] = pDataSrc[2];
-     return 0;
- }
- 
- /* { dg-final { scan-assembler-times "vstr\[a-z\]" 20 } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c	Thu Jan  1 00:00:00 1970
***************
*** 1,142 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- 
- mve_pred16_t __p;
- int
- foowu32( uint32_t * pDataSrc, uint32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     uint32x4_t vecIn1 = vldrwq_z_u32 ((uint32_t const *) pDataSrc, __p);
-     uint32x4_t vecIn2 = vldrwq_z_u32 ((uint32_t const *) &pDataSrc[4], __p);
-     vstrwq_scatter_shifted_offset_p_u32 (pDataDest, vecOffs1, vecIn1, __p);
-     vstrwq_scatter_shifted_offset_p_u32 (pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foowf32( float32_t * pDataSrc, float32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     float32x4_t vecIn1 = vldrwq_z_f32 ((float32_t const *) pDataSrc, __p);
-     float32x4_t vecIn2 = vldrwq_z_f32 ((float32_t const *) &pDataSrc[4], __p);
-     vstrwq_scatter_shifted_offset_p_f32 (pDataDest, vecOffs1, vecIn1, __p);
-     vstrwq_scatter_shifted_offset_p_f32 (pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foohu16( uint16_t * pDataSrc, uint16_t * pDataDest)
- {
-     const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5};
-     const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14};
-     uint16x8_t vecIn1 = vldrhq_z_u16 ((uint16_t const *) pDataSrc, __p);
-     uint16x8_t vecIn2 = vldrhq_z_u16 ((uint16_t const *) &pDataSrc[8], __p);
-     vstrhq_scatter_shifted_offset_p_u16 (pDataDest, vecOffs1, vecIn1, __p);
-     vstrhq_scatter_shifted_offset_p_u16 (pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[16] = pDataSrc[16];
-     return 0;
- }
- 
- int
- foohu32( uint32_t * pDataSrc, uint32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     uint32x4_t vecIn1 = vldrhq_z_u32 ((uint16_t const *) pDataSrc, __p);
-     uint32x4_t vecIn2 = vldrhq_z_u32 ((uint16_t const *) &pDataSrc[4], __p);
-     vstrhq_scatter_shifted_offset_p_u32 ((uint16_t *)pDataDest, vecOffs1, vecIn1, __p);
-     vstrhq_scatter_shifted_offset_p_u32 ((uint16_t *)pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foohf16( float16_t * pDataSrc, float16_t * pDataDest)
- {
-     const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5};
-     const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14};
-     float16x8_t vecIn1 = vldrhq_z_f16 ((float16_t const *) pDataSrc, __p);
-     float16x8_t vecIn2 = vldrhq_z_f16 ((float16_t const *) &pDataSrc[8], __p);
-     vstrhq_scatter_shifted_offset_p_f16 (pDataDest, vecOffs1, vecIn1, __p);
-     vstrhq_scatter_shifted_offset_p_f16 (pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[16] = pDataSrc[16];
-     return 0;
- }
- 
- int
- foodu64( uint64_t * pDataSrc, uint64_t * pDataDest)
- {
-     const uint64x2_t vecOffs1 = { 0, 1};
-     const uint64x2_t vecOffs2 = { 2, 3};
-     uint32x4_t vecIn1 = vldrwq_z_u32 ((uint32_t const *) pDataSrc, __p);
-     uint32x4_t vecIn2 = vldrwq_z_u32 ((uint32_t const *) &pDataSrc[2], __p);
- 
-     vstrdq_scatter_shifted_offset_p_u64 (pDataDest, vecOffs1, (uint64x2_t) vecIn1, __p);
-     vstrdq_scatter_shifted_offset_p_u64 (pDataDest, vecOffs2, (uint64x2_t) vecIn2, __p);
- 
-     pDataDest[2] = pDataSrc[2];
-     return 0;
- }
- 
- int
- foows32( int32_t * pDataSrc, int32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     int32x4_t vecIn1 = vldrwq_z_s32 ((int32_t const *) pDataSrc, __p);
-     int32x4_t vecIn2 = vldrwq_z_s32 ((int32_t const *) &pDataSrc[4], __p);
-     vstrwq_scatter_shifted_offset_p_s32 (pDataDest, vecOffs1, vecIn1, __p);
-     vstrwq_scatter_shifted_offset_p_s32 (pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foohs16( int16_t * pDataSrc, int16_t * pDataDest)
- {
-     const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5};
-     const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14};
-     int16x8_t vecIn1 = vldrhq_z_s16 ((int16_t const *) pDataSrc, __p);
-     int16x8_t vecIn2 = vldrhq_z_s16 ((int16_t const *) &pDataSrc[8], __p);
-     vstrhq_scatter_shifted_offset_p_s16 (pDataDest, vecOffs1, vecIn1, __p);
-     vstrhq_scatter_shifted_offset_p_s16 (pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[16] = pDataSrc[16];
-     return 0;
- }
- 
- int
- foohs32( int32_t * pDataSrc, int32_t * pDataDest)
- {
-     const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
-     const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
-     int32x4_t vecIn1 = vldrhq_z_s32 ((int16_t const *) pDataSrc, __p);
-     int32x4_t vecIn2 = vldrhq_z_s32 ((int16_t const *) &pDataSrc[4], __p);
-     vstrhq_scatter_shifted_offset_p_s32 ((int16_t *)pDataDest, vecOffs1, vecIn1, __p);
-     vstrhq_scatter_shifted_offset_p_s32 ((int16_t *)pDataDest, vecOffs2, vecIn2, __p);
-     pDataDest[8] = pDataSrc[8];
-     return 0;
- }
- 
- int
- foods64( int64_t * pDataSrc, int64_t * pDataDest)
- {
-     const uint64x2_t vecOffs1 = { 0, 1};
-     const uint64x2_t vecOffs2 = { 2, 3};
-     int32x4_t vecIn1 = vldrwq_z_s32 ((int32_t const *) pDataSrc, __p);
-     int32x4_t vecIn2 = vldrwq_z_s32 ((int32_t const *) &pDataSrc[2], __p);
- 
-     vstrdq_scatter_shifted_offset_p_s64 (pDataDest, vecOffs1, (int64x2_t) vecIn1, __p);
-     vstrdq_scatter_shifted_offset_p_s64 (pDataDest, vecOffs2, (int64x2_t) vecIn2, __p);
- 
-     pDataDest[2] = pDataSrc[2];
-     return 0;
- }
- 
- /* { dg-final { scan-assembler-times "vstr\[a-z\]t" 20 } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! sqrshr_reg (int32_t longval3, int32_t x)
  {
!   return sqrshr (longval3, x);
  }
  
! /* { dg-final { scan-assembler "sqrshr\\tr\[0-9\]+, r\[0-9\]+" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	sqrshr	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t value, int32_t shift)
  {
!   return sqrshr (value, shift);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! sqrshrl_reg (int64_t longval3, int32_t x)
  {
!   return sqrshrl_sat48 (longval3, x);
  }
  
! /* { dg-final { scan-assembler "sqrshrl\\tr\[0-9\]+, r\[0-9\]+, #48, r\[0-9\]+" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	sqrshrl	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #48, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t value, int32_t shift)
  {
!   return sqrshrl_sat48 (value, shift);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! sqshl_imm (int32_t longval3)
  {
!   return sqshl (longval3, 25);
  }
  
! /* { dg-final { scan-assembler "sqshl\\tr\[0-9\]+, #25" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	sqshl	(?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t value)
  {
!   return sqshl (value, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! sqshll_imm(int64_t value)
  {
!   return sqshll (value, 21);
  }
  
! /* { dg-final { scan-assembler "sqshll\\tr\[0-9\]+, r\[0-9\]+, #21" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	sqshll	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t value)
  {
!   return sqshll (value, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! srshr_imm (int32_t longval3)
  {
!   return srshr (longval3, 25);
  }
  
! /* { dg-final { scan-assembler "srshr\\tr\[0-9\]+, #25" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	srshr	(?:ip|fp|r[0-9]+), #1(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t value)
  {
!   return srshr (value, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! srshrl_imm(int64_t value)
  {
!   return srshrl (value, 21);
  }
  
! /* { dg-final { scan-assembler "srshrl\\tr\[0-9\]+, r\[0-9\]+, #21" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	srshrl	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #1(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t value)
  {
!   return srshrl (value, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! uqrshl_reg (uint32_t longval3, int32_t x)
  {
!   return uqrshl (longval3, x);
  }
  
! /* { dg-final { scan-assembler "uqrshl\\tr\[0-9\]+, r\[0-9\]+" } } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	uqrshl	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t value, int32_t shift)
  {
!   return uqrshl (value, shift);
  }
  
! /*
! **foo1:
! **	...
! **	uqrshl	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32_t
! foo1 (int32_t shift)
! {
!   return uqrshl (1, shift);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! uqrshll_reg (uint64_t longval3, int32_t x)
  {
!   return uqrshll_sat48 (longval3, x);
  }
  
! /* { dg-final { scan-assembler "uqrshll\\tr\[0-9\]+, r\[0-9\]+, #48, r\[0-9\]+" } } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	uqrshll	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #48, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t value, int32_t shift)
  {
!   return uqrshll_sat48 (value, shift);
  }
  
! /*
! **foo1:
! **	...
! **	uqrshll	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #48, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint64_t
! foo1 (int32_t shift)
! {
!   return uqrshll_sat48 (1, shift);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! uqshl_imm (uint32_t longval3)
  {
!   return uqshl (longval3, 21);
  }
  
! /* { dg-final { scan-assembler "uqshl\\tr\[0-9\]+, #21" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	uqshl	(?:ip|fp|r[0-9]+), #1(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t value)
  {
!   return uqshl (value, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! uqshll_imm(uint64_t value)
  {
!   return uqshll (value, 21);
  }
  
! /* { dg-final { scan-assembler "uqshll\\tr\[0-9\]+, r\[0-9\]+, #21" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	uqshll	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #1(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t value)
  {
!   return uqshll (value, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! uint64_t
! urshr_imm (uint32_t longval3)
  {
!   return urshr (longval3, 21);
  }
  
! /* { dg-final { scan-assembler "urshr\\tr\[0-9\]+, #21" } } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
! 
! /*
! **foo:
! **	...
! **	urshr	(?:ip|fp|r[0-9]+), #1(?:	@.*|)
! **	...
! */
! uint32_t
! foo (uint32_t value)
  {
!   return urshr (value, 1);
  }
  
! /*
! **foo1:
! **	...
! **	urshr	(?:ip|fp|r[0-9]+), #1(?:	@.*|)
! **	...
! */
! uint32_t
! foo1 ()
! {
!   return urshr (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! urshrl_imm(uint64_t value)
  {
!   return urshrl (value, 21);
  }
  
! /* { dg-final { scan-assembler "urshrl\\tr\[0-9\]+, r\[0-9\]+, #21" } } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	urshrl	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #1(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t value)
  {
!   return urshrl (value, 1);
  }
  
! /*
! **foo1:
! **	...
! **	urshrl	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #1(?:	@.*|)
! **	...
! */
! uint64_t
! foo1 ()
! {
!   return urshrl (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vabavq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vabavt.s16"  }  } */
  
  uint32_t
  foo1 (uint32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vabavt.s16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vabavq_p_s16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vabavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int16x8_t b, int16x8_t c, mve_pred16_t p)
! {
!   return vabavq_p (1, b, c, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vabavq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vabavt.s32"  }  } */
  
  uint32_t
  foo1 (uint32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vabavt.s32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vabavq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vabavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int32x4_t b, int32x4_t c, mve_pred16_t p)
! {
!   return vabavq_p (1, b, c, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vabavq_p_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vabavt.s8"  }  } */
  
  uint32_t
  foo1 (uint32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vabavt.s8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vabavq_p_s8 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vabavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int8x16_t b, int8x16_t c, mve_pred16_t p)
! {
!   return vabavq_p (1, b, c, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
    return vabavq_p_u16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vabavt.u16"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vabavt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
    return vabavq_p_u16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vabavt.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint16x8_t b, uint16x8_t c, mve_pred16_t p)
! {
!   return vabavq_p (1, b, c, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vabavq_p_u32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vabavt.u32"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vabavt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vabavq_p_u32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vabavt.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint32x4_t b, uint32x4_t c, mve_pred16_t p)
! {
!   return vabavq_p (1, b, c, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p)
  {
    return vabavq_p_u8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vabavt.u8"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vabavt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p)
  {
    return vabavq_p_u8 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabavt.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p)
  {
    return vabavq_p (a, b, c, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vabavt.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint8x16_t b, uint8x16_t c, mve_pred16_t p)
! {
!   return vabavq_p (1, b, c, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, int16x8_t b, int16x8_t c)
  {
    return vabavq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vabav.s16"  }  } */
  
  uint32_t
  foo1 (uint32_t a, int16x8_t b, int16x8_t c)
  {
    return vabavq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vabav.s16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabav.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int16x8_t b, int16x8_t c)
  {
    return vabavq_s16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabav.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int16x8_t b, int16x8_t c)
  {
    return vabavq (a, b, c);
  }
  
! /*
! **foo2:
! **	...
! **	vabav.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int16x8_t b, int16x8_t c)
! {
!   return vabavq (1, b, c);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, int32x4_t b, int32x4_t c)
  {
    return vabavq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vabav.s32"  }  } */
  
  uint32_t
  foo1 (uint32_t a, int32x4_t b, int32x4_t c)
  {
    return vabavq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vabav.s32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabav.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int32x4_t b, int32x4_t c)
  {
    return vabavq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabav.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int32x4_t b, int32x4_t c)
  {
    return vabavq (a, b, c);
  }
  
! /*
! **foo2:
! **	...
! **	vabav.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int32x4_t b, int32x4_t c)
! {
!   return vabavq (1, b, c);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, int8x16_t b, int8x16_t c)
  {
    return vabavq_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vabav.s8"  }  } */
  
  uint32_t
  foo1 (uint32_t a, int8x16_t b, int8x16_t c)
  {
    return vabavq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vabav.s8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabav.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int8x16_t b, int8x16_t c)
  {
    return vabavq_s8 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabav.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int8x16_t b, int8x16_t c)
  {
    return vabavq (a, b, c);
  }
  
! /*
! **foo2:
! **	...
! **	vabav.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int8x16_t b, int8x16_t c)
! {
!   return vabavq (1, b, c);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint16x8_t b, uint16x8_t c)
  {
    return vabavq_u16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vabav.u16"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint16x8_t b, uint16x8_t c)
  {
    return vabavq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vabav.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabav.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint16x8_t b, uint16x8_t c)
  {
    return vabavq_u16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabav.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint16x8_t b, uint16x8_t c)
  {
    return vabavq (a, b, c);
  }
  
! /*
! **foo2:
! **	...
! **	vabav.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint16x8_t b, uint16x8_t c)
! {
!   return vabavq (1, b, c);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint32x4_t b, uint32x4_t c)
  {
    return vabavq_u32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vabav.u32"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, uint32x4_t c)
  {
    return vabavq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vabav.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabav.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b, uint32x4_t c)
  {
    return vabavq_u32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabav.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, uint32x4_t c)
  {
    return vabavq (a, b, c);
  }
  
! /*
! **foo2:
! **	...
! **	vabav.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint32x4_t b, uint32x4_t c)
! {
!   return vabavq (1, b, c);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint8x16_t b, uint8x16_t c)
  {
    return vabavq_u8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vabav.u8"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint8x16_t b, uint8x16_t c)
  {
    return vabavq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vabav.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabav.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint8x16_t b, uint8x16_t c)
  {
    return vabavq_u8 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabav.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint8x16_t b, uint8x16_t c)
  {
    return vabavq (a, b, c);
  }
  
! /*
! **foo2:
! **	...
! **	vabav.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint8x16_t b, uint8x16_t c)
! {
!   return vabavq (1, b, c);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vabdq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vabdq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vabdq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vabdq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vabdq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vabdq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vabdq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vabdq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vabdq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vabdq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vabdq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vabdq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vabdq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vabdq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vabdq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vabd.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vabdq (a, b);
  }
  
! /* { dg-final { scan-assembler "vabd.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vabdq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vabdq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vabdt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabdt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabdt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vabdq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vabsq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vabs.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabs.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vabsq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vabs.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vabsq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vabsq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vabs.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabs.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vabsq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vabs.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vabsq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vabsq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vabsq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vabsq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vabsq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vabsq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vabsq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vabsq_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vabsq_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vabsq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vabsq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vabsq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vabs.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vabsq (a);
  }
  
! /* { dg-final { scan-assembler "vabs.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabs.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vabsq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabs.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vabsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vabsq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vabs.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vabsq (a);
  }
  
! /* { dg-final { scan-assembler "vabs.s32"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabs.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vabsq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabs.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vabsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vabsq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vabs.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vabsq (a);
  }
  
! /* { dg-final { scan-assembler "vabs.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vabs.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vabsq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vabs.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vabsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vabsq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vabsq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vabsq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vabsq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vabsq_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vabsq_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vabsq_x_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vabsq_x_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vabsq_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vabst.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vabsq_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vabst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vabsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vadciq_m_s32 (inactive, a, b, carry_out, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vadcit.i32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vadciq_m (inactive, a, b, carry_out, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vadcit.i32"  }  } */
--- 1,57 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vadciq_m_s32 (inactive, a, b, carry_out, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vadciq_m (inactive, a, b, carry_out, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vadciq_m_u32 (inactive, a, b, carry_out, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vadcit.i32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vadciq_m (inactive, a, b, carry_out, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vadcit.i32"  }  } */
--- 1,57 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vadciq_m_u32 (inactive, a, b, carry_out, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vadciq_m (inactive, a, b, carry_out, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned * carry_out)
  {
    return vadciq_s32 (a, b, carry_out);
  }
  
- /* { dg-final { scan-assembler "vadci.i32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned * carry_out)
  {
    return vadciq (a, b, carry_out);
  }
  
! /* { dg-final { scan-assembler "vadci.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned *carry_out)
  {
    return vadciq_s32 (a, b, carry_out);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned *carry_out)
  {
    return vadciq (a, b, carry_out);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned * carry_out)
  {
    return vadciq_u32 (a, b, carry_out);
  }
  
- /* { dg-final { scan-assembler "vadci.i32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry_out)
  {
    return vadciq (a, b, carry_out);
  }
  
! /* { dg-final { scan-assembler "vadci.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned *carry_out)
  {
    return vadciq_u32 (a, b, carry_out);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry_out)
  {
    return vadciq (a, b, carry_out);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p)
  {
    return vadcq_m_s32 (inactive, a, b, carry, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vadct.i32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p)
  {
    return vadcq_m (inactive, a, b, carry, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vadct.i32"  }  } */
--- 1,77 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p)
  {
    return vadcq_m_s32 (inactive, a, b, carry, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p)
  {
    return vadcq_m (inactive, a, b, carry, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p)
  {
    return vadcq_m_u32 (inactive, a, b, carry, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vadct.i32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p)
  {
    return vadcq_m (inactive, a, b, carry, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vadct.i32"  }  } */
--- 1,77 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p)
  {
    return vadcq_m_u32 (inactive, a, b, carry, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vadct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p)
  {
    return vadcq_m (inactive, a, b, carry, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned * carry)
  {
    return vadcq_s32 (a, b, carry);
  }
  
- /* { dg-final { scan-assembler "vadc.i32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned * carry)
  {
    return vadcq (a, b, carry);
  }
  
! /* { dg-final { scan-assembler "vadc.i32"  }  } */
--- 1,69 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vadc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned *carry)
  {
    return vadcq_s32 (a, b, carry);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vadc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned *carry)
  {
    return vadcq (a, b, carry);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned * carry)
  {
    return vadcq_u32 (a, b, carry);
  }
  
- /* { dg-final { scan-assembler "vadc.i32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry)
  {
    return vadcq (a, b, carry);
  }
  
! /* { dg-final { scan-assembler "vadc.i32"  }  } */
--- 1,69 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vadc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned *carry)
  {
    return vadcq_u32 (a, b, carry);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vadc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry)
  {
    return vadcq (a, b, carry);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddlvat.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddlvat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint64_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddlvat.u32"  }  } */
  
  uint64_t
  foo1 (uint64_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddlvat.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint64_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint64_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddlvaq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddlvat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint64_t
! foo2 (uint32x4_t b, mve_pred16_t p)
! {
!   return vaddlvaq_p (1, b, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b)
  {
    return vaddlvaq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddlva.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b)
  {
    return vaddlvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddlva.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddlva.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b)
  {
    return vaddlvaq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddlva.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b)
  {
    return vaddlvaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint64_t a, uint32x4_t b)
  {
    return vaddlvaq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddlva.u32"  }  } */
  
  uint64_t
  foo1 (uint64_t a, uint32x4_t b)
  {
    return vaddlvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddlva.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddlva.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint64_t a, uint32x4_t b)
  {
    return vaddlvaq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddlva.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint64_t a, uint32x4_t b)
  {
    return vaddlvaq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vaddlva.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint64_t
! foo2 (uint32x4_t b)
! {
!   return vaddlvaq (1, b);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddlvt.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddlvt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p_u32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddlvt.u32"  }  } */
  
  uint64_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddlvt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvt.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p_u32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddlvt.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vaddlvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a)
  {
    return vaddlvq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vaddlv.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a)
  {
!   return vaddlvq_s32 (a);
  }
  
! /* { dg-final { scan-assembler "vaddlv.s32"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddlv.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a)
  {
    return vaddlvq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddlv.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a)
  {
!   return vaddlvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint32x4_t a)
  {
!     return vaddlvq_u32 (a);
  }
  
- /* { dg-final { scan-assembler "vaddlv.u32"  }  } */
  
  uint64_t
  foo1 (uint32x4_t a)
  {
!     return vaddlvq (a);
  }
  
! /* { dg-final { scan-assembler "vaddlv.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddlv.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint32x4_t a)
  {
!   return vaddlvq_u32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddlv.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint32x4_t a)
  {
!   return vaddlvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vaddq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vaddq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vaddq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vaddq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vaddq_m (inactive, a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_m_n_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_m_n_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
! {
!   return vaddq_m (inactive, a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vaddq_m (inactive, a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_m_n_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_m_n_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
! {
!   return vaddq_m (inactive, a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
! {
!   return vaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
! {
!   return vaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
! {
!   return vaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16_t b)
  {
    return vaddq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.f16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16_t b)
  {
    return vaddq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vadd.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t a)
! {
!   return vaddq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32_t b)
  {
    return vaddq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.f32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32_t b)
  {
    return vaddq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vadd.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t a)
! {
!   return vaddq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vaddq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vaddq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vaddq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vaddq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vaddq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vaddq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vaddq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vaddq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vadd.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a)
! {
!   return vaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vaddq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vaddq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vadd.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a)
! {
!   return vaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vaddq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vaddq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vadd.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a)
! {
!   return vaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vaddq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vaddq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vaddq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vaddq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vaddq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vaddq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vaddq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vaddq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vaddq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vaddq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vaddq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vadd.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vadd.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vaddq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vadd.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vaddq_x (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_x_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_x_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vaddq_x (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vaddq_x (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_x_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.f32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_x_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vaddq_x (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_x_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_x_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_x_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_x_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_x_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_x_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_x_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_x_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vaddq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_x_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_x_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vaddq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_x_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_x_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vaddq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddvat.s16"  }  } */
  
  int32_t
  foo1 (int32_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddvat.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddvat.s32"  }  } */
  
  int32_t
  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddvat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddvat.s8"  }  } */
  
  int32_t
  foo1 (int32_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddvat.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddvat.u16"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddvat.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddvat.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint16x8_t b, mve_pred16_t p)
! {
!   return vaddvaq_p (1, b, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddvat.u32"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddvat.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddvat.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint32x4_t b, mve_pred16_t p)
! {
!   return vaddvaq_p (1, b, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vaddvat.u8"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vaddvat.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvat.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vaddvaq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vaddvat.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint8x16_t b, mve_pred16_t p)
! {
!   return vaddvaq_p (1, b, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int16x8_t b)
  {
    return vaddvaq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddva.s16"  }  } */
  
  int32_t
  foo1 (int32_t a, int16x8_t b)
  {
    return vaddvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddva.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddva.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int16x8_t b)
  {
    return vaddvaq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddva.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int16x8_t b)
  {
    return vaddvaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int32x4_t b)
  {
    return vaddvaq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddva.s32"  }  } */
  
  int32_t
  foo1 (int32_t a, int32x4_t b)
  {
    return vaddvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddva.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddva.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b)
  {
    return vaddvaq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddva.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b)
  {
    return vaddvaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int8x16_t b)
  {
    return vaddvaq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddva.s8"  }  } */
  
  int32_t
  foo1 (int32_t a, int8x16_t b)
  {
    return vaddvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddva.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddva.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int8x16_t b)
  {
    return vaddvaq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddva.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int8x16_t b)
  {
    return vaddvaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint16x8_t b)
  {
    return vaddvaq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddva.u16"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint16x8_t b)
  {
    return vaddvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddva.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddva.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint16x8_t b)
  {
    return vaddvaq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddva.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint16x8_t b)
  {
    return vaddvaq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vaddva.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint16x8_t b)
! {
!   return vaddvaq (1, b);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint32x4_t b)
  {
    return vaddvaq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddva.u32"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b)
  {
    return vaddvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddva.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddva.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b)
  {
    return vaddvaq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddva.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b)
  {
    return vaddvaq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vaddva.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint32x4_t b)
! {
!   return vaddvaq (1, b);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32_t a, uint8x16_t b)
  {
    return vaddvaq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vaddva.u8"  }  } */
  
  uint32_t
  foo1 (uint32_t a, uint8x16_t b)
  {
    return vaddvaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vaddva.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddva.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint8x16_t b)
  {
    return vaddvaq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddva.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint8x16_t b)
  {
    return vaddvaq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vaddva.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint8x16_t b)
! {
!   return vaddvaq (1, b);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddvt.s16"  }  } */
  
  int32_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddvt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddvt.s32"  }  } */
  
  int32_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddvt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddvt.s8"  }  } */
  
  int32_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddvt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddvt.u16"  }  } */
  
  uint32_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddvt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p_u32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddvt.u32"  }  } */
  
  uint32_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddvt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p_u32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vaddvt.u8"  }  } */
  
  uint32_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! /* { dg-final { scan-assembler "vaddvt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vaddvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vaddvq_p (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int16x8_t a)
  {
    return vaddvq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vaddv.s16"  }  } */
  
  int32_t
  foo1 (int16x8_t a)
  {
!   return vaddvq_s16 (a);
  }
  
! /* { dg-final { scan-assembler "vaddv.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddv.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int16x8_t a)
  {
    return vaddvq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddv.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int16x8_t a)
  {
!   return vaddvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32x4_t a)
  {
    return vaddvq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vaddv.s32"  }  } */
  
  int32_t
  foo1 (int32x4_t a)
  {
!   return vaddvq_s32 (a);
  }
  
! /* { dg-final { scan-assembler "vaddv.s32"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddv.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32x4_t a)
  {
    return vaddvq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddv.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32x4_t a)
  {
!   return vaddvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int8x16_t a)
  {
    return vaddvq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vaddv.s8"  }  } */
  
  int32_t
  foo1 (int8x16_t a)
  {
    return vaddvq (a);
  }
  
! /* { dg-final { scan-assembler "vaddv.s8"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddv.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int8x16_t a)
  {
    return vaddvq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddv.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int8x16_t a)
  {
    return vaddvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint16x8_t a)
  {
!     return vaddvq_u16 (a);
  }
  
- /* { dg-final { scan-assembler "vaddv.u16"  }  } */
  
  uint32_t
  foo1 (uint16x8_t a)
  {
!     return vaddvq (a);
  }
  
! /* { dg-final { scan-assembler "vaddv.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint16x8_t a)
  {
!   return vaddvq_u16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint16x8_t a)
  {
!   return vaddvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint32x4_t a)
  {
!     return vaddvq_u32 (a);
  }
  
- /* { dg-final { scan-assembler "vaddv.u32"  }  } */
  
  uint32_t
  foo1 (uint32x4_t a)
  {
!     return vaddvq (a);
  }
  
! /* { dg-final { scan-assembler "vaddv.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32x4_t a)
  {
!   return vaddvq_u32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32x4_t a)
  {
!   return vaddvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
  foo (uint8x16_t a)
  {
!     return vaddvq_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vaddv.u8"  }  } */
  
  uint32_t
  foo1 (uint8x16_t a)
  {
!     return vaddvq (a);
  }
  
! /* { dg-final { scan-assembler "vaddv.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vaddv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint8x16_t a)
  {
!   return vaddvq_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vaddv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint8x16_t a)
  {
!   return vaddvq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vandq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vandq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vandq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vandq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vandt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vandq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vandq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vandq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vandq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vandq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vandq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vandq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vandq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vandq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vandq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vandq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vand"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vandq (a, b);
  }
  
! /* { dg-final { scan-assembler "vand"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vandq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vand	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vandq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vandt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vandt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vandq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vbicq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vbicq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vbicq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vbicq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vbicq_m_n_s16 (a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
!   return vbicq_m_n (a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vbicq_m_n_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
!   return vbicq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n_s32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n_s32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vbicq_m_n_u16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vbicq_m_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vbicq_m_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vbicq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n_u32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vbicq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbict"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vbicq_n_s16 (a, 1);
  }
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vbicq (a, 1);
  }
  
! /* { dg-final { scan-assembler-times "vbic.i16" 2 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vbicq_n_s16 (a, 1);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vbic.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vbicq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vbicq_n_s32 (a, 1);
  }
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vbicq (a, 1);
  }
  
! /* { dg-final { scan-assembler-times "vbic.i32" 2 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vbicq_n_s32 (a, 1);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vbic.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vbicq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
    return vbicq_n_u16 (a, 1);
  }
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
    return vbicq (a, 1);
  }
  
! /* { dg-final { scan-assembler-times "vbic.i16" 2 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
    return vbicq_n_u16 (a, 1);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vbic.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
    return vbicq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
    return vbicq_n_u32 (a, 1);
  }
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
    return vbicq (a, 1);
  }
  
! /* { dg-final { scan-assembler-times "vbic.i32" 2 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
    return vbicq_n_u32 (a, 1);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vbic.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
    return vbicq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vbicq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vbicq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vbicq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vbicq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vbicq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vbicq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vbicq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vbicq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vbicq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vbicq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vbicq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbic"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vbicq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbic"  }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vbicq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vbicq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbict"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbict	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vbicq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, int32_t b)
  {
    return vbrsrq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, int32_t b)
  {
    return vbrsrq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, int32_t b)
  {
    return vbrsrq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, int32_t b)
  {
    return vbrsrq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vbrsrq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vbrsrq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vbrsrq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vbrsrq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vbrsrq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vbrsrq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vbrsrq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vbrsrq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vbrsrq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vbrsrq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vbrsrq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vbrsr.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vbrsr.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vbrsr.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vbrsrq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vbrsr.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vbrsrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vbrsrt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vbrsrt.8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vbrsrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot270_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot270_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot270_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot270_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot270_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot270_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot270_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot270_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot270_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot270_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot270_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot270_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot270_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot270_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot270_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot270_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot90_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot90_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot90_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot90_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot90_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot90_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot90_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot90_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot90_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot90_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot90_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot90_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot90_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot90_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot90_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcadd.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcadd.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot90_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcadd.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcaddt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcaddt.i8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclsq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclst.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclsq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclsq_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclst.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclsq_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclsq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclst.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclsq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vclsq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vcls.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vclsq (a);
  }
  
! /* { dg-final { scan-assembler "vcls.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcls.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vclsq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcls.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vclsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vclsq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vcls.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vclsq (a);
  }
  
! /* { dg-final { scan-assembler "vcls.s32"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcls.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vclsq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcls.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vclsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vclsq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vcls.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vclsq (a);
  }
  
! /* { dg-final { scan-assembler "vcls.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcls.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vclsq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcls.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vclsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vclsq_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclst.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vclsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vclsq_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vclsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vclsq_x_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclst.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vclsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vclsq_x_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vclsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vclsq_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclst.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vclsq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vclsq_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vclsq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclzq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclzq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclzq_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclzq_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclzq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclzq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_m_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_m_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_m_u32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_m_u32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_m_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_m_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vclzq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vclz.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vclzq (a);
  }
  
! /* { dg-final { scan-assembler "vclz.i16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vclz.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vclzq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vclz.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vclzq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vclzq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vclz.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vclzq (a);
  }
  
! /* { dg-final { scan-assembler "vclz.i32"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vclz.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vclzq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vclz.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vclzq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vclzq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vclz.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vclzq (a);
  }
  
! /* { dg-final { scan-assembler "vclz.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vclz.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vclzq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vclz.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vclzq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
!     return vclzq_u16 (a);
  }
  
- /* { dg-final { scan-assembler "vclz.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!     return vclzq (a);
  }
  
! /* { dg-final { scan-assembler "vclz.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vclz.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vclzq_u16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vclz.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vclzq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
!     return vclzq_u32 (a);
  }
  
- /* { dg-final { scan-assembler "vclz.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!     return vclzq (a);
  }
  
! /* { dg-final { scan-assembler "vclz.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vclz.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vclzq_u32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vclz.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!   return vclzq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
!     return vclzq_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vclz.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!     return vclzq (a);
  }
  
! /* { dg-final { scan-assembler "vclz.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vclz.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vclzq_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vclz.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vclzq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vclzq_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vclzq_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vclzq_x_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vclzq_x_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vclzq_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vclzq_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_x_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_x_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_x_u32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_x_u32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_x_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vclzt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_x_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vclzt.i8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vclzq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_f16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_f32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_m_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_m_f16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_m_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_m_f32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot180_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot180 (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot180_f16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot180 (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot180_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot180 (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot180_f32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot180 (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m_f16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m_f32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot180_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot270_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot270 (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot270_f16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot270 (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot270_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot270 (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot270_f32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot270 (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m_f16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m_f32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot270_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot90_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot90 (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot90_f16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
    return vcmlaq_rot90 (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot90_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vcmla.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot90 (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vcmla.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot90_f32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmla.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
    return vcmlaq_rot90 (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m_f16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmlat.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m_f32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmlat.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
    return vcmlaq_rot90_m (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vcmpcsq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vcmpcsq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vcmpcsq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpcsq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmpcsq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmpcsq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a)
! {
!   return vcmpcsq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmpcsq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmpcsq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a)
! {
!   return vcmpcsq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmpcsq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u8"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmpcsq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a)
! {
!   return vcmpcsq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmpcsq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u16	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmpcsq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u16	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmpcsq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmpcsq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u32	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmpcsq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u32	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmpcsq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmpcsq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmpcsq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u8	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmpcsq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u8	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmpcsq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpeqq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpeqq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpeqq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpeqq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vcmpeqq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vcmpeqq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vcmpeqq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vcmpeqq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vcmpeqq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vcmpeqq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vcmpeqq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpeqq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vcmpeqq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpeqq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpeqq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a)
! {
!   return vcmpeqq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vcmpeqq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpeqq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpeqq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a)
! {
!   return vcmpeqq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpeqq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpeqq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpeqq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpeqq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpeqq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpeqq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmpeqq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmpeqq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a)
! {
!   return vcmpeqq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmpeqq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmpeqq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a)
! {
!   return vcmpeqq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmpeqq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmpeqq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a)
! {
!   return vcmpeqq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpeqq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpeqq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpeqq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpeqq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpeqq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpeqq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmpeqq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmpeqq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmpeqq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmpeqq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmpeqq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmpeqq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmpeqq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpgeq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpgeq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpgeq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpgeq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vcmpgeq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vcmpgeq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vcmpgeq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vcmpgeq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgeq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vcmpgeq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpgeq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpgeq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a)
! {
!   return vcmpgeq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vcmpgeq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpgeq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpgeq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a)
! {
!   return vcmpgeq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpgeq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpgeq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpgeq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpgeq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpgeq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpgeq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpgeq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpgeq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpgeq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpgeq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpgeq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpgeq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpgeq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpgeq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpgtq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpgtq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpgtq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpgtq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vcmpgtq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vcmpgtq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vcmpgtq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vcmpgtq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpgtq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vcmpgtq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpgtq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpgtq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a)
! {
!   return vcmpgtq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vcmpgtq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpgtq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpgtq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a)
! {
!   return vcmpgtq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpgtq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpgtq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpgtq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpgtq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpgtq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpgtq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpgtq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpgtq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpgtq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpgtq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpgtq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpgtq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpgtq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpgtq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmphiq_m_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmphiq_m_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vcmphiq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmphiq_m_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmphiq_m_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vcmphiq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmphiq_m_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmphiq_m_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vcmphiq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmphiq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmphiq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u16	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmphiq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmphiq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u32	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmphiq_m_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmphiq_m_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.u8	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmphiq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmphiq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmphiq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmphiq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmphiq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a)
! {
!   return vcmphiq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmphiq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmphiq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmphiq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmphiq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a)
! {
!   return vcmphiq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmphiq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmphiq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u8"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmphiq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmphiq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a)
! {
!   return vcmphiq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmphiq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmphiq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u16	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmphiq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u16	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmphiq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmphiq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmphiq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u32	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmphiq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u32	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmphiq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmphiq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.u8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmphiq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.u8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.u8	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmphiq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.u8	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmphiq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpleq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpleq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpleq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpleq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vcmpleq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vcmpleq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vcmpleq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vcmpleq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpleq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpleq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpleq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpleq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vcmpleq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpleq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpleq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpleq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a)
! {
!   return vcmpleq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vcmpleq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpleq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpleq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpleq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a)
! {
!   return vcmpleq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpleq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpleq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpleq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpleq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpleq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpleq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpleq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpleq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpleq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpleq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpleq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpleq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpleq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	le, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpleq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpltq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpltq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpltq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpltq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vcmpltq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vcmpltq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vcmpltq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vcmpltq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpltq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpltq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpltq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.s8	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpltq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vcmpltq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpltq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpltq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpltq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a)
! {
!   return vcmpltq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vcmpltq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpltq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpltq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpltq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a)
! {
!   return vcmpltq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpltq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpltq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpltq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpltq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpltq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpltq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpltq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpltq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpltq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpltq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpltq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.s8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.s8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.s8	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpltq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.s8	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpneq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmpneq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpneq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmpneq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vcmpneq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vcmpneq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vcmpneq_m (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vcmpneq_m (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vcmpneq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vcmpneq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,71 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vcmpt.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vcmpneq_m (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmpt.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmpt.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vcmpneq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vcmpneq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpneq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f16"  }  } */
  
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float16x8_t a, float16_t b)
  {
    return vcmpneq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vcmpneq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float16x8_t a)
! {
!   return vcmpneq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- mve_pred16_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vcmpneq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpneq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.f32"  }  } */
  
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.f32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (float32x4_t a, float32_t b)
  {
    return vcmpneq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vcmpneq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (float32x4_t a)
! {
!   return vcmpneq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpneq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16_t b)
  {
    return vcmpneq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpneq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32_t b)
  {
    return vcmpneq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpneq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8_t b)
  {
    return vcmpneq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmpneq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vcmpneq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vcmpneq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint16x8_t a)
! {
!   return vcmpneq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmpneq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vcmpneq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vcmpneq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint32x4_t a)
! {
!   return vcmpneq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmpneq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,59 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vcmpneq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vcmpneq (a, b);
  }
  
! /*
! **foo2: { xfail *-*-* }
! **	...
! **	vcmp.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
! mve_pred16_t
! foo2 (uint8x16_t a)
! {
!   return vcmpneq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpneq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vcmpneq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpneq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vcmpneq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpneq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vcmpneq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmpneq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i16"  }  } */
  
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vcmpneq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmpneq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i32"  }  } */
  
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vcmpneq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmpneq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmp.i8"  }  } */
  
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmpneq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmp.i8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vcmpneq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmp.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vcmpneq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot180_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot180 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot180_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot180 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot180_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot180 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot180_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot180 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #180(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot180_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot270_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot270_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot270_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot270_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot90_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot90_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vcmulq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot90_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vcmul.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcmul.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot90_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcmul.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vcmulq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcmult.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f16	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vcmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcmult.f32	q[0-9]+, q[0-9]+, q[0-9]+, #0(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_f16 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  float16x8_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_f16 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! float16x8_t
! foo1 ()
! {
!   return vcreateq_f16 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_f32 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  float32x4_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_f32 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! float32x4_t
! foo1 ()
! {
!   return vcreateq_f32 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s16 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  int16x8_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s16 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! int16x8_t
! foo1 ()
! {
!   return vcreateq_s16 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s32 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  int32x4_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s32 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! int32x4_t
! foo1 ()
! {
!   return vcreateq_s32 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s64 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  int64x2_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s64 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! int64x2_t
! foo1 ()
! {
!   return vcreateq_s64 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s8 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  int8x16_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_s8 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! int8x16_t
! foo1 ()
! {
!   return vcreateq_s8 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u16 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  uint16x8_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u16 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! uint16x8_t
! foo1 ()
! {
!   return vcreateq_u16 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u32 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  uint32x4_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u32 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! uint32x4_t
! foo1 ()
! {
!   return vcreateq_u32 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u64 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  uint64x2_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u64 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! uint64x2_t
! foo1 ()
! {
!   return vcreateq_u64 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u8 (a, b);
  }
  
! /* { dg-final { scan-assembler "vmov"  }  } */
--- 1,42 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+ **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
+ **	...
+ */
  uint8x16_t
  foo (uint64_t a, uint64_t b)
  {
    return vcreateq_u8 (a, b);
  }
  
! /*
! **foo1:
! **	...
! **	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
! **	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
! **	...
! */
! uint8x16_t
! foo1 ()
! {
!   return vcreateq_u8 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp16q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.16"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a)
  {
!   return vctp16q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.16"  }  } */
--- 1,44 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vctp.16	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp16q (a);
  }
  
! /*
! **foo1:
! **	...
! **	vctp.16	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 ()
  {
!   return vctp16q (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp16q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vctpt.16"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vctp16q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,52 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vctpt.16	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp16q_m (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vctpt.16	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 (mve_pred16_t p)
  {
!   return vctp16q_m (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp32q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.32"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a)
  {
!   return vctp32q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.32"  }  } */
--- 1,44 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vctp.32	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp32q (a);
  }
  
! /*
! **foo1:
! **	...
! **	vctp.32	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 ()
  {
!   return vctp32q (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp32q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vctpt.32"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vctp32q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,52 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vctpt.32	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp32q_m (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vctpt.32	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 (mve_pred16_t p)
  {
!   return vctp32q_m (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp64q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.64"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a)
  {
!   return vctp64q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.64"  }  } */
--- 1,44 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vctp.64	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp64q (a);
  }
  
! /*
! **foo1:
! **	...
! **	vctp.64	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 ()
  {
!   return vctp64q (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp64q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vctpt.64"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vctp64q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,52 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vctpt.64	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp64q_m (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vctpt.64	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 (mve_pred16_t p)
  {
!   return vctp64q_m (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp8q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.8"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a)
  {
!   return vctp8q (a);
  }
  
! /* { dg-final { scan-assembler "vctp.8"  }  } */
--- 1,44 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vctp.8	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a)
  {
    return vctp8q (a);
  }
  
! /*
! **foo1:
! **	...
! **	vctp.8	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 ()
  {
!   return vctp8q (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp8q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vctpt.8"  }  } */
! 
  mve_pred16_t
! foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vctp8q_m (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,52 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vctpt.8	(?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vctp8q_m (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vctpt.8	(?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
! **	...
! */
  mve_pred16_t
! foo1 (mve_pred16_t p)
  {
!   return vctp8q_m (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m_s16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtat.s16.f16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m_s16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m_s32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtat.s32.f32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m_s32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m_u16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtat.u16.f16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m_u16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m_u32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtat.u32.f32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m_u32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtaq_s16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvta.s16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvta.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtaq_s16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtaq_s32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvta.s32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvta.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtaq_s32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a)
  {
!     return vcvtaq_u16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvta.u16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvta.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a)
  {
!   return vcvtaq_u16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a)
  {
!     return vcvtaq_u32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvta.u32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvta.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a)
  {
!   return vcvtaq_u32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_x_s16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtat.s16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_x_s16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_x_s32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtat.s32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_x_s32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_x_u16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtat.u16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtaq_x_u16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_x_u32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtat.u32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtat.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtaq_x_u32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float32x4_t b)
  {
    return vcvtbq_f16_f32 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcvtb.f16.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtb.f16.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float32x4_t b)
  {
    return vcvtbq_f16_f32 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float16x8_t a)
  {
    return vcvtbq_f32_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtb.f32.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtb.f32.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float16x8_t a)
  {
    return vcvtbq_f32_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcvtbq_m_f16_f32 (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtbt.f16.f32"  }  } */
! 
! float16x8_t
! foo1 (float16x8_t a, float32x4_t b, mve_pred16_t p)
! {
!   return vcvtbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtbt.f16.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcvtbq_m_f16_f32 (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtbq_m_f32_f16 (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtbt.f32.f16"  }  } */
! 
! float32x4_t
! foo1 (float32x4_t inactive, float16x8_t a, mve_pred16_t p)
! {
!   return vcvtbq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtbt.f32.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtbq_m_f32_f16 (inactive, a, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtbq_x_f32_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtbt.f32.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtbt.f32.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtbq_x_f32_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m_s16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtmt.s16.f16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m_s16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m_s32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtmt.s32.f32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m_s32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m_u16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtmt.u16.f16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m_u16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m_u32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtmt.u32.f32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m_u32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtmq_s16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtm.s16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtm.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtmq_s16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtmq_s32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtm.s32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtm.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtmq_s32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a)
  {
!     return vcvtmq_u16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtm.u16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtm.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a)
  {
!   return vcvtmq_u16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a)
  {
!     return vcvtmq_u32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtm.u32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtm.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a)
  {
!   return vcvtmq_u32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_x_s16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtmt.s16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_x_s16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_x_s32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtmt.s32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_x_s32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_x_u16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtmt.u16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtmq_x_u16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_x_u32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtmt.u32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtmt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtmq_x_u32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m_s16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtnt.s16.f16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m_s16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m_s32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtnt.s32.f32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m_s32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m_u16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtnt.u16.f16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m_u16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m_u32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtnt.u32.f32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m_u32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtnq_s16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtn.s16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtn.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtnq_s16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtnq_s32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtn.s32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtn.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtnq_s32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a)
  {
!     return vcvtnq_u16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtn.u16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtn.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a)
  {
!   return vcvtnq_u16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a)
  {
    return vcvtnq_u32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtn.u32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtn.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a)
  {
    return vcvtnq_u32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_x_s16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtnt.s16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_x_s16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_x_s32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtnt.s32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_x_s32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_x_u16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtnt.u16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtnq_x_u16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_x_u32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtnt.u32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtnt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtnq_x_u32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m_s16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtpt.s16.f16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m_s16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m_s32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtpt.s32.f32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m_s32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m_u16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtpt.u16.f16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m_u16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m_u32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtpt.u32.f32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m_u32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtpq_s16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtp.s16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtp.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtpq_s16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtpq_s32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtp.s32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtp.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtpq_s32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a)
  {
!     return vcvtpq_u16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtp.u16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtp.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a)
  {
!   return vcvtpq_u16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a)
  {
!     return vcvtpq_u32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtp.u32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtp.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a)
  {
!   return vcvtpq_u32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_x_s16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtpt.s16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_x_s16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_x_s32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtpt.s32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_x_s32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_x_u16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtpt.u16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtpq_x_u16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_x_u32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtpt.u32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtpt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtpq_x_u32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (int16x8_t a)
  {
    return vcvtq_f16_s16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.f16.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f16.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (int16x8_t a)
  {
    return vcvtq_f16_s16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vcvt.f16.s16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (int16x8_t a)
! {
!   return vcvtq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (uint16x8_t a)
  {
    return vcvtq_f16_u16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.f16.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f16.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (uint16x8_t a)
  {
    return vcvtq_f16_u16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vcvt.f16.u16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (uint16x8_t a)
! {
!   return vcvtq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (int32x4_t a)
  {
    return vcvtq_f32_s32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.f32.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f32.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (int32x4_t a)
  {
    return vcvtq_f32_s32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vcvt.f32.s32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (int32x4_t a)
! {
!   return vcvtq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (uint32x4_t a)
  {
    return vcvtq_f32_u32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.f32.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f32.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (uint32x4_t a)
  {
    return vcvtq_f32_u32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vcvt.f32.u32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (uint32x4_t a)
! {
!   return vcvtq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_f16_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.s16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_f16_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_f16_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.u16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_f16_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_f32_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.s32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_f32_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_f32_u32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.u32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_f32_u32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_f16_s16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.s16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f16.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_f16_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_f16_u16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.u16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f16.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_f16_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_f32_s32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.s32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f32.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_f32_s32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_m_n_f32_u32 (inactive, a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.u32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_m_n (inactive, a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f32.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_m_n_f32_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_s16_f16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.s16.f16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.s16.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_s16_f16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_s32_f32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.s32.f32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.s32.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_s32_f32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_u16_f16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.u16.f16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.u16.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_u16_f16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_u32_f32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.u32.f32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.u32.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n_u32_f32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_s16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.s16.f16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_s16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_s32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.s32.f32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_s32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_u16_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.u16.f16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m_u16_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_u32_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.u32.f32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m_u32_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (int16x8_t a)
  {
    return vcvtq_n_f16_s16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vcvt.f16.s16"  }  } */
  
  float16x8_t
  foo1 (int16x8_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.f16.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f16.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (int16x8_t a)
  {
    return vcvtq_n_f16_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcvt.f16.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (int16x8_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (uint16x8_t a)
  {
    return vcvtq_n_f16_u16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vcvt.f16.u16"  }  } */
  
  float16x8_t
  foo1 (uint16x8_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.f16.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f16.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (uint16x8_t a)
  {
    return vcvtq_n_f16_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcvt.f16.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (uint16x8_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (int32x4_t a)
  {
    return vcvtq_n_f32_s32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vcvt.f32.s32"  }  } */
  
  float32x4_t
  foo1 (int32x4_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.f32.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f32.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (int32x4_t a)
  {
    return vcvtq_n_f32_s32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcvt.f32.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (int32x4_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (uint32x4_t a)
  {
    return vcvtq_n_f32_u32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vcvt.f32.u32"  }  } */
  
  float32x4_t
  foo1 (uint32x4_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.f32.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.f32.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (uint32x4_t a)
  {
    return vcvtq_n_f32_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vcvt.f32.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (uint32x4_t a)
  {
    return vcvtq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtq_n_s16_f16 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.s16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.s16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtq_n_s16_f16 (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtq_n_s32_f32 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.s32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.s32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtq_n_s32_f32 (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a)
  {
    return vcvtq_n_u16_f16 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.u16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.u16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a)
  {
    return vcvtq_n_u16_f16 (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a)
  {
    return vcvtq_n_u32_f32 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vcvt.u32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.u32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a)
  {
    return vcvtq_n_u32_f32 (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtq_s16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.s16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a)
  {
    return vcvtq_s16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtq_s32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.s32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a)
  {
    return vcvtq_s32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a)
  {
!     return vcvtq_u16_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.u16.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a)
  {
!   return vcvtq_u16_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a)
  {
!     return vcvtq_u32_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vcvt.u32.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a)
  {
!   return vcvtq_u32_f32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_f16_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.s16"  }  } */
  
  float16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f16.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_f16_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_f16_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.u16"  }  } */
  
  float16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f16.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_f16_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_f32_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.s32"  }  } */
  
  float32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f32.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_f32_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_f32_u32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.u32"  }  } */
  
  float32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f32.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_f32_u32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_f16_s16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.s16"  }  } */
  
  float16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f16.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_f16_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_f16_u16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f16.u16"  }  } */
  
  float16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f16.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_f16_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f16.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_f32_s32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.s32"  }  } */
  
  float32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f32.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_f32_s32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_x_n_f32_u32 (a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vcvtt.f32.u32"  }  } */
  
  float32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_x_n (a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.f32.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_x_n_f32_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.f32.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
!   return vcvtq_x_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_s16_f16 (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.s16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_s16_f16 (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_s32_f32 (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.s32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_s32_f32 (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_u16_f16 (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.u16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u16.f16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_u16_f16 (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_u32_f32 (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.u32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u32.f32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_n_u32_f32 (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_s16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.s16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_s16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_s32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.s32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.s32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_s32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_u16_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.u16.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u16.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvtq_x_u16_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_u32_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvtt.u32.f32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvtt.u32.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vcvtq_x_u32_f32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float32x4_t b)
  {
    return vcvttq_f16_f32 (a, b);
  }
  
! /* { dg-final { scan-assembler "vcvtt.f16.f32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtt.f16.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float32x4_t b)
  {
    return vcvttq_f16_f32 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float16x8_t a)
  {
    return vcvttq_f32_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vcvtt.f32.f16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vcvtt.f32.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float16x8_t a)
  {
    return vcvttq_f32_f16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcvttq_m_f16_f32 (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvttt.f16.f32"  }  } */
! 
! float16x8_t
! foo1 (float16x8_t a, float32x4_t b, mve_pred16_t p)
! {
!   return vcvttq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvttt.f16.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float32x4_t b, mve_pred16_t p)
  {
    return vcvttq_m_f16_f32 (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvttq_m_f32_f16 (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvttt.f32.f16"  }  } */
! 
! float32x4_t
! foo1 (float32x4_t inactive, float16x8_t a, mve_pred16_t p)
! {
!   return vcvttq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvttt.f32.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vcvttq_m_f32_f16 (inactive, a, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvttq_x_f32_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vcvttt.f32.f16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vcvttt.f32.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vcvttq_x_f32_f16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vddupq_m_n_u16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vddupq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vddupq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vddupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return vddupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m_n_u32 (inactive, a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m_n_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return vddupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m_n_u8 (inactive, a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return vddupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vddupq_m_wb_u16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vddupq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vddupq_m_wb_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vddupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return vddupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m_wb_u32 (inactive, a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m_wb_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return vddupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m_wb_u8 (inactive, a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m_wb_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return vddupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a)
  {
!   return vddupq_n_u16 (a, 4);
  }
  
- /* { dg-final { scan-assembler "vddup.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a)
  {
!   return vddupq_u16 (a, 4);
  }
  
! /* { dg-final { scan-assembler "vddup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a)
  {
!   return vddupq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a)
  {
!   return vddupq_u16 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 ()
! {
!   return vddupq_u16 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a)
  {
    return vddupq_n_u32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vddup.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a)
  {
    return vddupq_u32 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vddup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a)
  {
    return vddupq_n_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a)
  {
    return vddupq_u32 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 ()
! {
!   return vddupq_u32 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a)
  {
    return vddupq_n_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vddup.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a)
  {
    return vddupq_u8 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vddup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a)
  {
    return vddupq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a)
  {
    return vddupq_u8 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 ()
! {
!   return vddupq_u8 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t *a)
  {
!   return vddupq_wb_u16 (a, 4);
  }
  
- /* { dg-final { scan-assembler "vddup.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t *a)
  {
!   return vddupq_u16 (a, 4);
  }
  
! /* { dg-final { scan-assembler "vddup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t *a)
  {
!   return vddupq_wb_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t *a)
  {
!   return vddupq_u16 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 ()
! {
!   return vddupq_u16 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t *a)
  {
    return vddupq_wb_u32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vddup.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t *a)
  {
    return vddupq_u32 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vddup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t *a)
  {
    return vddupq_wb_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t *a)
  {
    return vddupq_u32 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 ()
! {
!   return vddupq_u32 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t *a)
  {
    return vddupq_wb_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vddup.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t *a)
  {
    return vddupq_u8 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vddup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t *a)
  {
    return vddupq_wb_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t *a)
  {
    return vddupq_u8 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 ()
! {
!   return vddupq_u8 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vddupq_x_n_u16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
    return vddupq_x_u16 (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vddupq_x_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
    return vddupq_x_u16 (a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (mve_pred16_t p)
! {
!   return vddupq_x_u16 (1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_n_u32 (a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_u32 (a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_n_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_u32 (a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (mve_pred16_t p)
! {
!   return vddupq_x_u32 (1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_n_u8 (a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_u8 (a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_n_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vddupq_x_u8 (a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (mve_pred16_t p)
! {
!   return vddupq_x_u8 (1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! uint32_t *a;
  
  uint16x8_t
! foo (mve_pred16_t p)
  {
!   return vddupq_x_wb_u16 (a, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u16"  }  } */
  
  uint16x8_t
! foo1 (mve_pred16_t p)
  {
!   return vddupq_x_u16 (a, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_x_wb_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint32_t *a, mve_pred16_t p)
+ {
+   return vddupq_x_u16 (a, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (mve_pred16_t p)
  {
!   return vddupq_x_u16 (1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! uint32_t *a;
  
  uint32x4_t
! foo (mve_pred16_t p)
  {
!   return vddupq_x_wb_u32 (a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u32"  }  } */
  
  uint32x4_t
! foo1 (mve_pred16_t p)
  {
!   return vddupq_x_u32 (a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_x_wb_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32_t *a, mve_pred16_t p)
+ {
+   return vddupq_x_u32 (a, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 (mve_pred16_t p)
  {
!   return vddupq_x_u32 (1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! uint32_t *a;
  
  uint8x16_t
! foo (mve_pred16_t p)
  {
!   return vddupq_x_wb_u8 (a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vddupt.u8"  }  } */
  
  uint8x16_t
! foo1 (mve_pred16_t p)
  {
!   return vddupq_x_u8 (a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vddupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint32_t *a, mve_pred16_t p)
  {
!   return vddupq_x_wb_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint32_t *a, mve_pred16_t p)
+ {
+   return vddupq_x_u8 (a, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (mve_pred16_t p)
  {
!   return vddupq_x_u8 (1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16_t a, mve_pred16_t p)
  {
    return vdupq_m_n_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16_t a, mve_pred16_t p)
  {
    return vdupq_m_n_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t inactive, mve_pred16_t p)
! {
!   return vdupq_m (inactive, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32_t a, mve_pred16_t p)
  {
    return vdupq_m_n_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32_t a, mve_pred16_t p)
  {
    return vdupq_m_n_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t inactive, mve_pred16_t p)
! {
!   return vdupq_m (inactive, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16_t a, mve_pred16_t p)
  {
    return vdupq_m_n_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16_t a, mve_pred16_t p)
  {
    return vdupq_m_n_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32_t a, mve_pred16_t p)
  {
    return vdupq_m_n_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32_t a, mve_pred16_t p)
  {
    return vdupq_m_n_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8_t a, mve_pred16_t p)
  {
    return vdupq_m_n_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8_t a, mve_pred16_t p)
  {
    return vdupq_m_n_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16_t a, mve_pred16_t p)
  {
    return vdupq_m_n_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16_t a, mve_pred16_t p)
  {
    return vdupq_m_n_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return vdupq_m (inactive, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vdupq_m_n_u32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vdupq_m_n_u32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return vdupq_m (inactive, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8_t a, mve_pred16_t p)
  {
    return vdupq_m_n_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdupt.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8_t a, mve_pred16_t p)
  {
    return vdupq_m_n_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8_t a, mve_pred16_t p)
  {
    return vdupq_m (inactive, a, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return vdupq_m (inactive, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16_t a)
  {
    return vdupq_n_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.16"  }  } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16_t a)
  {
    return vdupq_n_f16 (a);
  }
  
! /*
! **foo1:
! **	...
! **	vdup.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 ()
! {
!   return vdupq_n_f16 (1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32_t a)
  {
    return vdupq_n_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.32"  }  } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32_t a)
  {
    return vdupq_n_f32 (a);
  }
  
! /*
! **foo1:
! **	...
! **	vdup.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 ()
! {
!   return vdupq_n_f32 (1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16_t a)
  {
    return vdupq_n_s16 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.16"  }  } */
--- 1,28 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16_t a)
  {
    return vdupq_n_s16 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32_t a)
  {
    return vdupq_n_s32 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.32"  }  } */
--- 1,28 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32_t a)
  {
    return vdupq_n_s32 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8_t a)
  {
    return vdupq_n_s8 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.8"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8_t a)
  {
    return vdupq_n_s8 (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16_t a)
  {
!     return vdupq_n_u16 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.16"  }  } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16_t a)
  {
!   return vdupq_n_u16 (a);
  }
  
! /*
! **foo1:
! **	...
! **	vdup.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo1 ()
! {
!   return vdupq_n_u16 (1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a)
  {
!     return vdupq_n_u32 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.32"  }  } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a)
  {
!   return vdupq_n_u32 (a);
  }
  
! /*
! **foo1:
! **	...
! **	vdup.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo1 ()
! {
!   return vdupq_n_u32 (1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8_t a)
  {
!     return vdupq_n_u8 (a);
  }
  
! /* { dg-final { scan-assembler "vdup.8"  }  } */
--- 1,40 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdup.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8_t a)
  {
!   return vdupq_n_u8 (a);
  }
  
! /*
! **foo1:
! **	...
! **	vdup.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo1 ()
! {
!   return vdupq_n_u8 (1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16_t a, mve_pred16_t p)
  {
    return vdupq_x_n_f16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.16"  }  } */
--- 1,48 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16_t a, mve_pred16_t p)
  {
    return vdupq_x_n_f16 (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (mve_pred16_t p)
! {
!   return vdupq_x_n_f16 (1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32_t a, mve_pred16_t p)
  {
    return vdupq_x_n_f32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.32"  }  } */
--- 1,48 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32_t a, mve_pred16_t p)
  {
    return vdupq_x_n_f32 (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (mve_pred16_t p)
! {
!   return vdupq_x_n_f32 (1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16_t a, mve_pred16_t p)
  {
    return vdupq_x_n_s16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16_t a, mve_pred16_t p)
  {
    return vdupq_x_n_s16 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32_t a, mve_pred16_t p)
  {
    return vdupq_x_n_s32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32_t a, mve_pred16_t p)
  {
    return vdupq_x_n_s32 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8_t a, mve_pred16_t p)
  {
    return vdupq_x_n_s8 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.8"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8_t a, mve_pred16_t p)
  {
    return vdupq_x_n_s8 (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16_t a, mve_pred16_t p)
  {
    return vdupq_x_n_u16 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.16"  }  } */
--- 1,48 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16_t a, mve_pred16_t p)
  {
    return vdupq_x_n_u16 (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo1 (mve_pred16_t p)
! {
!   return vdupq_x_n_u16 (1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vdupq_x_n_u32 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.32"  }  } */
--- 1,48 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vdupq_x_n_u32 (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo1 (mve_pred16_t p)
! {
!   return vdupq_x_n_u32 (1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8_t a, mve_pred16_t p)
  {
    return vdupq_x_n_u8 (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdupt.8"  }  } */
--- 1,48 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8_t a, mve_pred16_t p)
  {
    return vdupq_x_n_u8 (a, p);
  }
  
! /*
! **foo1:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdupt.8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo1 (mve_pred16_t p)
! {
!   return vdupq_x_n_u8 (1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_m (inactive, a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m_n_u16 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return vdwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m_n_u32 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return vdwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m_n_u8 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return vdwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16x8_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16x8_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m_wb_u16 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
+ {
+   return vdwdupq_m (inactive, a, b, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, 1, 1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_m (inactive, a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m_wb_u32 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return vdwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8x16_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
  
  uint8x16_t
! foo1 (uint8x16_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, a, b, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_m_wb_u8 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
+ {
+   return vdwdupq_m (inactive, a, b, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
  {
!   return vdwdupq_m (inactive, 1, 1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a, uint32_t b)
  {
!   return vdwdupq_n_u16 (a, b, 2);
  }
  
- /* { dg-final { scan-assembler "vdwdup.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return vdwdupq_u16 (a, b, 2);
  }
  
! /* { dg-final { scan-assembler "vdwdup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a, uint32_t b)
  {
!   return vdwdupq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vdwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return vdwdupq_u16 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vdwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 ()
! {
!   return vdwdupq_u16 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, uint32_t b)
  {
!   return vdwdupq_n_u32 (a, b, 8);
  }
  
- /* { dg-final { scan-assembler "vdwdup.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return vdwdupq_u32 (a, b, 8);
  }
  
! /* { dg-final { scan-assembler "vdwdup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, uint32_t b)
  {
!   return vdwdupq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vdwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return vdwdupq_u32 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vdwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 ()
! {
!   return vdwdupq_u32 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a, uint32_t b)
  {
!   return vdwdupq_n_u8 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vdwdup.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return vdwdupq_u8 (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vdwdup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a, uint32_t b)
  {
!   return vdwdupq_n_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vdwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return vdwdupq_u8 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vdwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 ()
! {
!   return vdwdupq_u8 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_wb_u16 (a, b, 2);
  }
  
- /* { dg-final { scan-assembler "vdwdup.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_u16 (a, b, 2);
  }
  
! /* { dg-final { scan-assembler "vdwdup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_wb_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vdwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_u16 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vdwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 ()
! {
!   return vdwdupq_u16 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_wb_u32 (a, b, 8);
  }
  
- /* { dg-final { scan-assembler "vdwdup.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_u32 (a, b, 8);
  }
  
! /* { dg-final { scan-assembler "vdwdup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_wb_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vdwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_u32 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vdwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 ()
! {
!   return vdwdupq_u32 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_wb_u8 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vdwdup.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_u8 (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vdwdup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vdwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_wb_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vdwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t *a, uint32_t b)
  {
!   return vdwdupq_u8 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vdwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 ()
! {
!   return vdwdupq_u8 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_n_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_u16 (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_u16 (a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (mve_pred16_t p)
! {
!   return vdwdupq_x_u16 (1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_n_u32 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_u32 (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_u32 (a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (mve_pred16_t p)
! {
!   return vdwdupq_x_u32 (1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_n_u8 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_u8 (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_n_u8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_u8 (a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (mve_pred16_t p)
! {
!   return vdwdupq_x_u8 (1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_wb_u16 (a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
  
  uint16x8_t
! foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_u16 (a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_wb_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
+ {
+   return vdwdupq_x_u16 (a, b, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (mve_pred16_t p)
  {
!   return vdwdupq_x_u16 (1, 1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_wb_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_u32 (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t *a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_wb_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
  {
    return vdwdupq_x_u32 (a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vdwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (mve_pred16_t p)
! {
!   return vdwdupq_x_u32 (1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_wb_u8 (a, b, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
  
  uint8x16_t
! foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_u8 (a, b, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vdwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return vdwdupq_x_wb_u8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
+ {
+   return vdwdupq_x_u8 (a, b, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vdwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (mve_pred16_t p)
  {
!   return vdwdupq_x_u8 (1, 1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return veorq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return veorq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return veorq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return veorq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return veorq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return veorq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return veorq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return veorq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return veorq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return veorq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return veorq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return veorq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return veorq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return veorq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return veorq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "veor"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return veorq (a, b);
  }
  
! /* { dg-final { scan-assembler "veor"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return veorq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	veor	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return veorq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "veort"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "veort"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	veort	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return veorq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
!   return vfmaq_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfma.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
!   return vfmaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfma.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfma.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t add, float16x8_t m1, float16x8_t m2)
  {
!   return vfmaq_f16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfma.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2)
  {
!   return vfmaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
!   return vfmaq_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfma.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
!   return vfmaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfma.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfma.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t add, float32x4_t m1, float32x4_t m2)
  {
!   return vfmaq_f32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfma.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2)
  {
!   return vfmaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
!   return vfmaq_m_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmat.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
!   return vfmaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmat.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p)
  {
!   return vfmaq_m_f16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p)
  {
!   return vfmaq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
!   return vfmaq_m_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmat.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
!   return vfmaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmat.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p)
  {
!   return vfmaq_m_f32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p)
  {
!   return vfmaq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p)
- {
-   return vfmaq_m (a, b, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p)
  {
!   return vfmaq_m_n_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmat.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p)
  {
!   return vfmaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmat.f16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t add, float16x8_t m1, float16_t m2, mve_pred16_t p)
  {
!   return vfmaq_m_n_f16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo1 (float16x8_t add, float16x8_t m1, float16_t m2, mve_pred16_t p)
+ {
+   return vfmaq_m (add, m1, m2, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo2 (float16x8_t add, float16x8_t m1, mve_pred16_t p)
  {
!   return vfmaq_m (add, m1, 1.1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p)
- {
-   return vfmaq_m (a, b, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p)
  {
!   return vfmaq_m_n_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmat.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p)
  {
!   return vfmaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmat.f32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t add, float32x4_t m1, float32_t m2, mve_pred16_t p)
  {
!   return vfmaq_m_n_f32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo1 (float32x4_t add, float32x4_t m1, float32_t m2, mve_pred16_t p)
+ {
+   return vfmaq_m (add, m1, m2, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmat.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo2 (float32x4_t add, float32x4_t m1, mve_pred16_t p)
  {
!   return vfmaq_m (add, m1, 1.1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16x8_t b, float16_t c)
- {
-   return vfmaq (a, b, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16_t c)
  {
!   return vfmaq_n_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfma.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16_t c)
  {
!   return vfmaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfma.f16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfma.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t add, float16x8_t m1, float16_t m2)
  {
!   return vfmaq_n_f16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfma.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo1 (float16x8_t add, float16x8_t m1, float16_t m2)
+ {
+   return vfmaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vfma.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo2 (float16x8_t add, float16x8_t m1)
  {
!   return vfmaq (add, m1, 1.1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32x4_t b, float32_t c)
- {
-   return vfmaq (a, b, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32_t c)
  {
!   return vfmaq_n_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfma.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32_t c)
  {
!   return vfmaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfma.f32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfma.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t add, float32x4_t m1, float32_t m2)
  {
!   return vfmaq_n_f32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfma.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo1 (float32x4_t add, float32x4_t m1, float32_t m2)
+ {
+   return vfmaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vfma.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo2 (float32x4_t add, float32x4_t m1)
  {
!   return vfmaq (add, m1, 1.1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p)
- {
-   return vfmasq_m (a, b, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p)
  {
!   return vfmasq_m_n_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmast.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p)
  {
!   return vfmasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmast.f16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmast.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t m1, float16x8_t m2, float16_t add, mve_pred16_t p)
  {
!   return vfmasq_m_n_f16 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmast.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo1 (float16x8_t m1, float16x8_t m2, float16_t add, mve_pred16_t p)
+ {
+   return vfmasq_m (m1, m2, add, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmast.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo2 (float16x8_t m1, float16x8_t m2, mve_pred16_t p)
  {
!   return vfmasq_m (m1, m2, 1.1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p)
- {
-   return vfmasq_m (a, b, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p)
  {
!   return vfmasq_m_n_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmast.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p)
  {
!   return vfmasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmast.f32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmast.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t m1, float32x4_t m2, float32_t add, mve_pred16_t p)
  {
!   return vfmasq_m_n_f32 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmast.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo1 (float32x4_t m1, float32x4_t m2, float32_t add, mve_pred16_t p)
+ {
+   return vfmasq_m (m1, m2, add, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmast.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo2 (float32x4_t m1, float32x4_t m2, mve_pred16_t p)
  {
!   return vfmasq_m (m1, m2, 1.1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16x8_t b, float16_t c)
- {
-   return vfmasq (a, b, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16_t c)
  {
!   return vfmasq_n_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfmas.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16_t c)
  {
!   return vfmasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfmas.f16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfmas.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t m1, float16x8_t m2, float16_t add)
  {
!   return vfmasq_n_f16 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfmas.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo1 (float16x8_t m1, float16x8_t m2, float16_t add)
+ {
+   return vfmasq (m1, m2, add);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vfmas.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo2 (float16x8_t m1, float16x8_t m2)
  {
!   return vfmasq (m1, m2, 1.1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32x4_t b, float32_t c)
- {
-   return vfmasq (a, b, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32_t c)
  {
!   return vfmasq_n_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfmas.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32_t c)
  {
!   return vfmasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfmas.f32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfmas.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t m1, float32x4_t m2, float32_t add)
  {
!   return vfmasq_n_f32 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfmas.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo1 (float32x4_t m1, float32x4_t m2, float32_t add)
+ {
+   return vfmasq (m1, m2, add);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vfmas.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo2 (float32x4_t m1, float32x4_t m2)
  {
!   return vfmasq (m1, m2, 1.1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16x8_t c)
  {
!   return vfmsq_f16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfms.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
  {
!   return vfmsq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfms.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfms.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t add, float16x8_t m1, float16x8_t m2)
  {
!   return vfmsq_f16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfms.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2)
  {
!   return vfmsq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32x4_t c)
  {
!   return vfmsq_f32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vfms.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
  {
!   return vfmsq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vfms.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vfms.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t add, float32x4_t m1, float32x4_t m2)
  {
!   return vfmsq_f32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vfms.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2)
  {
!   return vfmsq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
!   return vfmsq_m_f16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmst.f16"  }  } */
  
  float16x8_t
! foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
  {
!   return vfmsq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmst.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmst.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p)
  {
!   return vfmsq_m_f16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmst.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p)
  {
!   return vfmsq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
!   return vfmsq_m_f32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vfmst.f32"  }  } */
  
  float32x4_t
! foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
  {
!   return vfmsq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vfmst.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmst.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p)
  {
!   return vfmsq_m_f32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vfmst.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p)
  {
!   return vfmsq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
! {
!   return vhaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
! {
!   return vhaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
! {
!   return vhaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vhaddq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vhaddq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vhaddq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vhaddq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vhaddq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vhaddq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vhaddq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vhaddq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vhaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vhadd.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a)
! {
!   return vhaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vhaddq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vhaddq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vhaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vhadd.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a)
! {
!   return vhaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vhaddq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vhaddq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vhaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vhadd.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a)
! {
!   return vhaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhaddq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhaddq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhaddq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhaddq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhaddq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhaddq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vhaddq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vhaddq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vhaddq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vhaddq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vhaddq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhadd.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhadd.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhadd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vhaddq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhadd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vhaddq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vhaddq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhaddt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_x_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vhaddq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhcaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhcaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhcaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot270_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhcadd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vhcadd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhcadd.s16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot270_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhcadd.s16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot270_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhcadd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vhcadd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhcadd.s32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot270_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhcadd.s32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot270_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhcadd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot270 (a, b);
  }
  
! /* { dg-final { scan-assembler "vhcadd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhcadd.s8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot270_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhcadd.s8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot270 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #270(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot270_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhcaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhcaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhcaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot90_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhcadd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vhcadd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhcadd.s16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot90_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhcadd.s16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot90_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhcadd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vhcadd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhcadd.s32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot90_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhcadd.s32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot90_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhcadd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot90 (a, b);
  }
  
! /* { dg-final { scan-assembler "vhcadd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhcadd.s8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot90_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhcadd.s8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhcaddq_rot90 (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhcaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhcaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+, #90(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhcaddq_rot90_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
! {
!   return vhsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
! {
!   return vhsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
! {
!   return vhsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vhsubq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vhsubq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vhsubq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vhsubq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vhsubq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vhsubq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vhsubq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vhsubq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vhsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vhsub.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a)
! {
!   return vhsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vhsubq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vhsubq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vhsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vhsub.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a)
! {
!   return vhsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vhsubq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vhsubq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vhsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vhsub.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a)
! {
!   return vhsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhsubq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vhsubq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhsubq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vhsubq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhsubq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vhsubq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vhsubq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vhsubq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vhsubq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vhsubq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vhsubq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vhsub.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vhsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vhsub.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vhsub.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vhsubq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vhsub.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vhsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vhsubq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vhsubq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vhsubt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_x_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vhsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vhsubq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vhsubt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vhsubt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vhsubq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vidupq_m_n_u16 (inactive, a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vidupq_m (inactive, a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vidupq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
  {
!   return vidupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return vidupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m_n_u32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m_n_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return vidupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m_n_u8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return vidupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vidupq_m_wb_u16 (inactive, a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vidupq_m (inactive, a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vidupq_m_wb_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
  {
!   return vidupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return vidupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m_wb_u32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m_wb_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return vidupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m_wb_u8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m_wb_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
  {
    return vidupq_m (inactive, a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return vidupq_m (inactive, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a)
  {
!   return vidupq_n_u16 (a, 4);
  }
  
- /* { dg-final { scan-assembler "vidup.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a)
  {
!   return vidupq_u16 (a, 4);
  }
  
! /* { dg-final { scan-assembler "vidup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vidup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a)
  {
!   return vidupq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vidup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a)
  {
!   return vidupq_u16 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vidup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 ()
! {
!   return vidupq_u16 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a)
  {
    return vidupq_n_u32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vidup.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a)
  {
    return vidupq_u32 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vidup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vidup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a)
  {
    return vidupq_n_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vidup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a)
  {
    return vidupq_u32 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vidup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 ()
! {
!   return vidupq_u32 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a)
  {
    return vidupq_n_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vidup.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a)
  {
    return vidupq_u8 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vidup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vidup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a)
  {
    return vidupq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vidup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a)
  {
    return vidupq_u8 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vidup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 ()
! {
!   return vidupq_u8 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t *a)
  {
!   return vidupq_wb_u16 (a, 4);
  }
  
- /* { dg-final { scan-assembler "vidup.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t *a)
  {
!   return vidupq_u16 (a, 4);
  }
  
! /* { dg-final { scan-assembler "vidup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vidup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t *a)
  {
!   return vidupq_wb_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vidup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t *a)
  {
!   return vidupq_u16 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vidup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 ()
! {
!   return vidupq_u16 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t *a)
  {
    return vidupq_wb_u32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vidup.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t *a)
  {
    return vidupq_u32 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vidup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vidup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t *a)
  {
    return vidupq_wb_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vidup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t *a)
  {
    return vidupq_u32 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vidup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 ()
! {
!   return vidupq_u32 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t *a)
  {
    return vidupq_wb_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vidup.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t *a)
  {
    return vidupq_u8 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vidup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vidup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t *a)
  {
    return vidupq_wb_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vidup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t *a)
  {
    return vidupq_u8 (a, 1);
  }
  
! /*
! **foo2:
! **	...
! **	vidup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 ()
! {
!   return vidupq_u8 (1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a, mve_pred16_t p)
  {
!   return vidupq_x_n_u16 (a, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vidupq_x_u16 (a, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a, mve_pred16_t p)
  {
!   return vidupq_x_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
!   return vidupq_x_u16 (a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (mve_pred16_t p)
! {
!   return vidupq_x_u16 (1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_n_u32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_u32 (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_n_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_u32 (a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (mve_pred16_t p)
! {
!   return vidupq_x_u32 (1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_n_u8 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_u8 (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_n_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a, mve_pred16_t p)
  {
    return vidupq_x_u8 (a, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (mve_pred16_t p)
! {
!   return vidupq_x_u8 (1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! uint32_t *a;
  
  uint16x8_t
! foo (mve_pred16_t p)
  {
!   return vidupq_x_wb_u16 (a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u16"  }  } */
  
  uint16x8_t
! foo1 (mve_pred16_t p)
  {
!   return vidupq_x_u16 (a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint32_t *a, mve_pred16_t p)
  {
!   return vidupq_x_wb_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint32_t *a, mve_pred16_t p)
+ {
+   return vidupq_x_u16 (a, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (mve_pred16_t p)
  {
!   return vidupq_x_u16 (1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! uint32_t *a;
  
  uint32x4_t
! foo (mve_pred16_t p)
  {
!   return vidupq_x_wb_u32 (a, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u32"  }  } */
  
  uint32x4_t
! foo1 (mve_pred16_t p)
  {
!   return vidupq_x_u32 (a, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t *a, mve_pred16_t p)
  {
!   return vidupq_x_wb_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32_t *a, mve_pred16_t p)
+ {
+   return vidupq_x_u32 (a, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 (mve_pred16_t p)
  {
!   return vidupq_x_u32 (1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! uint32_t * a;
  
  uint8x16_t
! foo (mve_pred16_t p)
  {
!   return vidupq_x_wb_u8 (a, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vidupt.u8"  }  } */
  
  uint8x16_t
! foo1 (mve_pred16_t p)
  {
!   return vidupq_x_u8 (a, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vidupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint32_t *a, mve_pred16_t p)
  {
!   return vidupq_x_wb_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint32_t *a, mve_pred16_t p)
+ {
+   return vidupq_x_u8 (a, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vidupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (mve_pred16_t p)
  {
!   return vidupq_x_u8 (1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_n_u16 (inactive, a, b, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_n_u16 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return viwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_n_u32 (inactive, a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_n_u32 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return viwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_n_u8 (inactive, a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_n_u8 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return viwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_wb_u16 (inactive, a, b, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_wb_u16 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, mve_pred16_t p)
! {
!   return viwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_wb_u32 (inactive, a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_wb_u32 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, mve_pred16_t p)
! {
!   return viwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_wb_u8 (inactive, a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m_wb_u8 (inactive, a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_m (inactive, a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, mve_pred16_t p)
! {
!   return viwdupq_m (inactive, 1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a, uint32_t b)
  {
!   return viwdupq_n_u16 (a, b, 2);
  }
  
- /* { dg-final { scan-assembler "viwdup.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return viwdupq_u16 (a, b, 2);
  }
  
! /* { dg-final { scan-assembler "viwdup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	viwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a, uint32_t b)
  {
!   return viwdupq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	viwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return viwdupq_u16 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	viwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 ()
! {
!   return viwdupq_u16 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, uint32_t b)
  {
!   return viwdupq_n_u32 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "viwdup.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return viwdupq_u32 (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "viwdup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	viwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, uint32_t b)
  {
!   return viwdupq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	viwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a, uint32_t b)
  {
!   return viwdupq_u32 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	viwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 ()
! {
!   return viwdupq_u32 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a, uint32_t b)
  {
    return viwdupq_n_u8 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "viwdup.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a, uint32_t b)
  {
    return viwdupq_u8 (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "viwdup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	viwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a, uint32_t b)
  {
    return viwdupq_n_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	viwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a, uint32_t b)
  {
    return viwdupq_u8 (a, b, 1);
  }
  
! /*
! **foo2:
! **	...
! **	viwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 ()
! {
!   return viwdupq_u8 (1, 1, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint32_t * a, uint32_t b)
  {
!   return viwdupq_wb_u16 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "viwdup.u16"  }  } */
  
  uint16x8_t
! foo1 (uint32_t * a, uint32_t b)
  {
!   return viwdupq_u16 (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "viwdup.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	viwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint32_t *a, uint32_t b)
  {
!   return viwdupq_wb_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	viwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint32_t *a, uint32_t b)
+ {
+   return viwdupq_u16 (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	viwdup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 ()
  {
!   return viwdupq_u16 (1, 1, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t * a, uint32_t b)
  {
!   return viwdupq_wb_u32 (a, b, 8);
  }
  
- /* { dg-final { scan-assembler "viwdup.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32_t * a, uint32_t b)
  {
!   return viwdupq_u32 (a, b, 8);
  }
  
! /* { dg-final { scan-assembler "viwdup.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	viwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t *a, uint32_t b)
  {
!   return viwdupq_wb_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	viwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32_t *a, uint32_t b)
+ {
+   return viwdupq_u32 (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	viwdup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 ()
  {
!   return viwdupq_u32 (1, 1, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint32_t * a, uint32_t b)
  {
!   return viwdupq_wb_u8 (a, b, 2);
  }
  
- /* { dg-final { scan-assembler "viwdup.u8"  }  } */
  
  uint8x16_t
! foo1 (uint32_t * a, uint32_t b)
  {
!   return viwdupq_u8 (a, b, 2);
  }
  
! /* { dg-final { scan-assembler "viwdup.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	viwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint32_t *a, uint32_t b)
  {
!   return viwdupq_wb_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	viwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint32_t *a, uint32_t b)
+ {
+   return viwdupq_u8 (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	viwdup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 ()
  {
!   return viwdupq_u8 (1, 1, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_n_u16 (a, b, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u16 (a, b, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u16 (a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (mve_pred16_t p)
! {
!   return viwdupq_x_u16 (1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_n_u32 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u32 (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u32 (a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (mve_pred16_t p)
! {
!   return viwdupq_x_u32 (1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_n_u8 (a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u8 (a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_n_u8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u8 (a, b, 1, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (mve_pred16_t p)
! {
!   return viwdupq_x_u8 (1, 1, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_wb_u16 (a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
  
  uint16x8_t
! foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u16 (a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_wb_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
+ {
+   return viwdupq_x_u16 (a, b, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (mve_pred16_t p)
  {
!   return viwdupq_x_u16 (1, 1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_wb_u32 (a, b, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u32 (a, b, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_wb_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
+ {
+   return viwdupq_x_u32 (a, b, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 (mve_pred16_t p)
  {
!   return viwdupq_x_u32 (1, 1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_wb_u8 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
  
  uint8x16_t
! foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_u8 (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "viwdupt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint32_t *a, uint32_t b, mve_pred16_t p)
  {
!   return viwdupq_x_wb_u8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
+ {
+   return viwdupq_x_u8 (a, b, 1, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	viwdupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (mve_pred16_t p)
  {
!   return viwdupq_x_u8 (1, 1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base)
  {
    return vld1q_f16 (base);
  }
  
  float16x8_t
! foo1 (float16_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.16" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base)
  {
    return vld1q_f16 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base)
  {
    return vld1q_f32 (base);
  }
  
  float32x4_t
! foo1 (float32_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrw.32" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base)
  {
    return vld1q_f32 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base)
  {
    return vld1q_s16 (base);
  }
  
  int16x8_t
! foo1 (int16_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.16" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base)
  {
    return vld1q_s16 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base)
  {
    return vld1q_s32 (base);
  }
  
  int32x4_t
! foo1 (int32_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrw.32" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base)
  {
    return vld1q_s32 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8_t const * base)
  {
    return vld1q_s8 (base);
  }
  
  int8x16_t
! foo1 (int8_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrb.8" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8_t const *base)
  {
    return vld1q_s8 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base)
  {
    return vld1q_u16 (base);
  }
  
  uint16x8_t
! foo1 (uint16_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.16" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base)
  {
    return vld1q_u16 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base)
  {
    return vld1q_u32 (base);
  }
  
  uint32x4_t
! foo1 (uint32_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrw.32" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base)
  {
    return vld1q_u32 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,20 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8_t const * base)
  {
    return vld1q_u8 (base);
  }
  
  uint8x16_t
! foo1 (uint8_t const * base)
  {
    return vld1q (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrb.8" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8_t const *base)
  {
    return vld1q_u8 (base);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vldrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo1 (uint8_t const *base)
  {
    return vld1q (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base, mve_pred16_t p)
  {
    return vld1q_z_f16 (base, p);
  }
  
  float16x8_t
! foo1 (float16_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrht.16" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base, mve_pred16_t p)
  {
    return vld1q_z_f16 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base, mve_pred16_t p)
  {
    return vld1q_z_f32 (base, p);
  }
  
  float32x4_t
! foo1 (float32_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrwt.32" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base, mve_pred16_t p)
  {
    return vld1q_z_f32 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base, mve_pred16_t p)
  {
    return vld1q_z_s16 (base, p);
  }
  
  int16x8_t
! foo1 (int16_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrht.16" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base, mve_pred16_t p)
  {
    return vld1q_z_s16 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base, mve_pred16_t p)
  {
    return vld1q_z_s32 (base, p);
  }
  
  int32x4_t
! foo1 (int32_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrwt.32" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base, mve_pred16_t p)
  {
    return vld1q_z_s32 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8_t const * base, mve_pred16_t p)
  {
    return vld1q_z_s8 (base, p);
  }
  
  int8x16_t
! foo1 (int8_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrbt.8" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8_t const *base, mve_pred16_t p)
  {
    return vld1q_z_s8 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base, mve_pred16_t p)
  {
    return vld1q_z_u16 (base, p);
  }
  
  uint16x8_t
! foo1 (uint16_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrht.16" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base, mve_pred16_t p)
  {
    return vld1q_z_u16 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base, mve_pred16_t p)
  {
    return vld1q_z_u32 (base, p);
  }
  
  uint32x4_t
! foo1 (uint32_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrwt.32" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base, mve_pred16_t p)
  {
    return vld1q_z_u32 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8_t const * base, mve_pred16_t p)
  {
    return vld1q_z_u8 (base, p);
  }
  
  uint8x16_t
! foo1 (uint8_t const * base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 2 }  } */
! /* { dg-final { scan-assembler-times "vldrbt.8" 2 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8_t const *base, mve_pred16_t p)
  {
    return vld1q_z_u8 (base, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo1 (uint8_t const *base, mve_pred16_t p)
  {
    return vld1q_z (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8x2_t
! foo (float16_t const * addr)
  {
    return vld2q_f16 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.16"  }  } */
- /* { dg-final { scan-assembler "vld21.16"  }  } */
  
  float16x8x2_t
! foo1 (float16_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8x2_t
! foo (float16_t const *addr)
  {
    return vld2q_f16 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8x2_t
! foo1 (float16_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4x2_t
! foo (float32_t const * addr)
  {
    return vld2q_f32 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.32"  }  } */
- /* { dg-final { scan-assembler "vld21.32"  }  } */
  
  float32x4x2_t
! foo1 (float32_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4x2_t
! foo (float32_t const *addr)
  {
    return vld2q_f32 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4x2_t
! foo1 (float32_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8x2_t
! foo (int16_t const * addr)
  {
    return vld2q_s16 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.16"  }  } */
- /* { dg-final { scan-assembler "vld21.16"  }  } */
  
  int16x8x2_t
! foo1 (int16_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8x2_t
! foo (int16_t const *addr)
  {
    return vld2q_s16 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8x2_t
! foo1 (int16_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4x2_t
! foo (int32_t const * addr)
  {
    return vld2q_s32 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.32"  }  } */
- /* { dg-final { scan-assembler "vld21.32"  }  } */
  
  int32x4x2_t
! foo1 (int32_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4x2_t
! foo (int32_t const *addr)
  {
    return vld2q_s32 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4x2_t
! foo1 (int32_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16x2_t
! foo (int8_t const * addr)
  {
    return vld2q_s8 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.8"  }  } */
- /* { dg-final { scan-assembler "vld21.8"  }  } */
  
  int8x16x2_t
! foo1 (int8_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16x2_t
! foo (int8_t const *addr)
  {
    return vld2q_s8 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16x2_t
! foo1 (int8_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8x2_t
! foo (uint16_t const * addr)
  {
    return vld2q_u16 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.16"  }  } */
- /* { dg-final { scan-assembler "vld21.16"  }  } */
  
  uint16x8x2_t
! foo1 (uint16_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8x2_t
! foo (uint16_t const *addr)
  {
    return vld2q_u16 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8x2_t
! foo1 (uint16_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4x2_t
! foo (uint32_t const * addr)
  {
    return vld2q_u32 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.32"  }  } */
- /* { dg-final { scan-assembler "vld21.32"  }  } */
  
  uint32x4x2_t
! foo1 (uint32_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4x2_t
! foo (uint32_t const *addr)
  {
    return vld2q_u32 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4x2_t
! foo1 (uint32_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16x2_t
! foo (uint8_t const * addr)
  {
    return vld2q_u8 (addr);
  }
  
- /* { dg-final { scan-assembler "vld20.8"  }  } */
- /* { dg-final { scan-assembler "vld21.8"  }  } */
  
  uint8x16x2_t
! foo1 (uint8_t const * addr)
  {
    return vld2q (addr);
  }
  
! /* { dg-final { scan-assembler "vld20.8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16x2_t
! foo (uint8_t const *addr)
  {
    return vld2q_u8 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vld21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16x2_t
! foo1 (uint8_t const *addr)
  {
    return vld2q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8x4_t
! foo (float16_t const * addr)
  {
    return vld4q_f16 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.16"  }  } */
- /* { dg-final { scan-assembler "vld41.16"  }  } */
- /* { dg-final { scan-assembler "vld42.16"  }  } */
- /* { dg-final { scan-assembler "vld43.16"  }  } */
  
  float16x8x4_t
! foo1 (float16_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.16"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  float16x8x4_t
! foo (float16_t const *addr)
  {
    return vld4q_f16 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  float16x8x4_t
! foo1 (float16_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4x4_t
! foo (float32_t const * addr)
  {
    return vld4q_f32 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.32"  }  } */
- /* { dg-final { scan-assembler "vld41.32"  }  } */
- /* { dg-final { scan-assembler "vld42.32"  }  } */
- /* { dg-final { scan-assembler "vld43.32"  }  } */
  
  float32x4x4_t
! foo1 (float32_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.32"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  float32x4x4_t
! foo (float32_t const *addr)
  {
    return vld4q_f32 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  float32x4x4_t
! foo1 (float32_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8x4_t
! foo (int16_t const * addr)
  {
    return vld4q_s16 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.16"  }  } */
- /* { dg-final { scan-assembler "vld41.16"  }  } */
- /* { dg-final { scan-assembler "vld42.16"  }  } */
- /* { dg-final { scan-assembler "vld43.16"  }  } */
  
  int16x8x4_t
! foo1 (int16_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.16"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  int16x8x4_t
! foo (int16_t const *addr)
  {
    return vld4q_s16 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  int16x8x4_t
! foo1 (int16_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4x4_t
! foo (int32_t const * addr)
  {
    return vld4q_s32 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.32"  }  } */
- /* { dg-final { scan-assembler "vld41.32"  }  } */
- /* { dg-final { scan-assembler "vld42.32"  }  } */
- /* { dg-final { scan-assembler "vld43.32"  }  } */
  
  int32x4x4_t
! foo1 (int32_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.32"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  int32x4x4_t
! foo (int32_t const *addr)
  {
    return vld4q_s32 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  int32x4x4_t
! foo1 (int32_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16x4_t
! foo (int8_t const * addr)
  {
    return vld4q_s8 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.8"  }  } */
- /* { dg-final { scan-assembler "vld41.8"  }  } */
- /* { dg-final { scan-assembler "vld42.8"  }  } */
- /* { dg-final { scan-assembler "vld43.8"  }  } */
  
  int8x16x4_t
! foo1 (int8_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.8"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  int8x16x4_t
! foo (int8_t const *addr)
  {
    return vld4q_s8 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  int8x16x4_t
! foo1 (int8_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8x4_t
! foo (uint16_t const * addr)
  {
    return vld4q_u16 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.16"  }  } */
- /* { dg-final { scan-assembler "vld41.16"  }  } */
- /* { dg-final { scan-assembler "vld42.16"  }  } */
- /* { dg-final { scan-assembler "vld43.16"  }  } */
  
  uint16x8x4_t
! foo1 (uint16_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.16"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  uint16x8x4_t
! foo (uint16_t const *addr)
  {
    return vld4q_u16 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  uint16x8x4_t
! foo1 (uint16_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4x4_t
! foo (uint32_t const * addr)
  {
    return vld4q_u32 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.32"  }  } */
- /* { dg-final { scan-assembler "vld41.32"  }  } */
- /* { dg-final { scan-assembler "vld42.32"  }  } */
- /* { dg-final { scan-assembler "vld43.32"  }  } */
  
  uint32x4x4_t
! foo1 (uint32_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.32"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  uint32x4x4_t
! foo (uint32_t const *addr)
  {
    return vld4q_u32 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  uint32x4x4_t
! foo1 (uint32_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,24 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16x4_t
! foo (uint8_t const * addr)
  {
    return vld4q_u8 (addr);
  }
  
- /* { dg-final { scan-assembler "vld40.8"  }  } */
- /* { dg-final { scan-assembler "vld41.8"  }  } */
- /* { dg-final { scan-assembler "vld42.8"  }  } */
- /* { dg-final { scan-assembler "vld43.8"  }  } */
  
  uint8x16x4_t
! foo1 (uint8_t const * addr)
  {
    return vld4q (addr);
  }
  
! /* { dg-final { scan-assembler "vld40.8"  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vld40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  uint8x16x4_t
! foo (uint8_t const *addr)
  {
    return vld4q_u8 (addr);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vld40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vld43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  uint8x16x4_t
! foo1 (uint8_t const *addr)
  {
    return vld4q (addr);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int8_t const * base, uint16x8_t offset)
  {
    return vldrbq_gather_offset_s16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrb.s16"  }  } */
  
  int16x8_t
! foo1 (int8_t const * base, uint16x8_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.s16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int8_t const *base, uint16x8_t offset)
  {
    return vldrbq_gather_offset_s16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrb.s16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int8_t const *base, uint16x8_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int8_t const * base, uint32x4_t offset)
  {
    return vldrbq_gather_offset_s32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrb.s32"  }  } */
  
  int32x4_t
! foo1 (int8_t const * base, uint32x4_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int8_t const *base, uint32x4_t offset)
  {
    return vldrbq_gather_offset_s32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrb.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int8_t const *base, uint32x4_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8_t const * base, uint8x16_t offset)
  {
    return vldrbq_gather_offset_s8 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrb.u8"  }  } */
  
  int8x16_t
! foo1 (int8_t const * base, uint8x16_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrb.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8_t const *base, uint8x16_t offset)
  {
    return vldrbq_gather_offset_s8 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrb.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8_t const *base, uint8x16_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint8_t const * base, uint16x8_t offset)
  {
    return vldrbq_gather_offset_u16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrb.u16"  }  } */
  
  uint16x8_t
! foo1 (uint8_t const * base, uint16x8_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrb.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint8_t const *base, uint16x8_t offset)
  {
    return vldrbq_gather_offset_u16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrb.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint8_t const *base, uint16x8_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint8_t const * base, uint32x4_t offset)
  {
    return vldrbq_gather_offset_u32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrb.u32"  }  } */
  
  uint32x4_t
! foo1 (uint8_t const * base, uint32x4_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrb.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint8_t const *base, uint32x4_t offset)
  {
    return vldrbq_gather_offset_u32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrb.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint8_t const *base, uint32x4_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8_t const * base, uint8x16_t offset)
  {
    return vldrbq_gather_offset_u8 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrb.u8"  }  } */
  
  uint8x16_t
! foo1 (uint8_t const * base, uint8x16_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrb.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8_t const *base, uint8x16_t offset)
  {
    return vldrbq_gather_offset_u8 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrb.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo1 (uint8_t const *base, uint8x16_t offset)
  {
    return vldrbq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int8_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_s16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrbt.s16"  }  } */
  
  int16x8_t
! foo1 (int8_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.s16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int8_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_s16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.s16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int8_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int8_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_s32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrbt.s32"  }  } */
  
  int32x4_t
! foo1 (int8_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int8_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_s32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int8_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8_t const * base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_s8 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrbt.u8"  }  } */
  
  int8x16_t
! foo1 (int8_t const * base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8_t const *base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_s8 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8_t const *base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint8_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_u16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrbt.u16"  }  } */
  
  uint16x8_t
! foo1 (uint8_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint8_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_u16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint8_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint8_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_u32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrbt.u32"  }  } */
  
  uint32x4_t
! foo1 (uint8_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint8_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_u32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint8_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8_t const * base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_u8 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrbt.u8"  }  } */
  
  uint8x16_t
! foo1 (uint8_t const * base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8_t const *base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z_u8 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo1 (uint8_t const *base, uint8x16_t offset, mve_pred16_t p)
  {
    return vldrbq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int8_t const * base)
  {
    return vldrbq_s16 (base);
  }
  
! /* { dg-final { scan-assembler "vldrb.s16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.s16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int8_t const *base)
  {
    return vldrbq_s16 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int8_t const * base)
  {
    return vldrbq_s32 (base);
  }
  
! /* { dg-final { scan-assembler "vldrb.s32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int8_t const *base)
  {
    return vldrbq_s32 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8_t const * base)
  {
    return vldrbq_s8 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrb.8" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8_t const *base)
  {
    return vldrbq_s8 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint8_t const * base)
  {
    return vldrbq_u16 (base);
  }
  
! /* { dg-final { scan-assembler "vldrb.u16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint8_t const *base)
  {
    return vldrbq_u16 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint8_t const * base)
  {
    return vldrbq_u32 (base);
  }
  
! /* { dg-final { scan-assembler "vldrb.u32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint8_t const *base)
  {
    return vldrbq_u32 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8_t const * base)
  {
    return vldrbq_u8 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrb.8" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8_t const *base)
  {
    return vldrbq_u8 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int8_t const * base, mve_pred16_t p)
  {
    return vldrbq_z_s16 (base, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.s16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.s16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int8_t const *base, mve_pred16_t p)
  {
    return vldrbq_z_s16 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int8_t const * base, mve_pred16_t p)
  {
    return vldrbq_z_s32 (base, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.s32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int8_t const *base, mve_pred16_t p)
  {
    return vldrbq_z_s32 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8_t const * base, mve_pred16_t p)
  {
    return vldrbq_z_s8 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrbt.8" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8_t const *base, mve_pred16_t p)
  {
    return vldrbq_z_s8 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint8_t const * base, mve_pred16_t p)
  {
    return vldrbq_z_u16 (base, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.u16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint8_t const *base, mve_pred16_t p)
  {
    return vldrbq_z_u16 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint8_t const * base, mve_pred16_t p)
  {
    return vldrbq_z_u32 (base, p);
  }
  
! /* { dg-final { scan-assembler "vldrbt.u32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint8_t const *base, mve_pred16_t p)
  {
    return vldrbq_z_u32 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8_t const * base, mve_pred16_t p)
  {
    return vldrbq_z_u8 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrbt.8" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8_t const *base, mve_pred16_t p)
  {
    return vldrbq_z_u8 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (uint64x2_t addr)
  {
!   return vldrdq_gather_base_s64 (addr, 8);
  }
  
! /* { dg-final { scan-assembler "vldrd.64"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (uint64x2_t addr)
  {
!   return vldrdq_gather_base_s64 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint64x2_t addr)
  {
!   return vldrdq_gather_base_u64 (addr, 8);
  }
  
! /* { dg-final { scan-assembler "vldrd.64"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint64x2_t addr)
  {
!   return vldrdq_gather_base_u64 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,16 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
! foo (uint64x2_t * addr)
  {
!   return vldrdq_gather_base_wb_s64 (addr, 8);
  }
  
! /* { dg-final { scan-assembler "vldrd.64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */
! /* { dg-final { scan-assembler-times "vstrw.32" 1 } } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo (uint64x2_t *addr)
  {
!   return vldrdq_gather_base_wb_s64 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,16 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
! foo (uint64x2_t * addr)
  {
!   return vldrdq_gather_base_wb_u64 (addr, 8);
  }
  
! /* { dg-final { scan-assembler "vldrd.64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */
! /* { dg-final { scan-assembler-times "vstrw.32" 1 } } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo (uint64x2_t *addr)
  {
!   return vldrdq_gather_base_wb_u64 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  #include "arm_mve.h"
  
! int64x2_t foo (uint64x2_t * addr, mve_pred16_t p)
  {
!     return vldrdq_gather_base_wb_z_s64 (addr, 1016, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vldrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */
! /* { dg-final { scan-assembler-times "vstrw.32" 1 } } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
! 
! /*
! **foo:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vldrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
! **	...
! */
! int64x2_t
! foo (uint64x2_t *addr, mve_pred16_t p)
  {
!   return vldrdq_gather_base_wb_z_s64 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  #include "arm_mve.h"
  
! uint64x2_t foo (uint64x2_t * addr, mve_pred16_t p)
  {
!     return vldrdq_gather_base_wb_z_u64 (addr, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vldrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */
! /* { dg-final { scan-assembler-times "vstrw.32" 1 } } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
! 
! /*
! **foo:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vldrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
! **	...
! */
! uint64x2_t
! foo (uint64x2_t *addr, mve_pred16_t p)
  {
!   return vldrdq_gather_base_wb_z_u64 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (uint64x2_t addr, mve_pred16_t p)
  {
!   return vldrdq_gather_base_z_s64 (addr, 8, p);
  }
  
! /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (uint64x2_t addr, mve_pred16_t p)
  {
!   return vldrdq_gather_base_z_s64 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint64x2_t addr, mve_pred16_t p)
  {
!   return vldrdq_gather_base_z_u64 (addr, 8, p);
  }
  
! /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint64x2_t addr, mve_pred16_t p)
  {
!   return vldrdq_gather_base_z_u64 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
! foo (int64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_offset_s64 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrd.u64"  }  } */
  
  int64x2_t
! foo1 (int64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrd.u64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo (int64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_offset_s64 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo1 (int64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
! foo (uint64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_offset_u64 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrd.u64"  }  } */
  
  uint64x2_t
! foo1 (uint64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrd.u64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo (uint64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_offset_u64 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo1 (uint64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
! foo (int64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z_s64 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
  
  int64x2_t
! foo1 (int64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo (int64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z_s64 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo1 (int64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
! foo (uint64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z_u64 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
  
  uint64x2_t
! foo1 (uint64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo (uint64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z_u64 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo1 (uint64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
! foo (int64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset_s64 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrd.u64"  }  } */
  
  int64x2_t
! foo1 (int64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrd.u64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo (int64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset_s64 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo1 (int64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
! foo (uint64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset_u64 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrd.u64"  }  } */
  
  uint64x2_t
! foo1 (uint64_t const * base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrd.u64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo (uint64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset_u64 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrd.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo1 (uint64_t const *base, uint64x2_t offset)
  {
    return vldrdq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
! foo (int64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z_s64 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
  
  int64x2_t
! foo1 (int64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo (int64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z_s64 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  int64x2_t
! foo1 (int64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
! foo (uint64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z_u64 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
  
  uint64x2_t
! foo1 (uint64_t const * base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrdt.u64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo (uint64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z_u64 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrdt.u64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  uint64x2_t
! foo1 (uint64_t const *base, uint64x2_t offset, mve_pred16_t p)
  {
    return vldrdq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base)
  {
    return vldrhq_f16 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.16" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base)
  {
    return vldrhq_f16 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_offset_f16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.f16"  }  } */
  
  float16x8_t
! foo1 (float16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_offset_f16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_offset_s16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.u16"  }  } */
  
  int16x8_t
! foo1 (int16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_offset_s16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_offset_s32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.s32"  }  } */
  
  int32x4_t
! foo1 (int16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_offset_s32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_offset_u16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_offset_u16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_offset_u32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.u32"  }  } */
  
  uint32x4_t
! foo1 (uint16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_offset_u32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_f16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.f16"  }  } */
  
  float16x8_t
! foo1 (float16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_f16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_s16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.u16"  }  } */
  
  int16x8_t
! foo1 (int16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_s16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_s32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.s32"  }  } */
  
  int32x4_t
! foo1 (int16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_s32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_u16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_u16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_u32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.u32"  }  } */
  
  uint32x4_t
! foo1 (uint16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z_u32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset_f16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.f16"  }  } */
  
  float16x8_t
! foo1 (float16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset_f16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset_s16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.u16"  }  } */
  
  int16x8_t
! foo1 (int16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset_s16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset_s32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.s32"  }  } */
  
  int32x4_t
! foo1 (int16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset_s32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset_u16 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16_t const * base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset_u16 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16_t const *base, uint16x8_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset_u32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrh.u32"  }  } */
  
  uint32x4_t
! foo1 (uint16_t const * base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrh.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset_u32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrh.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint16_t const *base, uint32x4_t offset)
  {
    return vldrhq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_f16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.f16"  }  } */
  
  float16x8_t
! foo1 (float16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_f16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.f16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo1 (float16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_s16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.u16"  }  } */
  
  int16x8_t
! foo1 (int16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_s16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_s32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.s32"  }  } */
  
  int32x4_t
! foo1 (int16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_s32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_u16 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16_t const * base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_u16 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16_t const *base, uint16x8_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_u32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrht.u32"  }  } */
  
  uint32x4_t
! foo1 (uint16_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrht.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z_u32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint16_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrhq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base)
  {
    return vldrhq_s16 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.16" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base)
  {
    return vldrhq_s16 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int16_t const * base)
  {
    return vldrhq_s32 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.s32" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int16_t const *base)
  {
    return vldrhq_s32 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base)
  {
    return vldrhq_u16 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.16" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base)
  {
    return vldrhq_u16 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint16_t const * base)
  {
    return vldrhq_u32 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrh.u32" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrh.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint16_t const *base)
  {
    return vldrhq_u32 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
! foo (float16_t const * base, mve_pred16_t p)
  {
    return vldrhq_z_f16 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrht.16" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float16x8_t
! foo (float16_t const *base, mve_pred16_t p)
  {
    return vldrhq_z_f16 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16_t const * base, mve_pred16_t p)
  {
    return vldrhq_z_s16 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrht.16" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16_t const *base, mve_pred16_t p)
  {
    return vldrhq_z_s16 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int16_t const * base, mve_pred16_t p)
  {
    return vldrhq_z_s32 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrht.s32" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.s32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int16_t const *base, mve_pred16_t p)
  {
    return vldrhq_z_s32 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16_t const * base, mve_pred16_t p)
  {
    return vldrhq_z_u16 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrht.16" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16_t const *base, mve_pred16_t p)
  {
    return vldrhq_z_u16 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint16_t const * base, mve_pred16_t p)
  {
    return vldrhq_z_u32 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrht.u32" 1 }  } */
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrht.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint16_t const *base, mve_pred16_t p)
  {
    return vldrhq_z_u32 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base)
  {
    return vldrwq_f32 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrw.32" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base)
  {
    return vldrwq_f32 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (uint32x4_t addr)
  {
!   return vldrwq_gather_base_f32 (addr, 4);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (uint32x4_t addr)
  {
!   return vldrwq_gather_base_f32 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (uint32x4_t addr)
  {
!   return vldrwq_gather_base_s32 (addr, 4);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (uint32x4_t addr)
  {
!   return vldrwq_gather_base_s32 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t addr)
  {
!   return vldrwq_gather_base_u32 (addr, 4);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t addr)
  {
!   return vldrwq_gather_base_u32 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,16 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (uint32x4_t * addr)
  {
!   return vldrwq_gather_base_wb_f32 (addr, 8);
  }
  
! /* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
! /* { dg-final { scan-assembler "vldrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (uint32x4_t *addr)
  {
!   return vldrwq_gather_base_wb_f32 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,16 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (uint32x4_t * addr)
  {
!   return vldrwq_gather_base_wb_s32 (addr, 8);
  }
  
! /* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
! /* { dg-final { scan-assembler "vldrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (uint32x4_t *addr)
  {
!   return vldrwq_gather_base_wb_s32 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,16 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t * addr)
  {
!   return vldrwq_gather_base_wb_u32 (addr, 8);
  }
  
! /* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
! /* { dg-final { scan-assembler "vldrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t *addr)
  {
!   return vldrwq_gather_base_wb_u32 (addr, 0);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,18 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (uint32x4_t * addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_wb_z_f32 (addr, 8, p);
  }
  
! /* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
! /* { dg-final { scan-assembler "vmsr\t P0, r\[0-9\]+.*" } } */
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vldrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (uint32x4_t *addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_wb_z_f32 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,18 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (uint32x4_t * addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_wb_z_s32 (addr, 8, p);
  }
  
! /* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
! /* { dg-final { scan-assembler "vmsr\t P0, r\[0-9\]+.*" } } */
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vldrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (uint32x4_t *addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_wb_z_s32 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,18 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t * addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_wb_z_u32 (addr, 8, p);
  }
  
! /* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
! /* { dg-final { scan-assembler "vmsr\t P0, r\[0-9\]+.*" } } */
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vldrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
! /* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t *addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_wb_z_u32 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (uint32x4_t addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_z_f32 (addr, 4, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (uint32x4_t addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_z_f32 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (uint32x4_t addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_z_s32 (addr, 4, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (uint32x4_t addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_z_s32 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_z_u32 (addr, 4, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t addr, mve_pred16_t p)
  {
!   return vldrwq_gather_base_z_u32 (addr, 0, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_offset_f32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrw.u32"  }  } */
  
  float32x4_t
! foo1 (float32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_offset_f32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_offset_s32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrw.u32"  }  } */
  
  int32x4_t
! foo1 (int32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_offset_s32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_offset_u32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrw.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_offset_u32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z_f32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
  
  float32x4_t
! foo1 (float32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z_f32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z_s32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
  
  int32x4_t
! foo1 (int32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z_s32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z_u32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z_u32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset_f32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrw.u32"  }  } */
  
  float32x4_t
! foo1 (float32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset_f32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset_s32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrw.u32"  }  } */
  
  int32x4_t
! foo1 (int32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset_s32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset_u32 (base, offset);
  }
  
- /* { dg-final { scan-assembler "vldrw.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32_t const * base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset (base, offset);
  }
  
! /* { dg-final { scan-assembler "vldrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset_u32 (base, offset);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vldrw.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32_t const *base, uint32x4_t offset)
  {
    return vldrwq_gather_shifted_offset (base, offset);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z_f32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
  
  float32x4_t
! foo1 (float32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z_f32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo1 (float32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z_s32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
  
  int32x4_t
! foo1 (int32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z_s32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z_u32 (base, offset, p);
  }
  
- /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32_t const * base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z (base, offset, p);
  }
  
! /* { dg-final { scan-assembler "vldrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z_u32 (base, offset, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.u32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32_t const *base, uint32x4_t offset, mve_pred16_t p)
  {
    return vldrwq_gather_shifted_offset_z (base, offset, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base)
  {
    return vldrwq_s32 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrw.32" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base)
  {
    return vldrwq_s32 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base)
  {
    return vldrwq_u32 (base);
  }
  
! /* { dg-final { scan-assembler-times "vldrw.32" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vldrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base)
  {
    return vldrwq_u32 (base);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
! foo (float32_t const * base, mve_pred16_t p)
  {
    return vldrwq_z_f32 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrwt.32" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  float32x4_t
! foo (float32_t const *base, mve_pred16_t p)
  {
    return vldrwq_z_f32 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32_t const * base, mve_pred16_t p)
  {
    return vldrwq_z_s32 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrwt.32" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32_t const *base, mve_pred16_t p)
  {
    return vldrwq_z_s32 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32_t const * base, mve_pred16_t p)
  {
    return vldrwq_z_u32 (base, p);
  }
  
! /* { dg-final { scan-assembler-times "vpst" 1 }  } */
! /* { dg-final { scan-assembler-times "vldrwt.32" 1 }  } */
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vldrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32_t const *base, mve_pred16_t p)
  {
    return vldrwq_z_u32 (base, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
  /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxaq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxat.s16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxat.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxaq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxat.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxaq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxat.s32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxat.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxaq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxat.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxaq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxat.s8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxat.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxaq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxat.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vmaxaq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmaxa.s16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vmaxaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmaxa.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxa.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vmaxaq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxa.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vmaxaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vmaxaq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmaxa.s32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vmaxaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmaxa.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxa.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vmaxaq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxa.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vmaxaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vmaxaq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmaxa.s8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vmaxaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmaxa.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxa.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vmaxaq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxa.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vmaxaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, int16x8_t b, mve_pred16_t p)
  {
*************** foo (uint16_t a, int16x8_t b, mve_pred16
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxavq_p (a, b, p);
  }
  
! 
! int16_t
! foo2 (uint8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmaxavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxavt.s16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint16_t
! foo2 (int16x8_t b, mve_pred16_t p)
  {
!   return vmaxavq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int32x4_t b, mve_pred16_t p)
  {
*************** foo (uint32_t a, int32x4_t b, mve_pred16
*** 11,28 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxavq_p (a, b, p);
  }
  
! 
! int32_t
! foo2 (uint16_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmaxavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxavt.s32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int32x4_t b, mve_pred16_t p)
  {
!   return vmaxavq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, int8x16_t b, mve_pred16_t p)
  {
*************** foo (uint8_t a, int8x16_t b, mve_pred16_
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxavq_p (a, b, p);
  }
  
! 
! int8_t
! foo2 (uint32_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vmaxavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxavt.s8" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint8_t
! foo2 (int8x16_t b, mve_pred16_t p)
  {
!   return vmaxavq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxav.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, int16x8_t b)
  {
*************** foo (uint16_t a, int16x8_t b)
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, int16x8_t b)
  {
    return vmaxavq (a, b);
  }
  
! 
! int16_t
! foo2 (uint8_t a, int16x8_t b)
  {
!   return vmaxavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxav.s16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxav.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, int16x8_t b)
  {
    return vmaxavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxav.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint16_t
! foo2 (int16x8_t b)
  {
!   return vmaxavq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxav.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int32x4_t b)
  {
*************** foo (uint32_t a, int32x4_t b)
*** 11,28 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, int32x4_t b)
  {
    return vmaxavq (a, b);
  }
  
! 
! int32_t
! foo2 (uint16_t a, int32x4_t b)
  {
!   return vmaxavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxav.s32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxav.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int32x4_t b)
  {
    return vmaxavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxav.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int32x4_t b)
  {
!   return vmaxavq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxav.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, int8x16_t b)
  {
*************** foo (uint8_t a, int8x16_t b)
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, int8x16_t b)
  {
    return vmaxavq (a, b);
  }
  
! 
! int8_t
! foo2 (uint32_t a, int8x16_t b)
  {
!   return vmaxavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxav.s8" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxav.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, int8x16_t b)
  {
    return vmaxavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxav.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint8_t
! foo2 (int8x16_t b)
  {
!   return vmaxavq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vmaxnmaq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmaxnma.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vmaxnmaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmaxnma.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnma.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vmaxnmaq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnma.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vmaxnmaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vmaxnmaq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmaxnma.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vmaxnmaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmaxnma.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnma.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vmaxnmaq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnma.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vmaxnmaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxnmat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxnmat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b)
- {
-   return vmaxnmavq (a, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnmav.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b)
  {
*************** foo (float16_t a, float16x8_t b)
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vmaxnmavq (a, b);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b)
  {
!   return vmaxnmavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmav.f16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnmav.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vmaxnmavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxnmav.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b)
  {
!   return vmaxnmavq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b)
- {
-   return vmaxnmavq (a, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnmav.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b)
  {
*************** foo (float32_t a, float32x4_t b)
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vmaxnmavq (a, b);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b)
  {
!   return vmaxnmavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmav.f32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnmav.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vmaxnmavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxnmav.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b)
  {
!   return vmaxnmavq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
- {
-   return vmaxnmavq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmavt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b, mve_pred16_t p)
  {
*************** foo (float16_t a, float16x8_t b, mve_pre
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmavq_p (a, b, p);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
  {
!   return vmaxnmavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmavt.f16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmavt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxnmavt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b, mve_pred16_t p)
  {
!   return vmaxnmavq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
- {
-   return vmaxnmavq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmavt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b, mve_pred16_t p)
  {
*************** foo (float32_t a, float32x4_t b, mve_pre
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmavq_p (a, b, p);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
  {
!   return vmaxnmavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmavt.f32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmavt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxnmavt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b, mve_pred16_t p)
  {
!   return vmaxnmavq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vmaxnmq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmaxnm.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vmaxnmq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmaxnm.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnm.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vmaxnmq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnm.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vmaxnmq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vmaxnmq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmaxnm.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vmaxnmq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmaxnm.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnm.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vmaxnmq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnm.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vmaxnmq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxnmt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxnmt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxnmt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxnmt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxnmt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxnmt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b)
- {
-   return vmaxnmvq (23.35, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnmv.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b)
  {
*************** foo (float16_t a, float16x8_t b)
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vmaxnmvq (a, b);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b)
  {
!   return vmaxnmvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmv.f16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnmv.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vmaxnmvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxnmv.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b)
  {
!   return vmaxnmvq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b)
- {
-   return vmaxnmvq (34.56, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxnmv.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b)
  {
*************** foo (float32_t a, float32x4_t b)
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vmaxnmvq (a, b);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b)
  {
!   return vmaxnmvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmv.f32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxnmv.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vmaxnmvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxnmv.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b)
  {
!   return vmaxnmvq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
- {
-   return vmaxnmvq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmvt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b, mve_pred16_t p)
  {
*************** foo (float16_t a, float16x8_t b, mve_pre
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmvq_p (a, b, p);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
  {
!   return vmaxnmvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmvt.f16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmvt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmaxnmvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxnmvt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b, mve_pred16_t p)
  {
!   return vmaxnmvq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
- {
-   return vmaxnmvq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmvt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b, mve_pred16_t p)
  {
*************** foo (float32_t a, float32x4_t b, mve_pre
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmvq_p (a, b, p);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
  {
!   return vmaxnmvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxnmvt.f32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxnmvt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmaxnmvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxnmvt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b, mve_pred16_t p)
  {
!   return vmaxnmvq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmaxt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmaxq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmax.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmaxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmax.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmax.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmaxq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmax.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmaxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmaxq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmax.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmaxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmax.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmax.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmaxq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmax.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmaxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmaxq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmax.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmaxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmax.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmax.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmaxq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmax.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmaxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmaxq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmax.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmaxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmax.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmax.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmaxq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmax.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmaxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmaxq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmax.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmaxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmax.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmax.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmaxq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmax.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmaxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmaxq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmax.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmaxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmax.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmax.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmaxq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmax.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmaxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmaxt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo (int16_t a, int16x8_t b, mve_pred16_t p)
  {
*************** foo (int16_t a, int16x8_t b, mve_pred16_
*** 11,28 ****
  }
  
  
  int16_t
  foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! 
! int16_t
! foo2 (int8_t a, int16x8_t b, mve_pred16_t p)
! {
!   return vmaxvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxvt.s16" 3 } } */
--- 26,49 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b, mve_pred16_t p)
  {
*************** foo (int32_t a, int32x4_t b, mve_pred16_
*** 11,28 ****
  }
  
  
  int32_t
  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! 
! int32_t
! foo2 (int16_t a, int32x4_t b, mve_pred16_t p)
! {
!   return vmaxvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxvt.s32" 3 } } */
--- 26,49 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo (int8_t a, int8x16_t b, mve_pred16_t p)
  {
*************** foo (int8_t a, int8x16_t b, mve_pred16_t
*** 11,28 ****
  }
  
  
  int8_t
  foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! 
! int8_t
! foo2 (int32_t a, int8x16_t b, mve_pred16_t p)
! {
!   return vmaxvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxvt.s8" 3 } } */
--- 26,49 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, uint16x8_t b, mve_pred16_t p)
  {
*************** foo (uint16_t a, uint16x8_t b, mve_pred1
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! 
  uint16_t
! foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vmaxvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxvt.u16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint16_t
! foo2 (uint16x8_t b, mve_pred16_t p)
  {
!   return vmaxvq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
*************** foo (uint32_t a, uint32x4_t b, mve_pred1
*** 11,28 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! 
  uint32_t
! foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vmaxvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxvt.u32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint32_t
! foo2 (uint32x4_t b, mve_pred16_t p)
  {
!   return vmaxvq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, uint8x16_t b, mve_pred16_t p)
  {
*************** foo (uint8_t a, uint8x16_t b, mve_pred16
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! 
  uint8_t
! foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vmaxvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxvt.u8" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmaxvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmaxvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmaxvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint8_t
! foo2 (uint8x16_t b, mve_pred16_t p)
  {
!   return vmaxvq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxv.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo (int16_t a, int16x8_t b)
  {
*************** foo (int16_t a, int16x8_t b)
*** 11,28 ****
  }
  
  
  int16_t
  foo1 (int16_t a, int16x8_t b)
  {
    return vmaxvq (a, b);
  }
  
! 
! int16_t
! foo2 (int8_t a, int16x8_t b)
! {
!   return vmaxvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxv.s16" 3 } } */
--- 22,41 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxv.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo1 (int16_t a, int16x8_t b)
  {
    return vmaxvq (a, b);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxv.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b)
  {
*************** foo (int32_t a, int32x4_t b)
*** 11,28 ****
  }
  
  
  int32_t
  foo1 (int32_t a, int32x4_t b)
  {
    return vmaxvq (a, b);
  }
  
! 
! int32_t
! foo2 (int16_t a, int32x4_t b)
! {
!   return vmaxvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxv.s32" 3 } } */
--- 22,41 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxv.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b)
  {
    return vmaxvq (a, b);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxv.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo (int8_t a, int8x16_t b)
  {
*************** foo (int8_t a, int8x16_t b)
*** 11,28 ****
  }
  
  
  int8_t
  foo1 (int8_t a, int8x16_t b)
  {
    return vmaxvq (a, b);
  }
  
! 
! int8_t
! foo2 (int32_t a, int8x16_t b)
! {
!   return vmaxvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxv.s8" 3 } } */
--- 22,41 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxv.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo1 (int8_t a, int8x16_t b)
  {
    return vmaxvq (a, b);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, uint16x8_t b)
  {
*************** foo (uint16_t a, uint16x8_t b)
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, uint16x8_t b)
  {
    return vmaxvq (a, b);
  }
  
! 
  uint16_t
! foo2 (uint32_t a, uint16x8_t b)
  {
!   return vmaxvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxv.u16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, uint16x8_t b)
  {
    return vmaxvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint16_t
! foo2 (uint16x8_t b)
  {
!   return vmaxvq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b)
  {
*************** foo (uint32_t a, uint32x4_t b)
*** 11,28 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b)
  {
    return vmaxvq (a, b);
  }
  
! 
  uint32_t
! foo2 (uint8_t a, uint32x4_t b)
  {
!   return vmaxvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxv.u32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b)
  {
    return vmaxvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint32_t
! foo2 (uint32x4_t b)
  {
!   return vmaxvq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmaxv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, uint8x16_t b)
  {
*************** foo (uint8_t a, uint8x16_t b)
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, uint8x16_t b)
  {
    return vmaxvq (a, b);
  }
  
! 
  uint8_t
! foo2 (uint16_t a, uint8x16_t b)
  {
!   return vmaxvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vmaxv.u8" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmaxv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, uint8x16_t b)
  {
    return vmaxvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmaxv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint8_t
! foo2 (uint8x16_t b)
  {
!   return vmaxvq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminaq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminat.s16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminat.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminaq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminat.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminaq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminat.s32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminat.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminaq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminat.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminaq_m_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminat.s8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminat.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminaq_m_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminat.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vminaq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmina.s16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vminaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmina.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmina.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vminaq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmina.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vminaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vminaq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmina.s32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vminaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmina.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmina.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vminaq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmina.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vminaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vminaq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmina.s8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vminaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmina.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmina.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vminaq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmina.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vminaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, int16x8_t b, mve_pred16_t p)
  {
*************** foo (uint16_t a, int16x8_t b, mve_pred16
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminavq_p (a, b, p);
  }
  
! 
! int16_t
! foo2 (uint8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vminavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminavt.s16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint16_t
! foo2 (int16x8_t b, mve_pred16_t p)
  {
!   return vminavq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int32x4_t b, mve_pred16_t p)
  {
*************** foo (uint32_t a, int32x4_t b, mve_pred16
*** 11,28 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminavq_p (a, b, p);
  }
  
! 
! int32_t
! foo2 (uint16_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vminavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminavt.s32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int32x4_t b, mve_pred16_t p)
  {
!   return vminavq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, int8x16_t b, mve_pred16_t p)
  {
*************** foo (uint8_t a, int8x16_t b, mve_pred16_
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminavq_p (a, b, p);
  }
  
! 
! int8_t
! foo2 (uint32_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vminavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminavt.s8" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint8_t
! foo2 (int8x16_t b, mve_pred16_t p)
  {
!   return vminavq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminav.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, int16x8_t b)
  {
*************** foo (uint16_t a, int16x8_t b)
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, int16x8_t b)
  {
    return vminavq (a, b);
  }
  
! 
! int16_t
! foo2 (uint8_t a, int16x8_t b)
  {
!   return vminavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminav.s16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminav.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, int16x8_t b)
  {
    return vminavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminav.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint16_t
! foo2 (int16x8_t b)
  {
!   return vminavq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminav.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, int32x4_t b)
  {
*************** foo (uint32_t a, int32x4_t b)
*** 11,28 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, int32x4_t b)
  {
    return vminavq (a, b);
  }
  
! 
! int32_t
! foo2 (uint16_t a, int32x4_t b)
  {
!   return vminavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminav.s32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminav.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, int32x4_t b)
  {
    return vminavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminav.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (int32x4_t b)
  {
!   return vminavq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminav.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, int8x16_t b)
  {
*************** foo (uint8_t a, int8x16_t b)
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, int8x16_t b)
  {
    return vminavq (a, b);
  }
  
! 
! int8_t
! foo2 (uint32_t a, int8x16_t b)
  {
!   return vminavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminav.s8" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminav.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, int8x16_t b)
  {
    return vminavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminav.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint8_t
! foo2 (int8x16_t b)
  {
!   return vminavq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vminnmaq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vminnma.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vminnmaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vminnma.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnma.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vminnmaq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnma.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vminnmaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vminnmaq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vminnma.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vminnmaq (a, b);
  }
  
! /* { dg-final { scan-assembler "vminnma.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnma.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vminnmaq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnma.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vminnmaq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmaq_m_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminnmat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmaq_m_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmaq_m_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminnmat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmaq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmaq_m_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmaq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b)
- {
-   return vminnmavq (a, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnmav.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b)
  {
*************** foo (float16_t a, float16x8_t b)
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vminnmavq (a, b);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b)
  {
!   return vminnmavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmav.f16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnmav.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vminnmavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminnmav.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b)
  {
!   return vminnmavq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b)
- {
-   return vminnmavq (a, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnmav.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b)
  {
*************** foo (float32_t a, float32x4_t b)
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vminnmavq (a, b);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b)
  {
!   return vminnmavq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmav.f32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnmav.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vminnmavq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminnmav.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b)
  {
!   return vminnmavq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
- {
-   return vminnmavq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmavt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b, mve_pred16_t p)
  {
*************** foo (float16_t a, float16x8_t b, mve_pre
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmavq_p (a, b, p);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
  {
!   return vminnmavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmavt.f16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmavt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminnmavt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b, mve_pred16_t p)
  {
!   return vminnmavq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
- {
-   return vminnmavq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmavt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b, mve_pred16_t p)
  {
*************** foo (float32_t a, float32x4_t b, mve_pre
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmavq_p (a, b, p);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
  {
!   return vminnmavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmavt.f32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmavt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmavq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminnmavt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b, mve_pred16_t p)
  {
!   return vminnmavq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vminnmq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vminnm.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vminnmq (a, b);
  }
  
! /* { dg-final { scan-assembler "vminnm.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnm.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vminnmq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnm.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vminnmq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vminnmq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vminnm.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vminnmq (a, b);
  }
  
! /* { dg-final { scan-assembler "vminnm.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnm.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vminnmq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnm.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vminnmq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminnmt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vminnmt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminnmt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vminnmt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminnmt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vminnmt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b)
- {
-   return vminnmvq (a, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnmv.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b)
  {
*************** foo (float16_t a, float16x8_t b)
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vminnmvq (a, b);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b)
  {
!   return vminnmvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmv.f16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnmv.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vminnmvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminnmv.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b)
  {
!   return vminnmvq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b)
- {
-   return vminnmvq (a, b);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminnmv.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b)
  {
*************** foo (float32_t a, float32x4_t b)
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vminnmvq (a, b);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b)
  {
!   return vminnmvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmv.f32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminnmv.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vminnmvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminnmv.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b)
  {
!   return vminnmvq (1.1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16_t
- foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
- {
-   return vminnmvq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmvt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo (float16_t a, float16x8_t b, mve_pred16_t p)
  {
*************** foo (float16_t a, float16x8_t b, mve_pre
*** 11,28 ****
  }
  
  
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmvq_p (a, b, p);
  }
  
! 
  float16_t
! foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
  {
!   return vminnmvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmvt.f16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmvt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminnmvt.f16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float16_t
! foo2 (float16x8_t b, mve_pred16_t p)
  {
!   return vminnmvq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32_t
- foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
- {
-   return vminnmvq_p (a, b, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmvt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo (float32_t a, float32x4_t b, mve_pred16_t p)
  {
*************** foo (float32_t a, float32x4_t b, mve_pre
*** 11,28 ****
  }
  
  
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmvq_p (a, b, p);
  }
  
! 
  float32_t
! foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
  {
!   return vminnmvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminnmvt.f32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminnmvt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminnmvt.f32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  float32_t
! foo2 (float32x4_t b, mve_pred16_t p)
  {
!   return vminnmvq_p (1.1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmint.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmint.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmint.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmint.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmint.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmint.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vminq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmin.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vminq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmin.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmin.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vminq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmin.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vminq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vminq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmin.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vminq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmin.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmin.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vminq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmin.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vminq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vminq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmin.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vminq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmin.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmin.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vminq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmin.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vminq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vminq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmin.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vminq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmin.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmin.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vminq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmin.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vminq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vminq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmin.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vminq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmin.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmin.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vminq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmin.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vminq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vminq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmin.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vminq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmin.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmin.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vminq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmin.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vminq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmint.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmint.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo (int16_t a, int16x8_t b, mve_pred16_t p)
  {
*************** foo (int16_t a, int16x8_t b, mve_pred16_
*** 11,28 ****
  }
  
  
  int16_t
  foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! 
! int16_t
! foo2 (int8_t a, int16x8_t b, mve_pred16_t p)
! {
!   return vminvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminvt.s16" 3 } } */
--- 26,49 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b, mve_pred16_t p)
  {
*************** foo (int32_t a, int32x4_t b, mve_pred16_
*** 11,28 ****
  }
  
  
  int32_t
  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! 
! int32_t
! foo2 (int16_t a, int32x4_t b, mve_pred16_t p)
! {
!   return vminvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminvt.s32" 3 } } */
--- 26,49 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo (int8_t a, int8x16_t b, mve_pred16_t p)
  {
*************** foo (int8_t a, int8x16_t b, mve_pred16_t
*** 11,28 ****
  }
  
  
  int8_t
  foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! 
! int8_t
! foo2 (int32_t a, int8x16_t b, mve_pred16_t p)
! {
!   return vminvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminvt.s8" 3 } } */
--- 26,49 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, uint16x8_t b, mve_pred16_t p)
  {
*************** foo (uint16_t a, uint16x8_t b, mve_pred1
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! 
  uint16_t
! foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vminvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminvt.u16" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminvt.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint16_t
! foo2 (uint16x8_t b, mve_pred16_t p)
  {
!   return vminvq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
*************** foo (uint32_t a, uint32x4_t b, mve_pred1
*** 11,28 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! 
  uint32_t
! foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vminvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminvt.u32" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminvt.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint32_t
! foo2 (uint32x4_t b, mve_pred16_t p)
  {
!   return vminvq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,24 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, uint8x16_t b, mve_pred16_t p)
  {
*************** foo (uint8_t a, uint8x16_t b, mve_pred16
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! 
  uint8_t
! foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vminvq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminvt.u8" 3 } } */
--- 26,65 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vminvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vminvt.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
  uint8_t
! foo2 (uint8x16_t b, mve_pred16_t p)
  {
!   return vminvq_p (1, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminv.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo (int16_t a, int16x8_t b)
  {
*************** foo (int16_t a, int16x8_t b)
*** 11,27 ****
  }
  
  
  int16_t
  foo1 (int16_t a, int16x8_t b)
  {
    return vminvq (a, b);
  }
  
! int16_t
! foo2 (int8_t a, int16x8_t b)
! {
!   return vminvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminv.s16" 3 } } */
--- 22,41 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminv.s16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16_t
  foo1 (int16_t a, int16x8_t b)
  {
    return vminvq (a, b);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminv.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b)
  {
*************** foo (int32_t a, int32x4_t b)
*** 11,27 ****
  }
  
  
  int32_t
  foo1 (int32_t a, int32x4_t b)
  {
    return vminvq (a, b);
  }
  
! int32_t
! foo2 (int8_t a, int32x4_t b)
! {
!   return vminvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminv.s32" 3 } } */
--- 22,41 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminv.s32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b)
  {
    return vminvq (a, b);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminv.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo (int8_t a, int8x16_t b)
  {
*************** foo (int8_t a, int8x16_t b)
*** 11,27 ****
  }
  
  
  int8_t
  foo1 (int8_t a, int8x16_t b)
  {
    return vminvq (a, b);
  }
  
! int8_t
! foo2 (int32_t a, int8x16_t b)
! {
!   return vminvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminv.s8" 3 } } */
--- 22,41 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminv.s8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8_t
  foo1 (int8_t a, int8x16_t b)
  {
    return vminvq (a, b);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo (uint16_t a, uint16x8_t b)
  {
*************** foo (uint16_t a, uint16x8_t b)
*** 11,28 ****
  }
  
  
  uint16_t
  foo1 (uint16_t a, uint16x8_t b)
  {
    return vminvq (a, b);
  }
  
! 
! uint8_t
! foo2 (uint32_t a, uint16x8_t b)
  {
!   return vminvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminv.u16" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16_t
  foo1 (uint16_t a, uint16x8_t b)
  {
    return vminvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminv.u16	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint16_t
! foo2 (uint16x8_t b)
  {
!   return vminvq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo (uint32_t a, uint32x4_t b)
  {
*************** foo (uint32_t a, uint32x4_t b)
*** 11,27 ****
  }
  
  
  uint32_t
  foo1 (uint32_t a, uint32x4_t b)
  {
    return vminvq (a, b);
  }
  
  uint32_t
! foo2 (uint16_t a, uint32x4_t b)
  {
!   return vminvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminv.u32" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
  foo1 (uint32_t a, uint32x4_t b)
  {
    return vminvq (a, b);
  }
  
+ /*
+ **foo2:
+ **	...
+ **	vminv.u32	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo2 (uint32x4_t b)
  {
!   return vminvq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,9 ****
--- 1,20 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vminv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo (uint8_t a, uint8x16_t b)
  {
*************** foo (uint8_t a, uint8x16_t b)
*** 11,28 ****
  }
  
  
  uint8_t
  foo1 (uint8_t a, uint8x16_t b)
  {
    return vminvq (a, b);
  }
  
! 
! uint16_t
! foo2 (uint32_t a, uint8x16_t b)
  {
!   return vminvq (a, b);
  }
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
! /* { dg-final { scan-assembler-times "vminv.u8" 3 } } */
--- 22,53 ----
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vminv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8_t
  foo1 (uint8_t a, uint8x16_t b)
  {
    return vminvq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vminv.u8	(?:ip|fp|r[0-9]+), q[0-9]+(?:	@.*|)
! **	...
! */
! uint8_t
! foo2 (uint8x16_t b)
  {
!   return vminvq (1, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmladavaq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavat.s16"  }  } */
  
  int32_t
! foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmladavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavat.s16"  }  } */
! /* { dg-final { scan-assembler "vmladavat.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p_s16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmladavaq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavat.s32"  }  } */
  
  int32_t
! foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmladavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavat.s32"  }  } */
! /* { dg-final { scan-assembler "vmladavat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p_s32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
!   return vmladavaq_p_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavat.s8"  }  } */
  
  int32_t
! foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
!   return vmladavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavat.s8"  }  } */
! /* { dg-final { scan-assembler "vmladavat.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p_s8 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
!   return vmladavaq_p_u16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavat.u16"  }  } */
  
  uint32_t
! foo1 (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
!   return vmladavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavat.u16"  }  } */
! /* { dg-final { scan-assembler "vmladavat.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t add, uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p_u16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint32_t add, uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p (add, m1, m2, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmladavat.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
! {
!   return vmladavaq_p (1, m1, m2, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
!   return vmladavaq_p_u32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavat.u32"  }  } */
  
  uint32_t
! foo1 (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
!   return vmladavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavat.u32"  }  } */
! /* { dg-final { scan-assembler "vmladavat.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t add, uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p_u32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint32_t add, uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p (add, m1, m2, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmladavat.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
! {
!   return vmladavaq_p (1, m1, m2, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p)
  {
!   return vmladavaq_p_u8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavat.u8"  }  } */
  
  uint32_t
! foo1 (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p)
  {
!   return vmladavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavat.u8"  }  } */
! /* { dg-final { scan-assembler "vmladavat.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t add, uint8x16_t m1, uint8x16_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p_u8 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavat.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint32_t add, uint8x16_t m1, uint8x16_t m2, mve_pred16_t p)
  {
!   return vmladavaq_p (add, m1, m2, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmladavat.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint32_t
! foo2 (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p)
! {
!   return vmladavaq_p (1, m1, m2, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int16x8_t b, int16x8_t c)
  {
!   return vmladavaq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladava.s16"  }  } */
  
  int32_t
! foo1 (int32_t a, int16x8_t b, int16x8_t c)
  {
!   return vmladavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladava.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladava.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmladavaq_s16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladava.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmladavaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int32x4_t b, int32x4_t c)
  {
!   return vmladavaq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladava.s32"  }  } */
  
  int32_t
! foo1 (int32_t a, int32x4_t b, int32x4_t c)
  {
!   return vmladavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladava.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladava.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmladavaq_s32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladava.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmladavaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int8x16_t b, int8x16_t c)
  {
!   return vmladavaq_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladava.s8"  }  } */
  
  int32_t
! foo1 (int32_t a, int8x16_t b, int8x16_t c)
  {
!   return vmladavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladava.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladava.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int8x16_t m1, int8x16_t m2)
  {
!   return vmladavaq_s8 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladava.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int8x16_t m1, int8x16_t m2)
  {
!   return vmladavaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32_t a, uint16x8_t b, uint16x8_t c)
  {
!   return vmladavaq_u16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladava.u16"  }  } */
  
  uint32_t
! foo1 (uint32_t a, uint16x8_t b, uint16x8_t c)
  {
!   return vmladavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladava.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladava.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t add, uint16x8_t m1, uint16x8_t m2)
  {
!   return vmladavaq_u16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladava.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32_t
+ foo1 (uint32_t add, uint16x8_t m1, uint16x8_t m2)
+ {
+   return vmladavaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmladava.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo2 (uint16x8_t m1, uint16x8_t m2)
  {
!   return vmladavaq (1, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32_t a, uint32x4_t b, uint32x4_t c)
  {
!   return vmladavaq_u32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladava.u32"  }  } */
  
  uint32_t
! foo1 (uint32_t a, uint32x4_t b, uint32x4_t c)
  {
!   return vmladavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladava.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladava.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t add, uint32x4_t m1, uint32x4_t m2)
  {
!   return vmladavaq_u32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladava.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32_t
+ foo1 (uint32_t add, uint32x4_t m1, uint32x4_t m2)
+ {
+   return vmladavaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmladava.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo2 (uint32x4_t m1, uint32x4_t m2)
  {
!   return vmladavaq (1, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32_t a, uint8x16_t b, uint8x16_t c)
  {
!   return vmladavaq_u8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladava.u8"  }  } */
  
  uint32_t
! foo1 (uint32_t a, uint8x16_t b, uint8x16_t c)
  {
!   return vmladavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladava.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladava.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32_t add, uint8x16_t m1, uint8x16_t m2)
  {
!   return vmladavaq_u8 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladava.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32_t
+ foo1 (uint32_t add, uint8x16_t m1, uint8x16_t m2)
+ {
+   return vmladavaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmladava.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo2 (uint8x16_t m1, uint8x16_t m2)
  {
!   return vmladavaq (1, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmladavaxq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavaxt.s16"  }  } */
  
  int32_t
! foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmladavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavaxt.s16"  }  } */
! /* { dg-final { scan-assembler "vmladavaxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavaxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavaxq_p_s16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavaxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavaxq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmladavaxq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavaxt.s32"  }  } */
  
  int32_t
! foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmladavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavaxt.s32"  }  } */
! /* { dg-final { scan-assembler "vmladavaxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavaxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavaxq_p_s32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavaxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavaxq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
!   return vmladavaxq_p_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmladavaxt.s8"  }  } */
  
  int32_t
! foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
!   return vmladavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmladavaxt.s8"  }  } */
! /* { dg-final { scan-assembler "vmladavaxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavaxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavaxq_p_s8 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavaxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavaxq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int16x8_t b, int16x8_t c)
  {
!   return vmladavaxq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladavax.s16"  }  } */
  
  int32_t
! foo1 (int32_t a, int16x8_t b, int16x8_t c)
  {
!   return vmladavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladavax.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladavax.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmladavaxq_s16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladavax.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmladavaxq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int32x4_t b, int32x4_t c)
  {
!   return vmladavaxq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladavax.s32"  }  } */
  
  int32_t
! foo1 (int32_t a, int32x4_t b, int32x4_t c)
  {
!   return vmladavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladavax.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladavax.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmladavaxq_s32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladavax.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmladavaxq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32_t a, int8x16_t b, int8x16_t c)
  {
!   return vmladavaxq_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmladavax.s8"  }  } */
  
  int32_t
! foo1 (int32_t a, int8x16_t b, int8x16_t c)
  {
!   return vmladavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmladavax.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladavax.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32_t add, int8x16_t m1, int8x16_t m2)
  {
!   return vmladavaxq_s8 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladavax.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32_t add, int8x16_t m1, int8x16_t m2)
  {
!   return vmladavaxq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmladavq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavt.s16"  }  } */
  
  int32_t
! foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmladavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavq_p_s16 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmladavq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavt.s32"  }  } */
  
  int32_t
! foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmladavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavq_p_s32 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vmladavq_p_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavt.s8"  }  } */
  
  int32_t
! foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vmladavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavq_p_s8 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vmladavq_p_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavt.u16"  }  } */
  
  uint32_t
! foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vmladavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmladavq_p_u16 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmladavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vmladavq_p_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavt.u32"  }  } */
  
  uint32_t
! foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vmladavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmladavq_p_u32 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmladavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vmladavq_p_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavt.u8"  }  } */
  
  uint32_t
! foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vmladavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p)
  {
!   return vmladavq_p_u8 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavt.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p)
  {
!   return vmladavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int16x8_t a, int16x8_t b)
  {
!   return vmladavq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladav.s16"  }  } */
  
  int32_t
! foo1 (int16x8_t a, int16x8_t b)
  {
!   return vmladavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladav.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladav.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int16x8_t m1, int16x8_t m2)
  {
!   return vmladavq_s16 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladav.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int16x8_t m1, int16x8_t m2)
  {
!   return vmladavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32x4_t a, int32x4_t b)
  {
!   return vmladavq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladav.s32"  }  } */
  
  int32_t
! foo1 (int32x4_t a, int32x4_t b)
  {
!   return vmladavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladav.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladav.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32x4_t m1, int32x4_t m2)
  {
!   return vmladavq_s32 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladav.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32x4_t m1, int32x4_t m2)
  {
!   return vmladavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int8x16_t a, int8x16_t b)
  {
!   return vmladavq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladav.s8"  }  } */
  
  int32_t
! foo1 (int8x16_t a, int8x16_t b)
  {
!   return vmladavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladav.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladav.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int8x16_t m1, int8x16_t m2)
  {
!   return vmladavq_s8 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladav.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int8x16_t m1, int8x16_t m2)
  {
!   return vmladavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint16x8_t a, uint16x8_t b)
  {
!   return vmladavq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladav.u16"  }  } */
  
  uint32_t
! foo1 (uint16x8_t a, uint16x8_t b)
  {
!   return vmladavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladav.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladav.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint16x8_t m1, uint16x8_t m2)
  {
!   return vmladavq_u16 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladav.u16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint16x8_t m1, uint16x8_t m2)
  {
!   return vmladavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint32x4_t a, uint32x4_t b)
  {
!   return vmladavq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladav.u32"  }  } */
  
  uint32_t
! foo1 (uint32x4_t a, uint32x4_t b)
  {
!   return vmladavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladav.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladav.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint32x4_t m1, uint32x4_t m2)
  {
!   return vmladavq_u32 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladav.u32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint32x4_t m1, uint32x4_t m2)
  {
!   return vmladavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32_t
! foo (uint8x16_t a, uint8x16_t b)
  {
!   return vmladavq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladav.u8"  }  } */
  
  uint32_t
! foo1 (uint8x16_t a, uint8x16_t b)
  {
!   return vmladavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladav.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladav.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo (uint8x16_t m1, uint8x16_t m2)
  {
!   return vmladavq_u8 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladav.u8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32_t
! foo1 (uint8x16_t m1, uint8x16_t m2)
  {
!   return vmladavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmladavxq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavxt.s16"  }  } */
  
  int32_t
! foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmladavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavxq_p_s16 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmladavxq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmladavxq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavxt.s32"  }  } */
  
  int32_t
! foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmladavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavxq_p_s32 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmladavxq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vmladavxq_p_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmladavxt.s8"  }  } */
  
  int32_t
! foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vmladavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmladavxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavxq_p_s8 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmladavxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int8x16_t m1, int8x16_t m2, mve_pred16_t p)
  {
!   return vmladavxq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int16x8_t a, int16x8_t b)
  {
!   return vmladavxq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladavx.s16"  }  } */
  
  int32_t
! foo1 (int16x8_t a, int16x8_t b)
  {
!   return vmladavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladavx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladavx.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int16x8_t m1, int16x8_t m2)
  {
!   return vmladavxq_s16 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladavx.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int16x8_t m1, int16x8_t m2)
  {
!   return vmladavxq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int32x4_t a, int32x4_t b)
  {
!   return vmladavxq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladavx.s32"  }  } */
  
  int32_t
! foo1 (int32x4_t a, int32x4_t b)
  {
!   return vmladavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladavx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladavx.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int32x4_t m1, int32x4_t m2)
  {
!   return vmladavxq_s32 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladavx.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int32x4_t m1, int32x4_t m2)
  {
!   return vmladavxq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
! foo (int8x16_t a, int8x16_t b)
  {
!   return vmladavxq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmladavx.s8"  }  } */
  
  int32_t
! foo1 (int8x16_t a, int8x16_t b)
  {
!   return vmladavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmladavx.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmladavx.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo (int8x16_t m1, int8x16_t m2)
  {
!   return vmladavxq_s8 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmladavx.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
! foo1 (int8x16_t m1, int8x16_t m2)
  {
!   return vmladavxq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavat.s16"  }  } */
  
  int64_t
! foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavat.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p_s16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavat.s32"  }  } */
  
  int64_t
! foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p_s32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint64_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p_u16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavat.u16"  }  } */
  
  uint64_t
! foo1 (uint64_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavat.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t add, uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p_u16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint64_t
+ foo1 (uint64_t add, uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
+ {
+   return vmlaldavaq_p (add, m1, m2, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo2 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p (1, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p_u32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavat.u32"  }  } */
  
  uint64_t
! foo1 (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
!   return vmlaldavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavat.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t add, uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p_u32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint64_t
+ foo1 (uint64_t add, uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
+ {
+   return vmlaldavaq_p (add, m1, m2, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo2 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavaq_p (1, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int16x8_t b, int16x8_t c)
  {
!   return vmlaldavaq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlaldava.s16"  }  } */
  
  int64_t
! foo1 (int64_t a, int16x8_t b, int16x8_t c)
  {
!   return vmlaldavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlaldava.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldava.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavaq_s16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldava.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int32x4_t b, int32x4_t c)
  {
!   return vmlaldavaq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlaldava.s32"  }  } */
  
  int64_t
! foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
!   return vmlaldavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlaldava.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldava.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavaq_s32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldava.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint64_t a, uint16x8_t b, uint16x8_t c)
  {
!   return vmlaldavaq_u16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlaldava.u16"  }  } */
  
  uint64_t
! foo1 (uint64_t a, uint16x8_t b, uint16x8_t c)
  {
!   return vmlaldavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlaldava.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldava.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t add, uint16x8_t m1, uint16x8_t m2)
  {
!   return vmlaldavaq_u16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldava.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint64_t
+ foo1 (uint64_t add, uint16x8_t m1, uint16x8_t m2)
+ {
+   return vmlaldavaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmlaldava.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo2 (uint16x8_t m1, uint16x8_t m2)
  {
!   return vmlaldavaq (1, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint64_t a, uint32x4_t b, uint32x4_t c)
  {
!   return vmlaldavaq_u32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlaldava.u32"  }  } */
  
  uint64_t
! foo1 (uint64_t a, uint32x4_t b, uint32x4_t c)
  {
!   return vmlaldavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlaldava.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldava.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint64_t add, uint32x4_t m1, uint32x4_t m2)
  {
!   return vmlaldavaq_u32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldava.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint64_t
+ foo1 (uint64_t add, uint32x4_t m1, uint32x4_t m2)
+ {
+   return vmlaldavaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmlaldava.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo2 (uint32x4_t m1, uint32x4_t m2)
  {
!   return vmlaldavaq (1, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmlaldavaxq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavaxt.s16"  }  } */
  
  int64_t
! foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
!   return vmlaldavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavaxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavaxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavaxq_p_s16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavaxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavaxq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmlaldavaxq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavaxt.s32"  }  } */
  
  int64_t
! foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
!   return vmlaldavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavaxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavaxq_p_s32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavaxq_p (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int16x8_t b, int16x8_t c)
  {
!   return vmlaldavaxq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlaldavax.s16"  }  } */
  
  int64_t
! foo1 (int64_t a, int16x8_t b, int16x8_t c)
  {
!   return vmlaldavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlaldavax.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldavax.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavaxq_s16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldavax.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavaxq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int64_t a, int32x4_t b, int32x4_t c)
  {
!   return vmlaldavaxq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlaldavax.s32"  }  } */
  
  int64_t
! foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
!   return vmlaldavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlaldavax.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldavax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int64_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavaxq_s32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldavax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int64_t add, int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavaxq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavt.s16"  }  } */
  
  int64_t
! foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p_s16 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavt.s32"  }  } */
  
  int64_t
! foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p_s32 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavt.u16"  }  } */
  
  uint64_t
! foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p_u16 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo1 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavt.u32"  }  } */
  
  uint64_t
! foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vmlaldavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p_u32 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavt.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo1 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int16x8_t a, int16x8_t b)
  {
!   return vmlaldavq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlaldav.s16"  }  } */
  
  int64_t
! foo1 (int16x8_t a, int16x8_t b)
  {
!   return vmlaldavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlaldav.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldav.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavq_s16 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldav.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int32x4_t a, int32x4_t b)
  {
!   return vmlaldavq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlaldav.s32"  }  } */
  
  int64_t
! foo1 (int32x4_t a, int32x4_t b)
  {
!   return vmlaldavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlaldav.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldav.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavq_s32 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldav.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint16x8_t a, uint16x8_t b)
  {
!   return vmlaldavq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlaldav.u16"  }  } */
  
  uint64_t
! foo1 (uint16x8_t a, uint16x8_t b)
  {
!   return vmlaldavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlaldav.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldav.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint16x8_t m1, uint16x8_t m2)
  {
!   return vmlaldavq_u16 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldav.u16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo1 (uint16x8_t m1, uint16x8_t m2)
  {
!   return vmlaldavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
! foo (uint32x4_t a, uint32x4_t b)
  {
!   return vmlaldavq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlaldav.u32"  }  } */
  
  uint64_t
! foo1 (uint32x4_t a, uint32x4_t b)
  {
!   return vmlaldavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlaldav.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldav.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo (uint32x4_t m1, uint32x4_t m2)
  {
!   return vmlaldavq_u32 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldav.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
! foo1 (uint32x4_t m1, uint32x4_t m2)
  {
!   return vmlaldavq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmlaldavxq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavxt.s16"  }  } */
  
  int64_t
! foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vmlaldavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavxq_p_s16 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p)
  {
!   return vmlaldavxq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmlaldavxq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlaldavxt.s32"  }  } */
  
  int64_t
! foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vmlaldavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlaldavxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavxq_p_s32 (m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlaldavxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p)
  {
!   return vmlaldavxq_p (m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int16x8_t a, int16x8_t b)
  {
!   return vmlaldavxq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlaldavx.s16"  }  } */
  
  int64_t
! foo1 (int16x8_t a, int16x8_t b)
  {
!   return vmlaldavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlaldavx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldavx.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavxq_s16 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldavx.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int16x8_t m1, int16x8_t m2)
  {
!   return vmlaldavxq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
! foo (int32x4_t a, int32x4_t b)
  {
!   return vmlaldavxq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlaldavx.s32"  }  } */
  
  int64_t
! foo1 (int32x4_t a, int32x4_t b)
  {
!   return vmlaldavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlaldavx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlaldavx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo (int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavxq_s32 (m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlaldavx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
! foo1 (int32x4_t m1, int32x4_t m2)
  {
!   return vmlaldavxq (m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vmlaq_m_n_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlat.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlat.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
  {
!   return vmlaq_m_n_s16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
  {
!   return vmlaq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vmlaq_m_n_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlat.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
  {
!   return vmlaq_m_n_s32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
  {
!   return vmlaq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vmlaq_m_n_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlat.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlat.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
  {
!   return vmlaq_m_n_s8 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
  {
!   return vmlaq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p)
  {
!   return vmlaq_m_n_u16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlat.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p)
  {
!   return vmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlat.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16x8_t add, uint16x8_t m1, uint16_t m2, mve_pred16_t p)
  {
!   return vmlaq_m_n_u16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t add, uint16x8_t m1, uint16_t m2, mve_pred16_t p)
+ {
+   return vmlaq_m (add, m1, m2, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (uint16x8_t add, uint16x8_t m1, mve_pred16_t p)
  {
!   return vmlaq_m (add, m1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p)
  {
!   return vmlaq_m_n_u32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlat.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p)
  {
!   return vmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlat.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t add, uint32x4_t m1, uint32_t m2, mve_pred16_t p)
  {
!   return vmlaq_m_n_u32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t add, uint32x4_t m1, uint32_t m2, mve_pred16_t p)
+ {
+   return vmlaq_m (add, m1, m2, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 (uint32x4_t add, uint32x4_t m1, mve_pred16_t p)
  {
!   return vmlaq_m (add, m1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p)
  {
!   return vmlaq_m_n_u8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlat.u8"  }  } */
  
  uint8x16_t
! foo1 (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p)
  {
!   return vmlaq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlat.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8x16_t add, uint8x16_t m1, uint8_t m2, mve_pred16_t p)
  {
!   return vmlaq_m_n_u8 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t add, uint8x16_t m1, uint8_t m2, mve_pred16_t p)
+ {
+   return vmlaq_m (add, m1, m2, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlat.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (uint8x16_t add, uint8x16_t m1, mve_pred16_t p)
  {
!   return vmlaq_m (add, m1, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vmlaq_n_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmla.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmla.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmla.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t add, int16x8_t m1, int16_t m2)
  {
!   return vmlaq_n_s16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmla.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t add, int16x8_t m1, int16_t m2)
  {
!   return vmlaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vmlaq_n_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmla.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmla.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmla.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t add, int32x4_t m1, int32_t m2)
  {
!   return vmlaq_n_s32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmla.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t add, int32x4_t m1, int32_t m2)
  {
!   return vmlaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vmlaq_n_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmla.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmla.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmla.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t add, int8x16_t m1, int8_t m2)
  {
!   return vmlaq_n_s8 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmla.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t add, int8x16_t m1, int8_t m2)
  {
!   return vmlaq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16x8_t a, uint16x8_t b, uint16_t c)
  {
!   return vmlaq_n_u16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmla.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16x8_t a, uint16x8_t b, uint16_t c)
  {
!   return vmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmla.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmla.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16x8_t add, uint16x8_t m1, uint16_t m2)
  {
!   return vmlaq_n_u16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmla.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t add, uint16x8_t m1, uint16_t m2)
+ {
+   return vmlaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmla.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (uint16x8_t add, uint16x8_t m1)
  {
!   return vmlaq (add, m1, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, uint32_t c)
  {
!   return vmlaq_n_u32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmla.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, uint32_t c)
  {
!   return vmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmla.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmla.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t add, uint32x4_t m1, uint32_t m2)
  {
!   return vmlaq_n_u32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmla.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t add, uint32x4_t m1, uint32_t m2)
+ {
+   return vmlaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmla.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 (uint32x4_t add, uint32x4_t m1)
  {
!   return vmlaq (add, m1, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8x16_t a, uint8x16_t b, uint8_t c)
  {
!   return vmlaq_n_u8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmla.u8"  }  } */
  
  uint8x16_t
! foo1 (uint8x16_t a, uint8x16_t b, uint8_t c)
  {
!   return vmlaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmla.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmla.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8x16_t add, uint8x16_t m1, uint8_t m2)
  {
!   return vmlaq_n_u8 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmla.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t add, uint8x16_t m1, uint8_t m2)
+ {
+   return vmlaq (add, m1, m2);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmla.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (uint8x16_t add, uint8x16_t m1)
  {
!   return vmlaq (add, m1, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vmlasq_m_n_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlast.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vmlasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlast.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
  {
!   return vmlasq_m_n_s16 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
  {
!   return vmlasq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vmlasq_m_n_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlast.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vmlasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlast.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
  {
!   return vmlasq_m_n_s32 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
  {
!   return vmlasq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vmlasq_m_n_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlast.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vmlasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlast.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
  {
!   return vmlasq_m_n_s8 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
  {
!   return vmlasq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p)
  {
!   return vmlasq_m_n_u16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlast.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p)
  {
!   return vmlasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlast.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16x8_t m1, uint16x8_t m2, uint16_t add, mve_pred16_t p)
  {
!   return vmlasq_m_n_u16 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t m1, uint16x8_t m2, uint16_t add, mve_pred16_t p)
+ {
+   return vmlasq_m (m1, m2, add, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
  {
!   return vmlasq_m (m1, m2, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p)
  {
!   return vmlasq_m_n_u32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlast.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p)
  {
!   return vmlasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlast.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t m1, uint32x4_t m2, uint32_t add, mve_pred16_t p)
  {
!   return vmlasq_m_n_u32 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t m1, uint32x4_t m2, uint32_t add, mve_pred16_t p)
+ {
+   return vmlasq_m (m1, m2, add, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
  {
!   return vmlasq_m (m1, m2, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p)
  {
!   return vmlasq_m_n_u8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmlast.u8"  }  } */
  
  uint8x16_t
! foo1 (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p)
  {
!   return vmlasq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmlast.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8x16_t m1, uint8x16_t m2, uint8_t add, mve_pred16_t p)
  {
!   return vmlasq_m_n_u8 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t m1, uint8x16_t m2, uint8_t add, mve_pred16_t p)
+ {
+   return vmlasq_m (m1, m2, add, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlast.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p)
  {
!   return vmlasq_m (m1, m2, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vmlasq_n_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlas.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vmlasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlas.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlas.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t m1, int16x8_t m2, int16_t add)
  {
!   return vmlasq_n_s16 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlas.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t m1, int16x8_t m2, int16_t add)
  {
!   return vmlasq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vmlasq_n_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlas.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vmlasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlas.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlas.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t m1, int32x4_t m2, int32_t add)
  {
!   return vmlasq_n_s32 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlas.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t m1, int32x4_t m2, int32_t add)
  {
!   return vmlasq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vmlasq_n_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlas.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vmlasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlas.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlas.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t m1, int8x16_t m2, int8_t add)
  {
!   return vmlasq_n_s8 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlas.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t m1, int8x16_t m2, int8_t add)
  {
!   return vmlasq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16x8_t a, uint16x8_t b, uint16_t c)
  {
!   return vmlasq_n_u16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlas.u16"  }  } */
  
  uint16x8_t
! foo1 (uint16x8_t a, uint16x8_t b, uint16_t c)
  {
!   return vmlasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlas.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlas.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16x8_t m1, uint16x8_t m2, uint16_t add)
  {
!   return vmlasq_n_u16 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlas.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t m1, uint16x8_t m2, uint16_t add)
+ {
+   return vmlasq (m1, m2, add);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmlas.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo2 (uint16x8_t m1, uint16x8_t m2)
  {
!   return vmlasq (m1, m2, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, uint32_t c)
  {
!   return vmlasq_n_u32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlas.u32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, uint32_t c)
  {
!   return vmlasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlas.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlas.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t m1, uint32x4_t m2, uint32_t add)
  {
!   return vmlasq_n_u32 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlas.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t m1, uint32x4_t m2, uint32_t add)
+ {
+   return vmlasq (m1, m2, add);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmlas.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo2 (uint32x4_t m1, uint32x4_t m2)
  {
!   return vmlasq (m1, m2, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8x16_t a, uint8x16_t b, uint8_t c)
  {
!   return vmlasq_n_u8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlas.u8"  }  } */
  
  uint8x16_t
! foo1 (uint8x16_t a, uint8x16_t b, uint8_t c)
  {
!   return vmlasq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlas.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlas.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8x16_t m1, uint8x16_t m2, uint8_t add)
  {
!   return vmlasq_n_u8 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlas.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t m1, uint8x16_t m2, uint8_t add)
+ {
+   return vmlasq (m1, m2, add);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmlas.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo2 (uint8x16_t m1, uint8x16_t m2)
  {
!   return vmlasq (m1, m2, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavat.s16"  }  } */
  
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavat.s16"  }  } */
! /* { dg-final { scan-assembler "vmlsdavat.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavat.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p_s16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavat.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavat.s32"  }  } */
  
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavat.s32"  }  } */
! /* { dg-final { scan-assembler "vmlsdavat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavat.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavat.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavat.s8"  }  } */
  
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavat.s8"  }  } */
! /* { dg-final { scan-assembler "vmlsdavat.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavat.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p_s8 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavat.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsdava.s16"  }  } */
  
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsdava.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdava.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaq_s16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdava.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsdava.s32"  }  } */
  
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsdava.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdava.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdava.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaq_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsdava.s8"  }  } */
  
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsdava.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdava.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaq_s8 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdava.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavaxt.s16"  }  } */
  
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavaxt.s16"  }  } */
! /* { dg-final { scan-assembler "vmlsdavaxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavaxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p_s16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavaxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavaxt.s32"  }  } */
  
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavaxt.s32"  }  } */
! /* { dg-final { scan-assembler "vmlsdavaxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavaxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavaxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavaxt.s8"  }  } */
  
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavaxt.s8"  }  } */
! /* { dg-final { scan-assembler "vmlsdavaxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavaxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p_s8 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavaxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p)
  {
    return vmlsdavaxq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaxq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsdavax.s16"  }  } */
  
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsdavax.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdavax.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaxq_s16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdavax.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsdavaxq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaxq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsdavax.s32"  }  } */
  
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsdavax.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdavax.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaxq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdavax.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsdavaxq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaxq_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsdavax.s8"  }  } */
  
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsdavax.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdavax.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaxq_s8 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdavax.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32_t a, int8x16_t b, int8x16_t c)
  {
    return vmlsdavaxq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavt.s16"  }  } */
  
  int32_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavq_p_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavt.s32"  }  } */
  
  int32_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavq_p_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavt.s8"  }  } */
  
  int32_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavq_p_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsdavq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsdav.s16"  }  } */
  
  int32_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsdavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsdav.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdav.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsdavq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdav.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsdavq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsdavq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsdav.s32"  }  } */
  
  int32_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsdavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsdav.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdav.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsdavq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdav.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsdavq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmlsdavq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsdav.s8"  }  } */
  
  int32_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmlsdavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsdav.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdav.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmlsdavq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdav.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmlsdavq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavxt.s16"  }  } */
  
  int32_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavxt.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavxt.s32"  }  } */
  
  int32_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavxt.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsdavxt.s8"  }  } */
  
  int32_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsdavxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsdavxt.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmlsdavxq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsdavxq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsdavx.s16"  }  } */
  
  int32_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsdavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsdavx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdavx.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsdavxq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdavx.s16	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsdavxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsdavxq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsdavx.s32"  }  } */
  
  int32_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsdavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsdavx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdavx.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsdavxq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdavx.s32	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsdavxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmlsdavxq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsdavx.s8"  }  } */
  
  int32_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmlsdavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsdavx.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsdavx.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmlsdavxq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsdavx.s8	(?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmlsdavxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavat.s16"  }  } */
  
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavat.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavat.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p_s16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavat.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavat.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsldava.s16"  }  } */
  
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsldava.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldava.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaq_s16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldava.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsldava.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsldava.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldava.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldava.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavaxt.s16"  }  } */
  
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavaxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavaxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p_s16 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavaxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavaxt.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavaxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vmlsldavaxq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaxq_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsldavax.s16"  }  } */
  
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsldavax.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldavax.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaxq_s16 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldavax.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int16x8_t b, int16x8_t c)
  {
    return vmlsldavaxq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaxq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vmlsldavax.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vmlsldavax.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldavax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaxq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldavax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vmlsldavaxq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavt.s16"  }  } */
  
  int64_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavq_p_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavt.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsldavq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsldav.s16"  }  } */
  
  int64_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsldavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsldav.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldav.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsldavq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldav.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsldavq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsldavq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsldav.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsldavq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsldav.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldav.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsldavq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldav.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsldavq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavxt.s16"  }  } */
  
  int64_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavxt.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vmlsldavxt.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vmlsldavxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmlsldavxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmlsldavxq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsldavxq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsldavx.s16"  }  } */
  
  int64_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsldavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsldavx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldavx.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmlsldavxq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldavx.s16	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmlsldavxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsldavxq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmlsldavx.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsldavxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmlsldavx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmlsldavx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmlsldavxq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmlsldavx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmlsldavxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.s8"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a)
  {
    return vmovlbq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlb.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vmovlbq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlb.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlb.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a)
  {
    return vmovlbq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlb.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vmovlbq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a)
  {
    return vmovlbq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlb.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vmovlbq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlb.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlb.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a)
  {
    return vmovlbq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlb.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vmovlbq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a)
  {
!     return vmovlbq_u16 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlb.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a)
  {
!     return vmovlbq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlb.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlb.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a)
  {
!   return vmovlbq_u16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlb.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a)
  {
!   return vmovlbq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a)
  {
!     return vmovlbq_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlb.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a)
  {
!     return vmovlbq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlb.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlb.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a)
  {
!   return vmovlbq_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlb.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a)
  {
!   return vmovlbq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovlbt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovlbt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vmovlbq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.s8"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a)
  {
    return vmovltq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vmovltq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlt.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a)
  {
    return vmovltq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vmovltq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a)
  {
    return vmovltq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlt.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vmovltq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlt.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a)
  {
    return vmovltq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vmovltq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a)
  {
!     return vmovltq_u16 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a)
  {
!     return vmovltq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlt.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a)
  {
!   return vmovltq_u16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a)
  {
!   return vmovltq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a)
  {
!     return vmovltq_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vmovlt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a)
  {
!     return vmovltq (a);
  }
  
! /* { dg-final { scan-assembler "vmovlt.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovlt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a)
  {
!   return vmovltq_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovlt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a)
  {
!   return vmovltq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovltt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovltt.u8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vmovltq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovnbt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovnbt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovnbt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovnbt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovnbt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vmovnbq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnb.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnb.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnb.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vmovnbq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnb.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vmovnbq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnb.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnb.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnb.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vmovnbq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnb.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vmovnbq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnb.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnb.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnb.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vmovnbq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnb.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vmovnbq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnb.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnb.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnb.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vmovnbq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnb.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovntt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovntt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovntt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmovntt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmovntt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vmovntq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnt.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vmovntq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vmovntq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnt.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vmovntq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vmovntq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnt.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vmovntq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnt.i16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vmovntq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmovnt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmovnt.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmovnt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vmovntq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmovnt.i32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulht.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulht.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulht.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmulhq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmulh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmulh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmulhq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmulhq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmulh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmulh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmulhq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmulhq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmulh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmulh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmulhq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulhq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmulh.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmulh.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmulh.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulhq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmulh.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmulhq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmulh.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmulh.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmulh.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmulhq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmulh.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulhq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmulh.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmulh.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmulh.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulhq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmulh.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulht.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.s32"  }  } */
  
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.s8"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.u32"  }  } */
  
  uint64x2_t
  foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmullbq_int_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmullbq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmullbq_int_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmullbq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmullbq_int_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmullbq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmullbq_int_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmullbq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmullbq_int_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmullbq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmullbq_int_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmullbq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_int_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_int_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmullbq_int_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.u32"  }  } */
  
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmullbq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmullbq_int_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmullbq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_int_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_int_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.u32"  }  } */
  
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m_p16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.p16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.p16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m_p16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m_p8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.p8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmullbt.p8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m_p8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_poly_p16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.p16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_poly (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.p16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_poly_p16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmullbq_poly (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_poly_p8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullb.p8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_poly (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullb.p8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullb.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_poly_p8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullb.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmullbq_poly (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x_p16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.p16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x_p16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x_p8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmullbt.p8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x_p8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmullbt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmullbq_poly_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.s32"  }  } */
  
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.s8"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.u32"  }  } */
  
  uint64x2_t
  foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmulltq_int_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmulltq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmulltq_int_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmulltq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmulltq_int_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmulltq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmulltq_int_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmulltq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmulltq_int_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmulltq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmulltq_int_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmulltq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_int_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_int_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmulltq_int_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.u32"  }  } */
  
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmulltq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmulltq_int_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmulltq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_int_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_int (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_int_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_int (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.u32"  }  } */
  
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_int_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m_p16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.p16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.p16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m_p16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m_p8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.p8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmulltt.p8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m_p8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_poly_p16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.p16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_poly (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.p16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_poly_p16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulltq_poly (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_poly_p8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmullt.p8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_poly (a, b);
  }
  
! /* { dg-final { scan-assembler "vmullt.p8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmullt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_poly_p8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmullt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulltq_poly (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x_p16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.p16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x_p16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x_p8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmulltt.p8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x_p8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmulltt.p8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulltq_poly_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vmulq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vmulq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vmulq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vmulq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vmulq_m (inactive, a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_m_n_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_m_n_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
! {
!   return vmulq_m (inactive, a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vmulq_m (inactive, a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_m_n_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_m_n_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
! {
!   return vmulq_m (inactive, a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
! {
!   return vmulq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
! {
!   return vmulq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
! {
!   return vmulq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vmulq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16_t b)
  {
    return vmulq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.f16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16_t b)
  {
    return vmulq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vmulq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmul.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t a)
! {
!   return vmulq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vmulq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32_t b)
  {
    return vmulq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.f32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32_t b)
  {
    return vmulq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vmulq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmul.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t a)
! {
!   return vmulq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vmulq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vmulq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vmulq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vmulq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vmulq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vmulq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vmulq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vmulq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vmulq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmul.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a)
! {
!   return vmulq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vmulq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vmulq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vmulq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmul.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a)
! {
!   return vmulq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vmulq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vmulq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vmulq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vmul.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a)
! {
!   return vmulq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmulq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vmulq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmulq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vmulq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmulq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vmulq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vmulq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmulq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vmulq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vmul.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulq (a, b);
  }
  
! /* { dg-final { scan-assembler "vmul.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vmulq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmul.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vmulq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vmulq_x (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_x_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_x_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t a, mve_pred16_t p)
! {
!   return vmulq_x (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vmulq_x (a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_x_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.f32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_x_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t a, mve_pred16_t p)
! {
!   return vmulq_x (a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_x_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_x_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_x_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_x_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_x_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_x_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_x_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_x_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a, mve_pred16_t p)
! {
!   return vmulq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_x_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_x_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a, mve_pred16_t p)
! {
!   return vmulq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_x_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_x_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vmult.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a, mve_pred16_t p)
! {
!   return vmulq_x (a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmult.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmult.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmult.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vmulq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_s16 (inactive, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_s16 (inactive, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_s32 (inactive, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_s32 (inactive, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_u16 (inactive, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_u16 (inactive, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_u32 (inactive, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m_n_u32 (inactive, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, mve_pred16_t p)
  {
!   return vmvnq_m (inactive, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m_u32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m_u32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo ()
  {
    return vmvnq_n_s16 (1);
  }
  
! /* { dg-final { scan-assembler "vmvn.i16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo ()
  {
    return vmvnq_n_s16 (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo ()
  {
!   return vmvnq_n_s32 (2);
  }
  
! /* { dg-final { scan-assembler "vmvn.i32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo ()
  {
!   return vmvnq_n_s32 (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo ()
  {
!     return vmvnq_n_u16 (1);
  }
  
! /* { dg-final { scan-assembler "vmvn.i16"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo ()
  {
!   return vmvnq_n_u16 (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo ()
  {
!     return vmvnq_n_u32 (2);
  }
  
! /* { dg-final { scan-assembler "vmvn.i32"  }  } */
--- 1,28 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo ()
  {
!   return vmvnq_n_u32 (1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vmvnq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vmvn"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vmvnq (a);
  }
  
! /* { dg-final { scan-assembler "vmvn"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vmvnq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vmvnq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vmvnq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vmvn"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vmvnq (a);
  }
  
! /* { dg-final { scan-assembler "vmvn"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vmvnq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vmvnq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vmvnq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vmvn"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vmvnq (a);
  }
  
! /* { dg-final { scan-assembler "vmvn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vmvnq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vmvnq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
!     return vmvnq_u16 (a);
  }
  
- /* { dg-final { scan-assembler "vmvn"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!     return vmvnq (a);
  }
  
! /* { dg-final { scan-assembler "vmvn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vmvnq_u16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vmvnq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
!     return vmvnq_u32 (a);
  }
  
- /* { dg-final { scan-assembler "vmvn"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!     return vmvnq (a);
  }
  
! /* { dg-final { scan-assembler "vmvn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vmvnq_u32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!   return vmvnq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
!     return vmvnq_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vmvn"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!     return vmvnq (a);
  }
  
! /* { dg-final { scan-assembler "vmvn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vmvnq_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmvn	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vmvnq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_s16 (2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt.i16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_s16 (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_s32 (2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt.i32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_s32 (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_u16 (4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt.i16"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_u16 (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,14 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_u32 (4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt.i32"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (mve_pred16_t p)
  {
!   return vmvnq_x_n_u32 (1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x_u32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x_u32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vmvnt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vmvnt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vmvnt	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vmvnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vnegq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vneg.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vneg.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vnegq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vneg.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vnegq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vnegq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vneg.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vneg.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vnegq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vneg.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vnegq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vnegq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vnegq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vnegq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vnegq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vnegq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vnegq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vnegq_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vnegq_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vnegq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vnegq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vnegq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vneg.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vnegq (a);
  }
  
! /* { dg-final { scan-assembler "vneg.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vneg.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vnegq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vneg.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vnegq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vnegq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vneg.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vnegq (a);
  }
  
! /* { dg-final { scan-assembler "vneg.s32"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vneg.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vnegq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vneg.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vnegq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vnegq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vneg.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vnegq (a);
  }
  
! /* { dg-final { scan-assembler "vneg.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vneg.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vnegq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vneg.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vnegq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vnegq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vnegq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vnegq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vnegq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vnegq_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vnegq_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vnegq_x_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vnegq_x_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vnegq_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vnegt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vnegq_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vnegt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vnegq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vornq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vornq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vornq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vornq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vornt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vornq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vornq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vornq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vornq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vornq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vornq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vornq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vornq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vornq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vornq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vornq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorn"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vornq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorn"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vornq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorn	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vornq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vornt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vornt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vornq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vorrq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vorrq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vorrq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vorrq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vorrq_m_n_s16 (a, 253, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
!   return vorrq_m_n (a, 253, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vorrq_m_n_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
!   return vorrq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n_s32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n_s32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vorrq_m_n_u16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vorrq_m_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vorrq_m_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vorrq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n_u32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n (a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vorrq_m_n (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vorrt"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vorrq_n_s16 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vorr.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vorrq_n_s16 (a, 1);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vorr.i16	q[0-9]+, #[0-9]+(?:	@.*|)
! **	...
! */
! int16x8_t
! foo1 (int16x8_t a)
! {
!   return vorrq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vorrq_n_s32 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vorr.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vorrq_n_s32 (a, 1);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vorr.i32	q[0-9]+, #[0-9]+(?:	@.*|)
! **	...
! */
! int32x4_t
! foo1 (int32x4_t a)
! {
!   return vorrq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
    return vorrq_n_u16 (a, 1);
  }
  
! /* { dg-final { scan-assembler "vorr.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr.i16	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
    return vorrq_n_u16 (a, 1);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vorr.i16	q[0-9]+, #[0-9]+(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo1 (uint16x8_t a)
! {
!   return vorrq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vorrq_n_u32 (a, 44);
  }
  
! /* { dg-final { scan-assembler "vorr.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr.i32	q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vorrq_n_u32 (a, 1);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vorr.i32	q[0-9]+, #[0-9]+(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo1 (uint32x4_t a)
! {
!   return vorrq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vorrq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vorrq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vorrq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vorrq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vorrq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vorrq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vorrq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vorrq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vorrq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vorrq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vorrq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vorr"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vorrq (a, b);
  }
  
! /* { dg-final { scan-assembler "vorr"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vorrq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vorr	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vorrq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vorrt"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vorrt	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vorrq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  mve_pred16_t
  foo (mve_pred16_t a)
  {
    return vpnot (a);
  }
  
! /* { dg-final { scan-assembler "vpnot"  }  } */
! 
! mve_pred16_t
! foo1 (mve_pred16_t a)
! {
!   return vpnot (a);
  }
  
! /* { dg-final { scan-assembler "vpnot"  }  } */
--- 1,32 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpnot(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+ **	...
+ */
  mve_pred16_t
  foo (mve_pred16_t a)
  {
    return vpnot (a);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vpselq_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vpselq_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vpselq_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vpselq_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vpselq_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vpselq_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vpselq_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vpselq_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64x2_t a, int64x2_t b, mve_pred16_t p)
  {
    return vpselq_s64 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  int64x2_t
  foo1 (int64x2_t a, int64x2_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64x2_t a, int64x2_t b, mve_pred16_t p)
  {
    return vpselq_s64 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int64x2_t a, int64x2_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vpselq_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vpselq_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vpselq_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vpselq_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vpselq_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vpselq_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint64x2_t a, uint64x2_t b, mve_pred16_t p)
  {
    return vpselq_u64 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  uint64x2_t
  foo1 (uint64x2_t a, uint64x2_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint64x2_t a, uint64x2_t b, mve_pred16_t p)
  {
    return vpselq_u64 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo1 (uint64x2_t a, uint64x2_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vpselq_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpsel"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpsel"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vpselq_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpsel	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vpselq (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqabsq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqabst.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqabst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqabsq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqabst.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqabsq_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqabst.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqabst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqabsq_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqabst.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqabsq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqabst.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqabsq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqabst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqabsq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqabst.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqabsq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vqabsq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vqabs.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vqabsq (a);
  }
  
! /* { dg-final { scan-assembler "vqabs.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqabs.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vqabsq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqabs.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vqabsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vqabsq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vqabs.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vqabsq (a);
  }
  
! /* { dg-final { scan-assembler "vqabs.s32"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqabs.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vqabsq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqabs.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vqabsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vqabsq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vqabs.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vqabsq (a);
  }
  
! /* { dg-final { scan-assembler "vqabs.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqabs.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vqabsq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqabs.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vqabsq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vqaddt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
! {
!   return vqaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vqaddt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
! {
!   return vqaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqaddq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vqaddt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
! {
!   return vqaddq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqaddt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqaddq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqaddq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqaddq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqaddq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqaddq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqaddq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vqaddq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vqaddq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vqaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vqadd.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a)
! {
!   return vqaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vqaddq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vqaddq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vqaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vqadd.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a)
! {
!   return vqaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vqaddq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vqaddq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vqaddq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vqadd.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a)
! {
!   return vqaddq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqaddq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqaddq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqaddq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqaddq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqaddq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqaddq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vqaddq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vqaddq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vqaddq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vqaddq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vqaddq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqadd.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vqaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqadd.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqadd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vqaddq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqadd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vqaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmladht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmladht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmladht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmladht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmladht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmladht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmladh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmladh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmladh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmladh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmladh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmladh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmladh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmladh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmladh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmladh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmladh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmladh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmladhxt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmladhxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmladhxt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmladhxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmladhxt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmladhxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmladhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmladhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhxq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmladhx.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmladhx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmladhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhxq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmladhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmladhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhxq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmladhx.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmladhx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmladhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhxq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmladhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmladhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhxq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmladhx.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmladhx.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmladhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhxq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmladhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmladhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqdmlahq_m_n_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlaht.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqdmlahq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlaht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlaht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
  {
!   return vqdmlahq_m_n_s16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlaht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
  {
!   return vqdmlahq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqdmlahq_m_n_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlaht.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqdmlahq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlaht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlaht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
  {
!   return vqdmlahq_m_n_s32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlaht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
  {
!   return vqdmlahq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqdmlahq_m_n_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlaht.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqdmlahq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlaht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlaht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
  {
!   return vqdmlahq_m_n_s8 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlaht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
  {
!   return vqdmlahq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqdmlahq_n_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqdmlah.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqdmlahq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqdmlah.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlah.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t add, int16x8_t m1, int16_t m2)
  {
!   return vqdmlahq_n_s16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlah.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t add, int16x8_t m1, int16_t m2)
  {
!   return vqdmlahq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqdmlahq_n_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqdmlah.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqdmlahq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqdmlah.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlah.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t add, int32x4_t m1, int32_t m2)
  {
!   return vqdmlahq_n_s32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlah.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t add, int32x4_t m1, int32_t m2)
  {
!   return vqdmlahq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqdmlahq_n_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqdmlah.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqdmlahq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqdmlah.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlah.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t add, int8x16_t m1, int8_t m2)
  {
!   return vqdmlahq_n_s8 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlah.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t add, int8x16_t m1, int8_t m2)
  {
!   return vqdmlahq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqdmlashq_m_n_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlasht.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqdmlashq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlasht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlasht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
  {
!   return vqdmlashq_m_n_s16 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlasht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
  {
!   return vqdmlashq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqdmlashq_m_n_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlasht.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqdmlashq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlasht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlasht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
  {
!   return vqdmlashq_m_n_s32 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlasht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
  {
!   return vqdmlashq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqdmlashq_m_n_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlasht.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqdmlashq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlasht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlasht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
  {
!   return vqdmlashq_m_n_s8 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlasht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
  {
!   return vqdmlashq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqdmlashq_n_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqdmlash.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqdmlashq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqdmlash.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlash.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t m1, int16x8_t m2, int16_t add)
  {
!   return vqdmlashq_n_s16 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlash.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t m1, int16x8_t m2, int16_t add)
  {
!   return vqdmlashq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqdmlashq_n_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqdmlash.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqdmlashq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqdmlash.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlash.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t m1, int32x4_t m2, int32_t add)
  {
!   return vqdmlashq_n_s32 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlash.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t m1, int32x4_t m2, int32_t add)
  {
!   return vqdmlashq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqdmlashq_n_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqdmlash.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqdmlashq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqdmlash.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlash.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t m1, int8x16_t m2, int8_t add)
  {
!   return vqdmlashq_n_s8 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlash.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t m1, int8x16_t m2, int8_t add)
  {
!   return vqdmlashq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlsdht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlsdht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlsdht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlsdht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlsdht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlsdht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmlsdh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmlsdh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlsdh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlsdh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmlsdh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmlsdh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlsdh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlsdh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmlsdh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmlsdh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlsdh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlsdh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlsdhxt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlsdhxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlsdhxt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlsdhxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmlsdhxt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmlsdhxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmlsdhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmlsdhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhxq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmlsdhx.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmlsdhx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlsdhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhxq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlsdhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqdmlsdhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhxq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmlsdhx.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmlsdhx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlsdhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhxq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlsdhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqdmlsdhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhxq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmlsdhx.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmlsdhx.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmlsdhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhxq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmlsdhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqdmlsdhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqdmulhq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmulh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmulh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmulh.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqdmulhq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmulh.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqdmulhq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmulh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmulh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmulh.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqdmulhq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmulh.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqdmulhq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmulh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmulh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmulh.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqdmulhq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmulh.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqdmulhq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmulh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmulh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqdmulhq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqdmulhq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmulh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmulh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqdmulhq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqdmulhq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmulh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmulh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqdmulhq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmullbt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmullbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmullbt.s32"  }  } */
  
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmullbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmullbt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmullbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmullbt.s32"  }  } */
  
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmullbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmullbq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmullbt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmullbq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16_t b)
  {
    return vqdmullbq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullb.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqdmullbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullb.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16_t b)
  {
    return vqdmullbq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullb.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqdmullbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32_t b)
  {
    return vqdmullbq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullb.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqdmullbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullb.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32_t b)
  {
    return vqdmullbq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullb.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqdmullbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqdmullbq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullb.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqdmullbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullb.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqdmullbq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullb.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqdmullbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqdmullbq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullb.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqdmullbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullb.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqdmullbq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullb.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqdmullbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulltt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulltt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulltt.s32"  }  } */
  
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulltt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulltt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulltt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqdmulltt.s32"  }  } */
  
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqdmulltt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulltq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqdmulltt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqdmulltq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16_t b)
  {
    return vqdmulltq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqdmulltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16_t b)
  {
    return vqdmulltq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqdmulltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32_t b)
  {
    return vqdmulltq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullt.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqdmulltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32_t b)
  {
    return vqdmulltq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqdmulltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqdmulltq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqdmulltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqdmulltq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqdmulltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqdmulltq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqdmullt.s32"  }  } */
  
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqdmulltq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqdmullt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqdmullt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqdmulltq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqdmullt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqdmulltq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovnbt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovnbt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovnbt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovnbt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovnbt.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovnbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqmovnbq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnb.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnb.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqmovnbq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnb.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqmovnbq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnb.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnb.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqmovnbq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnb.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqmovnbq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnb.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnb.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnb.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqmovnbq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnb.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqmovnbq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnb.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqmovnbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnb.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnb.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqmovnbq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnb.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqmovnbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovntt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovntt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovntt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovntt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovntt.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqmovntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqmovntq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqmovntq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqmovntq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqmovntq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqmovntq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnt.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqmovntq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnt.u16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqmovntq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovnt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqmovntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovnt.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovnt.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqmovntq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovnt.u32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqmovntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovunbq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovunbt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovunbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovunbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovunbq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovunbt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovunbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovunbq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovunbt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovunbq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovunbt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovunbq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovunbt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovunbq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqmovunbq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovunb.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqmovunbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovunb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovunb.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqmovunbq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovunb.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqmovunbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqmovunbq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovunb.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqmovunbq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovunb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovunb.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqmovunbq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovunb.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqmovunbq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovuntq_m_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovuntt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovuntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovuntt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovuntq_m_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovuntt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqmovuntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovuntq_m_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqmovuntt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovuntq_m (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovuntt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovuntq_m_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqmovuntt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqmovuntq_m (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqmovuntq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovunt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqmovuntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovunt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovunt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqmovuntq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovunt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqmovuntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqmovuntq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqmovunt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqmovuntq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqmovunt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqmovunt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqmovuntq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqmovunt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqmovuntq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqnegq_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqnegt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqnegt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqnegq_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqnegt.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqnegq_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqnegt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqnegt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqnegq_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqnegt.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqnegq_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqnegt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqnegq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqnegt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqnegq_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqnegt.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqnegq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vqnegq_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vqneg.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vqnegq (a);
  }
  
! /* { dg-final { scan-assembler "vqneg.s16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqneg.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vqnegq_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqneg.s16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vqnegq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vqnegq_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vqneg.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vqnegq (a);
  }
  
! /* { dg-final { scan-assembler "vqneg.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqneg.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vqnegq_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqneg.s32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vqnegq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vqnegq_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vqneg.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vqnegq (a);
  }
  
! /* { dg-final { scan-assembler "vqneg.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqneg.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vqnegq_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqneg.s8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vqnegq (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmladht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmladht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmladht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmladht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmladht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmladht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmladh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmladh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmladh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmladh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmladh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmladh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmladh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmladh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmladh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmladh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmladh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmladh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmladhxt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmladhxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmladhxt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmladhxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmladhxt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmladhxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmladhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmladhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhxq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmladhx.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmladhx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmladhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhxq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmladhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmladhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhxq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmladhx.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmladhx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmladhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhxq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmladhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmladhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhxq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmladhx.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmladhx.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmladhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhxq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmladhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmladhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqrdmlahq_m_n_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlaht.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqrdmlahq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlaht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlaht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
  {
!   return vqrdmlahq_m_n_s16 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlaht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
  {
!   return vqrdmlahq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqrdmlahq_m_n_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlaht.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqrdmlahq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlaht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlaht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
  {
!   return vqrdmlahq_m_n_s32 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlaht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
  {
!   return vqrdmlahq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqrdmlahq_m_n_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlaht.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqrdmlahq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlaht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlaht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
  {
!   return vqrdmlahq_m_n_s8 (add, m1, m2, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlaht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
  {
!   return vqrdmlahq_m (add, m1, m2, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqrdmlahq_n_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqrdmlah.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqrdmlahq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqrdmlah.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlah.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t add, int16x8_t m1, int16_t m2)
  {
!   return vqrdmlahq_n_s16 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlah.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t add, int16x8_t m1, int16_t m2)
  {
!   return vqrdmlahq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqrdmlahq_n_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqrdmlah.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqrdmlahq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqrdmlah.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlah.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t add, int32x4_t m1, int32_t m2)
  {
!   return vqrdmlahq_n_s32 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlah.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t add, int32x4_t m1, int32_t m2)
  {
!   return vqrdmlahq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqrdmlahq_n_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqrdmlah.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqrdmlahq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqrdmlah.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlah.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t add, int8x16_t m1, int8_t m2)
  {
!   return vqrdmlahq_n_s8 (add, m1, m2);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlah.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t add, int8x16_t m1, int8_t m2)
  {
!   return vqrdmlahq (add, m1, m2);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqrdmlashq_m_n_s16 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlasht.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
  {
!   return vqrdmlashq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlasht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlasht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
  {
!   return vqrdmlashq_m_n_s16 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlasht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
  {
!   return vqrdmlashq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqrdmlashq_m_n_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlasht.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
  {
!   return vqrdmlashq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlasht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlasht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
  {
!   return vqrdmlashq_m_n_s32 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlasht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
  {
!   return vqrdmlashq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqrdmlashq_m_n_s8 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlasht.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
  {
!   return vqrdmlashq_m (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlasht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlasht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
  {
!   return vqrdmlashq_m_n_s8 (m1, m2, add, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlasht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
  {
!   return vqrdmlashq_m (m1, m2, add, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqrdmlashq_n_s16 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqrdmlash.s16"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, int16x8_t b, int16_t c)
  {
!   return vqrdmlashq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqrdmlash.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlash.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t m1, int16x8_t m2, int16_t add)
  {
!   return vqrdmlashq_n_s16 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlash.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t m1, int16x8_t m2, int16_t add)
  {
!   return vqrdmlashq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqrdmlashq_n_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqrdmlash.s32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, int32_t c)
  {
!   return vqrdmlashq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqrdmlash.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlash.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t m1, int32x4_t m2, int32_t add)
  {
!   return vqrdmlashq_n_s32 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlash.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t m1, int32x4_t m2, int32_t add)
  {
!   return vqrdmlashq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqrdmlashq_n_s8 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vqrdmlash.s8"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, int8x16_t b, int8_t c)
  {
!   return vqrdmlashq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vqrdmlash.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlash.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t m1, int8x16_t m2, int8_t add)
  {
!   return vqrdmlashq_n_s8 (m1, m2, add);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlash.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t m1, int8x16_t m2, int8_t add)
  {
!   return vqrdmlashq (m1, m2, add);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlsdht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlsdht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlsdht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlsdht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlsdht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlsdht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmlsdh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmlsdh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlsdh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlsdh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmlsdh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmlsdh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlsdh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlsdh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmlsdh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmlsdh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlsdh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlsdh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlsdhxt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlsdhxt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdhxt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlsdhxt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlsdhxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdhxt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmlsdhxt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmlsdhxt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmlsdhxt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmlsdhxq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhxq_s16 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmlsdhx.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmlsdhx.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlsdhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhxq_s16 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlsdhx.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
  {
    return vqrdmlsdhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhxq_s32 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmlsdhx.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmlsdhx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlsdhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhxq_s32 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlsdhx.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
  {
    return vqrdmlsdhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhxq_s8 (inactive, a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmlsdhx.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhxq (inactive, a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmlsdhx.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmlsdhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhxq_s8 (inactive, a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmlsdhx.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
  {
    return vqrdmlsdhxq (inactive, a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmulht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmulht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmulht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmulht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmulht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrdmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrdmulht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrdmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrdmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqrdmulhq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmulh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmulh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmulh.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqrdmulhq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmulh.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqrdmulhq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmulh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmulh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmulh.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqrdmulhq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmulh.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqrdmulhq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmulh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmulh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmulh.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqrdmulhq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmulh.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqrdmulhq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmulh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmulh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqrdmulhq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqrdmulhq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmulh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmulh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqrdmulhq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqrdmulhq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrdmulh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrdmulh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrdmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqrdmulhq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrdmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqrdmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshlt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshlt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshlt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshlt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshlt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshlt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vqrshlq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vqrshlq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqrshlq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqrshlq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vqrshlq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vqrshlq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vqrshlq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vqrshlq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vqrshlq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vqrshlq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vqrshlq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vqrshlq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqrshlq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqrshlq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqrshlq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqrshlq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqrshlq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqrshlq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vqrshlq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vqrshlq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vqrshlq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vqrshlq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vqrshlq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqrshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vqrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqrshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vqrshlq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vqrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrnbt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrnbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrnbt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrnbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrnbt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrnbt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrnbt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrnbt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrnbt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqrshrnbq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnb.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqrshrnbq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqrshrnbq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnb.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqrshrnbq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrnbq_n_u16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnb.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnb.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnb.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrnbq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnb.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrnbq_n_u32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnb.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnb.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnb.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrnbq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnb.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrntt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrntt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrntt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrntt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrntt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrntt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrntt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrntt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrntt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqrshrntq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqrshrntq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqrshrntq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqrshrntq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrntq_n_u16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnt.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrntq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrntq_n_u32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrnt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrnt.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrnt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrntq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrnt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrunbt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrunbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrunbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrunbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshrunbt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshrunbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrunbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshrunbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshrunbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqrshrunbq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrunb.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqrshrunbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrunb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrunb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqrshrunbq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrunb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqrshrunbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqrshrunbq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrunb.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqrshrunbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrunb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrunb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqrshrunbq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrunb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqrshrunbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshruntq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshruntt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshruntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshruntt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshruntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshruntq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshruntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqrshruntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshruntq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqrshruntt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshruntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqrshruntt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshruntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshruntq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqrshruntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqrshruntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqrshruntq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrunt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqrshruntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrunt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrunt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqrshruntq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrunt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqrshruntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqrshruntq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqrshrunt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqrshruntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqrshrunt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqrshrunt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqrshruntq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqrshrunt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqrshruntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_s16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_s32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_s32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_s8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_s8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_u16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_u32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_u8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vqshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vqshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshlt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vqshlq_n_s16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vqshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vqshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vqshlq_n_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vqshlq_n_s32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vqshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vqshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vqshlq_n_s32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vqshlq_n_s8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vqshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vqshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vqshlq_n_s8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
    return vqshlq_n_u16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vqshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vqshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
    return vqshlq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
    return vqshlq_n_u32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vqshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vqshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
    return vqshlq_n_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
    return vqshlq_n_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vqshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vqshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
    return vqshlq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
    return vqshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vqshlq_r_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vqshlq_r_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqshlq_r_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqshlq_r_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vqshlq_r_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vqshlq_r_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vqshlq_r_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vqshlq_r_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vqshlq_r_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vqshlq_r_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vqshlq_r_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vqshlq_r_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vqshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqshlq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqshlq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqshlq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqshlq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqshlq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqshlq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vqshlq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vqshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vqshlq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vqshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vqshlq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vqshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vqshlq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vqshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vqshlq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vqshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vqshlq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vqshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vqshluq_m_n_s16 (inactive, a, 7, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlut.s16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vqshluq_m (inactive, a, 7, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlut.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vqshluq_m_n_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlut.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vqshluq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vqshluq_m_n_s32 (inactive, a, 7, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlut.s32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vqshluq_m (inactive, a, 7, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlut.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vqshluq_m_n_s32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlut.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vqshluq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vqshluq_m_n_s8 (inactive, a, 7, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshlut.s8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vqshluq_m (inactive, a, 7, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlut.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vqshluq_m_n_s8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshlut.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vqshluq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (int16x8_t a)
  {
!   return vqshluq_n_s16 (a, 7);
  }
  
- /* { dg-final { scan-assembler "vqshlu.s16"  }  } */
  
  uint16x8_t
  foo1 (int16x8_t a)
  {
!   return vqshluq (a, 7);
  }
  
! /* { dg-final { scan-assembler "vqshlu.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshlu.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (int16x8_t a)
  {
!   return vqshluq_n_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshlu.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (int16x8_t a)
  {
!   return vqshluq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (int32x4_t a)
  {
!   return vqshluq_n_s32 (a, 7);
  }
  
- /* { dg-final { scan-assembler "vqshlu.s32"  }  } */
  
  uint32x4_t
  foo1 (int32x4_t a)
  {
!   return vqshluq (a, 7);
  }
  
! /* { dg-final { scan-assembler "vqshlu.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshlu.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (int32x4_t a)
  {
!   return vqshluq_n_s32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshlu.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (int32x4_t a)
  {
!   return vqshluq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (int8x16_t a)
  {
!   return vqshluq_n_s8 (a, 7);
  }
  
- /* { dg-final { scan-assembler "vqshlu.s8"  }  } */
  
  uint8x16_t
  foo1 (int8x16_t a)
  {
!   return vqshluq (a, 7);
  }
  
! /* { dg-final { scan-assembler "vqshlu.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshlu.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (int8x16_t a)
  {
!   return vqshluq_n_s8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshlu.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (int8x16_t a)
  {
!   return vqshluq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m_n_s16 (a, b, 7, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrnbt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m (a, b, 7, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrnbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m_n_s32 (a, b, 11, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrnbt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m (a, b, 11, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrnbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vqshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrnbq_m_n_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrnbt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrnbt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrnbq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrnbq_m_n_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrnbt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrnbt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrnbq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrnbt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqshrnbq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrnb.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrnb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqshrnbq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
!   return vqshrnbq_n_s32 (a, b, 2);
  }
  
- /* { dg-final { scan-assembler "vqshrnb.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
!   return vqshrnbq (a, b, 2);
  }
  
! /* { dg-final { scan-assembler "vqshrnb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
!   return vqshrnbq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
!   return vqshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqshrnbq_n_u16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrnb.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrnb.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnb.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqshrnbq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnb.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
!   return vqshrnbq_n_u32 (a, b, 15);
  }
  
- /* { dg-final { scan-assembler "vqshrnb.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
!   return vqshrnbq (a, b, 15);
  }
  
! /* { dg-final { scan-assembler "vqshrnb.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnb.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
!   return vqshrnbq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnb.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
!   return vqshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrntt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrntt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrntt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrntt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrntt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrntt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrntt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrntt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrntt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqshrntq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrnt.s16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrnt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vqshrntq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqshrntq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrnt.s32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrnt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vqshrntq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqshrntq_n_u16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrnt.u16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrnt.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vqshrntq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqshrntq_n_u32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrnt.u32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrnt.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrnt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vqshrntq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrnt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vqshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrunbq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrunbt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrunbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrunbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrunbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrunbq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrunbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshrunbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrunbq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshrunbt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrunbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshrunbt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrunbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrunbq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshrunbt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshrunbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqshrunbq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrunb.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqshrunbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrunb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrunb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqshrunbq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrunb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqshrunbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqshrunbq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrunb.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqshrunbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrunb.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrunb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqshrunbq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrunb.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqshrunbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshruntq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshruntt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshruntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshruntt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshruntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshruntq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshruntt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqshruntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshruntq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqshruntt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshruntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqshruntt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshruntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshruntq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqshruntt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqshruntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqshruntq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrunt.s16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqshruntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrunt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrunt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int16x8_t b)
  {
    return vqshruntq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrunt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int16x8_t b)
  {
    return vqshruntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqshruntq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vqshrunt.s32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqshruntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vqshrunt.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqshrunt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32x4_t b)
  {
    return vqshruntq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqshrunt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32x4_t b)
  {
    return vqshruntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.u16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vqsubt.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
! {
!   return vqsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vqsubt.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
! {
!   return vqsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.u8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqsubq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vqsubt.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
! {
!   return vqsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vqsubt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vqsubt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vqsubt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vqsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqsubq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vqsubq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.s16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqsubq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vqsubq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.s32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqsubq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vqsubq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.s8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vqsubq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.u16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vqsubq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vqsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vqsub.u16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a)
! {
!   return vqsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vqsubq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vqsubq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vqsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vqsub.u32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a)
! {
!   return vqsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vqsubq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.u8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vqsubq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vqsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vqsub.u8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a)
! {
!   return vqsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqsubq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vqsubq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqsubq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vqsubq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqsubq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vqsubq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vqsubq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vqsubq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vqsubq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vqsubq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vqsubq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vqsub.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vqsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vqsub.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vqsub.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vqsubq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vqsub.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vqsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev16t.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev16t.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vrev16q_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vrev16.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vrev16q (a);
  }
  
! /* { dg-final { scan-assembler "vrev16.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev16.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vrev16q_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev16.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vrev16q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
!     return vrev16q_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vrev16.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!     return vrev16q (a);
  }
  
! /* { dg-final { scan-assembler "vrev16.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev16.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vrev16q_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev16.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vrev16q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev16t.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev16t.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev16t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vrev16q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrev32q_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrev32.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev32.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrev32q_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrev32.16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrev32q (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
! /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
! /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vrev32q_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vrev32.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vrev32q (a);
  }
  
! /* { dg-final { scan-assembler "vrev32.16"  }  } */
--- 1,41 ----
! /* { dg-require-effective-target arm_v8_1m_mve_ok } */
! /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev32.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vrev32q_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev32.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vrev32q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vrev32q_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vrev32.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vrev32q (a);
  }
  
! /* { dg-final { scan-assembler "vrev32.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev32.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vrev32q_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev32.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vrev32q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
!     return vrev32q_u16 (a);
  }
  
- /* { dg-final { scan-assembler "vrev32.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!     return vrev32q (a);
  }
  
! /* { dg-final { scan-assembler "vrev32.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev32.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vrev32q_u16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev32.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vrev32q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
!     return vrev32q_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vrev32.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!     return vrev32q (a);
  }
  
! /* { dg-final { scan-assembler "vrev32.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev32.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vrev32q_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev32.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vrev32q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev32t.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev32t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vrev32q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrev64q_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrev64q_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrev64.16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrev64q (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vrev64q_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vrev64q_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrev64.32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vrev64q (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16-clobber.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16-clobber.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16-clobber.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16-clobber.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+ /* { dg-add-options arm_v8_1m_mve_fp } */
+ /* { dg-additional-options "-O2" } */
+ 
+ #include "arm_mve.h"
+ 
+ int16x8_t
+ foo (int16x8_t a, mve_pred16_t p)
+ {
+   return vrev64q_m_s16 (a, a, p);
+ }
+ 
+ float16x8_t
+ foo2 (float16x8_t a, mve_pred16_t p)
+ {
+   return vrev64q_m_f16 (a, a, p);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m_s16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m_s16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m_s32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m_s32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m_s8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m_s8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m_u16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m_u16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m_u32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m_u32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m_u8 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m_u8 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vrev64q_s16 (a);
  }
  
- /* { dg-final { scan-assembler "vrev64.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vrev64q (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vrev64q_s16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev64.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vrev64q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
    return vrev64q_s32 (a);
  }
  
- /* { dg-final { scan-assembler "vrev64.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vrev64q (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
    return vrev64q_s32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev64.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
    return vrev64q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vrev64q_s8 (a);
  }
  
- /* { dg-final { scan-assembler "vrev64.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vrev64q (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vrev64q_s8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev64.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vrev64q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
!     return vrev64q_u16 (a);
  }
  
- /* { dg-final { scan-assembler "vrev64.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!     return vrev64q (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vrev64q_u16 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev64.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vrev64q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
!     return vrev64q_u32 (a);
  }
  
- /* { dg-final { scan-assembler "vrev64.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!     return vrev64q (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vrev64q_u32 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev64.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!   return vrev64q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
!     return vrev64q_u8 (a);
  }
  
- /* { dg-final { scan-assembler "vrev64.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!     return vrev64q (a);
  }
  
! /* { dg-final { scan-assembler "vrev64.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrev64.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vrev64q_u8 (a);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrev64.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vrev64q (a);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x_s16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x_s16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x_s32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x_s32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x_s8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x_s8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x_u16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x_u16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x_u32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x_u32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x_u8 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrev64t.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x_u8 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrev64t.8	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
    return vrev64q_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrhaddt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrhaddt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrhaddt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrhaddt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrhaddt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrhaddt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vrhaddq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrhadd.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vrhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrhadd.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrhadd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vrhaddq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrhadd.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vrhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrhaddq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrhadd.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrhadd.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrhadd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrhaddq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrhadd.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vrhaddq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrhadd.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vrhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrhadd.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrhadd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vrhaddq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrhadd.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vrhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vrhaddq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrhadd.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vrhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrhadd.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrhadd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vrhaddq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrhadd.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vrhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vrhaddq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrhadd.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vrhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrhadd.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrhadd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vrhaddq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrhadd.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vrhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vrhaddq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrhadd.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vrhaddq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrhadd.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrhadd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vrhaddq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrhadd.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vrhaddq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrhaddt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrhaddt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrhaddq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavhat.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavhat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p_u32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavhat.u32"  }  } */
  
  uint64_t
  foo1 (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavhat.u32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p_u32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaq_p (a, b, c, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vrmlaldavhat.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint64_t
! foo2 (uint32x4_t b, uint32x4_t c, mve_pred16_t p)
! {
!   return vrmlaldavhaq_p (1, b, c, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavha.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavha.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlaldavha.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlaldavha.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint64_t a, uint32x4_t b, uint32x4_t c)
  {
    return vrmlaldavhaq_u32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavha.u32"  }  } */
  
  uint64_t
  foo1 (uint64_t a, uint32x4_t b, uint32x4_t c)
  {
    return vrmlaldavhaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavha.u32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlaldavha.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint64_t a, uint32x4_t b, uint32x4_t c)
  {
    return vrmlaldavhaq_u32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlaldavha.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint64_t a, uint32x4_t b, uint32x4_t c)
  {
    return vrmlaldavhaq (a, b, c);
  }
  
! /*
! **foo2:
! **	...
! **	vrmlaldavha.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! uint64_t
! foo2 (uint32x4_t b, uint32x4_t c)
! {
!   return vrmlaldavhaq (1, b, c);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaxq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavhaxt.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavhaxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaxq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlaldavhaxq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaxq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavhax.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavhax.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlaldavhax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaxq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlaldavhax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlaldavhaxq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavht.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavht.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavht.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavht.u32"  }  } */
  
  uint64_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavht.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavht.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavht.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavh.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlaldavh.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlaldavh.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint64_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vrmlaldavhq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavh.u32"  }  } */
  
  uint64_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vrmlaldavhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavh.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlaldavh.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vrmlaldavhq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlaldavh.u32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint64_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vrmlaldavhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhxq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavhxt.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavhxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhxq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlaldavhxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlaldavhxq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhxq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmlaldavhx.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmlaldavhx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlaldavhx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhxq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlaldavhx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlaldavhxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavhat.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavhat.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavhat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavhat.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavha.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavha.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlsldavha.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlsldavha.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaxq_p_s32 (a, b, c, p);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavhaxt.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaxq_p (a, b, c, p);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavhaxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavhaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaxq_p_s32 (a, b, c, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavhaxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
  {
    return vrmlsldavhaxq_p (a, b, c, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaxq_s32 (a, b, c);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavhax.s32"  }  } */
  
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaxq (a, b, c);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavhax.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlsldavhax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaxq_s32 (a, b, c);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlsldavhax.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int64_t a, int32x4_t b, int32x4_t c)
  {
    return vrmlsldavhaxq (a, b, c);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavht.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavht.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavht.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavh.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlsldavh.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlsldavh.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhxq_p_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavhxt.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhxq_p (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavhxt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavhxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhxq_p_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmlsldavhxt.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmlsldavhxq_p (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhxq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmlsldavhx.s32"  }  } */
  
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhxq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmlsldavhx.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmlsldavhx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhxq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmlsldavhx.s32	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int64_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmlsldavhxq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrmulht.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrmulht.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrmulht.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrmulht.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrmulht.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrmulht.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vrmulhq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmulh.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vrmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmulh.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vrmulhq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmulh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vrmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmulhq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmulh.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmulh.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrmulhq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmulh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vrmulhq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmulh.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vrmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmulh.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vrmulhq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmulh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vrmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vrmulhq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmulh.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vrmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmulh.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmulh.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vrmulhq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmulh.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vrmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vrmulhq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmulh.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vrmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmulh.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmulh.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vrmulhq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmulh.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vrmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vrmulhq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrmulh.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vrmulhq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrmulh.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrmulh.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vrmulhq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrmulh.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vrmulhq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrmulht.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrmulht.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vrmulhq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndaq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrinta.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrinta.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndaq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrinta.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrndaq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndaq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vrinta.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrinta.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndaq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrinta.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vrndaq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintat.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndaq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintat.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintat.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndaq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndmq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrintm.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintm.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndmq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintm.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrndmq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndmq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vrintm.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintm.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndmq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintm.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vrndmq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintmt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintmt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintmt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndmq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintmt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintmt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndmq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndnq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrintn.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintn.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndnq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintn.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrndnq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndnq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vrintn.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintn.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndnq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintn.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vrndnq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintnt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintnt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintnt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintnt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintnt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndnq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndpq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrintp.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintp.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndpq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintp.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrndpq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndpq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vrintp.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintp.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndpq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintp.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vrndpq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintpt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintpt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintpt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndpq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintpt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintpt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndpq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrintz.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintz.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintz.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrndq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vrintz.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintz.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintz.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vrndq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintzt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintzt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintzt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintzt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintzt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndxq_f16 (a);
  }
  
! /* { dg-final { scan-assembler "vrintx.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintx.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a)
  {
    return vrndxq_f16 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintx.f16	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float16x8_t
! foo1 (float16x8_t a)
! {
!   return vrndxq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,13 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndxq_f32 (a);
  }
  
! /* { dg-final { scan-assembler "vrintx.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrintx.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a)
  {
    return vrndxq_f32 (a);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vrintx.f32	q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! */
! float32x4_t
! foo1 (float32x4_t a)
! {
!   return vrndxq (a);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_m_f16 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintxt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_m_f16 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_m_f32 (inactive, a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintxt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_m (inactive, a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_m_f32 (inactive, a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_m (inactive, a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_x_f16 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintxt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_x_f16 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f16	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, mve_pred16_t p)
  {
    return vrndxq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_x_f32 (a, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrintxt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_x (a, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_x_f32 (a, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrintxt.f32	q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, mve_pred16_t p)
  {
    return vrndxq_x (a, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vrshlq_m_n (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshlt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshlt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshlt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshlt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshlt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshlt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vrshlq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vrshlq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vrshlq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vrshlq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vrshlq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vrshlq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vrshlq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vrshlq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vrshlq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vrshlq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vrshlq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vrshlq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vrshlq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vrshlq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrshlq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vrshlq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vrshlq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vrshlq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vrshlq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vrshlq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vrshlq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vrshlq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vrshlq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vrshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vrshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vrshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vrshlq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vrshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vrshlq_x (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrnbt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrnbt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrnbt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrnbt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrnbt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrnbt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrnbt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrnbt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vrshrnbq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnb.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnb.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vrshrnbq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vrshrnbq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnb.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnb.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vrshrnbq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vrshrnbq_n_u16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnb.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnb.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vrshrnbq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vrshrnbq_n_u32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnb.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnb.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vrshrnbq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vrshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_s16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrntt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrntt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrntt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrntt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrntt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrntt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrntt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrntt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vrshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vrshrntq_n_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnt.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
    return vrshrntq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vrshrntq_n_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnt.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
    return vrshrntq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vrshrntq_n_u16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnt.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
    return vrshrntq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vrshrntq_n_u32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vrshrnt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vrshrnt.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
    return vrshrntq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
    return vrshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_s16 (inactive, a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_s32 (inactive, a, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 32, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_s32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_s8 (inactive, a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_s8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_u16 (inactive, a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_u32 (inactive, a, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 32, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_u8 (inactive, a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
!   return vrshrq_n_s16 (a, 16);
  }
  
- /* { dg-final { scan-assembler "vrshr.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
!   return vrshrq (a, 16);
  }
  
! /* { dg-final { scan-assembler "vrshr.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshr.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
!   return vrshrq_n_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshr.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
!   return vrshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
!   return vrshrq_n_s32 (a, 32);
  }
  
- /* { dg-final { scan-assembler "vrshr.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
!   return vrshrq (a, 32);
  }
  
! /* { dg-final { scan-assembler "vrshr.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshr.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
!   return vrshrq_n_s32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshr.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
!   return vrshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
!   return vrshrq_n_s8 (a, 8);
  }
  
- /* { dg-final { scan-assembler "vrshr.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
!   return vrshrq (a, 8);
  }
  
! /* { dg-final { scan-assembler "vrshr.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshr.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
!   return vrshrq_n_s8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshr.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
!   return vrshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vrshrq_n_u16 (a, 16);
  }
  
- /* { dg-final { scan-assembler "vrshr.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vrshrq (a, 16);
  }
  
! /* { dg-final { scan-assembler "vrshr.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshr.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vrshrq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshr.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vrshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vrshrq_n_u32 (a, 32);
  }
  
- /* { dg-final { scan-assembler "vrshr.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!   return vrshrq (a, 32);
  }
  
! /* { dg-final { scan-assembler "vrshr.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshr.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vrshrq_n_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshr.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!   return vrshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vrshrq_n_u8 (a, 8);
  }
  
- /* { dg-final { scan-assembler "vrshr.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vrshrq (a, 8);
  }
  
! /* { dg-final { scan-assembler "vrshr.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vrshr.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vrshrq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vrshr.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vrshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_s16 (a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_s32 (a, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 32, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_s32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_s8 (a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_s8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_u16 (a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_u32 (a, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 32, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_u8 (a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vrshrt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vrshrt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x_n_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vrshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, mve_pred16_t p)
  {
!   return vrshrq_x (a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vsbciq_m_s32 (inactive, a, b, carry_out, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsbcit.i32"  } } */
  
  int32x4_t
! foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vsbciq_m (inactive, a, b, carry_out, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsbcit.i32"  } } */
--- 1,57 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsbcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vsbciq_m_s32 (inactive, a, b, carry_out, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsbcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vsbciq_m (inactive, a, b, carry_out, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vsbciq_m_u32 (inactive, a, b, carry_out, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsbcit.i32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p)
  {
    return vsbciq_m (inactive, a, b, carry_out, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsbcit.i32"  }  } */
--- 1,57 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsbcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vsbciq_m_u32 (inactive, a, b, carry_out, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsbcit.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p)
  {
    return vsbciq_m (inactive, a, b, carry_out, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned * carry_out)
  {
    return vsbciq_s32 (a, b, carry_out);
  }
  
- /* { dg-final { scan-assembler "vsbci.i32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned * carry_out)
  {
!   return vsbciq_s32 (a, b, carry_out);
  }
  
! /* { dg-final { scan-assembler "vsbci.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsbci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned *carry_out)
  {
    return vsbciq_s32 (a, b, carry_out);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsbci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned *carry_out)
  {
!   return vsbciq (a, b, carry_out);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned * carry_out)
  {
    return vsbciq_u32 (a, b, carry_out);
  }
  
- /* { dg-final { scan-assembler "vsbci.i32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry_out)
  {
!   return vsbciq_u32 (a, b, carry_out);
  }
  
! /* { dg-final { scan-assembler "vsbci.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsbci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned *carry_out)
  {
    return vsbciq_u32 (a, b, carry_out);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsbci.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry_out)
  {
!   return vsbciq (a, b, carry_out);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p)
  {
!     return vsbcq_m_s32 (inactive, a, b, carry, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsbct.i32"  }  } */
  
  int32x4_t
! foo1(int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p)
  {
!     return vsbcq_m (inactive, a, b, carry, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsbct.i32"  }  } */
--- 1,77 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsbct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p)
  {
!   return vsbcq_m_s32 (inactive, a, b, carry, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsbct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p)
  {
!   return vsbcq_m (inactive, a, b, carry, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p)
  {
!     return vsbcq_m_u32 (inactive, a, b, carry, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsbct.i32"  }  } */
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p)
  {
!     return vsbcq_m (inactive, a, b, carry, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsbct.i32"  }  } */
--- 1,77 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsbct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p)
  {
!   return vsbcq_m_u32 (inactive, a, b, carry, p);
  }
  
! 
! /*
! **foo1:
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
! **	...
! **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
! **	...
! **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
! **	...
! **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vsbct.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
! **	...
! **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
! **	...
! **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
! **	...
! */
  uint32x4_t
! foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p)
  {
!   return vsbcq_m (inactive, a, b, carry, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned * carry)
  {
    return vsbcq_s32 (a, b, carry);
  }
  
- /* { dg-final { scan-assembler "vsbc.i32"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned * carry)
  {
    return vsbcq (a, b, carry);
  }
  
! /* { dg-final { scan-assembler "vsbc.i32"  }  } */
--- 1,69 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vsbc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t a, int32x4_t b, unsigned *carry)
  {
    return vsbcq_s32 (a, b, carry);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vsbc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t a, int32x4_t b, unsigned *carry)
  {
    return vsbcq (a, b, carry);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned * carry)
  {
    return vsbcq_u32 (a, b, carry);
  }
  
- /* { dg-final { scan-assembler "vsbc.i32"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry)
  {
    return vsbcq (a, b, carry);
  }
  
! /* { dg-final { scan-assembler "vsbc.i32"  }  } */
--- 1,69 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vsbc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t a, uint32x4_t b, unsigned *carry)
  {
    return vsbcq_u32 (a, b, carry);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	lsls	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?:	@.*|)
+ **	...
+ **	and	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?:	@.*|)
+ **	...
+ **	orrs	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vmsr	FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vsbc.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ **	vmrs	(?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?:	@.*|)
+ **	...
+ **	ubfx	(?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry)
  {
    return vsbcq (a, b, carry);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo (float16_t a, float16x8_t b)
- {
-   return vsetq_lane (23.26, b, 0);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16_t a, float16x8_t b)
  {
!     return vsetq_lane_f16 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.16"  }  } */
  
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16_t a, float16x8_t b)
  {
!   return vsetq_lane_f16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo1 (float16_t a, float16x8_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo2 (float16x8_t b)
+ {
+   return vsetq_lane (1.1, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo (float32_t a, float32x4_t b)
- {
-     return vsetq_lane (23.34, b, 0);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32_t a, float32x4_t b)
  {
!     return vsetq_lane_f32 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.32"  }  } */
  
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32_t a, float32x4_t b)
  {
!   return vsetq_lane_f32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo1 (float32_t a, float32x4_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo2 (float32x4_t b)
+ {
+   return vsetq_lane (1.1, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16_t a, int16x8_t b)
  {
!     return vsetq_lane_s16 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.16"  }  } */
  
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16_t a, int16x8_t b)
  {
!   return vsetq_lane_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int16_t a, int16x8_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32_t a, int32x4_t b)
  {
!     return vsetq_lane_s32 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.32"  }  } */
  
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32_t a, int32x4_t b)
  {
!   return vsetq_lane_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int32_t a, int32x4_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,16 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
- /* { dg-require-effective-target arm_hard_ok } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
! /* { dg-additional-options "-mfloat-abi=hard -O2" } */
  
  #include "arm_mve.h"
  
  int64x2_t
  foo (int64_t a, int64x2_t b)
  {
!     return vsetq_lane_s64 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler {vmov\td0, r[1-9]*[0-9], r[1-9]*[0-9]}  }  } */
  
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
! /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov	d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int64x2_t
  foo (int64_t a, int64x2_t b)
  {
!   return vsetq_lane_s64 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov	d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ int64x2_t
+ foo1 (int64_t a, int64x2_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8_t a, int8x16_t b)
  {
!     return vsetq_lane_s8 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.8"  }  } */
  
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.8	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8_t a, int8x16_t b)
  {
!   return vsetq_lane_s8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.8	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ int8x16_t
+ foo1 (int8_t a, int8x16_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16_t a, uint16x8_t b)
  {
!     return vsetq_lane_u16 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.16"  }  } */
  
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16_t a, uint16x8_t b)
  {
!   return vsetq_lane_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16_t a, uint16x8_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmov.16	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo2 (uint16x8_t b)
+ {
+   return vsetq_lane (1, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32_t a, uint32x4_t b)
  {
!     return vsetq_lane_u32 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.32"  }  } */
  
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32_t a, uint32x4_t b)
  {
!   return vsetq_lane_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32_t a, uint32x4_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmov.32	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo2 (uint32x4_t b)
+ {
+   return vsetq_lane (1, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,16 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
- /* { dg-require-effective-target arm_hard_ok } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
! /* { dg-additional-options "-mfloat-abi=hard -O2" } */
  
  #include "arm_mve.h"
  
  uint64x2_t
  foo (uint64_t a, uint64x2_t b)
  {
!     return vsetq_lane_u64 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler {vmov\td0, r[1-9]*[0-9], r[1-9]*[0-9]}  }  } */
  
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
! /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov	d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint64x2_t
  foo (uint64_t a, uint64x2_t b)
  {
!   return vsetq_lane_u64 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov	d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint64x2_t
+ foo1 (uint64_t a, uint64x2_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmov	d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint64x2_t
+ foo2 (uint64x2_t b)
+ {
+   return vsetq_lane (1, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
- /* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8_t a, uint8x16_t b)
  {
!     return vsetq_lane_u8 (a, b, 0);
  }
  
- /* { dg-final { scan-assembler "vmov.8"  }  } */
  
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.8	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8_t a, uint8x16_t b)
  {
!   return vsetq_lane_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmov.8	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8_t a, uint8x16_t b)
+ {
+   return vsetq_lane (a, b, 1);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmov.8	q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo2 (uint8x16_t b)
+ {
+   return vsetq_lane (1, b, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, uint32_t * b, mve_pred16_t p)
  {
!   return vshlcq_m_s16 (a, b, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlct"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, uint32_t * b, mve_pred16_t p)
  {
!   return vshlcq_m (a, b, 32, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlct"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t a, uint32_t *b, mve_pred16_t p)
  {
!   return vshlcq_m_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t a, uint32_t *b, mve_pred16_t p)
  {
!   return vshlcq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m_s32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlct"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlct"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m_s8 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlct"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlct"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m_s8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16x8_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m_u16 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlct"  }  } */
  
  uint16x8_t
! foo1 (uint16x8_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlct"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16x8_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16x8_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m_u32 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlct"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlct"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8x16_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m_u8 (a, b, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlct"  }  } */
  
  uint8x16_t
! foo1 (uint8x16_t a, uint32_t * b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlct"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8x16_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m_u8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlct	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo1 (uint8x16_t a, uint32_t *b, mve_pred16_t p)
  {
    return vshlcq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
! foo (int16x8_t a, uint32_t * b)
  {
    return vshlcq_s16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vshlc"  }  } */
  
  int16x8_t
! foo1 (int16x8_t a, uint32_t * b)
  {
    return vshlcq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vshlc"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo (int16x8_t a, uint32_t *b)
  {
    return vshlcq_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
! foo1 (int16x8_t a, uint32_t *b)
  {
    return vshlcq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
! foo (int32x4_t a, uint32_t * b)
  {
    return vshlcq_s32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vshlc"  }  } */
  
  int32x4_t
! foo1 (int32x4_t a, uint32_t * b)
  {
    return vshlcq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vshlc"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo (int32x4_t a, uint32_t *b)
  {
    return vshlcq_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
! foo1 (int32x4_t a, uint32_t *b)
  {
    return vshlcq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
! foo (int8x16_t a, uint32_t * b)
  {
    return vshlcq_s8 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vshlc"  }  } */
  
  int8x16_t
! foo1 (int8x16_t a, uint32_t * b)
  {
    return vshlcq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vshlc"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo (int8x16_t a, uint32_t *b)
  {
    return vshlcq_s8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
! foo1 (int8x16_t a, uint32_t *b)
  {
    return vshlcq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
! foo (uint16x8_t a, uint32_t * b)
  {
    return vshlcq_u16 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vshlc"  }  } */
  
  uint16x8_t
! foo1 (uint16x8_t a, uint32_t * b)
  {
    return vshlcq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vshlc"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo (uint16x8_t a, uint32_t *b)
  {
    return vshlcq_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
! foo1 (uint16x8_t a, uint32_t *b)
  {
    return vshlcq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
! foo (uint32x4_t a, uint32_t * b)
  {
    return vshlcq_u32 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vshlc"  }  } */
  
  uint32x4_t
! foo1 (uint32x4_t a, uint32_t * b)
  {
    return vshlcq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vshlc"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo (uint32x4_t a, uint32_t *b)
  {
    return vshlcq_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
! foo1 (uint32x4_t a, uint32_t *b)
  {
    return vshlcq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
! foo (uint8x16_t a, uint32_t * b)
  {
    return vshlcq_u8 (a, b, 1);
  }
  
- /* { dg-final { scan-assembler "vshlc"  }  } */
  
  uint8x16_t
! foo1 (uint8x16_t a, uint32_t * b)
  {
    return vshlcq (a, b, 1);
  }
  
! /* { dg-final { scan-assembler "vshlc"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo (uint8x16_t a, uint32_t *b)
  {
    return vshlcq_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshlc	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
! foo1 (uint8x16_t a, uint32_t *b)
  {
    return vshlcq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_s16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshllbt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_s8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.s8"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshllbt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_s8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_u16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshllbt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_u8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshllbt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshllbq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a)
  {
    return vshllbq_n_s16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllb.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vshllbq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllb.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a)
  {
    return vshllbq_n_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllb.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vshllbq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a)
  {
    return vshllbq_n_s8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllb.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vshllbq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllb.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllb.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a)
  {
    return vshllbq_n_s8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllb.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vshllbq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a)
  {
    return vshllbq_n_u16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllb.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a)
  {
    return vshllbq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllb.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllb.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a)
  {
    return vshllbq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllb.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a)
  {
    return vshllbq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a)
  {
    return vshllbq_n_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllb.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a)
  {
    return vshllbq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllb.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllb.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a)
  {
    return vshllbq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllb.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a)
  {
    return vshllbq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!     return vshllbq_x_n_s16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.s16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vshllbq_x_n_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int16x8_t a, mve_pred16_t p)
+ {
+   return vshllbq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!     return vshllbq_x_n_s8 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.s8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!   return vshllbq_x_n_s8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int8x16_t a, mve_pred16_t p)
+ {
+   return vshllbq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!     return vshllbq_x_n_u16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.u16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!   return vshllbq_x_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint16x8_t a, mve_pred16_t p)
+ {
+   return vshllbq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!     return vshllbq_x_n_u8 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshllbt.u8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!   return vshllbq_x_n_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshllbt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint8x16_t a, mve_pred16_t p)
+ {
+   return vshllbq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_s16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.s16"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlltt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_s8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.s8"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlltt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_s8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_u16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlltt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_u8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlltt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlltq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a)
  {
    return vshlltq_n_s16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllt.s16"  }  } */
  
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vshlltq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllt.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a)
  {
    return vshlltq_n_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int16x8_t a)
  {
    return vshlltq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a)
  {
    return vshlltq_n_s8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllt.s8"  }  } */
  
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vshlltq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllt.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a)
  {
    return vshlltq_n_s8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int8x16_t a)
  {
    return vshlltq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a)
  {
    return vshlltq_n_u16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllt.u16"  }  } */
  
  uint32x4_t
  foo1 (uint16x8_t a)
  {
    return vshlltq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllt.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a)
  {
    return vshlltq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint16x8_t a)
  {
    return vshlltq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a)
  {
    return vshlltq_n_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshllt.u8"  }  } */
  
  uint16x8_t
  foo1 (uint8x16_t a)
  {
    return vshlltq (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshllt.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshllt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a)
  {
    return vshlltq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshllt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint8x16_t a)
  {
    return vshlltq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!     return vshlltq_x_n_s16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.s16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vshlltq_x_n_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int16x8_t a, mve_pred16_t p)
+ {
+   return vshlltq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!     return vshlltq_x_n_s8 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.s8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!   return vshlltq_x_n_s8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int8x16_t a, mve_pred16_t p)
+ {
+   return vshlltq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!     return vshlltq_x_n_u16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.u16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!   return vshlltq_x_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint16x8_t a, mve_pred16_t p)
+ {
+   return vshlltq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!     return vshlltq_x_n_u8 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlltt.u8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!   return vshlltq_x_n_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlltt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint8x16_t a, mve_pred16_t p)
+ {
+   return vshlltq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n_s16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n_s32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n_s32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n_s8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n_s8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n_u16 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n_u32 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n_u8 (inactive, a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshlt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
    return vshlq_m_n (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
  {
    return vshlq_m_r (a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vshlq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
    return vshlq_n_s16 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
    return vshlq_n_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
    return vshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
!   return vshlq_n_s32 (a, 16);
  }
  
- /* { dg-final { scan-assembler "vshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
!   return vshlq_n (a, 16);
  }
  
! /* { dg-final { scan-assembler "vshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
!   return vshlq_n_s32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
!   return vshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
    return vshlq_n_s8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
    return vshlq_n_s8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
    return vshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vshlq_n_u16 (a, 11);
  }
  
- /* { dg-final { scan-assembler "vshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vshlq_n (a, 11);
  }
  
! /* { dg-final { scan-assembler "vshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vshlq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
    return vshlq_n_u32 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
    return vshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
    return vshlq_n_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
    return vshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
    return vshlq_n_u8 (a, 1);
  }
  
- /* { dg-final { scan-assembler "vshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
    return vshlq_n (a, 1);
  }
  
! /* { dg-final { scan-assembler "vshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
    return vshlq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
    return vshlq_n (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vshlq_r_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32_t b)
  {
    return vshlq_r_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vshlq_r_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vshlq_r_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vshlq_r_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int32_t b)
  {
    return vshlq_r_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vshlq_r_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int32_t b)
  {
    return vshlq_r_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u16	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vshlq_r_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32_t b)
  {
    return vshlq_r_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u32	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vshlq_r_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int32_t b)
  {
    return vshlq_r_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u8	q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int32_t b)
  {
    return vshlq_r (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vshlq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vshlq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vshlq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vshlq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vshlq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vshlq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vshlq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vshlq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vshlq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vshlq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vshlq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vshl.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vshlq (a, b);
  }
  
! /* { dg-final { scan-assembler "vshl.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vshlq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshl.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vshlq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!     return vshlq_x_n_s16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vshlq_x_n_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int16x8_t a, mve_pred16_t p)
+ {
+   return vshlq_x_n (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
!     return vshlq_x_n_s32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
!   return vshlq_x_n_s32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int32x4_t a, mve_pred16_t p)
+ {
+   return vshlq_x_n (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!     return vshlq_x_n_s8 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!   return vshlq_x_n_s8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int8x16_t
+ foo1 (int8x16_t a, mve_pred16_t p)
+ {
+   return vshlq_x_n (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!     return vshlq_x_n_u16 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!   return vshlq_x_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t a, mve_pred16_t p)
+ {
+   return vshlq_x_n (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
!     return vshlq_x_n_u32 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, mve_pred16_t p)
  {
!   return vshlq_x_n_u32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t a, mve_pred16_t p)
+ {
+   return vshlq_x_n (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!     return vshlq_x_n_u8 (a, 1, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!   return vshlq_x_n_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t a, mve_pred16_t p)
+ {
+   return vshlq_x_n (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!     return vshlq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshlq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
+ {
+   return vshlq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!     return vshlq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshlq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
+ {
+   return vshlq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!     return vshlq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.s8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vshlq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ int8x16_t
+ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
+ {
+   return vshlq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!     return vshlq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshlq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
+ {
+   return vshlq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!     return vshlq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshlq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
+ {
+   return vshlq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!     return vshlq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshlt.u8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vshlq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshlt.u8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
+ {
+   return vshlq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_s16 (a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrnbt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrnbt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_s32 (a, b, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrnbt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrnbt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_u16 (a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrnbt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrnbt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_u32 (a, b, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrnbt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrnbt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrnbt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrnbq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
!   return vshrnbq_n_s16 (a, b, 8);
  }
  
- /* { dg-final { scan-assembler "vshrnb.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
!   return vshrnbq (a, b, 8);
  }
  
! /* { dg-final { scan-assembler "vshrnb.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
!   return vshrnbq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
!   return vshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
!   return vshrnbq_n_s32 (a, b, 16);
  }
  
- /* { dg-final { scan-assembler "vshrnb.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
!   return vshrnbq (a, b, 16);
  }
  
! /* { dg-final { scan-assembler "vshrnb.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
!   return vshrnbq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
!   return vshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
!   return vshrnbq_n_u16 (a, b, 8);
  }
  
- /* { dg-final { scan-assembler "vshrnb.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
!   return vshrnbq (a, b, 8);
  }
  
! /* { dg-final { scan-assembler "vshrnb.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
!   return vshrnbq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnb.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
!   return vshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
!   return vshrnbq_n_u32 (a, b, 16);
  }
  
- /* { dg-final { scan-assembler "vshrnb.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
!   return vshrnbq (a, b, 16);
  }
  
! /* { dg-final { scan-assembler "vshrnb.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
!   return vshrnbq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnb.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
!   return vshrnbq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_s16 (a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrntt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrntt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_s32 (a, b, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrntt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrntt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_u16 (a, b, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrntt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrntt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_u32 (a, b, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrntt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrntt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrntt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vshrntq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
!   return vshrntq_n_s16 (a, b, 8);
  }
  
- /* { dg-final { scan-assembler "vshrnt.i16"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
!   return vshrntq (a, b, 8);
  }
  
! /* { dg-final { scan-assembler "vshrnt.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int16x8_t b)
  {
!   return vshrntq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int16x8_t b)
  {
!   return vshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
!   return vshrntq_n_s32 (a, b, 16);
  }
  
- /* { dg-final { scan-assembler "vshrnt.i32"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
!   return vshrntq (a, b, 16);
  }
  
! /* { dg-final { scan-assembler "vshrnt.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int32x4_t b)
  {
!   return vshrntq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int32x4_t b)
  {
!   return vshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
!   return vshrntq_n_u16 (a, b, 8);
  }
  
- /* { dg-final { scan-assembler "vshrnt.i16"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
!   return vshrntq (a, b, 8);
  }
  
! /* { dg-final { scan-assembler "vshrnt.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint16x8_t b)
  {
!   return vshrntq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnt.i16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint16x8_t b)
  {
!   return vshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
!   return vshrntq_n_u32 (a, b, 16);
  }
  
- /* { dg-final { scan-assembler "vshrnt.i32"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
!   return vshrntq (a, b, 16);
  }
  
! /* { dg-final { scan-assembler "vshrnt.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint32x4_t b)
  {
!   return vshrntq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshrnt.i32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint32x4_t b)
  {
!   return vshrntq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_s16 (inactive, a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrt.s16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_s16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_s32 (inactive, a, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 32, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrt.s32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_s32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_s8 (inactive, a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrt.s8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_s8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_u16 (inactive, a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 16, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrt.u16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_u16 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_u32 (inactive, a, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 32, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_u32 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_u8 (inactive, a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 8, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vshrt.u8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m_n_u8 (inactive, a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
  {
!   return vshrq_m (inactive, a, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a)
  {
!   return vshrq_n_s16 (a, 16);
  }
  
- /* { dg-final { scan-assembler "vshr.s16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a)
  {
!   return vshrq (a, 16);
  }
  
! /* { dg-final { scan-assembler "vshr.s16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshr.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a)
  {
!   return vshrq_n_s16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshr.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a)
  {
!   return vshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a)
  {
!   return vshrq_n_s32 (a, 32);
  }
  
- /* { dg-final { scan-assembler "vshr.s32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a)
  {
!   return vshrq (a, 32);
  }
  
! /* { dg-final { scan-assembler "vshr.s32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshr.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a)
  {
!   return vshrq_n_s32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshr.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a)
  {
!   return vshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a)
  {
!   return vshrq_n_s8 (a, 8);
  }
  
- /* { dg-final { scan-assembler "vshr.s8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a)
  {
!   return vshrq (a, 8);
  }
  
! /* { dg-final { scan-assembler "vshr.s8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshr.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a)
  {
!   return vshrq_n_s8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshr.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a)
  {
!   return vshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vshrq_n_u16 (a, 16);
  }
  
- /* { dg-final { scan-assembler "vshr.u16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vshrq (a, 16);
  }
  
! /* { dg-final { scan-assembler "vshr.u16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshr.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a)
  {
!   return vshrq_n_u16 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshr.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a)
  {
!   return vshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vshrq_n_u32 (a, 32);
  }
  
- /* { dg-final { scan-assembler "vshr.u32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!   return vshrq (a, 32);
  }
  
! /* { dg-final { scan-assembler "vshr.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshr.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a)
  {
!   return vshrq_n_u32 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshr.u32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a)
  {
!   return vshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vshrq_n_u8 (a, 8);
  }
  
- /* { dg-final { scan-assembler "vshr.u8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vshrq (a, 8);
  }
  
! /* { dg-final { scan-assembler "vshr.u8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vshr.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a)
  {
!   return vshrq_n_u8 (a, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vshr.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a)
  {
!   return vshrq (a, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!     return vshrq_x_n_s16 (a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.s16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, mve_pred16_t p)
  {
!   return vshrq_x_n_s16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int16x8_t a, mve_pred16_t p)
+ {
+   return vshrq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
!     return vshrq_x_n_s32 (a, 32, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.s32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, mve_pred16_t p)
  {
!   return vshrq_x_n_s32 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int32x4_t a, mve_pred16_t p)
+ {
+   return vshrq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!     return vshrq_x_n_s8 (a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.s8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, mve_pred16_t p)
  {
!   return vshrq_x_n_s8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.s8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ int8x16_t
+ foo1 (int8x16_t a, mve_pred16_t p)
+ {
+   return vshrq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!     return vshrq_x_n_u16 (a, 16, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.u16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, mve_pred16_t p)
  {
!   return vshrq_x_n_u16 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t a, mve_pred16_t p)
+ {
+   return vshrq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!     return vshrq_x_n_u8 (a, 8, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vshrt.u8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, mve_pred16_t p)
  {
!   return vshrq_x_n_u8 (a, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vshrt.u8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t a, mve_pred16_t p)
+ {
+   return vshrq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_s16 (a, b, 15, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vslit.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 15, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vslit.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_s32 (a, b, 31, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vslit.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 31, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vslit.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_s8 (a, b, 7, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vslit.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 7, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vslit.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_s8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_u16 (a, b, 15, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vslit.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 15, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vslit.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_u32 (a, b, 31, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vslit.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 31, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vslit.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_u8 (a, b, 7, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vslit.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 7, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vslit.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m_n_u8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vslit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsliq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
!   return vsliq_n_s16 (a, b, 15);
  }
  
- /* { dg-final { scan-assembler "vsli.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
!   return vsliq (a, b, 15);
  }
  
! /* { dg-final { scan-assembler "vsli.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsli.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
!   return vsliq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsli.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
!   return vsliq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
!   return vsliq_n_s32 (a, b, 31);
  }
  
- /* { dg-final { scan-assembler "vsli.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
!   return vsliq (a, b, 31);
  }
  
! /* { dg-final { scan-assembler "vsli.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsli.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
!   return vsliq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsli.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
!   return vsliq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
!   return vsliq_n_s8 (a, b, 7);
  }
  
- /* { dg-final { scan-assembler "vsli.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
!   return vsliq (a, b, 7);
  }
  
! /* { dg-final { scan-assembler "vsli.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsli.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
!   return vsliq_n_s8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsli.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
!   return vsliq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
!   return vsliq_n_u16 (a, b, 15);
  }
  
- /* { dg-final { scan-assembler "vsli.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
!   return vsliq (a, b, 15);
  }
  
! /* { dg-final { scan-assembler "vsli.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsli.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
!   return vsliq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsli.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
!   return vsliq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
!   return vsliq_n_u32 (a, b, 31);
  }
  
- /* { dg-final { scan-assembler "vsli.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
!   return vsliq (a, b, 31);
  }
  
! /* { dg-final { scan-assembler "vsli.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsli.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
!   return vsliq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsli.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
!   return vsliq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
!   return vsliq_n_u8 (a, b, 7);
  }
  
- /* { dg-final { scan-assembler "vsli.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
!   return vsliq (a, b, 7);
  }
  
! /* { dg-final { scan-assembler "vsli.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsli.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
!   return vsliq_n_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsli.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
!   return vsliq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_s16 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsrit.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_s16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_s32 (a, b, 2, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsrit.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 2, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_s32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_s8 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsrit.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_s8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_u16 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsrit.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_u16 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_u32 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsrit.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_u32 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_u8 (a, b, 4, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsrit.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 4, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m_n_u8 (a, b, 1, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsrit.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsriq_m (a, b, 1, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
!   return vsriq_n_s16 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vsri.16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
!   return vsriq (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vsri.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsri.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
!   return vsriq_n_s16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsri.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
!   return vsriq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
!   return vsriq_n_s32 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vsri.32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
!   return vsriq (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vsri.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsri.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
!   return vsriq_n_s32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsri.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
!   return vsriq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
!   return vsriq_n_s8 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vsri.8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
!   return vsriq (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vsri.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsri.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
!   return vsriq_n_s8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsri.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
!   return vsriq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
!   return vsriq_n_u16 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vsri.16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
!   return vsriq (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vsri.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsri.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
!   return vsriq_n_u16 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsri.16	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
!   return vsriq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
!   return vsriq_n_u32 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vsri.32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
!   return vsriq (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vsri.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsri.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
!   return vsriq_n_u32 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsri.32	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
!   return vsriq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
!   return vsriq_n_u8 (a, b, 4);
  }
  
- /* { dg-final { scan-assembler "vsri.8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
!   return vsriq (a, b, 4);
  }
  
! /* { dg-final { scan-assembler "vsri.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsri.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
!   return vsriq_n_u8 (a, b, 1);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsri.8	q[0-9]+, q[0-9]+, #[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
!   return vsriq (a, b, 1);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! void
! foo (float16_t * addr, float16x8_t value)
! {
!   vst1q_f16 (addr, value);
! }
  
  void
! foo1 (float16_t * addr, float16x8_t value)
  {
!   vst1q (addr, value);
  }
  
- /* { dg-final { scan-assembler-times "vstrh.16" 2 }  } */
  
  void
! foo2 (float16_t a, float16x8_t x)
  {
!   vst1q (&a, x);
  }
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, float16x8_t value)
  {
!   return vst1q_f16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, float16x8_t value)
  {
!   return vst1q (base, value);
  }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * addr, float32x4_t value)
  {
!   vst1q_f32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (float32_t * addr, float32x4_t value)
  {
!   vst1q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, float32x4_t value)
  {
!   return vst1q_f32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, float32x4_t value)
  {
!   return vst1q (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * addr, float16x8_t value, mve_pred16_t p)
  {
!   vst1q_p_f16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (float16_t * addr, float16x8_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, float16x8_t value, mve_pred16_t p)
  {
!   return vst1q_p_f16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, float16x8_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * addr, float32x4_t value, mve_pred16_t p)
  {
!   vst1q_p_f32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (float32_t * addr, float32x4_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, float32x4_t value, mve_pred16_t p)
  {
!   return vst1q_p_f32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, float32x4_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * addr, int16x8_t value, mve_pred16_t p)
  {
!   vst1q_p_s16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (int16_t * addr, int16x8_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, int16x8_t value, mve_pred16_t p)
  {
!   return vst1q_p_s16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, int16x8_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vst1q_p_s32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (int32_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vst1q_p_s32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int8x16_t value, mve_pred16_t p)
  {
!   vst1q_p_s8 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.8"  }  } */
  
  void
! foo1 (int8_t * addr, int8x16_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int8x16_t value, mve_pred16_t p)
  {
!   return vst1q_p_s8 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int8x16_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * addr, uint16x8_t value, mve_pred16_t p)
  {
!   vst1q_p_u16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (uint16_t * addr, uint16x8_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t value, mve_pred16_t p)
  {
!   return vst1q_p_u16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vst1q_p_u32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (uint32_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vst1q_p_u32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint8x16_t value, mve_pred16_t p)
  {
!   vst1q_p_u8 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.8"  }  } */
  
  void
! foo1 (uint8_t * addr, uint8x16_t value, mve_pred16_t p)
  {
!   vst1q_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint8x16_t value, mve_pred16_t p)
  {
!   return vst1q_p_u8 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint8x16_t value, mve_pred16_t p)
  {
!   return vst1q_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! void
! foo (int16_t * addr, int16x8_t value)
! {
!   vst1q_s16 (addr, value);
! }
  
  void
! foo1 (int16_t * addr, int16x8_t value)
  {
!   vst1q (addr, value);
  }
  
- /* { dg-final { scan-assembler-times "vstrh.16" 2 }  } */
  
  void
! foo2 (int16_t a, int16x8_t x)
  {
!   vst1q (&a, x);
  }
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, int16x8_t value)
  {
!   return vst1q_s16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, int16x8_t value)
  {
!   return vst1q (base, value);
  }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * addr, int32x4_t value)
  {
!   vst1q_s32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (int32_t * addr, int32x4_t value)
  {
!   vst1q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, int32x4_t value)
  {
!   return vst1q_s32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, int32x4_t value)
  {
!   return vst1q (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! void
! foo (int8_t * addr, int8x16_t value)
! {
!   vst1q_s8 (addr, value);
! }
  
  void
! foo1 (int8_t * addr, int8x16_t value)
  {
!   vst1q (addr, value);
  }
  
- /* { dg-final { scan-assembler-times "vstrb.8" 2 }  } */
  
  void
! foo2 (int8_t a, int8x16_t x)
  {
!   vst1q (&a, x);
  }
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int8x16_t value)
  {
!   return vst1q_s8 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int8x16_t value)
  {
!   return vst1q (base, value);
  }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! void
! foo (uint16_t * addr, uint16x8_t value)
! {
!   vst1q_u16 (addr, value);
! }
  
  void
! foo1 (uint16_t * addr, uint16x8_t value)
  {
!   vst1q (addr, value);
  }
  
- /* { dg-final { scan-assembler-times "vstrh.16" 2 }  } */
  
  void
! foo2 (uint16_t a, uint16x8_t x)
  {
!   vst1q (&a, x);
  }
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t value)
  {
!   return vst1q_u16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t value)
  {
!   return vst1q (base, value);
  }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * addr, uint32x4_t value)
  {
!   vst1q_u32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (uint32_t * addr, uint32x4_t value)
  {
!   vst1q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t value)
  {
!   return vst1q_u32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t value)
  {
!   return vst1q (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,25 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
! void
! foo (uint8_t * addr, uint8x16_t value)
! {
!   vst1q_u8 (addr, value);
! }
  
  void
! foo1 (uint8_t * addr, uint8x16_t value)
  {
!   vst1q (addr, value);
  }
  
- /* { dg-final { scan-assembler-times "vstrb.8" 2 }  } */
  
  void
! foo2 (uint8_t a, uint8x16_t x)
  {
!   vst1q (&a, x);
  }
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
! #ifdef __cplusplus
! extern "C" {
! #endif
  
+ /*
+ **foo:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint8x16_t value)
  {
!   return vst1q_u8 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint8x16_t value)
  {
!   return vst1q (base, value);
  }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * addr, float16x8x2_t value)
  {
!   vst2q_f16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.16"  }  } */
- /* { dg-final { scan-assembler "vst21.16"  }  } */
  
  void
! foo1 (float16_t * addr, float16x8x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *addr, float16x8x2_t value)
  {
!   return vst2q_f16 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *addr, float16x8x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * addr, float32x4x2_t value)
  {
!   vst2q_f32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.32"  }  } */
- /* { dg-final { scan-assembler "vst21.32"  }  } */
  
  void
! foo1 (float32_t * addr, float32x4x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *addr, float32x4x2_t value)
  {
!   return vst2q_f32 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *addr, float32x4x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * addr, int16x8x2_t value)
  {
!   vst2q_s16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.16"  }  } */
- /* { dg-final { scan-assembler "vst21.16"  }  } */
  
  void
! foo1 (int16_t * addr, int16x8x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *addr, int16x8x2_t value)
  {
!   return vst2q_s16 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *addr, int16x8x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * addr, int32x4x2_t value)
  {
!   vst2q_s32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.32"  }  } */
- /* { dg-final { scan-assembler "vst21.32"  }  } */
  
  void
! foo1 (int32_t * addr, int32x4x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *addr, int32x4x2_t value)
  {
!   return vst2q_s32 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *addr, int32x4x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int8x16x2_t value)
  {
!   vst2q_s8 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.8"  }  } */
- /* { dg-final { scan-assembler "vst21.8"  }  } */
  
  void
! foo1 (int8_t * addr, int8x16x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *addr, int8x16x2_t value)
  {
!   return vst2q_s8 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *addr, int8x16x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * addr, uint16x8x2_t value)
  {
!   vst2q_u16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.16"  }  } */
- /* { dg-final { scan-assembler "vst21.16"  }  } */
  
  void
! foo1 (uint16_t * addr, uint16x8x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.16"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *addr, uint16x8x2_t value)
  {
!   return vst2q_u16 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.16	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *addr, uint16x8x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * addr, uint32x4x2_t value)
  {
!   vst2q_u32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.32"  }  } */
- /* { dg-final { scan-assembler "vst21.32"  }  } */
  
  void
! foo1 (uint32_t * addr, uint32x4x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.32"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *addr, uint32x4x2_t value)
  {
!   return vst2q_u32 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.32	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *addr, uint32x4x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint8x16x2_t value)
  {
!   vst2q_u8 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst20.8"  }  } */
- /* { dg-final { scan-assembler "vst21.8"  }  } */
  
  void
! foo1 (uint8_t * addr, uint8x16x2_t value)
  {
!   vst2q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst20.8"  }  } */
--- 1,45 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *addr, uint8x16x2_t value)
  {
!   return vst2q_u8 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst20.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ **	vst21.8	{q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *addr, uint8x16x2_t value)
  {
!   return vst2q (addr, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * addr, float16x8x4_t value)
  {
!   vst4q_f16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.16"  }  } */
- /* { dg-final { scan-assembler "vst41.16"  }  } */
- /* { dg-final { scan-assembler "vst42.16"  }  } */
- /* { dg-final { scan-assembler "vst43.16"  }  } */
  
  void
! foo1 (float16_t * addr, float16x8x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.16"  }  } */
! /* { dg-final { scan-assembler "vst41.16"  }  } */
! /* { dg-final { scan-assembler "vst42.16"  }  } */
! /* { dg-final { scan-assembler "vst43.16"  }  } */
! 
! void
! foo2 (float16_t * addr, float16x8x4_t value)
! {
!   vst4q_f16 (addr, value);
!   addr += 32;
!   vst4q_f16 (addr, value);
  }
  
! /* { dg-final { scan-assembler {vst43.16\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (float16_t *addr, float16x8x4_t value)
  {
!   return vst4q_f16 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (float16_t *addr, float16x8x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * addr, float32x4x4_t value)
  {
!   vst4q_f32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.32"  }  } */
- /* { dg-final { scan-assembler "vst41.32"  }  } */
- /* { dg-final { scan-assembler "vst42.32"  }  } */
- /* { dg-final { scan-assembler "vst43.32"  }  } */
  
  void
! foo1 (float32_t * addr, float32x4x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.32"  }  } */
! /* { dg-final { scan-assembler "vst41.32"  }  } */
! /* { dg-final { scan-assembler "vst42.32"  }  } */
! /* { dg-final { scan-assembler "vst43.32"  }  } */
! 
! void
! foo2 (float32_t * addr, float32x4x4_t value)
! {
!   vst4q_f32 (addr, value);
!   addr += 16;
!   vst4q_f32 (addr, value);
  }
  
! /* { dg-final { scan-assembler {vst43.32\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (float32_t *addr, float32x4x4_t value)
  {
!   return vst4q_f32 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (float32_t *addr, float32x4x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * addr, int16x8x4_t value)
  {
!   vst4q_s16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.16"  }  } */
- /* { dg-final { scan-assembler "vst41.16"  }  } */
- /* { dg-final { scan-assembler "vst42.16"  }  } */
- /* { dg-final { scan-assembler "vst43.16"  }  } */
  
  void
! foo1 (int16_t * addr, int16x8x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.16"  }  } */
! /* { dg-final { scan-assembler "vst41.16"  }  } */
! /* { dg-final { scan-assembler "vst42.16"  }  } */
! /* { dg-final { scan-assembler "vst43.16"  }  } */
! 
! void
! foo2 (int16_t * addr, int16x8x4_t value)
! {
!   vst4q_s16 (addr, value);
!   addr += 32;
!   vst4q_s16 (addr, value);
  }
  
! /* { dg-final { scan-assembler {vst43.16\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (int16_t *addr, int16x8x4_t value)
  {
!   return vst4q_s16 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (int16_t *addr, int16x8x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * addr, int32x4x4_t value)
  {
!   vst4q_s32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.32"  }  } */
- /* { dg-final { scan-assembler "vst41.32"  }  } */
- /* { dg-final { scan-assembler "vst42.32"  }  } */
- /* { dg-final { scan-assembler "vst43.32"  }  } */
  
  void
! foo1 (int32_t * addr, int32x4x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.32"  }  } */
! /* { dg-final { scan-assembler "vst41.32"  }  } */
! /* { dg-final { scan-assembler "vst42.32"  }  } */
! /* { dg-final { scan-assembler "vst43.32"  }  } */
! 
! void
! foo2 (int32_t * addr, int32x4x4_t value)
! {
!   vst4q_s32 (addr, value);
!   addr += 16;
!   vst4q_s32 (addr, value); 
  }
  
! /* { dg-final { scan-assembler {vst43.32\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (int32_t *addr, int32x4x4_t value)
  {
!   return vst4q_s32 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (int32_t *addr, int32x4x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int8x16x4_t value)
  {
!   vst4q_s8 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.8"  }  } */
- /* { dg-final { scan-assembler "vst41.8"  }  } */
- /* { dg-final { scan-assembler "vst42.8"  }  } */
- /* { dg-final { scan-assembler "vst43.8"  }  } */
  
  void
! foo1 (int8_t * addr, int8x16x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.8"  }  } */
! /* { dg-final { scan-assembler "vst41.8"  }  } */
! /* { dg-final { scan-assembler "vst42.8"  }  } */
! /* { dg-final { scan-assembler "vst43.8"  }  } */
! 
! void
! foo2 (int8_t * addr, int8x16x4_t value)
! {
!   vst4q_s8 (addr, value);
!   addr += 16*4;
!   vst4q_s8 (addr, value);
  }
  
! /* { dg-final { scan-assembler {vst43.8\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (int8_t *addr, int8x16x4_t value)
  {
!   return vst4q_s8 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (int8_t *addr, int8x16x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * addr, uint16x8x4_t value)
  {
!   vst4q_u16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.16"  }  } */
- /* { dg-final { scan-assembler "vst41.16"  }  } */
- /* { dg-final { scan-assembler "vst42.16"  }  } */
- /* { dg-final { scan-assembler "vst43.16"  }  } */
  
  void
! foo1 (uint16_t * addr, uint16x8x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.16"  }  } */
! /* { dg-final { scan-assembler "vst41.16"  }  } */
! /* { dg-final { scan-assembler "vst42.16"  }  } */
! /* { dg-final { scan-assembler "vst43.16"  }  } */
! 
! void
! foo2 (uint16_t * addr, uint16x8x4_t value)
! {
!   vst4q_u16 (addr, value);
!   addr += 32;
!   vst4q_u16 (addr, value);
  }
  
! /* { dg-final { scan-assembler {vst43.16\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (uint16_t *addr, uint16x8x4_t value)
  {
!   return vst4q_u16 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.16	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (uint16_t *addr, uint16x8x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * addr, uint32x4x4_t value)
  {
!   vst4q_u32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.32"  }  } */
- /* { dg-final { scan-assembler "vst41.32"  }  } */
- /* { dg-final { scan-assembler "vst42.32"  }  } */
- /* { dg-final { scan-assembler "vst43.32"  }  } */
  
  void
! foo1 (uint32_t * addr, uint32x4x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.32"  }  } */
! /* { dg-final { scan-assembler "vst41.32"  }  } */
! /* { dg-final { scan-assembler "vst42.32"  }  } */
! /* { dg-final { scan-assembler "vst43.32"  }  } */
! 
! void
! foo2 (uint32_t * addr, uint32x4x4_t value)
! {
!   vst4q_u32 (addr, value);
!   addr += 16;
!   vst4q_u32 (addr, value); 
  }
  
! /* { dg-final { scan-assembler {vst43.32\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (uint32_t *addr, uint32x4x4_t value)
  {
!   return vst4q_u32 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.32	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (uint32_t *addr, uint32x4x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,37 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint8x16x4_t value)
  {
!   vst4q_u8 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vst40.8"  }  } */
- /* { dg-final { scan-assembler "vst41.8"  }  } */
- /* { dg-final { scan-assembler "vst42.8"  }  } */
- /* { dg-final { scan-assembler "vst43.8"  }  } */
  
  void
! foo1 (uint8_t * addr, uint8x16x4_t value)
  {
!   vst4q (addr, value);
  }
  
! /* { dg-final { scan-assembler "vst40.8"  }  } */
! /* { dg-final { scan-assembler "vst41.8"  }  } */
! /* { dg-final { scan-assembler "vst42.8"  }  } */
! /* { dg-final { scan-assembler "vst43.8"  }  } */
! 
! void
! foo2 (uint8_t * addr, uint8x16x4_t value)
! {
!   vst4q_u8 (addr, value);
!   addr += 16*4;
!   vst4q_u8 (addr, value);
  }
  
! /* { dg-final { scan-assembler {vst43.8\s\{.*\}, \[.*\]!}  }  } */
--- 1,47 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vst40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo (uint8_t *addr, uint8x16x4_t value)
  {
!   return vst4q_u8 (addr, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vst40.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst41.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst42.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	vst43.8	{q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+ **	...
+ */
  void
! foo1 (uint8_t *addr, uint8x16x4_t value)
  {
!   return vst4q (addr, value);
  }
  
! #ifdef __cplusplus
  }
+ #endif
  
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int16x8_t value, mve_pred16_t p)
  {
!   vstrbq_p_s16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.16"  }  } */
  
  void
! foo1 (int8_t * addr, int16x8_t value, mve_pred16_t p)
  {
!   vstrbq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_p_s16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrbq_p_s32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.32"  }  } */
  
  void
! foo1 (int8_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrbq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_p_s32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int8x16_t value, mve_pred16_t p)
  {
!   vstrbq_p_s8 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.8"  }  } */
  
  void
! foo1 (int8_t * addr, int8x16_t value, mve_pred16_t p)
  {
!   vstrbq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_p_s8 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint16x8_t value, mve_pred16_t p)
  {
!   vstrbq_p_u16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.16"  }  } */
  
  void
! foo1 (uint8_t * addr, uint16x8_t value, mve_pred16_t p)
  {
!   vstrbq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_p_u16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrbq_p_u32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.32"  }  } */
  
  void
! foo1 (uint8_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrbq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_p_u32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint8x16_t value, mve_pred16_t p)
  {
!   vstrbq_p_u8 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.8"  }  } */
  
  void
! foo1 (uint8_t * addr, uint8x16_t value, mve_pred16_t p)
  {
!   vstrbq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_p_u8 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int16x8_t value)
  {
!   vstrbq_s16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.16"  }  } */
  
  void
! foo1 (int8_t * addr, int16x8_t value)
  {
!   vstrbq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int16x8_t value)
  {
!   return vstrbq_s16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int16x8_t value)
  {
!   return vstrbq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int32x4_t value)
  {
!   vstrbq_s32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.32"  }  } */
  
  void
! foo1 (int8_t * addr, int32x4_t value)
  {
!   vstrbq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int32x4_t value)
  {
!   return vstrbq_s32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int32x4_t value)
  {
!   return vstrbq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * addr, int8x16_t value)
  {
!   vstrbq_s8 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.8"  }  } */
  
  void
! foo1 (int8_t * addr, int8x16_t value)
  {
!   vstrbq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, int8x16_t value)
  {
!   return vstrbq_s8 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, int8x16_t value)
  {
!   return vstrbq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p_s16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.16"  }  } */
  
  void
! foo1 (int8_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p_s16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p_s32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.32"  }  } */
  
  void
! foo1 (int8_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p_s32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * base, uint8x16_t offset, int8x16_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p_s8 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.8"  }  } */
  
  void
! foo1 (int8_t * base, uint8x16_t offset, int8x16_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, uint8x16_t offset, int8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p_s8 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, uint8x16_t offset, int8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p_u16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.16"  }  } */
  
  void
! foo1 (uint8_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p_u16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p_u32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.32"  }  } */
  
  void
! foo1 (uint8_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p_u32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p_u8 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrbt.8"  }  } */
  
  void
! foo1 (uint8_t * base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p)
  {
!   vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrbt.8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p_u8 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p)
  {
!   return vstrbq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * base, uint16x8_t offset, int16x8_t value)
  {
!   vstrbq_scatter_offset_s16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.16"  }  } */
  
  void
! foo1 (int8_t * base, uint16x8_t offset, int16x8_t value)
  {
!   vstrbq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, uint16x8_t offset, int16x8_t value)
  {
!   return vstrbq_scatter_offset_s16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, uint16x8_t offset, int16x8_t value)
  {
!   return vstrbq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrbq_scatter_offset_s32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.32"  }  } */
  
  void
! foo1 (int8_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrbq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrbq_scatter_offset_s32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrbq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int8_t * base, uint8x16_t offset, int8x16_t value)
  {
!   vstrbq_scatter_offset_s8 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.8"  }  } */
  
  void
! foo1 (int8_t * base, uint8x16_t offset, int8x16_t value)
  {
!   vstrbq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int8_t *base, uint8x16_t offset, int8x16_t value)
  {
!   return vstrbq_scatter_offset_s8 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int8_t *base, uint8x16_t offset, int8x16_t value)
  {
!   return vstrbq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * base, uint16x8_t offset, uint16x8_t value)
  {
!   vstrbq_scatter_offset_u16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.16"  }  } */
  
  void
! foo1 (uint8_t * base, uint16x8_t offset, uint16x8_t value)
  {
!   vstrbq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint16x8_t offset, uint16x8_t value)
  {
!   return vstrbq_scatter_offset_u16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint16x8_t offset, uint16x8_t value)
  {
!   return vstrbq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrbq_scatter_offset_u32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.32"  }  } */
  
  void
! foo1 (uint8_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrbq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrbq_scatter_offset_u32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrbq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * base, uint8x16_t offset, uint8x16_t value)
  {
!   vstrbq_scatter_offset_u8 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.8"  }  } */
  
  void
! foo1 (uint8_t * base, uint8x16_t offset, uint8x16_t value)
  {
!   vstrbq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint8x16_t offset, uint8x16_t value)
  {
!   return vstrbq_scatter_offset_u8 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint8x16_t offset, uint8x16_t value)
  {
!   return vstrbq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint16x8_t value)
  {
!   vstrbq_u16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.16"  }  } */
  
  void
! foo1 (uint8_t * addr, uint16x8_t value)
  {
!   vstrbq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint16x8_t value)
  {
!   return vstrbq_u16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint16x8_t value)
  {
!   return vstrbq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint32x4_t value)
  {
!   vstrbq_u32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.32"  }  } */
  
  void
! foo1 (uint8_t * addr, uint32x4_t value)
  {
!   vstrbq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint32x4_t value)
  {
!   return vstrbq_u32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint32x4_t value)
  {
!   return vstrbq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint8_t * addr, uint8x16_t value)
  {
!   vstrbq_u8 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrb.8"  }  } */
  
  void
! foo1 (uint8_t * addr, uint8x16_t value)
  {
!   vstrbq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrb.8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint8_t *base, uint8x16_t value)
  {
!   return vstrbq_u8 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrb.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint8_t *base, uint8x16_t value)
  {
!   return vstrbq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t addr, const int offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_p_s64 (addr, 8, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrdt.u64"  }  } */
  
  void
! foo1 (uint64x2_t addr, const int offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrdt.u64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t addr, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_p_s64 (addr, 0, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t addr, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t addr, const int offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_p_u64 (addr, 8, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrdt.u64"  }  } */
  
  void
! foo1 (uint64x2_t addr, const int offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrdt.u64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t addr, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_p_u64 (addr, 0, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t addr, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t addr, const int offset, int64x2_t value)
  {
!   vstrdq_scatter_base_s64 (addr, 1016, value);
  }
  
- /* { dg-final { scan-assembler "vstrd.u64"  }  } */
  
  void
! foo1 (uint64x2_t addr, const int offset, int64x2_t value)
  {
!   vstrdq_scatter_base (addr, 1016, value);
  }
  
! /* { dg-final { scan-assembler "vstrd.u64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t addr, int64x2_t value)
  {
!   return vstrdq_scatter_base_s64 (addr, 0, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t addr, int64x2_t value)
  {
!   return vstrdq_scatter_base (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t addr, const int offset, uint64x2_t value)
  {
!   vstrdq_scatter_base_u64 (addr, 8, value);
  }
  
- /* { dg-final { scan-assembler "vstrd.u64"  }  } */
  
  void
! foo1 (uint64x2_t addr, const int offset, uint64x2_t value)
  {
!   vstrdq_scatter_base (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler "vstrd.u64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t addr, uint64x2_t value)
  {
!   return vstrdq_scatter_base_u64 (addr, 0, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t addr, uint64x2_t value)
  {
!   return vstrdq_scatter_base (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t * addr, const int offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_wb_p_s64 (addr, 8, value, p);
  }
  
  void
! foo1 (uint64x2_t * addr, const int offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_wb_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler-times "vstrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t *addr, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_wb_p_s64 (addr, 0, value, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t *addr, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_wb_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t * addr, const int offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_wb_p_u64 (addr, 8, value, p);
  }
  
  void
! foo1 (uint64x2_t * addr, const int offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_base_wb_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler-times "vstrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t *addr, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_wb_p_u64 (addr, 0, value, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t *addr, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_base_wb_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t * addr, const int offset, int64x2_t value)
  {
!   vstrdq_scatter_base_wb_s64 (addr, 8, value);
  }
  
  void
! foo1 (uint64x2_t * addr, const int offset, int64x2_t value)
  {
!   vstrdq_scatter_base_wb (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler-times "vstrd.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t *addr, int64x2_t value)
  {
!   return vstrdq_scatter_base_wb_s64 (addr, 0, value);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t *addr, int64x2_t value)
  {
!   return vstrdq_scatter_base_wb (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64x2_t * addr, const int offset, uint64x2_t value)
  {
!   vstrdq_scatter_base_wb_u64 (addr, 8, value);
  }
  
  void
! foo1 (uint64x2_t * addr, const int offset, uint64x2_t value)
  {
!   vstrdq_scatter_base_wb (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler-times "vstrd.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint64x2_t *addr, uint64x2_t value)
  {
!   return vstrdq_scatter_base_wb_u64 (addr, 0, value);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vstrd.u64	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64x2_t *addr, uint64x2_t value)
  {
!   return vstrdq_scatter_base_wb (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_offset_p_s64 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrdt.64"  }  } */
  
  void
! foo1 (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrdt.64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_offset_p_s64 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_offset_p_u64 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrdt.64"  }  } */
  
  void
! foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrdt.64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_offset_p_u64 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int64_t * base, uint64x2_t offset, int64x2_t value)
  {
!   vstrdq_scatter_offset_s64 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrd.64"  }  } */
  
  void
! foo1 (int64_t * base, uint64x2_t offset, int64x2_t value)
  {
!   vstrdq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrd.64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int64_t *base, uint64x2_t offset, int64x2_t value)
  {
!   return vstrdq_scatter_offset_s64 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int64_t *base, uint64x2_t offset, int64x2_t value)
  {
!   return vstrdq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64_t * base, uint64x2_t offset, uint64x2_t value)
  {
!   vstrdq_scatter_offset_u64 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrd.64"  }  } */
  
  void
! foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value)
  {
!   vstrdq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrd.64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64_t *base, uint64x2_t offset, uint64x2_t value)
  {
!   return vstrdq_scatter_offset_u64 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value)
  {
!   return vstrdq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_shifted_offset_p_s64 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrdt.64"  }  } */
  
  void
! foo1 (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrdt.64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_shifted_offset_p_s64 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_shifted_offset_p_u64 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrdt.64"  }  } */
  
  void
! foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   vstrdq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrdt.64"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_shifted_offset_p_u64 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrdt.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
  {
!   return vstrdq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int64_t * base, uint64x2_t offset, int64x2_t value)
  {
!   vstrdq_scatter_shifted_offset_s64 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrd.64"  }  } */
  
  void
! foo1 (int64_t * base, uint64x2_t offset, int64x2_t value)
  {
!   vstrdq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrd.64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo (int64_t *base, uint64x2_t offset, int64x2_t value)
  {
!   return vstrdq_scatter_shifted_offset_s64 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int64_t *base, uint64x2_t offset, int64x2_t value)
  {
!   return vstrdq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint64_t * base, uint64x2_t offset, uint64x2_t value)
  {
!   vstrdq_scatter_shifted_offset_u64 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrd.64"  }  } */
  
  void
! foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value)
  {
!   vstrdq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrd.64"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint64_t *base, uint64x2_t offset, uint64x2_t value)
  {
!   return vstrdq_scatter_shifted_offset_u64 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrd.64	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value)
  {
!   return vstrdq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * addr, float16x8_t value)
  {
!   vstrhq_f16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (float16_t * addr, float16x8_t value)
  {
!   vstrhq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, float16x8_t value)
  {
!   return vstrhq_f16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, float16x8_t value)
  {
!   return vstrhq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * addr, float16x8_t value, mve_pred16_t p)
  {
!   vstrhq_p_f16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (float16_t * addr, float16x8_t value, mve_pred16_t p)
  {
!   vstrhq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, float16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_p_f16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, float16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * addr, int16x8_t value, mve_pred16_t p)
  {
!   vstrhq_p_s16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (int16_t * addr, int16x8_t value, mve_pred16_t p)
  {
!   vstrhq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, int16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_p_s16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, int16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrhq_p_s32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.32"  }  } */
  
  void
! foo1 (int16_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrhq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_p_s32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * addr, uint16x8_t value, mve_pred16_t p)
  {
!   vstrhq_p_u16 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (uint16_t * addr, uint16x8_t value, mve_pred16_t p)
  {
!   vstrhq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_p_u16 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrhq_p_u32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.32"  }  } */
  
  void
! foo1 (uint16_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrhq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_p_u32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * addr, int16x8_t value)
  {
!   vstrhq_s16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (int16_t * addr, int16x8_t value)
  {
!   vstrhq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, int16x8_t value)
  {
!   return vstrhq_s16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, int16x8_t value)
  {
!   return vstrhq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * addr, int32x4_t value)
  {
!   vstrhq_s32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.32"  }  } */
  
  void
! foo1 (int16_t * addr, int32x4_t value)
  {
!   vstrhq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, int32x4_t value)
  {
!   return vstrhq_s32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, int32x4_t value)
  {
!   return vstrhq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * base, uint16x8_t offset, float16x8_t value)
  {
!   vstrhq_scatter_offset_f16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (float16_t * base, uint16x8_t offset, float16x8_t value)
  {
!   vstrhq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, uint16x8_t offset, float16x8_t value)
  {
!   return vstrhq_scatter_offset_f16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, uint16x8_t offset, float16x8_t value)
  {
!   return vstrhq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p_f16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p_f16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p_s16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p_s16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p_s32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.32"  }  } */
  
  void
! foo1 (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p_s32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p_u16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p_u16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p_u32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.32"  }  } */
  
  void
! foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p_u32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint16x8_t offset, int16x8_t value)
  {
!   vstrhq_scatter_offset_s16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (int16_t * base, uint16x8_t offset, int16x8_t value)
  {
!   vstrhq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint16x8_t offset, int16x8_t value)
  {
!   return vstrhq_scatter_offset_s16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint16x8_t offset, int16x8_t value)
  {
!   return vstrhq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrhq_scatter_offset_s32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.32"  }  } */
  
  void
! foo1 (int16_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrhq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrhq_scatter_offset_s32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrhq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint16x8_t offset, uint16x8_t value)
  {
!   vstrhq_scatter_offset_u16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value)
  {
!   vstrhq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t offset, uint16x8_t value)
  {
!   return vstrhq_scatter_offset_u16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value)
  {
!   return vstrhq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrhq_scatter_offset_u32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.32"  }  } */
  
  void
! foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrhq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrhq_scatter_offset_u32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrhq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * base, uint16x8_t offset, float16x8_t value)
  {
!   vstrhq_scatter_shifted_offset_f16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (float16_t * base, uint16x8_t offset, float16x8_t value)
  {
!   vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, uint16x8_t offset, float16x8_t value)
  {
!   return vstrhq_scatter_shifted_offset_f16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, uint16x8_t offset, float16x8_t value)
  {
!   return vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p_f16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p_f16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p_s16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p_s16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p_s32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.32"  }  } */
  
  void
! foo1 (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p_s32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p_u16 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.16"  }  } */
  
  void
! foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p_u16 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p_u32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrht.32"  }  } */
  
  void
! foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrht.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p_u32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrhq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint16x8_t offset, int16x8_t value)
  {
!   vstrhq_scatter_shifted_offset_s16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (int16_t * base, uint16x8_t offset, int16x8_t value)
  {
!   vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint16x8_t offset, int16x8_t value)
  {
!   return vstrhq_scatter_shifted_offset_s16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint16x8_t offset, int16x8_t value)
  {
!   return vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int16_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrhq_scatter_shifted_offset_s32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.32"  }  } */
  
  void
! foo1 (int16_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (int16_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrhq_scatter_shifted_offset_s32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int16_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint16x8_t offset, uint16x8_t value)
  {
!   vstrhq_scatter_shifted_offset_u16 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value)
  {
!   vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t offset, uint16x8_t value)
  {
!   return vstrhq_scatter_shifted_offset_u16 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value)
  {
!   return vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrhq_scatter_shifted_offset_u32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.32"  }  } */
  
  void
! foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrhq_scatter_shifted_offset_u32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrhq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * addr, uint16x8_t value)
  {
!   vstrhq_u16 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.16"  }  } */
  
  void
! foo1 (uint16_t * addr, uint16x8_t value)
  {
!   vstrhq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint16x8_t value)
  {
!   return vstrhq_u16 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint16x8_t value)
  {
!   return vstrhq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint16_t * addr, uint32x4_t value)
  {
!   vstrhq_u32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrh.32"  }  } */
  
  void
! foo1 (uint16_t * addr, uint32x4_t value)
  {
!   vstrhq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrh.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint16_t *base, uint32x4_t value)
  {
!   return vstrhq_u32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrh.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint16_t *base, uint32x4_t value)
  {
!   return vstrhq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * addr, float32x4_t value)
  {
!   vstrwq_f32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (float32_t * addr, float32x4_t value)
  {
!   vstrwq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, float32x4_t value)
  {
!   return vstrwq_f32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, float32x4_t value)
  {
!   return vstrwq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * addr, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_p_f32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (float32_t * addr, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_p_f32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_p_s32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (int32_t * addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_p_s32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_p_u32 (addr, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (uint32_t * addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_p (addr, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_p_u32 (base, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_p (base, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * addr, int32x4_t value)
  {
!   vstrwq_s32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (int32_t * addr, int32x4_t value)
  {
!   vstrwq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, int32x4_t value)
  {
!   return vstrwq_s32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, int32x4_t value)
  {
!   return vstrwq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
  foo (uint32x4_t addr, float32x4_t value)
  {
!   vstrwq_scatter_base_f32 (addr, 8, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.u32"  }  } */
  
  void
  foo1 (uint32x4_t addr, float32x4_t value)
  {
!   vstrwq_scatter_base (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo (uint32x4_t addr, float32x4_t value)
  {
!   return vstrwq_scatter_base_f32 (addr, 0, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo1 (uint32x4_t addr, float32x4_t value)
  {
!   return vstrwq_scatter_base (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
  foo (uint32x4_t addr, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_p_f32 (addr, 8, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.u32"  }  } */
  
  void
  foo1 (uint32x4_t addr, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo (uint32x4_t addr, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_p_f32 (addr, 0, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo1 (uint32x4_t addr, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
  foo (uint32x4_t addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_p_s32 (addr, 8, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.u32"  }  } */
  
  void
  foo1 (uint32x4_t addr, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo (uint32x4_t addr, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_p_s32 (addr, 0, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo1 (uint32x4_t addr, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
  foo (uint32x4_t addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_p_u32 (addr, 8, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.u32"  }  } */
  
  void
  foo1 (uint32x4_t addr, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.u32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo (uint32x4_t addr, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_p_u32 (addr, 0, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo1 (uint32x4_t addr, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
  foo (uint32x4_t addr, int32x4_t value)
  {
!   vstrwq_scatter_base_s32 (addr, 8, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.u32"  }  } */
  
  void
  foo1 (uint32x4_t addr, int32x4_t value)
  {
!   vstrwq_scatter_base (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo (uint32x4_t addr, int32x4_t value)
  {
!   return vstrwq_scatter_base_s32 (addr, 0, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo1 (uint32x4_t addr, int32x4_t value)
  {
!   return vstrwq_scatter_base (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
  foo (uint32x4_t addr, uint32x4_t value)
  {
!   vstrwq_scatter_base_u32 (addr, 8, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.u32"  }  } */
  
  void
  foo1 (uint32x4_t addr, uint32x4_t value)
  {
!   vstrwq_scatter_base (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.u32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo (uint32x4_t addr, uint32x4_t value)
  {
!   return vstrwq_scatter_base_u32 (addr, 0, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
  foo1 (uint32x4_t addr, uint32x4_t value)
  {
!   return vstrwq_scatter_base (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32x4_t * addr, const int offset, float32x4_t value)
  {
!   vstrwq_scatter_base_wb_f32 (addr, 8, value);
  }
  
  void
! foo1 (uint32x4_t * addr, const int offset, float32x4_t value)
  {
!   vstrwq_scatter_base_wb (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler-times "vstrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint32x4_t *addr, float32x4_t value)
  {
!   return vstrwq_scatter_base_wb_f32 (addr, 0, value);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32x4_t *addr, float32x4_t value)
  {
!   return vstrwq_scatter_base_wb (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32x4_t * addr, const int offset, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_wb_p_f32 (addr, 8, value, p);
  }
  
  void
! foo1 (uint32x4_t * addr, const int offset, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_wb_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler-times "vstrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint32x4_t *addr, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_wb_p_f32 (addr, 0, value, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32x4_t *addr, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_wb_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32x4_t * addr, const int offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_wb_p_s32 (addr, 8, value, p);
  }
  
  void
! foo1 (uint32x4_t * addr, const int offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_wb_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler-times "vstrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint32x4_t *addr, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_wb_p_s32 (addr, 0, value, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32x4_t *addr, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_wb_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32x4_t * addr, const int offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_wb_p_u32 (addr, 8, value, p);
  }
  
  void
! foo1 (uint32x4_t * addr, const int offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_base_wb_p (addr, 8, value, p);
  }
  
! /* { dg-final { scan-assembler-times "vstrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint32x4_t *addr, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_wb_p_u32 (addr, 0, value, p);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32x4_t *addr, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_base_wb_p (addr, 0, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32x4_t * addr, const int offset, int32x4_t value)
  {
!   vstrwq_scatter_base_wb_s32 (addr, 8, value);
  }
  
  void
! foo1 (uint32x4_t * addr, const int offset, int32x4_t value)
  {
!   vstrwq_scatter_base_wb (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler-times "vstrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint32x4_t *addr, int32x4_t value)
  {
!   return vstrwq_scatter_base_wb_s32 (addr, 0, value);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32x4_t *addr, int32x4_t value)
  {
!   return vstrwq_scatter_base_wb (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,19 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32x4_t * addr, uint32x4_t value)
  {
!   vstrwq_scatter_base_wb_u32 (addr, 8, value);
  }
  
  void
! foo1 (uint32x4_t * addr, uint32x4_t value)
  {
!   vstrwq_scatter_base_wb (addr, 8, value);
  }
  
! /* { dg-final { scan-assembler-times "vstrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo (uint32x4_t *addr, uint32x4_t value)
  {
!   return vstrwq_scatter_base_wb_u32 (addr, 0, value);
  }
  
+ 
+ /*
+ **foo1:
+ **	...
+ **	vstrw.u32	q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32x4_t *addr, uint32x4_t value)
  {
!   return vstrwq_scatter_base_wb (addr, 0, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * base, uint32x4_t offset, float32x4_t value)
  {
!   vstrwq_scatter_offset_f32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (float32_t * base, uint32x4_t offset, float32x4_t value)
  {
!   vstrwq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, uint32x4_t offset, float32x4_t value)
  {
!   return vstrwq_scatter_offset_f32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, uint32x4_t offset, float32x4_t value)
  {
!   return vstrwq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_offset_p_f32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_offset_p_f32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_offset_p_s32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_offset_p_s32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_offset_p_u32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_offset_p_u32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrwq_scatter_offset_s32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (int32_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrwq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrwq_scatter_offset_s32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrwq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrwq_scatter_offset_u32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrwq_scatter_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrwq_scatter_offset_u32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrwq_scatter_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * base, uint32x4_t offset, float32x4_t value)
  {
!   vstrwq_scatter_shifted_offset_f32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (float32_t * base, uint32x4_t offset, float32x4_t value)
  {
!   vstrwq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, uint32x4_t offset, float32x4_t value)
  {
!   return vstrwq_scatter_shifted_offset_f32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, uint32x4_t offset, float32x4_t value)
  {
!   return vstrwq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_shifted_offset_p_f32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_shifted_offset_p_f32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_shifted_offset_p_s32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_shifted_offset_p_s32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_shifted_offset_p_u32 (base, offset, value, p);
  }
  
- /* { dg-final { scan-assembler "vstrwt.32"  }  } */
  
  void
! foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   vstrwq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! /* { dg-final { scan-assembler "vstrwt.32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_shifted_offset_p_u32 (base, offset, value, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
  {
!   return vstrwq_scatter_shifted_offset_p (base, offset, value, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (int32_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrwq_scatter_shifted_offset_s32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (int32_t * base, uint32x4_t offset, int32x4_t value)
  {
!   vstrwq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo (int32_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrwq_scatter_shifted_offset_s32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (int32_t *base, uint32x4_t offset, int32x4_t value)
  {
!   return vstrwq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrwq_scatter_shifted_offset_u32 (base, offset, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value)
  {
!   vstrwq_scatter_shifted_offset (base, offset, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrwq_scatter_shifted_offset_u32 (base, offset, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value)
  {
!   return vstrwq_scatter_shifted_offset (base, offset, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  void
! foo (uint32_t * addr, uint32x4_t value)
  {
!   vstrwq_u32 (addr, value);
  }
  
- /* { dg-final { scan-assembler "vstrw.32"  }  } */
  
  void
! foo1 (uint32_t * addr, uint32x4_t value)
  {
!   vstrwq (addr, value);
  }
  
! /* { dg-final { scan-assembler "vstrw.32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo (uint32_t *base, uint32x4_t value)
  {
!   return vstrwq_u32 (base, value);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vstrw.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?:	@.*|)
+ **	...
+ */
  void
! foo1 (uint32_t *base, uint32x4_t value)
  {
!   return vstrwq (base, value);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vsubq_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.f16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vsubq_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vsubq_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.f32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vsubq_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vsubq_m_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.f16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vsubq_m_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vsubq_m_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.f32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vsubq_m_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
- {
-   return vsubq_m (inactive, a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vsubq_m_n_f16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.f16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vsubq_m_n_f16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vsubt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
! {
!   return vsubq_m (inactive, a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
- {
-   return vsubq_m (inactive, a, 23.23, p);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vsubq_m_n_f32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.f32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vsubq_m_n_f32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vsubt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
! {
!   return vsubq_m (inactive, a, 1.1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vsubq_m_n_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.i16"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vsubq_m_n_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vsubq_m_n_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.i32"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vsubq_m_n_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vsubq_m_n_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.i8"  }  } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vsubq_m_n_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vsubq_m_n_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.i16"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vsubq_m_n_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
! {
!   return vsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vsubq_m_n_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.i32"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vsubq_m_n_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
! {
!   return vsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,23 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vsubq_m_n_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
! /* { dg-final { scan-assembler "vsubt.i8"  }  } */
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vsubq_m_n_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /*
! **foo2:
! **	...
! **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! **	vpst(?:	@.*|)
! **	...
! **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
! {
!   return vsubq_m (inactive, a, 1, p);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vsubq_m_s16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vsubq_m_s16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vsubq_m_s32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vsubq_m_s32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vsubq_m_s8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vsubq_m_s8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vsubq_m_u16 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vsubq_m_u16 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vsubq_m_u32 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vsubq_m_u32 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vsubq_m_u8 (inactive, a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! /* { dg-final { scan-assembler "vpst" } } */
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vsubq_m_u8 (inactive, a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vsubq_m (inactive, a, b, p);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo1 (float16x8_t a, float16_t b)
- {
-   return vsubq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16_t b)
  {
    return vsubq_n_f16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.f16"  }  } */
  
  float16x8_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.f16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16_t b)
  {
    return vsubq_n_f16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo1 (float16x8_t a, float16_t b)
  {
    return vsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vsub.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float16x8_t
! foo2 (float16x8_t a)
! {
!   return vsubq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo1 (float32x4_t a, float32_t b)
- {
-   return vsubq (a, 23.23);
- }
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32_t b)
  {
    return vsubq_n_f32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.f32"  }  } */
  
  float32x4_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.f32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32_t b)
  {
    return vsubq_n_f32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo1 (float32x4_t a, float32_t b)
  {
    return vsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vsub.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! float32x4_t
! foo2 (float32x4_t a)
! {
!   return vsubq (a, 1.1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vsubq_n_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b)
  {
    return vsubq_n_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vsubq_n_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b)
  {
    return vsubq_n_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vsubq_n_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b)
  {
    return vsubq_n_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vsubq_n_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i16"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b)
  {
    return vsubq_n_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16_t b)
  {
    return vsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vsub.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint16x8_t
! foo2 (uint16x8_t a)
! {
!   return vsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vsubq_n_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i32"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b)
  {
    return vsubq_n_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32_t b)
  {
    return vsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vsub.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint32x4_t
! foo2 (uint32x4_t a)
! {
!   return vsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,22 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vsubq_n_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i8"  }  } */
--- 1,53 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
! /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b)
  {
    return vsubq_n_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8_t b)
  {
    return vsubq (a, b);
  }
  
! /*
! **foo2:
! **	...
! **	vsub.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
! **	...
! */
! uint8x16_t
! foo2 (uint8x16_t a)
! {
!   return vsubq (a, 1);
! }
! 
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vsubq_s16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i16"  }  } */
  
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vsubq_s16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vsubq_s32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i32"  }  } */
  
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vsubq_s32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vsubq_s8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i8"  }  } */
  
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vsubq_s8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vsubq_u16 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i16"  }  } */
  
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i16"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vsubq_u16 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vsubq_u32 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i32"  }  } */
  
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i32"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vsubq_u32 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,21 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vsubq_u8 (a, b);
  }
  
- /* { dg-final { scan-assembler "vsub.i8"  }  } */
  
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vsubq (a, b);
  }
  
! /* { dg-final { scan-assembler "vsub.i8"  }  } */
--- 1,41 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vsubq_u8 (a, b);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vsub.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vsubq (a, b);
  }
  
! #ifdef __cplusplus
! }
! #endif
! 
! /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
!     return vsubq_x_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
!   return vsubq_x_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
!     return vsubq_x_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
!   return vsubq_x_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float16x8_t
- foo (float16x8_t a, float16_t b, mve_pred16_t p)
- {
-     return vsubq_x_n_f16 (a, 23.23, p);
- }
- 
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float16x8_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_f16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f16"  }  } */
  
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float16x8_t
  foo (float16x8_t a, float16_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_f16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float16x8_t
+ foo2 (float16x8_t a, mve_pred16_t p)
+ {
+   return vsubq_x (a, 1.1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
- /* { dg-add-options arm_v8_1m_mve_fp } */
- /* { dg-additional-options "-O2" } */
- 
- #include "arm_mve.h"
- float32x4_t
- foo (float32x4_t a, float32_t b, mve_pred16_t p)
- {
-     return vsubq_x_n_f32 (a, 23.23, p);
- }
- 
- 
- /* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- 0 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  float32x4_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_f32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.f32"  }  } */
  
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  float32x4_t
  foo (float32x4_t a, float32_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_f32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.f32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ float32x4_t
+ foo2 (float32x4_t a, mve_pred16_t p)
+ {
+   return vsubq_x (a, 1.1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ int8x16_t
+ foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo2 (uint16x8_t a, mve_pred16_t p)
+ {
+   return vsubq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo2 (uint32x4_t a, mve_pred16_t p)
+ {
+   return vsubq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
!     return vsubq_x_n_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
--- 1,65 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
  {
!   return vsubq_x_n_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ /*
+ **foo2:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo2 (uint8x16_t a, mve_pred16_t p)
+ {
+   return vsubq_x (a, 1, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!     return vsubq_x_s16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
!   return vsubq_x_s16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ int16x8_t
+ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!     return vsubq_x_s32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
!   return vsubq_x_s32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ int32x4_t
+ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!     return vsubq_x_s8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
!   return vsubq_x_s8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ int8x16_t
+ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!     return vsubq_x_u16 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i16"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
!   return vsubq_x_u16 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint16x8_t
+ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!     return vsubq_x_u32 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i32"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
!   return vsubq_x_u32 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint32x4_t
+ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c	Thu Jun 20 08:08:08 2024
***************
*** 1,15 ****
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
  
  #include "arm_mve.h"
  
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!     return vsubq_x_u8 (a, b, p);
  }
  
- /* { dg-final { scan-assembler "vpst" } } */
- /* { dg-final { scan-assembler "vsubt.i8"  }  } */
  
--- 1,49 ----
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
!   return vsubq_x_u8 (a, b, p);
  }
  
  
+ /*
+ **foo1:
+ **	...
+ **	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+ **	...
+ **	vpst(?:	@.*|)
+ **	...
+ **	vsubt.i8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
+ **	...
+ */
+ uint8x16_t
+ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
+ {
+   return vsubq_x (a, b, p);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_const_shifts.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_const_shifts.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_const_shifts.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_const_shifts.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,41 ----
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
+ #include "arm_mve.h"
+ 
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo11:
+ **     ...
+ **     movs	r0, #2
+ **     ...
+ */
+ uint32_t
+ foo11 ()
+ {
+   return uqshl (1, 1);
+ }
+ 
+ /*
+ **foo12:
+ **     ...
+ **	movs	r0, #2
+ **	movs	r1, #0
+ **     ...
+ */
+ uint64_t
+ foo12 ()
+ {
+   return uqshll (1, 1);
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
+ 
+ /* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_load_memory_modes.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_load_memory_modes.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_load_memory_modes.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_load_memory_modes.c	Thu Jun 20 08:08:08 2024
***************
*** 7,13 ****
  /*
  **off_load8_0:
  **	...
! **	vldrb.8	q0, \[r0, #16\]
  **	...
  */
  int8x16_t off_load8_0 (int8_t * a)
--- 7,13 ----
  /*
  **off_load8_0:
  **	...
! **	vldrb.8	q[0-7], \[r0, #16\]
  **	...
  */
  int8x16_t off_load8_0 (int8_t * a)
*************** int8x16_t off_load8_0 (int8_t * a)
*** 18,24 ****
  /*
  **off_load8_1:
  **	...
! **	vldrb.u16	q0, \[r0, #1\]
  **	...
  */
  uint16x8_t off_load8_1 (uint8_t * a)
--- 18,24 ----
  /*
  **off_load8_1:
  **	...
! **	vldrb.u16	q[0-7], \[r0, #1\]
  **	...
  */
  uint16x8_t off_load8_1 (uint8_t * a)
*************** uint16x8_t off_load8_1 (uint8_t * a)
*** 29,35 ****
  /*
  **off_load8_2:
  **	...
! **	vldrb.s32	q0, \[r0, #127\]
  **	...
  */
  int32x4_t off_load8_2 (int8_t * a)
--- 29,35 ----
  /*
  **off_load8_2:
  **	...
! **	vldrb.s32	q[0-7], \[r0, #127\]
  **	...
  */
  int32x4_t off_load8_2 (int8_t * a)
*************** int32x4_t off_load8_2 (int8_t * a)
*** 40,46 ****
  /*
  **off_load8_3:
  **	...
! **	vldrb.8	q0, \[r0, #-127\]
  **	...
  */
  uint8x16_t off_load8_3 (uint8_t * a)
--- 40,46 ----
  /*
  **off_load8_3:
  **	...
! **	vldrb.8	q[0-7], \[r0, #-127\]
  **	...
  */
  uint8x16_t off_load8_3 (uint8_t * a)
*************** uint8x16_t off_load8_3 (uint8_t * a)
*** 51,57 ****
  /*
  **not_off_load8_0:
  **	...
! **	vldrb.8	q0, \[r[0-9]+\]
  **	...
  */
  int8x16_t not_off_load8_0 (int8_t * a)
--- 51,57 ----
  /*
  **not_off_load8_0:
  **	...
! **	vldrb.8	q[0-7], \[r[0-7]+\]
  **	...
  */
  int8x16_t not_off_load8_0 (int8_t * a)
*************** int8x16_t not_off_load8_0 (int8_t * a)
*** 62,68 ****
  /*
  **off_loadfp16_0:
  **	...
! **	vldrh.16	q0, \[r0, #-244\]
  **	...
  */
  float16x8_t off_loadfp16_0 (float16_t *a)
--- 62,68 ----
  /*
  **off_loadfp16_0:
  **	...
! **	vldrh.16	q[0-7], \[r0, #-244\]
  **	...
  */
  float16x8_t off_loadfp16_0 (float16_t *a)
*************** float16x8_t off_loadfp16_0 (float16_t *a
*** 73,79 ****
  /*
  **off_load16_0:
  **	...
! **	vldrh.16	q0, \[r0, #-2\]
  **	...
  */
  uint16x8_t off_load16_0 (uint16_t * a)
--- 73,79 ----
  /*
  **off_load16_0:
  **	...
! **	vldrh.16	q[0-7], \[r0, #-2\]
  **	...
  */
  uint16x8_t off_load16_0 (uint16_t * a)
*************** uint16x8_t off_load16_0 (uint16_t * a)
*** 84,90 ****
  /*
  **off_load16_1:
  **	...
! **	vldrh.u32	q0, \[r0, #254\]
  **	...
  */
  uint32x4_t off_load16_1 (uint16_t * a)
--- 84,90 ----
  /*
  **off_load16_1:
  **	...
! **	vldrh.u32	q[0-7], \[r0, #254\]
  **	...
  */
  uint32x4_t off_load16_1 (uint16_t * a)
*************** uint32x4_t off_load16_1 (uint16_t * a)
*** 95,101 ****
  /*
  **not_off_load16_0:
  **	...
! **	vldrh.16	q0, \[r[0-9]+\]
  **	...
  */
  int16x8_t not_off_load16_0 (int8_t * a)
--- 95,101 ----
  /*
  **not_off_load16_0:
  **	...
! **	vldrh.16	q[0-7], \[r[0-7]+\]
  **	...
  */
  int16x8_t not_off_load16_0 (int8_t * a)
*************** int16x8_t not_off_load16_0 (int8_t * a)
*** 106,112 ****
  /*
  **not_off_load16_1:
  **	...
! **	vldrh.u32	q0, \[r[0-9]+\]
  **	...
  */
  uint32x4_t not_off_load16_1 (uint16_t * a)
--- 106,112 ----
  /*
  **not_off_load16_1:
  **	...
! **	vldrh.u32	q[0-7], \[r[0-7]+\]
  **	...
  */
  uint32x4_t not_off_load16_1 (uint16_t * a)
*************** uint32x4_t not_off_load16_1 (uint16_t *
*** 117,123 ****
  /*
  **off_loadfp32_0:
  **	...
! **	vldrw.32	q0, \[r0, #24\]
  **	...
  */
  float32x4_t off_loadfp32_0 (float32_t *a)
--- 117,123 ----
  /*
  **off_loadfp32_0:
  **	...
! **	vldrw.32	q[0-7], \[r0, #24\]
  **	...
  */
  float32x4_t off_loadfp32_0 (float32_t *a)
*************** float32x4_t off_loadfp32_0 (float32_t *a
*** 128,134 ****
  /*
  **off_load32_0:
  **	...
! **	vldrw.32	q0, \[r0, #4\]
  **	...
  */
  uint32x4_t off_load32_0 (uint32_t * a)
--- 128,134 ----
  /*
  **off_load32_0:
  **	...
! **	vldrw.32	q[0-7], \[r0, #4\]
  **	...
  */
  uint32x4_t off_load32_0 (uint32_t * a)
*************** uint32x4_t off_load32_0 (uint32_t * a)
*** 139,145 ****
  /*
  **off_load32_1:
  **	...
! **	vldrw.32	q0, \[r0, #-508\]
  **	...
  */
  int32x4_t off_load32_1 (int32_t * a)
--- 139,145 ----
  /*
  **off_load32_1:
  **	...
! **	vldrw.32	q[0-7], \[r0, #-508\]
  **	...
  */
  int32x4_t off_load32_1 (int32_t * a)
*************** int32x4_t off_load32_1 (int32_t * a)
*** 149,155 ****
  /*
  **pre_load8_0:
  **	...
! **	vldrb.8	q[0-9]+, \[r0, #16\]!
  **	...
  */
  int8_t* pre_load8_0 (int8_t * a, int8x16_t *v)
--- 149,155 ----
  /*
  **pre_load8_0:
  **	...
! **	vldrb.8	q[0-7], \[r0, #16\]!
  **	...
  */
  int8_t* pre_load8_0 (int8_t * a, int8x16_t *v)
*************** int8_t* pre_load8_0 (int8_t * a, int8x16
*** 162,168 ****
  /*
  **pre_load8_1:
  **	...
! **	vldrb.u16	q[0-9]+, \[r0, #4\]!
  **	...
  */
  uint8_t* pre_load8_1 (uint8_t * a, uint16x8_t *v)
--- 162,168 ----
  /*
  **pre_load8_1:
  **	...
! **	vldrb.u16	q[0-7], \[r0, #4\]!
  **	...
  */
  uint8_t* pre_load8_1 (uint8_t * a, uint16x8_t *v)
*************** uint8_t* pre_load8_1 (uint8_t * a, uint1
*** 175,181 ****
  /*
  **pre_loadfp16_0:
  **	...
! **	vldrh.16	q[0-9]+, \[r0, #128\]!
  **	...
  */
  float16_t* pre_loadfp16_0 (float16_t *a, float16x8_t *v)
--- 175,181 ----
  /*
  **pre_loadfp16_0:
  **	...
! **	vldrh.16	q[0-7], \[r0, #128\]!
  **	...
  */
  float16_t* pre_loadfp16_0 (float16_t *a, float16x8_t *v)
*************** float16_t* pre_loadfp16_0 (float16_t *a,
*** 188,194 ****
  /*
  **pre_load16_0:
  **	...
! **	vldrh.16	q[0-9]+, \[r0, #-254\]!
  **	...
  */
  int16_t* pre_load16_0 (int16_t * a, int16x8_t *v)
--- 188,194 ----
  /*
  **pre_load16_0:
  **	...
! **	vldrh.16	q[0-7], \[r0, #-254\]!
  **	...
  */
  int16_t* pre_load16_0 (int16_t * a, int16x8_t *v)
*************** int16_t* pre_load16_0 (int16_t * a, int1
*** 201,207 ****
  /*
  **pre_load16_1:
  **	...
! **	vldrh.s32	q[0-9]+, \[r0, #52\]!
  **	...
  */
  int16_t* pre_load16_1 (int16_t * a, int32x4_t *v)
--- 201,207 ----
  /*
  **pre_load16_1:
  **	...
! **	vldrh.s32	q[0-7], \[r0, #52\]!
  **	...
  */
  int16_t* pre_load16_1 (int16_t * a, int32x4_t *v)
*************** int16_t* pre_load16_1 (int16_t * a, int3
*** 214,220 ****
  /*
  **pre_loadfp32_0:
  **	...
! **	vldrw.32	q[0-9]+, \[r0, #-72\]!
  **	...
  */
  float32_t* pre_loadfp32_0 (float32_t *a, float32x4_t *v)
--- 214,220 ----
  /*
  **pre_loadfp32_0:
  **	...
! **	vldrw.32	q[0-7], \[r0, #-72\]!
  **	...
  */
  float32_t* pre_loadfp32_0 (float32_t *a, float32x4_t *v)
*************** float32_t* pre_loadfp32_0 (float32_t *a,
*** 228,234 ****
  /*
  **pre_load32_0:
  **	...
! **	vldrw.32	q[0-9]+, \[r0, #-4\]!
  **	...
  */
  uint32_t* pre_load32_0 (uint32_t * a, uint32x4_t *v)
--- 228,234 ----
  /*
  **pre_load32_0:
  **	...
! **	vldrw.32	q[0-7], \[r0, #-4\]!
  **	...
  */
  uint32_t* pre_load32_0 (uint32_t * a, uint32x4_t *v)
*************** uint32_t* pre_load32_0 (uint32_t * a, ui
*** 242,248 ****
  /*
  **post_load8_0:
  **	...
! **	vldrb.8	q[0-9]+, \[r0\], #26
  **	...
  */
  uint8_t* post_load8_0 (uint8_t * a, uint8x16_t *v)
--- 242,248 ----
  /*
  **post_load8_0:
  **	...
! **	vldrb.8	q[0-7], \[r0\], #26
  **	...
  */
  uint8_t* post_load8_0 (uint8_t * a, uint8x16_t *v)
*************** uint8_t* post_load8_0 (uint8_t * a, uint
*** 255,261 ****
  /*
  **post_load8_1:
  **	...
! **	vldrb.s16	q[0-9]+, \[r0\], #-1
  **	...
  */
  int8_t* post_load8_1 (int8_t * a, int16x8_t *v)
--- 255,261 ----
  /*
  **post_load8_1:
  **	...
! **	vldrb.s16	q[0-7], \[r0\], #-1
  **	...
  */
  int8_t* post_load8_1 (int8_t * a, int16x8_t *v)
*************** int8_t* post_load8_1 (int8_t * a, int16x
*** 268,274 ****
  /*
  **post_load8_2:
  **	...
! **	vldrb.8	q[0-9]+, \[r0\], #26
  **	...
  */
  uint8_t* post_load8_2 (uint8_t * a, uint8x16_t *v)
--- 268,274 ----
  /*
  **post_load8_2:
  **	...
! **	vldrb.8	q[0-7], \[r0\], #26
  **	...
  */
  uint8_t* post_load8_2 (uint8_t * a, uint8x16_t *v)
*************** uint8_t* post_load8_2 (uint8_t * a, uint
*** 281,287 ****
  /*
  **post_load8_3:
  **	...
! **	vldrb.s16	q[0-9]+, \[r0\], #-1
  **	...
  */
  int8_t* post_load8_3 (int8_t * a, int16x8_t *v)
--- 281,287 ----
  /*
  **post_load8_3:
  **	...
! **	vldrb.s16	q[0-7], \[r0\], #-1
  **	...
  */
  int8_t* post_load8_3 (int8_t * a, int16x8_t *v)
*************** int8_t* post_load8_3 (int8_t * a, int16x
*** 294,300 ****
  /*
  **post_loadfp16_0:
  **	...
! **	vldrh.16	q[0-9]+, \[r0\], #-24
  **	...
  */
  float16_t* post_loadfp16_0 (float16_t *a, float16x8_t *v)
--- 294,300 ----
  /*
  **post_loadfp16_0:
  **	...
! **	vldrh.16	q[0-7], \[r0\], #-24
  **	...
  */
  float16_t* post_loadfp16_0 (float16_t *a, float16x8_t *v)
*************** float16_t* post_loadfp16_0 (float16_t *a
*** 307,313 ****
  /*
  **post_load16_0:
  **	...
! **	vldrh.16	q[0-9]+, \[r0\], #-126
  **	...
  */
  uint16_t* post_load16_0 (uint16_t * a, uint16x8_t *v)
--- 307,313 ----
  /*
  **post_load16_0:
  **	...
! **	vldrh.16	q[0-7], \[r0\], #-126
  **	...
  */
  uint16_t* post_load16_0 (uint16_t * a, uint16x8_t *v)
*************** uint16_t* post_load16_0 (uint16_t * a, u
*** 320,326 ****
  /*
  **post_load16_1:
  **	...
! **	vldrh.u32	q[0-9]+, \[r0\], #16
  **	...
  */
  uint16_t* post_load16_1 (uint16_t * a, uint32x4_t *v)
--- 320,326 ----
  /*
  **post_load16_1:
  **	...
! **	vldrh.u32	q[0-7], \[r0\], #16
  **	...
  */
  uint16_t* post_load16_1 (uint16_t * a, uint32x4_t *v)
*************** uint16_t* post_load16_1 (uint16_t * a, u
*** 333,339 ****
  /*
  **post_loadfp32_0:
  **	...
! **	vldrw.32	q[0-9]+, \[r0\], #4
  **	...
  */
  float32_t* post_loadfp32_0 (float32_t *a, float32x4_t *v)
--- 333,339 ----
  /*
  **post_loadfp32_0:
  **	...
! **	vldrw.32	q[0-7], \[r0\], #4
  **	...
  */
  float32_t* post_loadfp32_0 (float32_t *a, float32x4_t *v)
*************** float32_t* post_loadfp32_0 (float32_t *a
*** 346,352 ****
  /*
  **post_load32_0:
  **	...
! **	vldrw.32	q[0-9]+, \[r0\], #-16
  **	...
  */
  int32_t* post_load32_0 (int32_t * a, int32x4_t *v)
--- 346,352 ----
  /*
  **post_load32_0:
  **	...
! **	vldrw.32	q[0-7], \[r0\], #-16
  **	...
  */
  int32_t* post_load32_0 (int32_t * a, int32x4_t *v)
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_store_memory_modes.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_store_memory_modes.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_store_memory_modes.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_store_memory_modes.c	Thu Jun 20 08:08:08 2024
***************
*** 7,13 ****
  /*
  **off_store8_0:
  **	...
! **	vstrb.8	q0, \[r0, #16\]
  **	...
  */
  uint8_t *off_store8_0 (uint8_t * a, uint8x16_t v)
--- 7,13 ----
  /*
  **off_store8_0:
  **	...
! **	vstrb.8	q[0-7], \[r0, #16\]
  **	...
  */
  uint8_t *off_store8_0 (uint8_t * a, uint8x16_t v)
*************** uint8_t *off_store8_0 (uint8_t * a, uint
*** 19,25 ****
  /*
  **off_store8_1:
  **	...
! **	vstrb.16	q0, \[r0, #-1\]
  **	...
  */
  int8_t *off_store8_1 (int8_t * a, int16x8_t v)
--- 19,25 ----
  /*
  **off_store8_1:
  **	...
! **	vstrb.16	q[0-7], \[r0, #-1\]
  **	...
  */
  int8_t *off_store8_1 (int8_t * a, int16x8_t v)
*************** int8_t *off_store8_1 (int8_t * a, int16x
*** 31,37 ****
  /*
  **off_store8_2:
  **	...
! **	vstrb.32	q0, \[r0, #-127\]
  **	...
  */
  uint8_t *off_store8_2 (uint8_t * a, uint32x4_t v)
--- 31,37 ----
  /*
  **off_store8_2:
  **	...
! **	vstrb.32	q[0-7], \[r0, #-127\]
  **	...
  */
  uint8_t *off_store8_2 (uint8_t * a, uint32x4_t v)
*************** uint8_t *off_store8_2 (uint8_t * a, uint
*** 43,49 ****
  /*
  **off_store8_3:
  **	...
! **	vstrb.8	q0, \[r0, #127\]
  **	...
  */
  int8_t *off_store8_3 (int8_t * a, int8x16_t v)
--- 43,49 ----
  /*
  **off_store8_3:
  **	...
! **	vstrb.8	q[0-7], \[r0, #127\]
  **	...
  */
  int8_t *off_store8_3 (int8_t * a, int8x16_t v)
*************** int8_t *off_store8_3 (int8_t * a, int8x1
*** 55,61 ****
  /*
  **not_off_store8_0:
  **	...
! **	vstrb.8	q0, \[r[0-9]+\]
  **	...
  */
  uint8_t *not_off_store8_0 (uint8_t * a, uint8x16_t v)
--- 55,61 ----
  /*
  **not_off_store8_0:
  **	...
! **	vstrb.8	q[0-7], \[r[0-7]+\]
  **	...
  */
  uint8_t *not_off_store8_0 (uint8_t * a, uint8x16_t v)
*************** uint8_t *not_off_store8_0 (uint8_t * a,
*** 67,73 ****
  /*
  **off_storefp16_0:
  **	...
! **	vstrh.16	q0, \[r0, #250\]
  **	...
  */
  float16_t *off_storefp16_0 (float16_t *a, float16x8_t v)
--- 67,73 ----
  /*
  **off_storefp16_0:
  **	...
! **	vstrh.16	q[0-7], \[r0, #250\]
  **	...
  */
  float16_t *off_storefp16_0 (float16_t *a, float16x8_t v)
*************** float16_t *off_storefp16_0 (float16_t *a
*** 79,85 ****
  /*
  **off_store16_0:
  **	...
! **	vstrh.16	q0, \[r0, #4\]
  **	...
  */
  int16_t *off_store16_0 (int16_t * a, int16x8_t v)
--- 79,85 ----
  /*
  **off_store16_0:
  **	...
! **	vstrh.16	q[0-7], \[r0, #4\]
  **	...
  */
  int16_t *off_store16_0 (int16_t * a, int16x8_t v)
*************** int16_t *off_store16_0 (int16_t * a, int
*** 91,97 ****
  /*
  **off_store16_1:
  **	...
! **	vstrh.32	q0, \[r0, #-254\]
  **	...
  */
  int16_t *off_store16_1 (int16_t * a, int32x4_t v)
--- 91,97 ----
  /*
  **off_store16_1:
  **	...
! **	vstrh.32	q[0-7], \[r0, #-254\]
  **	...
  */
  int16_t *off_store16_1 (int16_t * a, int32x4_t v)
*************** int16_t *off_store16_1 (int16_t * a, int
*** 103,109 ****
  /*
  **not_off_store16_0:
  **	...
! **	vstrh.16	q0, \[r[0-9]+\]
  **	...
  */
  uint8_t *not_off_store16_0 (uint8_t * a, uint16x8_t v)
--- 103,109 ----
  /*
  **not_off_store16_0:
  **	...
! **	vstrh.16	q[0-7], \[r[0-7]+\]
  **	...
  */
  uint8_t *not_off_store16_0 (uint8_t * a, uint16x8_t v)
*************** uint8_t *not_off_store16_0 (uint8_t * a,
*** 115,121 ****
  /*
  **not_off_store16_1:
  **	...
! **	vstrh.32	q0, \[r[0-9]+\]
  **	...
  */
  int16_t *not_off_store16_1 (int16_t * a, int32x4_t v)
--- 115,121 ----
  /*
  **not_off_store16_1:
  **	...
! **	vstrh.32	q[0-7], \[r[0-7]+\]
  **	...
  */
  int16_t *not_off_store16_1 (int16_t * a, int32x4_t v)
*************** int16_t *not_off_store16_1 (int16_t * a,
*** 127,133 ****
  /*
  **off_storefp32_0:
  **	...
! **	vstrw.32	q0, \[r0, #-412\]
  **	...
  */
  float32_t *off_storefp32_0 (float32_t *a, float32x4_t v)
--- 127,133 ----
  /*
  **off_storefp32_0:
  **	...
! **	vstrw.32	q[0-7], \[r0, #-412\]
  **	...
  */
  float32_t *off_storefp32_0 (float32_t *a, float32x4_t v)
*************** float32_t *off_storefp32_0 (float32_t *a
*** 139,145 ****
  /*
  **off_store32_0:
  **	...
! **	vstrw.32	q0, \[r0, #-4\]
  **	...
  */
  int32_t *off_store32_0 (int32_t * a, int32x4_t v)
--- 139,145 ----
  /*
  **off_store32_0:
  **	...
! **	vstrw.32	q[0-7], \[r0, #-4\]
  **	...
  */
  int32_t *off_store32_0 (int32_t * a, int32x4_t v)
*************** int32_t *off_store32_0 (int32_t * a, int
*** 151,157 ****
  /*
  **off_store32_1:
  **	...
! **	vstrw.32	q0, \[r0, #508\]
  **	...
  */
  uint32_t *off_store32_1 (uint32_t * a, uint32x4_t v)
--- 151,157 ----
  /*
  **off_store32_1:
  **	...
! **	vstrw.32	q[0-7], \[r0, #508\]
  **	...
  */
  uint32_t *off_store32_1 (uint32_t * a, uint32x4_t v)
*************** uint32_t *off_store32_1 (uint32_t * a, u
*** 163,169 ****
  /*
  **pre_store8_0:
  **	...
! **	vstrb.8	q[0-9]+, \[r0, #-16\]!
  **	...
  */
  uint8_t* pre_store8_0 (uint8_t * a, uint8x16_t v)
--- 163,169 ----
  /*
  **pre_store8_0:
  **	...
! **	vstrb.8	q[0-7], \[r0, #-16\]!
  **	...
  */
  uint8_t* pre_store8_0 (uint8_t * a, uint8x16_t v)
*************** uint8_t* pre_store8_0 (uint8_t * a, uint
*** 176,182 ****
  /*
  **pre_store8_1:
  **	...
! **	vstrb.16	q[0-9]+, \[r0, #4\]!
  **	...
  */
  int8_t* pre_store8_1 (int8_t * a, int16x8_t v)
--- 176,182 ----
  /*
  **pre_store8_1:
  **	...
! **	vstrb.16	q[0-7], \[r0, #4\]!
  **	...
  */
  int8_t* pre_store8_1 (int8_t * a, int16x8_t v)
*************** int8_t* pre_store8_1 (int8_t * a, int16x
*** 189,195 ****
  /*
  **pre_storefp16_0:
  **	...
! **	vstrh.16	q0, \[r0, #8\]!
  **	...
  */
  float16_t *pre_storefp16_0 (float16_t *a, float16x8_t v)
--- 189,195 ----
  /*
  **pre_storefp16_0:
  **	...
! **	vstrh.16	q[0-7], \[r0, #8\]!
  **	...
  */
  float16_t *pre_storefp16_0 (float16_t *a, float16x8_t v)
*************** float16_t *pre_storefp16_0 (float16_t *a
*** 202,208 ****
  /*
  **pre_store16_0:
  **	...
! **	vstrh.16	q[0-9]+, \[r0, #254\]!
  **	...
  */
  uint16_t* pre_store16_0 (uint16_t * a, uint16x8_t v)
--- 202,208 ----
  /*
  **pre_store16_0:
  **	...
! **	vstrh.16	q[0-7], \[r0, #254\]!
  **	...
  */
  uint16_t* pre_store16_0 (uint16_t * a, uint16x8_t v)
*************** uint16_t* pre_store16_0 (uint16_t * a, u
*** 215,221 ****
  /*
  **pre_store16_1:
  **	...
! **	vstrh.32	q[0-9]+, \[r0, #-52\]!
  **	...
  */
  int16_t* pre_store16_1 (int16_t * a, int32x4_t v)
--- 215,221 ----
  /*
  **pre_store16_1:
  **	...
! **	vstrh.32	q[0-7], \[r0, #-52\]!
  **	...
  */
  int16_t* pre_store16_1 (int16_t * a, int32x4_t v)
*************** int16_t* pre_store16_1 (int16_t * a, int
*** 228,234 ****
  /*
  **pre_storefp32_0:
  **	...
! **	vstrw.32	q0, \[r0, #-4\]!
  **	...
  */
  float32_t *pre_storefp32_0 (float32_t *a, float32x4_t v)
--- 228,234 ----
  /*
  **pre_storefp32_0:
  **	...
! **	vstrw.32	q[0-7], \[r0, #-4\]!
  **	...
  */
  float32_t *pre_storefp32_0 (float32_t *a, float32x4_t v)
*************** float32_t *pre_storefp32_0 (float32_t *a
*** 241,247 ****
  /*
  **pre_store32_0:
  **	...
! **	vstrw.32	q[0-9]+, \[r0, #4\]!
  **	...
  */
  int32_t* pre_store32_0 (int32_t * a, int32x4_t v)
--- 241,247 ----
  /*
  **pre_store32_0:
  **	...
! **	vstrw.32	q[0-7], \[r0, #4\]!
  **	...
  */
  int32_t* pre_store32_0 (int32_t * a, int32x4_t v)
*************** int32_t* pre_store32_0 (int32_t * a, int
*** 255,261 ****
  /*
  **post_store8_0:
  **	...
! **	vstrb.8	q[0-9]+, \[r0\], #-26
  **	...
  */
  int8_t* post_store8_0 (int8_t * a, int8x16_t v)
--- 255,261 ----
  /*
  **post_store8_0:
  **	...
! **	vstrb.8	q[0-7], \[r0\], #-26
  **	...
  */
  int8_t* post_store8_0 (int8_t * a, int8x16_t v)
*************** int8_t* post_store8_0 (int8_t * a, int8x
*** 268,274 ****
  /*
  **post_store8_1:
  **	...
! **	vstrb.16	q[0-9]+, \[r0\], #1
  **	...
  */
  uint8_t* post_store8_1 (uint8_t * a, uint16x8_t v)
--- 268,274 ----
  /*
  **post_store8_1:
  **	...
! **	vstrb.16	q[0-7], \[r0\], #1
  **	...
  */
  uint8_t* post_store8_1 (uint8_t * a, uint16x8_t v)
*************** uint8_t* post_store8_1 (uint8_t * a, uin
*** 281,287 ****
  /*
  **post_store8_2:
  **	...
! **	vstrb.8	q[0-9]+, \[r0\], #-26
  **	...
  */
  int8_t* post_store8_2 (int8_t * a, int8x16_t v)
--- 281,287 ----
  /*
  **post_store8_2:
  **	...
! **	vstrb.8	q[0-7], \[r0\], #-26
  **	...
  */
  int8_t* post_store8_2 (int8_t * a, int8x16_t v)
*************** int8_t* post_store8_2 (int8_t * a, int8x
*** 294,300 ****
  /*
  **post_store8_3:
  **	...
! **	vstrb.16	q[0-9]+, \[r0\], #7
  **	...
  */
  uint8_t* post_store8_3 (uint8_t * a, uint16x8_t v)
--- 294,300 ----
  /*
  **post_store8_3:
  **	...
! **	vstrb.16	q[0-7], \[r0\], #7
  **	...
  */
  uint8_t* post_store8_3 (uint8_t * a, uint16x8_t v)
*************** uint8_t* post_store8_3 (uint8_t * a, uin
*** 307,313 ****
  /*
  **post_storefp16_0:
  **	...
! **	vstrh.16	q[0-9]+, \[r0\], #-16
  **	...
  */
  float16_t *post_storefp16_0 (float16_t *a, float16x8_t v)
--- 307,313 ----
  /*
  **post_storefp16_0:
  **	...
! **	vstrh.16	q[0-7], \[r0\], #-16
  **	...
  */
  float16_t *post_storefp16_0 (float16_t *a, float16x8_t v)
*************** float16_t *post_storefp16_0 (float16_t *
*** 320,326 ****
  /*
  **post_store16_0:
  **	...
! **	vstrh.16	q[0-9]+, \[r0\], #126
  **	...
  */
  int16_t* post_store16_0 (int16_t * a, int16x8_t v)
--- 320,326 ----
  /*
  **post_store16_0:
  **	...
! **	vstrh.16	q[0-7], \[r0\], #126
  **	...
  */
  int16_t* post_store16_0 (int16_t * a, int16x8_t v)
*************** int16_t* post_store16_0 (int16_t * a, in
*** 333,339 ****
  /*
  **post_store16_1:
  **	...
! **	vstrh.32	q[0-9]+, \[r0\], #-16
  **	...
  */
  uint16_t* post_store16_1 (uint16_t * a, uint32x4_t v)
--- 333,339 ----
  /*
  **post_store16_1:
  **	...
! **	vstrh.32	q[0-7], \[r0\], #-16
  **	...
  */
  uint16_t* post_store16_1 (uint16_t * a, uint32x4_t v)
*************** uint16_t* post_store16_1 (uint16_t * a,
*** 346,352 ****
  /*
  **post_storefp32_0:
  **	...
! **	vstrw.32	q[0-9]+, \[r0\], #-16
  **	...
  */
  float32_t* post_storefp32_0 (float32_t * a, float32x4_t v)
--- 346,352 ----
  /*
  **post_storefp32_0:
  **	...
! **	vstrw.32	q[0-7], \[r0\], #-16
  **	...
  */
  float32_t* post_storefp32_0 (float32_t * a, float32x4_t v)
*************** float32_t* post_storefp32_0 (float32_t *
*** 359,365 ****
  /*
  **post_store32_0:
  **	...
! **	vstrw.32	q[0-9]+, \[r0\], #16
  **	...
  */
  int32_t* post_store32_0 (int32_t * a, int32x4_t v)
--- 359,365 ----
  /*
  **post_store32_0:
  **	...
! **	vstrw.32	q[0-7], \[r0\], #16
  **	...
  */
  int32_t* post_store32_0 (int32_t * a, int32x4_t v)
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,67 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include 
+ 
+ volatile int32x4_t c1;
+ volatile uint32x4_t c2;
+ int *carry;
+ 
+ int
+ main ()
+ {
+   int32x4_t a1 = vcreateq_s32 (0, 0);
+   int32x4_t b1 = vcreateq_s32 (0, 0);
+   int32x4_t inactive1 = vcreateq_s32 (0, 0);
+ 
+   uint32x4_t a2 = vcreateq_u32 (0, 0);
+   uint32x4_t b2 = vcreateq_u32 (0, 0);
+   uint32x4_t inactive2 = vcreateq_u32 (0, 0);
+ 
+   mve_pred16_t p = 0xFFFF;
+   (*carry) = 0xFFFFFFFF;
+ 
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c1 = vadcq (a1, b1, carry);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+   (*carry) = 0xFFFFFFFF;
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c2 = vadcq (a2, b2, carry);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+   (*carry) = 0xFFFFFFFF;
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c1 = vsbcq (a1, b1, carry);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+   (*carry) = 0xFFFFFFFF;
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c2 = vsbcq (a2, b2, carry);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+   (*carry) = 0xFFFFFFFF;
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c1 = vadcq_m (inactive1, a1, b1, carry, p);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+   (*carry) = 0xFFFFFFFF;
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c2 = vadcq_m (inactive2, a2, b2, carry, p);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+   (*carry) = 0xFFFFFFFF;
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c1 = vsbcq_m (inactive1, a1, b1, carry, p);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+   (*carry) = 0xFFFFFFFF;
+   __builtin_arm_set_fpscr_nzcvqc (0);
+   c2 = vsbcq_m (inactive2, a2, b2, carry, p);
+   if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000)
+     __builtin_abort ();
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2 --save-temps" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-1.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE uint8x16_t
+ #define INTRINSIC vstrbq_u8
+ #define INTRINSIC_P vstrbq_p_u8
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-10.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-10.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE int32x4_t
+ #define INTRINSIC vstrhq_s32
+ #define INTRINSIC_P vstrhq_p_s32
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-11.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-11.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE uint32x4_t
+ #define INTRINSIC vstrwq_u32
+ #define INTRINSIC_P vstrwq_p_u32
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-12.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-12.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE int32x4_t
+ #define INTRINSIC vstrwq_s32
+ #define INTRINSIC_P vstrwq_p_s32
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve_fp } */
+ 
+ #include "pr108177-13.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-13.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve_fp } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE float16x8_t
+ #define INTRINSIC vstrhq_f16
+ #define INTRINSIC_P vstrhq_p_f16
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve_fp } */
+ 
+ #include "pr108177-14.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-14.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve_fp } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrwt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE float32x4_t
+ #define INTRINSIC vstrwq_f32
+ #define INTRINSIC_P vstrwq_p_f32
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-2.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrbt.8	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE int8x16_t
+ #define INTRINSIC vstrbq_s8
+ #define INTRINSIC_P vstrbq_p_s8
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-3.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-3.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE uint16x8_t
+ #define INTRINSIC vstrbq_u16
+ #define INTRINSIC_P vstrbq_p_u16
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-4.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-4.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrbt.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE int16x8_t
+ #define INTRINSIC vstrbq_s16
+ #define INTRINSIC_P vstrbq_p_s16
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-5.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-5.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE uint32x4_t
+ #define INTRINSIC vstrbq_u32
+ #define INTRINSIC_P vstrbq_p_u32
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-6.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-6.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrbt.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE int32x4_t
+ #define INTRINSIC vstrbq_s32
+ #define INTRINSIC_P vstrbq_p_s32
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-7.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-7.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE uint16x8_t
+ #define INTRINSIC vstrhq_u16
+ #define INTRINSIC_P vstrhq_p_u16
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-8.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-8.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrht.16	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE int16x8_t
+ #define INTRINSIC vstrhq_s16
+ #define INTRINSIC_P vstrhq_p_s16
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9-run.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_mve_hw } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ 
+ #include "pr108177-9.c"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-9.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_1m_mve_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options arm_v8_1m_mve } */
+ /* { dg-final { check-function-bodies "**" "" "" } } */
+ 
+ /*
+ ** test:
+ **...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ **	vstrht.32	q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
+ **...
+ */
+ 
+ #define TYPE uint32x4_t
+ #define INTRINSIC vstrhq_u32
+ #define INTRINSIC_P vstrhq_p_u32
+ 
+ #include "pr108177.x"
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-main.x gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-main.x
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177-main.x	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177-main.x	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,31 ----
+ #include 
+ extern void abort (void);
+ 
+ __attribute__ ((noipa)) void
+ write_expected (uint32x4_t v, void *a)
+ {
+   TYPE _v = (TYPE) v;
+   INTRINSIC (a, _v);
+ }
+ 
+ void test (uint32x4_t, void *, mve_pred16_t, mve_pred16_t);
+ 
+ int main(void)
+ {
+   uint32x4_t v = {0, 1, 2, 3};
+   uint32_t actual[] = {0, 0, 0, 0};
+   uint32_t expected[] = {0, 0, 0, 0};
+ 
+   write_expected (v, &(expected[0]));
+ 
+   mve_pred16_t p1 = 0xff00;
+   mve_pred16_t p2 = 0x00ff;
+ 
+   test (v, (void *)&actual[0], p1, p2);
+ 
+   if (__builtin_memcmp (&actual[0], &expected[0], 16) != 0)
+     abort ();
+ 
+   return 0;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177.x gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177.x
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/mve/pr108177.x	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/mve/pr108177.x	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,9 ----
+ #include "pr108177-main.x"
+ 
+ __attribute__ ((noipa)) void
+ test (uint32x4_t v, void *a, mve_pred16_t p1, mve_pred16_t p2)
+ {
+   TYPE _v = (TYPE) v;
+   INTRINSIC_P (a, _v, p1);
+   INTRINSIC_P (a, _v, p2);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/neon-recip-div-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/neon-recip-div-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/neon-recip-div-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/neon-recip-div-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_neon_ok } */
+ /* { dg-options "-O3 -freciprocal-math -fno-unsafe-math-optimizations -save-temps" } */
+ /* { dg-add-options arm_neon } */
+ 
+ int *a;
+ int n;
+ void b() {
+   int c;
+   for (c = 0; c < 100000; c++)
+     a[c] = (float)c / n;
+ }
+ /* We should not ICE, or get a vectorized reciprocal instruction when unsafe
+    math optimizations are disabled.  */
+ /* { dg-final { scan-assembler-not "vrecpe\\.f32\\t\[qd\].*" } } */
+ /* { dg-final { scan-assembler-not "vrecps\\.f32\\t\[qd\].*" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/pr109939.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/pr109939.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/pr109939.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/pr109939.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_sat_ok } */
+ /* { dg-add-options arm_sat } */
+ /* { dg-additional-options "-O -Wall -Wconversion" } */
+ 
+ #include 
+ 
+ int dbg_ssat_out;
+ int dbg_ssat_in;
+ 
+ void test_arm_ssat(void)
+ {
+     dbg_ssat_out = __ssat(dbg_ssat_in, 16);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_hard_ok } */
+ /* { dg-options "-O2 -march=armv7-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mbig-endian -mpure-code" } */
+ double f() { return 5.0; }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-1.c	Thu Jun 20 08:08:08 2024
*************** TEST_TYPE (vs32, __INT32_TYPE__, COMPARE
*** 50,80 ****
  TEST_TYPE (vu32, __UINT32_TYPE__, COMPARE_REG, 16)
  
  /* { 8 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i8  eq, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i8  ne, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  lt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  le, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  gt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  ge, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8  hi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8  cs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 16 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i16  eq, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i16  ne, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  lt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  le, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  gt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  ge, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16  hi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16  cs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 32 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i32  eq, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i32  ne, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  lt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  le, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  gt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  ge, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32  hi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32  cs, q[0-9]+, q[0-9]+\n} 2 } } */
--- 50,80 ----
  TEST_TYPE (vu32, __UINT32_TYPE__, COMPARE_REG, 16)
  
  /* { 8 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i8\teq, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i8\tne, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tlt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tle, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tgt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tge, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8\thi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8\tcs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 16 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i16\teq, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i16\tne, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tlt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tle, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tgt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tge, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16\thi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16\tcs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 32 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i32\teq, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i32\tne, q[0-9]+, q[0-9]+\n} 4 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tlt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tle, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tgt, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tge, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32\thi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32\tcs, q[0-9]+, q[0-9]+\n} 2 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-scalar-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-scalar-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-scalar-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-compare-scalar-1.c	Thu Jun 20 08:08:08 2024
*************** TEST_TYPE (vs32, __INT32_TYPE__, 16)
*** 39,69 ****
  TEST_TYPE (vu32, __UINT32_TYPE__, 16)
  
  /* { 8 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i8  eq, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i8  ne, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  lt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  le, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  gt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8  ge, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8  hi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8  cs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 16 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i16  eq, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i16  ne, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  lt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  le, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  gt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16  ge, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16  hi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16  cs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 32 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i32  eq, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i32  ne, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  lt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  le, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  gt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32  ge, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32  hi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32  cs, q[0-9]+, q[0-9]+\n} 2 } } */
--- 39,69 ----
  TEST_TYPE (vu32, __UINT32_TYPE__, 16)
  
  /* { 8 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i8\teq, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i8\tne, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tlt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tle, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tgt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s8\tge, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8\thi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u8\tcs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 16 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i16\teq, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i16\tne, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tlt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tle, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tgt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s16\tge, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16\thi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u16\tcs, q[0-9]+, q[0-9]+\n} 2 } } */
  
  /* { 32 bits } x { eq, ne, lt, le, gt, ge, hi, cs }.
! /* { dg-final { scan-assembler-times {\tvcmp.i32\teq, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i32\tne, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tlt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tle, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tgt, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s32\tge, q[0-9]+, q[0-9]+\n} 1 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32\thi, q[0-9]+, q[0-9]+\n} 2 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u32\tcs, q[0-9]+, q[0-9]+\n} 2 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vabs.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vabs.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vabs.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vabs.c	Thu Jun 20 08:08:08 2024
*************** FUNC(f, float, 16, 8, vabs)
*** 38,44 ****
     integer optimizations actually generate a call to memmove, the other ones a
     'vabs'.  */
  /* { dg-final { scan-assembler-times {vabs.s[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
! /* { dg-final { scan-assembler-times {vabs.f[0-9]+  q[0-9]+, q[0-9]+} 2 } } */
  /* { dg-final { scan-assembler-times {vldr[bhw].[0-9]+\tq[0-9]+} 5 } } */
  /* { dg-final { scan-assembler-times {vstr[bhw].[0-9]+\tq[0-9]+} 5 } } */
  /* { dg-final { scan-assembler-times {memmove} 3 } } */
--- 38,44 ----
     integer optimizations actually generate a call to memmove, the other ones a
     'vabs'.  */
  /* { dg-final { scan-assembler-times {vabs.s[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
! /* { dg-final { scan-assembler-times {vabs.f[0-9]+\tq[0-9]+, q[0-9]+} 2 } } */
  /* { dg-final { scan-assembler-times {vldr[bhw].[0-9]+\tq[0-9]+} 5 } } */
  /* { dg-final { scan-assembler-times {vstr[bhw].[0-9]+\tq[0-9]+} 5 } } */
  /* { dg-final { scan-assembler-times {memmove} 3 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c	Thu Jun 20 08:08:08 2024
*************** FUNC(u, uint, 16, 8, +, vadd)
*** 22,30 ****
  FUNC(s, int, 8, 16, +, vadd)
  FUNC(u, uint, 8, 16, +, vadd)
  
! /* { dg-final { scan-assembler-times {vadd\.i32  q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */
! /* { dg-final { scan-assembler-times {vadd\.i16  q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */
! /* { dg-final { scan-assembler-times {vadd\.i8  q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */
  
  void test_vadd_f32 (float * dest, float * a, float * b) {
    int i;
--- 22,30 ----
  FUNC(s, int, 8, 16, +, vadd)
  FUNC(u, uint, 8, 16, +, vadd)
  
! /* { dg-final { scan-assembler-times {vadd\.i32\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */
! /* { dg-final { scan-assembler-times {vadd\.i16\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */
! /* { dg-final { scan-assembler-times {vadd\.i8\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */
  
  void test_vadd_f32 (float * dest, float * a, float * b) {
    int i;
*************** void test_vadd_f32 (float * dest, float
*** 32,38 ****
      dest[i] = a[i] + b[i];
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f32 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
  
  void test_vadd_f16 (__fp16 * dest, __fp16 * a, __fp16 * b) {
    int i;
--- 32,38 ----
      dest[i] = a[i] + b[i];
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f32\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
  
  void test_vadd_f16 (__fp16 * dest, __fp16 * a, __fp16 * b) {
    int i;
*************** void test_vadd_f16 (__fp16 * dest, __fp1
*** 40,43 ****
      dest[i] = a[i] + b[i];
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f16 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
--- 40,43 ----
      dest[i] = a[i] + b[i];
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-scalar-1.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-scalar-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-scalar-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vadd-scalar-1.c	Thu Jun 20 08:08:08 2024
*************** FUNC_IMM(u, uint, 8, 16, +, vaddimm)
*** 24,32 ****
  
  /* For the moment we do not select the T2 vadd variant operating on a scalar
     final argument.  */
! /* { dg-final { scan-assembler-times {vadd\.i32  q[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {vadd\.i16  q[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {vadd\.i8  q[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
  
  void test_vaddimm_f32 (float * dest, float * a) {
    int i;
--- 24,32 ----
  
  /* For the moment we do not select the T2 vadd variant operating on a scalar
     final argument.  */
! /* { dg-final { scan-assembler-times {vadd\.i32\tq[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {vadd\.i16\tq[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {vadd\.i8\tq[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
  
  void test_vaddimm_f32 (float * dest, float * a) {
    int i;
*************** void test_vaddimm_f32 (float * dest, flo
*** 34,40 ****
      dest[i] = a[i] + 5.0;
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f32 q[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */
  
  /* Note that dest[i] = a[i] + 5.0f16 is not vectorized.  */
  void test_vaddimm_f16 (__fp16 * dest, __fp16 * a) {
--- 34,40 ----
      dest[i] = a[i] + 5.0;
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f32\tq[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */
  
  /* Note that dest[i] = a[i] + 5.0f16 is not vectorized.  */
  void test_vaddimm_f16 (__fp16 * dest, __fp16 * a) {
*************** void test_vaddimm_f16 (__fp16 * dest, __
*** 44,47 ****
      dest[i] = a[i] + b;
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f16 q[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */
--- 44,47 ----
      dest[i] = a[i] + b;
    }
  }
! /* { dg-final { scan-assembler-times {vadd\.f16\tq[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c	Thu Jun 20 08:08:08 2024
*************** FUNC(u, uint, 8, clz)
*** 23,28 ****
  
  /* 16 and 8-bit versions are not vectorized because they need pack/unpack
     patterns since __builtin_clz uses 32-bit parameter and return value.  */
! /* { dg-final { scan-assembler-times {vclz\.i32  q[0-9]+, q[0-9]+} 2 } } */
! /* { dg-final { scan-assembler-times {vclz\.i16  q[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {vclz\.i8  q[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */
--- 23,28 ----
  
  /* 16 and 8-bit versions are not vectorized because they need pack/unpack
     patterns since __builtin_clz uses 32-bit parameter and return value.  */
! /* { dg-final { scan-assembler-times {vclz\.i32\tq[0-9]+, q[0-9]+} 2 } } */
! /* { dg-final { scan-assembler-times {vclz\.i16\tq[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {vclz\.i8\tq[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vcmp.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vcmp.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vcmp.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vcmp.c	Thu Jun 20 08:08:08 2024
*************** ALL_FUNCS(>=, vcmpge)
*** 36,50 ****
  
  /* MVE has only 128-bit vectors, so we can vectorize only half of the
     functions above.  */
! /* { dg-final { scan-assembler-times {\tvcmp.i[0-9]+  eq, q[0-9]+, q[0-9]+\n} 6 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i[0-9]+  ne, q[0-9]+, q[0-9]+\n} 6 } } */
  
  /* lt, le, gt, ge apply to signed types, cs and hi to unsigned types.  */
  /* lt and le with unsigned types are replaced with the opposite condition, hence
     the double number of matches for cs and hi.  */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+  lt, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+  le, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+  gt, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+  ge, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u[0-9]+  cs, q[0-9]+, q[0-9]+\n} 6 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u[0-9]+  hi, q[0-9]+, q[0-9]+\n} 6 } } */
--- 36,50 ----
  
  /* MVE has only 128-bit vectors, so we can vectorize only half of the
     functions above.  */
! /* { dg-final { scan-assembler-times {\tvcmp.i[0-9]+\teq, q[0-9]+, q[0-9]+\n} 6 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.i[0-9]+\tne, q[0-9]+, q[0-9]+\n} 6 } } */
  
  /* lt, le, gt, ge apply to signed types, cs and hi to unsigned types.  */
  /* lt and le with unsigned types are replaced with the opposite condition, hence
     the double number of matches for cs and hi.  */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+\tlt, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+\tle, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+\tgt, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+\tge, q[0-9]+, q[0-9]+\n} 3 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u[0-9]+\tcs, q[0-9]+, q[0-9]+\n} 6 } } */
! /* { dg-final { scan-assembler-times {\tvcmp.u[0-9]+\thi, q[0-9]+, q[0-9]+\n} 6 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c	Thu Jun 20 08:08:08 2024
*************** FUNC(f, float, 16, 8, -, vneg)
*** 45,52 ****
  
  /* MVE has only 128-bit vectors, so we can vectorize only half of the
     functions above.  */
! /* { dg-final { scan-assembler-times {vneg.s[0-9]+  q[0-9]+, q[0-9]+} 6 } } */
! /* { dg-final { scan-assembler-times {vneg.f[0-9]+  q[0-9]+, q[0-9]+} 2 } } */
  /* { dg-final { scan-assembler-times {vldr[bhw].[0-9]+\tq[0-9]+} 8 } } */
  /* { dg-final { scan-assembler-times {vstr[bhw].[0-9]+\tq[0-9]+} 8 } } */
  /* { dg-final { scan-assembler-not {orr\tr[0-9]+, r[0-9]+, r[0-9]+} } } */
--- 45,52 ----
  
  /* MVE has only 128-bit vectors, so we can vectorize only half of the
     functions above.  */
! /* { dg-final { scan-assembler-times {vneg.s[0-9]+\tq[0-9]+, q[0-9]+} 6 } } */
! /* { dg-final { scan-assembler-times {vneg.f[0-9]+\tq[0-9]+, q[0-9]+} 2 } } */
  /* { dg-final { scan-assembler-times {vldr[bhw].[0-9]+\tq[0-9]+} 8 } } */
  /* { dg-final { scan-assembler-times {vstr[bhw].[0-9]+\tq[0-9]+} 8 } } */
  /* { dg-final { scan-assembler-not {orr\tr[0-9]+, r[0-9]+, r[0-9]+} } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c	Thu Jun 20 08:08:08 2024
*************** FUNC_IMM(u, uint, 8, 16, >>, vshrimm)
*** 58,64 ****
  /* Vector right shifts use vneg and left shifts.  */
  /* { dg-final { scan-assembler-times {vshl.s[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
  /* { dg-final { scan-assembler-times {vshl.u[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
! /* { dg-final { scan-assembler-times {vneg.s[0-9]+  q[0-9]+, q[0-9]+} 6 } } */
  
  
  /* Shift by immediate.  */
--- 58,64 ----
  /* Vector right shifts use vneg and left shifts.  */
  /* { dg-final { scan-assembler-times {vshl.s[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
  /* { dg-final { scan-assembler-times {vshl.u[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
! /* { dg-final { scan-assembler-times {vneg.s[0-9]+\tq[0-9]+, q[0-9]+} 6 } } */
  
  
  /* Shift by immediate.  */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/pr101325.c gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/pr101325.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/arm/simd/pr101325.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/arm/simd/pr101325.c	Thu Jun 20 08:08:08 2024
*************** unsigned foo(int8x16_t v, int8x16_t w)
*** 9,14 ****
  {
    return vcmpeqq (v, w);
  }
! /* { dg-final { scan-assembler {\tvcmp.i8  eq} } } */
! /* { dg-final { scan-assembler {\tvmrs\tr[0-9]+, P0} } } */
  /* { dg-final { scan-assembler {\tuxth} } } */
--- 9,14 ----
  {
    return vcmpeqq (v, w);
  }
! /* { dg-final { scan-assembler {\tvcmp.i8\teq} } } */
! /* { dg-final { scan-assembler {\tvmrs\tr[0-9]+, p0} } } */
  /* { dg-final { scan-assembler {\tuxth} } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/attribute-io.h gcc-12.4.0/gcc/testsuite/gcc.target/avr/attribute-io.h
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/attribute-io.h	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/attribute-io.h	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,74 ----
+ /* { dg-do run } */
+ /* { dg-options "-Os -save-temps" } */
+ 
+ __attribute__((address(1234)))
+ int g_1234;
+ 
+ __attribute__((weak, address(4321)))
+ int w_4321;
+ 
+ __attribute__((address(5678)))
+ static int l_5678;
+ 
+ __attribute__((io_low(__AVR_SFR_OFFSET__ + 3)))
+ volatile unsigned char g_low;
+ 
+ __attribute__((weak, io_low(__AVR_SFR_OFFSET__ + 2)))
+ volatile unsigned char w_low;
+ 
+ __attribute__((io_low(__AVR_SFR_OFFSET__ + 1)))
+ static volatile unsigned char l_low;
+ 
+ __attribute__((io(__AVR_SFR_OFFSET__ + 35)))
+ volatile unsigned char g_io;
+ 
+ __attribute__((weak, io(__AVR_SFR_OFFSET__ + 34)))
+ volatile unsigned char w_io;
+ 
+ __attribute__((io(__AVR_SFR_OFFSET__ + 33)))
+ static volatile unsigned char l_io;
+ 
+ #define CMP(SYM, VAL)				\
+   do {						\
+     unsigned x;					\
+     __asm ("" : "=d" (x) : "0" (& SYM));	\
+     if (x != VAL)				\
+       __builtin_abort();			\
+   } while(0)
+ 
+ 
+ int main (void)
+ {
+   CMP (g_1234, 1234);
+   CMP (w_4321, 4321);
+   CMP (l_5678, 5678);
+ 
+   CMP (g_low, __AVR_SFR_OFFSET__ + 3);
+   CMP (w_low, __AVR_SFR_OFFSET__ + 2);
+   CMP (l_low, __AVR_SFR_OFFSET__ + 1);
+ 
+   CMP (g_io, __AVR_SFR_OFFSET__ + 35);
+   CMP (w_io, __AVR_SFR_OFFSET__ + 34);
+   CMP (l_io, __AVR_SFR_OFFSET__ + 33);
+ 
+   l_low = l_io;
+   g_low = g_io;
+   w_low = w_io;
+   l_low |= 1;
+   g_low |= 2;
+   w_low |= 4;
+ 
+   return 0;
+ }
+ 
+ /* { dg-final { scan-assembler "g_1234 = 1234" } } */
+ /* { dg-final { scan-assembler "w_4321 = 4321" } } */
+ /* { dg-final { scan-assembler "l_5678 = 5678" } } */
+ 
+ /* { dg-final { scan-assembler "\\.globl	g_1234" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_low" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_io" } } */
+ 
+ /* { dg-final { scan-assembler "\\.weak	w_4321" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_low" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_io" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-0.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-0.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-0.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-0.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run } */
+ /* { dg-options "-Os -save-temps -fno-data-sections -fno-common" } */
+ 
+ #include "attribute-io.h"
+ 
+ /* { dg-final { scan-assembler "g_1234 = 1234" } } */
+ /* { dg-final { scan-assembler "w_4321 = 4321" } } */
+ /* { dg-final { scan-assembler "l_5678 = 5678" } } */
+ 
+ /* { dg-final { scan-assembler "\\.globl	g_1234" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_low" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_io" } } */
+ 
+ /* { dg-final { scan-assembler "\\.weak	w_4321" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_low" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_io" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-1.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run } */
+ /* { dg-options "-Os -save-temps -fno-data-sections -fcommon" } */
+ 
+ #include "attribute-io.h"
+ 
+ /* { dg-final { scan-assembler "g_1234 = 1234" } } */
+ /* { dg-final { scan-assembler "w_4321 = 4321" } } */
+ /* { dg-final { scan-assembler "l_5678 = 5678" } } */
+ 
+ /* { dg-final { scan-assembler "\\.globl	g_1234" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_low" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_io" } } */
+ 
+ /* { dg-final { scan-assembler "\\.weak	w_4321" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_low" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_io" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-2.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run } */
+ /* { dg-options "-Os -save-temps -fdata-sections -fno-common" } */
+ 
+ #include "attribute-io.h"
+ 
+ /* { dg-final { scan-assembler "g_1234 = 1234" } } */
+ /* { dg-final { scan-assembler "w_4321 = 4321" } } */
+ /* { dg-final { scan-assembler "l_5678 = 5678" } } */
+ 
+ /* { dg-final { scan-assembler "\\.globl	g_1234" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_low" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_io" } } */
+ 
+ /* { dg-final { scan-assembler "\\.weak	w_4321" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_low" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_io" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-3.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr112952-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr112952-3.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run } */
+ /* { dg-options "-Os -save-temps -fdata-sections -fcommon" } */
+ 
+ #include "attribute-io.h"
+ 
+ /* { dg-final { scan-assembler "g_1234 = 1234" } } */
+ /* { dg-final { scan-assembler "w_4321 = 4321" } } */
+ /* { dg-final { scan-assembler "l_5678 = 5678" } } */
+ 
+ /* { dg-final { scan-assembler "\\.globl	g_1234" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_low" } } */
+ /* { dg-final { scan-assembler "\\.globl	g_io" } } */
+ 
+ /* { dg-final { scan-assembler "\\.weak	w_4321" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_low" } } */
+ /* { dg-final { scan-assembler "\\.weak	w_io" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr82931.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr82931.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/pr82931.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/pr82931.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,29 ----
+ /* { dg-options "-Os" } */
+ /* { dg-final { scan-assembler-times "bst" 4 } } */
+ /* { dg-final { scan-assembler-times "bld" 4 } } */
+ 
+ typedef __UINT8_TYPE__ uint8_t;
+ typedef __UINT16_TYPE__ uint16_t;
+ 
+ #define BitMask (1u << 14)
+ #define Bit8Mask ((uint8_t) (1u << 4))
+ 
+ void merge1_8 (uint8_t *dst, const uint8_t *src)
+ {
+     *dst = (*src & Bit8Mask) | (*dst & ~ Bit8Mask);
+ }
+ 
+ void merge2_8 (uint8_t *dst, const uint8_t *src)
+ {
+     *dst ^= (*dst ^ *src) & Bit8Mask;
+ }
+ 
+ void merge1_16 (uint16_t *dst, const uint16_t *src)
+ {
+     *dst = (*src & BitMask) | (*dst & ~ BitMask);
+ }
+ 
+ void merge2_16 (uint16_t *dst, const uint16_t *src)
+ {
+     *dst ^= (*dst ^ *src) & BitMask;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr105753.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr105753.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr105753.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr105753.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,13 ----
+ int digit_sum (unsigned long n)
+ {
+   int sum = 0;
+ 
+   do
+     {
+       int x = n % 10;
+       n /= 10;
+       sum += x;
+     } while(n);
+ 
+   return sum;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr109650-1.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr109650-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr109650-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr109650-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,63 ----
+ /* { dg-do run } */
+ /* { dg-options { -std=c99 } } */
+ 
+ typedef _Bool bool;
+ typedef __UINT8_TYPE__ uint8_t;
+ 
+ static inline __attribute__((__always_inline__))
+ bool func1a (bool p1, uint8_t p2)
+ {
+   if (p1)
+     return p2 <= 8;
+   return p2 <= 2;
+ }
+ 
+ __attribute__((__noinline__, __noclone__))
+ bool func1b (bool p1, uint8_t p2)
+ {
+   return func1a (p1, p2);
+ }
+ 
+ static inline __attribute__((__always_inline__))
+ bool func2a (bool p1, unsigned p2)
+ {
+   if (p1)
+     return p2 <= 8;
+   return p2 <= 2;
+ }
+ 
+ __attribute__((__noinline__, __noclone__))
+ bool func2b (bool p1, unsigned p2)
+ {
+   return func2a (p1, p2);
+ }
+ 
+ void test1 (void)
+ {
+   if (func1a (0, 1) != func1b (0, 1)) __builtin_abort();
+   if (func1a (0, 2) != func1b (0, 2)) __builtin_abort();
+   if (func1a (0, 3) != func1b (0, 3)) __builtin_abort();
+ 
+   if (func1a (1, 7) != func1b (1, 7)) __builtin_abort();
+   if (func1a (1, 8) != func1b (1, 8)) __builtin_abort();
+   if (func1a (1, 9) != func1b (1, 9)) __builtin_abort();
+ }
+ 
+ void test2 (void)
+ {
+   if (func2a (0, 1) != func2b (0, 1)) __builtin_abort();
+   if (func2a (0, 2) != func2b (0, 2)) __builtin_abort();
+   if (func2a (0, 3) != func2b (0, 3)) __builtin_abort();
+ 
+   if (func2a (1, 7) != func2b (1, 7)) __builtin_abort();
+   if (func2a (1, 8) != func2b (1, 8)) __builtin_abort();
+   if (func2a (1, 9) != func2b (1, 9)) __builtin_abort();
+ }
+ 
+ int main (void)
+ {
+   test1();
+   test2();
+ 
+   __builtin_exit (0);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr109650-2.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr109650-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr109650-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr109650-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,79 ----
+ /* { dg-do run } */
+ 
+ typedef __UINT8_TYPE__ uint8_t;
+ 
+ #define AI static __inline__ __attribute__((__always_inline__))
+ #define NI __attribute__((__noinline__,__noclone__))
+ 
+ AI uint8_t func1_eq (uint8_t c, unsigned x)
+ {
+   if (x == c)
+     return 1;
+   return 0;
+ }
+ 
+ AI uint8_t func1_ne (uint8_t c, unsigned x)
+ {
+   if (x != c)
+     return 1;
+   return 0;
+ }
+ 
+ AI uint8_t func1_ltu (uint8_t c, unsigned x)
+ {
+   if (x < c)
+     return 1;
+   return 0;
+ }
+ 
+ AI uint8_t func1_leu (uint8_t c, unsigned x)
+ {
+   if (x <= c)
+     return 1;
+   return 0;
+ }
+ 
+ AI uint8_t func1_gtu (uint8_t c, unsigned x)
+ {
+   if (x > c)
+     return 1;
+   return 0;
+ }
+ 
+ AI uint8_t func1_geu (uint8_t c, unsigned x)
+ {
+   if (x >= c)
+     return 1;
+   return 0;
+ }
+ 
+ NI uint8_t func2_eq (uint8_t c, unsigned x) { return func1_eq (c, x); }
+ NI uint8_t func2_ne (uint8_t c, unsigned x) { return func1_ne (c, x); }
+ NI uint8_t func2_ltu (uint8_t c, unsigned x) { return func1_ltu (c, x); }
+ NI uint8_t func2_leu (uint8_t c, unsigned x) { return func1_leu (c, x); }
+ NI uint8_t func2_gtu (uint8_t c, unsigned x) { return func1_gtu (c, x); }
+ NI uint8_t func2_geu (uint8_t c, unsigned x) { return func1_geu (c, x); }
+ 
+ AI void test4 (uint8_t c, unsigned x)
+ {
+   if (func2_eq (c, x) != func1_eq (c, x)) __builtin_abort();
+   if (func2_ne (c, x) != func1_ne (c, x)) __builtin_abort();
+   if (func2_ltu (c, x) != func1_ltu (c, x)) __builtin_abort();
+   if (func2_leu (c, x) != func1_leu (c, x)) __builtin_abort();
+   if (func2_gtu (c, x) != func1_gtu (c, x)) __builtin_abort();
+   if (func2_geu (c, x) != func1_geu (c, x)) __builtin_abort();
+ }
+ 
+ int main (void)
+ {
+   test4 (127, 127);
+   test4 (127, 128);
+   test4 (128, 127);
+ 
+   test4 (0x42, 0x142);
+   test4 (0x0, 0x100);
+   test4 (0x0, 0x0);
+   test4 (0x0, 0x1);
+ 
+   __builtin_exit (0);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr92606.c gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr92606.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/avr/torture/pr92606.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/avr/torture/pr92606.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,57 ----
+ /* { dg-do run } */
+ 
+ typedef __UINT16_TYPE__ uint16_t;
+ typedef __UINT32_TYPE__ uint32_t;
+ 
+ typedef uint32_t T;
+ 
+ #define NI __attribute__((noinline,noclone))
+ 
+ 
+ #ifndef __AVR_TINY__
+ #define read_u32(X)                                                     \
+     (__extension__(                                                     \
+         {                                                               \
+             uint16_t __addr16 = (uint16_t)(X);                          \
+             uint32_t __result;                                          \
+             __asm__ __volatile__ ("lpm %A0, Z+" "\n\t"                  \
+                                   "lpm %B0, Z+" "\n\t"                  \
+                                   "lpm %C0, Z+" "\n\t"                  \
+                                   "lpm %D0, Z" "\n\t"                   \
+                                   : "=r" (__result), "+z" (__addr16));  \
+             __result;                                                   \
+         }))
+ #else
+ NI uint32_t read_u32 (const uint32_t *p)
+ {
+ 	return *p;
+ }
+ #endif
+ 
+ static const __attribute((progmem)) T xyz_prog[] = { 123, 123, 123 };
+ T xyz[] = { 123, 123, 123 };
+ volatile int x = 0;
+ 
+ NI void prf (T f)
+ {
+     if (f != 123)
+         __builtin_abort();
+ }
+ 
+ NI void func_progmem()
+ {
+     prf (read_u32 (&xyz_prog[0]));
+ }
+ 
+ NI void func_ram()
+ {
+     prf (xyz[x]);
+ }
+ 
+ int main (void)
+ {
+     func_progmem();
+     func_ram();
+ 
+ 	return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/amxtile-4.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/amxtile-4.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/amxtile-4.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/amxtile-4.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,52 ----
+ /* PR target/114098 */
+ /* { dg-do compile { target { ! ia32 } } } */
+ /* { dg-options "-O2 -mamx-tile" } */
+ 
+ #include 
+ #include 
+ 
+ #define MAX_ROWS 16
+ #define MAX_COLS 64
+ #define MAX 1024
+ #define STRIDE 64
+ 
+ typedef struct __tile_config
+ {
+   uint8_t palette_id;
+   uint8_t start_row;
+   uint8_t reserved_0[14];
+   uint16_t colsb[16];
+   uint8_t rows[16];
+ } __tilecfg __attribute__ ((aligned (64)));
+ 
+ /* Initialize tile config */
+ static void
+ init_tile_config (__tilecfg *tileinfo)
+ {
+   int i;
+   tileinfo->palette_id = 1;
+   tileinfo->start_row = 0;
+ 
+   for (i = 0; i < 1; ++i)
+   {
+     tileinfo->colsb[i] = MAX_ROWS;
+     tileinfo->rows[i] = MAX_ROWS;
+   }
+ 
+   for (i = 1; i < 4; ++i)
+   {
+     tileinfo->colsb[i] = MAX_COLS;
+     tileinfo->rows[i] = MAX_ROWS;
+   }
+ 
+   _tile_loadconfig (tileinfo);
+ }
+ 
+ void
+ enable_amx (void)
+ {
+   __tilecfg tile_data = {0};
+   init_tile_config (&tile_data);
+ }
+ 
+ /* { dg-final { scan-assembler-times "pxor\[^\n\]*%xmm" 1 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-12.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-12.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-12.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-12.c	Thu Jun 20 08:08:08 2024
*************** foo ()
*** 16,20 ****
    _mm256_zeroupper ();
  }
  
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 4 } } */
  /* { dg-final { scan-assembler-times "\\*avx_vzeroall" 1 } } */
--- 16,21 ----
    _mm256_zeroupper ();
  }
  
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 4 { target ia32 } } } */
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 5 { target { ! ia32 } } } } */
  /* { dg-final { scan-assembler-times "\\*avx_vzeroall" 1 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-29.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-29.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-29.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-29.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O0 -mavx -mtune=generic -mvzeroupper -dp" } */
+ 
+ #include 
+ 
+ extern __m256 x, y;
+ 
+ void
+ foo ()
+ {
+   x = y;
+ }
+ 
+ /* { dg-final { scan-assembler-times "avx_vzeroupper" 1 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-7.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-7.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-7.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-7.c	Thu Jun 20 08:08:08 2024
*************** foo ()
*** 12,15 ****
    _mm256_zeroupper ();
  }
  
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 1 } } */
--- 12,16 ----
    _mm256_zeroupper ();
  }
  
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 1 { target ia32 } } } */
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 2 { target { ! ia32 } } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-9.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-9.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-9.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx-vzeroupper-9.c	Thu Jun 20 08:08:08 2024
*************** foo ()
*** 15,18 ****
    _mm256_zeroupper ();
  }
  
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 4 } } */
--- 15,19 ----
    _mm256_zeroupper ();
  }
  
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 4 { target ia32 } } } */
! /* { dg-final { scan-assembler-times "avx_vzeroupper" 5 { target { ! ia32 } } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx2-gather-2.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx2-gather-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx2-gather-2.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx2-gather-2.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O3 -fdump-tree-vect-details -march=skylake" } */
  
  #include "avx2-gather-1.c"
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O3 -fdump-tree-vect-details -march=skylake -mtune=haswell" } */
  
  #include "avx2-gather-1.c"
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx2-gather-6.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx2-gather-6.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx2-gather-6.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx2-gather-6.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx2 -fno-common -fdump-tree-vect-details -mtune=skylake" } */
  
  #include "avx2-gather-5.c"
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx2 -fno-common -fdump-tree-vect-details  -mtune=haswell" } */
  
  #include "avx2-gather-5.c"
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512f-pr114566.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512f-pr114566.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512f-pr114566.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512f-pr114566.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,34 ----
+ /* PR tree-optimization/114566 */
+ /* { dg-do run } */
+ /* { dg-options "-O3 -mavx512f" } */
+ /* { dg-additional-options "-fstack-protector-strong" { target fstack_protector } } */
+ /* { dg-require-effective-target avx512f } */
+ 
+ #define AVX512F
+ #include "avx512f-helper.h"
+ 
+ __attribute__((noipa)) int
+ foo (float x, float y)
+ {
+   float a[8][56];
+   __builtin_memset (a, 0, sizeof (a));
+ 
+   for (int j = 0; j < 8; j++)
+     for (int k = 0; k < 56; k++)
+       {
+ 	float b = k * y;
+ 	if (b < 0.)
+ 	  b = 0.;
+ 	if (b > 0.)
+ 	  b = 0.;
+ 	a[j][k] += b;
+       }
+ 
+   return __builtin_log (x);
+ }
+ 
+ void
+ TEST (void)
+ {
+   foo (86.25f, 0.625f);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-1.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-1.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512f -mprefer-vector-width=512 -mtune=skylake-avx512 -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 64 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
--- 1,6 ----
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512f -mprefer-vector-width=512 -mtune=haswell -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 64 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-5.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-5.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-5.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512f-pr88464-5.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512f -mprefer-vector-width=512 -mtune=skylake-avx512 -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 64 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
--- 1,6 ----
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512f -mprefer-vector-width=512 -mtune=haswell -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 64 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-1.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-1.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=256 -mtune=skylake-avx512 -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 32 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
--- 1,6 ----
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=256 -mtune=haswell -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 32 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-11.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-11.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-11.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-11.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=128 -mtune=skylake-avx512 -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 16 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
--- 1,6 ----
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=128 -mtune=haswell -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 16 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-3.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-3.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-3.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=128 -mtune=skylake-avx512 -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 16 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
--- 1,6 ----
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=128 -mtune=haswell -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 16 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-9.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-9.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-9.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-9.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=256 -mtune=skylake-avx512 -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 32 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
--- 1,6 ----
  /* PR tree-optimization/88464 */
  /* { dg-do compile } */
! /* { dg-options "-O3 -mavx512vl -mprefer-vector-width=256 -mtune=haswell -fdump-tree-vect-details" } */
  /* { dg-final { scan-tree-dump-times "loop vectorized using 32 byte vectors" 4 "vect" } } */
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/mvc17.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/mvc17.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/mvc17.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/mvc17.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile } */
+ /* { dg-require-ifunc "" } */
+ /* { dg-options "-O2 -march=x86-64" } */
+ /* { dg-final { scan-assembler-times "rep mov" 1 } } */
+ 
+ __attribute__((target_clones("default","arch=icelake-server")))
+ void
+ foo (char *a, char *b, int size)
+ {
+   __builtin_memcpy (a, b, size & 0x7F);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr100936.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr100936.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr100936.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr100936.c	Thu Jun 20 08:08:08 2024
***************
*** 1,6 ****
--- 1,7 ----
  /* PR target/100936 */
  /* { dg-do assemble } */
  /* { dg-options "-O2" } */
+ /* { dg-require-effective-target nonpic } */
  
  __seg_gs int var;
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr105554.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr105554.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr105554.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr105554.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
--- 1,6 ----
  /* PR target/105554 */
  /* { dg-do compile } */
+ /* { dg-require-ifunc "" } */
  /* { dg-options "-O2 -Wno-psabi -mno-sse3" } */
  
  typedef long long v4di __attribute__((__vector_size__(32)));
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110108-2.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110108-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110108-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110108-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mavx2 -O2 -funsigned-char" } */
+ /* { dg-final { scan-assembler-times "vpblendvb" 2 } } */
+ 
+ #include 
+ __m128i do_stuff_128(__m128i X0, __m128i X1, __m128i X2) {
+   __m128i Result = _mm_blendv_epi8(X0, X1, X2);
+   return Result;
+ }
+ 
+ __m256i do_stuff_256(__m256i X0, __m256i X1, __m256i X2) {
+   __m256i Result = _mm256_blendv_epi8(X0, X1, X2);
+   return Result;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110170-3.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110170-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110170-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110170-3.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile { target { ! ia32 } } } */
+ /* { dg-options "-O2 -fno-if-conversion -fno-if-conversion2" } */
+ /* { dg-final { scan-assembler-not {(?n)movq.*r} } } */
+ 
+ void __cond_swap(double* __x, double* __y) {
+   _Bool __r = (*__x < *__y);
+   double __tmp = __r ? *__x : *__y;
+   *__y = __r ? *__y : *__x;
+   *__x = __tmp;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110206.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110206.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110206.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110206.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,39 ----
+ /* PR target/110206 */
+ /* { dg-do run } */
+ /* { dg-options "-Os -mavx512bw -mavx512vl" } */
+ /* { dg-require-effective-target avx512bw } */
+ /* { dg-require-effective-target avx512vl } */
+ 
+ #define AVX512BW
+ #define AVX512VL
+ 
+ #include "avx512f-check.h"
+ 
+ typedef unsigned char __attribute__((__vector_size__ (4))) U;
+ typedef unsigned char __attribute__((__vector_size__ (8))) V;
+ typedef unsigned short u16;
+ 
+ V g;
+ 
+ void
+ __attribute__((noinline))
+ foo (U u, u16 c, V *r)
+ {
+   if (!c)
+     abort ();
+   V x = __builtin_shufflevector (u, (204 >> u), 7, 0, 5, 1, 3, 5, 0, 2);
+   V y = __builtin_shufflevector (g, (V) { }, 7, 6, 6, 7, 2, 6, 3, 5);
+   V z = __builtin_shufflevector (y, 204 * x, 3, 9, 8, 1, 4, 6, 14, 5);
+   *r = z;
+ }
+ 
+ static void test_256 (void) { };
+ 
+ static void
+ test_128 (void)
+ {
+   V r;
+   foo ((U){4}, 5, &r);
+   if (r[6] != 0x30)
+     abort();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110309.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110309.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr110309.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr110309.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O3 --param vect-partial-vector-usage=1 -march=znver4 -mprefer-vector-width=256" } */
+ /* { dg-final { scan-assembler-not {(?n)vpblendd.*ymm} } } */
+ 
+ 
+ void foo (int * __restrict a, int *b)
+ {
+   for (int i = 0; i < 6; ++i)
+     a[i] = b[i] + 42;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr111306.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr111306.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr111306.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr111306.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,36 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2 -mavx512fp16 -mavx512vl" } */
+ /* { dg-require-effective-target avx512fp16 } */
+ 
+ #define AVX512FP16
+ #include "avx512f-helper.h"
+ 
+ __attribute__((optimize("O2"),noipa))
+ void func1(_Float16 *a, _Float16 *b, int n, _Float16 *c) {
+   __m512h rA = _mm512_loadu_ph(a);
+   for (int i = 0; i < n; i += 32) {
+     __m512h rB = _mm512_loadu_ph(b + i);
+     _mm512_storeu_ph(c + i, _mm512_fcmul_pch(rB, rA));
+   }
+ }
+ 
+ void
+ test_512 (void)
+ {
+   int n = 32;
+   _Float16 a[n], b[n], c[n];
+   _Float16 exp[n];
+   for (int i = 1; i <= n; i++) {
+     a[i - 1] = i & 1 ? -i : i;
+     b[i - 1] = i;
+   }
+ 
+   func1(a, b, n, c);
+   for (int i = 0; i < n / 32; i += 2) {
+     if (c[i] != a[i] * b[i] + a[i+1] * b[i+1]
+ 	|| c[i+1] != a[i] * b[i+1] - a[i+1]*b[i])
+       __builtin_abort ();
+     }
+ }
+ 
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr111340.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr111340.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr111340.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr111340.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,9 ----
+ /* PR target/111340 */
+ /* { dg-do compile { target { fpic && int128 } } } */
+ /* { dg-options "-O2 -fpic" } */
+ 
+ void
+ bar (void)
+ {
+   __asm ("# %0" : : "g" ((((unsigned __int128) 0x123456789abcdef0ULL) << 64) | 0x0fedcba987654321ULL));
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr111736.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr111736.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr111736.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr111736.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fsanitize=address" } */
+ 
+ int __seg_gs m;
+ 
+ int foo (void)
+ {
+   return m;
+ }
+ 
+ extern int  __seg_gs n;
+ 
+ int bar (void)
+ {
+   return n;
+ }
+ 
+ int baz (int __seg_gs *o)
+ {
+   return *o;
+ }
+ 
+ /* { dg-final { scan-assembler-not "asan_report_load" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112495.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112495.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112495.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112495.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O3" } */
+ 
+ typedef struct { int v; } T1;
+ typedef struct { T1 v[32]; } T2;
+ 
+ T1 s;
+ T1 f1() { return s; }
+ 
+ void f2(__seg_gs T2 *p, int n) {
+   for (int i = 0; i < n; ++i) p->v[i] = f1();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112672.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112672.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112672.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112672.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ /* PR target/112672 */
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+ 
+ typedef unsigned short u16;
+ 
+ u16 g = 254;
+ 
+ static inline u16
+ foo (u16 u)
+ {
+   u *= g;
+   return u + __builtin_parityl (u);
+ }
+ 
+ int
+ main (void)
+ {
+   u16 x = foo (4);
+   if (x != 4 * 254 + 1)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112891-2.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112891-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112891-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112891-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,30 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mavx2 -O3" } */
+ /* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
+ 
+ void
+ __attribute__((noinline))
+ bar (double* a)
+ {
+   a[0] = 1.0;
+   a[1] = 2.0;
+ }
+ 
+ double
+ __attribute__((noinline))
+ foo (double* __restrict a, double* b)
+ {
+   a[0] += b[0];
+   a[1] += b[1];
+   a[2] += b[2];
+   a[3] += b[3];
+   bar (b);
+   return a[5] + b[5];
+ }
+ 
+ double
+ foo1 (double* __restrict a, double* b)
+ {
+   double c = foo (a, b);
+   return __builtin_exp (c);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112891.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112891.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr112891.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr112891.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,29 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mavx2 -O3" } */
+ /* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
+ 
+ void
+ __attribute__((noinline))
+ bar (double* a)
+ {
+   a[0] = 1.0;
+   a[1] = 2.0;
+ }
+ 
+ void
+ __attribute__((noinline))
+ foo (double* __restrict a, double* b)
+ {
+   a[0] += b[0];
+   a[1] += b[1];
+   a[2] += b[2];
+   a[3] += b[3];
+   bar (b);
+ }
+ 
+ double
+ foo1 (double* __restrict a, double* b)
+ {
+   foo (a, b);
+   return __builtin_exp (b[1]);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-1.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,10 ----
+ /* PR target/113122 */
+ /* { dg-do assemble { target { *-*-linux* && lp64 } } } */
+ /* { dg-require-effective-target mfentry } */
+ /* { dg-require-effective-target masm_intel } */
+ /* { dg-options "-fprofile -mfentry -O2 -mcmodel=large -masm=intel" } */
+ 
+ void
+ func (void)
+ {
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-2.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,11 ----
+ /* PR target/113122 */
+ /* { dg-do assemble { target { *-*-linux* && lp64 } } } */
+ /* { dg-require-effective-target mfentry } */
+ /* { dg-require-effective-target masm_intel } */
+ /* { dg-require-effective-target fpic } */
+ /* { dg-options "-fpic -fprofile -mfentry -O2 -mcmodel=large -masm=intel" } */
+ 
+ void
+ func (void)
+ {
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-3.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-3.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-3.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,9 ----
+ /* PR target/113122 */
+ /* { dg-do assemble { target *-*-linux* } } */
+ /* { dg-require-effective-target masm_intel } */
+ /* { dg-options "-fprofile -O2 -masm=intel" } */
+ 
+ void
+ func (void)
+ {
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-4.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-4.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113122-4.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113122-4.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,10 ----
+ /* PR target/113122 */
+ /* { dg-do assemble { target *-*-linux* } } */
+ /* { dg-require-effective-target masm_intel } */
+ /* { dg-require-effective-target fpic } */
+ /* { dg-options "-fpic -fprofile -O2 -masm=intel" } */
+ 
+ void
+ func (void)
+ {
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113921.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113921.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr113921.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr113921.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* PR middle-end/113921 */
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+ 
+ __attribute__((noipa)) long
+ foo (void)
+ {
+   long v;
+   asm volatile goto ("jmp %l2" : "=r" (v) : "0" (27) : : lab);
+   return v;
+ lab:
+   return 42;
+ }
+ 
+ int
+ main ()
+ {
+   if (foo () != 42)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr114184.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr114184.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr114184.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr114184.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,22 ----
+ /* PR target/114184 */
+ /* { dg-do compile } */
+ /* { dg-options "-Og -mavx2" } */
+ 
+ typedef unsigned char V __attribute__((vector_size (32)));
+ typedef unsigned char W __attribute__((vector_size (16)));
+ 
+ _Complex long double
+ foo (void)
+ {
+   _Complex long double d;
+   *(V *)&d = (V) { 149, 136, 89, 42, 38, 240, 196, 194 };
+   return d;
+ }
+ 
+ long double
+ bar (void)
+ {
+   long double d;
+   *(W *)&d = (W) { 149, 136, 89, 42, 38, 240, 196, 194 };
+   return d;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr88531-1b.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr88531-1b.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr88531-1b.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr88531-1b.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O3 -march=skylake -mfpmath=sse" } */
  
  #include "pr88531-1a.c"
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O3 -march=skylake -mfpmath=sse -mtune=haswell" } */
  
  #include "pr88531-1a.c"
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr88531-1c.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr88531-1c.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/pr88531-1c.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/pr88531-1c.c	Thu Jun 20 08:08:08 2024
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-O3 -march=skylake-avx512 -mfpmath=sse" } */
  
  #include "pr88531-1a.c"
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-O3 -march=skylake-avx512 -mfpmath=sse -mtune=haswell" } */
  
  #include "pr88531-1a.c"
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/sse2-pr112816-2.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/sse2-pr112816-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/sse2-pr112816-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/sse2-pr112816-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* PR target/112816 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -msse2" } */
+ 
+ #define N 2
+ struct S { float x[N]; };
+ struct T { int x[N]; };
+ 
+ struct T
+ foo (struct S x)
+ {
+   struct T res;
+   for (int i = 0; i < N; ++i)
+     res.x[i] = __builtin_signbit (x.x[i]) ? -1 : 0;
+   return res;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/i386/sse2-pr112816.c gcc-12.4.0/gcc/testsuite/gcc.target/i386/sse2-pr112816.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/i386/sse2-pr112816.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/i386/sse2-pr112816.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,16 ----
+ /* PR target/112816 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -msse2" } */
+ 
+ #define N 4
+ struct S { float x[N]; };
+ struct T { int x[N]; };
+ 
+ struct T
+ foo (struct S x)
+ {
+   struct T res;
+   for (int i = 0; i < N; ++i)
+     res.x[i] = __builtin_signbit (x.x[i]) ? -1 : 0;
+   return res;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/loongarch/builtin_thread_pointer.c gcc-12.4.0/gcc/testsuite/gcc.target/loongarch/builtin_thread_pointer.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/loongarch/builtin_thread_pointer.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/loongarch/builtin_thread_pointer.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target tls_native } */
+ /* { dg-options "-O2" } */
+ /* { dg-final { scan-assembler "or\t\\\$r4,\\\$r2,\\\$r0" } } */
+ 
+ void *
+ get_tp ()
+ {
+   return __builtin_thread_pointer ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/loongarch/cas-acquire.c gcc-12.4.0/gcc/testsuite/gcc.target/loongarch/cas-acquire.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/loongarch/cas-acquire.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/loongarch/cas-acquire.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,82 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target c99_runtime } */
+ /* { dg-require-effective-target pthread } */
+ /* { dg-options "-std=c99 -pthread" } */
+ 
+ /* https://github.com/llvm/llvm-project/pull/67391#issuecomment-1752403934
+    reported that this had failed with GCC and 3A6000.  */
+ 
+ #include 
+ #include 
+ #include 
+ #include 
+ 
+ static unsigned int tags[32];
+ static unsigned int vals[32];
+ 
+ static void *
+ writer_entry (void *data)
+ {
+   atomic_uint *pt = (atomic_uint *)tags;
+   atomic_uint *pv = (atomic_uint *)vals;
+ 
+   for (unsigned int n = 1; n < 10000; n++)
+     {
+       atomic_store_explicit (&pv[n & 31], n, memory_order_release);
+       atomic_store_explicit (&pt[n & 31], n, memory_order_release);
+     }
+ 
+   return NULL;
+ }
+ 
+ static void *
+ reader_entry (void *data)
+ {
+   atomic_uint *pt = (atomic_uint *)tags;
+   atomic_uint *pv = (atomic_uint *)vals;
+   int i;
+ 
+   for (;;)
+     {
+       for (i = 0; i < 32; i++)
+         {
+           unsigned int tag = 0;
+           bool res;
+ 
+           res = atomic_compare_exchange_weak_explicit (
+               &pt[i], &tag, 0, memory_order_acquire, memory_order_acquire);
+           if (!res)
+             {
+               unsigned int val;
+ 
+               val = atomic_load_explicit (&pv[i], memory_order_relaxed);
+               if (val < tag)
+                 __builtin_trap ();
+             }
+         }
+     }
+ 
+   return NULL;
+ }
+ 
+ int
+ main (int argc, char *argv[])
+ {
+   pthread_t writer;
+   pthread_t reader;
+   int res;
+ 
+   res = pthread_create (&writer, NULL, writer_entry, NULL);
+   if (res < 0)
+     __builtin_trap ();
+ 
+   res = pthread_create (&reader, NULL, reader_entry, NULL);
+   if (res < 0)
+     __builtin_trap ();
+ 
+   res = pthread_join (writer, NULL);
+   if (res < 0)
+     __builtin_trap ();
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/loongarch/eh_return-normal-return.c gcc-12.4.0/gcc/testsuite/gcc.target/loongarch/eh_return-normal-return.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/loongarch/eh_return-normal-return.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/loongarch/eh_return-normal-return.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,38 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+ 
+ #include 
+ 
+ int foo ()  __attribute__((noinline));
+ int main ();
+ 
+ int
+ foo () {
+ 
+   int t;
+ 
+   /* prevent optimization using asm */
+   asm ("" : "=r" (t) : "0" (-1));
+   asm ("" : "=r" (t) : "0" (t ? 1 : 0));
+ 
+   if (t == 0)
+     /* never reached */
+     __builtin_eh_return (0, __builtin_return_address (0));
+ 
+   else if (t == 1)
+     /* return here */
+     return 202312;
+ 
+   else
+     /* never reached: prevent vrp optimization in main */
+     return 0;
+ }
+ 
+ int
+ main ()
+ {
+   if (foo() == 202312)
+     return 0; 
+   else
+     abort ();
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/clone1.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/clone1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/clone1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/clone1.c	Thu Jun 20 08:08:08 2024
*************** long mod_func_or (long a, long b, long c
*** 21,26 ****
    return mod_func (a, b) | c;
  }
  
! /* { dg-final { scan-assembler-times {\mdivd\M}  1 } } */
! /* { dg-final { scan-assembler-times {\mmulld\M} 1 } } */
! /* { dg-final { scan-assembler-times {\mmodsd\M} 1 } } */
--- 21,27 ----
    return mod_func (a, b) | c;
  }
  
! /* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */
! /* { dg-final { scan-assembler-times {\mdivd\M}  1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmulld\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmodsd\M} 1 { xfail *-*-* } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/clone3.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/clone3.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/clone3.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/clone3.c	Thu Jun 20 08:08:08 2024
*************** long mod_func_or (long a, long b, long c
*** 27,33 ****
    return mod_func (a, b) | c;
  }
  
! /* { dg-final { scan-assembler-times {\mdivd\M}  1 } } */
! /* { dg-final { scan-assembler-times {\mmulld\M} 1 } } */
! /* { dg-final { scan-assembler-times {\mmodsd\M} 2 } } */
  /* { dg-final { scan-assembler-times {\mpld\M}   1 } } */
--- 27,34 ----
    return mod_func (a, b) | c;
  }
  
! /* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */
! /* { dg-final { scan-assembler-times {\mdivd\M}  1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmulld\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmodsd\M} 2 { xfail *-*-* } } } */
  /* { dg-final { scan-assembler-times {\mpld\M}   1 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-0.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-0.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-0.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-0.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ /* { dg-do compile { target powerpc*-*-darwin* } } */
+ /* { dg-require-effective-target ilp32 } */
+ /* { dg-options "-Wno-long-long" } */
+ 
+ #include "darwin-structs-0.h"
+ 
+ int tcd[sizeof(cd) != 12 ? -1 : 1];
+ int acd[__alignof__(cd) != 4 ? -1 : 1];
+ 
+ int sdc[sizeof(dc) != 16 ? -1 : 1];
+ int adc[__alignof__(dc) != 8 ? -1 : 1];
+ 
+ int scL[sizeof(cL) != 12 ? -1 : 1];
+ int acL[__alignof__(cL) != 4 ? -1 : 1];
+ 
+ int sLc[sizeof(Lc) != 16 ? -1 : 1];
+ int aLc[__alignof__(Lc) != 8 ? -1 : 1];
+ 
+ int scD[sizeof(cD) != 32 ? -1 : 1];
+ int acD[__alignof__(cD) != 16 ? -1 : 1];
+ 
+ int sDc[sizeof(Dc) != 32 ? -1 : 1];
+ int aDc[__alignof__(Dc) != 16 ? -1 : 1];
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-1.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,27 ----
+ /* { dg-do compile { target powerpc*-*-darwin* } } */
+ /* { dg-require-effective-target ilp32 } */
+ /* { dg-options "-Wno-long-long" } */
+ 
+ #pragma pack(push, 1)
+ 
+ #include "darwin-structs-0.h"
+ 
+ int tcd[sizeof(cd) != 9 ? -1 : 1];
+ int acd[__alignof__(cd) != 1 ? -1 : 1];
+ 
+ int sdc[sizeof(dc) != 9 ? -1 : 1];
+ int adc[__alignof__(dc) != 1 ? -1 : 1];
+ 
+ int scL[sizeof(cL) != 9 ? -1 : 1];
+ int acL[__alignof__(cL) != 1 ? -1 : 1];
+ 
+ int sLc[sizeof(Lc) != 9 ? -1 : 1];
+ int aLc[__alignof__(Lc) != 1 ? -1 : 1];
+ 
+ int scD[sizeof(cD) != 17 ? -1 : 1];
+ int acD[__alignof__(cD) != 1 ? -1 : 1];
+ 
+ int sDc[sizeof(Dc) != 17 ? -1 : 1];
+ int aDc[__alignof__(Dc) != 1 ? -1 : 1];
+ 
+ #pragma pack(pop)
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-2.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,27 ----
+ /* { dg-do compile { target powerpc*-*-darwin* } } */
+ /* { dg-require-effective-target ilp32 } */
+ /* { dg-options "-Wno-long-long" } */
+ 
+ #pragma pack(push, 2)
+ 
+ #include "darwin-structs-0.h"
+ 
+ int tcd[sizeof(cd) != 10 ? -1 : 1];
+ int acd[__alignof__(cd) != 2 ? -1 : 1];
+ 
+ int sdc[sizeof(dc) != 10 ? -1 : 1];
+ int adc[__alignof__(dc) != 2 ? -1 : 1];
+ 
+ int scL[sizeof(cL) != 10 ? -1 : 1];
+ int acL[__alignof__(cL) != 2 ? -1 : 1];
+ 
+ int sLc[sizeof(Lc) != 10 ? -1 : 1];
+ int aLc[__alignof__(Lc) != 2 ? -1 : 1];
+ 
+ int scD[sizeof(cD) != 18 ? -1 : 1];
+ int acD[__alignof__(cD) != 2 ? -1 : 1];
+ 
+ int sDc[sizeof(Dc) != 18 ? -1 : 1];
+ int aDc[__alignof__(Dc) != 2 ? -1 : 1];
+ 
+ #pragma pack(pop)
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-structs-0.h gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-structs-0.h
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/darwin-structs-0.h	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/darwin-structs-0.h	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,29 ----
+ typedef struct _cd {
+  char c;
+  double d;
+ } cd;
+ 
+ typedef struct _dc {
+  double d;
+  char c;
+ } dc;
+ 
+ typedef struct _cL {
+  char c;
+  long long L;
+ } cL;
+ 
+ typedef struct _Lc {
+  long long L;
+  char c;
+ } Lc;
+ 
+ typedef struct _cD {
+  char c;
+  long double D;
+ } cD;
+ 
+ typedef struct _Dc {
+  long double D;
+  char c;
+ } Dc;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c	Thu Jun 20 08:08:08 2024
*************** TEST(uint8_t)
*** 54,68 ****
  TEST(int8_t)
  
  /* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero"   4 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none"             4 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none"        4 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none"         1 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none"    1 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign"      16 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero"   4 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign"         0 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none"       4 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero"     0 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none"   2 { target lp64 } } } */
  
  /* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero"   2 { target ilp32 } } } */
--- 54,70 ----
  TEST(int8_t)
  
  /* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero"   4 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none"            24 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none"        8 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none"         2 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none"    2 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign"      16 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero"   4 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign"         0 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_clobber_CC_none"       8 { target lp64 } } } */
! /* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_SI_CC_none"            8 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero"     0 { target lp64 } } } */
+ /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none"        2 { target lp64 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none"   2 { target lp64 } } } */
  
  /* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero"   2 { target ilp32 } } } */
*************** TEST(int8_t)
*** 73,78 ****
  /* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign"       8 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero"   2 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign"         0 { target ilp32 } } } */
! /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none"       9 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero"     0 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none"   6 { target ilp32 } } } */
--- 75,82 ----
  /* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign"       8 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero"   2 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign"         0 { target ilp32 } } } */
! /* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_SI_CC_none"           36 { target ilp32 } } } */
! /* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_clobber_CC_none"      16 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero"     0 { target ilp32 } } } */
  /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none"   6 { target ilp32 } } } */
+ /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none"        2 { target ilp32 } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/mod-1.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/mod-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/mod-1.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/mod-1.c	Thu Jun 20 08:08:08 2024
*************** long lsmod (long a, long b) { return a%b
*** 7,19 ****
  unsigned int iumod (unsigned int a, unsigned int b) { return a%b; }
  unsigned long lumod (unsigned long a, unsigned long b) { return a%b; }
  
! /* { dg-final { scan-assembler-times "modsw " 1 } } */
! /* { dg-final { scan-assembler-times "modsd " 1 } } */
! /* { dg-final { scan-assembler-times "moduw " 1 } } */
! /* { dg-final { scan-assembler-times "modud " 1 } } */
! /* { dg-final { scan-assembler-not   "mullw "   } } */
! /* { dg-final { scan-assembler-not   "mulld "   } } */
! /* { dg-final { scan-assembler-not   "divw "    } } */
! /* { dg-final { scan-assembler-not   "divd "    } } */
! /* { dg-final { scan-assembler-not   "divwu "   } } */
! /* { dg-final { scan-assembler-not   "divdu "   } } */
--- 7,20 ----
  unsigned int iumod (unsigned int a, unsigned int b) { return a%b; }
  unsigned long lumod (unsigned long a, unsigned long b) { return a%b; }
  
! /* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */
! /* { dg-final { scan-assembler-times {\mmodsw\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmodsd\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmoduw\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmodud\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mmullw\M}   { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mmulld\M}   { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mdivw\M}    { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mdivd\M}    { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mdivwu\M}   { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mdivdu\M}   { xfail *-*-* } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/mod-2.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/mod-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/mod-2.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/mod-2.c	Thu Jun 20 08:08:08 2024
***************
*** 5,12 ****
  int ismod (int a, int b) { return a%b; }
  unsigned int iumod (unsigned int a, unsigned int b) { return a%b; }
  
! /* { dg-final { scan-assembler-times "modsw " 1 } } */
! /* { dg-final { scan-assembler-times "moduw " 1 } } */
! /* { dg-final { scan-assembler-not   "mullw "   } } */
! /* { dg-final { scan-assembler-not   "divw "    } } */
! /* { dg-final { scan-assembler-not   "divwu "   } } */
--- 5,13 ----
  int ismod (int a, int b) { return a%b; }
  unsigned int iumod (unsigned int a, unsigned int b) { return a%b; }
  
! /* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */
! /* { dg-final { scan-assembler-times {\mmodsw\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-times {\mmoduw\M} 1 { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mmullw\M}   { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mdivw\M}    { xfail *-*-* } } } */
! /* { dg-final { scan-assembler-not   {\mdivwu\M}   { xfail *-*-* } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c	Thu Jun 20 08:08:08 2024
*************** __int128 s_mod(__int128 a, __int128 b)
*** 23,27 ****
  
  /* { dg-final { scan-assembler {\mvdivsq\M} } } */
  /* { dg-final { scan-assembler {\mvdivuq\M} } } */
! /* { dg-final { scan-assembler {\mvmodsq\M} } } */
! /* { dg-final { scan-assembler {\mvmoduq\M} } } */
--- 23,28 ----
  
  /* { dg-final { scan-assembler {\mvdivsq\M} } } */
  /* { dg-final { scan-assembler {\mvdivuq\M} } } */
! /* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */
! /* { dg-final { scan-assembler {\mvmodsq\M} { xfail *-*-* } } } */
! /* { dg-final { scan-assembler {\mvmoduq\M} { xfail *-*-* } } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-1.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,25 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target vmx_hw } */
+ /* { dg-options "-O2 -maltivec" } */
+ 
+ /* Verify it run successfully.  */
+ 
+ #include 
+ 
+ __attribute__ ((noipa))
+ vector signed int
+ test ()
+ {
+   vector signed int v = {-16, -16, -16, -16};
+   vector signed int res = vec_sld (v, v, 3);
+   return res;
+ }
+ 
+ int
+ main ()
+ {
+   vector signed int res = test ();
+   if (res[0] != 0xf0ffffff)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-2-run.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-2-run.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-2-run.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-2-run.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,50 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target vsx_hw } */
+ /* { dg-options "-O2 -mvsx" } */
+ 
+ /* Verify it doesn't generate wrong code.  */
+ 
+ #include "pr109069-2.h"
+ 
+ int
+ main ()
+ {
+   vector unsigned char res1 = test1 ();
+   for (int i = 0; i < 16; i++)
+     if (res1[i] != 0xd)
+       __builtin_abort ();
+ 
+   vector signed short res2 = test2 ();
+   for (int i = 0; i < 8; i++)
+     if (res2[i] != 0x7777)
+       __builtin_abort ();
+ 
+   vector signed int res3 = test3 ();
+   vector unsigned int res4 = test4 ();
+   vector float res6 = test6 ();
+   for (int i = 0; i < 4; i++)
+     {
+       if (res3[i] != 0xbbbbbbbb)
+ 	__builtin_abort ();
+       if (res4[i] != 0x7070707)
+ 	__builtin_abort ();
+       U32b u;
+       u.f = res6[i];
+       if (u.i != 0x17171717)
+ 	__builtin_abort ();
+     }
+ 
+   vector unsigned long long res5 = test5 ();
+   vector double res7 = test7 ();
+   for (int i = 0; i < 2; i++)
+     {
+       if (res5[i] != 0x4545454545454545ll)
+ 	__builtin_abort ();
+       U64b u;
+       u.f = res7[i];
+       if (u.i != 0x5454545454545454ll)
+ 	__builtin_abort ();
+     }
+   return 0;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_vsx_ok } */
+ /* Disable rs6000 optimize_swaps as it drops some REG_EQUAL
+    notes on const vector and affects test point here.  */
+ /* { dg-options "-O2 -mvsx -mno-optimize-swaps" } */
+ 
+ /* Verify we can optimize away vector shifting if every byte
+    of vector is the same.  */
+ 
+ #include "pr109069-2.h"
+ 
+ /* { dg-final { scan-assembler-not {\mvsldoi\M} } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.h gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.h
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.h	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109069-2.h	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,83 ----
+ #include 
+ 
+ typedef union
+ {
+   unsigned int i;
+   float f;
+ } U32b;
+ 
+ typedef union
+ {
+   unsigned long long i;
+   double f;
+ } U64b;
+ 
+ __attribute__ ((noipa))
+ vector unsigned char
+ test1 ()
+ {
+   vector unsigned char v = {0xd, 0xd, 0xd, 0xd, 0xd, 0xd, 0xd, 0xd,
+ 			    0xd, 0xd, 0xd, 0xd, 0xd, 0xd, 0xd, 0xd};
+   vector unsigned char res = vec_sld (v, v, 3);
+   return res;
+ }
+ 
+ __attribute__ ((noipa))
+ vector signed short
+ test2 ()
+ {
+   vector signed short v
+     = {0x7777, 0x7777, 0x7777, 0x7777, 0x7777, 0x7777, 0x7777, 0x7777};
+   vector signed short res = vec_sld (v, v, 5);
+   return res;
+ }
+ 
+ __attribute__ ((noipa))
+ vector signed int
+ test3 ()
+ {
+   vector signed int v = {0xbbbbbbbb, 0xbbbbbbbb, 0xbbbbbbbb, 0xbbbbbbbb};
+   vector signed int res = vec_sld (v, v, 7);
+   return res;
+ }
+ 
+ __attribute__ ((noipa))
+ vector unsigned int
+ test4 ()
+ {
+   vector unsigned int v = {0x07070707, 0x07070707, 0x07070707, 0x07070707};
+   vector unsigned int res = vec_sld (v, v, 9);
+   return res;
+ }
+ 
+ __attribute__ ((noipa))
+ vector unsigned long long
+ test5 ()
+ {
+   vector unsigned long long v = {0x4545454545454545ll, 0x4545454545454545ll};
+   vector unsigned long long res = vec_sld (v, v, 10);
+   return res;
+ }
+ 
+ __attribute__ ((noipa))
+ vector float
+ test6 ()
+ {
+   U32b u;
+   u.i = 0x17171717;
+   vector float vf = {u.f, u.f, u.f, u.f};
+   vector float res = vec_sld (vf, vf, 11);
+   return res;
+ }
+ 
+ __attribute__ ((noipa))
+ vector double
+ test7 ()
+ {
+   U64b u;
+   u.i = 0x5454545454545454ll;
+   vector double vf = {u.f, u.f};
+   vector double res = vec_sld (vf, vf, 13);
+   return res;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109932-1.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109932-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109932-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109932-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* { dg-require-effective-target int128 } */
+ /* { dg-require-effective-target powerpc_altivec_ok } */
+ /* { dg-options "-maltivec -mno-vsx" } */
+ 
+ /* Verify there is no ICE but one expected error message instead.  */
+ 
+ #include 
+ 
+ extern vector signed __int128 res_vslll;
+ extern unsigned long long aull[2];
+ 
+ void
+ testVectorInt128Pack ()
+ {
+   res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109932-2.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109932-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr109932-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr109932-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,17 ----
+ /* { dg-require-effective-target int128 } */
+ /* { dg-require-effective-target powerpc_altivec_ok } */
+ /* { dg-options "-maltivec -mno-vsx" } */
+ 
+ /* Verify there is no ICE but one expected error message instead.  */
+ 
+ #include 
+ 
+ extern vector signed __int128 res_vslll;
+ extern unsigned long long aull[2];
+ 
+ void
+ testVectorInt128Pack ()
+ {
+   res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr110011.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr110011.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr110011.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr110011.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,42 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target float128_runtime } */
+ /* Force long double to be with IBM format here, to verify
+    _Float128 constant still uses its own format (IEEE) for
+    encoding rather than IBM format.  */
+ /* { dg-options "-mfp-in-toc -mabi=ibmlongdouble" } */
+ /* { dg-add-options float128 } */
+ 
+ #define MPFR_FLOAT128_MAX 0x1.ffffffffffffffffffffffffffffp+16383f128
+ 
+ __attribute__ ((noipa))
+ _Float128 f128_max ()
+ {
+   return MPFR_FLOAT128_MAX;
+ }
+ 
+ typedef union
+ {
+   int w[4];
+   _Float128 f128;
+ } U;
+ 
+ int main ()
+ {
+ 
+   U umax;
+   umax.f128 = f128_max ();
+   /* ieee float128 max:
+      7ffeffff ffffffff ffffffff ffffffff.  */
+   if (umax.w[1] != 0xffffffff || umax.w[2] != 0xffffffff)
+     __builtin_abort ();
+ #ifdef __LITTLE_ENDIAN__
+   if (umax.w[0] != 0xffffffff || umax.w[3] != 0x7ffeffff)
+     __builtin_abort ();
+ #else
+   if (umax.w[3] != 0xffffffff || umax.w[0] != 0x7ffeffff)
+     __builtin_abort ();
+ #endif
+ 
+   return 0;
+ }
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr110411-1.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr110411-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr110411-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr110411-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,21 ----
+ /* PR target/110411 */
+ /* { dg-options "-O2 -mdejagnu-cpu=power10 -mblock-ops-vector-pair" } */
+ 
+ /* Verify we do not ICE on the following.  */
+ 
+ #include 
+ 
+ struct s {
+   long a;
+   long b;
+   long c;
+   long d: 1;
+ };
+ unsigned long ptr;
+ 
+ void
+ bug (struct s *dst)
+ {
+   struct s *src = (struct s *)(ptr & ~0xFUL);
+   memcpy (dst, src, sizeof(struct s));
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr110411-2.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr110411-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr110411-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr110411-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* PR target/110411 */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+ 
+ /* Verify we do not ICE on the following.  */
+ 
+ void
+ bug (__vector_quad *dst)
+ {
+   dst = (__vector_quad *)((unsigned long)dst & ~0xFUL);
+   __builtin_mma_xxsetaccz (dst);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr111380-1.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr111380-1.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr111380-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr111380-1.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target vect_int } */
+ /* { dg-options "-O2 -mdejagnu-cpu=power9" } */
+ 
+ /* Verify it emits error message on inlining even without LTO.  */
+ 
+ vector int c, a, b;
+ 
+ static inline void __attribute__ ((__always_inline__))
+ foo () /* { dg-error "inlining failed in call to .* target specific option mismatch" } */
+ {
+   c = a + b;
+ }
+ 
+ __attribute__ ((target ("cpu=power8")))
+ int main ()
+ {
+   foo (); /* { dg-message "called from here" } */
+   c = a + b;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr111380-2.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr111380-2.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr111380-2.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr111380-2.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target vect_int } */
+ /* { dg-options "-O2 -mno-vsx" } */
+ 
+ /* Verify it emits error message on inlining even without LTO.  */
+ 
+ vector int c, a, b;
+ 
+ static inline void __attribute__ ((__always_inline__))
+ foo () /* { dg-error "inlining failed in call to .* target specific option mismatch" } */
+ {
+   c = a + b;
+ }
+ 
+ __attribute__ ((target ("vsx")))
+ int main ()
+ {
+   foo (); /* { dg-message "called from here" } */
+   c = a + b;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr113950.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr113950.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr113950.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr113950.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,24 ----
+ /* PR target/113950 */
+ /* { dg-require-effective-target powerpc_vsx_ok } */
+ /* { dg-options "-O2 -mvsx" } */
+ 
+ /* Verify we do not ICE on the following.  */
+ 
+ void abort (void);
+ 
+ int main ()
+ {
+   int i;
+   vector signed long long vsll_result, vsll_expected_result;
+   signed long long sll_arg1;
+ 
+   sll_arg1 = 300;
+   vsll_expected_result = (vector signed long long) {300, 300};
+   vsll_result = __builtin_vsx_splat_2di (sll_arg1);  
+ 
+   for (i = 0; i < 2; i++)
+     if (vsll_result[i] != vsll_expected_result[i])
+       abort();
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr70243.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr70243.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr70243.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr70243.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,41 ----
+ /* { dg-do compile */
+ /* { dg-require-effective-target powerpc_vsx_ok } */
+ /* { dg-options "-O2 -mvsx" } */
+ 
+ /* PR 70423, Make sure we don't generate vmaddfp or vnmsubfp.  These
+    instructions have different rounding modes than the VSX instructions
+    xvmaddsp and xvnmsubsp.  These tests are written where the 3 inputs and
+    target are all separate registers.  Because vmaddfp and vnmsubfp are no
+    longer generated the compiler will have to generate an xsmaddsp or xsnmsubsp
+    instruction followed by a move operation.  */
+ 
+ #include 
+ 
+ vector float
+ do_add1 (vector float dummy, vector float a, vector float b, vector float c)
+ {
+   return (a * b) + c;
+ }
+ 
+ vector float
+ do_nsub1 (vector float dummy, vector float a, vector float b, vector float c)
+ {
+   return -((a * b) - c);
+ }
+ 
+ vector float
+ do_add2 (vector float dummy, vector float a, vector float b, vector float c)
+ {
+   return vec_madd (a, b, c);
+ }
+ 
+ vector float
+ do_nsub2 (vector float dummy, vector float a, vector float b, vector float c)
+ {
+   return vec_nmsub (a, b, c);
+ }
+ 
+ /* { dg-final { scan-assembler     {\mxvmadd[am]sp\M}  } } */
+ /* { dg-final { scan-assembler     {\mxvnmsub[am]sp\M} } } */
+ /* { dg-final { scan-assembler-not {\mvmaddfp\M}       } } */
+ /* { dg-final { scan-assembler-not {\mvnmsubfp\M}      } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr88309.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr88309.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr88309.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr88309.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,27 ----
+ /* { dg-require-effective-target powerpc_vsx_ok } */
+ /* { dg-options "-mvsx -O2 -fprefetch-loop-arrays" } */
+ 
+ /* Verify there is no ICE or hanging.  */
+ 
+ #include 
+ 
+ void b(float *c, vector float a, vector float, vector float)
+ {
+   vector float d;
+   vector char ahbc;
+   vec_xst(vec_perm(a, d, ahbc), 0, c);
+ }
+ 
+ vector float e(vector unsigned);
+ 
+ void f() {
+   float *dst;
+   int g = 0;
+   for (;; g += 16) {
+     vector unsigned m, i;
+     vector unsigned n, j;
+     vector unsigned k, l;
+     b(dst + g * 3, e(m), e(n), e(k));
+     b(dst + (g + 4) * 3, e(i), e(j), e(l));
+   }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr96762.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr96762.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/pr96762.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/pr96762.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,13 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+ 
+ /* Verify there is no ICE on ilp32 env.  */
+ 
+ extern void foo (char *);
+ 
+ void
+ bar (void)
+ {
+   char zj[] = "XXXXXXXXXXXXXXXX";
+   foo (zj);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p7-novsx.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p7-novsx.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p7-novsx.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p7-novsx.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,22 ----
+ /* PR target/101865 */
+ /* { dg-do preprocess } */
+ /* { dg-options "-mdejagnu-cpu=power7 -mno-vsx" } */
+ 
+ /* Verify we correctly set the correct set of predefined macros
+    for the given set of options.  */
+ 
+ #ifndef _ARCH_PWR7
+ #error "_ARCH_PWR7 should be defined for this test"
+ #endif
+ 
+ #ifndef __ALTIVEC__
+ #error "__ALTIVEC__ should be defined for this test"
+ #endif
+ 
+ #ifdef _ARCH_PWR8
+ #error "_ARCH_PWR8 should not be defined for this test"
+ #endif
+ 
+ #ifdef __VSX__
+ #error "__VSX__ should not be defined for this test"
+ #endif
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec-novsx.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec-novsx.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec-novsx.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec-novsx.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR target/101865 */
+ /* { dg-do preprocess } */
+ /* { dg-options "-mdejagnu-cpu=power8 -mno-altivec -mno-vsx" } */
+ 
+ /* Verify _ARCH_PWR8 is defined for -mcpu=power8 and after disabling
+    both altivec and vsx.  */
+ 
+ #ifndef _ARCH_PWR7
+ #error "_ARCH_PWR7 should be defined for this test"
+ #endif
+ 
+ #ifndef _ARCH_PWR8
+ #error "_ARCH_PWR8 should be defined for this test"
+ #endif
+ 
+ #ifdef _ARCH_PWR9
+ #error "_ARCH_PWR9 should not be defined for this test"
+ #endif
+ 
+ #ifdef __ALTIVEC__
+ #error "__ALTIVEC__ should not be defined for this test"
+ #endif
+ 
+ #ifdef __VSX__
+ #error "__VSX__ should not be defined for this test"
+ #endif
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-noaltivec.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR target/101865 */
+ /* { dg-do preprocess } */
+ /* { dg-options "-mdejagnu-cpu=power8 -mno-altivec -w" } */
+ 
+ /* Verify _ARCH_PWR8 is defined for -mcpu=power8 and after disabling altivec.
+    The -w option is used to silence the -mno-altivec disables -mvsx warning.  */
+ 
+ #ifndef _ARCH_PWR7
+ #error "_ARCH_PWR7 should be defined for this test"
+ #endif
+ 
+ #ifndef _ARCH_PWR8
+ #error "_ARCH_PWR8 should be defined for this test"
+ #endif
+ 
+ #ifdef _ARCH_PWR9
+ #error "_ARCH_PWR9 should not be defined for this test"
+ #endif
+ 
+ #ifdef __ALTIVEC__
+ #error "__ALTIVEC__ should not be defined for this test"
+ #endif
+ 
+ #ifdef __VSX__
+ #error "__VSX__ should not be defined for this test"
+ #endif
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-novsx.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-novsx.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-novsx.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-novsx.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR target/101865 */
+ /* { dg-do preprocess } */
+ /* { dg-options "-mdejagnu-cpu=power8 -mno-vsx" } */
+ 
+ /* Verify _ARCH_PWR8 is defined for -mcpu=power8 and after disabling vsx.
+    This also confirms __ALTIVEC__ remains set when VSX is disabled.  */
+ 
+ #ifndef _ARCH_PWR7
+ #error "_ARCH_PWR7 should be defined for this test"
+ #endif
+ 
+ #ifndef _ARCH_PWR8
+ #error "_ARCH_PWR8 should be defined for this test"
+ #endif
+ 
+ #ifndef __ALTIVEC__
+ #error "__ALTIVEC__ should be defined for this test"
+ #endif
+ 
+ #ifdef _ARCH_PWR9
+ #error "_ARCH_PWR9 should not be defined for this test"
+ #endif
+ 
+ #ifdef __VSX__
+ #error "__VSX__ should not be defined for this test"
+ #endif
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-pragma-vsx.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-pragma-vsx.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-pragma-vsx.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p8-pragma-vsx.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,101 ----
+ /* PR target/101865 */
+ /* { dg-do run } */
+ /* { dg-require-effective-target p8vector_hw } */
+ /* { dg-options "-mdejagnu-cpu=power8 -mvsx" } */
+ 
+ /* Verify we correctly set our predefined macros in the face of #pragma usage.  */
+ 
+ #include 
+ #include 
+ 
+ volatile int power8_set;
+ volatile int vsx_set;
+ 
+ void
+ test_default (void)
+ {
+ #ifdef _ARCH_PWR8
+   power8_set=1;
+ #else
+   power8_set=0;
+ #endif
+ #ifdef __VSX__
+   vsx_set=1;
+ #else
+   vsx_set=0;
+ #endif
+ }
+ 
+ #pragma GCC target "no-vsx"
+ void
+ test_no_vsx (void)
+ {
+ #ifdef _ARCH_PWR8
+   power8_set=1;
+ #else
+   power8_set=0;
+ #endif
+ #ifdef __VSX__
+   vsx_set=1;
+ #else
+   vsx_set=0;
+ #endif
+ }
+ 
+ #pragma GCC reset_options
+ void
+ test_reset_options (void)
+ {
+ #ifdef _ARCH_PWR8
+   power8_set=1;
+ #else
+   power8_set=0;
+ #endif
+ #ifdef __VSX__
+   vsx_set=1;
+ #else
+   vsx_set=0;
+ #endif
+ }
+ 
+ int
+ main (void)
+ {
+   test_default ();
+   if (!power8_set)
+     {
+       printf ("_ARCH_PWR8 is not set.\n");
+       abort ();
+     }
+   if (!vsx_set)
+     {
+       printf ("__VSX__ is not set.\n");
+       abort ();
+     }
+ 
+   test_no_vsx ();
+   if (!power8_set)
+     {
+       printf ("_ARCH_PWR8 is not set.\n");
+       abort ();
+     }
+   if (vsx_set)
+     {
+       printf ("__VSX__ is unexpectedly set.\n");
+       abort ();
+     }
+ 
+   test_reset_options ();
+   if (!power8_set)
+     {
+       printf ("_ARCH_PWR8 is not set.\n");
+       abort ();
+     }
+   if (!vsx_set)
+     {
+       printf ("__VSX__ is not set.\n");
+       abort ();
+     }
+ 
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p9-novsx.c gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p9-novsx.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/powerpc/predefine-p9-novsx.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/powerpc/predefine-p9-novsx.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,26 ----
+ /* PR target/101865 */
+ /* { dg-do preprocess } */
+ /* { dg-options "-mdejagnu-cpu=power9 -mno-vsx" } */
+ 
+ /* Verify _ARCH_PWR8 is defined for -mcpu=power9 and after disabling vsx.
+    This also confirms __ALTIVEC__ remains set when VSX is disabled.  */
+ 
+ #ifndef _ARCH_PWR7
+ #error "_ARCH_PWR7 should be defined for this test"
+ #endif
+ 
+ #ifndef _ARCH_PWR8
+ #error "_ARCH_PWR8 should be defined for this test"
+ #endif
+ 
+ #ifndef _ARCH_PWR9
+ #error "_ARCH_PWR9 should be defined for this test"
+ #endif
+ 
+ #ifndef __ALTIVEC__
+ #error "__ALTIVEC__ should be defined for this test"
+ #endif
+ 
+ #ifdef __VSX__
+ #error "__VSX__ should not be defined for this test"
+ #endif
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gcc.target/riscv/pr114130.c gcc-12.4.0/gcc/testsuite/gcc.target/riscv/pr114130.c
*** gcc-12.3.0/gcc/testsuite/gcc.target/riscv/pr114130.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gcc.target/riscv/pr114130.c	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64gc -mabi=lp64 -O" } */
+ #include 
+ 
+ void foo(uint32_t *p) {
+     uintptr_t x = *(uintptr_t *)p;
+     uint32_t e = !p ? 0 : (uintptr_t)p >> 1;
+     uint32_t d = (uintptr_t)x;
+     __atomic_compare_exchange(p, &e, &d, 0, __ATOMIC_RELAXED, __ATOMIC_RELAXED);
+ }
+ 
+ /* { dg-final { scan-assembler-times "sext.w\t" 1 } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/imports/pr113125.d gcc-12.4.0/gcc/testsuite/gdc.dg/imports/pr113125.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/imports/pr113125.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/imports/pr113125.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,2 ----
+ module imports.pr113125;
+ struct S113125;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr108842.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr108842.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr108842.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr108842.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,4 ----
+ // { dg-do compile }
+ // { dg-options "-fno-rtti" }
+ module object;
+ enum int[] x = [0, 1, 2];
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr110359.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr110359.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr110359.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr110359.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,22 ----
+ // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110359
+ // { dg-do compile }
+ // { dg-options "-fdump-tree-original" }
+ double pow(in double x, in ulong p)
+ {
+     import gcc.builtins : __builtin_expect;
+     if (__builtin_expect(p == 0, false))
+         return 1;
+     if (__builtin_expect(p == 1, false))
+         return x;
+ 
+     double s = x;
+     double v = 1;
+     for (ulong i = p; i > 1; i >>= 1)
+     {
+         v = (i & 0x1) ? s * v : v;
+         s = s * s;
+     }
+     return v * s;
+ }
+ // { dg-final { scan-tree-dump "if \\(__builtin_expect \\(p == 0, 0\\) != 0\\)" "original" } }
+ // { dg-final { scan-tree-dump "if \\(__builtin_expect \\(p == 1, 0\\) != 0\\)" "original" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514a.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514a.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514a.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514a.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,9 ----
+ // { dg-do "compile" }
+ // { dg-options "-O -fdump-tree-optimized" }
+ immutable uint[] imm_arr = [1,2,3];
+ int test_imm(immutable uint[] ptr)
+ {
+     return imm_arr[2] == 3 ? 123 : 456;
+ }
+ // { dg-final { scan-assembler-not "_d_arraybounds_indexp" } }
+ // { dg-final { scan-tree-dump "return 123;" optimized } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514b.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514b.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514b.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514b.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,8 ----
+ // { dg-do "compile" }
+ // { dg-options "-O" }
+ immutable uint[] imm_ctor_arr;
+ int test_imm_ctor(immutable uint[] ptr)
+ {
+     return imm_ctor_arr[2] == 3;
+ }
+ // { dg-final { scan-assembler "_d_arraybounds_indexp" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514c.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514c.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514c.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514c.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,8 ----
+ // { dg-do "compile" }
+ // { dg-options "-O" }
+ const uint[] cst_arr = [1,2,3];
+ int test_cst(const uint[] ptr)
+ {
+     return cst_arr[2] == 3;
+ }
+ // { dg-final { scan-assembler "_d_arraybounds_indexp" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514d.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514d.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr110514d.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr110514d.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,8 ----
+ // { dg-do "compile" }
+ // { dg-options "-O" }
+ const uint[] cst_ctor_arr;
+ int test_cst_ctor(const uint[] ptr)
+ {
+     return cst_ctor_arr[2] == 3;
+ }
+ // { dg-final { scan-assembler "_d_arraybounds_indexp" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr110712.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr110712.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr110712.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr110712.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,23 ----
+ // { dg-do compile { target { { i?86-*-* x86_64-*-* } && lp64 } } }
+ import gcc.builtins : va_list = __builtin_va_list;
+ 
+ void argpass(va_list *ap);
+ 
+ void pr110712a(va_list ap)
+ {
+     argpass(&ap); // { dg-error "cannot convert parameter" }
+ }
+ 
+ void pr110712b(va_list ap)
+ {
+     va_list ap2 = ap; // { dg-error "cannot convert parameter" }
+ }
+ 
+ struct pr110712c
+ {
+     this(va_list ap)
+     {
+         this.ap = ap; // { dg-error "cannot convert parameter" }
+     }
+     va_list ap;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr110959.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr110959.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr110959.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr110959.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,32 ----
+ // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110959
+ // { dg-do compile }
+ class ArsdExceptionBase : object.Exception {
+     this(string operation, string file = __FILE__, size_t line = __LINE__, Throwable next = null) {
+         super(operation, file, line, next);
+     }
+ }
+ 
+ template ArsdException(alias Type, DataTuple...) {
+     static if(DataTuple.length)
+         alias Parent = ArsdException!(Type, DataTuple[0 .. $-1]);
+     else
+         alias Parent = ArsdExceptionBase;
+ 
+     class ArsdException : Parent {
+         DataTuple data;
+ 
+         this(DataTuple data, string file = __FILE__, size_t line = __LINE__) {
+             this.data = data;
+             static if(is(Parent == ArsdExceptionBase))
+                 super(null, file, line);
+             else
+                 super(data[0 .. $-1], file, line);
+         }
+ 
+         static opCall(R...)(R r, string file = __FILE__, size_t line = __LINE__) {
+             return new ArsdException!(Type, DataTuple, R)(r, file, line);
+         }
+     }
+ }
+ 
+ __gshared pr110959 = ArsdException!"Test"(4, "four");
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr112270.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr112270.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr112270.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr112270.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,7 ----
+ // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112270
+ // { dg-do compile }
+ class CPPNamespaceDeclaration { }
+ bool isNamespaceEqual (CPPNamespaceDeclaration a)
+ {
+     return a ? true : isNamespaceEqual(a);
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr112285.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr112285.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr112285.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr112285.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,13 ----
+ // { dg-do compile }
+ // { dg-additional-options "-fpreview=in" }
+ struct S112285
+ {
+ }
+ 
+ class C112285
+ {
+     S112285 s;
+     void f112285(in C112285)
+     {
+     }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr112290.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr112290.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr112290.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr112290.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,15 ----
+ // { dg-do compile }
+ // { dg-additional-options "-fpreview=in" }
+ struct S112290a
+ {
+     S112290b* p;
+     bool opEquals(in S112290a)
+     {
+         return p == p;
+     }
+ }
+ 
+ struct S112290b
+ {
+     string s;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr113125.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr113125.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr113125.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr113125.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,4 ----
+ // { dg-do compile }
+ // { dg-options "-I $srcdir/gdc.dg" }
+ module pr113125;
+ import imports.pr113125: S113125;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/pr98277.d gcc-12.4.0/gcc/testsuite/gdc.dg/pr98277.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/pr98277.d	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gdc.dg/pr98277.d	Thu Jun 20 08:08:08 2024
*************** ref int getSide(Side side, return ref in
*** 11,13 ****
--- 11,24 ----
  {
      return side == Side.left ? left : right;
  }
+ 
+ enum SideA : int[]
+ {
+     left = [0],
+     right = [1],
+ }
+ 
+ int getSideA(SideA side, ref int left, ref int right)
+ {
+     return side == SideA.left ? left : right;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr110516a.d gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr110516a.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr110516a.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr110516a.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110516
+ // { dg-do compile }
+ // { dg-options "-fno-moduleinfo -fdump-tree-optimized" }
+ void fn110516(ubyte* ptr)
+ {
+     import core.volatile : volatileLoad;
+     volatileLoad(ptr);
+     volatileLoad(ptr);
+     volatileLoad(ptr);
+     volatileLoad(ptr);
+ }
+ // { dg-final { scan-tree-dump-times " ={v} " 4 "optimized" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr110516b.d gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr110516b.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr110516b.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr110516b.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,12 ----
+ // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110516
+ // { dg-do compile }
+ // { dg-options "-fno-moduleinfo -fdump-tree-optimized" }
+ void fn110516(ubyte* ptr)
+ {
+     import core.volatile : volatileStore;
+     volatileStore(ptr, 0);
+     volatileStore(ptr, 0);
+     volatileStore(ptr, 0);
+     volatileStore(ptr, 0);
+ }
+ // { dg-final { scan-tree-dump-times " ={v} " 4 "optimized" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr113758.d gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr113758.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr113758.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr113758.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,19 ----
+ // { dg-do run }
+ // { dg-skip-if "needs gcc/config.d" { ! d_runtime } }
+ struct S113758
+ {
+     int field;
+     ~this() { field = 0; }
+ }
+ 
+ void main()
+ {
+     auto var = S113758(1);
+     f113758d(var);
+     assert(var.field == 1);
+     f113758cxx(var);
+     assert(var.field == 1);
+ }
+ 
+ extern (D)   void f113758d(S113758 arg) { }
+ extern (C++) void f113758cxx(S113758 arg) { }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr114171.d gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr114171.d
*** gcc-12.3.0/gcc/testsuite/gdc.dg/torture/pr114171.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.dg/torture/pr114171.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,29 ----
+ // { dg-do run }
+ // { dg-additional-options "-mavx" { target avx_runtime } }
+ // { dg-skip-if "needs gcc/config.d" { ! d_runtime } }
+ import gcc.builtins;
+ 
+ struct S1
+ {
+     string label;
+ }
+ 
+ struct S2
+ {
+     ulong pad;
+     S1 label;
+ }
+ 
+ pragma(inline, false)
+ auto newitem()
+ {
+     void *p = __builtin_malloc(S2.sizeof);
+     __builtin_memset(p, 0, S2.sizeof);
+     return cast(S2*) p;
+ }
+ 
+ int main()
+ {
+     auto bn = newitem();
+     return bn.label is S1.init ? 0 : 1;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.test/compilable/previewin.d gcc-12.4.0/gcc/testsuite/gdc.test/compilable/previewin.d
*** gcc-12.3.0/gcc/testsuite/gdc.test/compilable/previewin.d	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gdc.test/compilable/previewin.d	Thu Jun 20 08:08:08 2024
*************** version (Win64)
*** 79,92 ****
  {
      void checkReal(in real p)
      {
-         // ref for x87 real, value for double-precision real
-         static assert(__traits(isRef, p) == (real.sizeof > 8));
      }
  
      struct RGB { ubyte r, g, b; }
      void checkNonPowerOf2(in RGB p)
      {
-         static assert(__traits(isRef, p));
      }
  }
  else version (X86_64) // Posix x86_64
--- 79,89 ----
*************** else version (X86_64) // Posix x86_64
*** 94,100 ****
      struct Empty {} // 1 dummy byte passed on the stack
      void checkEmptyStruct(in Empty p)
      {
-         static assert(!__traits(isRef, p));
      }
  
      static if (is(__vector(double[4])))
--- 91,96 ----
*************** else version (X86_64) // Posix x86_64
*** 102,108 ****
          struct AvxVectorWrapper { __vector(double[4]) a; } // 256 bits
          void checkAvxVector(in AvxVectorWrapper p)
          {
-             static assert(!__traits(isRef, p));
          }
      }
  }
--- 98,103 ----
*************** else version (AArch64)
*** 111,116 ****
      alias HVA = __vector(float[4])[4]; // can be passed in 4 vector registers
      void checkHVA(in HVA p)
      {
-         static assert(!__traits(isRef, p));
      }
  }
--- 106,110 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.test/compilable/test23978.d gcc-12.4.0/gcc/testsuite/gdc.test/compilable/test23978.d
*** gcc-12.3.0/gcc/testsuite/gdc.test/compilable/test23978.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.test/compilable/test23978.d	Thu Jun 20 08:08:08 2024
***************
*** 0 ****
--- 1,30 ----
+ // REQUIRED_ARGS: -preview=dip1021 -lowmem
+ // https://issues.dlang.org/show_bug.cgi?id=23978
+ 
+ // Note: this is a memory corruption bug.
+ // Memory returned by `GC.realloc` retains references to old memory in it,
+ // mostly because of the smallarray optimization for `Array(T)`.
+ // If this fails again, it might not be consistent, so try running it multiple times.
+ 
+ class LUBench { }
+ void lup(ulong , ulong , int , int = 1)
+ {
+     new LUBench;
+ }
+ void lup_3200(ulong iters, ulong flops)
+ {
+     lup(iters, flops, 3200);
+ }
+ void raytrace()
+ {
+     struct V
+     {
+         float x, y, z;
+         auto normalize() { }
+         struct Tid { }
+         auto spawnLinked() { }
+         string[] namesByTid;
+         class MessageBox { }
+         auto cross() { }
+     }
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gdc.test/runnable/test23010.d gcc-12.4.0/gcc/testsuite/gdc.test/runnable/test23010.d
*** gcc-12.3.0/gcc/testsuite/gdc.test/runnable/test23010.d	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gdc.test/runnable/test23010.d	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,43 ----
+ // https://issues.dlang.org/show_bug.cgi?id=23010
+ 
+ alias AliasSeq(T...) = T;
+ 
+ mixin template faz() {
+     alias T = AliasSeq!(int);
+     T bar = 12345;
+ 
+     void write1() {
+         assert(bar[0] == 12345);
+     }
+ 
+     AliasSeq!(string, float) foo = AliasSeq!("qwerty", 1.25f);
+ 
+     void write2() {
+         assert(foo == AliasSeq!("qwerty", 1.25f));
+         foo = AliasSeq!("asdfg", 2.5f); // this even crashed before
+         assert(foo == AliasSeq!("asdfg", 2.5f));
+     }
+ }
+ 
+ void main() {
+     mixin faz!();
+     write1;
+     write2;
+     fun;
+ }
+ 
+ // Testing static symbol generation ('toobj.d' changes)
+ 
+ static AliasSeq!(int, string) tup;
+ 
+ void fun()
+ {
+     auto v = tup;
+ 
+     struct S(T...) {
+         static T b;
+     }
+ 
+     alias T = S!(int, float);
+     auto p = T.b;
+ }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/data_initialized_4.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/data_initialized_4.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/data_initialized_4.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/data_initialized_4.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,16 ----
+ ! { dg-do compile }
+ ! { dg-additional-options "-std=legacy" }
+ !
+ ! PR fortran/50410
+ !
+ ! Silently allow overlapping initialization in legacy mode (used to ICE)
+ 
+ program p
+   implicit none
+   type t
+      integer :: g = 1
+   end type t
+   type(t) :: u = t(2)
+   data u%g /3/
+   print *, u    ! this might print "2"
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/data_pointer_3.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/data_pointer_3.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/data_pointer_3.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/data_pointer_3.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,77 ----
+ ! { dg-do compile }
+ ! PR fortran/114474 - DATA and derived types with pointer components
+ 
+ program pr114474
+   implicit none
+   integer, target     :: ii = 42    ! initial data target
+ 
+   integer, target     :: jj = 24
+   integer, pointer    :: qq => jj
+   ! ii and jj resolve slightly differently when the data statement below
+   ! is reached, as jj is resolved outside the structure constructor first
+ 
+   type t
+      integer, pointer :: h
+   end type t
+ 
+   integer, target     :: kk(7) =  23
+   integer, pointer    :: ll(:) => kk
+ 
+   type t1
+      integer          :: m(7)
+   end type t1
+ 
+   type(t)             :: x1, x2, x3, x4, x5
+   type(t), parameter  :: z1 = t(null())
+ 
+   type(t1), target    :: tt = t1([1,2,3,4,5,6,7])
+   type(t1), parameter :: vv = t1(22)
+   type(t1)            :: w1, w2
+   integer,  pointer   :: p1(:) => tt% m
+ 
+   data x1 / t(null())  /
+   data x2 / t(ii)      / ! ii is initial data target
+   data x3 / t(jj)      / ! jj is resolved differently...
+   data x4 / t(tt%m(3)) / ! pointer association with 3rd element
+ 
+   data w1 / t1(12)     /
+   data w2 / t1(vv%m)   /
+ 
+   if (      associated (x1% h)) stop 1
+   if (.not. associated (x2% h)) stop 2
+   if (.not. associated (x3% h)) stop 3
+   if (.not. associated (x4% h)) stop 4
+   if (x2% h /= 42) stop 5
+   if (x3% h /= 24) stop 6
+   if (x4% h /=  3) stop 7
+  
+   if (any (w1%m /= 12  )) stop 8
+   if (any (w2%m /= vv%m)) stop 9
+ end
+ 
+ 
+ subroutine sub
+   implicit none
+ 
+   interface
+      real function myfun (x)
+        real, intent(in) :: x
+      end function myfun
+   end interface
+ 
+   type u
+      procedure(myfun), pointer, nopass :: p
+   end type u
+ 
+   type(u)            :: u3 = u(null())
+   type(u), parameter :: u4 = u(null())
+   type(u)            :: u1, u2
+ 
+   data u1 / u(null()) /
+   data u2 / u(myfun)  /
+ end
+ 
+ real function myfun (x)
+   real, intent(in) :: x
+   myfun = x
+ end function myfun
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/deferred_character_37.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/deferred_character_37.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/deferred_character_37.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/deferred_character_37.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,88 ----
+ ! { dg-do run }
+ ! PR fortran/95947
+ ! PR fortran/110658
+ !
+ ! Test deferred-length character arguments to selected intrinsics
+ ! that may return a character result of same length as first argument:
+ ! CSHIFT, EOSHIFT, MAXVAL, MERGE, MINVAL, PACK, SPREAD, TRANSPOSE, UNPACK
+ 
+ program p
+   implicit none
+   call pr95947 ()
+   call pr110658 ()
+   call s ()
+ 
+ contains
+ 
+   subroutine pr95947
+     character(len=:), allocatable :: m(:)
+ 
+     m = [ character(len=10) :: 'ape','bat','cat','dog','eel','fly','gnu']
+     m = pack (m, mask=(m(:)(2:2) == 'a'))
+ 
+ !   print *, "m = '", m,"' ",               "; expected is ['bat','cat']"
+     if (.not. all (m == ['bat','cat'])) stop 1
+    
+ !   print *, "size(m) =     ", size(m),     "; expected is 2"
+     if (size (m) /= 2) stop 2
+    
+ !   print *, "len(m) =      ", len(m),      "; expected is 10"
+     if (len (m) /= 10) stop 3
+    
+ !   print *, "len_trim(m) = ", len_trim(m), "; expected is 3 3"
+     if (.not. all (len_trim(m) == [3,3])) stop 4
+   end
+ 
+   subroutine pr110658
+     character(len=:), allocatable :: array(:), array2(:,:)
+     character(len=:), allocatable :: res, res1(:), res2(:)
+ 
+     array = ["bb", "aa", "cc"]
+ 
+     res = minval (array)
+     if (res /= "aa") stop 11
+ 
+     res = maxval (array, mask=[.true.,.true.,.false.])
+     if (res /= "bb") stop 12
+ 
+     res1 = cshift (array, 1)
+     if (any (res1 /= ["aa","cc","bb"])) stop 13
+ 
+     res2 = eoshift (res1, -1)
+     if (any (res2 /= ["  ", "aa", "cc"])) stop 14
+ 
+     res2 = pack (array, mask=[.true.,.false.,.true.])
+     if (any (res2 /= ["bb","cc"])) stop 15
+ 
+     res2 = unpack (res2, mask=[.true.,.false.,.true.], field="aa")
+     if (any (res2 /= array)) stop 16
+ 
+     res2 = merge (res2, array, [.true.,.false.,.true.])
+     if (any (res2 /= array)) stop 17
+ 
+     array2 = spread (array, dim=2, ncopies=2)
+     array2 = transpose (array2)
+     if (any (shape (array2) /= [2,3])) stop 18
+     if (any (array2(2,:) /= array))    stop 19
+   end
+ 
+   subroutine s
+     character(:), allocatable :: array1(:), array2(:)
+     array1 = ["aa","cc","bb"]
+     array2 = copy (array1)
+     if (any (array1 /= array2)) stop 20
+   end
+ 
+   function copy (arg) result (res)
+     character(:), allocatable :: res(:)
+     character(*), intent(in)  :: arg(:)
+     integer :: i, k, n
+     k = len (arg)
+     n = size (arg)
+     allocate (character(k) :: res(n))
+     do i = 1, n
+        res(i) = arg(i)
+     end do
+   end
+ 
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/derived_comp_array_ref_8.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/derived_comp_array_ref_8.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/derived_comp_array_ref_8.f90	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/derived_comp_array_ref_8.f90	Thu Jun 20 08:08:09 2024
***************
*** 2,7 ****
--- 2,8 ----
  !
  ! PR fortran/52325
  !
+ implicit none
  real :: f
  cc%a = 5 ! { dg-error "Symbol 'cc' at .1. has no IMPLICIT type" }
  f%a = 5  ! { dg-error "Unexpected '%' for nonderived-type variable 'f' at" }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/findloc_10.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/findloc_10.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/findloc_10.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/findloc_10.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,13 ----
+ ! { dg-do run }
+ ! { dg-options "-fdump-tree-original" }
+ ! PR fortran/110288 - FINDLOC and deferred-length character arguments
+ 
+ program test
+   character(len=:), allocatable :: array(:)
+   character(len=:), allocatable :: value
+   array = ["bb", "aa"]
+   value = "aa"
+   if (findloc (array, value, dim=1) /= 2) stop 1
+ end program test
+ 
+ ! { dg-final { scan-tree-dump "_gfortran_findloc2_s1 \\(.*, \\.array, \\.value\\)" "original" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/findloc_9.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/findloc_9.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/findloc_9.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/findloc_9.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,19 ----
+ ! { dg-do compile }
+ ! { dg-options "-fdump-tree-original" }
+ ! PR fortran/110585 - simplification of FINDLOC for constant complex arguments
+ 
+ program mvce
+   implicit none
+   integer, parameter :: a(*) = findloc([(1.,0.),(2.,1.)], (2.,0.))
+   integer, parameter :: b(*) = findloc([(1.,0.),(2.,1.)], (2.,0.), back=.true.)
+   integer, parameter :: c(*) = findloc([(1.,0.),(2.,1.)], (2.,1.))
+   integer, parameter :: d(*) = findloc([(1.,0.),(2.,1.)], (2.,1.), back=.true.)
+   integer, parameter :: e    = findloc([(1.,0.),(2.,1.)], (2.,1.), dim=1)
+   if (a(1) /= 0) stop 1
+   if (b(1) /= 0) stop 2
+   if (c(1) /= 2) stop 3
+   if (d(1) /= 2) stop 4
+   if (e    /= 2) stop 5
+ end
+ 
+ ! { dg-final { scan-tree-dump-not "_gfortran_stop_numeric" "original" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/gomp/pr114825.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/gomp/pr114825.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/gomp/pr114825.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/gomp/pr114825.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,16 ----
+ ! PR fortran/114825
+ 
+ subroutine pr114825(b)
+   type t
+     real, allocatable :: m(:)
+   end type t
+   type(t), allocatable, target :: b(:)
+   type(t), pointer :: d
+   !$omp parallel private(d)
+   d => b(1)
+   !$omp end parallel
+ contains
+   subroutine sub
+     d => b(1)
+   end subroutine sub
+ end subroutine pr114825
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/implied_do_io_8.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/implied_do_io_8.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/implied_do_io_8.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/implied_do_io_8.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,18 ----
+ ! { dg-do run }
+ ! { dg-additional-options "-fcheck=bounds" }
+ ! PR fortran/111837 - out of bounds access with front-end optimization
+ 
+ program implied_do_bug
+   implicit none
+   integer :: i,j,k
+   real    :: arr(1,1,1)
+   integer :: ni(1)
+   ni(1) = 1
+   arr = 1
+   write(*,*) (((arr(i,j,k), i=1,ni(k)), k=1,1), j=1,1)
+   write(*,*) (((arr(i,j,k), i=1,ni(k)), j=1,1), k=1,1)
+   write(*,*) (((arr(k,i,j), i=1,ni(k)), k=1,1), j=1,1)
+   write(*,*) (((arr(k,i,j), i=1,ni(k)), j=1,1), k=1,1)
+   write(*,*) (((arr(j,k,i), i=1,ni(k)), k=1,1), j=1,1)
+   write(*,*) (((arr(j,k,i), i=1,ni(k)), j=1,1), k=1,1)
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/nullify_4.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/nullify_4.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/nullify_4.f90	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/nullify_4.f90	Thu Jun 20 08:08:09 2024
***************
*** 3,8 ****
--- 3,9 ----
  !
  ! Check error recovery; was crashing before.
  !
+ implicit none
  real, pointer :: ptr
  nullify(ptr, mesh%coarser) ! { dg-error "Symbol 'mesh' at .1. has no IMPLICIT type" }
  end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pdt_33.f03 gcc-12.4.0/gcc/testsuite/gfortran.dg/pdt_33.f03
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pdt_33.f03	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pdt_33.f03	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,21 ----
+ ! { dg-do run }
+ !
+ ! Test the fix for PR102003, where len parameters where not returned as constants.
+ !
+ ! Contributed by Harald Anlauf  
+ !
+ program pr102003
+   type pdt(n)
+      integer, len     :: n = 8
+      character(len=n) :: c
+   end type pdt
+   type(pdt(42)) :: p
+   integer, parameter :: m = len (p% c)
+   integer, parameter :: lm = p% c% len
+ 
+   if (m /= 42) stop 1
+   if (len (p% c) /= 42) stop 2
+   if (lm /= 42) stop 3
+   if (p% c% len /= 42) stop 4
+ end
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pointer_init_6.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pointer_init_6.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pointer_init_6.f90	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pointer_init_6.f90	Thu Jun 20 08:08:09 2024
*************** end module m1
*** 21,27 ****
  
  
  module m2
! 
   type :: t
     procedure(s), pointer, nopass :: ppc
   end type
--- 21,27 ----
  
  
  module m2
!  implicit none
   type :: t
     procedure(s), pointer, nopass :: ppc
   end type
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr103715.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr103715.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr103715.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr103715.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,12 ----
+ ! { dg-do compile }
+ ! PR fortran/103715 - ICE in gfc_find_gsymbol
+ !
+ ! valgrind did report an invalid read in check_externals_procedure
+ 
+ program p
+   select type (y => g()) ! { dg-error "Selector shall be polymorphic" }
+   end select
+   call g()
+ end
+ 
+ ! { dg-prune-output "already being used as a FUNCTION" }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr103716.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr103716.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr103716.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr103716.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,15 ----
+ ! { dg-do compile }
+ !
+ ! The gimplifier used to throw a fit on thes two functions.
+ !
+ ! Contributed by Gerhard Steinmetz  
+ !
+ function f1(x)
+    character(*) :: x(*)
+    print *, g(x%len)
+ end
+ 
+ function f2(x)
+    character(*) :: x(3)
+    print *, g(x%len)
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr104908.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr104908.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr104908.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr104908.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,32 ----
+ ! { dg-do compile }
+ ! { dg-additional-options "-fcheck=bounds -fdump-tree-original" }
+ !
+ ! PR fortran/104908 - incorrect out-of-bounds runtime error
+ 
+ program test
+   implicit none
+   type vec
+      integer :: x(3) = [2,4,6]
+   end type vec
+   type(vec) :: w(2)
+   call sub(w)
+ contains
+   subroutine sub (v)
+     class(vec), intent(in) :: v(:)
+     integer :: k, q(3)
+     q = [ (v(1)%x(k), k = 1, 3) ]   ! <-- was failing here after r11-1235
+     print *, q
+   end
+ end
+ 
+ subroutine sub2 (zz)
+   implicit none
+   type vec
+      integer :: x(2,1)
+   end type vec
+   class(vec), intent(in) :: zz(:)   ! used to ICE after r11-1235
+   integer :: k
+   k = zz(1)%x(2,1)
+ end
+ 
+ ! { dg-final { scan-tree-dump-times " above upper bound " 4 "original" } }
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr106999.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr106999.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr106999.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr106999.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,33 ----
+ ! { dg-do compile }
+ ! Test the fix for PR106999
+ ! Contributed by Gerhard Steinmetz  
+ program p
+    type t
+       integer :: i
+       procedure(g), pointer :: f
+    end type
+    class(t), allocatable :: y, z
+    procedure(g), pointer :: ff
+    allocate (z)
+    z%i = 42
+    z%f => g
+    ff => g
+    call r(z%f)
+    call s(z%f) ! { dg-error "Interface mismatch in dummy procedure" }
+    call s(ff)  ! { dg-error "Interface mismatch in dummy procedure" }
+ contains
+    subroutine g(x)
+       class(t) :: x
+       x%i = 84
+    end
+    subroutine r(x)
+       procedure(g) :: x
+       print *, "in r"
+       allocate (y)
+       call x(y)
+       print *, y%i
+    end
+    subroutine s(x)
+       class(*) :: x
+    end subroutine
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr107397.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr107397.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr107397.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr107397.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,10 ----
+ !{ dg-do compile }
+ !
+ program p
+   implicit none
+   type t
+     real :: a = 1.0
+   end type
+   type(t), parameter :: x = z'1' ! { dg-error "incompatible with a BOZ" }
+   x%a = x%a + 2 ! { dg-error "has no IMPLICIT type" }
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr110221.f gcc-12.4.0/gcc/testsuite/gfortran.dg/pr110221.f
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr110221.f	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr110221.f	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,17 ----
+ C PR middle-end/68146
+ C { dg-do compile }
+ C { dg-options "-O2 -w" }
+ C { dg-additional-options "-mavx512f --param vect-partial-vector-usage=2" { target avx512f } }
+       SUBROUTINE CJYVB(V,Z,V0,CBJ,CDJ,CBY,CYY)
+       IMPLICIT DOUBLE PRECISION (A,B,G,O-Y)
+       IMPLICIT COMPLEX*16 (C,Z)
+       DIMENSION CBJ(0:*),CDJ(0:*),CBY(0:*)
+       N=INT(V)
+       CALL GAMMA2(VG,GA)
+       DO 65 K=1,N
+         CBY(K)=CYY
+ 65    CONTINUE
+       CDJ(0)=V0/Z*CBJ(0)-CBJ(1)
+       DO 70 K=1,N
+ 70      CDJ(K)=-(K+V0)/Z*CBJ(K)+CBJ(K-1)
+       END
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr111880.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr111880.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr111880.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr111880.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,22 ----
+ ! { dg-do compile }
+ ! { dg-options "-std=f2018" }
+ ! PR fortran/111880 - redundant warning of obsolescent COMMON with submodule
+ 
+ module third_party_module
+   integer :: some_param
+   common /not_my_code/ some_param   ! { dg-warning "COMMON block" }
+ end module third_party_module
+ 
+ module foo
+   use third_party_module
+   interface
+     module subroutine bar()
+     end subroutine bar
+   end interface
+ end module foo
+ 
+ submodule (foo) foo_submod      ! We do not need a warning here!
+ contains
+   module procedure bar
+   end procedure bar
+ end submodule foo_submod
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr114739.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr114739.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr114739.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr114739.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,11 ----
+ ! { dg-do compile }
+ ! The fix here was triggered by an ICE prior to r14-9489-g3fd46d859cda10
+ ! Before that gfortran gave an incorrect "no implicit type" error for all
+ ! three statements.
+ program main
+   implicit complex(z)
+   implicit character(c)
+   z2%re = 1.
+   z2%im = 2.
+   print *, z2, c%kind
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr88138.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr88138.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr88138.f90	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr88138.f90	Thu Jun 20 08:08:09 2024
***************
*** 1,5 ****
--- 1,6 ----
  ! { dg-do compile }
  program p
+    implicit none
     type t
        character :: c = 'c'
     end type
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr89943_3.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr89943_3.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr89943_3.f90	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr89943_3.f90	Thu Jun 20 08:08:09 2024
*************** submodule(Foo_mod) Foo_smod
*** 22,28 ****
        module subroutine runFoo4C(ndim) bind(C, name="runFu")   ! { dg-error "Mismatch in BIND" }
           use, intrinsic :: iso_c_binding                 ! { dg-error "Unexpected USE statement" }
           implicit none                                   ! { dg-error "Unexpected IMPLICIT NONE statement" }
!          integer(c_int32_t) , intent(in) :: ndim         ! { dg-error "Unexpected data declaration" }
        end subroutine runFoo4C                            ! { dg-error " Expecting END SUBMODULE" }
  
  end submodule Foo_smod
--- 22,28 ----
        module subroutine runFoo4C(ndim) bind(C, name="runFu")   ! { dg-error "Mismatch in BIND" }
           use, intrinsic :: iso_c_binding                 ! { dg-error "Unexpected USE statement" }
           implicit none                                   ! { dg-error "Unexpected IMPLICIT NONE statement" }
!          integer(c_int32_t) , intent(in) :: ndim         ! { dg-error "Symbol 'c_int32_t' at .1. has no IMPLICIT type" }
        end subroutine runFoo4C                            ! { dg-error " Expecting END SUBMODULE" }
  
  end submodule Foo_smod
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/pr89943_4.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/pr89943_4.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/pr89943_4.f90	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/pr89943_4.f90	Thu Jun 20 08:08:09 2024
*************** submodule(Foo_mod) Foo_smod
*** 23,29 ****
        module function runFoo4C(ndim) bind(C, name="runFu")  ! { dg-error "Mismatch in BIND" }
           use, intrinsic :: iso_c_binding     ! { dg-error "Unexpected USE statement in" }
           implicit none                       ! { dg-error "Unexpected IMPLICIT NONE statement" }
!          integer(c_int32_t) , intent(in) :: ndim   ! { dg-error "Unexpected data declaration" }
        end function runFoo4C                  ! { dg-error "Expecting END SUBMODULE" }
  
  end submodule Foo_smod
--- 23,29 ----
        module function runFoo4C(ndim) bind(C, name="runFu")  ! { dg-error "Mismatch in BIND" }
           use, intrinsic :: iso_c_binding     ! { dg-error "Unexpected USE statement in" }
           implicit none                       ! { dg-error "Unexpected IMPLICIT NONE statement" }
!          integer(c_int32_t) , intent(in) :: ndim   ! { dg-error "Symbol 'c_int32_t' at .1. has no IMPLICIT type" }
        end function runFoo4C                  ! { dg-error "Expecting END SUBMODULE" }
  
  end submodule Foo_smod
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/ptr-func-5.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/ptr-func-5.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/ptr-func-5.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/ptr-func-5.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,39 ----
+ ! { dg-do compile }
+ ! PR fortran/109846
+ ! CLASS pointer function result in variable definition context
+ 
+ module foo
+   implicit none
+   type :: parameter_list
+   contains
+     procedure :: sublist, sublist_nores
+   end type
+ contains
+   function sublist (this) result (slist)
+     class(parameter_list), intent(inout) :: this
+     class(parameter_list), pointer       :: slist
+     allocate (slist)
+   end function
+   function sublist_nores (this)
+     class(parameter_list), intent(inout) :: this
+     class(parameter_list), pointer       :: sublist_nores
+     allocate (sublist_nores)
+   end function
+ end module
+ 
+ program example
+   use foo
+   implicit none
+   type(parameter_list) :: plist
+   call sub1 (plist%sublist())
+   call sub1 (plist%sublist_nores())
+   call sub2 (plist%sublist())
+   call sub2 (plist%sublist_nores())
+ contains
+   subroutine sub1 (plist)
+     type(parameter_list), intent(inout) :: plist
+   end subroutine
+   subroutine sub2 (plist)
+     type(parameter_list) :: plist
+   end subroutine
+ end program
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/select_rank_6.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/select_rank_6.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/select_rank_6.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/select_rank_6.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,48 ----
+ ! { dg-do compile }
+ ! PR fortran/100607 - fix diagnostics for SELECT RANK
+ ! Contributed by T.Burnus
+ 
+ program p
+   implicit none
+   integer, allocatable :: A(:,:,:)
+ 
+   allocate(a(5:6,-2:2, 99:100))
+   call foo(a)
+   call bar(a)
+ 
+ contains
+ 
+   subroutine foo(x)
+     integer, allocatable :: x(..)
+     if (rank(x) /= 3) stop 1
+     if (any (lbound(x) /= [5, -2, 99])) stop 2
+ 
+     select rank (x)
+     rank(3)
+       if (any (lbound(x) /= [5, -2, 99])) stop 3
+     end select
+ 
+     select rank (x) ! { dg-error "pointer or allocatable selector at .2." }
+     rank(*)         ! { dg-error "pointer or allocatable selector at .2." }
+       if (rank(x) /= 1) stop 4
+       if (lbound(x, 1) /= 1) stop 5
+     end select
+   end
+ 
+   subroutine bar(x)
+     integer :: x(..)
+     if (rank(x) /= 3) stop 6
+     if (any (lbound(x) /= 1)) stop 7
+ 
+     select rank (x)
+     rank(3)
+       if (any (lbound(x) /= 1)) stop 8
+     end select
+ 
+     select rank (x)
+     rank(*)
+       if (rank(x) /= 1) stop 9
+       if (lbound(x, 1) /= 1) stop 10
+     end select
+   end
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/shape_12.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/shape_12.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/shape_12.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/shape_12.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,51 ----
+ ! { dg-do run }
+ !
+ ! PR fortran/115150
+ !
+ ! Check that SHAPE handles zero-sized arrays correctly
+ !
+ implicit none
+ call one
+ call two
+ 
+ contains
+ 
+ subroutine one
+   real,allocatable :: A(:),B(:,:)
+   allocate(a(3:0), b(5:1, 2:5))
+ 
+   if (any (shape(a) /= [0])) stop 1
+   if (any (shape(b) /= [0, 4])) stop 2
+   if (size(a) /= 0) stop 3
+   if (size(b) /= 0) stop 4
+   if (any (lbound(a) /= [1])) stop 5
+   if (any (lbound(b) /= [1, 2])) stop 6
+   if (any (ubound(a) /= [0])) stop 5
+   if (any (ubound(b) /= [0,5])) stop 6
+ end
+ 
+ subroutine two
+ integer :: x1(10), x2(10,10)
+ call f(x1, x2, -3)
+ end
+ 
+ subroutine f(y1, y2, n)
+   integer, value :: n
+   integer :: y1(1:n)
+   integer :: y2(1:n,4,2:*)
+   call g(y1, y2)
+ end
+ 
+ subroutine g(z1, z2)
+   integer :: z1(..), z2(..)
+ 
+   if (any (shape(z1) /= [0])) stop 1
+   if (any (shape(z2) /= [0, 4, -1])) stop 2
+   if (size(z1) /= 0) stop 3
+   if (size(z2) /= 0) stop 4
+   if (any (lbound(z1) /= [1])) stop 5
+   if (any (lbound(z2) /= [1, 1, 1])) stop 6
+   if (any (ubound(z1) /= [0])) stop 5
+   if (any (ubound(z2) /= [0, 4, -1])) stop 6
+ end
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gfortran.dg/use_31.f90 gcc-12.4.0/gcc/testsuite/gfortran.dg/use_31.f90
*** gcc-12.3.0/gcc/testsuite/gfortran.dg/use_31.f90	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gfortran.dg/use_31.f90	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,26 ----
+ ! { dg-do compile }
+ !
+ ! PR fortran/107426
+ ! This example used to generate an ICE, caused by the use stmt from the nested
+ ! procedure declaration setting the result of the C_LOC global intrinsic symbol
+ ! to the symbol of C_PTR from ISO_C_BINDING being imported, before freeing the
+ ! latter symbol because of the rejection of the use statement.
+ !
+ ! Contributed by Gerhard Steinmetz 
+ 
+ module m
+ contains
+    subroutine p() bind(c)
+       use, intrinsic :: iso_c_binding
+       integer, target :: a = 1
+       type(c_ptr) :: z
+       interface
+          subroutine s(x) bind(cc)            ! { dg-error "Missing closing paren" }
+             use, intrinsic :: iso_c_binding  ! { dg-error "Unexpected USE statement in INTERFACE block" }
+             integer(c_int), value :: x       ! { dg-error "Parameter 'c_int' at .1. has not been declared" }
+          end                                 ! { dg-error "END INTERFACE statement expected" }
+       end interface
+       z = c_loc(a)
+       call s(z)
+    end
+ end
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/access10.adb gcc-12.4.0/gcc/testsuite/gnat.dg/access10.adb
*** gcc-12.3.0/gcc/testsuite/gnat.dg/access10.adb	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/access10.adb	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,58 ----
+ --  PR ada/113893
+ --  Testcase by Pascal Pignard 
+ 
+ --  { dg-do run }
+ 
+ with Ada.Text_IO;
+ with Ada.Finalization;
+ 
+ procedure Access10 is
+ 
+    generic
+       type Element_Type is private;
+       with function Image (Item : Element_Type) return String is <>;
+    package Sanitize is
+       type Container is new Ada.Finalization.Controlled with record
+          Data : Element_Type;
+       end record;
+       overriding procedure Finalize (Object : in out Container);
+    end Sanitize;
+ 
+    package body Sanitize is
+       overriding procedure Finalize (Object : in out Container) is
+       begin
+          Ada.Text_IO.Put_Line ("Current:" & Image (Object.Data));
+       end Finalize;
+    end Sanitize;
+ 
+    procedure Test01 is
+       package Float_Sanitized is new Sanitize (Float, Float'Image);
+       V  : Float_Sanitized.Container;
+       C  : constant Float_Sanitized.Container :=
+ 	     (Ada.Finalization.Controlled with 8.8);
+       A  : access Float_Sanitized.Container := 
+ 	     new Float_Sanitized.Container'(Ada.Finalization.Controlled with 7.7);  -- { dg-warning "not be finalized|named" }
+       AC : access constant Float_Sanitized.Container :=
+              new Float_Sanitized.Container'(Ada.Finalization.Controlled with 6.6);  -- { dg-warning "not be finalized|named" }
+    begin
+       V.Data := 9.9 + C.Data + A.Data;
+       Ada.Text_IO.Put_Line ("Value:" & Float'Image (V.Data));
+    end Test01;
+ 
+    procedure Test02 is
+       type Float_Sanitized is new Float;
+       V  : Float_Sanitized;
+       C  : constant Float_Sanitized        := (8.8);
+       A  : access Float_Sanitized          := new Float_Sanitized'(7.7);
+       AC : access constant Float_Sanitized := new Float_Sanitized'(6.6);
+    begin
+       V := 9.9 + C + A.all;
+       Ada.Text_IO.Put_Line ("Value:" & Float_Sanitized'Image (V));
+    end Test02;
+ 
+ begin
+    Ada.Text_IO.Put_Line ("Test01:");
+    Test01;
+    Ada.Text_IO.Put_Line ("Test02:");
+    Test02;
+ end;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/incomplete8.adb gcc-12.4.0/gcc/testsuite/gnat.dg/incomplete8.adb
*** gcc-12.3.0/gcc/testsuite/gnat.dg/incomplete8.adb	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/incomplete8.adb	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,22 ----
+ -- PR ada/114708
+ -- Reported by Jere 
+ 
+ -- { dg-do compile }
+ 
+ procedure Incomplete8 is
+ 
+   generic
+     type Element_Type(<>);
+   package Test_Incomplete_Formal is
+     type Element_Access is access Element_Type;
+   end Test_Incomplete_Formal;
+ 
+   type Node;
+ 
+   package P is new Test_Incomplete_Formal(Node);
+ 
+   type Node is limited null record;
+    
+ begin
+   null;
+ end;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/opt102.adb gcc-12.4.0/gcc/testsuite/gnat.dg/opt102.adb
*** gcc-12.3.0/gcc/testsuite/gnat.dg/opt102.adb	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/opt102.adb	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,10 ----
+ -- { dg-do run }
+ -- { dg-options "-O2 -gnata" }
+ 
+ with Opt102_Pkg; use Opt102_Pkg;
+ 
+ procedure Opt102 is
+   I, F : aliased Integer;
+ begin
+   I := Get (Two, F'Access, null);
+ end;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/opt102_pkg.adb gcc-12.4.0/gcc/testsuite/gnat.dg/opt102_pkg.adb
*** gcc-12.3.0/gcc/testsuite/gnat.dg/opt102_pkg.adb	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/opt102_pkg.adb	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,12 ----
+ package body Opt102_Pkg is
+ 
+   function Get (E : Enum; F, M : access Integer) return Integer is
+   begin
+     case E is
+       when One   => return 0;
+       when Two   => return F.all;
+       when Three => return M.all;
+     end case;
+   end;
+ 
+ end Opt102_Pkg;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/opt102_pkg.ads gcc-12.4.0/gcc/testsuite/gnat.dg/opt102_pkg.ads
*** gcc-12.3.0/gcc/testsuite/gnat.dg/opt102_pkg.ads	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/opt102_pkg.ads	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,10 ----
+ package Opt102_Pkg is
+ 
+   type Enum is (One, Two, Three);
+ 
+   function Get (E : Enum; F, M : access Integer) return Integer
+     with Pre => (E = One) = (F = null and M = null) and
+                 (E = Two) = (F /= null) and
+                 (E = Three) = (M /= null);
+ 
+ end Opt102_Pkg;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/opt104.adb gcc-12.4.0/gcc/testsuite/gnat.dg/opt104.adb
*** gcc-12.3.0/gcc/testsuite/gnat.dg/opt104.adb	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/opt104.adb	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,22 ----
+ -- { dg-do compile }
+ -- { dg-options "-O -gnatws" }
+ 
+ package body Opt104 is
+ 
+    procedure Proc (R : Rec) is
+       Data : Packed_Rec;
+ 
+    begin
+       case R.D is
+          when True =>
+             for I in 1 .. R.Len loop
+                exit;
+             end loop;
+ 
+          when False =>
+             null;
+       end case;
+    end;
+ 
+ end Opt104;
+ 
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/opt104.ads gcc-12.4.0/gcc/testsuite/gnat.dg/opt104.ads
*** gcc-12.3.0/gcc/testsuite/gnat.dg/opt104.ads	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/opt104.ads	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,40 ----
+ package Opt104 is
+ 
+    type Time is record
+       S  : Integer;
+       B1 : Boolean;
+       B2 : Boolean;
+       B3 : Boolean;
+       B4 : Boolean;
+       B5 : Boolean;
+       B6 : Boolean;
+    end record;
+ 
+    Zero_Time : constant Time :=
+      (S  => 0,
+       B1 => False,
+       B2 => False,
+       B3 => False,
+       B4 => False,
+       B5 => False,
+       B6 => False);
+ 
+    type Root is tagged null record;
+ 
+    type Packed_Rec is record
+       R : Root;
+       B : Boolean;
+       T : Time := Zero_Time;
+    end record;
+    pragma Pack (Packed_Rec);
+ 
+    type Rec (D : Boolean) is record
+       case D is
+          when True  => Len : Integer;
+          when False => null;
+       end case;
+    end record;
+ 
+    procedure Proc (R : Rec);
+ 
+ end Opt104;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/predicate15.adb gcc-12.4.0/gcc/testsuite/gnat.dg/predicate15.adb
*** gcc-12.3.0/gcc/testsuite/gnat.dg/predicate15.adb	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/predicate15.adb	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,15 ----
+ -- { dg-do compile }
+ -- { dg-options "-gnata" }
+ 
+ procedure Predicate15 is
+ 
+    type Grid is array (Positive range <>) of Integer with
+       Dynamic_Predicate => Grid'First = 1;
+ 
+    type Grid_Ptr is access Grid;
+ 
+    Data : Grid_Ptr := new Grid (1 .. 10);
+ 
+ begin
+    null;
+ end;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/varsize4.adb gcc-12.4.0/gcc/testsuite/gnat.dg/varsize4.adb
*** gcc-12.3.0/gcc/testsuite/gnat.dg/varsize4.adb	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/varsize4.adb	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,20 ----
+ -- { dg-do compile }
+ 
+ package body Varsize4 is
+ 
+    function Func (Bytes_Read : out Natural) return Arr is
+       Ret : Arr := (others => False);
+    begin
+       Bytes_Read := 0;
+       return Ret;
+    end;
+ 
+    function Get return Natural is
+       Data  : Arr;
+       Bytes : Natural;
+    begin
+       Data := Func (Bytes);
+       return Bytes;
+    end;
+ 
+ end Varsize4;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/varsize4.ads gcc-12.4.0/gcc/testsuite/gnat.dg/varsize4.ads
*** gcc-12.3.0/gcc/testsuite/gnat.dg/varsize4.ads	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/varsize4.ads	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,9 ----
+ with Varsize4_Pkg;
+ 
+ package Varsize4 is
+ 
+    type Arr is array (1 .. Varsize4_Pkg.F) of Boolean;
+ 
+    function Get return Natural;
+ 
+ end Varsize4;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/gnat.dg/varsize4_pkg.ads gcc-12.4.0/gcc/testsuite/gnat.dg/varsize4_pkg.ads
*** gcc-12.3.0/gcc/testsuite/gnat.dg/varsize4_pkg.ads	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/gcc/testsuite/gnat.dg/varsize4_pkg.ads	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,5 ----
+ package Varsize4_Pkg is
+ 
+    function F return Natural;
+ 
+ end Varsize4_Pkg;
diff -Nrcpad gcc-12.3.0/gcc/testsuite/jit.dg/jit.exp gcc-12.4.0/gcc/testsuite/jit.dg/jit.exp
*** gcc-12.3.0/gcc/testsuite/jit.dg/jit.exp	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/jit.dg/jit.exp	Thu Jun 20 08:08:09 2024
*************** proc jit-verify-assembler { args } {
*** 871,879 ****
--- 871,893 ----
  proc jit-verify-assembler-output { args } {
      verbose "jit-verify-assembler: $args"
  
+     if { [llength $args] > 3 } {
+ 	error "jit-verify-assembler-output: too many arguments"
+ 	return
+     }
+ 
      set dg-output-text [lindex $args 0]
      verbose "dg-output-text: ${dg-output-text}"
  
+     if { [llength $args] >= 2 } {
+ 	switch [dg-process-target [lindex $args 1]] {
+ 	    "S" { }
+ 	    "N" { return }
+ 	    "F" { setup_xfail "*-*-*" }
+ 	    "P" { }
+ 	}
+     }
+ 
      upvar 2 name name
      verbose "name: $name"
  
diff -Nrcpad gcc-12.3.0/gcc/testsuite/jit.dg/test-link-section-assembler.c gcc-12.4.0/gcc/testsuite/jit.dg/test-link-section-assembler.c
*** gcc-12.3.0/gcc/testsuite/jit.dg/test-link-section-assembler.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/jit.dg/test-link-section-assembler.c	Thu Jun 20 08:08:09 2024
*************** create_code (gcc_jit_context *ctxt, void
*** 34,37 ****
  }
  
  /* { dg-final { jit-verify-output-file-was-created "" } } */
! /* { dg-final { jit-verify-assembler-output ".section	.my_section" } } */
--- 34,37 ----
  }
  
  /* { dg-final { jit-verify-output-file-was-created "" } } */
! /* { dg-final { jit-verify-assembler-output ".section\\s.my_section" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/jit.dg/test-setting-alignment.c gcc-12.4.0/gcc/testsuite/jit.dg/test-setting-alignment.c
*** gcc-12.3.0/gcc/testsuite/jit.dg/test-setting-alignment.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/jit.dg/test-setting-alignment.c	Thu Jun 20 08:08:09 2024
*************** create_code (gcc_jit_context *ctxt, void
*** 62,66 ****
  }
  
  /* { dg-final { jit-verify-output-file-was-created "" } } */
! /* { dg-final { jit-verify-assembler-output ".comm	foo,4,8" } } */
  /* { dg-final { jit-verify-assembler-output "movl	-16\\\(%rbp\\\), %eax" } } */
--- 62,67 ----
  }
  
  /* { dg-final { jit-verify-output-file-was-created "" } } */
! /* { dg-final { jit-verify-assembler-output ".comm	foo,4,8" { target { ! *-*-darwin* } } } } */
! /* { dg-final { jit-verify-assembler-output ".comm\\s_foo,4,3" { target *-*-darwin* } } } */
  /* { dg-final { jit-verify-assembler-output "movl	-16\\\(%rbp\\\), %eax" } } */
diff -Nrcpad gcc-12.3.0/gcc/testsuite/lib/target-supports.exp gcc-12.4.0/gcc/testsuite/lib/target-supports.exp
*** gcc-12.3.0/gcc/testsuite/lib/target-supports.exp	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/lib/target-supports.exp	Thu Jun 20 08:08:09 2024
*************** proc check_effective_target_aarch64_tlsl
*** 1258,1270 ****
  # emitted, 0 otherwise.
  
  proc check_effective_target_shared { } {
      # Note that M68K has a multilib that supports -fpic but not
      # -fPIC, so we need to check both.  We test with a program that
      # requires GOT references.
      return [check_no_compiler_messages shared executable {
  	extern int foo (void); extern int bar;
  	int baz (void) { return foo () + bar; }
!     } "-shared -fpic"]
  }
  
  # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
--- 1258,1277 ----
  # emitted, 0 otherwise.
  
  proc check_effective_target_shared { } {
+     # Darwin's linker defaults to error on undefined (which makes it look as
+     # if we do not support shared) but we can tell it to allow the symbols used
+     # here to be undefined.
+     set extra_flags ""
+     if { [istarget *-*-darwin\[912\]*] } {
+       set extra_flags "-Wl,-U,_foo,-U,_bar,-U,__Z3foov"
+     }
      # Note that M68K has a multilib that supports -fpic but not
      # -fPIC, so we need to check both.  We test with a program that
      # requires GOT references.
      return [check_no_compiler_messages shared executable {
  	extern int foo (void); extern int bar;
  	int baz (void) { return foo () + bar; }
!     } "-shared -fpic $extra_flags"]
  }
  
  # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
*************** proc check_effective_target_avx512fp16 {
*** 9355,9360 ****
--- 9362,9368 ----
  	void foo (void)
  	{
  	  asm volatile ("vmovw %edi, %xmm0");
+ 	  asm volatile ("vfcmulcph %xmm1, %xmm2, %xmm3{%k1}");
  	}
      } "-O2 -mavx512fp16" ]
  }
*************** proc check_effective_target_aarch64_tiny
*** 10597,10603 ****
  # various architecture extensions via the .arch_extension pseudo-op.
  
  foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"
! 			  "i8mm" "f32mm" "f64mm" "bf16" "sb" "sve2" } {
      eval [string map [list FUNC $aarch64_ext] {
  	proc check_effective_target_aarch64_asm_FUNC_ok { } {
  	  if { [istarget aarch64*-*-*] } {
--- 10605,10611 ----
  # various architecture extensions via the .arch_extension pseudo-op.
  
  foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"
! 			  "i8mm" "f32mm" "f64mm" "bf16" "sb" "sve2" "ls64" } {
      eval [string map [list FUNC $aarch64_ext] {
  	proc check_effective_target_aarch64_asm_FUNC_ok { } {
  	  if { [istarget aarch64*-*-*] } {
*************** proc check_effective_target_o_flag_in_se
*** 11817,11822 ****
--- 11825,11870 ----
  	    return 0
  	}
      }]
+ }
+ 
+ # Return 1 if the given assembler supports hardware transactional memory
+ # instructions with machine type Power10, 0 otherwise.  Cache the result.
+ 
+ proc check_effective_target_powerpc_as_p10_htm { } {
+     global tool
+     global GCC_UNDER_TEST
+ 
+     # Need auto-host.h to check linker support.
+     if { ![file exists ../../auto-host.h ] } {
+ 	return 0
+     }
+ 
+     return [check_cached_effective_target powerpc_as_p10_htm {
+ 
+ 	set src pie[pid].c
+ 	set obj pie[pid].o
+ 
+ 	set f [open $src "w"]
+ 	puts $f "#include \"../../auto-host.h\""
+ 	puts $f "#if HAVE_AS_POWER10_HTM == 0"
+ 	puts $f "# error Assembler does not support htm insns with power10."
+ 	puts $f "#endif"
+ 	close $f
+ 
+ 	verbose "check_effective_target_powerpc_as_p10_htm compiling testfile $src" 2
+ 	set lines [${tool}_target_compile $src $obj object ""]
+ 
+ 	file delete $src
+ 	file delete $obj
+ 
+ 	if [string match "" $lines] then {
+ 	    verbose "check_effective_target_powerpc_as_p10_htm testfile compilation passed" 2
+ 	    return 1
+ 	} else {
+ 	    verbose "check_effective_target_powerpc_as_p10_htm testfile compilation failed" 2
+ 	    return 0
+ 	}
+     }]
  }
  
  # return 1 if LRA is supported.
diff -Nrcpad gcc-12.3.0/gcc/testsuite/obj-c++.dg/encode-10.mm gcc-12.4.0/gcc/testsuite/obj-c++.dg/encode-10.mm
*** gcc-12.3.0/gcc/testsuite/obj-c++.dg/encode-10.mm	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/obj-c++.dg/encode-10.mm	Thu Jun 20 08:08:09 2024
***************
*** 1,5 ****
  /* Test for @encode in templates.  */
- /* { dg-options "-lobjc" } */
  /* { dg-do run } */
  #include            
  #include 
--- 1,4 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/obj-c++.dg/encode-9.mm gcc-12.4.0/gcc/testsuite/obj-c++.dg/encode-9.mm
*** gcc-12.3.0/gcc/testsuite/obj-c++.dg/encode-9.mm	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/obj-c++.dg/encode-9.mm	Thu Jun 20 08:08:09 2024
***************
*** 1,5 ****
  /* Test than @encode is properly instantiated. */
- /* { dg-options "-lobjc" } */
  /* { dg-do run } */
  
  #include            
--- 1,4 ----
diff -Nrcpad gcc-12.3.0/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h gcc-12.4.0/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h
*** gcc-12.3.0/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h	Thu Jun 20 08:08:09 2024
***************
*** 29,34 ****
--- 29,37 ----
  #ifndef __NSObjCRuntime_h_GNUSTEP_BASE_INCLUDE
  #define __NSObjCRuntime_h_GNUSTEP_BASE_INCLUDE
  
+ /* Allow the elaborated enum use in _GS_NAMED_ENUM. */
+ #pragma GCC system_header
+ 
  #ifdef __cplusplus
  #ifndef __STDC_LIMIT_MACROS
  #define __STDC_LIMIT_MACROS 1
diff -Nrcpad gcc-12.3.0/gcc/tree-data-ref.cc gcc-12.4.0/gcc/tree-data-ref.cc
*** gcc-12.3.0/gcc/tree-data-ref.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-data-ref.cc	Thu Jun 20 08:08:09 2024
*************** along with GCC; see the file COPYING3.
*** 73,78 ****
--- 73,79 ----
  
  */
  
+ #define INCLUDE_ALGORITHM
  #include "config.h"
  #include "system.h"
  #include "coretypes.h"
*************** runtime_alias_check_p (ddr_p ddr, class
*** 1632,1637 ****
--- 1633,1645 ----
  				   "runtime alias check not supported for"
  				   " outer loop.\n");
  
+   /* FORNOW: We don't support handling different address spaces.  */
+   if (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (DR_BASE_ADDRESS (DDR_A (ddr)))))
+       != TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (DR_BASE_ADDRESS (DDR_B (ddr))))))
+     return opt_result::failure_at (DR_STMT (DDR_A (ddr)),
+ 				   "runtime alias check between different "
+ 				   "address spaces not supported.\n");
+ 
    return opt_result::success ();
  }
  
*************** create_intersect_range_checks (class loo
*** 2620,2626 ****
  	 Because the maximum values are inclusive, there is an alias
  	 if the maximum value of one segment is equal to the minimum
  	 value of the other.  */
!       min_align = MIN (dr_a.align, dr_b.align);
        cmp_code = LT_EXPR;
      }
  
--- 2628,2636 ----
  	 Because the maximum values are inclusive, there is an alias
  	 if the maximum value of one segment is equal to the minimum
  	 value of the other.  */
!       min_align = std::min (dr_a.align, dr_b.align);
!       min_align = std::min (min_align, known_alignment (dr_a.access_size));
!       min_align = std::min (min_align, known_alignment (dr_b.access_size));
        cmp_code = LT_EXPR;
      }
  
diff -Nrcpad gcc-12.3.0/gcc/tree-inline.cc gcc-12.4.0/gcc/tree-inline.cc
*** gcc-12.3.0/gcc/tree-inline.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-inline.cc	Thu Jun 20 08:08:09 2024
*************** along with GCC; see the file COPYING3.
*** 65,70 ****
--- 65,71 ----
  #include "symbol-summary.h"
  #include "symtab-thunks.h"
  #include "symtab-clones.h"
+ #include "asan.h"
  
  /* I'm not real happy about this, but we need to handle gimple and
     non-gimple trees.  */
*************** copy_bb (copy_body_data *id, basic_block
*** 2210,2222 ****
  	    }
  	  else if (call_stmt
  		   && id->call_stmt
! 		   && gimple_call_internal_p (stmt)
! 		   && gimple_call_internal_fn (stmt) == IFN_TSAN_FUNC_EXIT)
! 	    {
! 	      /* Drop TSAN_FUNC_EXIT () internal calls during inlining.  */
! 	      gsi_remove (©_gsi, false);
! 	      continue;
! 	    }
  
  	  /* Statements produced by inlining can be unfolded, especially
  	     when we constant propagated some operands.  We can't fold
--- 2211,2236 ----
  	    }
  	  else if (call_stmt
  		   && id->call_stmt
! 		   && gimple_call_internal_p (stmt))
! 	    switch (gimple_call_internal_fn (stmt))
! 	      {
! 	      case IFN_TSAN_FUNC_EXIT:
! 		/* Drop .TSAN_FUNC_EXIT () internal calls during inlining.  */
! 		gsi_remove (©_gsi, false);
! 		continue;
! 	      case IFN_ASAN_MARK:
! 		/* Drop .ASAN_MARK internal calls during inlining into
! 		   no_sanitize functions.  */
! 		if (!sanitize_flags_p (SANITIZE_ADDRESS, id->dst_fn)
! 		    && !sanitize_flags_p (SANITIZE_HWADDRESS, id->dst_fn))
! 		  {
! 		    gsi_remove (©_gsi, false);
! 		    continue;
! 		  }
! 		break;
! 	      default:
! 		break;
! 	      }
  
  	  /* Statements produced by inlining can be unfolded, especially
  	     when we constant propagated some operands.  We can't fold
*************** redirect_all_calls (copy_body_data * id,
*** 2992,3015 ****
        gimple *stmt = gsi_stmt (si);
        if (is_gimple_call (stmt))
  	{
- 	  tree old_lhs = gimple_call_lhs (stmt);
  	  struct cgraph_edge *edge = id->dst_node->get_edge (stmt);
  	  if (edge)
  	    {
! 	      gimple *new_stmt
! 		= cgraph_edge::redirect_call_stmt_to_callee (edge);
! 	      /* If IPA-SRA transformation, run as part of edge redirection,
! 		 removed the LHS because it is unused, save it to
! 		 killed_new_ssa_names so that we can prune it from debug
! 		 statements.  */
! 	      if (old_lhs
! 		  && TREE_CODE (old_lhs) == SSA_NAME
! 		  && !gimple_call_lhs (new_stmt))
! 		{
! 		  if (!id->killed_new_ssa_names)
! 		    id->killed_new_ssa_names = new hash_set (16);
! 		  id->killed_new_ssa_names->add (old_lhs);
! 		}
  
  	      if (stmt == last && id->call_stmt && maybe_clean_eh_stmt (stmt))
  		gimple_purge_dead_eh_edges (bb);
--- 3006,3018 ----
        gimple *stmt = gsi_stmt (si);
        if (is_gimple_call (stmt))
  	{
  	  struct cgraph_edge *edge = id->dst_node->get_edge (stmt);
  	  if (edge)
  	    {
! 	      if (!id->killed_new_ssa_names)
! 		id->killed_new_ssa_names = new hash_set (16);
! 	      cgraph_edge::redirect_call_stmt_to_callee (edge,
! 		id->killed_new_ssa_names);
  
  	      if (stmt == last && id->call_stmt && maybe_clean_eh_stmt (stmt))
  		gimple_purge_dead_eh_edges (bb);
*************** copy_body (copy_body_data *id,
*** 3336,3343 ****
    body = copy_cfg_body (id, entry_block_map, exit_block_map,
  			new_entry);
    copy_debug_stmts (id);
!   delete id->killed_new_ssa_names;
!   id->killed_new_ssa_names = NULL;
  
    return body;
  }
--- 3339,3350 ----
    body = copy_cfg_body (id, entry_block_map, exit_block_map,
  			new_entry);
    copy_debug_stmts (id);
!   if (id->killed_new_ssa_names)
!     {
!       ipa_release_ssas_in_hash (id->killed_new_ssa_names);
!       delete id->killed_new_ssa_names;
!       id->killed_new_ssa_names = NULL;
!     }
  
    return body;
  }
diff -Nrcpad gcc-12.3.0/gcc/tree-into-ssa.cc gcc-12.4.0/gcc/tree-into-ssa.cc
*** gcc-12.3.0/gcc/tree-into-ssa.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-into-ssa.cc	Thu Jun 20 08:08:09 2024
*************** rewrite_update_phi_arguments (basic_bloc
*** 2107,2113 ****
  		 symbol we may find NULL arguments.  That's why we
  		 take the symbol from the LHS of the PHI node.  */
  	      reaching_def = get_reaching_def (lhs_sym);
- 
  	    }
  	  else
  	    {
--- 2107,2112 ----
*************** rewrite_update_phi_arguments (basic_bloc
*** 2119,2126 ****
  		reaching_def = get_reaching_def (arg);
  	    }
  
!           /* Update the argument if there is a reaching def.  */
! 	  if (reaching_def)
  	    {
  	      location_t locus;
  	      int arg_i = PHI_ARG_INDEX_FROM_USE (arg_p);
--- 2118,2126 ----
  		reaching_def = get_reaching_def (arg);
  	    }
  
! 	  /* Update the argument if there is a reaching def different
! 	     from arg.  */
! 	  if (reaching_def && reaching_def != arg)
  	    {
  	      location_t locus;
  	      int arg_i = PHI_ARG_INDEX_FROM_USE (arg_p);
*************** rewrite_update_phi_arguments (basic_bloc
*** 2130,2135 ****
--- 2130,2139 ----
  	      /* Virtual operands do not need a location.  */
  	      if (virtual_operand_p (reaching_def))
  		locus = UNKNOWN_LOCATION;
+ 	      /* If SSA update didn't insert this PHI the argument
+ 		 might have a location already, keep that.  */
+ 	      else if (gimple_phi_arg_has_location (phi, arg_i))
+ 		locus = gimple_phi_arg_location (phi, arg_i);
  	      else
  		{
  		  gimple *stmt = SSA_NAME_DEF_STMT (reaching_def);
*************** rewrite_update_phi_arguments (basic_bloc
*** 2147,2153 ****
  	      gimple_phi_arg_set_location (phi, arg_i, locus);
  	    }
  
- 
  	  if (e->flags & EDGE_ABNORMAL)
  	    SSA_NAME_OCCURS_IN_ABNORMAL_PHI (USE_FROM_PTR (arg_p)) = 1;
  	}
--- 2151,2156 ----
diff -Nrcpad gcc-12.3.0/gcc/tree-loop-distribution.cc gcc-12.4.0/gcc/tree-loop-distribution.cc
*** gcc-12.3.0/gcc/tree-loop-distribution.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-loop-distribution.cc	Thu Jun 20 08:08:09 2024
*************** loop_distribution::pg_add_dependence_edg
*** 2117,2125 ****
  	    }
  	  else if (DDR_ARE_DEPENDENT (ddr) == NULL_TREE)
  	    {
- 	      if (DDR_REVERSED_P (ddr))
- 		this_dir = -this_dir;
- 
  	      /* Known dependences can still be unordered througout the
  		 iteration space, see gcc.dg/tree-ssa/ldist-16.c and
  		 gcc.dg/tree-ssa/pr94969.c.  */
--- 2117,2122 ----
*************** loop_distribution::pg_add_dependence_edg
*** 2132,2138 ****
  	      /* Else as the distance vector is lexicographic positive swap
  		 the dependence direction.  */
  	      else
! 		this_dir = -this_dir;
  	    }
  	  else
  	    this_dir = 0;
--- 2129,2148 ----
  	      /* Else as the distance vector is lexicographic positive swap
  		 the dependence direction.  */
  	      else
! 		{
! 		  if (DDR_REVERSED_P (ddr))
! 		    this_dir = -this_dir;
! 		  this_dir = -this_dir;
! 
! 		  /* When then dependence distance of the innermost common
! 		     loop of the DRs is zero we have a conflict.  */
! 		  auto l1 = gimple_bb (DR_STMT (dr1))->loop_father;
! 		  auto l2 = gimple_bb (DR_STMT (dr2))->loop_father;
! 		  int idx = index_in_loop_nest (find_common_loop (l1, l2)->num,
! 						DDR_LOOP_NEST (ddr));
! 		  if (DDR_DIST_VECT (ddr, 0)[idx] == 0)
! 		    this_dir = 2;
! 		}
  	    }
  	  else
  	    this_dir = 0;
diff -Nrcpad gcc-12.3.0/gcc/tree-nested.cc gcc-12.4.0/gcc/tree-nested.cc
*** gcc-12.3.0/gcc/tree-nested.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-nested.cc	Thu Jun 20 08:08:09 2024
*************** get_frame_field (struct nesting_info *in
*** 1039,1044 ****
--- 1039,1075 ----
  
  static void note_nonlocal_vla_type (struct nesting_info *info, tree type);
  
+ /* Helper for get_nonlocal_debug_decl and get_local_debug_decl.  */
+ 
+ static tree
+ get_debug_decl (tree decl)
+ {
+   tree new_decl
+     = build_decl (DECL_SOURCE_LOCATION (decl),
+ 		  VAR_DECL, DECL_NAME (decl), TREE_TYPE (decl));
+   DECL_ARTIFICIAL (new_decl) = DECL_ARTIFICIAL (decl);
+   DECL_IGNORED_P (new_decl) = DECL_IGNORED_P (decl);
+   TREE_THIS_VOLATILE (new_decl) = TREE_THIS_VOLATILE (decl);
+   TREE_SIDE_EFFECTS (new_decl) = TREE_SIDE_EFFECTS (decl);
+   TREE_READONLY (new_decl) = TREE_READONLY (decl);
+   TREE_ADDRESSABLE (new_decl) = TREE_ADDRESSABLE (decl);
+   DECL_SEEN_IN_BIND_EXPR_P (new_decl) = 1;
+   if ((TREE_CODE (decl) == PARM_DECL
+        || TREE_CODE (decl) == RESULT_DECL
+        || VAR_P (decl))
+       && DECL_BY_REFERENCE (decl))
+     DECL_BY_REFERENCE (new_decl) = 1;
+   /* Copy DECL_LANG_SPECIFIC and DECL_LANG_FLAG_* for OpenMP langhook
+      purposes.  */
+   DECL_LANG_SPECIFIC (new_decl) = DECL_LANG_SPECIFIC (decl);
+ #define COPY_DLF(n) DECL_LANG_FLAG_##n (new_decl) = DECL_LANG_FLAG_##n (decl)
+   COPY_DLF (0); COPY_DLF (1); COPY_DLF (2); COPY_DLF (3);
+   COPY_DLF (4); COPY_DLF (5); COPY_DLF (6); COPY_DLF (7);
+   COPY_DLF (8);
+ #undef COPY_DLF
+   return new_decl;
+ }
+ 
  /* A subroutine of convert_nonlocal_reference_op.  Create a local variable
     in the nested function with DECL_VALUE_EXPR set to reference the true
     variable in the parent function.  This is used both for debug info
*************** get_nonlocal_debug_decl (struct nesting_
*** 1086,1106 ****
      x = build_simple_mem_ref_notrap (x);
  
    /* ??? We should be remapping types as well, surely.  */
!   new_decl = build_decl (DECL_SOURCE_LOCATION (decl),
! 			 VAR_DECL, DECL_NAME (decl), TREE_TYPE (decl));
    DECL_CONTEXT (new_decl) = info->context;
-   DECL_ARTIFICIAL (new_decl) = DECL_ARTIFICIAL (decl);
-   DECL_IGNORED_P (new_decl) = DECL_IGNORED_P (decl);
-   TREE_THIS_VOLATILE (new_decl) = TREE_THIS_VOLATILE (decl);
-   TREE_SIDE_EFFECTS (new_decl) = TREE_SIDE_EFFECTS (decl);
-   TREE_READONLY (new_decl) = TREE_READONLY (decl);
-   TREE_ADDRESSABLE (new_decl) = TREE_ADDRESSABLE (decl);
-   DECL_SEEN_IN_BIND_EXPR_P (new_decl) = 1;
-   if ((TREE_CODE (decl) == PARM_DECL
-        || TREE_CODE (decl) == RESULT_DECL
-        || VAR_P (decl))
-       && DECL_BY_REFERENCE (decl))
-     DECL_BY_REFERENCE (new_decl) = 1;
  
    SET_DECL_VALUE_EXPR (new_decl, x);
    DECL_HAS_VALUE_EXPR_P (new_decl) = 1;
--- 1117,1124 ----
      x = build_simple_mem_ref_notrap (x);
  
    /* ??? We should be remapping types as well, surely.  */
!   new_decl = get_debug_decl (decl);
    DECL_CONTEXT (new_decl) = info->context;
  
    SET_DECL_VALUE_EXPR (new_decl, x);
    DECL_HAS_VALUE_EXPR_P (new_decl) = 1;
*************** get_local_debug_decl (struct nesting_inf
*** 1881,1901 ****
    x = info->frame_decl;
    x = build3 (COMPONENT_REF, TREE_TYPE (field), x, field, NULL_TREE);
  
!   new_decl = build_decl (DECL_SOURCE_LOCATION (decl),
! 			 VAR_DECL, DECL_NAME (decl), TREE_TYPE (decl));
    DECL_CONTEXT (new_decl) = info->context;
-   DECL_ARTIFICIAL (new_decl) = DECL_ARTIFICIAL (decl);
-   DECL_IGNORED_P (new_decl) = DECL_IGNORED_P (decl);
-   TREE_THIS_VOLATILE (new_decl) = TREE_THIS_VOLATILE (decl);
-   TREE_SIDE_EFFECTS (new_decl) = TREE_SIDE_EFFECTS (decl);
-   TREE_READONLY (new_decl) = TREE_READONLY (decl);
-   TREE_ADDRESSABLE (new_decl) = TREE_ADDRESSABLE (decl);
-   DECL_SEEN_IN_BIND_EXPR_P (new_decl) = 1;
-   if ((TREE_CODE (decl) == PARM_DECL
-        || TREE_CODE (decl) == RESULT_DECL
-        || VAR_P (decl))
-       && DECL_BY_REFERENCE (decl))
-     DECL_BY_REFERENCE (new_decl) = 1;
  
    SET_DECL_VALUE_EXPR (new_decl, x);
    DECL_HAS_VALUE_EXPR_P (new_decl) = 1;
--- 1899,1906 ----
    x = info->frame_decl;
    x = build3 (COMPONENT_REF, TREE_TYPE (field), x, field, NULL_TREE);
  
!   new_decl = get_debug_decl (decl);
    DECL_CONTEXT (new_decl) = info->context;
  
    SET_DECL_VALUE_EXPR (new_decl, x);
    DECL_HAS_VALUE_EXPR_P (new_decl) = 1;
diff -Nrcpad gcc-12.3.0/gcc/tree-object-size.cc gcc-12.4.0/gcc/tree-object-size.cc
*** gcc-12.3.0/gcc/tree-object-size.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-object-size.cc	Thu Jun 20 08:08:09 2024
*************** alloc_object_size (const gcall *call, in
*** 771,791 ****
          arg2 = TREE_INT_CST_LOW (TREE_VALUE (TREE_CHAIN (p)))-1;
      }
    else if (gimple_call_builtin_p (call, BUILT_IN_NORMAL)
! 	   && callfn && ALLOCA_FUNCTION_CODE_P (DECL_FUNCTION_CODE (callfn)))
!   arg1 = 0;
  
    /* Non-const arguments are OK here, let the caller handle constness.  */
!   if (arg1 < 0 || arg1 >= (int) gimple_call_num_args (call)
!       || arg2 >= (int) gimple_call_num_args (call))
      return size_unknown (object_size_type);
  
    tree bytes = NULL_TREE;
    if (arg2 >= 0)
!     bytes = size_binop (MULT_EXPR,
! 	fold_convert (sizetype, gimple_call_arg (call, arg1)),
! 	fold_convert (sizetype, gimple_call_arg (call, arg2)));
!   else if (arg1 >= 0)
!     bytes = fold_convert (sizetype, gimple_call_arg (call, arg1));
  
    return bytes ? bytes : size_unknown (object_size_type);
  }
--- 771,803 ----
          arg2 = TREE_INT_CST_LOW (TREE_VALUE (TREE_CHAIN (p)))-1;
      }
    else if (gimple_call_builtin_p (call, BUILT_IN_NORMAL)
! 	   && callfn
! 	   && ALLOCA_FUNCTION_CODE_P (DECL_FUNCTION_CODE (callfn)))
!     arg1 = 0;
  
    /* Non-const arguments are OK here, let the caller handle constness.  */
!   if (arg1 < 0
!       || (unsigned) arg1 >= gimple_call_num_args (call)
!       || (arg2 >= 0 && (unsigned) arg2 >= gimple_call_num_args (call)))
      return size_unknown (object_size_type);
  
+   tree targ1 = gimple_call_arg (call, arg1);
+   if (!INTEGRAL_TYPE_P (TREE_TYPE (targ1))
+       || TYPE_PRECISION (TREE_TYPE (targ1)) > TYPE_PRECISION (sizetype))
+     return size_unknown (object_size_type);
+   targ1 = fold_convert (sizetype, targ1);
    tree bytes = NULL_TREE;
    if (arg2 >= 0)
!     {
!       tree targ2 = gimple_call_arg (call, arg2);
!       if (!INTEGRAL_TYPE_P (TREE_TYPE (targ2))
! 	  || TYPE_PRECISION (TREE_TYPE (targ2)) > TYPE_PRECISION (sizetype))
! 	return size_unknown (object_size_type);
!       targ2 = fold_convert (sizetype, targ2);
!       bytes = size_binop (MULT_EXPR, targ1, targ2);
!     }
!   else
!     bytes = targ1;
  
    return bytes ? bytes : size_unknown (object_size_type);
  }
diff -Nrcpad gcc-12.3.0/gcc/tree-profile.cc gcc-12.4.0/gcc/tree-profile.cc
*** gcc-12.3.0/gcc/tree-profile.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-profile.cc	Thu Jun 20 08:08:09 2024
*************** gimple_gen_ic_func_profiler (void)
*** 418,424 ****
    gcall *stmt1;
    tree tree_uid, cur_func, void0;
  
!   if (c_node->only_called_directly_p ())
      return;
  
    gimple_init_gcov_profiler ();
--- 418,430 ----
    gcall *stmt1;
    tree tree_uid, cur_func, void0;
  
!   /* Disable indirect call profiling for an IFUNC resolver and its
!      callees since it requires TLS which hasn't been set up yet when
!      the dynamic linker is resolving IFUNC symbols.  See
!      https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114115
!    */
!   if (c_node->only_called_directly_p ()
!       || c_node->called_by_ifunc_resolver)
      return;
  
    gimple_init_gcov_profiler ();
diff -Nrcpad gcc-12.3.0/gcc/tree-scalar-evolution.cc gcc-12.4.0/gcc/tree-scalar-evolution.cc
*** gcc-12.3.0/gcc/tree-scalar-evolution.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-scalar-evolution.cc	Thu Jun 20 08:08:09 2024
*************** simple_iv_with_niters (class loop *wrto_
*** 3282,3288 ****
  
    type = TREE_TYPE (iv->base);
    e = TREE_OPERAND (iv->base, 0);
!   if (TREE_CODE (e) != PLUS_EXPR
        || TREE_CODE (TREE_OPERAND (e, 1)) != INTEGER_CST
        || !tree_int_cst_equal (iv->step,
  			      fold_convert (type, TREE_OPERAND (e, 1))))
--- 3282,3289 ----
  
    type = TREE_TYPE (iv->base);
    e = TREE_OPERAND (iv->base, 0);
!   if (!tree_nop_conversion_p (type, TREE_TYPE (e))
!       || TREE_CODE (e) != PLUS_EXPR
        || TREE_CODE (TREE_OPERAND (e, 1)) != INTEGER_CST
        || !tree_int_cst_equal (iv->step,
  			      fold_convert (type, TREE_OPERAND (e, 1))))
diff -Nrcpad gcc-12.3.0/gcc/tree-sra.cc gcc-12.4.0/gcc/tree-sra.cc
*** gcc-12.3.0/gcc/tree-sra.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-sra.cc	Thu Jun 20 08:08:09 2024
*************** scan_function (void)
*** 1413,1427 ****
  		gasm *asm_stmt = as_a  (stmt);
  		walk_stmt_load_store_addr_ops (asm_stmt, NULL, NULL, NULL,
  					       asm_visit_addr);
! 		for (i = 0; i < gimple_asm_ninputs (asm_stmt); i++)
  		  {
! 		    t = TREE_VALUE (gimple_asm_input_op (asm_stmt, i));
! 		    ret |= build_access_from_expr (t, asm_stmt, false);
  		  }
! 		for (i = 0; i < gimple_asm_noutputs (asm_stmt); i++)
  		  {
! 		    t = TREE_VALUE (gimple_asm_output_op (asm_stmt, i));
! 		    ret |= build_access_from_expr (t, asm_stmt, true);
  		  }
  	      }
  	      break;
--- 1413,1444 ----
  		gasm *asm_stmt = as_a  (stmt);
  		walk_stmt_load_store_addr_ops (asm_stmt, NULL, NULL, NULL,
  					       asm_visit_addr);
! 		if (stmt_ends_bb_p (asm_stmt)
! 		    && !single_succ_p (gimple_bb (asm_stmt)))
  		  {
! 		    for (i = 0; i < gimple_asm_ninputs (asm_stmt); i++)
! 		      {
! 			t = TREE_VALUE (gimple_asm_input_op (asm_stmt, i));
! 			disqualify_base_of_expr (t, "OP of asm goto.");
! 		      }
! 		    for (i = 0; i < gimple_asm_noutputs (asm_stmt); i++)
! 		      {
! 			t = TREE_VALUE (gimple_asm_output_op (asm_stmt, i));
! 			disqualify_base_of_expr (t, "OP of asm goto.");
! 		      }
  		  }
! 		else
  		  {
! 		    for (i = 0; i < gimple_asm_ninputs (asm_stmt); i++)
! 		      {
! 			t = TREE_VALUE (gimple_asm_input_op (asm_stmt, i));
! 			ret |= build_access_from_expr (t, asm_stmt, false);
! 		      }
! 		    for (i = 0; i < gimple_asm_noutputs (asm_stmt); i++)
! 		      {
! 			t = TREE_VALUE (gimple_asm_output_op (asm_stmt, i));
! 			ret |= build_access_from_expr (t, asm_stmt, true);
! 		      }
  		  }
  	      }
  	      break;
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-ccp.cc gcc-12.4.0/gcc/tree-ssa-ccp.cc
*** gcc-12.3.0/gcc/tree-ssa-ccp.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-ccp.cc	Thu Jun 20 08:08:09 2024
*************** bit_value_binop (enum tree_code code, si
*** 1552,1557 ****
--- 1552,1559 ----
  		  *mask = wi::lrotate (r1mask, shift, width);
  		  *val = wi::lrotate (r1val, shift, width);
  		}
+ 	      *mask = wi::ext (*mask, width, sgn);
+ 	      *val = wi::ext (*val, width, sgn);
  	    }
  	}
        else if (wi::ltu_p (r2val | r2mask, width)
*************** bit_value_binop (enum tree_code code, si
*** 1593,1600 ****
  	      /* Accumulate the result.  */
  	      res_mask |= tmp_mask | (res_val ^ tmp_val);
  	    }
! 	  *val = wi::bit_and_not (res_val, res_mask);
! 	  *mask = res_mask;
  	}
        break;
  
--- 1595,1602 ----
  	      /* Accumulate the result.  */
  	      res_mask |= tmp_mask | (res_val ^ tmp_val);
  	    }
! 	  *val = wi::ext (wi::bit_and_not (res_val, res_mask), width, sgn);
! 	  *mask = wi::ext (res_mask, width, sgn);
  	}
        break;
  
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-dse.cc gcc-12.4.0/gcc/tree-ssa-dse.cc
*** gcc-12.3.0/gcc/tree-ssa-dse.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-dse.cc	Thu Jun 20 08:08:09 2024
*************** setup_live_bytes_from_ref (ao_ref *ref,
*** 359,369 ****
    return false;
  }
  
! /* Compute the number of elements that we can trim from the head and
!    tail of ORIG resulting in a bitmap that is a superset of LIVE.
  
!    Store the number of elements trimmed from the head and tail in
!    TRIM_HEAD and TRIM_TAIL.
  
     STMT is the statement being trimmed and is used for debugging dump
     output only.  */
--- 359,369 ----
    return false;
  }
  
! /* Compute the number of stored bytes that we can trim from the head and
!    tail of REF.  LIVE is the bitmap of stores to REF that are still live.
  
!    Store the number of bytes trimmed from the head and tail in TRIM_HEAD
!    and TRIM_TAIL respectively.
  
     STMT is the statement being trimmed and is used for debugging dump
     output only.  */
*************** static void
*** 372,381 ****
  compute_trims (ao_ref *ref, sbitmap live, int *trim_head, int *trim_tail,
  	       gimple *stmt)
  {
!   /* We use sbitmaps biased such that ref->offset is bit zero and the bitmap
!      extends through ref->size.  So we know that in the original bitmap
!      bits 0..ref->size were true.  We don't actually need the bitmap, just
!      the REF to compute the trims.  */
  
    /* Now identify how much, if any of the tail we can chop off.  */
    HOST_WIDE_INT const_size;
--- 372,388 ----
  compute_trims (ao_ref *ref, sbitmap live, int *trim_head, int *trim_tail,
  	       gimple *stmt)
  {
!   *trim_head = 0;
!   *trim_tail = 0;
! 
!   /* We use bitmaps biased such that ref->offset is contained in bit zero and
!      the bitmap extends through ref->max_size, so we know that in the original
!      bitmap bits 0 .. ref->max_size were true.  But we need to check that this
!      covers the bytes of REF exactly.  */
!   const unsigned int align = known_alignment (ref->offset);
!   if ((align > 0 && align < BITS_PER_UNIT)
!       || !known_eq (ref->size, ref->max_size))
!     return;
  
    /* Now identify how much, if any of the tail we can chop off.  */
    HOST_WIDE_INT const_size;
*************** compute_trims (ao_ref *ref, sbitmap live
*** 400,407 ****
  			       last_orig) <= 0)
  	*trim_tail = 0;
      }
-   else
-     *trim_tail = 0;
  
    /* Identify how much, if any of the head we can chop off.  */
    int first_orig = 0;
--- 407,412 ----
*************** compute_trims (ao_ref *ref, sbitmap live
*** 459,466 ****
  	}
      }
  
!   if ((*trim_head || *trim_tail)
!       && dump_file && (dump_flags & TDF_DETAILS))
      {
        fprintf (dump_file, "  Trimming statement (head = %d, tail = %d): ",
  	       *trim_head, *trim_tail);
--- 464,470 ----
  	}
      }
  
!   if ((*trim_head || *trim_tail) && dump_file && (dump_flags & TDF_DETAILS))
      {
        fprintf (dump_file, "  Trimming statement (head = %d, tail = %d): ",
  	       *trim_head, *trim_tail);
*************** compute_trims (ao_ref *ref, sbitmap live
*** 469,480 ****
      }
  }
  
! /* STMT initializes an object from COMPLEX_CST where one or more of the
!    bytes written may be dead stores.  REF is a representation of the
!    memory written.  LIVE is the bitmap of stores that are actually live.
  
!    Attempt to rewrite STMT so that only the real or imaginary part of
!    the object is actually stored.  */
  
  static void
  maybe_trim_complex_store (ao_ref *ref, sbitmap live, gimple *stmt)
--- 473,484 ----
      }
  }
  
! /* STMT initializes an object from COMPLEX_CST where one or more of the bytes
!    written may be dead stores.  REF is a representation of the memory written.
!    LIVE is the bitmap of stores to REF that are still live.
  
!    Attempt to rewrite STMT so that only the real or the imaginary part of the
!    object is actually stored.  */
  
  static void
  maybe_trim_complex_store (ao_ref *ref, sbitmap live, gimple *stmt)
*************** maybe_trim_complex_store (ao_ref *ref, s
*** 510,520 ****
  }
  
  /* STMT initializes an object using a CONSTRUCTOR where one or more of the
!    bytes written are dead stores.  ORIG is the bitmap of bytes stored by
!    STMT.  LIVE is the bitmap of stores that are actually live.
  
!    Attempt to rewrite STMT so that only the real or imaginary part of
!    the object is actually stored.
  
     The most common case for getting here is a CONSTRUCTOR with no elements
     being used to zero initialize an object.  We do not try to handle other
--- 514,523 ----
  }
  
  /* STMT initializes an object using a CONSTRUCTOR where one or more of the
!    bytes written are dead stores.  REF is a representation of the memory
!    written.  LIVE is the bitmap of stores to REF that are still live.
  
!    Attempt to rewrite STMT so that it writes fewer memory locations.
  
     The most common case for getting here is a CONSTRUCTOR with no elements
     being used to zero initialize an object.  We do not try to handle other
*************** maybe_trim_memstar_call (ao_ref *ref, sb
*** 736,744 ****
      }
  }
  
! /* STMT is a memory write where one or more bytes written are dead
!    stores.  ORIG is the bitmap of bytes stored by STMT.  LIVE is the
!    bitmap of stores that are actually live.
  
     Attempt to rewrite STMT so that it writes fewer memory locations.  Right
     now we only support trimming at the start or end of the memory region.
--- 739,747 ----
      }
  }
  
! /* STMT is a memory write where one or more bytes written are dead stores.
!    REF is a representation of the memory written.  LIVE is the bitmap of
!    stores to REF that are still live.
  
     Attempt to rewrite STMT so that it writes fewer memory locations.  Right
     now we only support trimming at the start or end of the memory region.
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-ifcombine.cc gcc-12.4.0/gcc/tree-ssa-ifcombine.cc
*** gcc-12.3.0/gcc/tree-ssa-ifcombine.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-ifcombine.cc	Thu Jun 20 08:08:09 2024
*************** ifcombine_ifandif (basic_block inner_con
*** 415,420 ****
--- 415,424 ----
      {
        tree t, t2;
  
+       if (TREE_CODE (name1) == SSA_NAME
+ 	  && SSA_NAME_OCCURS_IN_ABNORMAL_PHI (name1))
+ 	return false;
+ 
        /* Do it.  */
        gsi = gsi_for_stmt (inner_cond);
        t = fold_build2 (LSHIFT_EXPR, TREE_TYPE (name1),
*************** ifcombine_ifandif (basic_block inner_con
*** 465,470 ****
--- 469,480 ----
        gimple_stmt_iterator gsi;
        tree t;
  
+       if ((TREE_CODE (name1) == SSA_NAME
+ 	   && SSA_NAME_OCCURS_IN_ABNORMAL_PHI (name1))
+ 	  || (TREE_CODE (name2) == SSA_NAME
+ 	      && SSA_NAME_OCCURS_IN_ABNORMAL_PHI (name2)))
+ 	return false;
+ 
        /* Find the common name which is bit-tested.  */
        if (name1 == name2)
  	;
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-loop-im.cc gcc-12.4.0/gcc/tree-ssa-loop-im.cc
*** gcc-12.3.0/gcc/tree-ssa-loop-im.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-loop-im.cc	Thu Jun 20 08:08:09 2024
*************** gather_mem_refs_stmt (class loop *loop,
*** 1648,1658 ****
  				     unshare_expr (mem_base));
  		  if (TYPE_ALIGN (ref_type) != ref_align)
  		    ref_type = build_aligned_type (ref_type, ref_align);
! 		  (*slot)->mem.ref
  		    = fold_build2 (MEM_REF, ref_type, tmp,
  				   build_int_cst (ref_alias_type, mem_off));
  		  if ((*slot)->mem.volatile_p)
! 		    TREE_THIS_VOLATILE ((*slot)->mem.ref) = 1;
  		  gcc_checking_assert (TREE_CODE ((*slot)->mem.ref) == MEM_REF
  				       && is_gimple_mem_ref_addr
  				            (TREE_OPERAND ((*slot)->mem.ref,
--- 1648,1668 ----
  				     unshare_expr (mem_base));
  		  if (TYPE_ALIGN (ref_type) != ref_align)
  		    ref_type = build_aligned_type (ref_type, ref_align);
! 		  tree new_ref
  		    = fold_build2 (MEM_REF, ref_type, tmp,
  				   build_int_cst (ref_alias_type, mem_off));
  		  if ((*slot)->mem.volatile_p)
! 		    TREE_THIS_VOLATILE (new_ref) = 1;
! 		  (*slot)->mem.ref = new_ref;
! 		  /* Make sure the recorded base and offset are consistent
! 		     with the newly built ref.  */
! 		  if (TREE_CODE (TREE_OPERAND (new_ref, 0)) == ADDR_EXPR)
! 		    ;
! 		  else
! 		    {
! 		      (*slot)->mem.base = new_ref;
! 		      (*slot)->mem.offset = 0;
! 		    }
  		  gcc_checking_assert (TREE_CODE ((*slot)->mem.ref) == MEM_REF
  				       && is_gimple_mem_ref_addr
  				            (TREE_OPERAND ((*slot)->mem.ref,
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-loop-ivcanon.cc gcc-12.4.0/gcc/tree-ssa-loop-ivcanon.cc
*** gcc-12.3.0/gcc/tree-ssa-loop-ivcanon.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-loop-ivcanon.cc	Thu Jun 20 08:08:09 2024
*************** tree_unroll_loops_completely (bool may_i
*** 1487,1501 ****
  	    }
  	  BITMAP_FREE (fathers);
  
  	  /* This will take care of removing completely unrolled loops
  	     from the loop structures so we can continue unrolling now
  	     innermost loops.  */
  	  if (cleanup_tree_cfg ())
  	    update_ssa (TODO_update_ssa_only_virtuals);
  
- 	  /* Clean up the information about numbers of iterations, since
- 	     complete unrolling might have invalidated it.  */
- 	  scev_reset ();
  	  if (flag_checking && loops_state_satisfies_p (LOOP_CLOSED_SSA))
  	    verify_loop_closed_ssa (true);
  	}
--- 1487,1502 ----
  	    }
  	  BITMAP_FREE (fathers);
  
+ 	  /* Clean up the information about numbers of iterations, since
+ 	     complete unrolling might have invalidated it.  */
+ 	  scev_reset ();
+ 
  	  /* This will take care of removing completely unrolled loops
  	     from the loop structures so we can continue unrolling now
  	     innermost loops.  */
  	  if (cleanup_tree_cfg ())
  	    update_ssa (TODO_update_ssa_only_virtuals);
  
  	  if (flag_checking && loops_state_satisfies_p (LOOP_CLOSED_SSA))
  	    verify_loop_closed_ssa (true);
  	}
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-loop-ivopts.cc gcc-12.4.0/gcc/tree-ssa-loop-ivopts.cc
*** gcc-12.3.0/gcc/tree-ssa-loop-ivopts.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-loop-ivopts.cc	Thu Jun 20 08:08:09 2024
*************** rewrite_use_address (struct ivopts_data
*** 7616,7622 ****
  				      true, GSI_SAME_STMT);
      }
    else
!     copy_ref_info (ref, *use->op_p);
  
    *use->op_p = ref;
  }
--- 7616,7637 ----
  				      true, GSI_SAME_STMT);
      }
    else
!     {
!       /* When we end up confused enough and have no suitable base but
! 	 stuffed everything to index2 use a LEA for the address and
! 	 create a plain MEM_REF to avoid basing a memory reference
! 	 on address zero which create_mem_ref_raw does as fallback.  */
!       if (TREE_CODE (ref) == TARGET_MEM_REF
! 	  && TMR_INDEX2 (ref) != NULL_TREE
! 	  && integer_zerop (TREE_OPERAND (ref, 0)))
! 	{
! 	  ref = fold_build1 (ADDR_EXPR, TREE_TYPE (TREE_OPERAND (ref, 0)), ref);
! 	  ref = force_gimple_operand_gsi (&bsi, ref, true, NULL_TREE,
! 					  true, GSI_SAME_STMT);
! 	  ref = build2 (MEM_REF, type, ref, build_zero_cst (alias_ptr_type));
! 	}
!       copy_ref_info (ref, *use->op_p);
!     }
  
    *use->op_p = ref;
  }
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-loop-prefetch.cc gcc-12.4.0/gcc/tree-ssa-loop-prefetch.cc
*** gcc-12.3.0/gcc/tree-ssa-loop-prefetch.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-loop-prefetch.cc	Thu Jun 20 08:08:09 2024
*************** is_miss_rate_acceptable (unsigned HOST_W
*** 739,744 ****
--- 739,746 ----
    if (delta >= (HOST_WIDE_INT) cache_line_size)
      return false;
  
+   gcc_assert (align_unit > 0);
+ 
    miss_positions = 0;
    total_positions = (cache_line_size / align_unit) * distinct_iters;
    max_allowed_miss_positions = (ACCEPTABLE_MISS_RATE * total_positions) / 1000;
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-loop-unswitch.cc gcc-12.4.0/gcc/tree-ssa-loop-unswitch.cc
*** gcc-12.3.0/gcc/tree-ssa-loop-unswitch.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-loop-unswitch.cc	Thu Jun 20 08:08:09 2024
*************** hoist_guard (class loop *loop, edge guar
*** 839,848 ****
    cond_stmt = as_a  (stmt);
    extract_true_false_edges_from_block (guard_bb, &te, &fe);
    /* Insert guard to PRE_HEADER.  */
!   if (!empty_block_p (pre_header))
!     gsi = gsi_last_bb (pre_header);
!   else
!     gsi = gsi_start_bb (pre_header);
    /* Create copy of COND_STMT.  */
    new_cond_stmt = gimple_build_cond (gimple_cond_code (cond_stmt),
  				     gimple_cond_lhs (cond_stmt),
--- 839,845 ----
    cond_stmt = as_a  (stmt);
    extract_true_false_edges_from_block (guard_bb, &te, &fe);
    /* Insert guard to PRE_HEADER.  */
!   gsi = gsi_last_bb (pre_header);
    /* Create copy of COND_STMT.  */
    new_cond_stmt = gimple_build_cond (gimple_cond_code (cond_stmt),
  				     gimple_cond_lhs (cond_stmt),
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-math-opts.cc gcc-12.4.0/gcc/tree-ssa-math-opts.cc
*** gcc-12.3.0/gcc/tree-ssa-math-opts.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-math-opts.cc	Thu Jun 20 08:08:09 2024
*************** convert_mult_to_widen (gimple *stmt, gim
*** 2681,2686 ****
--- 2681,2694 ----
    if (!is_widening_mult_p (stmt, &type1, &rhs1, &type2, &rhs2))
      return false;
  
+   /* if any one of rhs1 and rhs2 is subject to abnormal coalescing,
+      avoid the tranform. */
+   if ((TREE_CODE (rhs1) == SSA_NAME
+        && SSA_NAME_OCCURS_IN_ABNORMAL_PHI (rhs1))
+       || (TREE_CODE (rhs2) == SSA_NAME
+ 	  && SSA_NAME_OCCURS_IN_ABNORMAL_PHI (rhs2)))
+     return false;
+ 
    to_mode = SCALAR_INT_TYPE_MODE (type);
    from_mode = SCALAR_INT_TYPE_MODE (type1);
    if (to_mode == from_mode)
*************** convert_plusminus_to_widen (gimple_stmt_
*** 2794,2801 ****
  
    lhs = gimple_assign_lhs (stmt);
    type = TREE_TYPE (lhs);
!   if (TREE_CODE (type) != INTEGER_TYPE
!       && TREE_CODE (type) != FIXED_POINT_TYPE)
      return false;
  
    if (code == MINUS_EXPR)
--- 2802,2810 ----
  
    lhs = gimple_assign_lhs (stmt);
    type = TREE_TYPE (lhs);
!   if ((TREE_CODE (type) != INTEGER_TYPE
!        && TREE_CODE (type) != FIXED_POINT_TYPE)
!       || !type_has_mode_precision_p (type))
      return false;
  
    if (code == MINUS_EXPR)
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-phiopt.cc gcc-12.4.0/gcc/tree-ssa-phiopt.cc
*** gcc-12.3.0/gcc/tree-ssa-phiopt.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-phiopt.cc	Thu Jun 20 08:08:09 2024
*************** minmax_replacement (basic_block cond_bb,
*** 1973,1978 ****
--- 1973,1982 ----
  	  || gimple_code (assign) != GIMPLE_ASSIGN)
  	return false;
  
+       /* There cannot be any phi nodes in the middle bb. */
+       if (!gimple_seq_empty_p (phi_nodes (middle_bb)))
+ 	return false;
+ 
        lhs = gimple_assign_lhs (assign);
        ass_code = gimple_assign_rhs_code (assign);
        if (ass_code != MAX_EXPR && ass_code != MIN_EXPR)
*************** minmax_replacement (basic_block cond_bb,
*** 2014,2020 ****
  
  	      /* We need BOUND <= LARGER.  */
  	      if (!integer_nonzerop (fold_build2 (LE_EXPR, boolean_type_node,
! 						  bound, larger)))
  		return false;
  	    }
  	  else if (operand_equal_for_phi_arg_p (arg_false, smaller)
--- 2018,2024 ----
  
  	      /* We need BOUND <= LARGER.  */
  	      if (!integer_nonzerop (fold_build2 (LE_EXPR, boolean_type_node,
! 						  bound, arg_false)))
  		return false;
  	    }
  	  else if (operand_equal_for_phi_arg_p (arg_false, smaller)
*************** minmax_replacement (basic_block cond_bb,
*** 2045,2051 ****
  
  	      /* We need BOUND >= SMALLER.  */
  	      if (!integer_nonzerop (fold_build2 (GE_EXPR, boolean_type_node,
! 						  bound, smaller)))
  		return false;
  	    }
  	  else
--- 2049,2055 ----
  
  	      /* We need BOUND >= SMALLER.  */
  	      if (!integer_nonzerop (fold_build2 (GE_EXPR, boolean_type_node,
! 						  bound, arg_false)))
  		return false;
  	    }
  	  else
*************** minmax_replacement (basic_block cond_bb,
*** 2085,2091 ****
  
  	      /* We need BOUND >= LARGER.  */
  	      if (!integer_nonzerop (fold_build2 (GE_EXPR, boolean_type_node,
! 						  bound, larger)))
  		return false;
  	    }
  	  else if (operand_equal_for_phi_arg_p (arg_true, smaller)
--- 2089,2095 ----
  
  	      /* We need BOUND >= LARGER.  */
  	      if (!integer_nonzerop (fold_build2 (GE_EXPR, boolean_type_node,
! 						  bound, arg_true)))
  		return false;
  	    }
  	  else if (operand_equal_for_phi_arg_p (arg_true, smaller)
*************** minmax_replacement (basic_block cond_bb,
*** 2112,2118 ****
  
  	      /* We need BOUND <= SMALLER.  */
  	      if (!integer_nonzerop (fold_build2 (LE_EXPR, boolean_type_node,
! 						  bound, smaller)))
  		return false;
  	    }
  	  else
--- 2116,2122 ----
  
  	      /* We need BOUND <= SMALLER.  */
  	      if (!integer_nonzerop (fold_build2 (LE_EXPR, boolean_type_node,
! 						  bound, arg_true)))
  		return false;
  	    }
  	  else
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-pre.cc gcc-12.4.0/gcc/tree-ssa-pre.cc
*** gcc-12.3.0/gcc/tree-ssa-pre.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-pre.cc	Thu Jun 20 08:08:09 2024
*************** compute_avail (function *fun)
*** 4216,4221 ****
--- 4216,4222 ----
  		      else
  			{
  			  ref->set = 0;
+ 			  ref->base_set = 0;
  			  if (ref1->opcode == MEM_REF)
  			    ref1->op0
  			      = wide_int_to_tree (ptr_type_node,
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-reassoc.cc gcc-12.4.0/gcc/tree-ssa-reassoc.cc
*** gcc-12.3.0/gcc/tree-ssa-reassoc.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-reassoc.cc	Thu Jun 20 08:08:09 2024
*************** undistribute_bitref_for_vector (enum tre
*** 2101,2112 ****
  	{
  	  sum = build_and_add_sum (vec_type, sum_vec,
  				   valid_vecs[i + 1], opcode);
  	  if (!useless_type_conversion_p (vec_type,
  					  TREE_TYPE (valid_vecs[i + 1])))
  	    {
- 	      /* Update the operands only after build_and_add_sum,
- 		 so that we don't have to repeat the placement algorithm
- 		 of build_and_add_sum.  */
  	      gimple_stmt_iterator gsi = gsi_for_stmt (sum);
  	      tree vce = build1 (VIEW_CONVERT_EXPR, vec_type,
  				 valid_vecs[i + 1]);
--- 2101,2124 ----
  	{
  	  sum = build_and_add_sum (vec_type, sum_vec,
  				   valid_vecs[i + 1], opcode);
+ 	  /* Update the operands only after build_and_add_sum,
+ 	     so that we don't have to repeat the placement algorithm
+ 	     of build_and_add_sum.  */
+ 	  if (sum_vec == tvec
+ 	      && !useless_type_conversion_p (vec_type, TREE_TYPE (sum_vec)))
+ 	    {
+ 	      gimple_stmt_iterator gsi = gsi_for_stmt (sum);
+ 	      tree vce = build1 (VIEW_CONVERT_EXPR, vec_type, sum_vec);
+ 	      tree lhs = make_ssa_name (vec_type);
+ 	      gimple *g = gimple_build_assign (lhs, VIEW_CONVERT_EXPR, vce);
+ 	      gimple_set_uid (g, gimple_uid (sum));
+ 	      gsi_insert_before (&gsi, g, GSI_NEW_STMT);
+ 	      gimple_assign_set_rhs1 (sum, lhs);
+ 	      update_stmt (sum);
+ 	    }
  	  if (!useless_type_conversion_p (vec_type,
  					  TREE_TYPE (valid_vecs[i + 1])))
  	    {
  	      gimple_stmt_iterator gsi = gsi_for_stmt (sum);
  	      tree vce = build1 (VIEW_CONVERT_EXPR, vec_type,
  				 valid_vecs[i + 1]);
*************** undistribute_bitref_for_vector (enum tre
*** 2115,2129 ****
  	      gimple_set_uid (g, gimple_uid (sum));
  	      gsi_insert_before (&gsi, g, GSI_NEW_STMT);
  	      gimple_assign_set_rhs2 (sum, lhs);
- 	      if (sum_vec == tvec)
- 		{
- 		  vce = build1 (VIEW_CONVERT_EXPR, vec_type, sum_vec);
- 		  lhs = make_ssa_name (vec_type);
- 		  g = gimple_build_assign (lhs, VIEW_CONVERT_EXPR, vce);
- 		  gimple_set_uid (g, gimple_uid (sum));
- 		  gsi_insert_before (&gsi, g, GSI_NEW_STMT);
- 		  gimple_assign_set_rhs1 (sum, lhs);
- 		}
  	      update_stmt (sum);
  	    }
  	  sum_vec = gimple_get_lhs (sum);
--- 2127,2132 ----
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-strlen.cc gcc-12.4.0/gcc/tree-ssa-strlen.cc
*** gcc-12.3.0/gcc/tree-ssa-strlen.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-strlen.cc	Thu Jun 20 08:08:09 2024
*************** strlen_pass::handle_builtin_memcpy (buil
*** 3361,3367 ****
        && !integer_zerop (len))
      {
        maybe_warn_overflow (stmt, false, len, olddsi, false, true);
!       adjust_last_stmt (olddsi, stmt, false);
      }
  
    int idx = get_stridx (src, stmt);
--- 3361,3368 ----
        && !integer_zerop (len))
      {
        maybe_warn_overflow (stmt, false, len, olddsi, false, true);
!       if (tree_fits_uhwi_p (len))
! 	adjust_last_stmt (olddsi, stmt, false);
      }
  
    int idx = get_stridx (src, stmt);
*************** strlen_pass::handle_store (bool *zero_wr
*** 5007,5012 ****
--- 5008,5016 ----
  
    if (si != NULL)
      {
+       /* The count_nonzero_bytes call above might have unshared si.
+ 	 Fetch it again from the vector.  */
+       si = get_strinfo (idx);
        /* The corresponding element is set to 1 if the first and last
  	 element, respectively, of the sequence of characters being
  	 written over the string described by SI ends before
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-structalias.cc gcc-12.4.0/gcc/tree-ssa-structalias.cc
*** gcc-12.3.0/gcc/tree-ssa-structalias.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-structalias.cc	Thu Jun 20 08:08:09 2024
*************** unify_nodes (constraint_graph_t graph, u
*** 1581,1644 ****
      bitmap_clear_bit (graph->succs[to], to);
  }
  
- /* Information needed to compute the topological ordering of a graph.  */
- 
- struct topo_info
- {
-   /* sbitmap of visited nodes.  */
-   sbitmap visited;
-   /* Array that stores the topological order of the graph, *in
-      reverse*.  */
-   vec topo_order;
- };
- 
- 
- /* Initialize and return a topological info structure.  */
- 
- static struct topo_info *
- init_topo_info (void)
- {
-   size_t size = graph->size;
-   struct topo_info *ti = XNEW (struct topo_info);
-   ti->visited = sbitmap_alloc (size);
-   bitmap_clear (ti->visited);
-   ti->topo_order.create (1);
-   return ti;
- }
- 
- 
- /* Free the topological sort info pointed to by TI.  */
- 
- static void
- free_topo_info (struct topo_info *ti)
- {
-   sbitmap_free (ti->visited);
-   ti->topo_order.release ();
-   free (ti);
- }
- 
- /* Visit the graph in topological order, and store the order in the
-    topo_info structure.  */
- 
- static void
- topo_visit (constraint_graph_t graph, struct topo_info *ti,
- 	    unsigned int n)
- {
-   bitmap_iterator bi;
-   unsigned int j;
- 
-   bitmap_set_bit (ti->visited, n);
- 
-   if (graph->succs[n])
-     EXECUTE_IF_SET_IN_BITMAP (graph->succs[n], 0, j, bi)
-       {
- 	if (!bitmap_bit_p (ti->visited, j))
- 	  topo_visit (graph, ti, j);
-       }
- 
-   ti->topo_order.safe_push (n);
- }
- 
  /* Process a constraint C that represents x = *(y + off), using DELTA as the
     starting solution for y.  */
  
--- 1581,1586 ----
*************** find_indirect_cycles (constraint_graph_t
*** 1913,1931 ****
        scc_visit (graph, &si, i);
  }
  
! /* Compute a topological ordering for GRAPH, and store the result in the
!    topo_info structure TI.  */
  
  static void
! compute_topo_order (constraint_graph_t graph,
! 		    struct topo_info *ti)
  {
    unsigned int i;
    unsigned int size = graph->size;
  
    for (i = 0; i != size; ++i)
!     if (!bitmap_bit_p (ti->visited, i) && find (i) == i)
!       topo_visit (graph, ti, i);
  }
  
  /* Structure used to for hash value numbering of pointer equivalence
--- 1855,1910 ----
        scc_visit (graph, &si, i);
  }
  
! /* Visit the graph in topological order starting at node N, and store the
!    order in TOPO_ORDER using VISITED to indicate visited nodes.  */
  
  static void
! topo_visit (constraint_graph_t graph, vec &topo_order,
! 	    sbitmap visited, unsigned int n)
! {
!   bitmap_iterator bi;
!   unsigned int j;
! 
!   bitmap_set_bit (visited, n);
! 
!   if (graph->succs[n])
!     EXECUTE_IF_SET_IN_BITMAP (graph->succs[n], 0, j, bi)
!       {
! 	unsigned k = find (j);
! 	if (!bitmap_bit_p (visited, k))
! 	  topo_visit (graph, topo_order, visited, k);
!       }
! 
!   topo_order.quick_push (n);
! }
! 
! /* Compute a topological ordering for GRAPH, and return the result.  */
! 
! static auto_vec
! compute_topo_order (constraint_graph_t graph)
  {
    unsigned int i;
    unsigned int size = graph->size;
  
+   auto_sbitmap visited (size);
+   bitmap_clear (visited);
+ 
+   /* For the heuristic in add_graph_edge to work optimally make sure to
+      first visit the connected component of the graph containing
+      ESCAPED.  Do this by extracting the connected component
+      with ESCAPED and append that to all other components as solve_graph
+      pops from the order.  */
+   auto_vec tail (size);
+   topo_visit (graph, tail, visited, find (escaped_id));
+ 
+   auto_vec topo_order (size);
+ 
    for (i = 0; i != size; ++i)
!     if (!bitmap_bit_p (visited, i) && find (i) == i)
!       topo_visit (graph, topo_order, visited, i);
! 
!   topo_order.splice (tail);
!   return topo_order;
  }
  
  /* Structure used to for hash value numbering of pointer equivalence
*************** solve_graph (constraint_graph_t graph)
*** 2753,2769 ****
    while (!bitmap_empty_p (changed))
      {
        unsigned int i;
-       struct topo_info *ti = init_topo_info ();
        stats.iterations++;
  
        bitmap_obstack_initialize (&iteration_obstack);
  
!       compute_topo_order (graph, ti);
! 
!       while (ti->topo_order.length () != 0)
  	{
! 
! 	  i = ti->topo_order.pop ();
  
  	  /* If this variable is not a representative, skip it.  */
  	  if (find (i) != i)
--- 2732,2745 ----
    while (!bitmap_empty_p (changed))
      {
        unsigned int i;
        stats.iterations++;
  
        bitmap_obstack_initialize (&iteration_obstack);
  
!       auto_vec topo_order = compute_topo_order (graph);
!       while (topo_order.length () != 0)
  	{
! 	  i = topo_order.pop ();
  
  	  /* If this variable is not a representative, skip it.  */
  	  if (find (i) != i)
*************** solve_graph (constraint_graph_t graph)
*** 2888,2894 ****
  		}
  	    }
  	}
-       free_topo_info (ti);
        bitmap_obstack_release (&iteration_obstack);
      }
  
--- 2864,2869 ----
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa-tail-merge.cc gcc-12.4.0/gcc/tree-ssa-tail-merge.cc
*** gcc-12.3.0/gcc/tree-ssa-tail-merge.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa-tail-merge.cc	Thu Jun 20 08:08:09 2024
*************** gimple_equal_p (same_succ *same_succ, gi
*** 1165,1170 ****
--- 1165,1173 ----
        return operand_equal_p (lhs1, lhs2, 0);
  
      case GIMPLE_ASSIGN:
+       if (gimple_assign_rhs_code (s1) != gimple_assign_rhs_code (s2))
+ 	return false;
+ 
        lhs1 = gimple_get_lhs (s1);
        lhs2 = gimple_get_lhs (s2);
        if (TREE_CODE (lhs1) != SSA_NAME
*************** gimple_equal_p (same_succ *same_succ, gi
*** 1172,1182 ****
  	return (operand_equal_p (lhs1, lhs2, 0)
  		&& gimple_operand_equal_value_p (gimple_assign_rhs1 (s1),
  						 gimple_assign_rhs1 (s2)));
!       else if (TREE_CODE (lhs1) == SSA_NAME
! 	       && TREE_CODE (lhs2) == SSA_NAME)
! 	return operand_equal_p (gimple_assign_rhs1 (s1),
! 				gimple_assign_rhs1 (s2), 0);
!       return false;
  
      case GIMPLE_COND:
        t1 = gimple_cond_lhs (s1);
--- 1175,1194 ----
  	return (operand_equal_p (lhs1, lhs2, 0)
  		&& gimple_operand_equal_value_p (gimple_assign_rhs1 (s1),
  						 gimple_assign_rhs1 (s2)));
! 
!       if (TREE_CODE (lhs1) != SSA_NAME
! 	  || TREE_CODE (lhs2) != SSA_NAME)
! 	return false;
! 
!       gcc_checking_assert (gimple_num_args (s1) == gimple_num_args (s2));
!       for (i = 0; i < gimple_num_args (s1); ++i)
! 	{
! 	  t1 = gimple_arg (s1, i);
! 	  t2 = gimple_arg (s2, i);
! 	  if (!gimple_operand_equal_value_p (t1, t2))
! 	    return false;
! 	}
!       return true;
  
      case GIMPLE_COND:
        t1 = gimple_cond_lhs (s1);
diff -Nrcpad gcc-12.3.0/gcc/tree-ssa.cc gcc-12.4.0/gcc/tree-ssa.cc
*** gcc-12.3.0/gcc/tree-ssa.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-ssa.cc	Thu Jun 20 08:08:09 2024
*************** maybe_optimize_var (tree var, bitmap add
*** 1790,1804 ****
  	  maybe_reg = true;
  	  DECL_NOT_GIMPLE_REG_P (var) = 0;
  	}
!       if (maybe_reg && is_gimple_reg (var))
  	{
! 	  if (dump_file)
  	    {
! 	      fprintf (dump_file, "Now a gimple register: ");
! 	      print_generic_expr (dump_file, var);
! 	      fprintf (dump_file, "\n");
  	    }
! 	  bitmap_set_bit (suitable_for_renaming, DECL_UID (var));
  	}
      }
  }
--- 1790,1809 ----
  	  maybe_reg = true;
  	  DECL_NOT_GIMPLE_REG_P (var) = 0;
  	}
!       if (maybe_reg)
  	{
! 	  if (is_gimple_reg (var))
  	    {
! 	      if (dump_file)
! 		{
! 		  fprintf (dump_file, "Now a gimple register: ");
! 		  print_generic_expr (dump_file, var);
! 		  fprintf (dump_file, "\n");
! 		}
! 	      bitmap_set_bit (suitable_for_renaming, DECL_UID (var));
  	    }
! 	  else
! 	    DECL_NOT_GIMPLE_REG_P (var) = 1;
  	}
      }
  }
diff -Nrcpad gcc-12.3.0/gcc/tree-vect-data-refs.cc gcc-12.4.0/gcc/tree-vect-data-refs.cc
*** gcc-12.3.0/gcc/tree-vect-data-refs.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-vect-data-refs.cc	Thu Jun 20 08:08:09 2024
*************** vect_slp_analyze_data_ref_dependence (ve
*** 672,829 ****
  }
  
  
! /* Analyze dependences involved in the transform of SLP NODE.  STORES
!    contain the vector of scalar stores of this instance if we are
!    disambiguating the loads.  */
  
  static bool
! vect_slp_analyze_node_dependences (vec_info *vinfo, slp_tree node,
! 				   vec stores,
! 				   stmt_vec_info last_store_info)
  {
!   /* This walks over all stmts involved in the SLP load/store done
       in NODE verifying we can sink them up to the last stmt in the
       group.  */
!   if (DR_IS_WRITE (STMT_VINFO_DATA_REF (SLP_TREE_REPRESENTATIVE (node))))
      {
!       stmt_vec_info last_access_info = vect_find_last_scalar_stmt_in_slp (node);
!       for (unsigned k = 0; k < SLP_TREE_SCALAR_STMTS (node).length (); ++k)
  	{
! 	  stmt_vec_info access_info
! 	    = vect_orig_stmt (SLP_TREE_SCALAR_STMTS (node)[k]);
! 	  if (access_info == last_access_info)
  	    continue;
- 	  data_reference *dr_a = STMT_VINFO_DATA_REF (access_info);
- 	  ao_ref ref;
- 	  bool ref_initialized_p = false;
- 	  for (gimple_stmt_iterator gsi = gsi_for_stmt (access_info->stmt);
- 	       gsi_stmt (gsi) != last_access_info->stmt; gsi_next (&gsi))
- 	    {
- 	      gimple *stmt = gsi_stmt (gsi);
- 	      if (! gimple_vuse (stmt))
- 		continue;
- 
- 	      /* If we couldn't record a (single) data reference for this
- 		 stmt we have to resort to the alias oracle.  */
- 	      stmt_vec_info stmt_info = vinfo->lookup_stmt (stmt);
- 	      data_reference *dr_b = STMT_VINFO_DATA_REF (stmt_info);
- 	      if (!dr_b)
- 		{
- 		  /* We are moving a store - this means
- 		     we cannot use TBAA for disambiguation.  */
- 		  if (!ref_initialized_p)
- 		    ao_ref_init (&ref, DR_REF (dr_a));
- 		  if (stmt_may_clobber_ref_p_1 (stmt, &ref, false)
- 		      || ref_maybe_used_by_stmt_p (stmt, &ref, false))
- 		    return false;
- 		  continue;
- 		}
  
! 	      bool dependent = false;
! 	      /* If we run into a store of this same instance (we've just
! 		 marked those) then delay dependence checking until we run
! 		 into the last store because this is where it will have
! 		 been sunk to (and we verify if we can do that as well).  */
! 	      if (gimple_visited_p (stmt))
! 		{
! 		  if (stmt_info != last_store_info)
! 		    continue;
! 
! 		  for (stmt_vec_info &store_info : stores)
! 		    {
! 		      data_reference *store_dr
! 			= STMT_VINFO_DATA_REF (store_info);
! 		      ddr_p ddr = initialize_data_dependence_relation
! 				    (dr_a, store_dr, vNULL);
! 		      dependent
! 			= vect_slp_analyze_data_ref_dependence (vinfo, ddr);
! 		      free_dependence_relation (ddr);
! 		      if (dependent)
! 			break;
! 		    }
! 		}
! 	      else
! 		{
! 		  ddr_p ddr = initialize_data_dependence_relation (dr_a,
! 								   dr_b, vNULL);
! 		  dependent = vect_slp_analyze_data_ref_dependence (vinfo, ddr);
! 		  free_dependence_relation (ddr);
! 		}
! 	      if (dependent)
  		return false;
  	    }
  	}
      }
!   else /* DR_IS_READ */
      {
!       stmt_vec_info first_access_info
! 	= vect_find_first_scalar_stmt_in_slp (node);
!       for (unsigned k = 0; k < SLP_TREE_SCALAR_STMTS (node).length (); ++k)
  	{
! 	  stmt_vec_info access_info
! 	    = vect_orig_stmt (SLP_TREE_SCALAR_STMTS (node)[k]);
! 	  if (access_info == first_access_info)
  	    continue;
! 	  data_reference *dr_a = STMT_VINFO_DATA_REF (access_info);
! 	  ao_ref ref;
! 	  bool ref_initialized_p = false;
! 	  for (gimple_stmt_iterator gsi = gsi_for_stmt (access_info->stmt);
! 	       gsi_stmt (gsi) != first_access_info->stmt; gsi_prev (&gsi))
  	    {
! 	      gimple *stmt = gsi_stmt (gsi);
! 	      if (! gimple_vdef (stmt))
  		continue;
  
! 	      /* If we couldn't record a (single) data reference for this
! 		 stmt we have to resort to the alias oracle.  */
! 	      stmt_vec_info stmt_info = vinfo->lookup_stmt (stmt);
! 	      data_reference *dr_b = STMT_VINFO_DATA_REF (stmt_info);
  
! 	      /* We are hoisting a load - this means we can use
! 		 TBAA for disambiguation.  */
  	      if (!ref_initialized_p)
  		ao_ref_init (&ref, DR_REF (dr_a));
! 	      if (stmt_may_clobber_ref_p_1 (stmt, &ref, true))
  		{
  		  if (!dr_b)
  		    return false;
- 		  /* Resort to dependence checking below.  */
- 		}
- 	      else
- 		/* No dependence.  */
- 		continue;
- 
- 	      bool dependent = false;
- 	      /* If we run into a store of this same instance (we've just
- 		 marked those) then delay dependence checking until we run
- 		 into the last store because this is where it will have
- 		 been sunk to (and we verify if we can do that as well).  */
- 	      if (gimple_visited_p (stmt))
- 		{
- 		  if (stmt_info != last_store_info)
- 		    continue;
- 
- 		  for (stmt_vec_info &store_info : stores)
- 		    {
- 		      data_reference *store_dr
- 			= STMT_VINFO_DATA_REF (store_info);
- 		      ddr_p ddr = initialize_data_dependence_relation
- 				    (dr_a, store_dr, vNULL);
- 		      dependent
- 			= vect_slp_analyze_data_ref_dependence (vinfo, ddr);
- 		      free_dependence_relation (ddr);
- 		      if (dependent)
- 			break;
- 		    }
- 		}
- 	      else
- 		{
  		  ddr_p ddr = initialize_data_dependence_relation (dr_a,
  								   dr_b, vNULL);
! 		  dependent = vect_slp_analyze_data_ref_dependence (vinfo, ddr);
  		  free_dependence_relation (ddr);
  		}
! 	      if (dependent)
  		return false;
  	    }
  	}
--- 672,837 ----
  }
  
  
! /* Analyze dependences involved in the transform of a store SLP NODE.  */
  
  static bool
! vect_slp_analyze_store_dependences (vec_info *vinfo, slp_tree node)
  {
!   /* This walks over all stmts involved in the SLP store done
       in NODE verifying we can sink them up to the last stmt in the
       group.  */
!   stmt_vec_info last_access_info = vect_find_last_scalar_stmt_in_slp (node);
!   gcc_assert (DR_IS_WRITE (STMT_VINFO_DATA_REF (last_access_info)));
! 
!   for (unsigned k = 0; k < SLP_TREE_SCALAR_STMTS (node).length (); ++k)
      {
!       stmt_vec_info access_info
! 	= vect_orig_stmt (SLP_TREE_SCALAR_STMTS (node)[k]);
!       if (access_info == last_access_info)
! 	continue;
!       data_reference *dr_a = STMT_VINFO_DATA_REF (access_info);
!       ao_ref ref;
!       bool ref_initialized_p = false;
!       for (gimple_stmt_iterator gsi = gsi_for_stmt (access_info->stmt);
! 	   gsi_stmt (gsi) != last_access_info->stmt; gsi_next (&gsi))
  	{
! 	  gimple *stmt = gsi_stmt (gsi);
! 	  if (! gimple_vuse (stmt))
  	    continue;
  
! 	  /* If we couldn't record a (single) data reference for this
! 	     stmt we have to resort to the alias oracle.  */
! 	  stmt_vec_info stmt_info = vinfo->lookup_stmt (stmt);
! 	  data_reference *dr_b = STMT_VINFO_DATA_REF (stmt_info);
! 	  if (!dr_b)
! 	    {
! 	      /* We are moving a store - this means
! 		 we cannot use TBAA for disambiguation.  */
! 	      if (!ref_initialized_p)
! 		ao_ref_init (&ref, DR_REF (dr_a));
! 	      if (stmt_may_clobber_ref_p_1 (stmt, &ref, false)
! 		  || ref_maybe_used_by_stmt_p (stmt, &ref, false))
  		return false;
+ 	      continue;
  	    }
+ 
+ 	  gcc_assert (!gimple_visited_p (stmt));
+ 
+ 	  ddr_p ddr = initialize_data_dependence_relation (dr_a,
+ 							   dr_b, vNULL);
+ 	  bool dependent = vect_slp_analyze_data_ref_dependence (vinfo, ddr);
+ 	  free_dependence_relation (ddr);
+ 	  if (dependent)
+ 	    return false;
  	}
      }
!   return true;
! }
! 
! /* Analyze dependences involved in the transform of a load SLP NODE.  STORES
!    contain the vector of scalar stores of this instance if we are
!    disambiguating the loads.  */
! 
! static bool
! vect_slp_analyze_load_dependences (vec_info *vinfo, slp_tree node,
! 				   vec stores,
! 				   stmt_vec_info last_store_info)
! {
!   /* This walks over all stmts involved in the SLP load done
!      in NODE verifying we can hoist them up to the first stmt in the
!      group.  */
!   stmt_vec_info first_access_info = vect_find_first_scalar_stmt_in_slp (node);
!   gcc_assert (DR_IS_READ (STMT_VINFO_DATA_REF (first_access_info)));
! 
!   for (unsigned k = 0; k < SLP_TREE_SCALAR_STMTS (node).length (); ++k)
      {
!       stmt_vec_info access_info
! 	= vect_orig_stmt (SLP_TREE_SCALAR_STMTS (node)[k]);
!       if (access_info == first_access_info)
! 	continue;
!       data_reference *dr_a = STMT_VINFO_DATA_REF (access_info);
!       ao_ref ref;
!       bool ref_initialized_p = false;
!       hash_set grp_visited;
!       for (gimple_stmt_iterator gsi = gsi_for_stmt (access_info->stmt);
! 	   gsi_stmt (gsi) != first_access_info->stmt; gsi_prev (&gsi))
  	{
! 	  gimple *stmt = gsi_stmt (gsi);
! 	  if (! gimple_vdef (stmt))
  	    continue;
! 
! 	  stmt_vec_info stmt_info = vinfo->lookup_stmt (stmt);
! 
! 	  /* If we run into a store of this same instance (we've just
! 	     marked those) then delay dependence checking until we run
! 	     into the last store because this is where it will have
! 	     been sunk to (and we verified that we can do that already).  */
! 	  if (gimple_visited_p (stmt))
  	    {
! 	      if (stmt_info != last_store_info)
  		continue;
  
! 	      for (stmt_vec_info &store_info : stores)
! 		{
! 		  data_reference *store_dr = STMT_VINFO_DATA_REF (store_info);
! 		  ddr_p ddr = initialize_data_dependence_relation
! 				(dr_a, store_dr, vNULL);
! 		  bool dependent
! 		    = vect_slp_analyze_data_ref_dependence (vinfo, ddr);
! 		  free_dependence_relation (ddr);
! 		  if (dependent)
! 		    return false;
! 		}
! 	      continue;
! 	    }
  
! 	  auto check_hoist = [&] (stmt_vec_info stmt_info) -> bool
! 	    {
! 	      /* We are hoisting a load - this means we can use TBAA for
! 		 disambiguation.  */
  	      if (!ref_initialized_p)
  		ao_ref_init (&ref, DR_REF (dr_a));
! 	      if (stmt_may_clobber_ref_p_1 (stmt_info->stmt, &ref, true))
  		{
+ 		  /* If we couldn't record a (single) data reference for this
+ 		     stmt we have to give up now.  */
+ 		  data_reference *dr_b = STMT_VINFO_DATA_REF (stmt_info);
  		  if (!dr_b)
  		    return false;
  		  ddr_p ddr = initialize_data_dependence_relation (dr_a,
  								   dr_b, vNULL);
! 		  bool dependent
! 		    = vect_slp_analyze_data_ref_dependence (vinfo, ddr);
  		  free_dependence_relation (ddr);
+ 		  if (dependent)
+ 		    return false;
  		}
! 	      /* No dependence.  */
! 	      return true;
! 	    };
! 	  if (STMT_VINFO_GROUPED_ACCESS (stmt_info))
! 	    {
! 	      /* When we run into a store group we have to honor
! 		 that earlier stores might be moved here.  We don't
! 		 know exactly which and where to since we lack a
! 		 back-mapping from DR to SLP node, so assume all
! 		 earlier stores are sunk here.  It's enough to
! 		 consider the last stmt of a group for this.
! 		 ???  Both this and the fact that we disregard that
! 		 the conflicting instance might be removed later
! 		 is overly conservative.  */
! 	      if (!grp_visited.add (DR_GROUP_FIRST_ELEMENT (stmt_info)))
! 		for (auto store_info = DR_GROUP_FIRST_ELEMENT (stmt_info);
! 		     store_info != NULL;
! 		     store_info = DR_GROUP_NEXT_ELEMENT (store_info))
! 		  if ((store_info == stmt_info
! 		       || get_later_stmt (store_info, stmt_info) == stmt_info)
! 		      && !check_hoist (store_info))
! 		    return false;
! 	    }
! 	  else
! 	    {
! 	      if (!check_hoist (stmt_info))
  		return false;
  	    }
  	}
*************** vect_slp_analyze_instance_dependence (ve
*** 852,858 ****
    stmt_vec_info last_store_info = NULL;
    if (store)
      {
!       if (! vect_slp_analyze_node_dependences (vinfo, store, vNULL, NULL))
  	return false;
  
        /* Mark stores in this instance and remember the last one.  */
--- 860,866 ----
    stmt_vec_info last_store_info = NULL;
    if (store)
      {
!       if (! vect_slp_analyze_store_dependences (vinfo, store))
  	return false;
  
        /* Mark stores in this instance and remember the last one.  */
*************** vect_slp_analyze_instance_dependence (ve
*** 866,872 ****
    /* Verify we can sink loads to the vectorized stmt insert location,
       special-casing stores of this instance.  */
    for (slp_tree &load : SLP_INSTANCE_LOADS (instance))
!     if (! vect_slp_analyze_node_dependences (vinfo, load,
  					     store
  					     ? SLP_TREE_SCALAR_STMTS (store)
  					     : vNULL, last_store_info))
--- 874,880 ----
    /* Verify we can sink loads to the vectorized stmt insert location,
       special-casing stores of this instance.  */
    for (slp_tree &load : SLP_INSTANCE_LOADS (instance))
!     if (! vect_slp_analyze_load_dependences (vinfo, load,
  					     store
  					     ? SLP_TREE_SCALAR_STMTS (store)
  					     : vNULL, last_store_info))
diff -Nrcpad gcc-12.3.0/gcc/tree-vect-generic.cc gcc-12.4.0/gcc/tree-vect-generic.cc
*** gcc-12.3.0/gcc/tree-vect-generic.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-vect-generic.cc	Thu Jun 20 08:08:09 2024
*************** optimize_vector_constructor (gimple_stmt
*** 1376,1387 ****
    gsi_replace (gsi, g, false);
  }
  
! /* Return a type for the widest vector mode whose components are of type
!    TYPE, or NULL_TREE if none is found.  */
  
  static tree
! type_for_widest_vector_mode (tree type, optab op)
  {
    machine_mode inner_mode = TYPE_MODE (type);
    machine_mode best_mode = VOIDmode, mode;
    poly_int64 best_nunits = 0;
--- 1376,1391 ----
    gsi_replace (gsi, g, false);
  }
  
! /* Return a type for the widest vector mode with the same element type as
!    type ORIGINAL_VECTOR_TYPE, with at most the same number of elements as type
!    ORIGINAL_VECTOR_TYPE and that is supported by the target for an operation
!    with optab OP, or return NULL_TREE if none is found.  */
  
  static tree
! type_for_widest_vector_mode (tree original_vector_type, optab op)
  {
+   gcc_assert (VECTOR_TYPE_P (original_vector_type));
+   tree type = TREE_TYPE (original_vector_type);
    machine_mode inner_mode = TYPE_MODE (type);
    machine_mode best_mode = VOIDmode, mode;
    poly_int64 best_nunits = 0;
*************** type_for_widest_vector_mode (tree type,
*** 1404,1410 ****
    FOR_EACH_MODE_FROM (mode, mode)
      if (GET_MODE_INNER (mode) == inner_mode
  	&& maybe_gt (GET_MODE_NUNITS (mode), best_nunits)
! 	&& optab_handler (op, mode) != CODE_FOR_nothing)
        best_mode = mode, best_nunits = GET_MODE_NUNITS (mode);
  
    if (best_mode == VOIDmode)
--- 1408,1416 ----
    FOR_EACH_MODE_FROM (mode, mode)
      if (GET_MODE_INNER (mode) == inner_mode
  	&& maybe_gt (GET_MODE_NUNITS (mode), best_nunits)
! 	&& optab_handler (op, mode) != CODE_FOR_nothing
! 	&& known_le (GET_MODE_NUNITS (mode),
! 		     TYPE_VECTOR_SUBPARTS (original_vector_type)))
        best_mode = mode, best_nunits = GET_MODE_NUNITS (mode);
  
    if (best_mode == VOIDmode)
*************** get_compute_type (enum tree_code code, o
*** 1732,1740 ****
  	  || optab_handler (op, TYPE_MODE (type)) == CODE_FOR_nothing))
      {
        tree vector_compute_type
! 	= type_for_widest_vector_mode (TREE_TYPE (type), op);
        if (vector_compute_type != NULL_TREE
- 	  && subparts_gt (compute_type, vector_compute_type)
  	  && maybe_ne (TYPE_VECTOR_SUBPARTS (vector_compute_type), 1U)
  	  && (optab_handler (op, TYPE_MODE (vector_compute_type))
  	      != CODE_FOR_nothing))
--- 1738,1745 ----
  	  || optab_handler (op, TYPE_MODE (type)) == CODE_FOR_nothing))
      {
        tree vector_compute_type
! 	= type_for_widest_vector_mode (type, op);
        if (vector_compute_type != NULL_TREE
  	  && maybe_ne (TYPE_VECTOR_SUBPARTS (vector_compute_type), 1U)
  	  && (optab_handler (op, TYPE_MODE (vector_compute_type))
  	      != CODE_FOR_nothing))
*************** expand_vector_conversion (gimple_stmt_it
*** 1905,1914 ****
        /* Can't use get_compute_type here, as supportable_convert_operation
  	 doesn't necessarily use an optab and needs two arguments.  */
        tree vec_compute_type
! 	= type_for_widest_vector_mode (TREE_TYPE (arg_type), mov_optab);
        if (vec_compute_type
! 	  && VECTOR_MODE_P (TYPE_MODE (vec_compute_type))
! 	  && subparts_gt (arg_type, vec_compute_type))
  	{
  	  unsigned HOST_WIDE_INT nelts
  	    = constant_lower_bound (TYPE_VECTOR_SUBPARTS (vec_compute_type));
--- 1910,1918 ----
        /* Can't use get_compute_type here, as supportable_convert_operation
  	 doesn't necessarily use an optab and needs two arguments.  */
        tree vec_compute_type
! 	= type_for_widest_vector_mode (arg_type, mov_optab);
        if (vec_compute_type
! 	  && VECTOR_MODE_P (TYPE_MODE (vec_compute_type)))
  	{
  	  unsigned HOST_WIDE_INT nelts
  	    = constant_lower_bound (TYPE_VECTOR_SUBPARTS (vec_compute_type));
diff -Nrcpad gcc-12.3.0/gcc/tree-vect-loop.cc gcc-12.4.0/gcc/tree-vect-loop.cc
*** gcc-12.3.0/gcc/tree-vect-loop.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-vect-loop.cc	Thu Jun 20 08:08:09 2024
*************** vect_analyze_loop_1 (class loop *loop, v
*** 2874,2880 ****
  		     res ? "succeeded" : " failed",
  		     GET_MODE_NAME (loop_vinfo->vector_mode));
  
!   if (!main_loop_vinfo && suggested_unroll_factor > 1)
      {
        if (dump_enabled_p ())
  	dump_printf_loc (MSG_NOTE, vect_location,
--- 2874,2880 ----
  		     res ? "succeeded" : " failed",
  		     GET_MODE_NAME (loop_vinfo->vector_mode));
  
!   if (res && !main_loop_vinfo && suggested_unroll_factor > 1)
      {
        if (dump_enabled_p ())
  	dump_printf_loc (MSG_NOTE, vect_location,
*************** pop:
*** 3513,3536 ****
  	 ???  We could relax this and handle arbitrary live stmts by
  	 forcing a scalar epilogue for example.  */
        imm_use_iterator imm_iter;
        gimple *op_use_stmt;
        unsigned cnt = 0;
        FOR_EACH_IMM_USE_STMT (op_use_stmt, imm_iter, op.ops[opi])
  	if (!is_gimple_debug (op_use_stmt)
  	    && (*code != ERROR_MARK
  		|| flow_bb_inside_loop_p (loop, gimple_bb (op_use_stmt))))
! 	  {
! 	    /* We want to allow x + x but not x < 1 ? x : 2.  */
! 	    if (is_gimple_assign (op_use_stmt)
! 		&& gimple_assign_rhs_code (op_use_stmt) == COND_EXPR)
! 	      {
! 		use_operand_p use_p;
! 		FOR_EACH_IMM_USE_ON_STMT (use_p, imm_iter)
! 		  cnt++;
! 	      }
! 	    else
! 	      cnt++;
! 	  }
        if (cnt != 1)
  	{
  	  fail = true;
--- 3513,3527 ----
  	 ???  We could relax this and handle arbitrary live stmts by
  	 forcing a scalar epilogue for example.  */
        imm_use_iterator imm_iter;
+       use_operand_p use_p;
        gimple *op_use_stmt;
        unsigned cnt = 0;
        FOR_EACH_IMM_USE_STMT (op_use_stmt, imm_iter, op.ops[opi])
  	if (!is_gimple_debug (op_use_stmt)
  	    && (*code != ERROR_MARK
  		|| flow_bb_inside_loop_p (loop, gimple_bb (op_use_stmt))))
! 	  FOR_EACH_IMM_USE_ON_STMT (use_p, imm_iter)
! 	    cnt++;
        if (cnt != 1)
  	{
  	  fail = true;
*************** vectorizable_reduction (loop_vec_info lo
*** 6859,6875 ****
  		  < GET_MODE_SIZE (SCALAR_TYPE_MODE (TREE_TYPE (vectype_op[i]))))))
  	vectype_in = vectype_op[i];
  
!       if (op.code == COND_EXPR)
  	{
- 	  /* Record how the non-reduction-def value of COND_EXPR is defined.  */
  	  if (dt == vect_constant_def)
  	    {
  	      cond_reduc_dt = dt;
  	      cond_reduc_val = op.ops[i];
  	    }
! 	  if (dt == vect_induction_def
! 	      && def_stmt_info
! 	      && is_nonwrapping_integer_induction (def_stmt_info, loop))
  	    {
  	      cond_reduc_dt = dt;
  	      cond_stmt_vinfo = def_stmt_info;
--- 6850,6867 ----
  		  < GET_MODE_SIZE (SCALAR_TYPE_MODE (TREE_TYPE (vectype_op[i]))))))
  	vectype_in = vectype_op[i];
  
!       /* Record how the non-reduction-def value of COND_EXPR is defined.
! 	 ???  For a chain of multiple CONDs we'd have to match them up all.  */
!       if (op.code == COND_EXPR && reduc_chain_length == 1)
  	{
  	  if (dt == vect_constant_def)
  	    {
  	      cond_reduc_dt = dt;
  	      cond_reduc_val = op.ops[i];
  	    }
! 	  else if (dt == vect_induction_def
! 		   && def_stmt_info
! 		   && is_nonwrapping_integer_induction (def_stmt_info, loop))
  	    {
  	      cond_reduc_dt = dt;
  	      cond_stmt_vinfo = def_stmt_info;
*************** vectorizable_induction (loop_vec_info lo
*** 8219,8224 ****
--- 8211,8225 ----
  
    step_expr = STMT_VINFO_LOOP_PHI_EVOLUTION_PART (stmt_info);
    gcc_assert (step_expr != NULL_TREE);
+   if (INTEGRAL_TYPE_P (TREE_TYPE (step_expr))
+       && !type_has_mode_precision_p (TREE_TYPE (step_expr)))
+     {
+       if (dump_enabled_p ())
+ 	dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+ 			 "bit-precision induction vectorization not "
+ 			 "supported.\n");
+       return false;
+     }
    tree step_vectype = get_same_sized_vectype (TREE_TYPE (step_expr), vectype);
  
    /* Check for backend support of PLUS/MINUS_EXPR. */
*************** find_in_mapping (tree t, void *context)
*** 9498,9506 ****
     corresponding dr_vec_info need to be reconnected to the EPILOGUE's
     stmt_vec_infos, their statements need to point to their corresponding copy,
     if they are gather loads or scatter stores then their reference needs to be
!    updated to point to its corresponding copy and finally we set
!    'base_misaligned' to false as we have already peeled for alignment in the
!    prologue of the main loop.  */
  
  static void
  update_epilogue_loop_vinfo (class loop *epilogue, tree advance)
--- 9499,9505 ----
     corresponding dr_vec_info need to be reconnected to the EPILOGUE's
     stmt_vec_infos, their statements need to point to their corresponding copy,
     if they are gather loads or scatter stores then their reference needs to be
!    updated to point to its corresponding copy.  */
  
  static void
  update_epilogue_loop_vinfo (class loop *epilogue, tree advance)
*************** update_epilogue_loop_vinfo (class loop *
*** 9641,9650 ****
  	}
        DR_STMT (dr) = STMT_VINFO_STMT (stmt_vinfo);
        stmt_vinfo->dr_aux.stmt = stmt_vinfo;
-       /* The vector size of the epilogue is smaller than that of the main loop
- 	 so the alignment is either the same or lower. This means the dr will
- 	 thus by definition be aligned.  */
-       STMT_VINFO_DR_INFO (stmt_vinfo)->base_misaligned = false;
      }
  
    epilogue_vinfo->shared->datarefs_copy.release ();
--- 9640,9645 ----
diff -Nrcpad gcc-12.3.0/gcc/tree-vect-patterns.cc gcc-12.4.0/gcc/tree-vect-patterns.cc
*** gcc-12.3.0/gcc/tree-vect-patterns.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-vect-patterns.cc	Thu Jun 20 08:08:09 2024
*************** vect_truncatable_operation_p (tree_code
*** 5031,5039 ****
--- 5031,5041 ----
  {
    switch (code)
      {
+     case NEGATE_EXPR:
      case PLUS_EXPR:
      case MINUS_EXPR:
      case MULT_EXPR:
+     case BIT_NOT_EXPR:
      case BIT_AND_EXPR:
      case BIT_IOR_EXPR:
      case BIT_XOR_EXPR:
*************** vect_determine_precisions_from_range (st
*** 5192,5229 ****
    unsigned int nops = gimple_num_ops (stmt);
  
    if (!vect_truncatable_operation_p (code))
!     /* Check that all relevant input operands are compatible, and update
!        [MIN_VALUE, MAX_VALUE] to include their ranges.  */
!     for (unsigned int i = 1; i < nops; ++i)
!       {
! 	tree op = gimple_op (stmt, i);
! 	if (TREE_CODE (op) == INTEGER_CST)
! 	  {
! 	    /* Don't require the integer to have RHS_TYPE (which it might
! 	       not for things like shift amounts, etc.), but do require it
! 	       to fit the type.  */
! 	    if (!int_fits_type_p (op, type))
! 	      return;
! 
! 	    min_value = wi::min (min_value, wi::to_wide (op, precision), sign);
! 	    max_value = wi::max (max_value, wi::to_wide (op, precision), sign);
! 	  }
! 	else if (TREE_CODE (op) == SSA_NAME)
! 	  {
! 	    /* Ignore codes that don't take uniform arguments.  */
! 	    if (!types_compatible_p (TREE_TYPE (op), type))
! 	      return;
  
! 	    wide_int op_min_value, op_max_value;
! 	    if (!vect_get_range_info (op, &op_min_value, &op_max_value))
! 	      return;
  
! 	    min_value = wi::min (min_value, op_min_value, sign);
! 	    max_value = wi::max (max_value, op_max_value, sign);
! 	  }
! 	else
  	  return;
!       }
  
    /* Try to switch signed types for unsigned types if we can.
       This is better for two reasons.  First, unsigned ops tend
--- 5194,5278 ----
    unsigned int nops = gimple_num_ops (stmt);
  
    if (!vect_truncatable_operation_p (code))
!     {
!       /* Handle operations that can be computed in type T if all inputs
! 	 and outputs can be represented in type T.  Also handle left and
! 	 right shifts, where (in addition) the maximum shift amount must
! 	 be less than the number of bits in T.  */
!       bool is_shift;
!       switch (code)
! 	{
! 	case LSHIFT_EXPR:
! 	case RSHIFT_EXPR:
! 	  is_shift = true;
! 	  break;
  
! 	case ABS_EXPR:
! 	case MIN_EXPR:
! 	case MAX_EXPR:
! 	case TRUNC_DIV_EXPR:
! 	case CEIL_DIV_EXPR:
! 	case FLOOR_DIV_EXPR:
! 	case ROUND_DIV_EXPR:
! 	case EXACT_DIV_EXPR:
! 	  /* Modulus is excluded because it is typically calculated by doing
! 	     a division, for which minimum signed / -1 isn't representable in
! 	     the original signed type.  We could take the division range into
! 	     account instead, if handling modulus ever becomes important.  */
! 	  is_shift = false;
! 	  break;
  
! 	default:
  	  return;
! 	}
!       for (unsigned int i = 1; i < nops; ++i)
! 	{
! 	  tree op = gimple_op (stmt, i);
! 	  wide_int op_min_value, op_max_value;
! 	  if (TREE_CODE (op) == INTEGER_CST)
! 	    {
! 	      unsigned int op_precision = TYPE_PRECISION (TREE_TYPE (op));
! 	      op_min_value = op_max_value = wi::to_wide (op, op_precision);
! 	    }
! 	  else if (TREE_CODE (op) == SSA_NAME)
! 	    {
! 	      if (!vect_get_range_info (op, &op_min_value, &op_max_value))
! 		return;
! 	    }
! 	  else
! 	    return;
! 
! 	  if (is_shift && i == 2)
! 	    {
! 	      /* There needs to be one more bit than the maximum shift amount.
! 
! 		 If the maximum shift amount is already 1 less than PRECISION
! 		 then we can't narrow the shift further.  Dealing with that
! 		 case first ensures that we can safely use an unsigned range
! 		 below.
! 
! 		 op_min_value isn't relevant, since shifts by negative amounts
! 		 are UB.  */
! 	      if (wi::geu_p (op_max_value, precision - 1))
! 		return;
! 	      unsigned int min_bits = op_max_value.to_uhwi () + 1;
! 
! 	      /* As explained below, we can convert a signed shift into an
! 		 unsigned shift if the sign bit is always clear.  At this
! 		 point we've already processed the ranges of the output and
! 		 the first input.  */
! 	      auto op_sign = sign;
! 	      if (sign == SIGNED && !wi::neg_p (min_value))
! 		op_sign = UNSIGNED;
! 	      op_min_value = wide_int::from (wi::min_value (min_bits, op_sign),
! 					     precision, op_sign);
! 	      op_max_value = wide_int::from (wi::max_value (min_bits, op_sign),
! 					     precision, op_sign);
! 	    }
! 	  min_value = wi::min (min_value, op_min_value, sign);
! 	  max_value = wi::max (max_value, op_max_value, sign);
! 	}
!     }
  
    /* Try to switch signed types for unsigned types if we can.
       This is better for two reasons.  First, unsigned ops tend
diff -Nrcpad gcc-12.3.0/gcc/tree-vect-slp.cc gcc-12.4.0/gcc/tree-vect-slp.cc
*** gcc-12.3.0/gcc/tree-vect-slp.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-vect-slp.cc	Thu Jun 20 08:08:09 2024
*************** vect_build_slp_tree_2 (vec_info *vinfo,
*** 1722,1731 ****
    if (STMT_VINFO_GROUPED_ACCESS (stmt_info)
        && DR_IS_READ (STMT_VINFO_DATA_REF (stmt_info)))
      {
!       if (gcall *stmt = dyn_cast  (stmt_info->stmt))
! 	gcc_assert (gimple_call_internal_p (stmt, IFN_MASK_LOAD)
! 		    || gimple_call_internal_p (stmt, IFN_GATHER_LOAD)
! 		    || gimple_call_internal_p (stmt, IFN_MASK_GATHER_LOAD));
        else
  	{
  	  *max_nunits = this_max_nunits;
--- 1722,1729 ----
    if (STMT_VINFO_GROUPED_ACCESS (stmt_info)
        && DR_IS_READ (STMT_VINFO_DATA_REF (stmt_info)))
      {
!       if (STMT_VINFO_GATHER_SCATTER_P (stmt_info))
! 	gcc_assert (DR_IS_READ (STMT_VINFO_DATA_REF (stmt_info)));
        else
  	{
  	  *max_nunits = this_max_nunits;
*************** vect_build_slp_tree_2 (vec_info *vinfo,
*** 1741,1755 ****
  	  load_permutation.create (group_size);
  	  stmt_vec_info first_stmt_info
  	    = DR_GROUP_FIRST_ELEMENT (SLP_TREE_SCALAR_STMTS (node)[0]);
  	  FOR_EACH_VEC_ELT (SLP_TREE_SCALAR_STMTS (node), j, load_info)
  	    {
  	      int load_place = vect_get_place_in_interleaving_chain
  		  (load_info, first_stmt_info);
  	      gcc_assert (load_place != -1);
! 	      load_permutation.safe_push (load_place);
  	    }
- 	  SLP_TREE_LOAD_PERMUTATION (node) = load_permutation;
- 	  return node;
  	}
      }
    else if (gimple_assign_single_p (stmt_info->stmt)
--- 1739,1775 ----
  	  load_permutation.create (group_size);
  	  stmt_vec_info first_stmt_info
  	    = DR_GROUP_FIRST_ELEMENT (SLP_TREE_SCALAR_STMTS (node)[0]);
+ 	  bool any_permute = false;
  	  FOR_EACH_VEC_ELT (SLP_TREE_SCALAR_STMTS (node), j, load_info)
  	    {
  	      int load_place = vect_get_place_in_interleaving_chain
  		  (load_info, first_stmt_info);
  	      gcc_assert (load_place != -1);
! 	      any_permute |= load_place != j;
! 	      load_permutation.quick_push (load_place);
! 	    }
! 
! 	  if (gcall *stmt = dyn_cast  (stmt_info->stmt))
! 	    {
! 	      gcc_assert (gimple_call_internal_p (stmt, IFN_MASK_LOAD)
! 			  || gimple_call_internal_p (stmt, IFN_GATHER_LOAD)
! 			  || gimple_call_internal_p (stmt, IFN_MASK_GATHER_LOAD));
! 	      load_permutation.release ();
! 	      /* We cannot handle permuted masked loads, see PR114375.  */
! 	      if (any_permute
! 		  || (STMT_VINFO_GROUPED_ACCESS (stmt_info)
! 		      && DR_GROUP_SIZE (first_stmt_info) != group_size)
! 		  || STMT_VINFO_STRIDED_P (stmt_info))
! 		{
! 		  matches[0] = false;
! 		  return NULL;
! 		}
! 	    }
! 	  else
! 	    {
! 	      SLP_TREE_LOAD_PERMUTATION (node) = load_permutation;
! 	      return node;
  	    }
  	}
      }
    else if (gimple_assign_single_p (stmt_info->stmt)
*************** vect_analyze_slp (vec_info *vinfo, unsig
*** 3410,3415 ****
--- 3430,3439 ----
        for (unsigned i = 0; i < bb_vinfo->roots.length (); ++i)
  	{
  	  vect_location = bb_vinfo->roots[i].roots[0]->stmt;
+ 	  /* Apply patterns.  */
+ 	  for (unsigned j = 0; j < bb_vinfo->roots[i].stmts.length (); ++j)
+ 	    bb_vinfo->roots[i].stmts[j]
+ 	      = vect_stmt_to_vectorize (bb_vinfo->roots[i].stmts[j]);
  	  if (vect_build_slp_instance (bb_vinfo, bb_vinfo->roots[i].kind,
  				       bb_vinfo->roots[i].stmts,
  				       bb_vinfo->roots[i].roots,
*************** vect_optimize_slp (vec_info *vinfo)
*** 3709,3717 ****
        vertices[idx].perm_out = perms.length () - 1;
      }
  
!   /* In addition to the above we have to mark outgoing permutes facing
!      non-reduction graph entries that are not represented as to be
!      materialized.  */
    for (slp_instance instance : vinfo->slp_instances)
      if (SLP_INSTANCE_KIND (instance) == slp_inst_kind_ctor)
        {
--- 3733,3740 ----
        vertices[idx].perm_out = perms.length () - 1;
      }
  
!   /* We have to mark outgoing permutations facing non-associating-reduction
!      graph entries that are not represented as to be materialized.  */
    for (slp_instance instance : vinfo->slp_instances)
      if (SLP_INSTANCE_KIND (instance) == slp_inst_kind_ctor)
        {
*************** vect_optimize_slp (vec_info *vinfo)
*** 3720,3725 ****
--- 3743,3762 ----
  	vertices[SLP_INSTANCE_TREE (instance)->vertex].perm_in = 0;
  	vertices[SLP_INSTANCE_TREE (instance)->vertex].perm_out = 0;
        }
+     else if (SLP_INSTANCE_KIND (instance) == slp_inst_kind_reduc_chain)
+       {
+ 	stmt_vec_info stmt_info
+ 	  = SLP_TREE_REPRESENTATIVE (SLP_INSTANCE_TREE (instance));
+ 	stmt_vec_info reduc_info = info_for_reduction (vinfo, stmt_info);
+ 	if (needs_fold_left_reduction_p (TREE_TYPE
+ 					   (gimple_get_lhs (stmt_info->stmt)),
+ 					 STMT_VINFO_REDUC_CODE (reduc_info)))
+ 	  {
+ 	    unsigned int node_i = SLP_INSTANCE_TREE (instance)->vertex;
+ 	    vertices[node_i].perm_in = 0;
+ 	    vertices[node_i].perm_out = 0;
+ 	  }
+       }
  
    /* Propagate permutes along the graph and compute materialization points.  */
    bool changed;
*************** vect_optimize_slp (vec_info *vinfo)
*** 4058,4063 ****
--- 4095,4109 ----
  		{
  		  /* Preserve the special VEC_PERM we use to shield existing
  		     vector defs from the rest.  But make it a no-op.  */
+ 		  auto_vec saved;
+ 		  saved.create (SLP_TREE_SCALAR_STMTS (old).length ());
+ 		  for (unsigned i = 0;
+ 		       i < SLP_TREE_SCALAR_STMTS (old).length (); ++i)
+ 		    saved.quick_push (SLP_TREE_SCALAR_STMTS (old)[i]);
+ 		  for (unsigned i = 0;
+ 		       i < SLP_TREE_SCALAR_STMTS (old).length (); ++i)
+ 		    SLP_TREE_SCALAR_STMTS (old)[i]
+ 		      = saved[SLP_TREE_LANE_PERMUTATION (old)[i].second];
  		  unsigned i = 0;
  		  for (std::pair &p
  		       : SLP_TREE_LANE_PERMUTATION (old))
*************** vect_schedule_slp_node (vec_info *vinfo,
*** 7207,7218 ****
    int i;
    slp_tree child;
  
-   /* For existing vectors there's nothing to do.  */
-   if (SLP_TREE_VEC_DEFS (node).exists ())
-     return;
- 
-   gcc_assert (SLP_TREE_VEC_STMTS (node).is_empty ());
- 
    /* Vectorize externals and constants.  */
    if (SLP_TREE_DEF_TYPE (node) == vect_constant_def
        || SLP_TREE_DEF_TYPE (node) == vect_external_def)
--- 7253,7258 ----
*************** vect_schedule_slp_node (vec_info *vinfo,
*** 7223,7232 ****
        if (!SLP_TREE_VECTYPE (node))
  	return;
  
!       vect_create_constant_vectors (vinfo, node);
        return;
      }
  
    stmt_vec_info stmt_info = SLP_TREE_REPRESENTATIVE (node);
  
    gcc_assert (SLP_TREE_NUMBER_OF_VEC_STMTS (node) != 0);
--- 7263,7280 ----
        if (!SLP_TREE_VECTYPE (node))
  	return;
  
!       /* There are two reasons vector defs might already exist.  The first
! 	 is that we are vectorizing an existing vector def.  The second is
! 	 when performing BB vectorization shared constant/external nodes
! 	 are not split apart during partitioning so during the code-gen
! 	 DFS walk we can end up visiting them twice.  */
!       if (! SLP_TREE_VEC_DEFS (node).exists ())
! 	vect_create_constant_vectors (vinfo, node);
        return;
      }
  
+   gcc_assert (SLP_TREE_VEC_DEFS (node).is_empty ());
+ 
    stmt_vec_info stmt_info = SLP_TREE_REPRESENTATIVE (node);
  
    gcc_assert (SLP_TREE_NUMBER_OF_VEC_STMTS (node) != 0);
*************** vect_schedule_slp_node (vec_info *vinfo,
*** 7263,7268 ****
--- 7311,7326 ----
        /* Emit other stmts after the children vectorized defs which is
  	 earliest possible.  */
        gimple *last_stmt = NULL;
+       if (auto loop_vinfo = dyn_cast  (vinfo))
+ 	if (LOOP_VINFO_FULLY_MASKED_P (loop_vinfo)
+ 	    || LOOP_VINFO_FULLY_WITH_LENGTH_P (loop_vinfo))
+ 	  {
+ 	    /* But avoid scheduling internal defs outside of the loop when
+ 	       we might have only implicitly tracked loop mask/len defs.  */
+ 	    gimple_stmt_iterator si
+ 	      = gsi_after_labels (LOOP_VINFO_LOOP (loop_vinfo)->header);
+ 	    last_stmt = gsi_stmt (si);
+ 	  }
        bool seen_vector_def = false;
        FOR_EACH_VEC_ELT (SLP_TREE_CHILDREN (node), i, child)
  	if (SLP_TREE_DEF_TYPE (child) == vect_internal_def)
diff -Nrcpad gcc-12.3.0/gcc/tree-vect-stmts.cc gcc-12.4.0/gcc/tree-vect-stmts.cc
*** gcc-12.3.0/gcc/tree-vect-stmts.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree-vect-stmts.cc	Thu Jun 20 08:08:09 2024
*************** vectorizable_load (vec_info *vinfo,
*** 8994,8999 ****
--- 8994,9007 ----
  			     "unsupported masked emulated gather.\n");
  	  return false;
  	}
+       else if (memory_access_type == VMAT_ELEMENTWISE
+ 	       || memory_access_type == VMAT_STRIDED_SLP)
+ 	{
+ 	  if (dump_enabled_p ())
+ 	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+ 			     "unsupported masked strided access.\n");
+ 	  return false;
+ 	}
      }
  
    if (!vec_stmt) /* transformation not required.  */
diff -Nrcpad gcc-12.3.0/gcc/tree.cc gcc-12.4.0/gcc/tree.cc
*** gcc-12.3.0/gcc/tree.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tree.cc	Thu Jun 20 08:08:09 2024
*************** build_qualified_type (tree type, int typ
*** 5649,5655 ****
    return t;
  }
  
! /* Create a variant of type T with alignment ALIGN.  */
  
  tree
  build_aligned_type (tree type, unsigned int align)
--- 5649,5656 ----
    return t;
  }
  
! /* Create a variant of type T with alignment ALIGN which
!    is measured in bits.  */
  
  tree
  build_aligned_type (tree type, unsigned int align)
*************** build_opaque_vector_type (tree innertype
*** 10123,10128 ****
--- 10124,10131 ----
    TYPE_NEXT_VARIANT (cand) = TYPE_NEXT_VARIANT (t);
    TYPE_NEXT_VARIANT (t) = cand;
    TYPE_MAIN_VARIANT (cand) = TYPE_MAIN_VARIANT (t);
+   /* Type variants have no alias set defined.  */
+   TYPE_ALIAS_SET (cand) = -1;
    return cand;
  }
  
diff -Nrcpad gcc-12.3.0/gcc/tsan.cc gcc-12.4.0/gcc/tsan.cc
*** gcc-12.3.0/gcc/tsan.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/tsan.cc	Thu Jun 20 08:08:09 2024
*************** instrument_expr (gimple_stmt_iterator gs
*** 139,144 ****
--- 139,147 ----
    if (TREE_READONLY (base) || (VAR_P (base) && DECL_HARD_REGISTER (base)))
      return false;
  
+   if (!ADDR_SPACE_GENERIC_P (TYPE_ADDR_SPACE (TREE_TYPE (base))))
+     return false;
+ 
    stmt = gsi_stmt (gsi);
    loc = gimple_location (stmt);
    rhs = is_vptr_store (stmt, expr, is_write);
diff -Nrcpad gcc-12.3.0/gcc/ubsan.cc gcc-12.4.0/gcc/ubsan.cc
*** gcc-12.3.0/gcc/ubsan.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/ubsan.cc	Thu Jun 20 08:08:09 2024
*************** along with GCC; see the file COPYING3.
*** 49,54 ****
--- 49,55 ----
  #include "tree-cfg.h"
  #include "gimple-fold.h"
  #include "varasm.h"
+ #include "target.h"
  
  /* Map from a tree to a VAR_DECL tree.  */
  
*************** ubsan_expand_null_ifn (gimple_stmt_itera
*** 784,789 ****
--- 785,797 ----
  	}
      }
    check_null = sanitize_flags_p (SANITIZE_NULL);
+   if (check_null && POINTER_TYPE_P (TREE_TYPE (ptr)))
+     {
+       addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (ptr)));
+       if (!ADDR_SPACE_GENERIC_P (as)
+ 	  && targetm.addr_space.zero_address_valid (as))
+ 	check_null = false;
+     }
  
    if (check_align == NULL_TREE && !check_null)
      {
*************** instrument_mem_ref (tree mem, tree base,
*** 1375,1382 ****
        if (align <= 1)
  	align = 0;
      }
!   if (align == 0 && !sanitize_flags_p (SANITIZE_NULL))
!     return;
    tree t = TREE_OPERAND (base, 0);
    if (!POINTER_TYPE_P (TREE_TYPE (t)))
      return;
--- 1383,1397 ----
        if (align <= 1)
  	align = 0;
      }
!   if (align == 0)
!     {
!       if (!sanitize_flags_p (SANITIZE_NULL))
! 	return;
!       addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (base));
!       if (!ADDR_SPACE_GENERIC_P (as)
! 	  && targetm.addr_space.zero_address_valid (as))
! 	return;
!     }
    tree t = TREE_OPERAND (base, 0);
    if (!POINTER_TYPE_P (TREE_TYPE (t)))
      return;
*************** instrument_bool_enum_load (gimple_stmt_i
*** 1688,1700 ****
        || TREE_CODE (gimple_assign_lhs (stmt)) != SSA_NAME)
      return;
  
    bool ends_bb = stmt_ends_bb_p (stmt);
    location_t loc = gimple_location (stmt);
    tree lhs = gimple_assign_lhs (stmt);
    tree ptype = build_pointer_type (TREE_TYPE (rhs));
    tree atype = reference_alias_ptr_type (rhs);
    gimple *g = gimple_build_assign (make_ssa_name (ptype),
! 				  build_fold_addr_expr (rhs));
    gimple_set_location (g, loc);
    gsi_insert_before (gsi, g, GSI_SAME_STMT);
    tree mem = build2 (MEM_REF, utype, gimple_assign_lhs (g),
--- 1703,1719 ----
        || TREE_CODE (gimple_assign_lhs (stmt)) != SSA_NAME)
      return;
  
+   addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (rhs));
+   if (as != TYPE_ADDR_SPACE (utype))
+     utype = build_qualified_type (utype, TYPE_QUALS (utype)
+ 					 | ENCODE_QUAL_ADDR_SPACE (as));
    bool ends_bb = stmt_ends_bb_p (stmt);
    location_t loc = gimple_location (stmt);
    tree lhs = gimple_assign_lhs (stmt);
    tree ptype = build_pointer_type (TREE_TYPE (rhs));
    tree atype = reference_alias_ptr_type (rhs);
    gimple *g = gimple_build_assign (make_ssa_name (ptype),
! 				   build_fold_addr_expr (rhs));
    gimple_set_location (g, loc);
    gsi_insert_before (gsi, g, GSI_SAME_STMT);
    tree mem = build2 (MEM_REF, utype, gimple_assign_lhs (g),
diff -Nrcpad gcc-12.3.0/gcc/value-range.h gcc-12.4.0/gcc/value-range.h
*** gcc-12.3.0/gcc/value-range.h	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/value-range.h	Thu Jun 20 08:08:09 2024
*************** irange::normalize_kind ()
*** 605,610 ****
--- 605,620 ----
      }
  }
  
+ inline bool
+ contains_zero_p (const irange &r)
+ {
+   if (r.undefined_p ())
+     return false;
+ 
+   tree zero = build_zero_cst (r.type ());
+   return r.contains_p (zero);
+ }
+ 
  // Return the maximum value for TYPE.
  
  inline tree
diff -Nrcpad gcc-12.3.0/gcc/varasm.cc gcc-12.4.0/gcc/varasm.cc
*** gcc-12.3.0/gcc/varasm.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/varasm.cc	Thu Jun 20 08:08:09 2024
*************** initializer_constant_valid_p_1 (tree val
*** 4897,4912 ****
  	tree src_type = TREE_TYPE (src);
  	tree dest_type = TREE_TYPE (value);
  
! 	/* Allow conversions between pointer types, floating-point
! 	   types, and offset types.  */
  	if ((POINTER_TYPE_P (dest_type) && POINTER_TYPE_P (src_type))
- 	    || (FLOAT_TYPE_P (dest_type) && FLOAT_TYPE_P (src_type))
  	    || (TREE_CODE (dest_type) == OFFSET_TYPE
  		&& TREE_CODE (src_type) == OFFSET_TYPE))
  	  return initializer_constant_valid_p_1 (src, endtype, cache);
  
! 	/* Allow length-preserving conversions between integer types.  */
! 	if (INTEGRAL_TYPE_P (dest_type) && INTEGRAL_TYPE_P (src_type)
  	    && (TYPE_PRECISION (dest_type) == TYPE_PRECISION (src_type)))
  	  return initializer_constant_valid_p_1 (src, endtype, cache);
  
--- 4897,4912 ----
  	tree src_type = TREE_TYPE (src);
  	tree dest_type = TREE_TYPE (value);
  
! 	/* Allow conversions between pointer types and offset types.  */
  	if ((POINTER_TYPE_P (dest_type) && POINTER_TYPE_P (src_type))
  	    || (TREE_CODE (dest_type) == OFFSET_TYPE
  		&& TREE_CODE (src_type) == OFFSET_TYPE))
  	  return initializer_constant_valid_p_1 (src, endtype, cache);
  
! 	/* Allow length-preserving conversions between integer types and
! 	   floating-point types.  */
! 	if (((INTEGRAL_TYPE_P (dest_type) && INTEGRAL_TYPE_P (src_type))
! 	     || (FLOAT_TYPE_P (dest_type) && FLOAT_TYPE_P (src_type)))
  	    && (TYPE_PRECISION (dest_type) == TYPE_PRECISION (src_type)))
  	  return initializer_constant_valid_p_1 (src, endtype, cache);
  
*************** output_constant (tree exp, unsigned HOST
*** 5276,5281 ****
--- 5276,5282 ----
        break;
  
      case REAL_TYPE:
+       gcc_assert (size == thissize);
        if (TREE_CODE (exp) != REAL_CST)
  	error ("initializer for floating value is not a floating constant");
        else
diff -Nrcpad gcc-12.3.0/gcc/wide-int.cc gcc-12.4.0/gcc/wide-int.cc
*** gcc-12.3.0/gcc/wide-int.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/wide-int.cc	Thu Jun 20 08:08:09 2024
*************** wi::divmod_internal (HOST_WIDE_INT *quot
*** 1888,1896 ****
      }
  
    wi_unpack (b_dividend, dividend.get_val (), dividend.get_len (),
! 	     dividend_blocks_needed, dividend_prec, sgn);
    wi_unpack (b_divisor, divisor.get_val (), divisor.get_len (),
! 	     divisor_blocks_needed, divisor_prec, sgn);
  
    m = dividend_blocks_needed;
    b_dividend[m] = 0;
--- 1888,1896 ----
      }
  
    wi_unpack (b_dividend, dividend.get_val (), dividend.get_len (),
! 	     dividend_blocks_needed, dividend_prec, UNSIGNED);
    wi_unpack (b_divisor, divisor.get_val (), divisor.get_len (),
! 	     divisor_blocks_needed, divisor_prec, UNSIGNED);
  
    m = dividend_blocks_needed;
    b_dividend[m] = 0;
diff -Nrcpad gcc-12.3.0/gcc/wide-int.h gcc-12.4.0/gcc/wide-int.h
*** gcc-12.3.0/gcc/wide-int.h	Mon May  8 12:14:41 2023
--- gcc-12.4.0/gcc/wide-int.h	Thu Jun 20 08:08:09 2024
*************** wi::lrotate (const T1 &x, const T2 &y, u
*** 3169,3177 ****
      width = precision;
    WI_UNARY_RESULT (T2) ymod = umod_trunc (y, width);
    WI_UNARY_RESULT (T1) left = wi::lshift (x, ymod);
!   WI_UNARY_RESULT (T1) right = wi::lrshift (x, wi::sub (width, ymod));
    if (width != precision)
!     return wi::zext (left, width) | wi::zext (right, width);
    return left | right;
  }
  
--- 3169,3179 ----
      width = precision;
    WI_UNARY_RESULT (T2) ymod = umod_trunc (y, width);
    WI_UNARY_RESULT (T1) left = wi::lshift (x, ymod);
!   WI_UNARY_RESULT (T1) right
!     = wi::lrshift (width != precision ? wi::zext (x, width) : x,
! 		   wi::sub (width, ymod));
    if (width != precision)
!     return wi::zext (left, width) | right;
    return left | right;
  }
  
*************** wi::rrotate (const T1 &x, const T2 &y, u
*** 3186,3195 ****
    if (width == 0)
      width = precision;
    WI_UNARY_RESULT (T2) ymod = umod_trunc (y, width);
!   WI_UNARY_RESULT (T1) right = wi::lrshift (x, ymod);
    WI_UNARY_RESULT (T1) left = wi::lshift (x, wi::sub (width, ymod));
    if (width != precision)
!     return wi::zext (left, width) | wi::zext (right, width);
    return left | right;
  }
  
--- 3188,3198 ----
    if (width == 0)
      width = precision;
    WI_UNARY_RESULT (T2) ymod = umod_trunc (y, width);
!   WI_UNARY_RESULT (T1) right
!     = wi::lrshift (width != precision ? wi::zext (x, width) : x, ymod);
    WI_UNARY_RESULT (T1) left = wi::lshift (x, wi::sub (width, ymod));
    if (width != precision)
!     return wi::zext (left, width) | right;
    return left | right;
  }
  
diff -Nrcpad gcc-12.3.0/gnattools/ChangeLog gcc-12.4.0/gnattools/ChangeLog
*** gcc-12.3.0/gnattools/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gnattools/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/gotools/ChangeLog gcc-12.4.0/gotools/ChangeLog
*** gcc-12.3.0/gotools/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/gotools/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/include/ChangeLog gcc-12.4.0/include/ChangeLog
*** gcc-12.3.0/include/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/include/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/intl/ChangeLog gcc-12.4.0/intl/ChangeLog
*** gcc-12.3.0/intl/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/intl/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libada/ChangeLog gcc-12.4.0/libada/ChangeLog
*** gcc-12.3.0/libada/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libada/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libatomic/ChangeLog gcc-12.4.0/libatomic/ChangeLog
*** gcc-12.3.0/libatomic/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libatomic/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libbacktrace/ChangeLog gcc-12.4.0/libbacktrace/ChangeLog
*** gcc-12.3.0/libbacktrace/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libbacktrace/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libcc1/ChangeLog gcc-12.4.0/libcc1/ChangeLog
*** gcc-12.3.0/libcc1/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libcc1/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,16 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-11  Francois-Xavier Coudert  
+ 
+ 	Backported from master:
+ 	2024-03-16  Francois-Xavier Coudert  
+ 
+ 	PR middle-end/111632
+ 	* libcc1plugin.cc: Fix include.
+ 	* libcp1plugin.cc: Fix include.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libcc1/libcc1plugin.cc gcc-12.4.0/libcc1/libcc1plugin.cc
*** gcc-12.3.0/libcc1/libcc1plugin.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libcc1/libcc1plugin.cc	Thu Jun 20 08:08:09 2024
***************
*** 32,37 ****
--- 32,38 ----
  #undef PACKAGE_VERSION
  
  #define INCLUDE_MEMORY
+ #define INCLUDE_VECTOR
  #include "gcc-plugin.h"
  #include "system.h"
  #include "coretypes.h"
***************
*** 69,76 ****
  #include "gcc-c-interface.h"
  #include "context.hh"
  
- #include 
- 
  using namespace cc1_plugin;
  
  
--- 70,75 ----
diff -Nrcpad gcc-12.3.0/libcc1/libcp1plugin.cc gcc-12.4.0/libcc1/libcp1plugin.cc
*** gcc-12.3.0/libcc1/libcp1plugin.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libcc1/libcp1plugin.cc	Thu Jun 20 08:08:09 2024
***************
*** 33,38 ****
--- 33,39 ----
  #undef PACKAGE_VERSION
  
  #define INCLUDE_MEMORY
+ #define INCLUDE_VECTOR
  #include "gcc-plugin.h"
  #include "system.h"
  #include "coretypes.h"
***************
*** 71,78 ****
  #include "rpc.hh"
  #include "context.hh"
  
- #include 
- 
  using namespace cc1_plugin;
  
  
--- 72,77 ----
diff -Nrcpad gcc-12.3.0/libcody/ChangeLog gcc-12.4.0/libcody/ChangeLog
*** gcc-12.3.0/libcody/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libcody/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libcpp/ChangeLog gcc-12.4.0/libcpp/ChangeLog
*** gcc-12.3.0/libcpp/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libcpp/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,18 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-02-22  Jakub Jelinek  
+ 
+ 	PR c/114007
+ 	* include/cpplib.h (COLON_SCOPE): Define to PURE_ZERO.
+ 	* lex.cc (_cpp_lex_direct): When lexing CPP_COLON with another
+ 	colon after it, if !CPP_OPTION (pfile, scope) set COLON_SCOPE
+ 	flag on the first CPP_COLON token.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libcpp/include/cpplib.h gcc-12.4.0/libcpp/include/cpplib.h
*** gcc-12.3.0/libcpp/include/cpplib.h	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libcpp/include/cpplib.h	Thu Jun 20 08:08:09 2024
*************** struct GTY(()) cpp_string {
*** 193,198 ****
--- 193,199 ----
  #define BOL		(1 << 6) /* Token at beginning of line.  */
  #define PURE_ZERO	(1 << 7) /* Single 0 digit, used by the C++ frontend,
  				    set in c-lex.cc.  */
+ #define COLON_SCOPE	PURE_ZERO /* Adjacent colons in C < 23.  */
  #define SP_DIGRAPH	(1 << 8) /* # or ## token was a digraph.  */
  #define SP_PREV_WHITE	(1 << 9) /* If whitespace before a ##
  				    operator, or before this token
diff -Nrcpad gcc-12.3.0/libcpp/lex.cc gcc-12.4.0/libcpp/lex.cc
*** gcc-12.3.0/libcpp/lex.cc	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libcpp/lex.cc	Thu Jun 20 08:08:09 2024
*************** _cpp_lex_direct (cpp_reader *pfile)
*** 3945,3952 ****
  
      case ':':
        result->type = CPP_COLON;
!       if (*buffer->cur == ':' && CPP_OPTION (pfile, scope))
! 	buffer->cur++, result->type = CPP_SCOPE;
        else if (*buffer->cur == '>' && CPP_OPTION (pfile, digraphs))
  	{
  	  buffer->cur++;
--- 3945,3957 ----
  
      case ':':
        result->type = CPP_COLON;
!       if (*buffer->cur == ':')
! 	{
! 	  if (CPP_OPTION (pfile, scope))
! 	    buffer->cur++, result->type = CPP_SCOPE;
! 	  else
! 	    result->flags |= COLON_SCOPE;
! 	}
        else if (*buffer->cur == '>' && CPP_OPTION (pfile, digraphs))
  	{
  	  buffer->cur++;
diff -Nrcpad gcc-12.3.0/libcpp/po/ChangeLog gcc-12.4.0/libcpp/po/ChangeLog
*** gcc-12.3.0/libcpp/po/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libcpp/po/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libdecnumber/ChangeLog gcc-12.4.0/libdecnumber/ChangeLog
*** gcc-12.3.0/libdecnumber/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libdecnumber/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libffi/ChangeLog gcc-12.4.0/libffi/ChangeLog
*** gcc-12.3.0/libffi/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libffi/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,15 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2023-05-09  Dan Horák  
+ 
+ 	Backported from master:
+ 	2023-05-06  Dan Horák  
+ 
+ 	PR libffi/109447
+ 	* src/powerpc/ffi_linux64.c (ffi_prep_args64): Update arg.f128 pointer.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libffi/src/powerpc/ffi_linux64.c gcc-12.4.0/libffi/src/powerpc/ffi_linux64.c
*** gcc-12.3.0/libffi/src/powerpc/ffi_linux64.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libffi/src/powerpc/ffi_linux64.c	Thu Jun 20 08:08:09 2024
*************** ffi_prep_args64 (extended_cif *ecif, uns
*** 680,686 ****
                      {
                        if (vecarg_count < NUM_VEC_ARG_REGISTERS64
                            && i < nfixedargs)
! 		        memcpy (vec_base.f128++, arg.f128, sizeof (float128));
                        else
  		        memcpy (next_arg.f128, arg.f128++, sizeof (float128));
                        if (++next_arg.f128 == gpr_end.f128)
--- 680,686 ----
                      {
                        if (vecarg_count < NUM_VEC_ARG_REGISTERS64
                            && i < nfixedargs)
! 		        memcpy (vec_base.f128++, arg.f128++, sizeof (float128));
                        else
  		        memcpy (next_arg.f128, arg.f128++, sizeof (float128));
                        if (++next_arg.f128 == gpr_end.f128)
diff -Nrcpad gcc-12.3.0/libgcc/ChangeLog gcc-12.4.0/libgcc/ChangeLog
*** gcc-12.3.0/libgcc/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libgcc/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,48 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-12  Andre Vieira  
+ 
+ 	Backported from master:
+ 	2024-06-06  Andre Vieira  
+ 
+ 	PR target/115360
+ 	* config/arm/cmse_nonsecure_call.S: Add .type and .size directives.
+ 
+ 2024-04-12  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2022-12-24  Iain Sandoe  
+ 
+ 	* config/t-slibgcc-darwin (install-darwin-libgcc-stubs): Skip the
+ 	install of libgcc_s.1.dylib when the installation is into the build
+ 	gcc directory.
+ 
+ 2024-01-13  Sandra Loosemore  
+ 
+ 	Backported from master:
+ 	2024-01-12  Sandra Loosemore  
+ 
+ 	* unwind-dw2-fde-dip.c (_Unwind_Find_FDE): Do not try to use
+ 	_dl_find_object on nios2; it doesn't work.
+ 
+ 2023-05-21  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-05-19  Iain Sandoe  
+ 
+ 	* config.host: Arrange to set min Darwin OS versions from
+ 	the configured host version.
+ 	* config/darwin10-unwind-find-enc-func.c: Do not use current
+ 	headers, but declare the nexessary structures locally to the
+ 	versions in use for Mac OSX 10.6.
+ 	* config/t-darwin: Amend to handle configured min OS
+ 	versions.
+ 	* config/t-darwin-min-1: New.
+ 	* config/t-darwin-min-5: New.
+ 	* config/t-darwin-min-8: New.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libgcc/config/arm/cmse_nonsecure_call.S gcc-12.4.0/libgcc/config/arm/cmse_nonsecure_call.S
*** gcc-12.3.0/libgcc/config/arm/cmse_nonsecure_call.S	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgcc/config/arm/cmse_nonsecure_call.S	Thu Jun 20 08:08:09 2024
***************
*** 33,38 ****
--- 33,39 ----
  #endif
  
  .thumb
+ .type __gnu_cmse_nonsecure_call, %function
  .global __gnu_cmse_nonsecure_call
  __gnu_cmse_nonsecure_call:
  #if defined(__ARM_ARCH_8M_MAIN__)
*************** pop	    {r5-r7, pc}
*** 142,144 ****
--- 143,146 ----
  #else
  #error "This should only be used for armv8-m base- and mainline."
  #endif
+ .size __gnu_cmse_nonsecure_call, .-__gnu_cmse_nonsecure_call
diff -Nrcpad gcc-12.3.0/libgcc/config/avr/libf7/ChangeLog gcc-12.4.0/libgcc/config/avr/libf7/ChangeLog
*** gcc-12.3.0/libgcc/config/avr/libf7/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libgcc/config/avr/libf7/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libgcc/config/darwin10-unwind-find-enc-func.c gcc-12.4.0/libgcc/config/darwin10-unwind-find-enc-func.c
*** gcc-12.3.0/libgcc/config/darwin10-unwind-find-enc-func.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgcc/config/darwin10-unwind-find-enc-func.c	Thu Jun 20 08:08:09 2024
***************
*** 1,8 ****
- #include "tconfig.h"
- #include "tsystem.h"
- #include "unwind-dw2-fde.h"
  #include "libgcc_tm.h"
  
  void *
  _darwin10_Unwind_FindEnclosingFunction (void *pc)
  {
--- 1,34 ----
  #include "libgcc_tm.h"
  
+ /* This shim is special, it needs to be built for Mac OSX 10.6
+    regardless of the current system version.
+    We must also build it to use the unwinder layout that was
+    present for 10.6 (and not update that).
+    So we copy the referenced structures from unwind-dw2-fde.h
+    to avoid pulling in newer system headers and/or changed
+    layouts.  */
+ struct dwarf_eh_bases
+ {
+   void *tbase;
+   void *dbase;
+   void *func;
+ };
+ 
+ typedef          int  sword __attribute__ ((mode (SI)));
+ typedef unsigned int  uword __attribute__ ((mode (SI)));
+ 
+ /* The first few fields of an FDE.  */
+ struct dwarf_fde
+ {
+   uword length;
+   sword CIE_delta;
+   unsigned char pc_begin[];
+ } __attribute__ ((packed, aligned (__alignof__ (void *))));
+ 
+ typedef struct dwarf_fde fde;
+ 
+ extern const fde * _Unwind_Find_FDE (void *, struct dwarf_eh_bases *);
+ 
  void *
  _darwin10_Unwind_FindEnclosingFunction (void *pc)
  {
*************** _darwin10_Unwind_FindEnclosingFunction (
*** 10,14 ****
    const struct dwarf_fde *fde = _Unwind_Find_FDE (pc-1, &bases);
    if (fde)
      return bases.func;
!   return NULL;
  }
--- 36,40 ----
    const struct dwarf_fde *fde = _Unwind_Find_FDE (pc-1, &bases);
    if (fde)
      return bases.func;
!   return (void *) 0;
  }
diff -Nrcpad gcc-12.3.0/libgcc/config/libbid/ChangeLog gcc-12.4.0/libgcc/config/libbid/ChangeLog
*** gcc-12.3.0/libgcc/config/libbid/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libgcc/config/libbid/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libgcc/config/t-darwin gcc-12.4.0/libgcc/config/t-darwin
*** gcc-12.3.0/libgcc/config/t-darwin	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgcc/config/t-darwin	Thu Jun 20 08:08:09 2024
***************
*** 1,15 ****
  # Set this as a minimum (unless overriden by arch t-files) since it's a
  # reasonable lowest common denominator that works for all our archs.
! HOST_LIBGCC2_CFLAGS += -mmacosx-version-min=10.4
  
  crt3.o: $(srcdir)/config/darwin-crt3.c
! 	$(crt_compile) -mmacosx-version-min=10.4 -c $<
  
  crttms.o: $(srcdir)/config/darwin-crt-tm.c
! 	$(crt_compile) -mmacosx-version-min=10.4 -DSTART -c $<
  
  crttme.o: $(srcdir)/config/darwin-crt-tm.c
! 	$(crt_compile) -mmacosx-version-min=10.4 -DEND -c $<
  
  # Make emutls weak so that we can deal with -static-libgcc, override the
  # hidden visibility when this is present in libgcc_eh.
--- 1,15 ----
  # Set this as a minimum (unless overriden by arch t-files) since it's a
  # reasonable lowest common denominator that works for all our archs.
! HOST_LIBGCC2_CFLAGS += $(DARWIN_MIN_LIB_VERSION)
  
  crt3.o: $(srcdir)/config/darwin-crt3.c
! 	$(crt_compile) $(DARWIN_MIN_CRT_VERSION) -c $<
  
  crttms.o: $(srcdir)/config/darwin-crt-tm.c
! 	$(crt_compile) $(DARWIN_MIN_CRT_VERSION) -DSTART -c $<
  
  crttme.o: $(srcdir)/config/darwin-crt-tm.c
! 	$(crt_compile) $(DARWIN_MIN_CRT_VERSION) -DEND -c $<
  
  # Make emutls weak so that we can deal with -static-libgcc, override the
  # hidden visibility when this is present in libgcc_eh.
*************** libemutls_w.a: emutls_s.o
*** 25,30 ****
--- 25,32 ----
  	$(RANLIB_FOR_TARGET) $@
  
  # Patch to __Unwind_Find_Enclosing_Function for Darwin10.
+ # This needs to be built for darwin10, regardless of the current platform
+ # version.
  d10-uwfef.o: $(srcdir)/config/darwin10-unwind-find-enc-func.c libgcc_tm.h
  	$(crt_compile) -mmacosx-version-min=10.6 -c $<
  
diff -Nrcpad gcc-12.3.0/libgcc/config/t-darwin-min-1 gcc-12.4.0/libgcc/config/t-darwin-min-1
*** gcc-12.3.0/libgcc/config/t-darwin-min-1	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libgcc/config/t-darwin-min-1	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,3 ----
+ # Support building with -mmacosx-version-min back to 10.1.
+ DARWIN_MIN_LIB_VERSION = -mmacosx-version-min=10.4
+ DARWIN_MIN_CRT_VERSION = -mmacosx-version-min=10.1
diff -Nrcpad gcc-12.3.0/libgcc/config/t-darwin-min-5 gcc-12.4.0/libgcc/config/t-darwin-min-5
*** gcc-12.3.0/libgcc/config/t-darwin-min-5	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libgcc/config/t-darwin-min-5	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,3 ----
+ # Support building with -mmacosx-version-min back to 10.5.
+ DARWIN_MIN_LIB_VERSION = -mmacosx-version-min=10.5
+ DARWIN_MIN_CRT_VERSION = -mmacosx-version-min=10.5
diff -Nrcpad gcc-12.3.0/libgcc/config/t-darwin-min-8 gcc-12.4.0/libgcc/config/t-darwin-min-8
*** gcc-12.3.0/libgcc/config/t-darwin-min-8	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libgcc/config/t-darwin-min-8	Thu Jun 20 08:08:09 2024
***************
*** 0 ****
--- 1,3 ----
+ # Support building with -mmacosx-version-min back to 10.8.
+ DARWIN_MIN_LIB_VERSION = -mmacosx-version-min=10.8
+ DARWIN_MIN_CRT_VERSION = -mmacosx-version-min=10.8
diff -Nrcpad gcc-12.3.0/libgcc/config/t-slibgcc-darwin gcc-12.4.0/libgcc/config/t-slibgcc-darwin
*** gcc-12.3.0/libgcc/config/t-slibgcc-darwin	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgcc/config/t-slibgcc-darwin	Thu Jun 20 08:08:09 2024
*************** all: libgcc_ehs$(SHLIB_EXT)
*** 72,85 ****
  LGCC_FILES += libgcc_ehs.$(SHLIB_SOVERSION)$(SHLIB_EXT)
  
  endif
- 
- # Provide libgcc_s.1 for backwards compatibility.
- LGCC_FILES += libgcc_s.1.dylib
- 
  endif
  
  INSTALL_FILES=$(LGCC_FILES)
  
  # For the toplevel multilib, build FAT dylibs including all the multilibs.
  ifeq ($(MULTIBUILDTOP),)
  
--- 72,86 ----
  LGCC_FILES += libgcc_ehs.$(SHLIB_SOVERSION)$(SHLIB_EXT)
  
  endif
  endif
  
  INSTALL_FILES=$(LGCC_FILES)
  
+ ifeq ($(BUILD_LIBGCCS1),YES)
+ # Provide libgcc_s.1 for backwards compatibility.
+ INSTALL_FILES += libgcc_s.1.dylib
+ endif
+ 
  # For the toplevel multilib, build FAT dylibs including all the multilibs.
  ifeq ($(MULTIBUILDTOP),)
  
*************** endif
*** 158,166 ****
  
  install-darwin-libgcc-stubs :
  	$(mkinstalldirs) $(DESTDIR)$(slibdir)
! 	for d in $(INSTALL_FILES) ; do \
! 	  $(INSTALL_DATA) $$d $(DESTDIR)$(slibdir)/$$d || exit 1 ; \
! 	done
  
  else
  
--- 159,173 ----
  
  install-darwin-libgcc-stubs :
  	$(mkinstalldirs) $(DESTDIR)$(slibdir)
! 	if test x$(slibdir) = x; then \
! 	  for d in $(LGCC_FILES) ; do \
! 	    $(INSTALL_DATA) $$d $(DESTDIR)$(slibdir)/$$d || exit 1 ; \
! 	  done; \
! 	else \
! 	  for d in $(INSTALL_FILES) ; do \
! 	    $(INSTALL_DATA) $$d $(DESTDIR)$(slibdir)/$$d || exit 1 ; \
! 	  done; \
! 	fi
  
  else
  
diff -Nrcpad gcc-12.3.0/libgcc/config.host gcc-12.4.0/libgcc/config.host
*** gcc-12.3.0/libgcc/config.host	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgcc/config.host	Thu Jun 20 08:08:09 2024
*************** case ${host} in
*** 241,246 ****
--- 241,264 ----
        ;;
    esac
    tmake_file="$tmake_file t-slibgcc-darwin"
+   # newer toolsets produce warnings when building for unsupported versions.
+   case ${host} in
+     *-*-darwin1[89]* | *-*-darwin2* )
+       tmake_file="t-darwin-min-8 $tmake_file"
+       ;;
+     *-*-darwin9* | *-*-darwin1[0-7]*)
+       tmake_file="t-darwin-min-5 $tmake_file"
+       ;;
+     *-*-darwin[4-8]*)
+       tmake_file="t-darwin-min-1 $tmake_file"
+       ;;
+     *)
+       # Fall back to configuring for the oldest system known to work with
+       # all archs and the current sources.
+       tmake_file="t-darwin-min-5 $tmake_file"
+       echo "Warning: libgcc configured to support macOS 10.5" 1>&2
+       ;;
+   esac
    extra_parts="crt3.o libd10-uwfef.a crttms.o crttme.o libemutls_w.a"
    ;;
  *-*-dragonfly*)
diff -Nrcpad gcc-12.3.0/libgcc/unwind-dw2-fde-dip.c gcc-12.4.0/libgcc/unwind-dw2-fde-dip.c
*** gcc-12.3.0/libgcc/unwind-dw2-fde-dip.c	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgcc/unwind-dw2-fde-dip.c	Thu Jun 20 08:08:09 2024
*************** _Unwind_Find_FDE (void *pc, struct dwarf
*** 505,512 ****
      return ret;
  
    /* Use DLFO_STRUCT_HAS_EH_DBASE as a proxy for the existence of a glibc-style
!      _dl_find_object function.  */
! #ifdef DLFO_STRUCT_HAS_EH_DBASE
    {
      struct dl_find_object dlfo;
      if (_dl_find_object (pc, &dlfo) == 0 && dlfo.dlfo_eh_frame != NULL)
--- 505,513 ----
      return ret;
  
    /* Use DLFO_STRUCT_HAS_EH_DBASE as a proxy for the existence of a glibc-style
!      _dl_find_object function.  However, do not use _dl_find_object on nios2,
!      which uses the GOT address as the base for DW_EH_PE_datarel instead.  */
! #if defined(DLFO_STRUCT_HAS_EH_DBASE) && !defined(__nios2__)
    {
      struct dl_find_object dlfo;
      if (_dl_find_object (pc, &dlfo) == 0 && dlfo.dlfo_eh_frame != NULL)
diff -Nrcpad gcc-12.3.0/libgfortran/ChangeLog gcc-12.4.0/libgfortran/ChangeLog
*** gcc-12.3.0/libgfortran/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libgfortran/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,12 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-02-11  Francois-Xavier Coudert  
+ 
+ 	PR libfortran/110651
+ 	* libgfortran.spec.in: Remove duplicate libraries.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libgfortran/libgfortran.spec.in gcc-12.4.0/libgfortran/libgfortran.spec.in
*** gcc-12.3.0/libgfortran/libgfortran.spec.in	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgfortran/libgfortran.spec.in	Thu Jun 20 08:08:09 2024
***************
*** 5,8 ****
  #
  
  %rename lib liborig
! *lib: @LIBQUADSPEC@ @LIBM@ %(libgcc) %(liborig)
--- 5,8 ----
  #
  
  %rename lib liborig
! *lib: @LIBQUADSPEC@ @LIBM@ %(liborig)
diff -Nrcpad gcc-12.3.0/libgo/Makefile.am gcc-12.4.0/libgo/Makefile.am
*** gcc-12.3.0/libgo/Makefile.am	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgo/Makefile.am	Thu Jun 20 08:08:09 2024
*************** toolexeclibgounicode_DATA = \
*** 417,422 ****
--- 417,423 ----
  # Some internal packages are needed to bootstrap the gc toolchain.
  toolexeclibgointernaldir = $(toolexeclibgodir)/internal
  toolexeclibgointernal_DATA = \
+ 	internal/lazyregexp.gox \
  	internal/reflectlite.gox \
  	internal/unsafeheader.gox
  
diff -Nrcpad gcc-12.3.0/libgo/Makefile.in gcc-12.4.0/libgo/Makefile.in
*** gcc-12.3.0/libgo/Makefile.in	Mon May  8 12:14:41 2023
--- gcc-12.4.0/libgo/Makefile.in	Thu Jun 20 08:08:09 2024
*************** toolexeclibgounicode_DATA = \
*** 885,890 ****
--- 885,891 ----
  # Some internal packages are needed to bootstrap the gc toolchain.
  toolexeclibgointernaldir = $(toolexeclibgodir)/internal
  toolexeclibgointernal_DATA = \
+ 	internal/lazyregexp.gox \
  	internal/reflectlite.gox \
  	internal/unsafeheader.gox
  
diff -Nrcpad gcc-12.3.0/libgo/go/internal/abi/abi.go gcc-12.4.0/libgo/go/internal/abi/abi.go
*** gcc-12.3.0/libgo/go/internal/abi/abi.go	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgo/go/internal/abi/abi.go	Thu Jun 20 08:08:10 2024
*************** package abi
*** 17,26 ****
  // compile-time error.
  //
  // Implemented as a compile intrinsic.
! func FuncPCABI0(f any) uintptr {
! 	// The compiler should remove all calls.
! 	panic("FuncPCABI0")
! }
  
  // FuncPCABIInternal returns the entry PC of the function f. If f is a
  // direct reference of a function, it must be defined as ABIInternal.
--- 17,23 ----
  // compile-time error.
  //
  // Implemented as a compile intrinsic.
! func FuncPCABI0(f any) uintptr
  
  // FuncPCABIInternal returns the entry PC of the function f. If f is a
  // direct reference of a function, it must be defined as ABIInternal.
*************** func FuncPCABI0(f any) uintptr {
*** 29,35 ****
  // the behavior is undefined.
  //
  // Implemented as a compile intrinsic.
! func FuncPCABIInternal(f any) uintptr {
! 	// The compiler should remove all calls.
! 	panic("FuncPCABIInternal")
! }
--- 26,29 ----
  // the behavior is undefined.
  //
  // Implemented as a compile intrinsic.
! func FuncPCABIInternal(f any) uintptr
diff -Nrcpad gcc-12.3.0/libgo/go/syscall/libcall_linux.go gcc-12.4.0/libgo/go/syscall/libcall_linux.go
*** gcc-12.3.0/libgo/go/syscall/libcall_linux.go	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgo/go/syscall/libcall_linux.go	Thu Jun 20 08:08:10 2024
*************** func Gettid() (tid int) {
*** 188,193 ****
--- 188,201 ----
  //sys	PivotRoot(newroot string, putold string) (err error)
  //pivot_root(newroot *byte, putold *byte) _C_int
  
+ // Used by golang.org/x/sys/unix.
+ //sys	prlimit(pid int, resource int, newlimit *Rlimit, oldlimit *Rlimit) (err error)
+ //prlimit(pid Pid_t, resource _C_int, newlimit *Rlimit, oldlimit *Rlimit) _C_int
+ 
+ func Prlimit(pid int, resource int, newlimit *Rlimit, oldlimit *Rlimit) error {
+ 	return prlimit(pid, resource, newlimit, oldlimit)
+ }
+ 
  //sys	Removexattr(path string, attr string) (err error)
  //removexattr(path *byte, name *byte) _C_int
  
diff -Nrcpad gcc-12.3.0/libgomp/ChangeLog gcc-12.4.0/libgomp/ChangeLog
*** gcc-12.3.0/libgomp/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libgomp/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,91 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-05  Jakub Jelinek  
+ 
+ 	PR c++/114572
+ 	* testsuite/libgomp.c++/pr114572.C: New test.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-01-10  Jakub Jelinek  
+ 
+ 	PR libgomp/113192
+ 	* configure.ac (FLOCK): Use $libgomp_abs_srcdir/testsuite/flock
+ 	instead of \$(abs_top_srcdir)/testsuite/flock.
+ 	* configure: Regenerated.
+ 
+ 2023-09-01  Tobias Burnus  
+ 
+ 	Backported from master:
+ 	2023-08-19  Tobias Burnus  
+ 
+ 	PR middle-end/111017
+ 	* testsuite/libgomp.c-c++-common/non-rect-loop-1.c: New test.
+ 
+ 2023-06-28  Thomas Schwinge  
+ 
+ 	Backported from master:
+ 	2023-06-02  Thomas Schwinge  
+ 
+ 	PR testsuite/66005
+ 	* testsuite/lib/libgomp.exp: 'flock' through stdout.
+ 	* testsuite/flock: New.
+ 	* configure.ac (FLOCK): Point to that if no 'flock' available, but
+ 	'perl' is.
+ 	* configure: Regenerate.
+ 
+ 2023-06-28  Thomas Schwinge  
+ 
+ 	Backported from master:
+ 	2023-05-15  Thomas Schwinge  
+ 
+ 	PR testsuite/66005
+ 	* configure.ac: Look for 'flock'.
+ 	* testsuite/Makefile.am (gcc_test_parallel_slots): Enable parallel testing.
+ 	* testsuite/config/default.exp: Don't 'load_lib "standard.exp"' here...
+ 	* testsuite/lib/libgomp.exp: ... but here, instead.
+ 	(libgomp_load): Override for parallel testing.
+ 	* testsuite/libgomp-site-extra.exp.in (FLOCK): Set.
+ 	* configure: Regenerate.
+ 	* Makefile.in: Regenerate.
+ 	* testsuite/Makefile.in: Regenerate.
+ 
+ 2023-06-28  Rainer Orth  
+ 
+ 	Backported from master:
+ 	2023-05-15  Rainer Orth  
+ 		    Thomas Schwinge  
+ 
+ 	PR testsuite/66005
+ 	* testsuite/Makefile.am (PWD_COMMAND): New variable.
+ 	(%/site.exp): New target.
+ 	(check_p_numbers0, check_p_numbers1, check_p_numbers2)
+ 	(check_p_numbers3, check_p_numbers4, check_p_numbers5)
+ 	(check_p_numbers6, check_p_numbers, gcc_test_parallel_slots)
+ 	(check_p_subdirs)
+ 	(check_DEJAGNU_libgomp_targets): New variables.
+ 	($(check_DEJAGNU_libgomp_targets)): New target.
+ 	($(check_DEJAGNU_libgomp_targets)): New dependency.
+ 	(check-DEJAGNU $(check_DEJAGNU_libgomp_targets)): New targets.
+ 	* testsuite/Makefile.in: Regenerate.
+ 	* testsuite/lib/libgomp.exp: For parallel testing,
+ 	'load_file ../libgomp-test-support.exp'.
+ 
+ 2023-06-28  Thomas Schwinge  
+ 
+ 	Backported from master:
+ 	2023-05-08  Thomas Schwinge  
+ 
+ 	* testsuite/libgomp.c++/c++.exp: Use 'lang_include_flags' instead
+ 	of 'libstdcxx_includes'.
+ 	* testsuite/libgomp.oacc-c++/c++.exp: Likewise.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libgomp/Makefile.in gcc-12.4.0/libgomp/Makefile.in
*** gcc-12.3.0/libgomp/Makefile.in	Mon May  8 12:15:24 2023
--- gcc-12.4.0/libgomp/Makefile.in	Thu Jun 20 08:10:28 2024
*************** EXEEXT = @EXEEXT@
*** 384,389 ****
--- 384,390 ----
  FC = @FC@
  FCFLAGS = @FCFLAGS@
  FGREP = @FGREP@
+ FLOCK = @FLOCK@
  GREP = @GREP@
  HSA_RUNTIME_INCLUDE = @HSA_RUNTIME_INCLUDE@
  HSA_RUNTIME_LIB = @HSA_RUNTIME_LIB@
diff -Nrcpad gcc-12.3.0/libgomp/configure gcc-12.4.0/libgomp/configure
*** gcc-12.3.0/libgomp/configure	Mon May  8 12:15:24 2023
--- gcc-12.4.0/libgomp/configure	Thu Jun 20 08:10:28 2024
*************** tmake_file
*** 656,661 ****
--- 656,662 ----
  XLDFLAGS
  XCFLAGS
  config_path
+ FLOCK
  CPU_COUNT
  LIBGOMP_BUILD_VERSIONED_SHLIB_SUN_FALSE
  LIBGOMP_BUILD_VERSIONED_SHLIB_SUN_TRUE
*************** else
*** 11431,11437 ****
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 11434 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
--- 11432,11438 ----
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 11435 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
*************** else
*** 11537,11543 ****
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 11540 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
--- 11538,11544 ----
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 11541 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
*************** $as_echo "unable to detect (assuming 1)"
*** 16663,16668 ****
--- 16664,16761 ----
  fi
  
  
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for flock implementation" >&5
+ $as_echo "$as_me: checking for flock implementation" >&6;}
+ for ac_prog in flock
+ do
+   # Extract the first word of "$ac_prog", so it can be a program name with args.
+ set dummy $ac_prog; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+ if ${ac_cv_prog_FLOCK+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+   if test -n "$FLOCK"; then
+   ac_cv_prog_FLOCK="$FLOCK" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+ do
+   IFS=$as_save_IFS
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then
+     ac_cv_prog_FLOCK="$ac_prog"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+ done
+   done
+ IFS=$as_save_IFS
+ 
+ fi
+ fi
+ FLOCK=$ac_cv_prog_FLOCK
+ if test -n "$FLOCK"; then
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: $FLOCK" >&5
+ $as_echo "$FLOCK" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+ 
+   test -n "$FLOCK" && break
+ done
+ 
+ # Fallback if 'perl' is available.
+ if test -z "$FLOCK"; then
+   # These need to be absolute paths, yet at the same time need to
+   # canonicalize only relative paths, because then amd will not unmount
+   # drives. Thus the use of PWDCMD: set it to 'pawd' or 'amq -w' if using amd.
+   case $srcdir in
+     [\\/$]* | ?:[\\/]*) libgomp_abs_srcdir=${srcdir} ;;
+     *) libgomp_abs_srcdir=`cd "$srcdir" && ${PWDCMD-pwd} || echo "$srcdir"` ;;
+   esac
+   # Extract the first word of "perl", so it can be a program name with args.
+ set dummy perl; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+ if ${ac_cv_prog_FLOCK+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+   if test -n "$FLOCK"; then
+   ac_cv_prog_FLOCK="$FLOCK" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+ do
+   IFS=$as_save_IFS
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then
+     ac_cv_prog_FLOCK="$libgomp_abs_srcdir/testsuite/flock"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+ done
+   done
+ IFS=$as_save_IFS
+ 
+ fi
+ fi
+ FLOCK=$ac_cv_prog_FLOCK
+ if test -n "$FLOCK"; then
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: $FLOCK" >&5
+ $as_echo "$FLOCK" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+ 
+ fi
+ 
  # Get target configury.
  . ${srcdir}/configure.tgt
  CFLAGS="$save_CFLAGS $XCFLAGS"
diff -Nrcpad gcc-12.3.0/libgomp/configure.ac gcc-12.4.0/libgomp/configure.ac
*** gcc-12.3.0/libgomp/configure.ac	Mon May  8 12:15:24 2023
--- gcc-12.4.0/libgomp/configure.ac	Thu Jun 20 08:10:28 2024
*************** fi
*** 339,344 ****
--- 339,360 ----
  AX_COUNT_CPUS
  AC_SUBST(CPU_COUNT)
  
+ AC_MSG_NOTICE([checking for flock implementation])
+ AC_CHECK_PROGS(FLOCK, flock)
+ # Fallback if 'perl' is available.
+ if test -z "$FLOCK"; then
+   # These need to be absolute paths, yet at the same time need to
+   # canonicalize only relative paths, because then amd will not unmount
+   # drives. Thus the use of PWDCMD: set it to 'pawd' or 'amq -w' if using amd.
+   case $srcdir in
+ changequote(,)dnl
+     [\\/$]* | ?:[\\/]*) libgomp_abs_srcdir=${srcdir} ;;
+ changequote([,])dnl
+     *) libgomp_abs_srcdir=`cd "$srcdir" && ${PWDCMD-pwd} || echo "$srcdir"` ;;
+   esac
+   AC_CHECK_PROG(FLOCK, perl, $libgomp_abs_srcdir/testsuite/flock)
+ fi
+ 
  # Get target configury.
  . ${srcdir}/configure.tgt
  CFLAGS="$save_CFLAGS $XCFLAGS"
diff -Nrcpad gcc-12.3.0/libgomp/libgomp.info gcc-12.4.0/libgomp/libgomp.info
*** gcc-12.3.0/libgomp/libgomp.info	Mon May  8 12:31:25 2023
--- gcc-12.4.0/libgomp/libgomp.info	Thu Jun 20 08:30:55 2024
***************
*** 1,4 ****
! This is libgomp.info, produced by makeinfo version 6.5 from
  libgomp.texi.
  
  Copyright (C) 2006-2022 Free Software Foundation, Inc.
--- 1,4 ----
! This is libgomp.info, produced by makeinfo version 6.8 from
  libgomp.texi.
  
  Copyright (C) 2006-2022 Free Software Foundation, Inc.
*************** software.  Copies published by the Free
*** 54,60 ****
  for GNU development.
  
  
! File: libgomp.info,  Node: Top,  Next: Enabling OpenMP
  
  Introduction
  ************
--- 54,60 ----
  for GNU development.
  
  
! File: libgomp.info,  Node: Top,  Next: Enabling OpenMP,  Up: (dir)
  
  Introduction
  ************
*************** Library Index
*** 5529,5687 ****
  
  Tag Table:
  Node: Top2083
! Node: Enabling OpenMP4713
! Node: OpenMP Implementation Status5519
! Node: OpenMP 4.56074
! Node: OpenMP 5.06250
! Node: OpenMP 5.111120
! Node: Runtime Library Routines14711
! Node: omp_get_active_level18416
! Node: omp_get_ancestor_thread_num19116
! Node: omp_get_cancellation20046
! Node: omp_get_default_device20860
! Node: omp_get_device_num21539
! Node: omp_get_dynamic22344
! Node: omp_get_initial_device23224
! Node: omp_get_level23968
! Node: omp_get_max_active_levels24595
! Node: omp_get_max_task_priority25316
! Node: omp_get_max_teams25936
! Node: omp_get_max_threads26630
! Node: omp_get_nested27381
! Node: omp_get_num_devices28989
! Node: omp_get_num_procs29510
! Node: omp_get_num_teams30049
! Node: omp_get_num_threads30565
! Node: omp_get_proc_bind31654
! Node: omp_get_schedule32677
! Node: omp_get_supported_active_levels33646
! Node: omp_get_team_num34432
! Node: omp_get_team_size34946
! Node: omp_get_teams_thread_limit35912
! Node: omp_get_thread_limit36674
! Node: omp_get_thread_num37302
! Node: omp_in_parallel38174
! Node: omp_in_final38823
! Node: omp_is_initial_device39497
! Node: omp_set_default_device40190
! Node: omp_set_dynamic40981
! Node: omp_set_max_active_levels41867
! Node: omp_set_nested42789
! Node: omp_set_num_teams43984
! Node: omp_set_num_threads44857
! Node: omp_set_schedule45728
! Node: omp_set_teams_thread_limit46822
! Node: omp_init_lock47824
! Node: omp_set_lock48487
! Node: omp_test_lock49342
! Node: omp_unset_lock50318
! Node: omp_destroy_lock51249
! Node: omp_init_nest_lock51926
! Node: omp_set_nest_lock52661
! Node: omp_test_nest_lock53576
! Node: omp_unset_nest_lock54603
! Node: omp_destroy_nest_lock55618
! Node: omp_get_wtick56369
! Node: omp_get_wtime56961
! Node: omp_fulfill_event57763
! Node: Environment Variables58784
! Node: OMP_CANCELLATION60573
! Node: OMP_DISPLAY_ENV61106
! Node: OMP_DEFAULT_DEVICE61809
! Node: OMP_DYNAMIC62589
! Node: OMP_MAX_ACTIVE_LEVELS63185
! Node: OMP_MAX_TASK_PRIORITY64112
! Node: OMP_NESTED64770
! Node: OMP_NUM_TEAMS65797
! Node: OMP_NUM_THREADS66470
! Node: OMP_PROC_BIND67275
! Node: OMP_PLACES68617
! Node: OMP_STACKSIZE71306
! Node: OMP_SCHEDULE72130
! Node: OMP_TARGET_OFFLOAD72830
! Node: OMP_TEAMS_THREAD_LIMIT73792
! Node: OMP_THREAD_LIMIT74599
! Node: OMP_WAIT_POLICY75209
! Node: GOMP_CPU_AFFINITY75901
! Node: GOMP_DEBUG77631
! Node: GOMP_STACKSIZE78138
! Node: GOMP_SPINCOUNT78969
! Node: GOMP_RTEMS_THREAD_POOLS80173
! Node: Enabling OpenACC82356
! Node: OpenACC Runtime Library Routines83257
! Node: acc_get_num_devices87538
! Node: acc_set_device_type88264
! Node: acc_get_device_type89028
! Node: acc_set_device_num90041
! Node: acc_get_device_num90858
! Node: acc_get_property91657
! Node: acc_async_test93880
! Node: acc_async_test_all94868
! Node: acc_wait95768
! Node: acc_wait_all96631
! Node: acc_wait_all_async97392
! Node: acc_wait_async98144
! Node: acc_init98852
! Node: acc_shutdown99497
! Node: acc_on_device100164
! Node: acc_malloc101168
! Node: acc_free101667
! Node: acc_copyin102094
! Node: acc_present_or_copyin103681
! Node: acc_create105459
! Node: acc_present_or_create107091
! Node: acc_copyout108877
! Node: acc_delete111181
! Node: acc_update_device113428
! Node: acc_update_self115002
! Node: acc_map_data116592
! Node: acc_unmap_data117277
! Node: acc_deviceptr117798
! Node: acc_hostptr118368
! Node: acc_is_present118932
! Node: acc_memcpy_to_device120459
! Node: acc_memcpy_from_device121122
! Node: acc_attach121789
! Node: acc_detach122436
! Node: acc_get_current_cuda_device123215
! Node: acc_get_current_cuda_context123800
! Node: acc_get_cuda_stream124400
! Node: acc_set_cuda_stream124991
! Node: acc_prof_register125662
! Node: acc_prof_unregister126221
! Node: acc_prof_lookup126788
! Node: acc_register_library127309
! Node: OpenACC Environment Variables127875
! Node: ACC_DEVICE_TYPE128447
! Node: ACC_DEVICE_NUM128683
! Node: ACC_PROFLIB128937
! Node: GCC_ACC_NOTIFY129268
! Node: CUDA Streams Usage129488
! Ref: CUDA Streams Usage-Footnote-1131389
! Node: OpenACC Library Interoperability131498
! Ref: OpenACC Library Interoperability-Footnote-1137866
! Ref: OpenACC Library Interoperability-Footnote-2138118
! Node: OpenACC Profiling Interface138326
! Node: The libgomp ABI148354
! Node: Implementing MASTER construct149207
! Node: Implementing CRITICAL construct149624
! Node: Implementing ATOMIC construct150365
! Node: Implementing FLUSH construct150848
! Node: Implementing BARRIER construct151121
! Node: Implementing THREADPRIVATE construct151392
! Node: Implementing PRIVATE clause152047
! Node: Implementing FIRSTPRIVATE LASTPRIVATE COPYIN and COPYPRIVATE clauses152630
! Node: Implementing REDUCTION clause153956
! Node: Implementing PARALLEL construct154516
! Node: Implementing FOR construct155775
! Node: Implementing ORDERED construct157775
! Node: Implementing SECTIONS construct158083
! Node: Implementing SINGLE construct158851
! Node: Implementing OpenACC's PARALLEL construct159565
! Node: Reporting Bugs159825
! Node: Copying160188
! Node: GNU Free Documentation License197737
! Node: Funding222862
! Node: Library Index225388
  
  End Tag Table
--- 5529,5692 ----
  
  Tag Table:
  Node: Top2083
! Node: Enabling OpenMP4725
! Node: OpenMP Implementation Status5531
! Node: OpenMP 4.56086
! Node: OpenMP 5.06262
! Node: OpenMP 5.111132
! Node: Runtime Library Routines14723
! Node: omp_get_active_level18428
! Node: omp_get_ancestor_thread_num19128
! Node: omp_get_cancellation20058
! Node: omp_get_default_device20872
! Node: omp_get_device_num21551
! Node: omp_get_dynamic22356
! Node: omp_get_initial_device23236
! Node: omp_get_level23980
! Node: omp_get_max_active_levels24607
! Node: omp_get_max_task_priority25328
! Node: omp_get_max_teams25948
! Node: omp_get_max_threads26642
! Node: omp_get_nested27393
! Node: omp_get_num_devices29001
! Node: omp_get_num_procs29522
! Node: omp_get_num_teams30061
! Node: omp_get_num_threads30577
! Node: omp_get_proc_bind31666
! Node: omp_get_schedule32689
! Node: omp_get_supported_active_levels33658
! Node: omp_get_team_num34444
! Node: omp_get_team_size34958
! Node: omp_get_teams_thread_limit35924
! Node: omp_get_thread_limit36686
! Node: omp_get_thread_num37314
! Node: omp_in_parallel38186
! Node: omp_in_final38835
! Node: omp_is_initial_device39509
! Node: omp_set_default_device40202
! Node: omp_set_dynamic40993
! Node: omp_set_max_active_levels41879
! Node: omp_set_nested42801
! Node: omp_set_num_teams43996
! Node: omp_set_num_threads44869
! Node: omp_set_schedule45740
! Node: omp_set_teams_thread_limit46834
! Node: omp_init_lock47836
! Node: omp_set_lock48499
! Node: omp_test_lock49354
! Node: omp_unset_lock50330
! Node: omp_destroy_lock51261
! Node: omp_init_nest_lock51938
! Node: omp_set_nest_lock52673
! Node: omp_test_nest_lock53588
! Node: omp_unset_nest_lock54615
! Node: omp_destroy_nest_lock55630
! Node: omp_get_wtick56381
! Node: omp_get_wtime56973
! Node: omp_fulfill_event57775
! Node: Environment Variables58796
! Node: OMP_CANCELLATION60585
! Node: OMP_DISPLAY_ENV61118
! Node: OMP_DEFAULT_DEVICE61821
! Node: OMP_DYNAMIC62601
! Node: OMP_MAX_ACTIVE_LEVELS63197
! Node: OMP_MAX_TASK_PRIORITY64124
! Node: OMP_NESTED64782
! Node: OMP_NUM_TEAMS65809
! Node: OMP_NUM_THREADS66482
! Node: OMP_PROC_BIND67287
! Node: OMP_PLACES68629
! Node: OMP_STACKSIZE71318
! Node: OMP_SCHEDULE72142
! Node: OMP_TARGET_OFFLOAD72842
! Node: OMP_TEAMS_THREAD_LIMIT73804
! Node: OMP_THREAD_LIMIT74611
! Node: OMP_WAIT_POLICY75221
! Node: GOMP_CPU_AFFINITY75913
! Node: GOMP_DEBUG77643
! Node: GOMP_STACKSIZE78150
! Node: GOMP_SPINCOUNT78981
! Node: GOMP_RTEMS_THREAD_POOLS80185
! Node: Enabling OpenACC82368
! Node: OpenACC Runtime Library Routines83269
! Node: acc_get_num_devices87550
! Node: acc_set_device_type88276
! Node: acc_get_device_type89040
! Node: acc_set_device_num90053
! Node: acc_get_device_num90870
! Node: acc_get_property91669
! Node: acc_async_test93892
! Node: acc_async_test_all94880
! Node: acc_wait95780
! Node: acc_wait_all96643
! Node: acc_wait_all_async97404
! Node: acc_wait_async98156
! Node: acc_init98864
! Node: acc_shutdown99509
! Node: acc_on_device100176
! Node: acc_malloc101180
! Node: acc_free101679
! Node: acc_copyin102106
! Node: acc_present_or_copyin103693
! Node: acc_create105471
! Node: acc_present_or_create107103
! Node: acc_copyout108889
! Node: acc_delete111193
! Node: acc_update_device113440
! Node: acc_update_self115014
! Node: acc_map_data116604
! Node: acc_unmap_data117289
! Node: acc_deviceptr117810
! Node: acc_hostptr118380
! Node: acc_is_present118944
! Node: acc_memcpy_to_device120471
! Node: acc_memcpy_from_device121134
! Node: acc_attach121801
! Node: acc_detach122448
! Node: acc_get_current_cuda_device123227
! Node: acc_get_current_cuda_context123812
! Node: acc_get_cuda_stream124412
! Node: acc_set_cuda_stream125003
! Node: acc_prof_register125674
! Node: acc_prof_unregister126233
! Node: acc_prof_lookup126800
! Node: acc_register_library127321
! Node: OpenACC Environment Variables127887
! Node: ACC_DEVICE_TYPE128459
! Node: ACC_DEVICE_NUM128695
! Node: ACC_PROFLIB128949
! Node: GCC_ACC_NOTIFY129280
! Node: CUDA Streams Usage129500
! Ref: CUDA Streams Usage-Footnote-1131401
! Node: OpenACC Library Interoperability131510
! Ref: OpenACC Library Interoperability-Footnote-1137878
! Ref: OpenACC Library Interoperability-Footnote-2138130
! Node: OpenACC Profiling Interface138338
! Node: The libgomp ABI148366
! Node: Implementing MASTER construct149219
! Node: Implementing CRITICAL construct149636
! Node: Implementing ATOMIC construct150377
! Node: Implementing FLUSH construct150860
! Node: Implementing BARRIER construct151133
! Node: Implementing THREADPRIVATE construct151404
! Node: Implementing PRIVATE clause152059
! Node: Implementing FIRSTPRIVATE LASTPRIVATE COPYIN and COPYPRIVATE clauses152642
! Node: Implementing REDUCTION clause153968
! Node: Implementing PARALLEL construct154528
! Node: Implementing FOR construct155787
! Node: Implementing ORDERED construct157787
! Node: Implementing SECTIONS construct158095
! Node: Implementing SINGLE construct158863
! Node: Implementing OpenACC's PARALLEL construct159577
! Node: Reporting Bugs159837
! Node: Copying160200
! Node: GNU Free Documentation License197749
! Node: Funding222874
! Node: Library Index225400
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/Makefile.am gcc-12.4.0/libgomp/testsuite/Makefile.am
*** gcc-12.3.0/libgomp/testsuite/Makefile.am	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgomp/testsuite/Makefile.am	Thu Jun 20 08:08:10 2024
*************** _RUNTEST = $(shell if test -f $(top_srcd
*** 12,17 ****
--- 12,19 ----
  	     echo $(top_srcdir)/../dejagnu/runtest; else echo runtest; fi)
  RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
  
+ PWD_COMMAND = $${PWDCMD-pwd}
+ 
  EXTRA_DEJAGNU_SITE_CONFIG = libgomp-site-extra.exp
  
  # Instead of directly in ../testsuite/libgomp-test-support.exp.in, the
*************** libgomp-test-support.exp: libgomp-test-s
*** 25,41 ****
  	  'set offload_additional_lib_paths "$(offload_additional_lib_paths)"'
  	mv $@.tmp $@
  
- check-DEJAGNU: site.exp
- 	srcdir='$(srcdir)'; export srcdir; \
- 	EXPECT=$(EXPECT); export EXPECT; \
- 	if $(SHELL) -c "$(_RUNTEST) --version" > /dev/null 2>&1; then \
- 	  exit_status=0; l='$(PACKAGE)'; for tool in $$l; do \
- 	    if $(_RUNTEST) $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) $(RUNTESTFLAGS); \
- 	    then :; else exit_status=1; fi; \
- 	  done; \
- 	else echo "WARNING: could not find '$(_RUNTEST)'" 1>&2; :;\
- 	fi; \
- 	exit $$exit_status
  site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG)
  	@echo 'Making a new site.exp file ...'
  	@echo '## these variables are automatically generated by make ##' >site.tmp
--- 27,32 ----
*************** site.exp: Makefile $(EXTRA_DEJAGNU_SITE_
*** 63,68 ****
--- 54,125 ----
  	@test ! -f site.exp || mv site.exp site.bak
  	@mv site.tmp site.exp
  
+ %/site.exp: site.exp
+ 	-@test -d $* || mkdir $*
+ 	@srcdir=`cd $(srcdir); ${PWD_COMMAND}`;
+ 	@objdir=`${PWD_COMMAND}`/$*; \
+ 	sed -e "s|^set srcdir .*$$|set srcdir $$srcdir|" \
+ 	    -e "s|^set objdir .*$$|set objdir $$objdir|" \
+ 	    site.exp > $*/site.exp.tmp
+ 	@-rm -f $*/site.bak
+ 	@test ! -f $*/site.exp || mv $*/site.exp $*/site.bak
+ 	@mv $*/site.exp.tmp $*/site.exp
+ 
+ check_p_numbers0:=1 2 3 4 5 6 7 8 9
+ check_p_numbers1:=0 $(check_p_numbers0)
+ check_p_numbers2:=$(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers1)))
+ check_p_numbers3:=$(addprefix 0,$(check_p_numbers1)) $(check_p_numbers2)
+ check_p_numbers4:=$(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers3)))
+ check_p_numbers5:=$(addprefix 0,$(check_p_numbers3)) $(check_p_numbers4)
+ check_p_numbers6:=$(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers5)))
+ check_p_numbers:=$(check_p_numbers0) $(check_p_numbers2) $(check_p_numbers4) $(check_p_numbers6)
+ # If unable to serialize execution testing, use just one parallel slot.
+ gcc_test_parallel_slots:=$(if $(FLOCK),$(if $(GCC_TEST_PARALLEL_SLOTS),$(GCC_TEST_PARALLEL_SLOTS),19),1)
+ check_p_subdirs=$(wordlist 1,$(gcc_test_parallel_slots),$(check_p_numbers))
+ check_DEJAGNU_libgomp_targets = $(addprefix check-DEJAGNUlibgomp,$(check_p_subdirs))
+ $(check_DEJAGNU_libgomp_targets): check-DEJAGNUlibgomp%: libgomp%/site.exp
+ 
+ check-DEJAGNU $(check_DEJAGNU_libgomp_targets): check-DEJAGNU%: site.exp
+ 	$(if $*,@)AR="$(AR)"; export AR; \
+ 	RANLIB="$(RANLIB)"; export RANLIB; \
+ 	if [ -z "$*" ] && [ -n "$(filter -j%, $(MFLAGS))" ]; then \
+ 	  rm -rf libgomp-parallel || true; \
+ 	  mkdir libgomp-parallel; \
+ 	  $(MAKE) $(AM_MAKEFLAGS) $(check_DEJAGNU_libgomp_targets); \
+ 	  rm -rf libgomp-parallel || true; \
+ 	  for idx in $(check_p_subdirs); do \
+ 	    if [ -d libgomp$$idx ]; then \
+ 	      mv -f libgomp$$idx/libgomp.sum libgomp$$idx/libgomp.sum.sep; \
+ 	      mv -f libgomp$$idx/libgomp.log libgomp$$idx/libgomp.log.sep; \
+ 	    fi; \
+ 	  done; \
+ 	  $(SHELL) $(srcdir)/../../contrib/dg-extract-results.sh \
+ 	    libgomp[0-9]*/libgomp.sum.sep > libgomp.sum; \
+ 	  $(SHELL) $(srcdir)/../../contrib/dg-extract-results.sh -L \
+ 	    libgomp[0-9]*/libgomp.log.sep > libgomp.log; \
+ 	  exit 0; \
+ 	fi; \
+ 	srcdir=`$(am__cd) $(srcdir) && pwd`; export srcdir; \
+ 	EXPECT=$(EXPECT); export EXPECT; \
+ 	runtest=$(_RUNTEST); \
+ 	if [ -z "$$runtest" ]; then runtest=runtest; fi; \
+ 	tool=libgomp; \
+ 	if [ -n "$*" ]; then \
+ 	  if [ -f libgomp-parallel/finished ]; then rm -rf "$*"; exit 0; fi; \
+ 	  GCC_RUNTEST_PARALLELIZE_DIR=`${PWD_COMMAND}`/libgomp-parallel; \
+ 	  export GCC_RUNTEST_PARALLELIZE_DIR; \
+ 	  cd "$*"; \
+ 	fi; \
+ 	if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
+ 	  $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) \
+ 		    $(RUNTESTFLAGS); \
+ 	  if [ -n "$*" ]; then \
+ 	    touch $$GCC_RUNTEST_PARALLELIZE_DIR/finished; \
+ 	  fi; \
+ 	else \
+ 	  echo "WARNING: could not find \`runtest'" 1>&2; :;\
+ 	fi
+ 
  distclean-DEJAGNU:
  	-rm -f site.exp site.bak
  	-l='$(PACKAGE)'; for tool in $$l; do \
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/Makefile.in gcc-12.4.0/libgomp/testsuite/Makefile.in
*** gcc-12.3.0/libgomp/testsuite/Makefile.in	Mon May  8 12:15:24 2023
--- gcc-12.4.0/libgomp/testsuite/Makefile.in	Thu Jun 20 08:10:28 2024
*************** EXEEXT = @EXEEXT@
*** 162,167 ****
--- 162,168 ----
  FC = @FC@
  FCFLAGS = @FCFLAGS@
  FGREP = @FGREP@
+ FLOCK = @FLOCK@
  GREP = @GREP@
  HSA_RUNTIME_INCLUDE = @HSA_RUNTIME_INCLUDE@
  HSA_RUNTIME_LIB = @HSA_RUNTIME_LIB@
*************** _RUNTEST = $(shell if test -f $(top_srcd
*** 310,316 ****
--- 311,330 ----
  	     echo $(top_srcdir)/../dejagnu/runtest; else echo runtest; fi)
  
  RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
+ PWD_COMMAND = $${PWDCMD-pwd}
  EXTRA_DEJAGNU_SITE_CONFIG = libgomp-site-extra.exp
+ check_p_numbers0 := 1 2 3 4 5 6 7 8 9
+ check_p_numbers1 := 0 $(check_p_numbers0)
+ check_p_numbers2 := $(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers1)))
+ check_p_numbers3 := $(addprefix 0,$(check_p_numbers1)) $(check_p_numbers2)
+ check_p_numbers4 := $(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers3)))
+ check_p_numbers5 := $(addprefix 0,$(check_p_numbers3)) $(check_p_numbers4)
+ check_p_numbers6 := $(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers5)))
+ check_p_numbers := $(check_p_numbers0) $(check_p_numbers2) $(check_p_numbers4) $(check_p_numbers6)
+ # If unable to serialize execution testing, use just one parallel slot.
+ gcc_test_parallel_slots := $(if $(FLOCK),$(if $(GCC_TEST_PARALLEL_SLOTS),$(GCC_TEST_PARALLEL_SLOTS),19),1)
+ check_p_subdirs = $(wordlist 1,$(gcc_test_parallel_slots),$(check_p_numbers))
+ check_DEJAGNU_libgomp_targets = $(addprefix check-DEJAGNUlibgomp,$(check_p_subdirs))
  all: all-am
  
  .SUFFIXES:
*************** libgomp-test-support.exp: libgomp-test-s
*** 485,501 ****
  	  'set offload_additional_lib_paths "$(offload_additional_lib_paths)"'
  	mv $@.tmp $@
  
- check-DEJAGNU: site.exp
- 	srcdir='$(srcdir)'; export srcdir; \
- 	EXPECT=$(EXPECT); export EXPECT; \
- 	if $(SHELL) -c "$(_RUNTEST) --version" > /dev/null 2>&1; then \
- 	  exit_status=0; l='$(PACKAGE)'; for tool in $$l; do \
- 	    if $(_RUNTEST) $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) $(RUNTESTFLAGS); \
- 	    then :; else exit_status=1; fi; \
- 	  done; \
- 	else echo "WARNING: could not find '$(_RUNTEST)'" 1>&2; :;\
- 	fi; \
- 	exit $$exit_status
  site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG)
  	@echo 'Making a new site.exp file ...'
  	@echo '## these variables are automatically generated by make ##' >site.tmp
--- 499,504 ----
*************** site.exp: Makefile $(EXTRA_DEJAGNU_SITE_
*** 523,528 ****
--- 526,584 ----
  	@test ! -f site.exp || mv site.exp site.bak
  	@mv site.tmp site.exp
  
+ %/site.exp: site.exp
+ 	-@test -d $* || mkdir $*
+ 	@srcdir=`cd $(srcdir); ${PWD_COMMAND}`;
+ 	@objdir=`${PWD_COMMAND}`/$*; \
+ 	sed -e "s|^set srcdir .*$$|set srcdir $$srcdir|" \
+ 	    -e "s|^set objdir .*$$|set objdir $$objdir|" \
+ 	    site.exp > $*/site.exp.tmp
+ 	@-rm -f $*/site.bak
+ 	@test ! -f $*/site.exp || mv $*/site.exp $*/site.bak
+ 	@mv $*/site.exp.tmp $*/site.exp
+ $(check_DEJAGNU_libgomp_targets): check-DEJAGNUlibgomp%: libgomp%/site.exp
+ 
+ check-DEJAGNU $(check_DEJAGNU_libgomp_targets): check-DEJAGNU%: site.exp
+ 	$(if $*,@)AR="$(AR)"; export AR; \
+ 	RANLIB="$(RANLIB)"; export RANLIB; \
+ 	if [ -z "$*" ] && [ -n "$(filter -j%, $(MFLAGS))" ]; then \
+ 	  rm -rf libgomp-parallel || true; \
+ 	  mkdir libgomp-parallel; \
+ 	  $(MAKE) $(AM_MAKEFLAGS) $(check_DEJAGNU_libgomp_targets); \
+ 	  rm -rf libgomp-parallel || true; \
+ 	  for idx in $(check_p_subdirs); do \
+ 	    if [ -d libgomp$$idx ]; then \
+ 	      mv -f libgomp$$idx/libgomp.sum libgomp$$idx/libgomp.sum.sep; \
+ 	      mv -f libgomp$$idx/libgomp.log libgomp$$idx/libgomp.log.sep; \
+ 	    fi; \
+ 	  done; \
+ 	  $(SHELL) $(srcdir)/../../contrib/dg-extract-results.sh \
+ 	    libgomp[0-9]*/libgomp.sum.sep > libgomp.sum; \
+ 	  $(SHELL) $(srcdir)/../../contrib/dg-extract-results.sh -L \
+ 	    libgomp[0-9]*/libgomp.log.sep > libgomp.log; \
+ 	  exit 0; \
+ 	fi; \
+ 	srcdir=`$(am__cd) $(srcdir) && pwd`; export srcdir; \
+ 	EXPECT=$(EXPECT); export EXPECT; \
+ 	runtest=$(_RUNTEST); \
+ 	if [ -z "$$runtest" ]; then runtest=runtest; fi; \
+ 	tool=libgomp; \
+ 	if [ -n "$*" ]; then \
+ 	  if [ -f libgomp-parallel/finished ]; then rm -rf "$*"; exit 0; fi; \
+ 	  GCC_RUNTEST_PARALLELIZE_DIR=`${PWD_COMMAND}`/libgomp-parallel; \
+ 	  export GCC_RUNTEST_PARALLELIZE_DIR; \
+ 	  cd "$*"; \
+ 	fi; \
+ 	if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
+ 	  $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) \
+ 		    $(RUNTESTFLAGS); \
+ 	  if [ -n "$*" ]; then \
+ 	    touch $$GCC_RUNTEST_PARALLELIZE_DIR/finished; \
+ 	  fi; \
+ 	else \
+ 	  echo "WARNING: could not find \`runtest'" 1>&2; :;\
+ 	fi
+ 
  distclean-DEJAGNU:
  	-rm -f site.exp site.bak
  	-l='$(PACKAGE)'; for tool in $$l; do \
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/config/default.exp gcc-12.4.0/libgomp/testsuite/config/default.exp
*** gcc-12.3.0/libgomp/testsuite/config/default.exp	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgomp/testsuite/config/default.exp	Thu Jun 20 08:08:10 2024
***************
*** 13,17 ****
  # You should have received a copy of the GNU General Public License
  # along with this program; see the file COPYING3.  If not see
  # .
- 
- load_lib "standard.exp"
--- 13,15 ----
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/flock gcc-12.4.0/libgomp/testsuite/flock
*** gcc-12.3.0/libgomp/testsuite/flock	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libgomp/testsuite/flock	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,17 ----
+ #!/usr/bin/env perl
+ 
+ use strict;
+ use warnings;
+ 
+ # Only arguments '--exclusive 1' exactly are supported.
+ (@ARGV == 2) or die;
+ my $mode = shift;
+ ($mode eq "--exclusive") or die;
+ my $fd = shift;
+ ($fd eq "1") or die;
+ 
+ use Fcntl ':flock';
+ 
+ open(my $fh, '>&=', 1) or die "open: $!";
+ 
+ flock($fh, LOCK_EX) or die "flock: $!";
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/lib/libgomp.exp gcc-12.4.0/libgomp/testsuite/lib/libgomp.exp
*** gcc-12.3.0/libgomp/testsuite/lib/libgomp.exp	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgomp/testsuite/lib/libgomp.exp	Thu Jun 20 08:08:10 2024
*************** proc load_gcc_lib { filename } {
*** 9,14 ****
--- 9,15 ----
  }
  
  load_lib dg.exp
+ load_lib standard.exp
  
  # Required to use gcc-dg.exp - however, the latter should NOT be
  # loaded until ${tool}_target_compile is defined since it uses that
*************** load_gcc_lib torture-options.exp
*** 40,46 ****
  load_gcc_lib fortran-modules.exp
  
  # Try to load a test support file, built during libgomp configuration.
! load_file libgomp-test-support.exp
  
  set dg-do-what-default run
  
--- 41,52 ----
  load_gcc_lib fortran-modules.exp
  
  # Try to load a test support file, built during libgomp configuration.
! # Search in '..' vs. '.' to support parallel vs. sequential testing.
! if [info exists ::env(GCC_RUNTEST_PARALLELIZE_DIR)] {
!     load_file ../libgomp-test-support.exp
! } else {
!     load_file libgomp-test-support.exp
! }
  
  set dg-do-what-default run
  
*************** proc libgomp_option_proc { option } {
*** 319,324 ****
--- 325,360 ----
      }
  }
  
+ if ![info exists ::env(GCC_RUNTEST_PARALLELIZE_DIR)] {
+     # No parallel testing.
+ } elseif { $FLOCK == "" } {
+     # Using just one parallel slot.
+ } else {
+     # Using several parallel slots.  Override DejaGnu
+     # 'standard.exp:${tool}_load'...
+     rename libgomp_load standard_libgomp_load
+     proc libgomp_load { program args } {
+ 	# ... in order to serialize execution testing via an exclusive lock.
+ 	# We use stdout, as per 
+ 	# "[...] FILEHANDLE [...] be open with write intent to use LOCK_EX".
+ 	set lock_file ../lock
+ 	set lock_kind --exclusive
+ 	set lock_fd [open $lock_file a+]
+ 	set lock_clock_begin [clock seconds]
+ 	global FLOCK
+ 	exec $FLOCK $lock_kind 1 >@ $lock_fd
+ 	set lock_clock_end [clock seconds]
+ 	verbose -log "Got ${FLOCK}('$lock_file', '$lock_kind') at [clock format $lock_clock_end] after [expr $lock_clock_end - $lock_clock_begin] s" 2
+ 
+ 	set result [standard_libgomp_load $program $args]
+ 
+ 	# Unlock (implicit with 'close').
+ 	close $lock_fd
+ 
+ 	return $result
+     }
+ }
+ 
  # Translate offload target to OpenACC device type.  Return the empty string if
  # not supported, and 'host' for offload target 'disable'.
  proc offload_target_to_openacc_device_type { offload_target } {
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/libgomp-site-extra.exp.in gcc-12.4.0/libgomp/testsuite/libgomp-site-extra.exp.in
*** gcc-12.3.0/libgomp/testsuite/libgomp-site-extra.exp.in	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgomp/testsuite/libgomp-site-extra.exp.in	Thu Jun 20 08:08:10 2024
***************
*** 1 ****
--- 1,2 ----
+ set FLOCK {@FLOCK@}
  set GCC_UNDER_TEST {@CC@}
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/libgomp.c++/c++.exp gcc-12.4.0/libgomp/testsuite/libgomp.c++/c++.exp
*** gcc-12.3.0/libgomp/testsuite/libgomp.c++/c++.exp	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgomp/testsuite/libgomp.c++/c++.exp	Thu Jun 20 08:08:10 2024
*************** if { $lang_test_file_found } {
*** 66,78 ****
  
      set flags_file "${blddir}/../libstdc++-v3/scripts/testsuite_flags"
      if { [file exists $flags_file] } {
! 	set libstdcxx_includes [exec sh $flags_file --build-includes]
!     } else {
! 	set libstdcxx_includes ""
      }
  
      # Main loop.
!     dg-runtest $tests "" "$libstdcxx_includes $DEFAULT_CFLAGS"
  }
  
  # See above.
--- 66,77 ----
  
      set flags_file "${blddir}/../libstdc++-v3/scripts/testsuite_flags"
      if { [file exists $flags_file] } {
! 	set lang_source_re {^.*\.[cC]$}
! 	set lang_include_flags [exec sh $flags_file --build-includes]
      }
  
      # Main loop.
!     dg-runtest $tests "" $DEFAULT_CFLAGS
  }
  
  # See above.
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/libgomp.c++/pr114572.C gcc-12.4.0/libgomp/testsuite/libgomp.c++/pr114572.C
*** gcc-12.3.0/libgomp/testsuite/libgomp.c++/pr114572.C	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libgomp/testsuite/libgomp.c++/pr114572.C	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,24 ----
+ // PR c++/114572
+ // { dg-do run }
+ // { dg-options "-fopenmp -O0" }
+ 
+ #include 
+ 
+ struct S
+ {
+   S () : s (0) {}
+   ~S () {}
+   S operator= (const S &x) { s = x.s; return *this; }
+   int s;
+ };
+ 
+ int
+ main ()
+ {
+   S s;
+   #pragma omp parallel for lastprivate(s)
+   for (int i = 0; i < 10; ++i)
+     s.s = i;
+   if (s.s != 9)
+     abort ();
+ }
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/libgomp.c-c++-common/non-rect-loop-1.c gcc-12.4.0/libgomp/testsuite/libgomp.c-c++-common/non-rect-loop-1.c
*** gcc-12.3.0/libgomp/testsuite/libgomp.c-c++-common/non-rect-loop-1.c	Thu Jan  1 00:00:00 1970
--- gcc-12.4.0/libgomp/testsuite/libgomp.c-c++-common/non-rect-loop-1.c	Thu Jun 20 08:08:10 2024
***************
*** 0 ****
--- 1,72 ----
+ /* PR middle-end/111017  */
+ 
+ #include 
+ 
+ #define DIM 32
+ #define N (DIM*DIM)
+ 
+ int
+ main ()
+ {
+   int a[N], b[N], c[N];
+   int dim = DIM;
+ 
+   for (int i = 0; i < N; i++)
+     {
+       a[i] = 3*i;
+       b[i] = 7*i;
+       c[i] = 42;
+     }
+ 
+   #pragma omp parallel for collapse(2)
+   for (int i = 0; i < DIM; i++)
+     for (int j = (i*DIM); j < (i*DIM + DIM); j++)
+       c[j] = a[j] + b[j];
+ 
+   for (int i = 0; i < DIM; i++)
+     for (int j = (i*DIM); j < (i*DIM + DIM); j++)
+       if (c[j] != a[j] + b[j] || c[j] != 3*j +7*j)
+ 	__builtin_abort ();
+   for (int i = 0; i < N; i++)
+     c[i] = 42;
+ 
+   #pragma omp parallel for collapse(2)
+   for (int i = 0; i < dim; i++)
+     for (int j = (i*dim); j < (i*dim + dim); j++)
+       c[j] = a[j] + b[j];
+ 
+   for (int i = 0; i < DIM; i++)
+     for (int j = (i*DIM); j < (i*DIM + DIM); j++)
+       if (c[j] != a[j] + b[j] || c[j] != 3*j +7*j)
+ 	__builtin_abort ();
+   for (int i = 0; i < N; i++)
+     c[i] = 42;
+ 
+   for (int dev = 0; dev <= omp_get_num_devices(); dev++)
+     {
+       #pragma omp target teams loop device(dev) map(to:a,b) map(from:c)
+       for (int i = 0; i < DIM; i++)
+ 	for (int j = (i*DIM); j < (i*DIM + DIM); j++)
+ 	  c[j] = a[j] + b[j];
+ 
+       for (int i = 0; i < DIM; i++)
+ 	for (int j = (i*DIM); j < (i*DIM + DIM); j++)
+ 	  if (c[j] != a[j] + b[j] || c[j] != 3*j +7*j)
+ 	    __builtin_abort ();
+       for (int i = 0; i < N; i++)
+ 	c[i] = 42;
+ 
+       #pragma omp target teams loop device(dev) map(to:a,b) map(from:c)
+       for (int i = 0; i < dim; i++)
+ 	for (int j = (i*dim); j < (i*dim + dim); j++)
+ 	  c[j] = a[j] + b[j];
+ 
+       for (int i = 0; i < DIM; i++)
+ 	for (int j = (i*DIM); j < (i*DIM + DIM); j++)
+ 	  if (c[j] != a[j] + b[j] || c[j] != 3*j +7*j)
+ 	    __builtin_abort ();
+       for (int i = 0; i < N; i++)
+ 	c[i] = 42;
+     }
+   return 0;
+ }
diff -Nrcpad gcc-12.3.0/libgomp/testsuite/libgomp.oacc-c++/c++.exp gcc-12.4.0/libgomp/testsuite/libgomp.oacc-c++/c++.exp
*** gcc-12.3.0/libgomp/testsuite/libgomp.oacc-c++/c++.exp	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libgomp/testsuite/libgomp.oacc-c++/c++.exp	Thu Jun 20 08:08:10 2024
*************** if { $lang_test_file_found } {
*** 72,80 ****
  
      set flags_file "${blddir}/../libstdc++-v3/scripts/testsuite_flags"
      if { [file exists $flags_file] } {
! 	set libstdcxx_includes [exec sh $flags_file --build-includes]
!     } else {
! 	set libstdcxx_includes ""
      }
  
      # Test with all available offload targets, and with offloading disabled.
--- 72,79 ----
  
      set flags_file "${blddir}/../libstdc++-v3/scripts/testsuite_flags"
      if { [file exists $flags_file] } {
! 	set lang_source_re {^.*\.[cC]$}
! 	set lang_include_flags [exec sh $flags_file --build-includes]
      }
  
      # Test with all available offload targets, and with offloading disabled.
*************** if { $lang_test_file_found } {
*** 147,153 ****
  	    }
  	}
  
! 	gcc-dg-runtest $tests "$tagopt" "$libstdcxx_includes"
      }
      unset offload_target
  } else {
--- 146,152 ----
  	    }
  	}
  
! 	gcc-dg-runtest $tests "$tagopt" ""
      }
      unset offload_target
  } else {
diff -Nrcpad gcc-12.3.0/libiberty/ChangeLog gcc-12.4.0/libiberty/ChangeLog
*** gcc-12.3.0/libiberty/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libiberty/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libitm/ChangeLog gcc-12.4.0/libitm/ChangeLog
*** gcc-12.3.0/libitm/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libitm/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libitm/libitm.info gcc-12.4.0/libitm/libitm.info
*** gcc-12.3.0/libitm/libitm.info	Mon May  8 12:32:40 2023
--- gcc-12.4.0/libitm/libitm.info	Thu Jun 20 08:33:24 2024
***************
*** 1,4 ****
! This is libitm.info, produced by makeinfo version 6.5 from libitm.texi.
  
  Copyright (C) 2011-2022 Free Software Foundation, Inc.
  
--- 1,4 ----
! This is libitm.info, produced by makeinfo version 6.8 from libitm.texi.
  
  Copyright (C) 2011-2022 Free Software Foundation, Inc.
  
*************** Node: GNU Free Documentation License358
*** 1306,1308 ****
--- 1306,1313 ----
  Node: Library Index61023
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/libobjc/ChangeLog gcc-12.4.0/libobjc/ChangeLog
*** gcc-12.3.0/libobjc/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libobjc/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/liboffloadmic/ChangeLog gcc-12.4.0/liboffloadmic/ChangeLog
*** gcc-12.3.0/liboffloadmic/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/liboffloadmic/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libphobos/ChangeLog gcc-12.4.0/libphobos/ChangeLog
*** gcc-12.3.0/libphobos/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libphobos/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,31 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-04-21  Iain Sandoe  
+ 
+ 	* configure.tgt: Enable libphobos for Darwin >= 12.
+ 
+ 2024-04-04  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-07-01  Iain Sandoe  
+ 
+ 	PR d/103944
+ 	* testsuite/libphobos.gc/forkgc2.d: Skip for Darwin.
+ 
+ 2023-11-07  Iain Buclaw  
+ 
+ 	Backported from master:
+ 	2023-11-07  Iain Buclaw  
+ 
+ 	* libdruntime/core/cpuid.d (getCpuInfo0B): Limit number of times loop
+ 	runs.
+ 
+ 2023-06-06  Iain Buclaw  
+ 
+ 	* src/MERGE: Merge upstream phobos 8e8aaae50.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libphobos/configure.tgt gcc-12.4.0/libphobos/configure.tgt
*** gcc-12.3.0/libphobos/configure.tgt	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libphobos/configure.tgt	Thu Jun 20 08:08:10 2024
*************** case "${target}" in
*** 27,32 ****
--- 27,35 ----
    *-*-dragonfly*)
  	LIBPHOBOS_SUPPORTED=yes
  	;;
+   aarch64-*-darwin2*)
+ 	LIBPHOBOS_SUPPORTED=yes
+ 	;;
    aarch64*-*-linux*)
  	LIBPHOBOS_SUPPORTED=yes
  	;;
*************** case "${target}" in
*** 55,60 ****
--- 58,69 ----
    sparc*-*-solaris2.11*)
  	LIBPHOBOS_SUPPORTED=yes
  	;;
+   *-*-darwin9* | *-*-darwin1[01]*)
+ 	LIBDRUNTIME_ONLY=yes
+ 	;;
+   x86_64-*-darwin1[2-9]* | x86_64-*-darwin2* | i?86-*-darwin1[2-7])
+ 	LIBPHOBOS_SUPPORTED=yes
+ 	;;
    x86_64-*-freebsd* | i?86-*-freebsd*)
  	LIBPHOBOS_SUPPORTED=yes
  	;;
diff -Nrcpad gcc-12.3.0/libphobos/libdruntime/core/cpuid.d gcc-12.4.0/libphobos/libdruntime/core/cpuid.d
*** gcc-12.3.0/libphobos/libdruntime/core/cpuid.d	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libphobos/libdruntime/core/cpuid.d	Thu Jun 20 08:08:10 2024
*************** void getAMDcacheinfo()
*** 651,660 ****
  // to determine number of processors.
  void getCpuInfo0B()
  {
-     int level=0;
      int threadsPerCore;
      uint a, b, c, d;
!     do {
          version (GNU_OR_LDC) asm pure nothrow @nogc {
              "cpuid" : "=a" (a), "=b" (b), "=c" (c), "=d" (d) : "a" (0x0B), "c" (level);
          } else asm pure nothrow @nogc {
--- 651,662 ----
  // to determine number of processors.
  void getCpuInfo0B()
  {
      int threadsPerCore;
      uint a, b, c, d;
!     // I'm not sure about this. The docs state that there
!     // are 2 hyperthreads per core if HT is factory enabled.
!     for (int level = 0; level < 2; level++)
!     {
          version (GNU_OR_LDC) asm pure nothrow @nogc {
              "cpuid" : "=a" (a), "=b" (b), "=c" (c), "=d" (d) : "a" (0x0B), "c" (level);
          } else asm pure nothrow @nogc {
*************** void getCpuInfo0B()
*** 666,684 ****
              mov c, ECX;
              mov d, EDX;
          }
!         if (b!=0) {
!            // I'm not sure about this. The docs state that there
!            // are 2 hyperthreads per core if HT is factory enabled.
!             if (level==0)
                  threadsPerCore = b & 0xFFFF;
!             else if (level==1) {
                  cpuFeatures.maxThreads = b & 0xFFFF;
                  cpuFeatures.maxCores = cpuFeatures.maxThreads / threadsPerCore;
              }
- 
          }
!         ++level;
!     } while (a!=0 || b!=0);
  }
  
  void cpuidX86()
--- 668,687 ----
              mov c, ECX;
              mov d, EDX;
          }
!         if (b != 0)
!         {
!             if (level == 0)
                  threadsPerCore = b & 0xFFFF;
!             else if (level == 1)
!             {
                  cpuFeatures.maxThreads = b & 0xFFFF;
                  cpuFeatures.maxCores = cpuFeatures.maxThreads / threadsPerCore;
              }
          }
!         // Got "invalid domain" returned from cpuid
!         if (a == 0 && b == 0)
!             break;
!     }
  }
  
  void cpuidX86()
diff -Nrcpad gcc-12.3.0/libphobos/src/MERGE gcc-12.4.0/libphobos/src/MERGE
*** gcc-12.3.0/libphobos/src/MERGE	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libphobos/src/MERGE	Thu Jun 20 08:08:10 2024
***************
*** 1,4 ****
! 5fef0d28fc873fb5a0dbfb9149759d76a7b9f1b7
  
  The first line of this file holds the git revision number of the last
  merge done from the dlang/phobos repository.
--- 1,4 ----
! 8e8aaae5080ccc2e0a2202cbe9778dca96496a95
  
  The first line of this file holds the git revision number of the last
  merge done from the dlang/phobos repository.
diff -Nrcpad gcc-12.3.0/libphobos/src/std/container/array.d gcc-12.4.0/libphobos/src/std/container/array.d
*** gcc-12.3.0/libphobos/src/std/container/array.d	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libphobos/src/std/container/array.d	Thu Jun 20 08:08:10 2024
*************** if (!is(immutable T == immutable bool))
*** 412,420 ****
                      .destroy(e);
  
              static if (hasIndirections!T)
!                 GC.removeRange(_payload.ptr);
  
!             free(_payload.ptr);
          }
  
          this(this) @disable;
--- 412,420 ----
                      .destroy(e);
  
              static if (hasIndirections!T)
!                 GC.removeRange(cast(void*) _payload.ptr);
  
!             free(cast(void*) _payload.ptr);
          }
  
          this(this) @disable;
*************** if (!is(immutable T == immutable bool))
*** 489,502 ****
                  auto newPayload = newPayloadPtr[0 .. oldLength];
  
                  // copy old data over to new array
!                 memcpy(newPayload.ptr, _payload.ptr, T.sizeof * oldLength);
                  // Zero out unused capacity to prevent gc from seeing false pointers
!                 memset(newPayload.ptr + oldLength,
                          0,
                          (elements - oldLength) * T.sizeof);
!                 GC.addRange(newPayload.ptr, sz);
!                 GC.removeRange(_payload.ptr);
!                 free(_payload.ptr);
                  _payload = newPayload;
              }
              else
--- 489,502 ----
                  auto newPayload = newPayloadPtr[0 .. oldLength];
  
                  // copy old data over to new array
!                 memcpy(cast(void*) newPayload.ptr, cast(void*) _payload.ptr, T.sizeof * oldLength);
                  // Zero out unused capacity to prevent gc from seeing false pointers
!                 memset( cast(void*) (newPayload.ptr + oldLength),
                          0,
                          (elements - oldLength) * T.sizeof);
!                 GC.addRange(cast(void*) newPayload.ptr, sz);
!                 GC.removeRange(cast(void*) _payload.ptr);
!                 free(cast(void*) _payload.ptr);
                  _payload = newPayload;
              }
              else
*************** if (!is(immutable T == immutable bool))
*** 611,622 ****
          return opEquals(rhs);
      }
  
      /// ditto
      bool opEquals(ref const Array rhs) const
      {
          if (empty) return rhs.empty;
          if (rhs.empty) return false;
!         return _data._payload == rhs._data._payload;
      }
  
      /**
--- 611,627 ----
          return opEquals(rhs);
      }
  
+     // fix https://issues.dlang.org/show_bug.cgi?23140
+     private alias Unshared(T) = T;
+     private alias Unshared(T: shared U, U) = U;
+ 
      /// ditto
      bool opEquals(ref const Array rhs) const
      {
          if (empty) return rhs.empty;
          if (rhs.empty) return false;
! 
!         return cast(Unshared!(T)[]) _data._payload ==  cast(Unshared!(T)[]) rhs._data._payload;
      }
  
      /**
*************** if (!is(immutable T == immutable bool))
*** 1740,1745 ****
--- 1745,1760 ----
      assertThrown!AssertError(array.length = 5);
  }
  
+ // https://issues.dlang.org/show_bug.cgi?id=23140
+ @system unittest
+ {
+     shared class C
+     {
+     }
+ 
+     Array!C ac;
+     ac = Array!C([new C]);
+ }
  ////////////////////////////////////////////////////////////////////////////////
  // Array!bool
  ////////////////////////////////////////////////////////////////////////////////
diff -Nrcpad gcc-12.3.0/libphobos/src/std/typecons.d gcc-12.4.0/libphobos/src/std/typecons.d
*** gcc-12.3.0/libphobos/src/std/typecons.d	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libphobos/src/std/typecons.d	Thu Jun 20 08:08:10 2024
*************** Params:
*** 3793,3800 ****
--- 3793,3820 ----
                  sink.formatValue(_value, fmt);
              }
          }
+ 
+         void toString()(scope void delegate(const(char)[]) sink, scope const ref FormatSpec!char fmt) const
+         {
+             if (isNull)
+             {
+                 sink.formatValue("Nullable.null", fmt);
+             }
+             else
+             {
+                 sink.formatValue(_value, fmt);
+             }
+         }
      }
  
+ @system unittest
+ {
+     import std.conv : to;
+ 
+     const Nullable!(ulong, 0) x = 1;
+     assert(x.to!string == "1");
+ }
+ 
  /**
  Check if `this` is in the null state.
  
*************** Params:
*** 4320,4327 ****
--- 4340,4367 ----
                  sink.formatValue(*_value, fmt);
              }
          }
+ 
+         void toString()(scope void delegate(const(char)[]) sink, scope const ref FormatSpec!char fmt) const
+         {
+             if (isNull)
+             {
+                 sink.formatValue("Nullable.null", fmt);
+             }
+             else
+             {
+                 sink.formatValue(*_value, fmt);
+             }
+         }
      }
  
+ @system unittest
+ {
+     import std.conv : to;
+ 
+     const NullableRef!(ulong) x = new ulong(1);
+     assert(x.to!string == "1");
+ }
+ 
  /**
  Binds the internal state to `value`.
  
diff -Nrcpad gcc-12.3.0/libphobos/testsuite/libphobos.gc/forkgc2.d gcc-12.4.0/libphobos/testsuite/libphobos.gc/forkgc2.d
*** gcc-12.3.0/libphobos/testsuite/libphobos.gc/forkgc2.d	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libphobos/testsuite/libphobos.gc/forkgc2.d	Thu Jun 20 08:08:10 2024
***************
*** 1,3 ****
--- 1,4 ----
+ // { dg-skip-if "test hangs the testsuite PR103944" { *-*-darwin* } }
  import core.stdc.stdlib : exit;
  import core.sys.posix.sys.wait : waitpid;
  import core.sys.posix.unistd : fork;
diff -Nrcpad gcc-12.3.0/libquadmath/ChangeLog gcc-12.4.0/libquadmath/ChangeLog
*** gcc-12.3.0/libquadmath/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libquadmath/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,18 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-11  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2024-04-03  Simon Chopin  
+ 		    Jakub Jelinek  
+ 
+ 	PR libquadmath/114533
+ 	* printf/printf_fp.c (__quadmath_printf_fp): Use memcpy to copy
+ 	__float128 out of args.
+ 	* printf/printf_fphex.c (__quadmath_printf_fphex): Likewise.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libquadmath/libquadmath.info gcc-12.4.0/libquadmath/libquadmath.info
*** gcc-12.3.0/libquadmath/libquadmath.info	Mon May  8 12:32:38 2023
--- gcc-12.4.0/libquadmath/libquadmath.info	Thu Jun 20 08:33:19 2024
***************
*** 1,4 ****
! This is libquadmath.info, produced by makeinfo version 6.5 from
  libquadmath.texi.
  
  Copyright (C) 2010-2022 Free Software Foundation, Inc.
--- 1,4 ----
! This is libquadmath.info, produced by makeinfo version 6.8 from
  libquadmath.texi.
  
  Copyright (C) 2010-2022 Free Software Foundation, Inc.
*************** Node: GNU Free Documentation License109
*** 809,811 ****
--- 809,816 ----
  Node: Reporting Bugs36068
  
  End Tag Table
+ 
+ 
+ Local Variables:
+ coding: utf-8
+ End:
diff -Nrcpad gcc-12.3.0/libquadmath/printf/printf_fp.c gcc-12.4.0/libquadmath/printf/printf_fp.c
*** gcc-12.3.0/libquadmath/printf/printf_fp.c	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libquadmath/printf/printf_fp.c	Thu Jun 20 08:08:10 2024
*************** __quadmath_printf_fp (struct __quadmath_
*** 363,369 ****
  
    /* Fetch the argument value.	*/
      {
!       fpnum = **(const __float128 **) args[0];
  
        /* Check for special values: not a number or infinity.  */
        if (isnanq (fpnum))
--- 363,369 ----
  
    /* Fetch the argument value.	*/
      {
!       memcpy (&fpnum, *(const void *const *) args[0], sizeof (fpnum));
  
        /* Check for special values: not a number or infinity.  */
        if (isnanq (fpnum))
diff -Nrcpad gcc-12.3.0/libquadmath/printf/printf_fphex.c gcc-12.4.0/libquadmath/printf/printf_fphex.c
*** gcc-12.3.0/libquadmath/printf/printf_fphex.c	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libquadmath/printf/printf_fphex.c	Thu Jun 20 08:08:10 2024
*************** __quadmath_printf_fphex (struct __quadma
*** 163,169 ****
  
    /* Fetch the argument value.	*/
      {
!       fpnum.value = **(const __float128 **) args[0];
  
        /* Check for special values: not a number or infinity.  */
        if (isnanq (fpnum.value))
--- 163,170 ----
  
    /* Fetch the argument value.	*/
      {
!       memcpy (&fpnum.value, *(const void *const *) args[0],
! 	      sizeof (fpnum.value));
  
        /* Check for special values: not a number or infinity.  */
        if (isnanq (fpnum.value))
diff -Nrcpad gcc-12.3.0/libsanitizer/ChangeLog gcc-12.4.0/libsanitizer/ChangeLog
*** gcc-12.3.0/libsanitizer/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libsanitizer/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,15 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2023-05-21  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2023-04-18  Iain Sandoe  
+ 
+ 	* configure.tgt: Unsupport Darwin22+ until a mechanism can be found
+ 	to locate dyld in the shared cache.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libsanitizer/configure.tgt gcc-12.4.0/libsanitizer/configure.tgt
*** gcc-12.3.0/libsanitizer/configure.tgt	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libsanitizer/configure.tgt	Thu Jun 20 08:08:10 2024
*************** case "${target}" in
*** 64,70 ****
  		HWASAN_SUPPORTED=yes
  	fi
  	;;
!   x86_64-*-darwin2* | x86_64-*-darwin1[2-9]* | i?86-*-darwin1[2-9]*)
  	TSAN_SUPPORTED=no
  	EXTRA_CXXFLAGS="${EXTRA_CXXFLAGS} -Wl,-undefined,dynamic_lookup"
  	;;
--- 64,70 ----
  		HWASAN_SUPPORTED=yes
  	fi
  	;;
!   x86_64-*-darwin2[01]* | x86_64-*-darwin1[2-9]* | i?86-*-darwin1[2-9]*)
  	TSAN_SUPPORTED=no
  	EXTRA_CXXFLAGS="${EXTRA_CXXFLAGS} -Wl,-undefined,dynamic_lookup"
  	;;
diff -Nrcpad gcc-12.3.0/libssp/ChangeLog gcc-12.4.0/libssp/ChangeLog
*** gcc-12.3.0/libssp/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libssp/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,7 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/ChangeLog gcc-12.4.0/libstdc++-v3/ChangeLog
*** gcc-12.3.0/libstdc++-v3/ChangeLog	Mon May  8 12:15:03 2023
--- gcc-12.4.0/libstdc++-v3/ChangeLog	Thu Jun 20 08:09:01 2024
***************
*** 1,3 ****
--- 1,1830 ----
+ 2024-06-20  Release Manager
+ 
+ 	* GCC 12.4.0 released.
+ 
+ 2024-06-17  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-06-14  Jonathan Wakely  
+ 
+ 	* libsupc++/new_opa.cc [!_GLIBCXX_HOSTED]: Fix declaration of
+ 	posix_memalign.
+ 
+ 2024-06-11  Tianqiang Shuai  <1101282468@qq.com>
+ 
+ 	Backported from master:
+ 	2023-07-06  Tianqiang Shuai  <1101282468@qq.com>
+ 
+ 	* config/io/basic_file_stdio.cc (xwrite) [USE_STDIO_PURE]: Fix
+ 	first argument.
+ 
+ 2024-06-11  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-03-22  Jonathan Wakely  
+ 
+ 	* include/std/utility (__cpp_lib_constexpr_algorithms): Define,
+ 	as per LWG 3792.
+ 	* testsuite/20_util/exchange/constexpr.cc: Check for it.
+ 
+ 2024-06-11  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-02-16  Jonathan Wakely  
+ 
+ 	* include/bits/fs_ops.h (create_directory): Use reserved name
+ 	for parameter.
+ 	* include/bits/regex_automaton.h (_State_base::_M_print):
+ 	Likewise.
+ 	* include/bits/regex_automaton.tcc(_State_base::_M_print):
+ 	Likewise.
+ 	* include/bits/regex_scanner.tcc(_Scanner::_M_print): Likewise.
+ 	* include/experimental/bits/fs_ops.h (create_directory):
+ 	Likewise.
+ 	* include/std/mutex (timed_mutex::_M_clocklock): Likewise.
+ 	(recursive_timed_mutex:_M_clocklock): Likewise.
+ 	* libsupc++/cxxabi_init_exception.h
+ 	(__cxa_init_primary_exception): Likewise.
+ 	* testsuite/17_intro/names.cc: Add checks.
+ 
+ 2024-06-11  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-02-02  Jonathan Wakely  
+ 
+ 	* include/experimental/internet (network_v6::network): Define.
+ 	(network_v6::hosts): Finish implementing.
+ 	(network_v6::to_string): Do not concatenate std::string to
+ 	arbitrary std::basic_string specialization.
+ 	* testsuite/experimental/net/internet/network/v6/cons.cc: New
+ 	test.
+ 
+ 2024-06-11  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-06-09  Jonathan Wakely  
+ 
+ 	PR libstdc++/100285
+ 	* include/experimental/internet [IPPROTO_TCP || IPPROTO_UDP]
+ 	(basic_endpoint, basic_resolver_entry, resolver_base)
+ 	(basic_resolver_results, basic_resolver): Only define if the tcp
+ 	or udp protocols will be defined.
+ 
+ 2024-06-11  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-07-05  Jonathan Wakely  
+ 
+ 	PR libstdc++/110542
+ 	* include/bits/stl_uninitialized.h (__uninitialized_default_n):
+ 	Do not use std::fill_n during constant evaluation.
+ 
+ 2024-06-11  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-04-10  Jonathan Wakely  
+ 
+ 	* testsuite/27_io/manipulators/extended/get_time/char/2.cc:
+ 	Adjust input string so that it matches %a with or without a
+ 	trailing period.
+ 
+ 2024-06-11  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-03-19  Jonathan Wakely  
+ 
+ 	PR libstdc++/114359
+ 	* include/bits/random.tcc (binomial_distribution::param_type):
+ 	Ensure arithmetic is done as type double.
+ 	* testsuite/26_numerics/random/binomial_distribution/114359.cc: New test.
+ 
+ 2024-06-11  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-03-19  Jonathan Wakely  
+ 
+ 	PR libstdc++/114367
+ 	* include/bits/stl_bvector.h (_M_allocate): Use allocator's
+ 	construct function to begin lifetime of words.
+ 
+ 2024-06-11  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-04-03  Jonathan Wakely  
+ 
+ 	PR libstdc++/104606
+ 	* include/std/optional (operator<=>(const optional&, const U&)):
+ 	Reverse order of three_way_comparable_with template arguments.
+ 	* testsuite/20_util/optional/relops/104606.cc: New test.
+ 
+ 2024-06-11  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-03-22  Jonathan Wakely  
+ 
+ 	PR libstdc++/114401
+ 	* include/bits/hashtable.h (_Hashtable::_M_reinsert_node): Call
+ 	release() on node handle instead of just zeroing its pointer.
+ 	(_Hashtable::_M_reinsert_node_multi): Likewise.
+ 	(_Hashtable::_M_merge_unique): Likewise.
+ 	(_Hashtable::_M_merge_multi): Likewise.
+ 	* include/bits/node_handle.h (_Node_handle_common::release()):
+ 	New member function.
+ 	(_Node_handle_common::_Optional_alloc::_M_empty): Remove
+ 	unnecessary union member.
+ 	(_Node_handle_common): Declare _Hashtable as a friend.
+ 	* include/bits/stl_tree.h (_Rb_tree::_M_reinsert_node_unique):
+ 	Call release() on node handle instead of just zeroing its
+ 	pointer.
+ 	(_Rb_tree::_M_reinsert_node_equal): Likewise.
+ 	(_Rb_tree::_M_reinsert_node_hint_unique): Likewise.
+ 	(_Rb_tree::_M_reinsert_node_hint_equal): Likewise.
+ 	* testsuite/23_containers/multiset/modifiers/114401.cc: New test.
+ 	* testsuite/23_containers/set/modifiers/114401.cc: New test.
+ 	* testsuite/23_containers/unordered_multiset/modifiers/114401.cc: New test.
+ 	* testsuite/23_containers/unordered_set/modifiers/114401.cc: New test.
+ 
+ 2024-06-01  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-06-01  Jonathan Wakely  
+ 
+ 	PR libstdc++/115269
+ 	* doc/xml/manual/using.xml: Replace link to gcc-4.3.2 docs.
+ 	Replace list of -std=... options with a single entry for -std.
+ 	* doc/html/manual/using.html: Regenerate.
+ 
+ 2024-05-08  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2024-04-22  Matthias Kretz  
+ 
+ 	PR libstdc++/114803
+ 	* include/experimental/bits/simd_builtin.h
+ 	(_SimdBase2::operator __vector_type_t): There is no __builtin()
+ 	function in _SimdWrapper, instead use its conversion operator.
+ 	* testsuite/experimental/simd/pr114803_vecbuiltin_cvt.cc: New
+ 	test.
+ 
+ 2024-05-08  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2024-04-22  Matthias Kretz  
+ 
+ 	* include/experimental/bits/simd.h: Ignore -Wnarrowing for
+ 	arm_neon.h.
+ 	(__int_for_sizeof): Replace tautological compare with checking
+ 	for invalid template parameter value.
+ 	* include/experimental/bits/simd_builtin.h (__extract_part):
+ 	Remove tautological compare by combining two static_assert.
+ 
+ 2024-05-08  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2024-04-17  Matthias Kretz  
+ 
+ 	* include/experimental/bits/numeric_traits.h: Add include guard.
+ 
+ 2024-05-08  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2024-04-17  Matthias Kretz  
+ 
+ 	PR libstdc++/114750
+ 	* include/experimental/bits/simd_builtin.h
+ 	(_SimdImplBuiltin::_S_load, _S_store): Fall back to copying
+ 	scalars if the memory type cannot be vectorized for the target.
+ 
+ 2024-05-08  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2024-03-27  Matthias Kretz  
+ 
+ 	* include/experimental/bits/simd_x86.h (_S_masked_unary):
+ 	Cast inputs < 16 bytes to 16 byte vectors before calling the
+ 	right subtraction builtin. Before returning, truncate to the
+ 	return vector type.
+ 
+ 2024-05-08  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2024-03-27  Matthias Kretz  
+ 
+ 	* include/experimental/bits/simd_x86.h (_S_masked_unary): Call
+ 	the 4- and 8-byte variants of __builtin_ia32_subp[ds] without
+ 	rounding direction argument.
+ 
+ 2024-05-08  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-06-06  Matthias Kretz  
+ 
+ 	PR libstdc++/109822
+ 	* include/experimental/bits/simd_builtin.h (_S_store): Rewrite
+ 	to avoid casts to other vector types. Implement store as
+ 	succession of power-of-2 sized memcpy to avoid PR90424.
+ 
+ 2024-05-08  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-06-06  Matthias Kretz  
+ 
+ 	PR libstdc++/110054
+ 	* include/experimental/bits/simd_builtin.h (_S_masked_store):
+ 	Call into deduced ABI's SimdImpl after conversion.
+ 	* include/experimental/bits/simd_x86.h (_S_masked_store_nocvt):
+ 	Don't use _mm_maskmoveu_si128. Use the generic fall-back
+ 	implementation. Also fix masked stores without SSE2, which
+ 	were not doing anything before.
+ 
+ 2024-05-08  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-06-06  Matthias Kretz  
+ 
+ 	* include/experimental/bits/simd.h (__bit_cast): Use
+ 	__gnu__::__vector_size__ instead of gnu::vector_size.
+ 
+ 2024-04-21  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-02-19  Iain Sandoe  
+ 		    Jonathan Wakely  
+ 
+ 	PR target/112397
+ 	* configure: Regenerate.
+ 	* configure.ac: Detect if we are building for Darwin.
+ 	* libsupc++/Makefile.am: If we are building for Darwin, then
+ 	suppress hot/cold partitioning for the array allocators.
+ 	* libsupc++/Makefile.in: Regenerated.
+ 
+ 2024-04-21  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-03-19  Iain Sandoe  
+ 
+ 	* testsuite/lib/dg-options.exp (atomic_link_flags): Emit a -B
+ 	option for the path to the uninstalled libatomic.
+ 
+ 2024-04-21  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2024-03-19  Iain Sandoe  
+ 
+ 	* testsuite/lib/libstdc++.exp (v3_target_compile): Instead of
+ 	/dev/null, use a temporary file for test executables on Darwin.
+ 
+ 2024-04-18  Iain Sandoe  
+ 
+ 	Backported from master:
+ 	2022-12-04  Iain Sandoe  
+ 
+ 	* config/os/bsd/darwin/os_defines.h
+ 	(_GTHREAD_USE_RECURSIVE_MUTEX_INIT_FUNC): Limit use of this macro
+ 	to OS versions that need it.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-05-12  Jonathan Wakely  
+ 
+ 	* testsuite/experimental/feat-cxx14.cc: Remove dependency on
+ 	_GLIBCXX_USE_C99_STDINT_TR1.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-05-12  Jonathan Wakely  
+ 
+ 	* testsuite/21_strings/basic_string_view/typedefs.cc: Remove
+ 	dependency on _GLIBCXX_USE_C99_STDINT_TR1.
+ 	* testsuite/experimental/string_view/typedefs.cc: Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-09-11  Jonathan Wakely  
+ 
+ 	* src/c++11/Makefile.am: Add new file.
+ 	* src/c++11/Makefile.in: Regenerate.
+ 	* src/c++11/debug.cc (__glibcxx_assert_fail): Move to ...
+ 	* src/c++11/assert_fail.cc: New file.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-06-26  Jonathan Wakely  
+ 
+ 	* include/bits/iterator_concepts.h (projected): Replace class
+ 	template with alias template denoting an ADL-proofed helper.
+ 	(incremental_traits>): Remove.
+ 	* testsuite/24_iterators/indirect_callable/projected-adl.cc:
+ 	New test.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-04-27  Jonathan Wakely  
+ 
+ 	PR libstdc++/40380
+ 	* include/bits/basic_string.h: Improve doxygen comments.
+ 	* include/bits/cow_string.h: Likewise.
+ 	* include/bits/forward_list.h: Likewise.
+ 	* include/bits/fs_dir.h: Likewise.
+ 	* include/bits/fs_path.h: Likewise.
+ 	* include/bits/quoted_string.h: Likewise.
+ 	* include/bits/stl_bvector.h: Likewise.
+ 	* include/bits/stl_map.h: Likewise.
+ 	* include/bits/stl_multimap.h: Likewise.
+ 	* include/bits/stl_multiset.h: Likewise.
+ 	* include/bits/stl_set.h: Likewise.
+ 	* include/bits/stl_vector.h: Likewise.
+ 	* include/bits/unordered_map.h: Likewise.
+ 	* include/bits/unordered_set.h: Likewise.
+ 	* include/std/filesystem: Likewise.
+ 	* include/std/iomanip: Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-11-19  Jonathan Wakely  
+ 
+ 	* include/bits/ptr_traits.h (pointer_traits::pointer_to): Rename
+ 	parameter.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-11-21  Jonathan Wakely  
+ 
+ 	* include/std/tuple: Add better Doxygen comments.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-11-08  Jonathan Wakely  
+ 
+ 	* testsuite/18_support/new_nothrow.cc: Add missing noexcept
+ 	to operator delete replacements.
+ 	* testsuite/20_util/any/cons/92156.cc: Disable
+ 	-Winit-list-lifetime warnings from instantiating invalid
+ 	specialization of manager function.
+ 	* testsuite/20_util/any/modifiers/92156.cc: Likewise.
+ 	* testsuite/20_util/default_delete/void_neg.cc: Prune additional
+ 	diagnostics.
+ 	* testsuite/20_util/headers/memory/synopsis.cc: Add missing
+ 	noexcept.
+ 	* testsuite/20_util/shared_ptr/cons/void_neg.cc: Prune
+ 	additional diagnostic.
+ 	* testsuite/20_util/unique_ptr/creation/for_overwrite.cc: Add
+ 	missing noexcept to operator delete replacements.
+ 	* testsuite/21_strings/basic_string/cons/char/103919.cc:
+ 	Likewise.
+ 	* testsuite/23_containers/map/modifiers/emplace/92300.cc:
+ 	Likewise.
+ 	* testsuite/23_containers/map/modifiers/insert/92300.cc:
+ 	Likewise.
+ 	* testsuite/24_iterators/headers/iterator/range_access_c++11.cc:
+ 	Add missing noexcept to synopsis declarations.
+ 	* testsuite/24_iterators/headers/iterator/range_access_c++14.cc:
+ 	Likewise.
+ 	* testsuite/24_iterators/headers/iterator/range_access_c++17.cc:
+ 	Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-09-21  Jonathan Wakely  
+ 
+ 	* testsuite/20_util/headers/memory/synopsis.cc: Add declarations
+ 	from C++11 and later.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-11-08  Jonathan Wakely  
+ 
+ 	* include/bits/stl_tempbuf.h (_Temporary_buffer): Disable
+ 	warnings about get_temporary_buffer being deprecated.
+ 	* include/ext/functional (mem_fun1, mem_fun1_ref): Disable
+ 	warnings about mem_fun1_t, const_mem_fun1_t, mem_fun1_ref_t and
+ 	const_mem_fun1_ref_t being deprecated.
+ 	* include/std/spanstream (basic_spanbuf::setbuf): Add assertion
+ 	and adjust to avoid narrowing warning.
+ 	* libsupc++/exception_ptr.h [!__cpp_rtti && !__cpp_exceptions]
+ 	(make_exception_ptr): Add missing inline specifier.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  
+ 
+ 	* doc/doxygen/user.cfg.in (PREDEFINED): Define
+ 	_GTHREAD_USE_MUTEX_TIMEDLOCK macro.
+ 	* include/bits/std_mutex.h (mutex, lock_guard): Use @since and
+ 	@headerfile.
+ 	* include/bits/unique_lock.h (unique_lock): Likewise.
+ 	* include/std/mutex (recursive_mutex, timed_mutex)
+ 	(recursive_timed_mutex, scoped_lock): Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  
+ 
+ 	* doc/doxygen/user.cfg.in (PREDEFINED): Define
+ 	_GLIBCXX23_CONSTEXPR macro.
+ 	* include/backward/auto_ptr.h (auto_ptr): Use @deprecated.
+ 	* include/bits/unique_ptr.h (default_delete): Use @since and
+ 	@headerfile.
+ 	* include/std/scoped_allocator: Remove @ingroup from @file
+ 	block.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  
+ 
+ 	* include/bits/ostream_insert.h: Mark helper functions as
+ 	undocumented by Doxygen.
+ 	* include/bits/stl_algo.h: Use markdown for formatting and mark
+ 	helper functions as undocumented.
+ 	* include/bits/stl_numeric.h:  Likewise.
+ 	* include/bits/stl_pair.h (pair): Add @headerfile.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  
+ 
+ 	* doc/doxygen/user.cfg.in (PREDEFINED): Define __allocator_base
+ 	so that Doxygen shows the right base-class for std::allocator.
+ 	* include/bits/alloc_traits.h: Improve doxygen docs.
+ 	* include/bits/allocator.h: Likewise.
+ 	* include/bits/new_allocator.h: Likewise.
+ 	* include/ext/new_allocator.h: Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  
+ 
+ 	* doc/doxygen/user.cfg.in (PREDEFINED): Define macro
+ 	_GLIBCXX_DOXYGEN_ONLY to expand its argument.
+ 	* include/bits/c++config (_GLIBCXX_DOXYGEN_ONLY): Define.
+ 	* include/bits/regex.h: Improve doxygen docs.
+ 	* include/bits/regex_constants.h: Likewise.
+ 	* include/bits/regex_error.h: Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  
+ 
+ 	* include/std/atomic: Suppress doxygen docs for
+ 	implementation details.
+ 	* include/bits/atomic_base.h: Likewise.
+ 	* include/bits/shared_ptr_atomic.h: Use markdown. Fix grouping
+ 	so that std::atomic is not added to the pointer abstractions
+ 	group.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-05-17  Jonathan Wakely  
+ 
+ 	* src/Makefile.am [ENABLE_SYMVERS_GNU_NAMESPACE] (cxx11_sources):
+ 	Do not build the compatibility*-c++0x.cc objects.
+ 	* src/Makefile.in: Regenerate.
+ 	* src/c++11/compatibility-c++0x.cc [_GLIBCXX_INLINE_VERSION]:
+ 	Refuse to build for the versioned namespace.
+ 	* src/c++11/compatibility-chrono.cc: Likewise.
+ 	* src/c++11/compatibility-condvar.cc: Likewise.
+ 	* src/c++11/compatibility-thread-c++0x.cc: Likewise.
+ 	* src/c++11/chrono.cc (system_clock, steady_clock):
+ 	Use macros to define in inline namespace _V2, matching the
+ 	declarations in .
+ 	* src/c++11/system_error.cc (system_category, generic_category):
+ 	Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  
+ 
+ 	* doc/doxygen/user.cfg.in (PREDEFINED): Expand new macros to
+ 	nothing.
+ 	* include/bits/c++config (_GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE)
+ 	(_GLIBCXX_END_INLINE_ABI_NAMESPACE): Define new macros.
+ 	* include/bits/algorithmfwd.h (_V2::__rotate): Use new macros
+ 	for the namespace.
+ 	* include/bits/chrono.h (chrono::_V2::system_clock): Likewise.
+ 	* include/bits/stl_algo.h (_V2::__rotate): Likewise.
+ 	* include/std/condition_variable (_V2::condition_variable_any):
+ 	Likewise.
+ 	* include/std/system_error (_V2::error_category): Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  
+ 
+ 	* doc/doxygen/user.cfg.in (GROUP_NESTED_COMPOUNDS): Set to NO.
+ 	(CLASS_DIAGRAMS): Remove obsolete option.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-06-27  Jonathan Wakely  
+ 
+ 	* include/bits/fs_path.h (__is_path_iter_src): Replace class
+ 	template with variable template.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-09-26  Jonathan Wakely  
+ 
+ 	* include/bits/ptr_traits.h (__ptr_traits_elem) [__cpp_concepts]:
+ 	Also define the __ptr_traits_elem class template for the
+ 	concepts case.
+ 	(pointer_traits): Remove constrained partial
+ 	specialization.
+ 	* testsuite/20_util/pointer_traits/lwg3545.cc: Check for
+ 	ambiguitiy with program-defined partial specialization.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-09-24  Jonathan Wakely  
+ 
+ 	* include/bits/alloc_traits.h (allocator_traits::is_always_equal):
+ 	Only instantiate is_empty if needed.
+ 	* include/bits/ptr_traits.h (__ptr_traits_impl::difference_type)
+ 	(__ptr_traits_impl::rebind): Use __detected_or.
+ 	* include/experimental/type_traits (is_same_v): Add a partial
+ 	specialization instead of instantiating the std::is_same class
+ 	template.
+ 	(detected_t): Redefine in terms of detected_or_t.
+ 	(is_detected, is_detected_v): Redefine in terms of detected_t.
+ 	* include/std/type_traits [__cpp_concepts] (__detected_or): Add
+ 	new definition using concepts.
+ 	(__detector::value_t): Rename to __is_detected.
+ 	* testsuite/17_intro/names.cc: Check value_t isn't used.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-05-13  Jonathan Wakely  
+ 
+ 	* include/bits/ptr_traits.h: Add some doxygen comments.
+ 
+ 2024-03-18  Xi Ruoyao  
+ 
+ 	Backported from master:
+ 	2022-06-24  Xi Ruoyao  
+ 
+ 	* scripts/extract_symvers.in: Use grep -E instead of egrep.
+ 	* scripts/run_doxygen: Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-10-28  Jonathan Wakely  
+ 
+ 	PR libstdc++/107376
+ 	* include/bits/regex_executor.h (_Executor::_Executor): Use same
+ 	allocator for _M_cur_results and _M_results.
+ 	* include/bits/regex_executor.tcc (_Executor::_M_main_dispatch):
+ 	Prevent possibly incorrect allocator propagating to
+ 	_M_cur_results.
+ 	* testsuite/28_regex/algorithms/regex_match/107376.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-02-02  Jonathan Wakely  
+ 
+ 	* include/std/sstream  (basic_stringbuf::view): Define for old
+ 	std::string ABI.
+ 	(basic_istringstream::view, basic_stringstream::view)
+ 	(basic_stringstream::view): Likewise.
+ 	* testsuite/27_io/basic_istringstream/view/char/1.cc: Remove
+ 	{ dg-require-effective-target cxx11_abi }.
+ 	* testsuite/27_io/basic_istringstream/view/wchar_t/1.cc:
+ 	Likewise.
+ 	* testsuite/27_io/basic_ostringstream/view/char/1.cc: Likewise.
+ 	* testsuite/27_io/basic_ostringstream/view/wchar_t/1.cc:
+ 	Likewise.
+ 	* testsuite/27_io/basic_stringbuf/view/char/1.cc: Likewise.
+ 	* testsuite/27_io/basic_stringbuf/view/wchar_t/1.cc: Likewise.
+ 	* testsuite/27_io/basic_stringstream/view/char/1.cc: Likewise.
+ 	* testsuite/27_io/basic_stringstream/view/wchar_t/1.cc:
+ 	Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-09-07  Jonathan Wakely  
+ 
+ 	* acinclude.m4 (GLIBCXX_CHECK_FILESYSTEM_DEPS): Check for mkdir,
+ 	chmod, chdir, and getcwd.
+ 	* config.h.in: Regenerate.
+ 	* configure: Regenerate.
+ 	* src/c++17/fs_ops.cc (create_dir): Use USE_MKDIR macro.
+ 	(fs::current_path): Use USE_GETCWD and USE_CHDIR macros.
+ 	(fs::permissions): Use USE_CHMOD macro.
+ 	* src/filesystem/ops-common.h [FILESYSTEM_IS_WINDOWS]
+ 	(chmod, mkdir, getcwd, chdir): Define new macros.
+ 	[FILESYSTEM_IS_WINDOWS] (chmod, mkdir, getcwd, chdir): Use
+ 	new macros.
+ 	* src/filesystem/ops.cc (create_dir): Use USE_MKDIR macro.
+ 	(fs::current_path): Use USE_GETCWD and USE_CHDIR macros.
+ 	(fs::permissions): Use USE_CHMOD macro.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-08-09  Jonathan Wakely  
+ 
+ 	* include/bits/new_allocator.h (__new_allocator): Define copy
+ 	assignment operator as defaulted.
+ 	* include/std/complex (complex, complex)
+ 	(complex): Define copy constructor as defaulted.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-11-11  Jonathan Wakely  
+ 
+ 	PR libstdc++/112473
+ 	* include/bits/utility.h (integer_sequence): Add static_assert.
+ 	* testsuite/20_util/integer_sequence/112473.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-09-15  Jonathan Wakely  
+ 
+ 	PR libstdc++/111172
+ 	* include/std/variant (get): Remove !is_void static
+ 	assertions.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-10-26  Jonathan Wakely  
+ 
+ 	PR libstdc++/112089
+ 	* include/std/shared_mutex (shared_lock::unlock): Change errc
+ 	constant to operation_not_permitted.
+ 	* testsuite/30_threads/shared_lock/locking/112089.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-02-29  Jonathan Wakely  
+ 
+ 	PR libstdc++/113960
+ 	* include/bits/stl_algobase.h (__is_byte_iter): Replace with ...
+ 	(__memcmp_ordered_with): New concept.
+ 	(lexicographical_compare_three_way): Use __memcmp_ordered_with
+ 	instead of __is_byte_iter. Use correct length for memcmp.
+ 	* testsuite/25_algorithms/lexicographical_compare_three_way/113960.cc:
+ 	New test.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-02-28  Jonathan Wakely  
+ 
+ 	PR libstdc++/108846
+ 	* include/bits/stl_algobase.h (__copy_move)
+ 	Add __assign_one static member function.
+ 	(__copy_move): Likewise.
+ 	(__copy_move): Do not use memmove for a single
+ 	value.
+ 	(__copy_move_backward): Likewise.
+ 	* testsuite/25_algorithms/copy/108846.cc: New test.
+ 	* testsuite/25_algorithms/copy_backward/108846.cc: New test.
+ 	* testsuite/25_algorithms/copy_n/108846.cc: New test.
+ 	* testsuite/25_algorithms/move/108846.cc: New test.
+ 	* testsuite/25_algorithms/move_backward/108846.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-03-22  Jonathan Wakely  
+ 
+ 	* include/bits/stream_iterator.h (istream_iterator): Add
+ 	constexpr to copy constructor, as per LWG 3600.
+ 	* testsuite/24_iterators/istream_iterator/cons/constexpr.cc:
+ 	Check copy construction.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-03-22  Jonathan Wakely  
+ 
+ 	* include/bits/regex.h (match_results): Add allocator-extended
+ 	copy and move constructors, as per LWG 2195.
+ 	* testsuite/28_regex/match_results/ctors/char/alloc.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-02-28  Jonathan Wakely  
+ 
+ 	* src/c++11/codecvt.cc: Add [[likely]] and [[unlikely]]
+ 	attributes.
+ 
+ 2024-03-18  Dimitrij Mijoski  
+ 
+ 	Backported from master:
+ 	2023-01-13  Dimitrij Mijoski  
+ 
+ 	PR libstdc++/86419
+ 	* src/c++11/codecvt.cc (read_utf8_code_point): Correctly detect
+ 	errors in incomplete multibyte sequences.
+ 	(utf16_in): Remove surrogates parameter. Fix conditions for
+ 	returning partial.
+ 	(utf16_out): Fix condition for returning partial.
+ 	(ucs2_in): Do not pass surrogates argument to utf16_in.
+ 	* testsuite/22_locale/codecvt/codecvt_unicode.cc: New test.
+ 	* testsuite/22_locale/codecvt/codecvt_unicode.h: New header for
+ 	tests.
+ 	* testsuite/22_locale/codecvt/codecvt_unicode_wchar_t.cc: New
+ 	test.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-07-26  Jonathan Wakely  
+ 
+ 	* include/bits/algorithmfwd.h (random_shuffle): Add deprecated
+ 	attribute.
+ 	* include/bits/stl_algo.h (random_shuffle): Correct comments.
+ 	* testsuite/25_algorithms/random_shuffle/1.cc: Disable
+ 	deprecated warnings.
+ 	* testsuite/25_algorithms/random_shuffle/59603.cc: Likewise.
+ 	* testsuite/25_algorithms/random_shuffle/moveable.cc: Likewise.
+ 	* testsuite/25_algorithms/random_shuffle/deprecated.cc: New
+ 	test.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-05-11  Jonathan Wakely  
+ 
+ 	PR libstdc++/109758
+ 	* include/bits/std_abs.h (abs(__float128)): Handle negative NaN
+ 	and negative zero correctly.
+ 	* testsuite/26_numerics/headers/cmath/109758.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-05-12  Jonathan Wakely  
+ 
+ 	* acinclude.m4 (GLIBCXX_CHECK_C99_TR1): Use a non-null pointer
+ 	to check for nan, nanf, and nanl.
+ 	* configure: Regenerate.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-05-31  Jonathan Wakely  
+ 
+ 	* include/std/scoped_allocator (scoped_allocator_adaptor): Add
+ 	noexcept to all constructors except the default constructor.
+ 	(scoped_allocator_adaptor::inner_allocator): Add noexcept.
+ 	(scoped_allocator_adaptor::outer_allocator): Likewise.
+ 	* testsuite/20_util/scoped_allocator/noexcept.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-06-01  Jonathan Wakely  
+ 
+ 	* testsuite/26_numerics/pstl/numeric_ops/transform_reduce.cc:
+ 	Add const to equality operator.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-06-09  Jonathan Wakely  
+ 
+ 	* testsuite/23_containers/deque/modifiers/emplace/52799.cc:
+ 	Removed.
+ 	* testsuite/23_containers/deque/modifiers/emplace/const_iterator.cc:
+ 	Removed.
+ 	* testsuite/23_containers/list/modifiers/emplace/52799.cc:
+ 	Removed.
+ 	* testsuite/23_containers/list/modifiers/emplace/const_iterator.cc:
+ 	Removed.
+ 	* testsuite/23_containers/vector/modifiers/emplace/52799.cc:
+ 	Removed.
+ 	* testsuite/23_containers/vector/modifiers/emplace/const_iterator.cc:
+ 	Removed.
+ 	* testsuite/23_containers/deque/modifiers/emplace/1.cc: New
+ 	test.
+ 	* testsuite/23_containers/list/modifiers/emplace/1.cc: New
+ 	test.
+ 	* testsuite/23_containers/vector/modifiers/emplace/1.cc: New
+ 	test.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-07-03  Jonathan Wakely  
+ 
+ 	* include/bits/alloc_traits.h (_Destroy): Qualify call.
+ 	* include/bits/stl_construct.h (_Destroy, _Destroy_n): Likewise.
+ 	* testsuite/23_containers/vector/cons/destroy-adl.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-07-19  Jonathan Wakely  
+ 
+ 	PR libstdc++/110593
+ 	* include/bits/chrono.h (duration): Improve static assert
+ 	messages.
+ 	(__is_ratio): Move to ...
+ 	* include/std/ratio (__is_ratio): ... here.
+ 	(__is_ratio_v): New variable template and partial
+ 	specialization.
+ 	(__are_both_ratios): New function template.
+ 	(__ratio_multiply, ratio_equal, ratio_less, __ratio_add):
+ 	Add static assertion.
+ 	* testsuite/20_util/ratio/requirements/type_constraints.cc:
+ 	New test.
+ 	* testsuite/20_util/duration/requirements/typedefs_neg1.cc:
+ 	Adjust expected error.
+ 	* testsuite/20_util/duration/requirements/typedefs_neg2.cc:
+ 	Likewise.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-09-11  Jonathan Wakely  
+ 
+ 	* src/c++11/debug.cc (acquire_sequence_ptr_for_lock): New
+ 	function.
+ 	(reset_sequence_ptr): New function.
+ 	(_Safe_iterator_base::_M_detach)
+ 	(_Safe_local_iterator_base::_M_detach): Replace bare atomic_load
+ 	with acquire_sequence_ptr_for_lock.
+ 	(_Safe_iterator_base::_M_reset): Replace bare atomic_store with
+ 	reset_sequence_ptr.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-08-16  Jonathan Wakely  
+ 
+ 	* include/bits/basic_string.tcc (resize_and_overwrite): Invoke
+ 	the callable with the same size as resize_and_overwrite was
+ 	called with.
+ 	* testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite.cc:
+ 	Check with small values for the new size.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-03-22  Jonathan Wakely  
+ 
+ 	* include/bits/basic_string.tcc (basic_string::resize_and_overwrite):
+ 	Pass rvalues to the callback, as now allowed by LWG 3645.
+ 	Enforce preconditions on the return value.
+ 	* testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite.cc:
+ 	Adjust.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-08-09  Jonathan Wakely  
+ 
+ 	* include/bits/shared_ptr_atomic.h (atomic): Change class-head
+ 	to struct.
+ 	* include/bits/stl_tree.h (_Rb_tree_merge_helper): Change
+ 	class-head to struct in friend declaration.
+ 	* include/std/future (_Task_state_base, _Task_state): Likewise.
+ 	* include/std/scoped_allocator (__inner_type_impl): Likewise.
+ 	* include/std/valarray (_BinClos, _SClos, _GClos, _IClos)
+ 	(_ValFunClos, _RefFunClos): Change class-head to struct.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-09-08  Jonathan Wakely  
+ 
+ 	* doc/xml/manual/test.xml: Update reference to -std=gnu++14 as
+ 	the default.
+ 	* doc/html/manual/test.html: Regenerate.
+ 
+ 2024-03-18  Alexey Lapshin  
+ 
+ 	Backported from master:
+ 	2023-09-08  Alexey Lapshin  
+ 
+ 	* src/libbacktrace/Makefile.am: Remove -Werror.
+ 	* src/libbacktrace/Makefile.in: Regenerate.
+ 
+ 2024-03-18  Nathaniel Shead  
+ 
+ 	Backported from master:
+ 	2023-09-29  Nathaniel Shead  
+ 
+ 	* include/bits/basic_string.h: (basic_string(basic_string&&)):
+ 	Activate _M_local_buf when needed.
+ 	(basic_string(basic_string&&, const _Alloc&)): Likewise.
+ 	* include/bits/basic_string.tcc: (basic_string::swap): Likewise.
+ 	* include/std/variant: (__detail::__variant::__construct_n): New.
+ 	(__detail::__variant::__emplace): Use __construct_n.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-11-02  Jonathan Wakely  
+ 
+ 	* acinclude.m4 (GLIBCXX_ENABLE_C99): Fix snprintf checks.
+ 	* configure: Regenerate.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-11-21  Jonathan Wakely  
+ 
+ 	* include/tr2/dynamic_bitset (dynamic_bitset): Pass zero and one
+ 	characters to _M_copy_from_string.
+ 	* testsuite/tr2/dynamic_bitset/string.cc: New test.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-11-14  Jonathan Wakely  
+ 
+ 	* include/std/charconv (__from_chars_pow2_base): Convert base to
+ 	unsigned for call to __countr_zero.
+ 	(__from_chars_alnum): Likewise for call to __bit_width.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-11-23  Jonathan Wakely  
+ 
+ 	* testsuite/util/testsuite_allocator.h (uneq_allocator): Fix
+ 	equality operator for heterogeneous comparisons.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-03-14  Jonathan Wakely  
+ 
+ 	PR libstdc++/66146
+ 	* doc/xml/manual/status_cxx2011.xml: Remove mention of Linux in
+ 	note about std::call_once.
+ 	* doc/xml/manual/status_cxx2014.xml: Likewise.
+ 	* doc/xml/manual/status_cxx2017.xml: Likewise.
+ 	* doc/html/manual/status.html: Regenerate.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-03-13  Jonathan Wakely  
+ 
+ 	* testsuite/libstdc++-prettyprinters/cxx11.cc: Move custom_cat
+ 	to namespace scope.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-02-28  Jonathan Wakely  
+ 
+ 	* doc/xml/manual/appendix_contributing.xml: Change URLs to use
+ 	https.
+ 	* doc/html/manual/*: Regenerate.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-02-28  Jonathan Wakely  
+ 
+ 	* doc/xml/manual/appendix_contributing.xml: Replace outdated
+ 	info on ChangeLog entries.
+ 	* doc/html/manual/appendix_contributing.html: Regenerate.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-11-04  Jonathan Wakely  
+ 
+ 	PR libstdc++/107500
+ 	* libsupc++/eh_globals.cc (eh_globals): Remove immortalizing
+ 	wrapper.
+ 	(__cxxabiv1::__cxa_get_globals_fast): Adjust.
+ 	(__cxxabiv1::__cxa_get_globals): Adjust.
+ 
+ 2024-03-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-03-04  Jonathan Wakely  
+ 
+ 	PR libstdc++/114147
+ 	* include/std/tuple (tuple::tuple(allocator_arg_t, const Alloc&)):
+ 	Add missing overload of allocator-extended default constructor.
+ 	(tuple::tuple(allocator_arg_t, const Alloc&)): Likewise.
+ 	* testsuite/20_util/tuple/cons/114147.cc: New test.
+ 
+ 2024-03-13  Cassio Neri  
+ 
+ 	Backported from master:
+ 	2024-01-05  Cassio Neri  
+ 
+ 	* include/std/chrono: Fix + and - for months and weekdays.
+ 	* testsuite/std/time/month/1.cc: Add constexpr tests against overflow.
+ 	* testsuite/std/time/month/2.cc: New test for extreme values.
+ 	* testsuite/std/time/weekday/1.cc: Add constexpr tests against overflow.
+ 	* testsuite/std/time/weekday/2.cc: New test for extreme values.
+ 
+ 2024-03-13  Cassio Neri  
+ 
+ 	Backported from master:
+ 	2023-11-14  Cassio Neri  
+ 
+ 	* include/std/chrono (operator-(const weekday&, const weekday&)):
+ 	Optimize.
+ 
+ 2024-03-13  Cassio Neri  
+ 
+ 	Backported from master:
+ 	2023-11-14  Cassio Neri  
+ 
+ 	* include/std/chrono (year::is_leap): Clear code.
+ 
+ 2024-03-13  Cassio Neri  
+ 
+ 	Backported from master:
+ 	2023-11-14  Cassio Neri  
+ 
+ 	* include/std/chrono (year_month_day_last::day): Remove &1.
+ 
+ 2024-03-13  Cassio Neri  
+ 
+ 	Backported from master:
+ 	2023-11-14  Cassio Neri  
+ 
+ 	* include/std/chrono (weekday::_S_from_days): Fix UB.
+ 	* testsuite/std/time/weekday/1.cc: Add test for overflow.
+ 
+ 2024-03-13  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-08-09  Jonathan Wakely  
+ 
+ 	* include/bits/list.tcc (list::sort(Cmp)): Fix -Wsign-compare
+ 	warning for loop condition.
+ 
+ 2024-03-13  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-06-09  Jonathan Wakely  
+ 
+ 	PR libstdc++/110167
+ 	* include/std/array (to_array): Initialize arrays of trivial
+ 	types using memcpy. For non-trivial types, use lambda
+ 	expressions instead of a separate helper function.
+ 	(__to_array): Remove.
+ 	* testsuite/23_containers/array/creation/110167.cc: New test.
+ 
+ 2024-02-08  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-02-02  Jonathan Wakely  
+ 
+ 	* include/std/string_view (basic_string_view(R&&)): Remove
+ 	constraint that traits_type must be the same, as per LWG 3857.
+ 	* testsuite/21_strings/basic_string_view/cons/char/range_c++20.cc:
+ 	Explicit conversion between different specializations should be
+ 	allowed.
+ 	* testsuite/21_strings/basic_string_view/cons/wchar_t/range_c++20.cc:
+ 	Likewise.
+ 
+ 2024-02-08  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-02-02  Jonathan Wakely  
+ 
+ 	PR libstdc++/90276
+ 	* testsuite/util/pstl/test_utils.h (reverse_invoker): Do not use
+ 	perfect forwarding for iterator arguments.
+ 
+ 2024-02-08  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-02-02  Jonathan Wakely  
+ 
+ 	* include/std/syncstream (basic_osyncstream::operator=): Remove
+ 	noexcept, as per LWG 3867.
+ 
+ 2024-02-08  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-01-13  Jonathan Wakely  
+ 
+ 	PR libstdc++/107466
+ 	* include/bits/random.tcc (subtract_with_carry_engine::seed):
+ 	Implement proposed resolution of LWG 4014.
+ 	* testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error
+ 	line number.
+ 	* testsuite/26_numerics/random/subtract_with_carry_engine/cons/lwg3809.cc:
+ 	Check for expected result of 64-bit engine with seed that
+ 	doesn't fit in 32-bits.
+ 
+ 2024-02-08  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-01-11  Jonathan Wakely  
+ 
+ 	PR libstdc++/113258
+ 	* libsupc++/new_opa.cc: Prefer to use posix_memalign if
+ 	available.
+ 
+ 2024-02-02  Jonathan Wakely  
+ 
+ 	PR libstdc++/108636
+ 	* include/bits/shared_ptr_base.h (__shared_ptr::operator bool):
+ 	Add always_inline attribute for C++20 and later.
+ 
+ 2024-01-11  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2024-01-05  Jonathan Wakely  
+ 
+ 	PR libstdc++/113200
+ 	* include/bits/char_traits.h (__gnu_cxx::char_traits::move): Use
+ 	__builtin_constant_p to check for unrelated pointers that cannot
+ 	be compared during constant evaluation.
+ 	* testsuite/21_strings/char_traits/requirements/113200.cc: New
+ 	test.
+ 
+ 2024-01-11  Ken Matsui  
+ 
+ 	Backported from master:
+ 	2024-01-11  Ken Matsui  
+ 
+ 	PR libstdc++/113250
+ 	* src/c++17/fs_ops.cc (fs::equivalent): Use || instead of &&.
+ 	* src/filesystem/ops.cc (fs::equivalent): Likewise.
+ 	* testsuite/27_io/filesystem/operations/equivalent.cc: Handle
+ 	error codes.
+ 	* testsuite/experimental/filesystem/operations/equivalent.cc:
+ 	Likewise.
+ 
+ 2024-01-03  Patrick Palka  
+ 
+ 	Backported from master:
+ 	2024-01-03  Patrick Palka  
+ 
+ 	PR testsuite/113175
+ 	* testsuite/std/ranges/iota/max_size_type.cc (test02): Reduce
+ 	'limit' to 100 from 1000 and adjust 'log2_limit' accordingly.
+ 	(test03): Likewise.
+ 
+ 2023-12-16  Jakub Jelinek  
+ 
+ 	Backported from master:
+ 	2023-10-13  Jakub Jelinek  
+ 
+ 	* testsuite/tr1/8_c_compatibility/cstdio/functions.cc (test01):
+ 	Initialize stream to va_arg(ap, FILE*) rather than 0.
+ 	* testsuite/tr1/8_c_compatibility/cwchar/functions.cc (test01):
+ 	Likewise.
+ 
+ 2023-12-06  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-11-02  Jonathan Wakely  
+ 
+ 	PR libstdc++/112314
+ 	* include/std/string_view (string_view::remove_suffix): Add
+ 	debug assertion.
+ 	* testsuite/21_strings/basic_string_view/modifiers/remove_prefix/debug.cc:
+ 	New test.
+ 	* testsuite/21_strings/basic_string_view/modifiers/remove_suffix/debug.cc:
+ 	New test.
+ 
+ 2023-12-06  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-11-17  Jonathan Wakely  
+ 
+ 	* include/std/utility (in_range): Rename _Up parameter to _Res.
+ 
+ 2023-11-15  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-11-15  Jonathan Wakely  
+ 
+ 	PR libstdc++/112491
+ 	* python/libstdcxx/v6/xmethods.py (DequeWorkerBase.index):
+ 	Correctly handle unused capacity at the start of the first node.
+ 	* testsuite/libstdc++-xmethods/deque.cc: Check index operator
+ 	when elements have been removed from the front.
+ 
+ 2023-11-15  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-11-15  Jonathan Wakely  
+ 
+ 	* include/std/stacktrace (basic_stacktrace::at): Fix class name
+ 	in exception message.
+ 	* testsuite/19_diagnostics/stacktrace/hash.cc: Do not fail if
+ 	current() returns a non-empty stacktrace.
+ 
+ 2023-11-14  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-11-14  Jonathan Wakely  
+ 
+ 	PR libstdc++/112348
+ 	* include/std/stacktrace (hash>): Fix
+ 	type of hash function for entries.
+ 	* testsuite/19_diagnostics/stacktrace/hash.cc: New test.
+ 
+ 2023-11-14  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-11-14  Jonathan Wakely  
+ 
+ 	PR libstdc++/112491
+ 	* python/libstdcxx/v6/xmethods.py (DequeWorkerBase.size): Fix
+ 	calculation to use _M_start._M_cur.
+ 	* testsuite/libstdc++-xmethods/deque.cc: Check failing cases.
+ 
+ 2023-11-13  Tom Tromey  
+ 
+ 	Backported from master:
+ 	2023-10-04  Tom Tromey  
+ 
+ 	* python/libstdcxx/v6/printers.py
+ 	(StdExpAnyPrinter.__init__): Qualify call to
+ 	_string_types.
+ 
+ 2023-11-13  Tom Tromey  
+ 
+ 	Backported from master:
+ 	2023-10-04  Tom Tromey  
+ 
+ 	* python/libstdcxx/v6/printers.py: Assume that
+ 	_versioned_namespace is non-None.
+ 	* python/libstdcxx/v6/xmethods.py (is_specialization_of):
+ 	Assume that _versioned_namespace is non-None.
+ 
+ 2023-11-13  Tom Tromey  
+ 
+ 	Backported from master:
+ 	2023-09-28  Tom Tromey  
+ 
+ 	* python/libstdcxx/v6/printers.py (Printer.add_version)
+ 	(add_one_template_type_printer)
+ 	(FilteringTypePrinter.add_one_type_printer): Use Python
+ 	"not in" operator.
+ 
+ 2023-11-13  Tom Tromey  
+ 
+ 	Backported from master:
+ 	2023-10-04  Tom Tromey  
+ 
+ 	* python/libstdcxx/v6/xmethods.py (_versioned_namespace):
+ 	Define.
+ 
+ 2023-11-13  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-09-28  Jonathan Wakely  
+ 
+ 	* python/libstdcxx/v6/xmethods.py (is_specialization_of): Define
+ 	new function.
+ 	(ArrayMethodsMatcher, DequeMethodsMatcher)
+ 	(ForwardListMethodsMatcher, ListMethodsMatcher)
+ 	(VectorMethodsMatcher, AssociativeContainerMethodsMatcher)
+ 	(UniquePtrGetWorker, UniquePtrMethodsMatcher)
+ 	(SharedPtrSubscriptWorker, SharedPtrMethodsMatcher): Use
+ 	is_specialization_of instead of re.match.
+ 
+ 2023-11-13  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-09-28  Jonathan Wakely  
+ 
+ 	* python/libstdcxx/v6/printers.py: Break long lines. Use raw
+ 	strings for regular expressions. Add whitespace around
+ 	operators.
+ 	(is_member_of_namespace): Use isinstance to check type.
+ 	(is_specialization_of): Likewise. Adjust template_name
+ 	for versioned namespace instead of duplicating the re.match
+ 	call.
+ 	(StdExpAnyPrinter._string_types): New static method.
+ 	(StdExpAnyPrinter.to_string): Use _string_types.
+ 
+ 2023-11-13  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-09-28  Jonathan Wakely  
+ 
+ 	* python/libstdcxx/v6/printers.py: Format docstrings according
+ 	to PEP 257.
+ 	* python/libstdcxx/v6/xmethods.py: Likewise.
+ 
+ 2023-11-13  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-09-12  Jonathan Wakely  
+ 
+ 	* python/libstdcxx/v6/printers.py: Reformat.
+ 	* python/libstdcxx/v6/xmethods.py: Likewise.
+ 
+ 2023-11-06  Ian Lance Taylor  
+ 
+ 	PR libbacktrace/111315
+ 	PR libbacktrace/112263
+ 	* acinclude.m4: Set -D_GNU_SOURCE in BACKTRACE_CPPFLAGS and when
+ 	grepping link.h for dl_iterate_phdr.
+ 	* configure: Regenerate.
+ 
+ 2023-10-25  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-10-25  Jonathan Wakely  
+ 
+ 	PR libstdc++/111936
+ 	* src/libbacktrace/Makefile.am: Add -prefer-pic to libtool
+ 	compile commands.
+ 	* src/libbacktrace/Makefile.in: Regenerate.
+ 
+ 2023-10-23  François Dumont  
+ 
+ 	* include/bits/hashtable_policy.h
+ 	(_Hash_code_base::_M_hash_code(const _Hash&, const _Hash_node_value<>&)): Remove.
+ 	(_Hash_code_base::_M_hash_code<_H2>(const _H2&, const _Hash_node_value<>&)): Remove.
+ 	* include/bits/hashtable.h
+ 	(_M_src_hash_code<_H2>(const _H2&, const key_type&, const __node_value_type&)): New.
+ 	(_M_merge_unique<>, _M_merge_multi<>): Use latter.
+ 	* testsuite/23_containers/unordered_map/modifiers/merge.cc
+ 	(test04, test05, test06): New test cases.
+ 
+ 2023-10-03  Jonathan Wakely  
+ 
+ 	* include/bits/fs_dir.h (directory_iterator::operator==):
+ 	Define without using a non-exported shared_ptr symbol.
+ 	(recursive_directory_iterator::operator==): Likewise.
+ 
+ 2023-10-03  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-09-01  Jonathan Wakely  
+ 
+ 	* testsuite/27_io/filesystem/path/108636.cc: Add dg-require for
+ 	filesystem support.
+ 
+ 2023-10-03  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-06-06  Jonathan Wakely  
+ 
+ 	PR libstdc++/108178
+ 	* src/filesystem/ops-common.h (do_copy_file): Check for empty
+ 	files by trying to read a character.
+ 	* testsuite/27_io/filesystem/operations/copy_file_108178.cc:
+ 	New test.
+ 
+ 2023-10-03  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-06-06  Jonathan Wakely  
+ 
+ 	* src/filesystem/ops-common.h (do_copy_file) [O_CLOEXEC]: Set
+ 	close-on-exec flag on file descriptors.
+ 
+ 2023-10-03  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-03-20  Jonathan Wakely  
+ 
+ 	* src/filesystem/ops-common.h (get_temp_directory_from_env): Fix
+ 	formatting.
+ 
+ 2023-10-03  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-02-02  Jonathan Wakely  
+ 
+ 	* src/filesystem/ops-common.h [AVR] (__unsupported): Always use
+ 	errc::function_not_supported instead of errc::not_supported.
+ 
+ 2023-10-02  Tim Song  
+ 
+ 	Backported from master:
+ 	2023-09-28  Tim Song  
+ 
+ 	PR libstdc++/111050
+ 	* include/bits/hashtable_policy.h
+ 	(_Hash_node_value_base<>::_M_valptr(), _Hash_node_value_base<>::_M_v())
+ 	Add [[__gnu__::__always_inline__]].
+ 
+ 2023-09-27  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-08-09  Jonathan Wakely  
+ 
+ 	* include/experimental/bits/fs_path.h (path::string): Use
+ 	_GLIBCXX17_CONSTEXPR not _GLIBCXX_CONSTEXPR for 'if constexpr'.
+ 	* include/std/charconv (__to_chars_8): Initialize variable for
+ 	C++17 constexpr rules.
+ 
+ 2023-09-26  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-09-25  Jonathan Wakely  
+ 
+ 	PR libstdc++/111511
+ 	PR c++/111512
+ 	* include/std/array (to_array): Qualify calls to __to_array.
+ 	* testsuite/23_containers/array/creation/111512.cc: New test.
+ 
+ 2023-09-18  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-09-18  Jonathan Wakely  
+ 
+ 	* doc/xml/manual/configure.xml: Use conventional option name.
+ 	* doc/xml/manual/status_cxx2020.xml: Update.
+ 	* doc/html/*: Regenerate.
+ 
+ 2023-09-14  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-09-14  Jonathan Wakely  
+ 
+ 	PR c++/111357
+ 	* include/bits/utility.h (make_integer_sequence): Add cast.
+ 	* testsuite/20_util/integer_sequence/pr111357.cc: New test.
+ 
+ 2023-07-12  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-07-12  Jonathan Wakely  
+ 
+ 	PR libstdc++/95048
+ 	* testsuite/27_io/filesystem/path/construct/95048.cc: Check
+ 	conversions to wide strings.
+ 	* testsuite/experimental/filesystem/path/construct/95048.cc:
+ 	Likewise.
+ 
+ 2023-07-06  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-07-06  Jonathan Wakely  
+ 
+ 	PR libstdc++/104299
+ 	* doc/xml/manual/configure.xml: Describe stdio_pure argument to
+ 	--enable-cstdio.
+ 	* doc/html/manual/configure.html: Regenerate.
+ 
+ 2023-06-23  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2023-06-01  Jonathan Wakely  
+ 
+ 	* doc/xml/manual/evolution.xml: Document removal of implicit
+ 	allocator rebinding extensions in strict mode and for C++20.
+ 	* doc/html/*: Regenerate.
+ 
+ 2023-06-21  Jason Merrill  
+ 
+ 	PR tree-optimization/105651
+ 	* include/bits/basic_string.tcc (_M_replace): Add an assert
+ 	to avoid -Wrestrict false positive.
+ 
+ 2023-05-30  Alexandre Oliva  
+ 
+ 	Backported from master:
+ 	2023-05-30  Alexandre Oliva  
+ 
+ 	* testsuite/20_util/from_chars/4.cc: Skip long double test06
+ 	on x86_64-vxworks.
+ 	* testsuite/20_util/to_chars/long_double.cc: Xfail run on
+ 	x86_64-vxworks.
+ 
+ 2023-05-30  Alexandre Oliva  
+ 
+ 	Backported from master:
+ 	2023-05-25  Alexandre Oliva  
+ 
+ 	* testsuite/20_util/to_chars/long_double.cc: Expect execution
+ 	fail on x86-vxworks.
+ 
+ 2023-05-30  Alexandre Oliva  
+ 
+ 	Backported from master:
+ 	2023-05-05  Alexandre Oliva  
+ 
+ 	* testsuite/20_util/from_chars/4.cc: Skip long double test06
+ 	on aarch64-vxworks.
+ 	* testsuite/20_util/to_chars/long_double.cc: Xfail run on
+ 	aarch64-vxworks.
+ 
+ 2023-05-30  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-05-30  Matthias Kretz  
+ 
+ 	PR libstdc++/109822
+ 	* include/experimental/bits/simd.h (to_native): Use int NTTP
+ 	as specified in PTS2.
+ 	(to_compatible): Likewise. Add missing tag to call mask
+ 	generator ctor.
+ 	* testsuite/experimental/simd/pr109822_cast_functions.cc: New
+ 	test.
+ 
+ 2023-05-30  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-05-30  Matthias Kretz  
+ 
+ 	* testsuite/experimental/simd/tests/integer_operators.cc:
+ 	Compute expected value differently to avoid getting turned into
+ 	a vector shift.
+ 
+ 2023-05-30  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-05-30  Matthias Kretz  
+ 
+ 	* testsuite/experimental/simd/tests/operator_cvt.cc: Make long
+ 	double <-> (u)long conversion tests conditional on sizeof(long
+ 	double) and sizeof(long).
+ 
+ 2023-05-30  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-05-26  Matthias Kretz  
+ 
+ 	* include/experimental/bits/simd_ppc.h (_S_bit_shift_left):
+ 	Negative __y is UB, so prefer signed compare.
+ 
+ 2023-05-24  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-05-24  Matthias Kretz  
+ 
+ 	PR libstdc++/109949
+ 	* include/experimental/bits/simd.h (__intrinsic_type): If
+ 	__ALTIVEC__ is defined, map gnu::vector_size types to their
+ 	corresponding __vector T types without losing unsignedness of
+ 	integer types. Also prefer long long over long.
+ 	* include/experimental/bits/simd_ppc.h (_S_popcount): Cast mask
+ 	object to the expected unsigned vector type.
+ 
+ 2023-05-24  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-05-24  Matthias Kretz  
+ 
+ 	PR libstdc++/109261
+ 	* include/experimental/bits/simd.h (__intrinsic_type):
+ 	Specialize __intrinsic_type and
+ 	__intrinsic_type in any case, but provide the member
+ 	type only with __aarch64__.
+ 
+ 2023-05-24  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-05-24  Matthias Kretz  
+ 
+ 	PR libstdc++/109261
+ 	* include/experimental/bits/simd_neon.h (_S_reduce): Add
+ 	constexpr and make NEON implementation conditional on
+ 	not __builtin_is_constant_evaluated.
+ 
+ 2023-05-23  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-05-23  Matthias Kretz  
+ 
+ 	PR libstdc++/109261
+ 	* include/experimental/bits/simd.h (_SimdWrapper::_M_set):
+ 	Avoid vector builtin subscripting in constant expressions.
+ 	(resizing_simd_cast): Avoid memcpy if constant_evaluated.
+ 	(const_where_expression, where_expression, where)
+ 	(__extract_part, simd_mask, _SimdIntOperators, simd): Add either
+ 	_GLIBCXX_SIMD_CONSTEXPR (on public APIs), or constexpr (on
+ 	internal APIs).
+ 	* include/experimental/bits/simd_builtin.h (__vector_permute)
+ 	(__vector_shuffle, __extract_part, _GnuTraits::_SimdCastType1)
+ 	(_GnuTraits::_SimdCastType2, _SimdImplBuiltin)
+ 	(_MaskImplBuiltin::_S_store): Add constexpr.
+ 	(_CommonImplBuiltin::_S_store_bool_array)
+ 	(_SimdImplBuiltin::_S_load, _SimdImplBuiltin::_S_store)
+ 	(_SimdImplBuiltin::_S_reduce, _MaskImplBuiltin::_S_load): Add
+ 	constant_evaluated case.
+ 	* include/experimental/bits/simd_fixed_size.h
+ 	(_S_masked_load): Reword comment.
+ 	(__tuple_element_meta, __make_meta, _SimdTuple::_M_apply_r)
+ 	(_SimdTuple::_M_subscript_read, _SimdTuple::_M_subscript_write)
+ 	(__make_simd_tuple, __optimize_simd_tuple, __extract_part)
+ 	(__autocvt_to_simd, _Fixed::__traits::_SimdBase)
+ 	(_Fixed::__traits::_SimdCastType, _SimdImplFixedSize): Add
+ 	constexpr.
+ 	(_SimdTuple::operator[], _M_set): Add constexpr and add
+ 	constant_evaluated case.
+ 	(_MaskImplFixedSize::_S_load): Add constant_evaluated case.
+ 	* include/experimental/bits/simd_scalar.h: Add constexpr.
+ 	* include/experimental/bits/simd_x86.h (_CommonImplX86): Add
+ 	constexpr and add constant_evaluated case.
+ 	(_SimdImplX86::_S_equal_to, _S_not_equal_to, _S_less)
+ 	(_S_less_equal): Value-initialize to satisfy constexpr
+ 	evaluation.
+ 	(_MaskImplX86::_S_load): Add constant_evaluated case.
+ 	(_MaskImplX86::_S_store): Add constexpr and constant_evaluated
+ 	case. Value-initialize local variables.
+ 	(_MaskImplX86::_S_logical_and, _S_logical_or, _S_bit_not)
+ 	(_S_bit_and, _S_bit_or, _S_bit_xor): Add constant_evaluated
+ 	case.
+ 	* testsuite/experimental/simd/pr109261_constexpr_simd.cc: New
+ 	test.
+ 
+ 2023-05-23  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-05-22  Matthias Kretz  
+ 
+ 	* include/experimental/bits/simd_builtin.h (_S_fpclassify): Move
+ 	__infn into #ifdef'ed block.
+ 	* testsuite/experimental/simd/tests/fpclassify.cc: Declare
+ 	constants only when used.
+ 	* testsuite/experimental/simd/tests/frexp.cc: Likewise.
+ 	* testsuite/experimental/simd/tests/logarithm.cc: Likewise.
+ 	* testsuite/experimental/simd/tests/trunc_ceil_floor.cc:
+ 	Likewise.
+ 	* testsuite/experimental/simd/tests/ldexp_scalbn_scalbln_modf.cc:
+ 	Move totest and expect1 into #ifdef'ed block.
+ 
+ 2023-05-23  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-03-28  Matthias Kretz  
+ 
+ 	* include/experimental/bits/simd.h (is_simd_flag_type): New.
+ 	(_IsSimdFlagType): New.
+ 	(copy_from, copy_to, load ctors): Constrain _Flags using
+ 	_IsSimdFlagType.
+ 
+ 2023-05-23  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-03-28  Matthias Kretz  
+ 
+ 	* include/experimental/bits/simd_x86.h (_SimdImplX86): Use
+ 	_Base::_S_divides if the optimized _S_divides function is hidden
+ 	via the preprocessor.
+ 
+ 2023-05-23  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-03-21  Matthias Kretz  
+ 
+ 	* include/experimental/bits/simd_detail.h: Don't declare the
+ 	simd API as constexpr with Clang.
+ 	* include/experimental/bits/simd_x86.h (__movm): New.
+ 	(_S_blend_avx512): Resolve FIXME. Implement blend using __movm
+ 	and ?:.
+ 	(_SimdImplX86::_S_masked_unary): Clang does not implement the
+ 	same builtins. Implement the function using __movm, ?:, and -
+ 	operators on vector_size types instead.
+ 
+ 2023-05-23  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-02-24  Matthias Kretz  
+ 
+ 	* include/experimental/bits/simd.h: Line breaks and indenting
+ 	fixed to follow the libstdc++ standard.
+ 	* include/experimental/bits/simd_builtin.h: Likewise.
+ 	* include/experimental/bits/simd_fixed_size.h: Likewise.
+ 	* include/experimental/bits/simd_neon.h: Likewise.
+ 	* include/experimental/bits/simd_ppc.h: Likewise.
+ 	* include/experimental/bits/simd_scalar.h: Likewise.
+ 	* include/experimental/bits/simd_x86.h: Likewise.
+ 
+ 2023-05-23  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-02-24  Matthias Kretz  
+ 
+ 	PR libstdc++/108030
+ 	* include/experimental/bits/simd_fixed_size.h
+ 	(_SimdImplFixedSize::_S_broadcast): Replace inline with
+ 	_GLIBCXX_SIMD_INTRINSIC.
+ 	(_SimdImplFixedSize::_S_generate): Likewise.
+ 	(_SimdImplFixedSize::_S_load): Likewise.
+ 	(_SimdImplFixedSize::_S_masked_load): Likewise.
+ 	(_SimdImplFixedSize::_S_store): Likewise.
+ 	(_SimdImplFixedSize::_S_masked_store): Likewise.
+ 	(_SimdImplFixedSize::_S_min): Likewise.
+ 	(_SimdImplFixedSize::_S_max): Likewise.
+ 	(_SimdImplFixedSize::_S_complement): Likewise.
+ 	(_SimdImplFixedSize::_S_unary_minus): Likewise.
+ 	(_SimdImplFixedSize::_S_plus): Likewise.
+ 	(_SimdImplFixedSize::_S_minus): Likewise.
+ 	(_SimdImplFixedSize::_S_multiplies): Likewise.
+ 	(_SimdImplFixedSize::_S_divides): Likewise.
+ 	(_SimdImplFixedSize::_S_modulus): Likewise.
+ 	(_SimdImplFixedSize::_S_bit_and): Likewise.
+ 	(_SimdImplFixedSize::_S_bit_or): Likewise.
+ 	(_SimdImplFixedSize::_S_bit_xor): Likewise.
+ 	(_SimdImplFixedSize::_S_bit_shift_left): Likewise.
+ 	(_SimdImplFixedSize::_S_bit_shift_right): Likewise.
+ 	(_SimdImplFixedSize::_S_remquo): Add inline keyword (to be
+ 	explicit about not always-inline, yet).
+ 	(_SimdImplFixedSize::_S_isinf): Likewise.
+ 	(_SimdImplFixedSize::_S_isfinite): Likewise.
+ 	(_SimdImplFixedSize::_S_isnan): Likewise.
+ 	(_SimdImplFixedSize::_S_isnormal): Likewise.
+ 	(_SimdImplFixedSize::_S_signbit): Likewise.
+ 
+ 2023-05-23  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-02-24  Matthias Kretz  
+ 
+ 	PR libstdc++/108856
+ 	* include/experimental/bits/simd_builtin.h
+ 	(_SimdImplBuiltin::_S_masked_unary): More efficient
+ 	implementation of masked inc-/decrement for integers and floats
+ 	without AVX2.
+ 	* include/experimental/bits/simd_x86.h
+ 	(_SimdImplX86::_S_masked_unary): New. Use AVX512 masked subtract
+ 	builtins for masked inc-/decrement.
+ 
+ 2023-05-23  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-02-23  Matthias Kretz  
+ 
+ 	* testsuite/experimental/simd/tests/reductions.cc: Introduce
+ 	max_distance as the type-dependent max error.
+ 
+ 2023-05-23  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-02-23  Matthias Kretz  
+ 
+ 	PR libstdc++/108030
+ 	* include/experimental/bits/simd_detail.h
+ 	(_GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA): Define as empty for
+ 	__clang__.
+ 
+ 2023-05-23  Matthias Kretz  
+ 
+ 	Backported from master:
+ 	2023-02-16  Matthias Kretz  
+ 
+ 	PR libstdc++/108030
+ 	* include/experimental/bits/simd_detail.h: Define
+ 	_GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA.
+ 	* include/experimental/bits/simd.h: Annotate lambdas with
+ 	_GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA.
+ 	* include/experimental/bits/simd_builtin.h: Ditto.
+ 	* include/experimental/bits/simd_converter.h: Ditto.
+ 	* include/experimental/bits/simd_fixed_size.h: Ditto.
+ 	* include/experimental/bits/simd_math.h: Ditto.
+ 	* include/experimental/bits/simd_neon.h: Ditto.
+ 	* include/experimental/bits/simd_x86.h: Ditto.
+ 
+ 2023-05-16  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-11-28  Jonathan Wakely  
+ 
+ 	PR libstdc++/107801
+ 	* src/c++17/memory_resource.cc (chunk::_M_bytes): Change type
+ 	from uint32_t to bitset::size_type. Adjust static assertion.
+ 	(__pool_resource::_Pool::replenish): Cast to size_t after
+ 	multiplication instead of before.
+ 	(__pool_resource::_M_alloc_pools): Ensure both arguments to
+ 	std::max have type size_t.
+ 
+ 2023-05-11  Jonathan Wakely  
+ 
+ 	Backported from master:
+ 	2022-11-16  Jonathan Wakely  
+ 
+ 	* python/libstdcxx/v6/printers.py (StdExpAnyPrinter): Make
+ 	expansion of std::string in manager name more robust.
+ 
  2023-05-08  Release Manager
  
  	* GCC 12.3.0 released.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/acinclude.m4 gcc-12.4.0/libstdc++-v3/acinclude.m4
*** gcc-12.3.0/libstdc++-v3/acinclude.m4	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/acinclude.m4	Thu Jun 20 08:08:10 2024
*************** AC_DEFUN([GLIBCXX_ENABLE_C99], [
*** 978,984 ****
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i");
           }], [],
          [glibcxx_cv_c99_stdio_cxx98=yes], [glibcxx_cv_c99_stdio_cxx98=no])
      ])
--- 978,984 ----
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i", 1);
           }], [],
          [glibcxx_cv_c99_stdio_cxx98=yes], [glibcxx_cv_c99_stdio_cxx98=no])
      ])
*************** AC_DEFUN([GLIBCXX_ENABLE_C99], [
*** 1210,1216 ****
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i");
           }], [],
          [glibcxx_cv_c99_stdio_cxx11=yes], [glibcxx_cv_c99_stdio_cxx11=no])
      ])
--- 1210,1216 ----
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i", 1);
           }], [],
          [glibcxx_cv_c99_stdio_cxx11=yes], [glibcxx_cv_c99_stdio_cxx11=no])
      ])
*************** AC_DEFUN([GLIBCXX_CHECK_C99_TR1], [
*** 1623,1629 ****
    AC_LANG_SAVE
    AC_LANG_CPLUSPLUS
  
!   # Use -std=c++98 because the default (-std=gnu++98) leaves __STRICT_ANSI__
    # undefined and fake C99 facilities may be spuriously enabled.
    ac_save_CXXFLAGS="$CXXFLAGS"
    CXXFLAGS="$CXXFLAGS -std=c++98"
--- 1623,1629 ----
    AC_LANG_SAVE
    AC_LANG_CPLUSPLUS
  
!   # Use -std=c++98 because -std=gnu++98 leaves __STRICT_ANSI__
    # undefined and fake C99 facilities may be spuriously enabled.
    ac_save_CXXFLAGS="$CXXFLAGS"
    CXXFLAGS="$CXXFLAGS -std=c++98"
*************** AC_DEFUN([GLIBCXX_CHECK_C99_TR1], [
*** 1888,1896 ****
  		  lround(0.0);
  		  lroundf(0.0f);
  		  lroundl(0.0l);
! 		  nan(0);
! 		  nanf(0);
! 		  nanl(0);
  		  nearbyint(0.0);
  		  nearbyintf(0.0f);
  		  nearbyintl(0.0l);
--- 1888,1896 ----
  		  lround(0.0);
  		  lroundf(0.0f);
  		  lroundl(0.0l);
! 		  nan("");
! 		  nanf("");
! 		  nanl("");
  		  nearbyint(0.0);
  		  nearbyintf(0.0f);
  		  nearbyintl(0.0l);
*************** dnl
*** 4570,4575 ****
--- 4570,4635 ----
      AC_DEFINE(HAVE_STRUCT_DIRENT_D_TYPE, 1, [Define to 1 if `d_type' is a member of `struct dirent'.])
    fi
  dnl
+   AC_CACHE_CHECK([for chmod], glibcxx_cv_chmod, [dnl
+     GCC_TRY_COMPILE_OR_LINK(
+       [
+        #include 
+       ],
+       [
+        int i = chmod("", S_IRUSR);
+       ],
+       [glibcxx_cv_chmod=yes],
+       [glibcxx_cv_chmod=no])
+   ])
+   if test $glibcxx_cv_chmod = yes; then
+     AC_DEFINE(_GLIBCXX_USE_CHMOD, 1, [Define if usable chmod is available in .])
+   fi
+ dnl
+   AC_CACHE_CHECK([for mkdir], glibcxx_cv_mkdir, [dnl
+     GCC_TRY_COMPILE_OR_LINK(
+       [
+        #include 
+       ],
+       [
+        int i = mkdir("", S_IRUSR);
+       ],
+       [glibcxx_cv_mkdir=yes],
+       [glibcxx_cv_mkdir=no])
+   ])
+   if test $glibcxx_cv_mkdir = yes; then
+     AC_DEFINE(_GLIBCXX_USE_MKDIR, 1, [Define if usable mkdir is available in .])
+   fi
+ dnl
+   AC_CACHE_CHECK([for chdir], glibcxx_cv_chdir, [dnl
+     GCC_TRY_COMPILE_OR_LINK(
+       [
+        #include 
+       ],
+       [
+        int i = chdir("");
+       ],
+       [glibcxx_cv_chdir=yes],
+       [glibcxx_cv_chdir=no])
+   ])
+   if test $glibcxx_cv_chdir = yes; then
+     AC_DEFINE(_GLIBCXX_USE_CHDIR, 1, [Define if usable chdir is available in .])
+   fi
+ dnl
+   AC_CACHE_CHECK([for getcwd], glibcxx_cv_getcwd, [dnl
+     GCC_TRY_COMPILE_OR_LINK(
+       [
+        #include 
+       ],
+       [
+        char* s = getcwd((char*)0, 1);
+       ],
+       [glibcxx_cv_getcwd=yes],
+       [glibcxx_cv_getcwd=no])
+   ])
+   if test $glibcxx_cv_getcwd = yes; then
+     AC_DEFINE(_GLIBCXX_USE_GETCWD, 1, [Define if usable getcwd is available in .])
+   fi
+ dnl
    AC_CACHE_CHECK([for realpath], glibcxx_cv_realpath, [dnl
      GCC_TRY_COMPILE_OR_LINK(
        [
*************** AC_DEFUN([GLIBCXX_ENABLE_BACKTRACE], [
*** 4924,4930 ****
  
    # Most of this is adapted from libsanitizer/configure.ac
  
!   BACKTRACE_CPPFLAGS=
  
    # libbacktrace only needs atomics for int, which we've already tested
    if test "$glibcxx_cv_atomic_int" = "yes"; then
--- 4984,4990 ----
  
    # Most of this is adapted from libsanitizer/configure.ac
  
!   BACKTRACE_CPPFLAGS="-D_GNU_SOURCE"
  
    # libbacktrace only needs atomics for int, which we've already tested
    if test "$glibcxx_cv_atomic_int" = "yes"; then
*************** AC_DEFUN([GLIBCXX_ENABLE_BACKTRACE], [
*** 4952,4959 ****
--- 5012,5022 ----
      have_dl_iterate_phdr=no
    else
      # When built as a GCC target library, we can't do a link test.
+     ac_save_CPPFLAGS="$CPPFLAGS"
+     CPPFLAGS="$CPPFLAGS -D_GNU_SOURCE"
      AC_EGREP_HEADER([dl_iterate_phdr], [link.h], [have_dl_iterate_phdr=yes],
  		    [have_dl_iterate_phdr=no])
+     CPPFLAGS="$ac_save_CPPFLAGS"
    fi
    if test "$have_dl_iterate_phdr" = "yes"; then
      BACKTRACE_CPPFLAGS="$BACKTRACE_CPPFLAGS -DHAVE_DL_ITERATE_PHDR=1"
diff -Nrcpad gcc-12.3.0/libstdc++-v3/config/io/basic_file_stdio.cc gcc-12.4.0/libstdc++-v3/config/io/basic_file_stdio.cc
*** gcc-12.3.0/libstdc++-v3/config/io/basic_file_stdio.cc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/config/io/basic_file_stdio.cc	Thu Jun 20 08:08:10 2024
*************** namespace
*** 128,134 ****
      for (;;)
        {
  #ifdef _GLIBCXX_USE_STDIO_PURE
! 	const std::streamsize __ret = fwrite(__file, 1, __nleft, __file);
  #else
  	const std::streamsize __ret = write(__fd, __s, __nleft);
  #endif
--- 128,134 ----
      for (;;)
        {
  #ifdef _GLIBCXX_USE_STDIO_PURE
! 	const std::streamsize __ret = fwrite(__s, 1, __nleft, __file);
  #else
  	const std::streamsize __ret = write(__fd, __s, __nleft);
  #endif
diff -Nrcpad gcc-12.3.0/libstdc++-v3/config/os/bsd/darwin/os_defines.h gcc-12.4.0/libstdc++-v3/config/os/bsd/darwin/os_defines.h
*** gcc-12.3.0/libstdc++-v3/config/os/bsd/darwin/os_defines.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/config/os/bsd/darwin/os_defines.h	Thu Jun 20 08:08:10 2024
***************
*** 39,46 ****
  // -flat_namespace to work around the way that it doesn't.
  #define _GLIBCXX_WEAK_DEFINITION __attribute__ ((weak))
  
! // Static initializer macro is buggy in darwin, see libstdc++/51906
  #define _GTHREAD_USE_RECURSIVE_MUTEX_INIT_FUNC
  
  // Configure checks for nanosleep fail on Darwin, but nanosleep and
  // sched_yield are always available, so use them.
--- 39,50 ----
  // -flat_namespace to work around the way that it doesn't.
  #define _GLIBCXX_WEAK_DEFINITION __attribute__ ((weak))
  
! #if defined (__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__) \
!      && (__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ < 1080)
! // Static initializer macro is absent for Darwin < 11 and buggy in Darwin 11,
! // see libstdc++/51906.  Fixed in Darwin 12 (OS X 10.8).
  #define _GTHREAD_USE_RECURSIVE_MUTEX_INIT_FUNC
+ #endif
  
  // Configure checks for nanosleep fail on Darwin, but nanosleep and
  // sched_yield are always available, so use them.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/config.h.in gcc-12.4.0/libstdc++-v3/config.h.in
*** gcc-12.3.0/libstdc++-v3/config.h.in	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/config.h.in	Thu Jun 20 08:08:10 2024
***************
*** 933,938 ****
--- 933,944 ----
     namespace std::tr1. */
  #undef _GLIBCXX_USE_C99_STDINT_TR1
  
+ /* Define if usable chdir is available in . */
+ #undef _GLIBCXX_USE_CHDIR
+ 
+ /* Define if usable chmod is available in . */
+ #undef _GLIBCXX_USE_CHMOD
+ 
  /* Defined if clock_gettime syscall has monotonic and realtime clock support.
     */
  #undef _GLIBCXX_USE_CLOCK_GETTIME_SYSCALL
***************
*** 957,962 ****
--- 963,971 ----
  /* Define if fchmodat is available in . */
  #undef _GLIBCXX_USE_FCHMODAT
  
+ /* Define if usable getcwd is available in . */
+ #undef _GLIBCXX_USE_GETCWD
+ 
  /* Defined if gettimeofday is available. */
  #undef _GLIBCXX_USE_GETTIMEOFDAY
  
***************
*** 972,977 ****
--- 981,989 ----
  /* Define if lstat is available in . */
  #undef _GLIBCXX_USE_LSTAT
  
+ /* Define if usable mkdir is available in . */
+ #undef _GLIBCXX_USE_MKDIR
+ 
  /* Defined if nanosleep is available. */
  #undef _GLIBCXX_USE_NANOSLEEP
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/configure gcc-12.4.0/libstdc++-v3/configure
*** gcc-12.3.0/libstdc++-v3/configure	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/configure	Thu Jun 20 08:08:10 2024
*************** GLIBCXX_HOSTED_TRUE
*** 786,791 ****
--- 786,793 ----
  glibcxx_compiler_shared_flag
  glibcxx_compiler_pic_flag
  glibcxx_lt_pic_flag
+ OS_IS_DARWIN_FALSE
+ OS_IS_DARWIN_TRUE
  enable_static
  enable_shared
  lt_host_flags
*************** else
*** 12191,12197 ****
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 12194 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
--- 12193,12199 ----
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 12196 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
*************** else
*** 12297,12303 ****
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 12300 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
--- 12299,12305 ----
    lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
    lt_status=$lt_dlunknown
    cat > conftest.$ac_ext <<_LT_EOF
! #line 12302 "configure"
  #include "confdefs.h"
  
  #if HAVE_DLFCN_H
*************** esac
*** 15579,15584 ****
--- 15581,15600 ----
  
  
  
+ os_is_darwin=no
+ case ${host_os} in
+   darwin*) os_is_darwin=yes ;;
+   *) ;;
+ esac
+  if test x${os_is_darwin} = xyes; then
+   OS_IS_DARWIN_TRUE=
+   OS_IS_DARWIN_FALSE='#'
+ else
+   OS_IS_DARWIN_TRUE='#'
+   OS_IS_DARWIN_FALSE=
+ fi
+ 
+ 
  if test "$enable_vtable_verify" = yes; then
    predep_objects_CXX="${predep_objects_CXX} ${glibcxx_builddir}/../libgcc/vtv_start.o"
    postdep_objects_CXX="${postdep_objects_CXX} ${glibcxx_builddir}/../libgcc/vtv_end.o"
*************** $as_echo "$glibcxx_cv_atomic_long_long"
*** 15981,15987 ****
    # Fake what AC_TRY_COMPILE does.
  
      cat > conftest.$ac_ext << EOF
! #line 15984 "configure"
  int main()
  {
    typedef bool atomic_type;
--- 15997,16003 ----
    # Fake what AC_TRY_COMPILE does.
  
      cat > conftest.$ac_ext << EOF
! #line 16000 "configure"
  int main()
  {
    typedef bool atomic_type;
*************** $as_echo "$glibcxx_cv_atomic_bool" >&6;
*** 16016,16022 ****
      rm -f conftest*
  
      cat > conftest.$ac_ext << EOF
! #line 16019 "configure"
  int main()
  {
    typedef short atomic_type;
--- 16032,16038 ----
      rm -f conftest*
  
      cat > conftest.$ac_ext << EOF
! #line 16035 "configure"
  int main()
  {
    typedef short atomic_type;
*************** $as_echo "$glibcxx_cv_atomic_short" >&6;
*** 16051,16057 ****
      rm -f conftest*
  
      cat > conftest.$ac_ext << EOF
! #line 16054 "configure"
  int main()
  {
    // NB: _Atomic_word not necessarily int.
--- 16067,16073 ----
      rm -f conftest*
  
      cat > conftest.$ac_ext << EOF
! #line 16070 "configure"
  int main()
  {
    // NB: _Atomic_word not necessarily int.
*************** $as_echo "$glibcxx_cv_atomic_int" >&6; }
*** 16087,16093 ****
      rm -f conftest*
  
      cat > conftest.$ac_ext << EOF
! #line 16090 "configure"
  int main()
  {
    typedef long long atomic_type;
--- 16103,16109 ----
      rm -f conftest*
  
      cat > conftest.$ac_ext << EOF
! #line 16106 "configure"
  int main()
  {
    typedef long long atomic_type;
*************** $as_echo "mutex" >&6; }
*** 16243,16249 ****
    # unnecessary for this test.
  
      cat > conftest.$ac_ext << EOF
! #line 16246 "configure"
  int main()
  {
    _Decimal32 d1;
--- 16259,16265 ----
    # unnecessary for this test.
  
      cat > conftest.$ac_ext << EOF
! #line 16262 "configure"
  int main()
  {
    _Decimal32 d1;
*************** ac_compiler_gnu=$ac_cv_cxx_compiler_gnu
*** 16285,16291 ****
    # unnecessary for this test.
  
    cat > conftest.$ac_ext << EOF
! #line 16288 "configure"
  template
    struct same
    { typedef T2 type; };
--- 16301,16307 ----
    # unnecessary for this test.
  
    cat > conftest.$ac_ext << EOF
! #line 16304 "configure"
  template
    struct same
    { typedef T2 type; };
*************** else
*** 17573,17579 ****
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i");
           }
  int
  main ()
--- 17589,17595 ----
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i", 1);
           }
  int
  main ()
*************** cat confdefs.h - <<_ACEOF >conftest.$ac_
*** 17604,17610 ****
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i");
           }
  int
  main ()
--- 17620,17626 ----
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i", 1);
           }
  int
  main ()
*************** else
*** 18249,18255 ****
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i");
           }
  int
  main ()
--- 18265,18271 ----
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i", 1);
           }
  int
  main ()
*************** cat confdefs.h - <<_ACEOF >conftest.$ac_
*** 18280,18286 ****
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i");
           }
  int
  main ()
--- 18296,18302 ----
             vscanf("%i", args);
             vsnprintf(fmt, 0, "%i", args);
             vsscanf(fmt, "%i", args);
!            snprintf(fmt, 0, "%i", 1);
           }
  int
  main ()
*************** ac_link='$CXX -o conftest$ac_exeext $CXX
*** 19695,19701 ****
  ac_compiler_gnu=$ac_cv_cxx_compiler_gnu
  
  
!   # Use -std=c++98 because the default (-std=gnu++98) leaves __STRICT_ANSI__
    # undefined and fake C99 facilities may be spuriously enabled.
    ac_save_CXXFLAGS="$CXXFLAGS"
    CXXFLAGS="$CXXFLAGS -std=c++98"
--- 19711,19717 ----
  ac_compiler_gnu=$ac_cv_cxx_compiler_gnu
  
  
!   # Use -std=c++98 because -std=gnu++98 leaves __STRICT_ANSI__
    # undefined and fake C99 facilities may be spuriously enabled.
    ac_save_CXXFLAGS="$CXXFLAGS"
    CXXFLAGS="$CXXFLAGS -std=c++98"
*************** typedef double_t  my_double_t;
*** 20070,20078 ****
  		  lround(0.0);
  		  lroundf(0.0f);
  		  lroundl(0.0l);
! 		  nan(0);
! 		  nanf(0);
! 		  nanl(0);
  		  nearbyint(0.0);
  		  nearbyintf(0.0f);
  		  nearbyintl(0.0l);
--- 20086,20094 ----
  		  lround(0.0);
  		  lroundf(0.0f);
  		  lroundl(0.0l);
! 		  nan("");
! 		  nanf("");
! 		  nanl("");
  		  nearbyint(0.0);
  		  nearbyintf(0.0f);
  		  nearbyintl(0.0l);
*************** $as_echo "$glibcxx_cv_dirent_d_type" >&6
*** 76337,76342 ****
--- 76353,76610 ----
  $as_echo "#define HAVE_STRUCT_DIRENT_D_TYPE 1" >>confdefs.h
  
    fi
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking for chmod" >&5
+ $as_echo_n "checking for chmod... " >&6; }
+ if ${glibcxx_cv_chmod+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+       if test x$gcc_no_link = xyes; then
+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include 
+ 
+ int
+ main ()
+ {
+ 
+        int i = chmod("", S_IRUSR);
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_compile "$LINENO"; then :
+   glibcxx_cv_chmod=yes
+ else
+   glibcxx_cv_chmod=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+ else
+   if test x$gcc_no_link = xyes; then
+   as_fn_error $? "Link tests are not allowed after GCC_NO_EXECUTABLES." "$LINENO" 5
+ fi
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include 
+ 
+ int
+ main ()
+ {
+ 
+        int i = chmod("", S_IRUSR);
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_link "$LINENO"; then :
+   glibcxx_cv_chmod=yes
+ else
+   glibcxx_cv_chmod=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+ fi
+ 
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $glibcxx_cv_chmod" >&5
+ $as_echo "$glibcxx_cv_chmod" >&6; }
+   if test $glibcxx_cv_chmod = yes; then
+ 
+ $as_echo "#define _GLIBCXX_USE_CHMOD 1" >>confdefs.h
+ 
+   fi
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking for mkdir" >&5
+ $as_echo_n "checking for mkdir... " >&6; }
+ if ${glibcxx_cv_mkdir+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+       if test x$gcc_no_link = xyes; then
+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include 
+ 
+ int
+ main ()
+ {
+ 
+        int i = mkdir("", S_IRUSR);
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_compile "$LINENO"; then :
+   glibcxx_cv_mkdir=yes
+ else
+   glibcxx_cv_mkdir=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+ else
+   if test x$gcc_no_link = xyes; then
+   as_fn_error $? "Link tests are not allowed after GCC_NO_EXECUTABLES." "$LINENO" 5
+ fi
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include 
+ 
+ int
+ main ()
+ {
+ 
+        int i = mkdir("", S_IRUSR);
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_link "$LINENO"; then :
+   glibcxx_cv_mkdir=yes
+ else
+   glibcxx_cv_mkdir=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+ fi
+ 
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $glibcxx_cv_mkdir" >&5
+ $as_echo "$glibcxx_cv_mkdir" >&6; }
+   if test $glibcxx_cv_mkdir = yes; then
+ 
+ $as_echo "#define _GLIBCXX_USE_MKDIR 1" >>confdefs.h
+ 
+   fi
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking for chdir" >&5
+ $as_echo_n "checking for chdir... " >&6; }
+ if ${glibcxx_cv_chdir+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+       if test x$gcc_no_link = xyes; then
+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include 
+ 
+ int
+ main ()
+ {
+ 
+        int i = chdir("");
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_compile "$LINENO"; then :
+   glibcxx_cv_chdir=yes
+ else
+   glibcxx_cv_chdir=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+ else
+   if test x$gcc_no_link = xyes; then
+   as_fn_error $? "Link tests are not allowed after GCC_NO_EXECUTABLES." "$LINENO" 5
+ fi
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include 
+ 
+ int
+ main ()
+ {
+ 
+        int i = chdir("");
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_link "$LINENO"; then :
+   glibcxx_cv_chdir=yes
+ else
+   glibcxx_cv_chdir=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+ fi
+ 
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $glibcxx_cv_chdir" >&5
+ $as_echo "$glibcxx_cv_chdir" >&6; }
+   if test $glibcxx_cv_chdir = yes; then
+ 
+ $as_echo "#define _GLIBCXX_USE_CHDIR 1" >>confdefs.h
+ 
+   fi
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking for getcwd" >&5
+ $as_echo_n "checking for getcwd... " >&6; }
+ if ${glibcxx_cv_getcwd+:} false; then :
+   $as_echo_n "(cached) " >&6
+ else
+       if test x$gcc_no_link = xyes; then
+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include 
+ 
+ int
+ main ()
+ {
+ 
+        char* s = getcwd((char*)0, 1);
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_compile "$LINENO"; then :
+   glibcxx_cv_getcwd=yes
+ else
+   glibcxx_cv_getcwd=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+ else
+   if test x$gcc_no_link = xyes; then
+   as_fn_error $? "Link tests are not allowed after GCC_NO_EXECUTABLES." "$LINENO" 5
+ fi
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+        #include 
+ 
+ int
+ main ()
+ {
+ 
+        char* s = getcwd((char*)0, 1);
+ 
+   ;
+   return 0;
+ }
+ _ACEOF
+ if ac_fn_cxx_try_link "$LINENO"; then :
+   glibcxx_cv_getcwd=yes
+ else
+   glibcxx_cv_getcwd=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+ fi
+ 
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $glibcxx_cv_getcwd" >&5
+ $as_echo "$glibcxx_cv_getcwd" >&6; }
+   if test $glibcxx_cv_getcwd = yes; then
+ 
+ $as_echo "#define _GLIBCXX_USE_GETCWD 1" >>confdefs.h
+ 
+   fi
    { $as_echo "$as_me:${as_lineno-$LINENO}: checking for realpath" >&5
  $as_echo_n "checking for realpath... " >&6; }
  if ${glibcxx_cv_realpath+:} false; then :
*************** fi
*** 77316,77322 ****
  
    # Most of this is adapted from libsanitizer/configure.ac
  
!   BACKTRACE_CPPFLAGS=
  
    # libbacktrace only needs atomics for int, which we've already tested
    if test "$glibcxx_cv_atomic_int" = "yes"; then
--- 77584,77590 ----
  
    # Most of this is adapted from libsanitizer/configure.ac
  
!   BACKTRACE_CPPFLAGS="-D_GNU_SOURCE"
  
    # libbacktrace only needs atomics for int, which we've already tested
    if test "$glibcxx_cv_atomic_int" = "yes"; then
*************** done
*** 77399,77404 ****
--- 77667,77674 ----
      have_dl_iterate_phdr=no
    else
      # When built as a GCC target library, we can't do a link test.
+     ac_save_CPPFLAGS="$CPPFLAGS"
+     CPPFLAGS="$CPPFLAGS -D_GNU_SOURCE"
      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
  /* end confdefs.h.  */
  #include 
*************** else
*** 77412,77417 ****
--- 77682,77688 ----
  fi
  rm -f conftest*
  
+     CPPFLAGS="$ac_save_CPPFLAGS"
    fi
    if test "$have_dl_iterate_phdr" = "yes"; then
      BACKTRACE_CPPFLAGS="$BACKTRACE_CPPFLAGS -DHAVE_DL_ITERATE_PHDR=1"
*************** if test -z "${MAINTAINER_MODE_TRUE}" &&
*** 79038,79043 ****
--- 79309,79318 ----
    as_fn_error $? "conditional \"MAINTAINER_MODE\" was never defined.
  Usually this means the macro was only invoked conditionally." "$LINENO" 5
  fi
+ if test -z "${OS_IS_DARWIN_TRUE}" && test -z "${OS_IS_DARWIN_FALSE}"; then
+   as_fn_error $? "conditional \"OS_IS_DARWIN\" was never defined.
+ Usually this means the macro was only invoked conditionally." "$LINENO" 5
+ fi
  if test -z "${GLIBCXX_HOSTED_TRUE}" && test -z "${GLIBCXX_HOSTED_FALSE}"; then
    as_fn_error $? "conditional \"GLIBCXX_HOSTED\" was never defined.
  Usually this means the macro was only invoked conditionally." "$LINENO" 5
diff -Nrcpad gcc-12.3.0/libstdc++-v3/configure.ac gcc-12.4.0/libstdc++-v3/configure.ac
*** gcc-12.3.0/libstdc++-v3/configure.ac	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/configure.ac	Thu Jun 20 08:08:10 2024
*************** ACX_LT_HOST_FLAGS
*** 100,105 ****
--- 100,112 ----
  AC_SUBST(enable_shared)
  AC_SUBST(enable_static)
  
+ os_is_darwin=no
+ case ${host_os} in
+   darwin*) os_is_darwin=yes ;;
+   *) ;;
+ esac
+ AM_CONDITIONAL([OS_IS_DARWIN], [test x${os_is_darwin} = xyes])
+ 
  if test "$enable_vtable_verify" = yes; then
    predep_objects_CXX="${predep_objects_CXX} ${glibcxx_builddir}/../libgcc/vtv_start.o"
    postdep_objects_CXX="${postdep_objects_CXX} ${glibcxx_builddir}/../libgcc/vtv_end.o"
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/doxygen/user.cfg.in gcc-12.4.0/libstdc++-v3/doc/doxygen/user.cfg.in
*** gcc-12.3.0/libstdc++-v3/doc/doxygen/user.cfg.in	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/doxygen/user.cfg.in	Thu Jun 20 08:08:10 2024
*************** DISTRIBUTE_GROUP_DOC   = YES
*** 388,394 ****
  # is disabled and one has to add nested compounds explicitly via \ingroup.
  # The default value is: NO.
  
! GROUP_NESTED_COMPOUNDS = YES
  
  # Set the SUBGROUPING tag to YES to allow class member groups of the same type
  # (for instance a group of public functions) to be put as a subgroup of that
--- 388,394 ----
  # is disabled and one has to add nested compounds explicitly via \ingroup.
  # The default value is: NO.
  
! GROUP_NESTED_COMPOUNDS = NO
  
  # Set the SUBGROUPING tag to YES to allow class member groups of the same type
  # (for instance a group of public functions) to be put as a subgroup of that
*************** INCLUDE_FILE_PATTERNS  =
*** 2326,2331 ****
--- 2326,2332 ----
  PREDEFINED             = __cplusplus=202002L \
                           __GTHREADS \
                           _GLIBCXX_HAS_GTHREADS \
+                          _GTHREAD_USE_MUTEX_TIMEDLOCK \
                           _GLIBCXX_HAVE_TLS \
                           _GLIBCXX_INCLUDE_AS_CXX11 \
                           "_GLIBCXX_PURE= " \
*************** PREDEFINED             = __cplusplus=202
*** 2348,2353 ****
--- 2349,2356 ----
                           "_GLIBCXX_END_NAMESPACE_CONTAINER= " \
                           "_GLIBCXX_END_NAMESPACE_CXX11= " \
                           "_GLIBCXX_END_NAMESPACE_LDBL= " \
+ 			 "-D_GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(X)= " \
+ 			 "-D_GLIBCXX_END_INLINE_ABI_NAMESPACE(X)= " \
                           "_GLIBCXX_TEMPLATE_ARGS=...  " \
                           "_GLIBCXX_DEPRECATED= " \
                           "_GLIBCXX_DEPRECATED_SUGGEST(E)= " \
*************** PREDEFINED             = __cplusplus=202
*** 2387,2392 ****
--- 2390,2396 ----
                           _GLIBCXX14_CONSTEXPR=constexpr \
                           _GLIBCXX17_CONSTEXPR=constexpr \
                           _GLIBCXX20_CONSTEXPR=constexpr \
+                          _GLIBCXX23_CONSTEXPR=constexpr \
                           "_GLIBCXX11_DEPRECATED= " \
                           "_GLIBCXX11_DEPRECATED_SUGGEST(E)= " \
                           "_GLIBCXX17_DEPRECATED= " \
*************** PREDEFINED             = __cplusplus=202
*** 2403,2408 ****
--- 2407,2414 ----
                           _GLIBCXX_HAVE_BUILTIN_IS_AGGREGATE \
                           _GLIBCXX_HAVE_IS_CONSTANT_EVALUATED \
                           _GLIBCXX_HAVE_BUILTIN_LAUNDER \
+ 			 "_GLIBCXX_DOXYGEN_ONLY(X)=X " \
+ 			 __allocator_base=std::__new_allocator \
  
  # If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then this
  # tag can be used to specify a list of macro names that should be expanded. The
*************** EXTERNAL_PAGES         = YES
*** 2473,2487 ****
  # Configuration options related to the dot tool
  #---------------------------------------------------------------------------
  
- # If the CLASS_DIAGRAMS tag is set to YES, doxygen will generate a class diagram
- # (in HTML and LaTeX) for classes with base or super classes. Setting the tag to
- # NO turns the diagrams off. Note that this option also works with HAVE_DOT
- # disabled, but it is recommended to install and use dot, since it yields more
- # powerful graphs.
- # The default value is: YES.
- 
- CLASS_DIAGRAMS         = YES
- 
  # You can include diagrams made with dia in doxygen documentation. Doxygen will
  # then run dia to produce the diagram and insert it in the documentation. The
  # DIA_PATH tag allows you to specify the directory where the dia binary resides.
--- 2479,2484 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/html/manual/api.html gcc-12.4.0/libstdc++-v3/doc/html/manual/api.html
*** gcc-12.3.0/libstdc++-v3/doc/html/manual/api.html	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/html/manual/api.html	Thu Jun 20 08:08:10 2024
*************** Calling a std::bind--enable-symvers=gnu-versioned-namespace
    configuration, the shared library SONAME has been changed to
    libstdc++.so.8.
+ 

+   The extension allowing containers to be instantiated with an allocator
+   that doesn't match the container's value type is no longer allowed in
+   strict (-std=c++NN) modes, only in
+   -std=gnu++NN modes.

9

C++17 header <memory_resource> *************** Calling a std::bind<stop_token> added. +

+ The extension allowing containers to be instantiated with an allocator + that doesn't match the container's value type is no longer allowed in + C++20 mode, even in non-strict -std=gnu++20 mode.

11

The --enable-cheaders=c_std configuration was deprecated. diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/html/manual/appendix_contributing.html gcc-12.4.0/libstdc++-v3/doc/html/manual/appendix_contributing.html *** gcc-12.3.0/libstdc++-v3/doc/html/manual/appendix_contributing.html Mon May 8 12:14:42 2023 --- gcc-12.4.0/libstdc++-v3/doc/html/manual/appendix_contributing.html Thu Jun 20 08:08:10 2024 *************** *** 10,16 ****

Table of Contents

Contributor Checklist
Reading
Assignment
Getting Sources
Submitting Patches
Directory Layout and Source Conventions
Coding Style
Bad Identifiers
By Example
Design Notes

The GNU C++ Library is part of GCC and follows the same development model, so the general rules for ! contributing to GCC apply. Active contributors are assigned maintainership responsibility, and given write access to the source repository. First-time contributors --- 10,16 ----

Table of Contents

Contributor Checklist
Reading
Assignment
Getting Sources
Submitting Patches
Directory Layout and Source Conventions
Coding Style
Bad Identifiers
By Example
Design Notes

The GNU C++ Library is part of GCC and follows the same development model, so the general rules for ! contributing to GCC apply. Active contributors are assigned maintainership responsibility, and given write access to the source repository. First-time contributors *************** *** 34,40 **** http://www.open-std.org/jtc1/sc22/wg21

  • Peruse ! the GNU Coding Standards, and chuckle when you hit the part about “Using Languages Other Than Câ€.

  • --- 34,40 ---- http://www.open-std.org/jtc1/sc22/wg21

  • Peruse ! the GNU Coding Standards, and chuckle when you hit the part about “Using Languages Other Than Câ€.

  • *************** *** 46,52 **** library-specific information found in Porting and Maintenance.

    • Assignment

    ! See the legal prerequisites for all GCC contributions.

    Historically, the libstdc++ assignment form added the following question: --- 46,52 ---- library-specific information found in Porting and Maintenance.

    Assignment

    ! See the legal prerequisites for all GCC contributions.

    Historically, the libstdc++ assignment form added the following question: *************** *** 79,97 **** bug. For new features a description of the feature and your implementation.

  • ! A ChangeLog entry as plain text; see the various ! ChangeLog files for format and content. If you are ! using emacs as your editor, simply position the insertion ! point at the beginning of your change and hit CX-4a to bring ! up the appropriate ChangeLog entry. See--magic! Similar ! functionality also exists for vi.

  • A testsuite submission or sample program that will easily and simply show the existing error or test new functionality.

  • The patch itself. If you are using the Git repository use ! git diff or git format-patch to produce a patch; otherwise, use diff -cp OLD NEW. If your version of diff does not support these options, then get the --- 79,97 ---- bug. For new features a description of the feature and your implementation.

  • ! A ChangeLog entry as part of the Git commit message. Check ! some recent commits for format and content. The ! contrib/mklog.py script can be used to ! generate a ChangeLog template for commit messages. See ! Read-write Git access ! for scripts and aliases that are useful here.

  • A testsuite submission or sample program that will easily and simply show the existing error or test new functionality.

  • The patch itself. If you are using the Git repository use ! git show or git format-patch to produce a patch; otherwise, use diff -cp OLD NEW. If your version of diff does not support these options, then get the *************** *** 102,107 **** --- 102,109 ---- patches and related discussion should be sent to the libstdc++ mailing list. In common with the rest of GCC, patches should also be sent to the gcc-patches mailing list. + So you could send your email To:libstdc++@gcc.gnu.org and + Cc:gcc-patches@gcc.gnu.org for example.

    • Prev Up Next
    Part IV.  Appendices  Home Directory Layout and Source Conventions
    \ No newline at end of file diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/html/manual/configure.html gcc-12.4.0/libstdc++-v3/doc/html/manual/configure.html *** gcc-12.3.0/libstdc++-v3/doc/html/manual/configure.html Mon May 8 12:14:42 2023 --- gcc-12.4.0/libstdc++-v3/doc/html/manual/configure.html Thu Jun 20 08:08:10 2024 *************** *** 38,46 **** 

         --with-gxx-include-dir=/foo/H-x86-gcc-3-c-gxx-inc/include/4.4-20090404
    --enable-cstdio

    This is an abbreviated form of '--enable-cstdio=stdio' (described next). !

    --enable-cstdio=OPTION

    Select a target-specific I/O package. At the moment, the only ! choice is to use 'stdio', a generic "C" abstraction. ! The default is 'stdio'. This option can change the library ABI.

    --enable-clocale

    This is an abbreviated form of '--enable-clocale=generic' (described next).

    --enable-clocale=OPTION

    Select a target-specific underlying locale package. The --- 38,51 ---- 

         --with-gxx-include-dir=/foo/H-x86-gcc-3-c-gxx-inc/include/4.4-20090404
    --enable-cstdio

    This is an abbreviated form of '--enable-cstdio=stdio' (described next). !

    --enable-cstdio=OPTION

    Select a target-specific I/O package. The choices are 'stdio' ! which is a generic abstraction using POSIX file I/O APIs ! (read, write, ! lseek, etc.), and 'stdio_pure' which is similar ! but only uses standard C file I/O APIs (fread, ! fwrite, fseek, etc.). ! The 'stdio_posix' choice is a synonym for 'stdio'. ! The default is 'stdio'. This option can change the library ABI.

    --enable-clocale

    This is an abbreviated form of '--enable-clocale=generic' (described next).

    --enable-clocale=OPTION

    Select a target-specific underlying locale package. The *************** *** 203,210 **** C++ includes. If enabled (as by default), and the compiler seems capable of passing the simple sanity checks thrown at it, try to build stdc++.h.gch as part of the make process. ! In addition, this generated file is used later on (by appending ! --include bits/stdc++.h to CXXFLAGS) when running the testsuite.

    --enable-extern-template[default]

    Use extern template to pre-instantiate all required specializations for certain types defined in the standard libraries. --- 208,215 ---- C++ includes. If enabled (as by default), and the compiler seems capable of passing the simple sanity checks thrown at it, try to build stdc++.h.gch as part of the make process. ! In addition, this generated file is used later on (by appending ! -include bits/stdc++.h to CXXFLAGS) when running the testsuite.

    --enable-extern-template[default]

    Use extern template to pre-instantiate all required specializations for certain types defined in the standard libraries. diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/html/manual/source_code_style.html gcc-12.4.0/libstdc++-v3/doc/html/manual/source_code_style.html *** gcc-12.3.0/libstdc++-v3/doc/html/manual/source_code_style.html Mon May 8 12:14:42 2023 --- gcc-12.4.0/libstdc++-v3/doc/html/manual/source_code_style.html Thu Jun 20 08:08:10 2024 *************** *** 197,209 ****       it is intended to precede the recommendations of the GNU Coding
          Standard, which can be referenced in full here:

    !       http://www.gnu.org/prep/standards/standards.html#Formatting

          The rest of this is also interesting reading, but skip the "Design
          Advice" part.

          The GCC coding conventions are here, and are also useful:
    !       http://gcc.gnu.org/codingconventions.html

          In addition, because it doesn't seem to be stated explicitly anywhere
          else, there is an 80 column source limit.
    --- 197,209 ----       it is intended to precede the recommendations of the GNU Coding
          Standard, which can be referenced in full here:

    !       https://www.gnu.org/prep/standards/standards.html#Formatting

          The rest of this is also interesting reading, but skip the "Design
          Advice" part.

          The GCC coding conventions are here, and are also useful:
    !       https://gcc.gnu.org/codingconventions.html

          In addition, because it doesn't seem to be stated explicitly anywhere
          else, there is an 80 column source limit.
    diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/html/manual/status.html gcc-12.4.0/libstdc++-v3/doc/html/manual/status.html *** gcc-12.3.0/libstdc++-v3/doc/html/manual/status.html Mon May 8 12:14:42 2023 --- gcc-12.4.0/libstdc++-v3/doc/html/manual/status.html Thu Jun 20 08:08:10 2024 *************** not in any particular release. *** 217,223 **** 30 Thread support ! 30.1GeneralY 30.2RequirementsY 30.3Threads  30.3.1Class threadPartialthread::id comparisons not well-defined30.3.2Namespace this_threadY 30.4Mutual exclusion  30.4.1Mutex requirements  30.4.1.1In general  30.4.1.2Mutex types  30.4.1.2.1Class mutexY 30.4.1.2.2Class recursive_mutexY 30.4.1.3Timed mutex types  30.4.1.3.1Class timed_mutexY 30.4.1.3.2Class recursive_timed_mutexY 30.4.2Locks  30.4.2.1Class template lock_guardY 30.4.2.2Class template unique_lockY 30.4.3Generic locking algorithmsY 30.4.4Call once  30.4.4.1Struct once_flagY 30.4.4.2Function call_onceYException support is broken on non-Linux targets. See PR 66146. 30.5Condition variablesY 30.5.1Class condition_variableY 30.5.2Class condition_variable_anyY 30.6Futures  30.6.1Overview  30.6.2Error handlingY 30.6.3Class future_errorY 30.6.4Shared stateY 30.6.5Class template promiseY 30.6.6Class template futureY 30.6.7Class template shared_futureY 30.6.8Function template asyncY 30.6.9Class template packaged_taskY  --- 217,223 ---- 30 Thread support ! 30.1GeneralY 30.2RequirementsY 30.3Threads  30.3.1Class threadPartialthread::id comparisons not well-defined30.3.2Namespace this_threadY 30.4Mutual exclusion  30.4.1Mutex requirements  30.4.1.1In general  30.4.1.2Mutex types  30.4.1.2.1Class mutexY 30.4.1.2.2Class recursive_mutexY 30.4.1.3Timed mutex types  30.4.1.3.1Class timed_mutexY 30.4.1.3.2Class recursive_timed_mutexY 30.4.2Locks  30.4.2.1Class template lock_guardY 30.4.2.2Class template unique_lockY 30.4.3Generic locking algorithmsY 30.4.4Call once  30.4.4.1Struct once_flagY 30.4.4.2Function call_onceYException support is broken. See PR 66146. 30.5Condition variablesY 30.5.1Class condition_variableY 30.5.2Class condition_variable_anyY 30.6Futures  30.6.1Overview  30.6.2Error handlingY 30.6.3Class future_errorY 30.6.4Shared stateY 30.6.5Class template promiseY 30.6.6Class template futureY 30.6.7Class template shared_futureY 30.6.8Function template asyncY 30.6.9Class template packaged_taskY  *************** not in any particular release. *** 490,496 **** 30 Thread support ! 30.1GeneralY 30.2RequirementsY 30.3Threads  30.3.1Class threadPartialthread::id comparisons not well-defined30.3.2Namespace this_threadY 30.4Mutual exclusion  30.4.1Mutex requirements  30.4.1.1In general  30.4.1.2Mutex types  30.4.1.2.1Class mutexY 30.4.1.2.2Class recursive_mutexY 30.4.1.3Timed mutex types  30.4.1.3.1Class timed_mutexY 30.4.1.3.2Class recursive_timed_mutexY 30.4.1.4Shared timed mutex types  30.4.1.4.1Class shared_timed_mutexY 30.4.2Locks  30.4.2.1Class template lock_guardY 30.4.2.2Class template unique_lockY 30.4.2.3Class template shared_lockY 30.4.3Generic locking algorithmsY 30.4.4Call once  30.4.4.1Struct once_flagY 30.4.4.2Function call_onceBrokenException support is broken on non-Linux targets. See PR 66146. 30.5Condition variablesY 30.5.1Class condition_variableY 30.5.2Class condition_variable_anyY 30.6Futures  30.6.1Overview  30.6.2Error handlingY 30.6.3Class future_errorY 30.6.4Shared stateY 30.6.5Class template promiseY 30.6.6Class template futureY 30.6.7Class template shared_futureY 30.6.8Function template asyncY 30.6.9Class template packaged_taskY  --- 490,496 ---- 30 Thread support ! 30.1GeneralY 30.2RequirementsY 30.3Threads  30.3.1Class threadPartialthread::id comparisons not well-defined30.3.2Namespace this_threadY 30.4Mutual exclusion  30.4.1Mutex requirements  30.4.1.1In general  30.4.1.2Mutex types  30.4.1.2.1Class mutexY 30.4.1.2.2Class recursive_mutexY 30.4.1.3Timed mutex types  30.4.1.3.1Class timed_mutexY 30.4.1.3.2Class recursive_timed_mutexY 30.4.1.4Shared timed mutex types  30.4.1.4.1Class shared_timed_mutexY 30.4.2Locks  30.4.2.1Class template lock_guardY 30.4.2.2Class template unique_lockY 30.4.2.3Class template shared_lockY 30.4.3Generic locking algorithmsY 30.4.4Call once  30.4.4.1Struct once_flagY 30.4.4.2Function call_onceBrokenException support is broken. See PR 66146. 30.5Condition variablesY 30.5.1Class condition_variableY 30.5.2Class condition_variable_anyY 30.6Futures  30.6.1Overview  30.6.2Error handlingY 30.6.3Class future_errorY 30.6.4Shared stateY 30.6.5Class template promiseY 30.6.6Class template futureY 30.6.7Class template shared_futureY 30.6.8Function template asyncY 30.6.9Class template packaged_taskY  *************** since C++14 and the implementation is co *** 967,973 **** 33 Thread support ! 33.1GeneralY 33.2RequirementsY 33.3Threads  33.3.1Header thread synopsis  33.3.2Class threadY 33.3.2.1Class threadPartialthread::id comparisons not well-defined33.3.3Namespace this_threadY 33.4Mutual exclusion  33.4.3Mutex requirements  33.4.3.1In general  33.4.3.2Mutex types  33.4.3.2.1Class mutexY 33.4.3.2.2Class recursive_mutexY 33.4.3.3Timed mutex types  33.4.3.3.1Class timed_mutexY 33.4.3.3.2Class recursive_timed_mutexY 33.4.3.4Shared mutex types  33.4.3.4.1Class shared_mutexY 33.4.3.5Shared timed mutex types  33.4.3.5.1Class shared_timed_mutexY 33.4.4Locks  33.4.4.1Class template lock_guardY 33.4.4.2Class template scoped_guardY 33.4.4.3Class template unique_lockY 33.4.4.4Class template shared_lockY 33.4.5Generic locking algorithmsY 33.4.6Call once  33.4.6.1Struct once_flagY 33.4.6.2Function call_onceYException support is broken on non-Linux targets. See PR 66146. 33.5Condition variablesY 33.5.1Class condition_variableY 33.5.2Class condition_variable_anyY 33.6Futures  33.6.1Overview  33.6.2Header <future>  33.6.3Error handlingY 33.6.4Class future_errorY 33.6.5Shared stateY 33.6.6Class template promiseY 33.6.7Class template futureY 33.6.8Class template shared_futureY 33.6.9Function template asyncY 33.6.10Class template packaged_taskY  --- 967,973 ---- 33 Thread support ! 33.1GeneralY 33.2RequirementsY 33.3Threads  33.3.1Header thread synopsis  33.3.2Class threadY 33.3.2.1Class threadPartialthread::id comparisons not well-defined33.3.3Namespace this_threadY 33.4Mutual exclusion  33.4.3Mutex requirements  33.4.3.1In general  33.4.3.2Mutex types  33.4.3.2.1Class mutexY 33.4.3.2.2Class recursive_mutexY 33.4.3.3Timed mutex types  33.4.3.3.1Class timed_mutexY 33.4.3.3.2Class recursive_timed_mutexY 33.4.3.4Shared mutex types  33.4.3.4.1Class shared_mutexY 33.4.3.5Shared timed mutex types  33.4.3.5.1Class shared_timed_mutexY 33.4.4Locks  33.4.4.1Class template lock_guardY 33.4.4.2Class template scoped_guardY 33.4.4.3Class template unique_lockY 33.4.4.4Class template shared_lockY 33.4.5Generic locking algorithmsY 33.4.6Call once  33.4.6.1Struct once_flagY 33.4.6.2Function call_onceYException support is broken. See PR 66146. 33.5Condition variablesY 33.5.1Class condition_variableY 33.5.2Class condition_variable_anyY 33.6Futures  33.6.1Overview  33.6.2Header <future>  33.6.3Error handlingY 33.6.4Class future_errorY 33.6.5Shared stateY 33.6.6Class template promiseY 33.6.7Class template futureY 33.6.8Class template shared_futureY 33.6.9Function template asyncY 33.6.10Class template packaged_taskY  *************** or any notes about the implementation. *** 1325,1334 **** 9.1 __cpp_lib_type_identity >= 201806L (since 9.4, see Note 1) unwrap_ref_decay and unwrap_reference P0318R1 ! 9.1 __cpp_lib_unwrap_ref >= 201811L (since 9.4, see Note 1) Improving Completeness Requirements for Type Traits P1285R0 ! Partial   Missing feature test macros P1353R0 9.1   Making std::underlying_type SFINAE-friendly --- 1325,1334 ---- 9.1 __cpp_lib_type_identity >= 201806L (since 9.4, see Note 1) unwrap_ref_decay and unwrap_reference P0318R1 ! 9.1 __cpp_lib_unwrap_ref >= 201811L (since 9.4, see Note 1) Improving Completeness Requirements for Type Traits P1285R0 ! — Most misuses are diagnosed, but not all. Missing feature test macros P1353R0 9.1   Making std::underlying_type SFINAE-friendly *************** or any notes about the implementation. *** 1411,1428 **** 10.1   Ranges Design Cleanup P1252R2 ! 10.1   Avoid template bloat for safe_ranges in combination with ‘subrange-y’ view adaptors. P1739R4 !   Time, dates, calendars, time zones ! Extending chrono to Calendars and Time Zones P0355R7 !   __cpp_lib_chrono >= 201803L Miscellaneous minor fixes for chrono P1466R3 !   __cpp_lib_chrono >= 201907L <chrono> zero(), min(), and max() should be noexcept P0972R0 9.1   --- 1411,1428 ---- 10.1   Ranges Design Cleanup P1252R2 ! 10.1   Avoid template bloat for safe_ranges in combination with ‘subrange-y’ view adaptors. P1739R4 ! 12.1   Time, dates, calendars, time zones ! Extending chrono to Calendars and Time Zones P0355R7 ! (see Note 2) __cpp_lib_chrono >= 201803L Miscellaneous minor fixes for chrono P1466R3 ! (see Note 2) __cpp_lib_chrono >= 201907L <chrono> zero(), min(), and max() should be noexcept P0972R0 9.1   *************** or any notes about the implementation. *** 1467,1476 **** String Prefix and Suffix Checking P0457R2 ! 9.1 __cpp_lib_starts_ends_with >= 201711L (since 9.4, see Note 1) Update The Reference To The Unicode Standard P1025R1 !   Containers span: bounds-safe views for sequences of objects --- 1467,1476 ---- String Prefix and Suffix Checking P0457R2 ! 9.1 __cpp_lib_starts_ends_with >= 201711L (since 9.4, see Note 1) Update The Reference To The Unicode Standard P1025R1 ! —  Containers span: bounds-safe views for sequences of objects *************** or any notes about the implementation. *** 1492,1501 **** 10.1 __cpp_lib_to_array >= 201907L Checking for Existence of an Element in Associative Containers P0458R2 ! 9.1   Comparing Unordered Containers P0809R0 !   Heterogeneous lookup for unordered containers P0919R3 11.1 __cpp_lib_generic_unordered_lookup >= 201811 Refinement Proposal for P0919 --- 1492,1501 ---- 10.1 __cpp_lib_to_array >= 201907L Checking for Existence of an Element in Associative Containers P0458R2 ! 9.1   Comparing Unordered Containers P0809R0 ! —   Heterogeneous lookup for unordered containers P0919R3 11.1 __cpp_lib_generic_unordered_lookup >= 201811 Refinement Proposal for P0919 *************** or any notes about the implementation. *** 1567,1573 **** 9.1   Thou Shalt Not Specialize std Function Templates! P0551R3 !   Bit-casting object representations P0476R2 11.1 __cpp_lib_bit_cast >= 201806L Integral power-of-2 operations --- 1567,1573 ---- 9.1   Thou Shalt Not Specialize std Function Templates! P0551R3 ! These changes will not be implemented. Bit-casting object representations P0476R2 11.1 __cpp_lib_bit_cast >= 201806L Integral power-of-2 operations *************** or any notes about the implementation. *** 1588,1597 **** —   Add shift to <algorithm> P0769R2 ! 10.1 __cpp_lib_shift >= 201806L Standard Library Specification in a Concepts and Contracts World P0788R3 !   explicit(bool) P0892R2 —   Eradicating unnecessarily explicit default constructors from the standard library --- 1588,1597 ---- —   Add shift to <algorithm> P0769R2 ! 10.1 __cpp_lib_shift >= 201806L Standard Library Specification in a Concepts and Contracts World P0788R3 ! —   explicit(bool) P0892R2 —   Eradicating unnecessarily explicit default constructors from the standard library *************** or any notes about the implementation. *** 1627,1636 **** 7.1   Editorial Guidance for merging P0019r8 and P0528r3 P1123R0 ! —   Cleaning up Clause 20 P1148R0 !   Completing the Rebase of Library Fundamentals, Version 3, Working Draft P1210R0   Alternative Wording for P0907R4 Signed Integers are Two's Complement --- 1627,1636 ---- 7.1   Editorial Guidance for merging P0019r8 and P0528r3 P1123R0 ! —   Cleaning up Clause 20 P1148R0 ! —   Completing the Rebase of Library Fundamentals, Version 3, Working Draft P1210R0   Alternative Wording for P0907R4 Signed Integers are Two's Complement *************** or any notes about the implementation. *** 1666,1678 **** P1463R1 ! 10.1   Mandating the Standard Library: Clause 22 - Iterators library P1464R1 !   Make create_directory() Intuitive P1164R1 --- 1666,1678 ---- P1463R1 ! 10.1   Mandating the Standard Library: Clause 22 - Iterators library P1464R1 ! —   Make create_directory() Intuitive P1164R1 *************** or any notes about the implementation. *** 1708,1713 **** --- 1708,1716 ---- Note 1: This feature is supported in older releases but the __cpp_lib macro is not defined to the right value (or not defined at all) until the version shown in parentheses. +

    + Note 2: The C++20 calendar types are supported since 11.1, + time zones, UTC, formatting and parsing are not supported.

    C++ 2023

    In this implementation the -std=gnu++23 or -std=c++23 flag must be used to enable language diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/html/manual/test.html gcc-12.4.0/libstdc++-v3/doc/html/manual/test.html *** gcc-12.3.0/libstdc++-v3/doc/html/manual/test.html Mon May 8 12:14:42 2023 --- gcc-12.4.0/libstdc++-v3/doc/html/manual/test.html Thu Jun 20 08:08:10 2024 *************** cat 27_io/objects/char/3_xin.in | a.out< *** 452,458 **** be run for a specific standard (and not later standards) using an effective target like c++11_only. However, this means the test will be skipped by default (because the default mode is ! gnu++14), and so will only run when -std=gnu++11 or -std=c++11 is used explicitly. For tests that require a specific standard it is better to use a dg-options directive: --- 452,458 ---- be run for a specific standard (and not later standards) using an effective target like c++11_only. However, this means the test will be skipped by default (because the default mode is ! gnu++17), and so will only run when -std=gnu++11 or -std=c++11 is used explicitly. For tests that require a specific standard it is better to use a dg-options directive: *************** cat 27_io/objects/char/3_xin.in | a.out< *** 466,478 **** Similarly, tests which depend on a newer standard than the default must use dg-options instead of (or in addition to) an effective target, so that they are not skipped by default. ! For example, tests for C++17 features should use ! 

        // { dg-options "-std=gnu++17" }

    before any dg-do such as: ! 

        // { dg-do run "c++17" }

    The dg-options directive must come first, so that the -std flag has already been added to the options ! before checking the c++17 target.

    Examples of Test Directives

    Example 1: Testing compilation only: 

    --- 466,478 ----
      Similarly, tests which depend on a newer standard than the default
      must use dg-options instead of (or in addition to)
      an effective target, so that they are not skipped by default.
!     For example, tests for C++20 features should use
! 
        // { dg-options "-std=gnu++20" }
    
      before any dg-do such as:
! 
        // { dg-do run { target c++20 } }
    
      The dg-options directive must come first, so that
      the -std flag has already been added to the options
!     before checking the c++20 effective target.
    
    Examples of Test Directives
    
  Example 1: Testing compilation only:
  
    diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/html/manual/using.html gcc-12.4.0/libstdc++-v3/doc/html/manual/using.html
*** gcc-12.3.0/libstdc++-v3/doc/html/manual/using.html	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/html/manual/using.html	Thu Jun 20 08:08:10 2024
***************
*** 4,10 ****
    
   Next
    Chapter 3. Using
    Table of Contents
    Command Options
    Headers
    Header Files
    Mixing Headers
    The C Headers and namespace std
    Precompiled Headers
    Macros
    Dual ABI
    Troubleshooting
    Namespaces
    Available Namespaces
    namespace std
    Using Namespace Composition
    Linking
    Almost Nothing
    Finding Dynamic or Shared Libraries
    Experimental Library Extensions
    Concurrency
    Prerequisites
    Thread Safety
    Atomics
    IO
    Structure
    Defaults
    Future
    Alternatives
    Containers
    Exceptions
    Exception Safety
    Exception Neutrality
    Doing without
    Compatibility
    With C
    With POSIX thread cancellation
    Debugging Support
    Using g++
    Debug Versions of Library Binary Files
    Memory Leak Hunting
    Non-memory leaks in Pool and MT allocators
    Data Race Hunting
    Using gdb
    Tracking uncaught exceptions
    Debug Mode
    Compile Time Checking
    Command Options
    
        The set of features available in the GNU C++ library is shaped by
!       several GCC
        Command Options. Options that impact libstdc++ are
        enumerated and detailed in the table below.
      
    
--- 4,10 ----
    
   Next
    Chapter 3. Using
    Table of Contents
    Command Options
    Headers
    Header Files
    Mixing Headers
    The C Headers and namespace std
    Precompiled Headers
    Macros
    Dual ABI
    Troubleshooting
    Namespaces
    Available Namespaces
    namespace std
    Using Namespace Composition
    Linking
    Almost Nothing
    Finding Dynamic or Shared Libraries
    Experimental Library Extensions
    Concurrency
    Prerequisites
    Thread Safety
    Atomics
    IO
    Structure
    Defaults
    Future
    Alternatives
    Containers
    Exceptions
    Exception Safety
    Exception Neutrality
    Doing without
    Compatibility
    With C
    With POSIX thread cancellation
    Debugging Support
    Using g++
    Debug Versions of Library Binary Files
    Memory Leak Hunting
    Non-memory leaks in Pool and MT allocators
    Data Race Hunting
    Using gdb
    Tracking uncaught exceptions
    Debug Mode
    Compile Time Checking
    Command Options
    
        The set of features available in the GNU C++ library is shaped by
!       several GCC
        Command Options. Options that impact libstdc++ are
        enumerated and detailed in the table below.
      
    
***************
*** 14,22 ****
        g++ -std=gnu++17 since GCC 11, and
        g++ -std=gnu++14 in GCC 6, 7, 8, 9, and 10, and
        g++ -std=gnu++98 for older releases.
!     
    Table 3.1. C++ Command Options
    Option FlagsDescription
    -std=c++98 or -std=c++03
!       Use the 1998 ISO C++ standard plus amendments.
    -std=gnu++98 or -std=gnu++03
!       As directly above, with GNU extensions.
    -std=c++11Use the 2011 ISO C++ standard.
    -std=gnu++11As directly above, with GNU extensions.
    -std=c++14Use the 2014 ISO C++ standard.
    -std=gnu++14As directly above, with GNU extensions.
    
  	-fno-exceptions
        See exception-free dialect
    
  	-fno-rtti
--- 14,24 ----
        g++ -std=gnu++17 since GCC 11, and
        g++ -std=gnu++14 in GCC 6, 7, 8, 9, and 10, and
        g++ -std=gnu++98 for older releases.
!     
    Table 3.1. C++ Command Options
    
!       -std=c++98 or -std=c++03
        
!       Use the 1998 ISO C++ standard plus amendments.
!     
! 
!     
!       -std=gnu++98 or -std=gnu++03
        
-       As directly above, with GNU extensions.
-     
- 
-     
-       -std=c++11
-       Use the 2011 ISO C++ standard.
-     
- 
-     
-       -std=gnu++11
-       As directly above, with GNU extensions.
-     
- 
-     
-       -std=c++14
-       Use the 2014 ISO C++ standard.
-     
- 
-     
-       -std=gnu++14
-       As directly above, with GNU extensions.
      
--- 37,48 ----
  
    
!       -std
        
!       
! 	Select the C++ standard, and whether to use the base standard
! 	or GNU dialect.
        
      
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/backward/auto_ptr.h gcc-12.4.0/libstdc++-v3/include/backward/auto_ptr.h
*** gcc-12.3.0/libstdc++-v3/include/backward/auto_ptr.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/backward/auto_ptr.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 84,89 ****
--- 84,93 ----
     *  _GLIBCXX_RESOLVE_LIB_DEFECTS
     *  127.  auto_ptr<> conversion issues
     *  These resolutions have all been incorporated.
+    *
+    * @headerfile memory
+    * @deprecated Deprecated in C++11, no longer in the standard since C++17.
+    * Use `unique_ptr` instead.
     */
    template
      class auto_ptr
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/algorithmfwd.h gcc-12.4.0/libstdc++-v3/include/bits/algorithmfwd.h
*** gcc-12.3.0/libstdc++-v3/include/bits/algorithmfwd.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/algorithmfwd.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 601,613 ****
      _OIter
      reverse_copy(_BIter, _BIter, _OIter);
  
!   inline namespace _V2
!   {
!     template
!       _GLIBCXX20_CONSTEXPR
!       _FIter
!       rotate(_FIter, _FIter, _FIter);
!   }
  
    template
      _GLIBCXX20_CONSTEXPR
--- 601,614 ----
      _OIter
      reverse_copy(_BIter, _BIter, _OIter);
  
! _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(_V2)
! 
!   template
!     _GLIBCXX20_CONSTEXPR
!     _FIter
!     rotate(_FIter, _FIter, _FIter);
! 
! _GLIBCXX_END_INLINE_ABI_NAMESPACE(_V2)
  
    template
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 828,837 ****
--- 829,840 ----
      partition(_BIter, _BIter, _Predicate);
  
    template
+     _GLIBCXX14_DEPRECATED_SUGGEST("std::shuffle")
      void
      random_shuffle(_RAIter, _RAIter);
  
    template
+     _GLIBCXX14_DEPRECATED_SUGGEST("std::shuffle")
      void
      random_shuffle(_RAIter, _RAIter,
  #if __cplusplus >= 201103L
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/alloc_traits.h gcc-12.4.0/libstdc++-v3/include/bits/alloc_traits.h
*** gcc-12.3.0/libstdc++-v3/include/bits/alloc_traits.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/alloc_traits.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 72,78 ****
      template
        using __pocs = typename _Tp::propagate_on_container_swap;
      template
!       using __equal = typename _Tp::is_always_equal;
    };
  
    template
--- 72,78 ----
      template
        using __pocs = typename _Tp::propagate_on_container_swap;
      template
!       using __equal = __type_identity;
    };
  
    template
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 207,213 ****
         * otherwise @c is_empty::type
        */
        using is_always_equal
! 	= __detected_or_t::type, __equal, _Alloc>;
  
        template
  	using rebind_alloc = __alloc_rebind<_Alloc, _Tp>;
--- 207,213 ----
         * otherwise @c is_empty::type
        */
        using is_always_equal
! 	= typename __detected_or_t, __equal, _Alloc>::type;
  
        template
  	using rebind_alloc = __alloc_rebind<_Alloc, _Tp>;
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 661,666 ****
--- 661,667 ----
        { return __rhs; }
      };
  
+   /// @cond undocumented
  #if __cplusplus < 201703L
    template
      inline void
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 818,825 ****
--- 819,829 ----
        __a.deallocate(__a.allocate(1u), 1u);
      };
  #endif
+   /// @endcond
  #endif // C++11
  
+   /// @cond undocumented
+ 
    /**
     * Destroy a range of objects using the supplied allocator.  For
     * non-default allocators we do not optimize away invocation of
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 847,854 ****
      _Destroy(_ForwardIterator __first, _ForwardIterator __last,
  	     allocator<_Tp>&)
      {
!       _Destroy(__first, __last);
      }
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace std
--- 851,859 ----
      _Destroy(_ForwardIterator __first, _ForwardIterator __last,
  	     allocator<_Tp>&)
      {
!       std::_Destroy(__first, __last);
      }
+   /// @endcond
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace std
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/allocator.h gcc-12.4.0/libstdc++-v3/include/bits/allocator.h
*** gcc-12.3.0/libstdc++-v3/include/bits/allocator.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/allocator.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 67,73 ****
    // explicit specialization, with the historical ABI properties, but with
    // the same members that are present in the primary template.
  
!   /// allocator specialization.
    template<>
      class allocator
      {
--- 67,76 ----
    // explicit specialization, with the historical ABI properties, but with
    // the same members that are present in the primary template.
  
!   /** std::allocator specialization.
!    *
!    * @headerfile memory
!    */
    template<>
      class allocator
      {
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 119,124 ****
--- 122,129 ----
     *  for further details.
     *
     *  @tparam  _Tp  Type of allocated object.
+    *
+    *  @headerfile memory
     */
    template
      class allocator : public __allocator_base<_Tp>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 214,219 ****
--- 219,229 ----
        // Inherit everything else.
      };
  
+   /** Equality comparison for std::allocator objects
+    *
+    * @return true, for all std::allocator objects.
+    * @relates std::allocator
+    */
    template
      inline _GLIBCXX20_CONSTEXPR bool
      operator==(const allocator<_T1>&, const allocator<_T2>&)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 228,233 ****
--- 238,245 ----
      { return false; }
  #endif
  
+   /// @cond undocumented
+ 
    // Invalid allocator partial specializations.
    // allocator_traits::rebind_alloc can be used to form a valid allocator type.
    template
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 330,335 ****
--- 342,348 ----
        }
      };
  #endif
+   /// @endcond
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace std
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/atomic_base.h gcc-12.4.0/libstdc++-v3/include/bits/atomic_base.h
*** gcc-12.3.0/libstdc++-v3/include/bits/atomic_base.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/atomic_base.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 86,91 ****
--- 86,92 ----
      } memory_order;
  #endif
  
+   /// @cond undocumented
    enum __memory_order_modifier
      {
        __memory_order_mask          = 0x0ffff,
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 93,98 ****
--- 94,100 ----
        __memory_order_hle_acquire   = 0x10000,
        __memory_order_hle_release   = 0x20000
      };
+   /// @endcond
  
    constexpr memory_order
    operator|(memory_order __m, __memory_order_modifier __mod)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 106,111 ****
--- 108,115 ----
      return memory_order(int(__m) & int(__mod));
    }
  
+   /// @cond undocumented
+ 
    // Drop release ordering as per [atomics.types.operations.req]/21
    constexpr memory_order
    __cmpexch_failure_order2(memory_order __m) noexcept
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 128,133 ****
--- 132,143 ----
  	&& (__m & __memory_order_mask) != memory_order_acq_rel;
    }
  
+   // Base types for atomics.
+   template
+     struct __atomic_base;
+ 
+   /// @endcond
+ 
    _GLIBCXX_ALWAYS_INLINE void
    atomic_thread_fence(memory_order __m) noexcept
    { __atomic_thread_fence(int(__m)); }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 145,160 ****
        return __ret;
      }
  
!   // Base types for atomics.
!   template
!     struct __atomic_base;
! 
! #if __cplusplus <= 201703L
! # define _GLIBCXX20_INIT(I)
! #else
  # define __cpp_lib_atomic_value_initialization 201911L
  # define _GLIBCXX20_INIT(I) = I
  #endif
  
  #define ATOMIC_VAR_INIT(_VI) { _VI }
  
--- 155,171 ----
        return __ret;
      }
  
! #if __cplusplus >= 202002L
  # define __cpp_lib_atomic_value_initialization 201911L
+ #endif
+ 
+ /// @cond undocumented
+ #if __cpp_lib_atomic_value_initialization
  # define _GLIBCXX20_INIT(I) = I
+ #else
+ # define _GLIBCXX20_INIT(I)
  #endif
+ /// @endcond
  
  #define ATOMIC_VAR_INIT(_VI) { _VI }
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 171,178 ****
      typedef unsigned char __atomic_flag_data_type;
  #endif
  
!   /**
!    *  @brief Base type for atomic_flag.
     *
     *  Base type is POD with data, allowing atomic_flag to derive from
     *  it and meet the standard layout type requirement. In addition to
--- 182,191 ----
      typedef unsigned char __atomic_flag_data_type;
  #endif
  
!   /// @cond undocumented
! 
!   /*
!    *  Base type for atomic_flag.
     *
     *  Base type is POD with data, allowing atomic_flag to derive from
     *  it and meet the standard layout type requirement. In addition to
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 190,195 ****
--- 203,210 ----
  
    _GLIBCXX_END_EXTERN_C
  
+   /// @endcond
+ 
  #define ATOMIC_FLAG_INIT { 0 }
  
    /// atomic_flag
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 295,300 ****
--- 310,316 ----
      { return __i ? __GCC_ATOMIC_TEST_AND_SET_TRUEVAL : 0; }
    };
  
+   /// @cond undocumented
  
    /// Base class for atomic integrals.
    //
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 936,942 ****
--- 952,962 ----
        { return __atomic_fetch_sub(&_M_p, _M_type_size(__d), int(__m)); }
      };
  
+   /// @endcond
+ 
  #if __cplusplus > 201703L
+   /// @cond undocumented
+ 
    // Implementation details of atomic_ref and atomic.
    namespace __atomic_impl
    {
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1936,1941 ****
--- 1956,1962 ----
        _Tp** _M_ptr;
      };
  
+   /// @endcond
  #endif // C++2a
  
    /// @} group atomics
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/basic_string.h gcc-12.4.0/libstdc++-v3/include/bits/basic_string.h
*** gcc-12.3.0/libstdc++-v3/include/bits/basic_string.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/basic_string.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 69,74 ****
--- 69,76 ----
     *
     *  @ingroup strings
     *  @ingroup sequences
+    *  @headerfile string
+    *  @since C++98
     *
     *  @tparam _CharT  Type of character
     *  @tparam _Traits  Traits for character type, defaults to
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 680,685 ****
--- 682,688 ----
        {
  	if (__str._M_is_local())
  	  {
+ 	    (void)_M_use_local_data();
  	    traits_type::copy(_M_local_buf, __str._M_local_buf,
  			      __str.length() + 1);
  	  }
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 693,699 ****
  	// basic_stringbuf relies on writing into unallocated capacity so
  	// we mess up the contents if we put a '\0' in the string.
  	_M_length(__str.length());
! 	__str._M_data(__str._M_local_data());
  	__str._M_set_length(0);
        }
  
--- 696,702 ----
  	// basic_stringbuf relies on writing into unallocated capacity so
  	// we mess up the contents if we put a '\0' in the string.
  	_M_length(__str.length());
! 	__str._M_data(__str._M_use_local_data());
  	__str._M_set_length(0);
        }
  
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 719,724 ****
--- 722,728 ----
        {
  	if (__str._M_is_local())
  	  {
+ 	    (void)_M_use_local_data();
  	    traits_type::copy(_M_local_buf, __str._M_local_buf,
  			      __str.length() + 1);
  	    _M_length(__str.length());
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 730,736 ****
  	    _M_data(__str._M_data());
  	    _M_length(__str.length());
  	    _M_capacity(__str._M_allocated_capacity);
! 	    __str._M_data(__str._M_local_buf);
  	    __str._M_set_length(0);
  	  }
  	else
--- 734,740 ----
  	    _M_data(__str._M_data());
  	    _M_length(__str.length());
  	    _M_capacity(__str._M_allocated_capacity);
! 	    __str._M_data(__str._M_use_local_data());
  	    __str._M_set_length(0);
  	  }
  	else
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/basic_string.tcc gcc-12.4.0/libstdc++-v3/include/bits/basic_string.tcc
*** gcc-12.3.0/libstdc++-v3/include/bits/basic_string.tcc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/basic_string.tcc	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 79,84 ****
--- 79,85 ----
  	      }
  	    else if (__s.length())
  	      {
+ 		(void)_M_use_local_data();
  		traits_type::copy(_M_local_buf, __s._M_local_buf,
  				  __s.length() + 1);
  		_M_length(__s.length());
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 87,92 ****
--- 88,94 ----
  	      }
  	    else if (length())
  	      {
+ 		(void)__s._M_use_local_data();
  		traits_type::copy(__s._M_local_buf, _M_local_buf,
  				  length() + 1);
  		__s._M_length(length());
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 97,102 ****
--- 99,105 ----
  	else
  	  {
  	    const size_type __tmp_capacity = __s._M_allocated_capacity;
+ 	    (void)__s._M_use_local_data();
  	    traits_type::copy(__s._M_local_buf, _M_local_buf,
  			      length() + 1);
  	    _M_data(__s._M_data());
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 108,113 ****
--- 111,117 ----
  	  const size_type __tmp_capacity = _M_allocated_capacity;
  	  if (__s._M_is_local())
  	    {
+ 	      (void)_M_use_local_data();
  	      traits_type::copy(_M_local_buf, __s._M_local_buf,
  				__s.length() + 1);
  	      __s._M_data(_M_data());
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 529,534 ****
--- 533,542 ----
  		    {
  		      const size_type __nleft = (__p + __len1) - __s;
  		      this->_S_move(__p, __s, __nleft);
+ 		      // Tell the middle-end that the copy can't overlap
+ 		      // (PR105651).
+ 		      if (__len2 < __nleft)
+ 			__builtin_unreachable();
  		      this->_S_copy(__p + __nleft, __p + __len2,
  				    __len2 - __nleft);
  		    }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 562,574 ****
    template
      constexpr void
      basic_string<_CharT, _Traits, _Alloc>::
!     resize_and_overwrite(size_type __n, _Operation __op)
      {
        const size_type __capacity = capacity();
        _CharT* __p;
        if (__n > __capacity)
  	{
! 	  __p = _M_create(__n, __capacity);
  	  this->_S_copy(__p, _M_data(), length()); // exclude trailing null
  #if __cpp_lib_is_constant_evaluated
  	  if (std::is_constant_evaluated())
--- 570,583 ----
    template
      constexpr void
      basic_string<_CharT, _Traits, _Alloc>::
!     resize_and_overwrite(const size_type __n, _Operation __op)
      {
        const size_type __capacity = capacity();
        _CharT* __p;
        if (__n > __capacity)
  	{
! 	  auto __new_capacity = __n; // Must not allow _M_create to modify __n.
! 	  __p = _M_create(__new_capacity, __capacity);
  	  this->_S_copy(__p, _M_data(), length()); // exclude trailing null
  #if __cpp_lib_is_constant_evaluated
  	  if (std::is_constant_evaluated())
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 576,582 ****
  #endif
  	  _M_dispose();
  	  _M_data(__p);
! 	  _M_capacity(__n);
  	}
        else
  	__p = _M_data();
--- 585,591 ----
  #endif
  	  _M_dispose();
  	  _M_data(__p);
! 	  _M_capacity(__new_capacity);
  	}
        else
  	__p = _M_data();
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 586,594 ****
  	size_type _M_r;
        };
        _Terminator __term{this};
!       const size_type __n2 [[maybe_unused]] = __n;
!       __term._M_r = std::move(__op)(__p, __n);
!       _GLIBCXX_DEBUG_ASSERT(__term._M_r >= 0 && __term._M_r <= __n2);
      }
  #endif // C++23
  
--- 595,606 ----
  	size_type _M_r;
        };
        _Terminator __term{this};
!       auto __r = std::move(__op)(auto(__p), auto(__n));
!       static_assert(ranges::__detail::__is_integer_like);
!       _GLIBCXX_DEBUG_ASSERT(__r >= 0 && __r <= __n);
!       __term._M_r = size_type(__r);
!       if (__term._M_r > __n)
! 	__builtin_unreachable();
      }
  #endif // C++23
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/c++config gcc-12.4.0/libstdc++-v3/include/bits/c++config
*** gcc-12.3.0/libstdc++-v3/include/bits/c++config	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/c++config	Thu Jun 20 08:08:10 2024
*************** namespace __gnu_cxx
*** 345,357 ****
  # define _GLIBCXX_DEFAULT_ABI_TAG
  #endif
  
! // Defined if inline namespaces are used for versioning.
  #define _GLIBCXX_INLINE_VERSION 
  
- // Inline namespace for symbol versioning.
  #if _GLIBCXX_INLINE_VERSION
  # define _GLIBCXX_BEGIN_NAMESPACE_VERSION namespace __8 {
  # define _GLIBCXX_END_NAMESPACE_VERSION }
  
  namespace std
  {
--- 345,360 ----
  # define _GLIBCXX_DEFAULT_ABI_TAG
  #endif
  
! // Non-zero if inline namespaces are used for versioning the entire library.
  #define _GLIBCXX_INLINE_VERSION 
  
  #if _GLIBCXX_INLINE_VERSION
+ // Inline namespace for symbol versioning of (nearly) everything in std.
  # define _GLIBCXX_BEGIN_NAMESPACE_VERSION namespace __8 {
  # define _GLIBCXX_END_NAMESPACE_VERSION }
+ // Unused when everything in std is versioned anyway.
+ # define _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(X)
+ # define _GLIBCXX_END_INLINE_ABI_NAMESPACE(X)
  
  namespace std
  {
*************** _GLIBCXX_END_NAMESPACE_VERSION
*** 376,383 ****
--- 379,390 ----
  }
  
  #else
+ // Unused.
  # define _GLIBCXX_BEGIN_NAMESPACE_VERSION
  # define _GLIBCXX_END_NAMESPACE_VERSION
+ // Used to version individual components, e.g. std::_V2::error_category.
+ # define _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(X) inline namespace X {
+ # define _GLIBCXX_END_INLINE_ABI_NAMESPACE(X)   } // inline namespace X
  #endif
  
  // Inline namespaces for special modes: debug, parallel.
*************** namespace std
*** 816,821 ****
--- 823,831 ----
  
  #undef _GLIBCXX_HAS_BUILTIN
  
+ // Mark code that should be ignored by the compiler, but seen by Doxygen.
+ #define _GLIBCXX_DOXYGEN_ONLY(X)
+ 
  // PSTL configuration
  
  #if __cplusplus >= 201703L
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/char_traits.h gcc-12.4.0/libstdc++-v3/include/bits/char_traits.h
*** gcc-12.3.0/libstdc++-v3/include/bits/char_traits.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/char_traits.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 210,217 ****
  #if __cplusplus >= 202002L
        if (std::__is_constant_evaluated())
  	{
- 	  if (__s1 == __s2) // unlikely, but saves a lot of work
- 	    return __s1;
  #if __cpp_constexpr_dynamic_alloc
  	  // The overlap detection below fails due to PR c++/89074,
  	  // so use a temporary buffer instead.
--- 210,215 ----
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 220,236 ****
  	  copy(__s1, __tmp, __n);
  	  delete[] __tmp;
  #else
! 	  const auto __end = __s2 + __n - 1;
! 	  bool __overlap = false;
! 	  for (std::size_t __i = 0; __i < __n - 1; ++__i)
! 	    {
! 	      if (__s1 + __i == __end)
! 		{
! 		  __overlap = true;
! 		  break;
! 		}
! 	    }
! 	  if (__overlap)
  	    {
  	      do
  		{
--- 218,226 ----
  	  copy(__s1, __tmp, __n);
  	  delete[] __tmp;
  #else
! 	  // Use __builtin_constant_p to avoid comparing unrelated pointers.
! 	  if (__builtin_constant_p(__s2 < __s1)
! 		&& __s1 > __s2 && __s1 < (__s2 + __n))
  	    {
  	      do
  		{
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/chrono.h gcc-12.4.0/libstdc++-v3/include/bits/chrono.h
*** gcc-12.3.0/libstdc++-v3/include/bits/chrono.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/chrono.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 483,508 ****
  	{ return numeric_limits<_Rep>::lowest(); }
        };
  
-     /// @cond undocumented
- 
-     template
-       struct __is_ratio
-       : std::false_type
-       { };
- 
-     template
-       struct __is_ratio>
-       : std::true_type
-       { };
- 
-     /// @endcond
- 
      template
        class duration
        {
! 	static_assert(!__is_duration<_Rep>::value, "rep cannot be a duration");
  	static_assert(__is_ratio<_Period>::value,
! 		      "period must be a specialization of ratio");
  	static_assert(_Period::num > 0, "period must be positive");
  
  	template
--- 483,495 ----
  	{ return numeric_limits<_Rep>::lowest(); }
        };
  
      template
        class duration
        {
! 	static_assert(!__is_duration<_Rep>::value,
! 		      "rep cannot be a std::chrono::duration");
  	static_assert(__is_ratio<_Period>::value,
! 		      "period must be a specialization of std::ratio");
  	static_assert(_Period::num > 0, "period must be positive");
  
  	template
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1206,1212 ****
      // compatibility definitions for previous versions.  At some
      // point, when these clocks settle down, the inlined namespaces
      // can be removed.  XXX GLIBCXX_ABI Deprecated
!     inline namespace _V2 {
  
      /**
       *  @brief System clock.
--- 1193,1199 ----
      // compatibility definitions for previous versions.  At some
      // point, when these clocks settle down, the inlined namespaces
      // can be removed.  XXX GLIBCXX_ABI Deprecated
! _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(_V2)
  
      /**
       *  @brief System clock.
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1278,1284 ****
      */
      using high_resolution_clock = system_clock;
  
!     } // end inline namespace _V2
  
  #if __cplusplus >= 202002L
      /// @addtogroup chrono
--- 1265,1271 ----
      */
      using high_resolution_clock = system_clock;
  
! _GLIBCXX_END_INLINE_ABI_NAMESPACE(_V2)
  
  #if __cplusplus >= 202002L
      /// @addtogroup chrono
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/cow_string.h gcc-12.4.0/libstdc++-v3/include/bits/cow_string.h
*** gcc-12.3.0/libstdc++-v3/include/bits/cow_string.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/cow_string.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 54,59 ****
--- 54,61 ----
     *
     *  @ingroup strings
     *  @ingroup sequences
+    *  @headerfile string
+    *  @since C++98
     *
     *  @tparam _CharT  Type of character
     *  @tparam _Traits  Traits for character type, defaults to
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/forward_list.h gcc-12.4.0/libstdc++-v3/include/bits/forward_list.h
*** gcc-12.3.0/libstdc++-v3/include/bits/forward_list.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/forward_list.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 406,411 ****
--- 406,413 ----
     *  and fixed time insertion/deletion at any point in the sequence.
     *
     *  @ingroup sequences
+    *  @headerfile forward_list
+    *  @since C++11
     *
     *  @tparam _Tp  Type of element.
     *  @tparam _Alloc  Allocator type, defaults to allocator<_Tp>.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/fs_dir.h gcc-12.4.0/libstdc++-v3/include/bits/fs_dir.h
*** gcc-12.3.0/libstdc++-v3/include/bits/fs_dir.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/fs_dir.h	Thu Jun 20 08:08:10 2024
*************** namespace filesystem
*** 52,57 ****
--- 52,61 ----
     */
  
    /// Information about a file's type and permissions.
+   /**
+    * @headerfile filesystem
+    * @since C++17
+    */
    class file_status
    {
    public:
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 94,99 ****
--- 98,107 ----
    class recursive_directory_iterator;
  
    /// The value type used by directory iterators
+   /**
+    * @headerfile filesystem
+    * @since C++17
+    */
    class directory_entry
    {
    public:
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 354,360 ****
--- 362,374 ----
      file_type		_M_type = file_type::none;
    };
  
+   /// @cond undocumented
+ 
    /// Proxy returned by post-increment on directory iterators.
+   /**
+    * @headerfile filesystem
+    * @since C++17
+    */
    struct __directory_iterator_proxy
    {
      const directory_entry& operator*() const& noexcept { return _M_entry; }
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 370,377 ****
--- 384,396 ----
  
      directory_entry _M_entry;
    };
+   /// @endcond
  
    /// Iterator type for traversing the entries in a single directory.
+   /**
+    * @headerfile filesystem
+    * @since C++17
+    */
    class directory_iterator
    {
    public:
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 433,439 ****
        // _GLIBCXX_RESOLVE_LIB_DEFECTS
        // 3719. Directory iterators should be usable with default sentinel
        bool operator==(default_sentinel_t) const noexcept
!       { return !_M_dir; }
  #endif
  
  #if __cpp_impl_three_way_comparison < 201907L
--- 452,458 ----
        // _GLIBCXX_RESOLVE_LIB_DEFECTS
        // 3719. Directory iterators should be usable with default sentinel
        bool operator==(default_sentinel_t) const noexcept
!       { return *this == directory_iterator(); }
  #endif
  
  #if __cpp_impl_three_way_comparison < 201907L
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 451,457 ****
      std::__shared_ptr<_Dir> _M_dir;
    };
  
!   /// @relates std::filesystem::directory_iterator @{
  
    /** @brief Enable range-based `for` using directory_iterator.
     *
--- 470,480 ----
      std::__shared_ptr<_Dir> _M_dir;
    };
  
!   /** @relates std::filesystem::directory_iterator
!    *  @headerfile filesystem
!    *  @since C++17
!    *  @{
!    */
  
    /** @brief Enable range-based `for` using directory_iterator.
     *
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 468,473 ****
--- 491,500 ----
    /// @}
  
    /// Iterator type for recursively traversing a directory hierarchy.
+   /**
+    *  @headerfile filesystem
+    *  @since C++17
+    */
    class recursive_directory_iterator
    {
    public:
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 541,547 ****
        // _GLIBCXX_RESOLVE_LIB_DEFECTS
        // 3719. Directory iterators should be usable with default sentinel
        bool operator==(default_sentinel_t) const noexcept
!       { return !_M_dirs; }
  #endif
  
  #if __cpp_impl_three_way_comparison < 201907L
--- 568,574 ----
        // _GLIBCXX_RESOLVE_LIB_DEFECTS
        // 3719. Directory iterators should be usable with default sentinel
        bool operator==(default_sentinel_t) const noexcept
!       { return *this == recursive_directory_iterator(); }
  #endif
  
  #if __cpp_impl_three_way_comparison < 201907L
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 566,572 ****
      filesystem::remove_all(const path&);
    };
  
!   /// @relates std::filesystem::recursive_directory_iterator @{
  
    /** @brief Enable range-based `for` using recursive_directory_iterator.
     *
--- 593,603 ----
      filesystem::remove_all(const path&);
    };
  
!   /** @relates std::filesystem::directory_iterator
!    *  @headerfile filesystem
!    *  @since C++17
!    *  @{
!    */
  
    /** @brief Enable range-based `for` using recursive_directory_iterator.
     *
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/fs_ops.h gcc-12.4.0/libstdc++-v3/include/bits/fs_ops.h
*** gcc-12.3.0/libstdc++-v3/include/bits/fs_ops.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/fs_ops.h	Thu Jun 20 08:08:10 2024
*************** namespace filesystem
*** 90,97 ****
    bool create_directory(const path& __p);
    bool create_directory(const path& __p, error_code& __ec) noexcept;
  
!   bool create_directory(const path& __p, const path& attributes);
!   bool create_directory(const path& __p, const path& attributes,
  			error_code& __ec) noexcept;
  
    void create_directory_symlink(const path& __to, const path& __new_symlink);
--- 90,97 ----
    bool create_directory(const path& __p);
    bool create_directory(const path& __p, error_code& __ec) noexcept;
  
!   bool create_directory(const path& __p, const path& __attributes);
!   bool create_directory(const path& __p, const path& __attributes,
  			error_code& __ec) noexcept;
  
    void create_directory_symlink(const path& __to, const path& __new_symlink);
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/fs_path.h gcc-12.4.0/libstdc++-v3/include/bits/fs_path.h
*** gcc-12.3.0/libstdc++-v3/include/bits/fs_path.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/fs_path.h	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 102,120 ****
  #endif
  
    template
!     struct __is_path_iter_src
!     : false_type
!     { };
  
    template
!     struct __is_path_iter_src<_Iter_traits,
! 			      void_t>
!     : bool_constant<__is_encoded_char>
!     { };
  
    template
      inline constexpr bool __is_path_src
!       = __is_path_iter_src>>::value;
  
    template<>
      inline constexpr bool __is_path_src = false;
--- 102,117 ----
  #endif
  
    template
!     inline constexpr bool __is_path_iter_src = false;
  
    template
!     inline constexpr bool
!     __is_path_iter_src<_Iter_traits, void_t>
!       = __is_encoded_char;
  
    template
      inline constexpr bool __is_path_src
!       = __is_path_iter_src>>;
  
    template<>
      inline constexpr bool __is_path_src = false;
*************** namespace __detail
*** 150,156 ****
  
    // SFINAE constraint for InputIterator parameters as required by [fs.req].
    template>
!     using _Path2 = enable_if_t<__is_path_iter_src<_Tr>::value, path>;
  
  #if __cpp_lib_concepts
    template
--- 147,153 ----
  
    // SFINAE constraint for InputIterator parameters as required by [fs.req].
    template>
!     using _Path2 = enable_if_t<__is_path_iter_src<_Tr>, path>;
  
  #if __cpp_lib_concepts
    template
*************** namespace __detail
*** 288,294 ****
    /// @{
  
    /// A filesystem path
!   /// @ingroup filesystem
    class path
    {
    public:
--- 285,295 ----
    /// @{
  
    /// A filesystem path
!   /**
!    * @ingroup filesystem
!    * @headerfile filesystem
!    * @since C++17
!    */
    class path
    {
    public:
*************** namespace __detail
*** 746,751 ****
--- 747,756 ----
    /// @}
  
    /// Exception type thrown by the Filesystem library
+   /**
+    * @headerfile filesystem
+    * @since C++17
+    */
    class filesystem_error : public std::system_error
    {
    public:
*************** namespace __detail
*** 808,813 ****
--- 813,820 ----
    /** Create a path from a UTF-8-encoded sequence of char
     *
     * @relates std::filesystem::path
+    * @headerfile filesystem
+    * @since C++17
     */
    template,
*************** namespace __detail
*** 831,836 ****
--- 838,845 ----
    /** Create a path from a UTF-8-encoded sequence of char
     *
     * @relates std::filesystem::path
+    * @headerfile filesystem
+    * @since C++17
     */
    template,
*************** namespace __detail
*** 931,936 ****
--- 940,949 ----
    /// @endcond
  
    /// An iterator for the components of a path
+   /**
+    * @headerfile filesystem
+    * @since C++17
+    */
    class path::iterator
    {
    public:
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/hashtable.h gcc-12.4.0/libstdc++-v3/include/bits/hashtable.h
*** gcc-12.3.0/libstdc++-v3/include/bits/hashtable.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/hashtable.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 985,991 ****
        // DR 1189.
        // reserve, if present, comes from _Rehash_base.
  
! #if __cplusplus > 201402L
        /// Re-insert an extracted node into a container with unique keys.
        insert_return_type
        _M_reinsert_node(node_type&& __nh)
--- 985,991 ----
        // DR 1189.
        // reserve, if present, comes from _Rehash_base.
  
! #if __cplusplus > 201404L
        /// Re-insert an extracted node into a container with unique keys.
        insert_return_type
        _M_reinsert_node(node_type&& __nh)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1010,1016 ****
  	      {
  		__ret.position
  		  = _M_insert_unique_node(__bkt, __code, __nh._M_ptr);
! 		__nh._M_ptr = nullptr;
  		__ret.inserted = true;
  	      }
  	  }
--- 1010,1016 ----
  	      {
  		__ret.position
  		  = _M_insert_unique_node(__bkt, __code, __nh._M_ptr);
! 		__nh.release();
  		__ret.inserted = true;
  	      }
  	  }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1030,1036 ****
  	auto __code = this->_M_hash_code(__k);
  	auto __ret
  	  = _M_insert_multi_node(__hint._M_cur, __code, __nh._M_ptr);
! 	__nh._M_ptr = nullptr;
  	return __ret;
        }
  
--- 1030,1036 ----
  	auto __code = this->_M_hash_code(__k);
  	auto __ret
  	  = _M_insert_multi_node(__hint._M_cur, __code, __nh._M_ptr);
! 	__nh.release();
  	return __ret;
        }
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1055,1060 ****
--- 1055,1074 ----
  	return { __n, this->_M_node_allocator() };
        }
  
+       // Only use the possibly cached node's hash code if its hash function
+       // _H2 matches _Hash and is stateless. Otherwise recompute it using _Hash.
+       template
+ 	__hash_code
+ 	_M_src_hash_code(const _H2&, const key_type& __k,
+ 			 const __node_value_type& __src_n) const
+ 	{
+ 	  if constexpr (std::is_same_v<_H2, _Hash>)
+ 	    if constexpr (std::is_empty_v<_Hash>)
+ 	      return this->_M_hash_code(__src_n);
+ 
+ 	  return this->_M_hash_code(__k);
+ 	}
+ 
      public:
        // Extract a node.
        node_type
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1092,1104 ****
  	      auto __pos = __i++;
  	      const key_type& __k = _ExtractKey{}(*__pos);
  	      __hash_code __code
! 		= this->_M_hash_code(__src.hash_function(), *__pos._M_cur);
  	      size_type __bkt = _M_bucket_index(__code);
  	      if (_M_find_node(__bkt, __k, __code) == nullptr)
  		{
  		  auto __nh = __src.extract(__pos);
  		  _M_insert_unique_node(__bkt, __code, __nh._M_ptr, __n_elt);
! 		  __nh._M_ptr = nullptr;
  		  __n_elt = 1;
  		}
  	      else if (__n_elt != 1)
--- 1106,1118 ----
  	      auto __pos = __i++;
  	      const key_type& __k = _ExtractKey{}(*__pos);
  	      __hash_code __code
! 		= _M_src_hash_code(__src.hash_function(), __k, *__pos._M_cur);
  	      size_type __bkt = _M_bucket_index(__code);
  	      if (_M_find_node(__bkt, __k, __code) == nullptr)
  		{
  		  auto __nh = __src.extract(__pos);
  		  _M_insert_unique_node(__bkt, __code, __nh._M_ptr, __n_elt);
! 		  __nh.release();
  		  __n_elt = 1;
  		}
  	      else if (__n_elt != 1)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1120,1130 ****
  	  for (auto __i = __src.cbegin(), __end = __src.cend(); __i != __end;)
  	    {
  	      auto __pos = __i++;
  	      __hash_code __code
! 		= this->_M_hash_code(__src.hash_function(), *__pos._M_cur);
  	      auto __nh = __src.extract(__pos);
  	      __hint = _M_insert_multi_node(__hint, __code, __nh._M_ptr)._M_cur;
! 	      __nh._M_ptr = nullptr;
  	    }
  	}
  #endif // C++17
--- 1134,1145 ----
  	  for (auto __i = __src.cbegin(), __end = __src.cend(); __i != __end;)
  	    {
  	      auto __pos = __i++;
+ 	      const key_type& __k = _ExtractKey{}(*__pos);
  	      __hash_code __code
! 		= _M_src_hash_code(__src.hash_function(), __k, *__pos._M_cur);
  	      auto __nh = __src.extract(__pos);
  	      __hint = _M_insert_multi_node(__hint, __code, __nh._M_ptr)._M_cur;
! 	      __nh.release();
  	    }
  	}
  #endif // C++17
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/hashtable_policy.h gcc-12.4.0/libstdc++-v3/include/bits/hashtable_policy.h
*** gcc-12.3.0/libstdc++-v3/include/bits/hashtable_policy.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/hashtable_policy.h	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 291,308 ****
--- 291,312 ----
  
        __gnu_cxx::__aligned_buffer<_Value> _M_storage;
  
+       [[__gnu__::__always_inline__]]
        _Value*
        _M_valptr() noexcept
        { return _M_storage._M_ptr(); }
  
+       [[__gnu__::__always_inline__]]
        const _Value*
        _M_valptr() const noexcept
        { return _M_storage._M_ptr(); }
  
+       [[__gnu__::__always_inline__]]
        _Value&
        _M_v() noexcept
        { return *_M_valptr(); }
  
+       [[__gnu__::__always_inline__]]
        const _Value&
        _M_v() const noexcept
        { return *_M_valptr(); }
*************** namespace __detail
*** 1280,1298 ****
  	}
  
        __hash_code
-       _M_hash_code(const _Hash&,
- 		   const _Hash_node_value<_Value, true>& __n) const
-       { return __n._M_hash_code; }
- 
-       // Compute hash code using _Hash as __n _M_hash_code, if present, was
-       // computed using _H2.
-       template
- 	__hash_code
- 	_M_hash_code(const _H2&,
- 		const _Hash_node_value<_Value, __cache_hash_code>& __n) const
- 	{ return _M_hash_code(_ExtractKey{}(__n._M_v())); }
- 
-       __hash_code
        _M_hash_code(const _Hash_node_value<_Value, false>& __n) const
        { return _M_hash_code(_ExtractKey{}(__n._M_v())); }
  
--- 1284,1289 ----
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/iterator_concepts.h gcc-12.4.0/libstdc++-v3/include/bits/iterator_concepts.h
*** gcc-12.3.0/libstdc++-v3/include/bits/iterator_concepts.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/iterator_concepts.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 771,789 ****
        && invocable<_Fn, iter_reference_t<_Is>...>
      using indirect_result_t = invoke_result_t<_Fn, iter_reference_t<_Is>...>;
  
    /// [projected], projected
    template _Proj>
!     struct projected
!     {
!       using value_type = remove_cvref_t>;
! 
!       indirect_result_t<_Proj&, _Iter> operator*() const; // not defined
!     };
! 
!   template
!     struct incrementable_traits>
!     { using difference_type = iter_difference_t<_Iter>; };
  
    // [alg.req], common algorithm requirements
  
--- 771,804 ----
        && invocable<_Fn, iter_reference_t<_Is>...>
      using indirect_result_t = invoke_result_t<_Fn, iter_reference_t<_Is>...>;
  
+   namespace __detail
+   {
+     template
+       struct __projected
+       {
+ 	struct __type
+ 	{
+ 	  using value_type = remove_cvref_t>;
+ 	  indirect_result_t<_Proj&, _Iter> operator*() const; // not defined
+ 	};
+       };
+ 
+     template
+       struct __projected<_Iter, _Proj>
+       {
+ 	struct __type
+ 	{
+ 	  using value_type = remove_cvref_t>;
+ 	  using difference_type = iter_difference_t<_Iter>;
+ 	  indirect_result_t<_Proj&, _Iter> operator*() const; // not defined
+ 	};
+       };
+   } // namespace __detail
+ 
    /// [projected], projected
    template _Proj>
!     using projected = typename __detail::__projected<_Iter, _Proj>::__type;
  
    // [alg.req], common algorithm requirements
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/list.tcc gcc-12.4.0/libstdc++-v3/include/bits/list.tcc
*** gcc-12.3.0/libstdc++-v3/include/bits/list.tcc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/list.tcc	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 654,660 ****
  	    {
  	      // Move all nodes back into *this.
  	      __carry._M_put_all(end()._M_node);
! 	      for (int __i = 0; __i < sizeof(__tmp)/sizeof(__tmp[0]); ++__i)
  		__tmp[__i]._M_put_all(end()._M_node);
  	      __throw_exception_again;
  	    }
--- 654,660 ----
  	    {
  	      // Move all nodes back into *this.
  	      __carry._M_put_all(end()._M_node);
! 	      for (size_t __i = 0; __i < sizeof(__tmp)/sizeof(__tmp[0]); ++__i)
  		__tmp[__i]._M_put_all(end()._M_node);
  	      __throw_exception_again;
  	    }
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/new_allocator.h gcc-12.4.0/libstdc++-v3/include/bits/new_allocator.h
*** gcc-12.3.0/libstdc++-v3/include/bits/new_allocator.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/new_allocator.h	Thu Jun 20 08:08:10 2024
*************** namespace std _GLIBCXX_VISIBILITY(defaul
*** 43,56 ****
  _GLIBCXX_BEGIN_NAMESPACE_VERSION
  
    /**
!    *  @brief  An allocator that uses global new, as per C++03 [20.4.1].
!    *  @ingroup allocators
     *
!    *  This is precisely the allocator defined in the C++ Standard.
!    *    - all allocation calls operator new
!    *    - all deallocation calls operator delete
     *
!    *  @tparam  _Tp  Type of allocated object.
     */
    template
      class __new_allocator
--- 43,63 ----
  _GLIBCXX_BEGIN_NAMESPACE_VERSION
  
    /**
!    * @brief  An allocator that uses global `new`, as per C++03 [20.4.1].
!    * @ingroup allocators
     *
!    * This is precisely the allocator defined in the C++ Standard.
!    *   - all allocation calls `operator new`
!    *   - all deallocation calls `operator delete`
     *
!    * This is the default base-class implementation of `std::allocator`,
!    * and is also the base-class of the `__gnu_cxx::new_allocator` extension.
!    * You should use either `std::allocator` or `__gnu_cxx::new_allocator`
!    * instead of using this directly.
!    *
!    * @tparam  _Tp  Type of allocated object.
!    *
!    * @headerfile memory
     */
    template
      class __new_allocator
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 86,91 ****
--- 93,102 ----
  	_GLIBCXX20_CONSTEXPR
  	__new_allocator(const __new_allocator<_Tp1>&) _GLIBCXX_USE_NOEXCEPT { }
  
+ #if __cplusplus >= 201103L
+       __new_allocator& operator=(const __new_allocator&) = default;
+ #endif
+ 
  #if __cplusplus <= 201703L
        ~__new_allocator() _GLIBCXX_USE_NOEXCEPT { }
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/node_handle.h gcc-12.4.0/libstdc++-v3/include/bits/node_handle.h
*** gcc-12.3.0/libstdc++-v3/include/bits/node_handle.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/node_handle.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 168,173 ****
--- 168,183 ----
  	_M_ptr = nullptr;
        }
  
+       // Destroys the allocator. Does not deallocate or destroy the node.
+       // Precondition: !empty()
+       // Postcondition: empty()
+       void
+       release() noexcept
+       {
+ 	_M_alloc.release();
+ 	_M_ptr = nullptr;
+       }
+ 
      protected:
        typename _AllocTraits::pointer _M_ptr;
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 219,227 ****
  	  return __tmp;
  	}
  
- 	struct _Empty { };
- 
- 	[[__no_unique_address__]] _Empty     _M_empty;
  	[[__no_unique_address__]] _NodeAlloc _M_alloc;
        };
  
--- 229,234 ----
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 231,236 ****
--- 238,249 ----
  	       typename _Compare, typename _ValueAlloc>
  	friend class _Rb_tree;
  
+       template
+ 	friend class _Hashtable;
+ 
        /// @endcond
      };
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/ostream_insert.h gcc-12.4.0/libstdc++-v3/include/bits/ostream_insert.h
*** gcc-12.3.0/libstdc++-v3/include/bits/ostream_insert.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/ostream_insert.h	Thu Jun 20 08:08:10 2024
*************** namespace std _GLIBCXX_VISIBILITY(defaul
*** 40,45 ****
--- 40,47 ----
  {
  _GLIBCXX_BEGIN_NAMESPACE_VERSION
  
+   /// @cond undocumented
+ 
    template
      inline void
      __ostream_write(basic_ostream<_CharT, _Traits>& __out,
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 124,129 ****
--- 126,133 ----
  #endif
  #endif
  
+   /// @endcond
+ 
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace std
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/ptr_traits.h gcc-12.4.0/libstdc++-v3/include/bits/ptr_traits.h
*** gcc-12.3.0/libstdc++-v3/include/bits/ptr_traits.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/ptr_traits.h	Thu Jun 20 08:08:10 2024
*************** namespace std _GLIBCXX_VISIBILITY(defaul
*** 47,52 ****
--- 47,54 ----
  {
  _GLIBCXX_BEGIN_NAMESPACE_VERSION
  
+   /// @cond undocumented
+ 
    class __undefined;
  
    // For a specialization `SomeTemplate` the member `type` is T,
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 71,95 ****
      struct __replace_first_arg<_SomeTemplate<_Tp, _Types...>, _Up>
      { using type = _SomeTemplate<_Up, _Types...>; };
  
- #if __cpp_concepts
-   // When concepts are supported detection of _Ptr::element_type is done
-   // by a requires-clause, so __ptr_traits_elem_t only needs to do this:
-   template
-     using __ptr_traits_elem_t = typename __get_first_arg<_Ptr>::type;
- #else
    // Detect the element type of a pointer-like type.
    template
      struct __ptr_traits_elem : __get_first_arg<_Ptr>
      { };
  
    // Use _Ptr::element_type if is a valid type.
    template
      struct __ptr_traits_elem<_Ptr, __void_t>
      { using type = typename _Ptr::element_type; };
  
    template
      using __ptr_traits_elem_t = typename __ptr_traits_elem<_Ptr>::type;
! #endif
  
    // Define pointer_traits
    ::pointer_to.
    template::value>
--- 73,98 ----
      struct __replace_first_arg<_SomeTemplate<_Tp, _Types...>, _Up>
      { using type = _SomeTemplate<_Up, _Types...>; };
  
    // Detect the element type of a pointer-like type.
    template
      struct __ptr_traits_elem : __get_first_arg<_Ptr>
      { };
  
    // Use _Ptr::element_type if is a valid type.
+ #if __cpp_concepts
+   template requires requires { typename _Ptr::element_type; }
+     struct __ptr_traits_elem<_Ptr, void>
+     { using type = typename _Ptr::element_type; };
+ #else
    template
      struct __ptr_traits_elem<_Ptr, __void_t>
      { using type = typename _Ptr::element_type; };
+ #endif
  
    template
      using __ptr_traits_elem_t = typename __ptr_traits_elem<_Ptr>::type;
! 
!   /// @endcond
  
    // Define pointer_traits
    ::pointer_to.
    template::value>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 101,117 ****
        /**
         *  @brief  Obtain a pointer to an object
         *  @param  __r  A reference to an object of type `element_type`
!        *  @return `pointer::pointer_to(__e)`
!        *  @pre `pointer::pointer_to(__e)` is a valid expression.
        */
        static pointer
!       pointer_to(element_type& __e)
  #if __cpp_lib_concepts
        requires requires {
! 	{ pointer::pointer_to(__e) } -> convertible_to;
        }
  #endif
!       { return pointer::pointer_to(__e); }
      };
  
    // Do not define pointer_traits
    ::pointer_to if element type is void.
--- 104,120 ----
        /**
         *  @brief  Obtain a pointer to an object
         *  @param  __r  A reference to an object of type `element_type`
!        *  @return `pointer::pointer_to(__r)`
!        *  @pre `pointer::pointer_to(__r)` is a valid expression.
        */
        static pointer
!       pointer_to(element_type& __r)
  #if __cpp_lib_concepts
        requires requires {
! 	{ pointer::pointer_to(__r) } -> convertible_to;
        }
  #endif
!       { return pointer::pointer_to(__r); }
      };
  
    // Do not define pointer_traits
    ::pointer_to if element type is void.
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 140,168 ****
      struct __ptr_traits_impl : __ptr_traits_ptr_to<_Ptr, _Elt>
      {
      private:
-       template
- 	struct __difference { using type = ptrdiff_t; };
- 
        template
! #if __cpp_concepts
! 	requires requires { typename _Tp::difference_type; }
! 	struct __difference<_Tp>
! #else
! 	struct __difference<_Tp, __void_t>
! #endif
! 	{ using type = typename _Tp::difference_type; };
! 
!       template
! 	struct __rebind : __replace_first_arg<_Tp, _Up> { };
  
        template
! #if __cpp_concepts
! 	requires requires { typename _Tp::template rebind<_Up>; }
! 	struct __rebind<_Tp, _Up>
! #else
! 	struct __rebind<_Tp, _Up, __void_t>>
! #endif
! 	{ using type = typename _Tp::template rebind<_Up>; };
  
      public:
        /// The pointer type.
--- 143,153 ----
      struct __ptr_traits_impl : __ptr_traits_ptr_to<_Ptr, _Elt>
      {
      private:
        template
! 	using __diff_t = typename _Tp::difference_type;
  
        template
! 	using __rebind = __type_identity>;
  
      public:
        /// The pointer type.
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 172,182 ****
        using element_type = _Elt;
  
        /// The type used to represent the difference between two pointers.
!       using difference_type = typename __difference<_Ptr>::type;
  
        /// A pointer to a different type.
        template
!         using rebind = typename __rebind<_Ptr, _Up>::type;
      };
  
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
--- 157,168 ----
        using element_type = _Elt;
  
        /// The type used to represent the difference between two pointers.
!       using difference_type = __detected_or_t;
  
        /// A pointer to a different type.
        template
! 	using rebind = typename __detected_or_t<__replace_first_arg<_Ptr, _Up>,
! 						__rebind, _Ptr, _Up>::type;
      };
  
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 187,192 ****
--- 173,179 ----
  
    /**
     * @brief  Uniform interface to all pointer-like types
+    * @headerfile memory
     * @ingroup pointer_abstractions
     * @since C++11
    */
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 194,208 ****
      struct pointer_traits : __ptr_traits_impl<_Ptr, __ptr_traits_elem_t<_Ptr>>
      { };
  
- #if __cpp_concepts
-   template requires requires { typename _Ptr::element_type; }
-     struct pointer_traits<_Ptr>
-     : __ptr_traits_impl<_Ptr, typename _Ptr::element_type>
-     { };
- #endif
- 
    /**
     * @brief  Partial specialization for built-in pointers.
     * @ingroup pointer_abstractions
     * @since C++11
    */
--- 181,189 ----
      struct pointer_traits : __ptr_traits_impl<_Ptr, __ptr_traits_elem_t<_Ptr>>
      { };
  
    /**
     * @brief  Partial specialization for built-in pointers.
+    * @headerfile memory
     * @ingroup pointer_abstractions
     * @since C++11
    */
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/quoted_string.h gcc-12.4.0/libstdc++-v3/include/bits/quoted_string.h
*** gcc-12.3.0/libstdc++-v3/include/bits/quoted_string.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/quoted_string.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 85,98 ****
      /**
       * @brief Inserter for quoted strings.
       *
!      *  _GLIBCXX_RESOLVE_LIB_DEFECTS
!      *  DR 2344 quoted()'s interaction with padding is unclear
       */
      template
        std::basic_ostream<_CharT, _Traits>&
        operator<<(std::basic_ostream<_CharT, _Traits>& __os,
  		 const _Quoted_string& __str)
        {
  	std::basic_ostringstream<_CharT, _Traits> __ostr;
  	__ostr << __str._M_delim;
  	for (const _CharT* __c = __str._M_string; *__c; ++__c)
--- 85,99 ----
      /**
       * @brief Inserter for quoted strings.
       *
!      * @headerfile iomanip
       */
      template
        std::basic_ostream<_CharT, _Traits>&
        operator<<(std::basic_ostream<_CharT, _Traits>& __os,
  		 const _Quoted_string& __str)
        {
+ 	//  _GLIBCXX_RESOLVE_LIB_DEFECTS
+ 	//  DR 2344 quoted()'s interaction with padding is unclear
  	std::basic_ostringstream<_CharT, _Traits> __ostr;
  	__ostr << __str._M_delim;
  	for (const _CharT* __c = __str._M_string; *__c; ++__c)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 109,122 ****
      /**
       * @brief Inserter for quoted strings.
       *
!      *  _GLIBCXX_RESOLVE_LIB_DEFECTS
!      *  DR 2344 quoted()'s interaction with padding is unclear
       */
      template
        std::basic_ostream<_CharT, _Traits>&
        operator<<(std::basic_ostream<_CharT, _Traits>& __os,
  		 const _Quoted_string<_String, _CharT>& __str)
        {
  	std::basic_ostringstream<_CharT, _Traits> __ostr;
  	__ostr << __str._M_delim;
  	for (auto __c : __str._M_string)
--- 110,124 ----
      /**
       * @brief Inserter for quoted strings.
       *
!      * @headerfile iomanip
       */
      template
        std::basic_ostream<_CharT, _Traits>&
        operator<<(std::basic_ostream<_CharT, _Traits>& __os,
  		 const _Quoted_string<_String, _CharT>& __str)
        {
+ 	//  _GLIBCXX_RESOLVE_LIB_DEFECTS
+ 	//  DR 2344 quoted()'s interaction with padding is unclear
  	std::basic_ostringstream<_CharT, _Traits> __ostr;
  	__ostr << __str._M_delim;
  	for (auto __c : __str._M_string)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 133,138 ****
--- 135,142 ----
      /**
       * @brief Extractor for delimited strings.
       *        The left and right delimiters can be different.
+      *
+      * @headerfile iomanip
       */
      template
        std::basic_istream<_CharT, _Traits>&
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/random.tcc gcc-12.4.0/libstdc++-v3/include/bits/random.tcc
*** gcc-12.3.0/libstdc++-v3/include/bits/random.tcc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/random.tcc	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 541,548 ****
      subtract_with_carry_engine<_UIntType, __w, __s, __r>::
      seed(result_type __value)
      {
        std::linear_congruential_engine
! 	__lcg(__value == 0u ? default_seed : __value);
  
        const size_t __n = (__w + 31) / 32;
  
--- 541,551 ----
      subtract_with_carry_engine<_UIntType, __w, __s, __r>::
      seed(result_type __value)
      {
+       // _GLIBCXX_RESOLVE_LIB_DEFECTS
+       // 3809. Is std::subtract_with_carry_engine supposed to work?
+       // 4014. LWG 3809 changes behavior of some existing code
        std::linear_congruential_engine
! 	__lcg(__value == 0u ? default_seed : __value % 2147483563u);
  
        const size_t __n = (__w + 31) / 32;
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1500,1506 ****
  	  // sqrt(pi / 2)
  	  const double __spi_2 = 1.2533141373155002512078826424055226L;
  	  _M_s1 = std::sqrt(__np * __1p) * (1 + _M_d1 / (4 * __np));
! 	  _M_s2 = std::sqrt(__np * __1p) * (1 + _M_d2 / (4 * _M_t * __1p));
  	  _M_c = 2 * _M_d1 / __np;
  	  _M_a1 = std::exp(_M_c) * _M_s1 * __spi_2;
  	  const double __a12 = _M_a1 + _M_s2 * __spi_2;
--- 1503,1509 ----
  	  // sqrt(pi / 2)
  	  const double __spi_2 = 1.2533141373155002512078826424055226L;
  	  _M_s1 = std::sqrt(__np * __1p) * (1 + _M_d1 / (4 * __np));
! 	  _M_s2 = std::sqrt(__np * __1p) * (1 + _M_d2 / (4 * (_M_t * __1p)));
  	  _M_c = 2 * _M_d1 / __np;
  	  _M_a1 = std::exp(_M_c) * _M_s1 * __spi_2;
  	  const double __a12 = _M_a1 + _M_s2 * __spi_2;
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex.h gcc-12.4.0/libstdc++-v3/include/bits/regex.h
*** gcc-12.3.0/libstdc++-v3/include/bits/regex.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 88,93 ****
--- 88,96 ----
     * The class %regex is parameterized around a set of related types and
     * functions used to complete the definition of its semantics.  This class
     * satisfies the requirements of such a traits class.
+    *
+    * @headerfile regex
+    * @since C++11
     */
    template
      class regex_traits
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 392,402 ****
  
    // [7.8] Class basic_regex
    /**
!    * Objects of specializations of this class represent regular expressions
!    * constructed from sequences of character type @p _Ch_type.
     *
!    * Storage for the regular expression is allocated and deallocated as
!    * necessary by the member functions of this class.
     */
    template>
      class basic_regex
--- 395,418 ----
  
    // [7.8] Class basic_regex
    /**
!    * @brief A regular expression
     *
!    * Specializations of this class template represent regular expressions
!    * constructed from sequences of character type `_Ch_type`.
!    * Use the `std::regex` typedef for `std::basic_regex`.
!    *
!    * A character sequence passed to the constructor will be parsed according
!    * to the chosen grammar, and used to create a state machine representing
!    * the regular expression. The regex object can then be passed to algorithms
!    * such as `std::regex_match` to match sequences of characters.
!    *
!    * The `syntax_option_type` flag passed to the constructor selects from
!    * one of the supported regular expression grammars. The default is
!    * `ECMAScript` and the others are `basic`, `extended`, `awk`, `grep`, and
!    * `egrep`, which are variations on POSIX regular expressions.
!    *
!    * @headerfile regex
!    * @since C++11
     */
    template>
      class basic_regex
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 889,902 ****
     * An object of this class is essentially a pair of iterators marking a
     * matched subexpression within a regular expression pattern match. Such
     * objects can be converted to and compared with std::basic_string objects
!    * of a similar base character type as the pattern matched by the regular
     * expression.
     *
     * The iterators that make up the pair are the usual half-open interval
     * referencing the actual original pattern matched.
     */
    template
!     class sub_match : public std::pair<_BiIter, _BiIter>
      {
        typedef iterator_traits<_BiIter>			__iter_traits;
  	
--- 905,926 ----
     * An object of this class is essentially a pair of iterators marking a
     * matched subexpression within a regular expression pattern match. Such
     * objects can be converted to and compared with std::basic_string objects
!    * of the same character type as the pattern matched by the regular
     * expression.
     *
+    * A `sub_match` has a public base class of type `pair`,
+    * so inherits pair's data members named `first` and `second`.
     * The iterators that make up the pair are the usual half-open interval
     * referencing the actual original pattern matched.
+    *
+    * @headerfile regex
+    * @since C++11
     */
    template
!     class sub_match
!     /// @cond undocumented
!     : public std::pair<_BiIter, _BiIter>
!     /// @endcond
      {
        typedef iterator_traits<_BiIter>			__iter_traits;
  	
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 906,911 ****
--- 930,937 ----
        typedef _BiIter					iterator;
        typedef basic_string			string_type;
  
+       _GLIBCXX_DOXYGEN_ONLY(iterator first; iterator second;)
+ 
        bool matched;
  
        constexpr sub_match() noexcept : matched() { }
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 1713,1718 ****
--- 1739,1747 ----
     * of characters [first, second) which formed that match. Otherwise matched
     * is false, and members first and second point to the end of the sequence
     * that was searched.
+    *
+    * @headerfile regex
+    * @since C++11
     */
    template > >
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 1807,1812 ****
--- 1836,1851 ----
         */
        ~match_results() = default;
  
+       // _GLIBCXX_RESOLVE_LIB_DEFECTS
+       // 2195. Missing constructors for match_results
+ 
+       match_results(const match_results& __m, const _Alloc& __a)
+       : _Base_type(__m, __a) { }
+ 
+       match_results(match_results&& __m, const _Alloc& __a)
+       noexcept(noexcept(_Base_type(std::move(__m), __a)))
+       : _Base_type(std::move(__m), __a) { }
+ 
        ///@}
  
        // 28.10.2, state:
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 2139,2144 ****
--- 2178,2185 ----
     * @brief Compares two match_results for equality.
     * @returns true if the two objects refer to the same match,
     *          false otherwise.
+    *
+    * @relates match_results
     */
    template
      inline bool
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 2164,2169 ****
--- 2205,2212 ----
     * @brief Compares two match_results for inequality.
     * @returns true if the two objects do not refer to the same match,
     *          false otherwise.
+    *
+    * @relates match_results
     */
    template
      inline bool
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 2179,2184 ****
--- 2222,2229 ----
     * @param __rhs A match result.
     *
     * The contents of the two match_results objects are swapped.
+    *
+    * @relates match_results
     */
    template
      inline void
*************** _GLIBCXX_END_NAMESPACE_CXX11
*** 2191,2198 ****
    // [28.11.2] Function template regex_match
    /**
     * @name Matching, Searching, and Replacing
     */
-   ///@{
  
    /**
     * @brief Determines if there is a match between the regular expression @p e
--- 2236,2244 ----
    // [28.11.2] Function template regex_match
    /**
     * @name Matching, Searching, and Replacing
+    *
+    * @{
     */
  
    /**
     * @brief Determines if there is a match between the regular expression @p e
*************** _GLIBCXX_END_NAMESPACE_CXX11
*** 2500,2505 ****
--- 2546,2552 ----
  
    // std [28.11.4] Function template regex_replace
  
+   /// @cond undocumented
    template
      _Out_iter
*************** _GLIBCXX_END_NAMESPACE_CXX11
*** 2507,2512 ****
--- 2554,2560 ----
  		    const basic_regex<_Ch_type, _Rx_traits>& __e,
  		    const _Ch_type* __fmt, size_t __len,
  		    regex_constants::match_flag_type __flags);
+   /// @endcond
  
    /**
     * @brief Search for a regular expression within a range for multiple times,
*************** _GLIBCXX_END_NAMESPACE_CXX11
*** 2668,2674 ****
        return __result;
      }
  
!   ///@}
  
  _GLIBCXX_BEGIN_NAMESPACE_CXX11
  
--- 2716,2722 ----
        return __result;
      }
  
!   /// @}
  
  _GLIBCXX_BEGIN_NAMESPACE_CXX11
  
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 2676,2681 ****
--- 2724,2732 ----
    /**
     * An iterator adaptor that will provide repeated calls of regex_search over
     * a range until no more matches remain.
+    *
+    * @headerfile regex
+    * @since C++11
     */
    template::value_type,
*************** _GLIBCXX_BEGIN_NAMESPACE_CXX11
*** 2802,2807 ****
--- 2853,2861 ----
     * The purpose of this iterator is to enumerate all, or all specified,
     * matches of a regular expression within a text range.  The dereferenced
     * value of an iterator of this class is a std::sub_match object.
+    *
+    * @headerfile regex
+    * @since C++11
     */
    template::value_type,
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex_automaton.h gcc-12.4.0/libstdc++-v3/include/bits/regex_automaton.h
*** gcc-12.3.0/libstdc++-v3/include/bits/regex_automaton.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex_automaton.h	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 110,116 ****
  
  #ifdef _GLIBCXX_DEBUG
      std::ostream&
!     _M_print(std::ostream& ostr) const;
  
      // Prints graphviz dot commands for state.
      std::ostream&
--- 110,116 ----
  
  #ifdef _GLIBCXX_DEBUG
      std::ostream&
!     _M_print(std::ostream& __ostr) const;
  
      // Prints graphviz dot commands for state.
      std::ostream&
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex_automaton.tcc gcc-12.4.0/libstdc++-v3/include/bits/regex_automaton.tcc
*** gcc-12.3.0/libstdc++-v3/include/bits/regex_automaton.tcc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex_automaton.tcc	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 36,69 ****
  {
  #ifdef _GLIBCXX_DEBUG
    inline std::ostream&
!   _State_base::_M_print(std::ostream& ostr) const
    {
      switch (_M_opcode)
      {
        case _S_opcode_alternative:
        case _S_opcode_repeat:
! 	ostr << "alt next=" << _M_next << " alt=" << _M_alt;
  	break;
        case _S_opcode_subexpr_begin:
! 	ostr << "subexpr begin next=" << _M_next << " index=" << _M_subexpr;
  	break;
        case _S_opcode_subexpr_end:
! 	ostr << "subexpr end next=" << _M_next << " index=" << _M_subexpr;
  	break;
        case _S_opcode_backref:
! 	ostr << "backref next=" << _M_next << " index=" << _M_backref_index;
  	break;
        case _S_opcode_match:
! 	ostr << "match next=" << _M_next;
  	break;
        case _S_opcode_accept:
! 	ostr << "accept next=" << _M_next;
  	break;
        default:
! 	ostr << "unknown next=" << _M_next;
  	break;
      }
!     return ostr;
    }
  
    // Prints graphviz dot commands for state.
--- 36,69 ----
  {
  #ifdef _GLIBCXX_DEBUG
    inline std::ostream&
!   _State_base::_M_print(std::ostream& __ostr) const
    {
      switch (_M_opcode)
      {
        case _S_opcode_alternative:
        case _S_opcode_repeat:
! 	__ostr << "alt next=" << _M_next << " alt=" << _M_alt;
  	break;
        case _S_opcode_subexpr_begin:
! 	__ostr << "subexpr begin next=" << _M_next << " index=" << _M_subexpr;
  	break;
        case _S_opcode_subexpr_end:
! 	__ostr << "subexpr end next=" << _M_next << " index=" << _M_subexpr;
  	break;
        case _S_opcode_backref:
! 	__ostr << "backref next=" << _M_next << " index=" << _M_backref_index;
  	break;
        case _S_opcode_match:
! 	__ostr << "match next=" << _M_next;
  	break;
        case _S_opcode_accept:
! 	__ostr << "accept next=" << _M_next;
  	break;
        default:
! 	__ostr << "unknown next=" << _M_next;
  	break;
      }
!     return __ostr;
    }
  
    // Prints graphviz dot commands for state.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex_constants.h gcc-12.4.0/libstdc++-v3/include/bits/regex_constants.h
*** gcc-12.3.0/libstdc++-v3/include/bits/regex_constants.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex_constants.h	Thu Jun 20 08:08:10 2024
***************
*** 1,4 ****
! // class template regex -*- C++ -*-
  
  // Copyright (C) 2010-2022 Free Software Foundation, Inc.
  //
--- 1,4 ----
! // Namespace std::regex_constants -*- C++ -*-
  
  // Copyright (C) 2010-2022 Free Software Foundation, Inc.
  //
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 38,43 ****
--- 38,46 ----
   * @defgroup regex Regular Expressions
   *
   * A facility for performing regular expression pattern matching.
+  *
+  * @since C++11
+  *
   * @{
   */
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex_error.h gcc-12.4.0/libstdc++-v3/include/bits/regex_error.h
*** gcc-12.3.0/libstdc++-v3/include/bits/regex_error.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex_error.h	Thu Jun 20 08:08:10 2024
***************
*** 1,4 ****
! // class template regex -*- C++ -*-
  
  // Copyright (C) 2010-2022 Free Software Foundation, Inc.
  //
--- 1,4 ----
! // Errors for std::regex -*- C++ -*-
  
  // Copyright (C) 2010-2022 Free Software Foundation, Inc.
  //
*************** namespace regex_constants
*** 130,135 ****
--- 130,138 ----
     * @ingroup exceptions
     *
     * The regular expression library throws objects of this class on error.
+    *
+    * @headerfile regex
+    * @since C++11
     */
    class regex_error : public std::runtime_error
    {
*************** namespace regex_constants
*** 158,163 ****
--- 161,167 ----
      { return _M_code; }
  
    private:
+     /// @cond undocumented
      regex_error(error_type __ecode, const char* __what)
      : std::runtime_error(__what), _M_code(__ecode)
      { }
*************** namespace regex_constants
*** 167,172 ****
--- 171,177 ----
      __throw_regex_error(error_type __ecode __attribute__((__unused__)),
  			const char* __what __attribute__((__unused__)))
      { _GLIBCXX_THROW_OR_ABORT(regex_error(__ecode, __what)); }
+     /// @endcond
    };
  
    /// @cond undocumented
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex_executor.h gcc-12.4.0/libstdc++-v3/include/bits/regex_executor.h
*** gcc-12.3.0/libstdc++-v3/include/bits/regex_executor.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex_executor.h	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 71,84 ****
  		_ResultsVec&    __results,
  		const _RegexT&  __re,
  		_FlagT          __flags)
!       : _M_begin(__begin),
!       _M_end(__end),
!       _M_re(__re),
!       _M_nfa(*__re._M_automaton),
!       _M_results(__results),
!       _M_rep_count(_M_nfa.size()),
!       _M_states(_M_nfa._M_start(), _M_nfa.size()),
!       _M_flags(__flags)
        {
  	using namespace regex_constants;
  	if (__flags & match_prev_avail) // ignore not_bol and not_bow
--- 71,85 ----
  		_ResultsVec&    __results,
  		const _RegexT&  __re,
  		_FlagT          __flags)
!       : _M_cur_results(__results.get_allocator()),
! 	_M_begin(__begin),
! 	_M_end(__end),
! 	_M_re(__re),
! 	_M_nfa(*__re._M_automaton),
! 	_M_results(__results),
! 	_M_rep_count(_M_nfa.size()),
! 	_M_states(_M_nfa._M_start(), _M_nfa.size()),
! 	_M_flags(__flags)
        {
  	using namespace regex_constants;
  	if (__flags & match_prev_avail) // ignore not_bol and not_bow
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex_executor.tcc gcc-12.4.0/libstdc++-v3/include/bits/regex_executor.tcc
*** gcc-12.3.0/libstdc++-v3/include/bits/regex_executor.tcc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex_executor.tcc	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 124,132 ****
  	    break;
  	  std::fill_n(_M_states._M_visited_states, _M_nfa.size(), false);
  	  auto __old_queue = std::move(_M_states._M_match_queue);
  	  for (auto& __task : __old_queue)
  	    {
! 	      _M_cur_results = std::move(__task.second);
  	      _M_dfs(__match_mode, __task.first);
  	    }
  	  if (__match_mode == _Match_mode::_Prefix)
--- 124,133 ----
  	    break;
  	  std::fill_n(_M_states._M_visited_states, _M_nfa.size(), false);
  	  auto __old_queue = std::move(_M_states._M_match_queue);
+ 	  auto __alloc = _M_cur_results.get_allocator();
  	  for (auto& __task : __old_queue)
  	    {
! 	      _M_cur_results = _ResultsVec(std::move(__task.second), __alloc);
  	      _M_dfs(__match_mode, __task.first);
  	    }
  	  if (__match_mode == _Match_mode::_Prefix)
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/regex_scanner.tcc gcc-12.4.0/libstdc++-v3/include/bits/regex_scanner.tcc
*** gcc-12.3.0/libstdc++-v3/include/bits/regex_scanner.tcc	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/regex_scanner.tcc	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 484,581 ****
    template
      std::ostream&
      _Scanner<_CharT>::
!     _M_print(std::ostream& ostr)
      {
        switch (_M_token)
        {
        case _S_token_anychar:
! 	ostr << "any-character\n";
  	break;
        case _S_token_backref:
! 	ostr << "backref\n";
  	break;
        case _S_token_bracket_begin:
! 	ostr << "bracket-begin\n";
  	break;
        case _S_token_bracket_neg_begin:
! 	ostr << "bracket-neg-begin\n";
  	break;
        case _S_token_bracket_end:
! 	ostr << "bracket-end\n";
  	break;
        case _S_token_char_class_name:
! 	ostr << "char-class-name \"" << _M_value << "\"\n";
  	break;
        case _S_token_closure0:
! 	ostr << "closure0\n";
  	break;
        case _S_token_closure1:
! 	ostr << "closure1\n";
  	break;
        case _S_token_collsymbol:
! 	ostr << "collsymbol \"" << _M_value << "\"\n";
  	break;
        case _S_token_comma:
! 	ostr << "comma\n";
  	break;
        case _S_token_dup_count:
! 	ostr << "dup count: " << _M_value << "\n";
  	break;
        case _S_token_eof:
! 	ostr << "EOF\n";
  	break;
        case _S_token_equiv_class_name:
! 	ostr << "equiv-class-name \"" << _M_value << "\"\n";
  	break;
        case _S_token_interval_begin:
! 	ostr << "interval begin\n";
  	break;
        case _S_token_interval_end:
! 	ostr << "interval end\n";
  	break;
        case _S_token_line_begin:
! 	ostr << "line begin\n";
  	break;
        case _S_token_line_end:
! 	ostr << "line end\n";
  	break;
        case _S_token_opt:
! 	ostr << "opt\n";
  	break;
        case _S_token_or:
! 	ostr << "or\n";
  	break;
        case _S_token_ord_char:
! 	ostr << "ordinary character: \"" << _M_value << "\"\n";
  	break;
        case _S_token_subexpr_begin:
! 	ostr << "subexpr begin\n";
  	break;
        case _S_token_subexpr_no_group_begin:
! 	ostr << "no grouping subexpr begin\n";
  	break;
        case _S_token_subexpr_lookahead_begin:
! 	ostr << "lookahead subexpr begin\n";
  	break;
        case _S_token_subexpr_end:
! 	ostr << "subexpr end\n";
  	break;
        case _S_token_unknown:
! 	ostr << "-- unknown token --\n";
  	break;
        case _S_token_oct_num:
! 	ostr << "oct number " << _M_value << "\n";
  	break;
        case _S_token_hex_num:
! 	ostr << "hex number " << _M_value << "\n";
  	break;
        case _S_token_quoted_class:
! 	ostr << "quoted class " << "\\" << _M_value << "\n";
  	break;
        default:
  	_GLIBCXX_DEBUG_ASSERT(false);
        }
!       return ostr;
      }
  #endif
  
--- 484,581 ----
    template
      std::ostream&
      _Scanner<_CharT>::
!     _M_print(std::ostream& __ostr)
      {
        switch (_M_token)
        {
        case _S_token_anychar:
! 	__ostr << "any-character\n";
  	break;
        case _S_token_backref:
! 	__ostr << "backref\n";
  	break;
        case _S_token_bracket_begin:
! 	__ostr << "bracket-begin\n";
  	break;
        case _S_token_bracket_neg_begin:
! 	__ostr << "bracket-neg-begin\n";
  	break;
        case _S_token_bracket_end:
! 	__ostr << "bracket-end\n";
  	break;
        case _S_token_char_class_name:
! 	__ostr << "char-class-name \"" << _M_value << "\"\n";
  	break;
        case _S_token_closure0:
! 	__ostr << "closure0\n";
  	break;
        case _S_token_closure1:
! 	__ostr << "closure1\n";
  	break;
        case _S_token_collsymbol:
! 	__ostr << "collsymbol \"" << _M_value << "\"\n";
  	break;
        case _S_token_comma:
! 	__ostr << "comma\n";
  	break;
        case _S_token_dup_count:
! 	__ostr << "dup count: " << _M_value << "\n";
  	break;
        case _S_token_eof:
! 	__ostr << "EOF\n";
  	break;
        case _S_token_equiv_class_name:
! 	__ostr << "equiv-class-name \"" << _M_value << "\"\n";
  	break;
        case _S_token_interval_begin:
! 	__ostr << "interval begin\n";
  	break;
        case _S_token_interval_end:
! 	__ostr << "interval end\n";
  	break;
        case _S_token_line_begin:
! 	__ostr << "line begin\n";
  	break;
        case _S_token_line_end:
! 	__ostr << "line end\n";
  	break;
        case _S_token_opt:
! 	__ostr << "opt\n";
  	break;
        case _S_token_or:
! 	__ostr << "or\n";
  	break;
        case _S_token_ord_char:
! 	__ostr << "ordinary character: \"" << _M_value << "\"\n";
  	break;
        case _S_token_subexpr_begin:
! 	__ostr << "subexpr begin\n";
  	break;
        case _S_token_subexpr_no_group_begin:
! 	__ostr << "no grouping subexpr begin\n";
  	break;
        case _S_token_subexpr_lookahead_begin:
! 	__ostr << "lookahead subexpr begin\n";
  	break;
        case _S_token_subexpr_end:
! 	__ostr << "subexpr end\n";
  	break;
        case _S_token_unknown:
! 	__ostr << "-- unknown token --\n";
  	break;
        case _S_token_oct_num:
! 	__ostr << "oct number " << _M_value << "\n";
  	break;
        case _S_token_hex_num:
! 	__ostr << "hex number " << _M_value << "\n";
  	break;
        case _S_token_quoted_class:
! 	__ostr << "quoted class " << "\\" << _M_value << "\n";
  	break;
        default:
  	_GLIBCXX_DEBUG_ASSERT(false);
        }
!       return __ostr;
      }
  #endif
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/shared_ptr_atomic.h gcc-12.4.0/libstdc++-v3/include/bits/shared_ptr_atomic.h
*** gcc-12.3.0/libstdc++-v3/include/bits/shared_ptr_atomic.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/shared_ptr_atomic.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 64,72 ****
  
    /**
     * @addtogroup pointer_abstractions
     * @{
     */
-   /// @relates shared_ptr @{
  
    /// @cond undocumented
  
--- 64,72 ----
  
    /**
     * @addtogroup pointer_abstractions
+    * @relates shared_ptr
     * @{
     */
  
    /// @cond undocumented
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 120,127 ****
     *  @param  __p A non-null pointer to a shared_ptr object.
     *  @return @c *__p
     *
!    *  The memory order shall not be @c memory_order_release or
!    *  @c memory_order_acq_rel.
     *  @{
    */
    template
--- 120,127 ----
     *  @param  __p A non-null pointer to a shared_ptr object.
     *  @return @c *__p
     *
!    *  The memory order shall not be `memory_order_release` or
!    *  `memory_order_acq_rel`.
     *  @{
    */
    template
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 156,163 ****
     *  @param  __p A non-null pointer to a shared_ptr object.
     *  @param  __r The value to store.
     *
!    *  The memory order shall not be @c memory_order_acquire or
!    *  @c memory_order_acq_rel.
     *  @{
    */
    template
--- 156,163 ----
     *  @param  __p A non-null pointer to a shared_ptr object.
     *  @param  __r The value to store.
     *
!    *  The memory order shall not be `memory_order_acquire` or
!    *  `memory_order_acq_rel`.
     *  @{
    */
    template
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 193,200 ****
    /**
     *  @brief  Atomic exchange for shared_ptr objects.
     *  @param  __p A non-null pointer to a shared_ptr object.
!    *  @param  __r New value to store in @c *__p.
!    *  @return The original value of @c *__p
     *  @{
    */
    template
--- 193,200 ----
    /**
     *  @brief  Atomic exchange for shared_ptr objects.
     *  @param  __p A non-null pointer to a shared_ptr object.
!    *  @param  __r New value to store in `*__p`.
!    *  @return The original value of `*__p`
     *  @{
    */
    template
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 240,249 ****
     *  @param  __p A non-null pointer to a shared_ptr object.
     *  @param  __v A non-null pointer to a shared_ptr object.
     *  @param  __w A non-null pointer to a shared_ptr object.
!    *  @return True if @c *__p was equivalent to @c *__v, false otherwise.
     *
!    *  The memory order for failure shall not be @c memory_order_release or
!    *  @c memory_order_acq_rel, or stronger than the memory order for success.
     *  @{
    */
    template
--- 240,249 ----
     *  @param  __p A non-null pointer to a shared_ptr object.
     *  @param  __v A non-null pointer to a shared_ptr object.
     *  @param  __w A non-null pointer to a shared_ptr object.
!    *  @return True if `*__p` was equivalent to `*__v`, false otherwise.
     *
!    *  The memory order for failure shall not be `memory_order_release` or
!    *  `memory_order_acq_rel`.
     *  @{
    */
    template
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 353,362 ****
      }
    /// @}
  
  #if __cplusplus >= 202002L
  # define __cpp_lib_atomic_shared_ptr 201711L
    template
!     class atomic;
  
    template
      static constexpr bool __is_shared_ptr = false;
--- 353,370 ----
      }
    /// @}
  
+   /// @} group pointer_abstractions
+ 
  #if __cplusplus >= 202002L
  # define __cpp_lib_atomic_shared_ptr 201711L
    template
!     struct atomic;
! 
!   /**
!    * @addtogroup pointer_abstractions
!    * @relates shared_ptr
!    * @{
!    */
  
    template
      static constexpr bool __is_shared_ptr = false;
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 368,374 ****
      {
        using value_type = _Tp;
  
!       friend class atomic<_Tp>;
  
        // An atomic version of __shared_count<> and __weak_count<>.
        // Stores a _Sp_counted_base<>* but uses the LSB as a lock.
--- 376,382 ----
      {
        using value_type = _Tp;
  
!       friend struct atomic<_Tp>;
  
        // An atomic version of __shared_count<> and __weak_count<>.
        // Stores a _Sp_counted_base<>* but uses the LSB as a lock.
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 602,608 ****
      };
  
    template
!     class atomic>
      {
      public:
        using value_type = shared_ptr<_Tp>;
--- 610,616 ----
      };
  
    template
!     struct atomic>
      {
      public:
        using value_type = shared_ptr<_Tp>;
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 725,731 ****
      };
  
    template
!     class atomic>
      {
      public:
        using value_type = weak_ptr<_Tp>;
--- 733,739 ----
      };
  
    template
!     struct atomic>
      {
      public:
        using value_type = weak_ptr<_Tp>;
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 836,845 ****
      private:
        _Sp_atomic> _M_impl;
      };
- #endif // C++20
- 
-   /// @} relates shared_ptr
    /// @} group pointer_abstractions
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace
--- 844,851 ----
      private:
        _Sp_atomic> _M_impl;
      };
    /// @} group pointer_abstractions
+ #endif // C++20
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/shared_ptr_base.h gcc-12.4.0/libstdc++-v3/include/bits/shared_ptr_base.h
*** gcc-12.3.0/libstdc++-v3/include/bits/shared_ptr_base.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/shared_ptr_base.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1666,1671 ****
--- 1666,1674 ----
        { return _M_ptr; }
  
        /// Return true if the stored pointer is not null.
+ #if __cplusplus >= 202002L
+       [[__gnu__::__always_inline__]]
+ #endif
        explicit operator bool() const noexcept
        { return _M_ptr != nullptr; }
  
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/std_abs.h gcc-12.4.0/libstdc++-v3/include/bits/std_abs.h
*** gcc-12.3.0/libstdc++-v3/include/bits/std_abs.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/std_abs.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 101,111 ****
    __extension__ inline _GLIBCXX_CONSTEXPR
    __float128
    abs(__float128 __x)
!   { return __x < 0 ? -__x : __x; }
  #endif
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace
! } // extern "C"++"
  
  #endif // _GLIBCXX_BITS_STD_ABS_H
--- 101,120 ----
    __extension__ inline _GLIBCXX_CONSTEXPR
    __float128
    abs(__float128 __x)
!   {
! #if defined(_GLIBCXX_LDOUBLE_IS_IEEE_BINARY128)
!     return __builtin_fabsl(__x);
! #elif defined(_GLIBCXX_HAVE_FLOAT128_MATH)
!     return __builtin_fabsf128(__x);
! #else
!     // Assume that __builtin_signbit works for __float128.
!     return __builtin_signbit(__x) ? -__x : __x;
! #endif
!   }
  #endif
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace
! } // extern "C++"
  
  #endif // _GLIBCXX_BITS_STD_ABS_H
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/std_mutex.h gcc-12.4.0/libstdc++-v3/include/bits/std_mutex.h
*** gcc-12.3.0/libstdc++-v3/include/bits/std_mutex.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/std_mutex.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 53,58 ****
--- 53,60 ----
     */
  
  #ifdef _GLIBCXX_HAS_GTHREADS
+   /// @cond undocumented
+ 
    // Common base class for std::mutex and std::timed_mutex
    class __mutex_base
    {
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 78,85 ****
      __mutex_base(const __mutex_base&) = delete;
      __mutex_base& operator=(const __mutex_base&) = delete;
    };
  
!   /// The standard mutex type.
    class mutex : private __mutex_base
    {
    public:
--- 80,98 ----
      __mutex_base(const __mutex_base&) = delete;
      __mutex_base& operator=(const __mutex_base&) = delete;
    };
+   /// @endcond
  
!   /** The standard mutex type.
!    *
!    * A simple, non-recursive, non-timed mutex.
!    *
!    * Do not call `lock()` and `unlock()` directly, use a scoped lock type
!    * such as `std::unique_lock`, `std::lock_guard`, or (since C++17)
!    * `std::scoped_lock`.
!    *
!    * @headerfile mutex
!    * @since C++11
!    */
    class mutex : private __mutex_base
    {
    public:
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 123,128 ****
--- 136,143 ----
      { return &_M_mutex; }
    };
  
+   /// @cond undocumented
+ 
    // Implementation details for std::condition_variable
    class __condvar
    {
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 192,197 ****
--- 207,213 ----
      __gthread_cond_t _M_cond;
  #endif
    };
+   /// @endcond
  
  #endif // _GLIBCXX_HAS_GTHREADS
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 218,223 ****
--- 234,242 ----
     *
     * A lock_guard controls mutex ownership within a scope, releasing
     * ownership in the destructor.
+    *
+    * @headerfile mutex
+    * @since C++11
     */
    template
      class lock_guard
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_algo.h gcc-12.4.0/libstdc++-v3/include/bits/stl_algo.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_algo.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_algo.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1190,1197 ****
        return __m;
      }
  
!   inline namespace _V2
!   {
  
    /// This is a helper function for the rotate algorithm.
    template
--- 1190,1196 ----
        return __m;
      }
  
! _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(_V2)
  
    /// This is a helper function for the rotate algorithm.
    template
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1398,1404 ****
  			   std::__iterator_category(__first));
      }
  
!   } // namespace _V2
  
    /**
     *  @brief Copy a sequence, rotating its elements.
--- 1397,1403 ----
  			   std::__iterator_category(__first));
      }
  
! _GLIBCXX_END_INLINE_ABI_NAMESPACE(_V2)
  
    /**
     *  @brief Copy a sequence, rotating its elements.
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1618,1623 ****
--- 1617,1624 ----
  				     __gnu_cxx::__ops::__pred_iter(__pred));
      }
  
+   /// @cond undocumented
+ 
    /// This is a helper function for the sort routines.
    template
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1672,1677 ****
--- 1673,1680 ----
        return __result_real_last;
      }
  
+   /// @endcond
+ 
    /**
     *  @brief Copy the smallest elements of a sequence.
     *  @ingroup sorting_algorithms
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1681,1694 ****
     *  @param  __result_last    Another random-access iterator.
     *  @return   An iterator indicating the end of the resulting sequence.
     *
!    *  Copies and sorts the smallest N values from the range @p [__first,__last)
!    *  to the range beginning at @p __result_first, where the number of
!    *  elements to be copied, @p N, is the smaller of @p (__last-__first) and
!    *  @p (__result_last-__result_first).
!    *  After the sort if @e i and @e j are iterators in the range
!    *  @p [__result_first,__result_first+N) such that i precedes j then
!    *  *j<*i is false.
!    *  The value returned is @p __result_first+N.
    */
    template
      _GLIBCXX20_CONSTEXPR
--- 1684,1697 ----
     *  @param  __result_last    Another random-access iterator.
     *  @return   An iterator indicating the end of the resulting sequence.
     *
!    *  Copies and sorts the smallest `N` values from the range
!    *  `[__first, __last)` to the range beginning at `__result_first`, where
!    *  the number of elements to be copied, `N`, is the smaller of
!    *  `(__last - __first)` and `(__result_last - __result_first)`.
!    *  After the sort if `i` and `j` are iterators in the range
!    *  `[__result_first,__result_first + N)` such that `i` precedes `j` then
!    *  `*j < *i` is false.
!    *  The value returned is `__result_first + N`.
    */
    template
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1731,1744 ****
     *  @param  __comp    A comparison functor.
     *  @return   An iterator indicating the end of the resulting sequence.
     *
!    *  Copies and sorts the smallest N values from the range @p [__first,__last)
!    *  to the range beginning at @p result_first, where the number of
!    *  elements to be copied, @p N, is the smaller of @p (__last-__first) and
!    *  @p (__result_last-__result_first).
!    *  After the sort if @e i and @e j are iterators in the range
!    *  @p [__result_first,__result_first+N) such that i precedes j then
!    *  @p __comp(*j,*i) is false.
!    *  The value returned is @p __result_first+N.
    */
    template
--- 1734,1747 ----
     *  @param  __comp    A comparison functor.
     *  @return   An iterator indicating the end of the resulting sequence.
     *
!    *  Copies and sorts the smallest `N` values from the range
!    *  `[__first, __last)` to the range beginning at `result_first`, where
!    *  the number of elements to be copied, `N`, is the smaller of
!    *  `(__last - __first)` and `(__result_last - __result_first)`.
!    *  After the sort if `i` and `j` are iterators in the range
!    *  `[__result_first, __result_first + N)` such that `i` precedes `j` then
!    *  `__comp(*j, *i)` is false.
!    *  The value returned is `__result_first + N`.
    */
    template
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1775,1780 ****
--- 1778,1785 ----
  				__gnu_cxx::__ops::__iter_comp_iter(__comp));
      }
  
+   /// @cond undocumented
+ 
    /// This is a helper function for the sort routine.
    template
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1968,1988 ****
        std::__insertion_sort(__first, __last, __comp);
      }
  
    // nth_element
  
    // lower_bound moved to stl_algobase.h
  
    /**
!    *  @brief Finds the first position in which @p __val could be inserted
     *         without changing the ordering.
     *  @ingroup binary_search_algorithms
!    *  @param  __first   An iterator.
!    *  @param  __last    Another iterator.
     *  @param  __val     The search term.
     *  @param  __comp    A functor to use for comparisons.
!    *  @return An iterator pointing to the first element not less
!    *           than @p __val, or end() if every element is less
!    *           than @p __val.
     *  @ingroup binary_search_algorithms
     *
     *  The comparison function should have the same effects on ordering as
--- 1973,1994 ----
        std::__insertion_sort(__first, __last, __comp);
      }
  
+   /// @endcond
+ 
    // nth_element
  
    // lower_bound moved to stl_algobase.h
  
    /**
!    *  @brief Finds the first position in which `__val` could be inserted
     *         without changing the ordering.
     *  @ingroup binary_search_algorithms
!    *  @param  __first   An iterator to the start of a sorted range.
!    *  @param  __last    A past-the-end iterator for the sorted range.
     *  @param  __val     The search term.
     *  @param  __comp    A functor to use for comparisons.
!    *  @return An iterator pointing to the first element _not less than_
!    *           `__val`, or `end()` if every element is less than `__val`.
     *  @ingroup binary_search_algorithms
     *
     *  The comparison function should have the same effects on ordering as
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4314,4321 ****
     *  @param  __new_value  The replacement value.
     *  @return   replace() returns no value.
     *
!    *  For each iterator @c i in the range @p [__first,__last) if @c *i ==
!    *  @p __old_value then the assignment @c *i = @p __new_value is performed.
    */
    template
      _GLIBCXX20_CONSTEXPR
--- 4320,4327 ----
     *  @param  __new_value  The replacement value.
     *  @return   replace() returns no value.
     *
!    *  For each iterator `i` in the range `[__first,__last)` if
!    *  `*i == __old_value` then the assignment `*i = __new_value` is performed.
    */
    template
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4347,4354 ****
     *  @param  __new_value  The replacement value.
     *  @return   replace_if() returns no value.
     *
!    *  For each iterator @c i in the range @p [__first,__last) if @p __pred(*i)
!    *  is true then the assignment @c *i = @p __new_value is performed.
    */
    template
      _GLIBCXX20_CONSTEXPR
--- 4353,4360 ----
     *  @param  __new_value  The replacement value.
     *  @return   replace_if() returns no value.
     *
!    *  For each iterator `i` in the range `[__first,__last)` if `__pred(*i)`
!    *  is true then the assignment `*i = __new_value` is performed.
    */
    template
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4376,4387 ****
     *  @ingroup mutating_algorithms
     *  @param  __first  A forward iterator.
     *  @param  __last   A forward iterator.
!    *  @param  __gen    A function object taking no arguments and returning
!    *                 std::iterator_traits<_ForwardIterator>::value_type
     *  @return   generate() returns no value.
     *
!    *  Performs the assignment @c *i = @p __gen() for each @c i in the range
!    *  @p [__first,__last).
    */
    template
      _GLIBCXX20_CONSTEXPR
--- 4382,4392 ----
     *  @ingroup mutating_algorithms
     *  @param  __first  A forward iterator.
     *  @param  __last   A forward iterator.
!    *  @param  __gen    A function object callable with no arguments.
     *  @return   generate() returns no value.
     *
!    *  Performs the assignment `*i = __gen()` for each `i` in the range
!    *  `[__first, __last)`.
    */
    template
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4405,4418 ****
     *  @ingroup mutating_algorithms
     *  @param  __first  A forward iterator.
     *  @param  __n      The length of the sequence.
!    *  @param  __gen    A function object taking no arguments and returning
!    *                 std::iterator_traits<_ForwardIterator>::value_type
!    *  @return   The end of the sequence, @p __first+__n
     *
!    *  Performs the assignment @c *i = @p __gen() for each @c i in the range
!    *  @p [__first,__first+__n).
     *
!    * If @p __n is negative, the function does nothing and returns @p __first.
    */
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
    // DR 865. More algorithms that throw away information
--- 4410,4422 ----
     *  @ingroup mutating_algorithms
     *  @param  __first  A forward iterator.
     *  @param  __n      The length of the sequence.
!    *  @param  __gen    A function object callable with no arguments.
!    *  @return   The end of the sequence, i.e., `__first + __n`
     *
!    *  Performs the assignment `*i = __gen()` for each `i` in the range
!    *  `[__first, __first + __n)`.
     *
!    * If `__n` is negative, the function does nothing and returns `__first`.
    */
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
    // DR 865. More algorithms that throw away information
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4442,4460 ****
     *  @param  __result  An output iterator.
     *  @return   An iterator designating the end of the resulting sequence.
     *
!    *  Copies each element in the range @p [__first,__last) to the range
!    *  beginning at @p __result, except that only the first element is copied
     *  from groups of consecutive elements that compare equal.
!    *  unique_copy() is stable, so the relative order of elements that are
     *  copied is unchanged.
!    *
!    *  _GLIBCXX_RESOLVE_LIB_DEFECTS
!    *  DR 241. Does unique_copy() require CopyConstructible and Assignable?
!    *  
!    *  _GLIBCXX_RESOLVE_LIB_DEFECTS
!    *  DR 538. 241 again: Does unique_copy() require CopyConstructible and 
!    *  Assignable?
!   */
    template
      _GLIBCXX20_CONSTEXPR
      inline _OutputIterator
--- 4446,4461 ----
     *  @param  __result  An output iterator.
     *  @return   An iterator designating the end of the resulting sequence.
     *
!    *  Copies each element in the range `[__first, __last)` to the range
!    *  beginning at `__result`, except that only the first element is copied
     *  from groups of consecutive elements that compare equal.
!    *  `unique_copy()` is stable, so the relative order of elements that are
     *  copied is unchanged.
!    */
!   // _GLIBCXX_RESOLVE_LIB_DEFECTS
!   // DR 241. Does unique_copy() require CopyConstructible and Assignable?
!   // DR 538. 241 again: Does unique_copy() require CopyConstructible and
!   // Assignable?
    template
      _GLIBCXX20_CONSTEXPR
      inline _OutputIterator
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4486,4501 ****
     *  @param  __binary_pred  A binary predicate.
     *  @return   An iterator designating the end of the resulting sequence.
     *
!    *  Copies each element in the range @p [__first,__last) to the range
!    *  beginning at @p __result, except that only the first element is copied
!    *  from groups of consecutive elements for which @p __binary_pred returns
     *  true.
!    *  unique_copy() is stable, so the relative order of elements that are
     *  copied is unchanged.
!    *
!    *  _GLIBCXX_RESOLVE_LIB_DEFECTS
!    *  DR 241. Does unique_copy() require CopyConstructible and Assignable?
!   */
    template
      _GLIBCXX20_CONSTEXPR
--- 4487,4501 ----
     *  @param  __binary_pred  A binary predicate.
     *  @return   An iterator designating the end of the resulting sequence.
     *
!    *  Copies each element in the range `[__first, __last)` to the range
!    *  beginning at `__result`, except that only the first element is copied
!    *  from groups of consecutive elements for which `__binary_pred` returns
     *  true.
!    *  `unique_copy()` is stable, so the relative order of elements that are
     *  copied is unchanged.
!    */
!   // _GLIBCXX_RESOLVE_LIB_DEFECTS
!   // DR 241. Does unique_copy() require CopyConstructible and Assignable?
    template
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4527,4538 ****
     *  @param  __last    A forward iterator.
     *  @return  Nothing.
     *
!    *  Reorder the elements in the range @p [__first,__last) using a random
     *  distribution, so that every possible ordering of the sequence is
     *  equally likely.
     *
     *  @deprecated
!    *  Since C++14 `std::random_shuffle` is not part of the C++ standard.
     *  Use `std::shuffle` instead, which was introduced in C++11.
    */
    template
--- 4527,4538 ----
     *  @param  __last    A forward iterator.
     *  @return  Nothing.
     *
!    *  Reorder the elements in the range `[__first, __last)` using a random
     *  distribution, so that every possible ordering of the sequence is
     *  equally likely.
     *
     *  @deprecated
!    *  Since C++17, `std::random_shuffle` is not part of the C++ standard.
     *  Use `std::shuffle` instead, which was introduced in C++11.
    */
    template
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4566,4578 ****
     *  @param  __rand    The RNG functor or function.
     *  @return  Nothing.
     *
!    *  Reorders the elements in the range @p [__first,__last) using @p __rand to
!    *  provide a random distribution. Calling @p __rand(N) for a positive
!    *  integer @p N should return a randomly chosen integer from the
!    *  range [0,N).
     *
     *  @deprecated
!    *  Since C++14 `std::random_shuffle` is not part of the C++ standard.
     *  Use `std::shuffle` instead, which was introduced in C++11.
    */
    template
--- 4566,4578 ----
     *  @param  __rand    The RNG functor or function.
     *  @return  Nothing.
     *
!    *  Reorders the elements in the range `[__first, __last)` using `__rand`
!    *  to provide a random distribution. Calling `__rand(N)` for a positive
!    *  integer `N` should return a randomly chosen integer from the
!    *  range `[0, N)`.
     *
     *  @deprecated
!    *  Since C++17, `std::random_shuffle` is not part of the C++ standard.
     *  Use `std::shuffle` instead, which was introduced in C++11.
    */
    template
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4608,4620 ****
     *  @param  __first   A forward iterator.
     *  @param  __last    A forward iterator.
     *  @param  __pred    A predicate functor.
!    *  @return  An iterator @p middle such that @p __pred(i) is true for each
!    *  iterator @p i in the range @p [__first,middle) and false for each @p i
!    *  in the range @p [middle,__last).
     *
!    *  @p __pred must not modify its operand. @p partition() does not preserve
     *  the relative ordering of elements in each group, use
!    *  @p stable_partition() if this is needed.
    */
    template
      _GLIBCXX20_CONSTEXPR
--- 4608,4620 ----
     *  @param  __first   A forward iterator.
     *  @param  __last    A forward iterator.
     *  @param  __pred    A predicate functor.
!    *  @return  An iterator `middle` such that `__pred(i)` is true for each
!    *  iterator `i` in the range `[__first, middle)` and false for each `i`
!    *  in the range `[middle, __last)`.
     *
!    *  `__pred` must not modify its operand. `partition()` does not preserve
     *  the relative ordering of elements in each group, use
!    *  `stable_partition()` if this is needed.
    */
    template
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4642,4654 ****
     *  @param  __last    Another iterator.
     *  @return  Nothing.
     *
!    *  Sorts the smallest @p (__middle-__first) elements in the range
!    *  @p [first,last) and moves them to the range @p [__first,__middle). The
!    *  order of the remaining elements in the range @p [__middle,__last) is
!    *  undefined.
!    *  After the sort if @e i and @e j are iterators in the range
!    *  @p [__first,__middle) such that i precedes j and @e k is an iterator in
!    *  the range @p [__middle,__last) then *j<*i and *k<*i are both false.
    */
    template
      _GLIBCXX20_CONSTEXPR
--- 4642,4655 ----
     *  @param  __last    Another iterator.
     *  @return  Nothing.
     *
!    *  Sorts the smallest `(__middle - __first)` elements in the range
!    *  `[first, last)` and moves them to the range `[__first, __middle)`. The
!    *  order of the remaining elements in the range `[__middle, __last)` is
!    *  unspecified.
!    *  After the sort if `i` and `j` are iterators in the range
!    *  `[__first, __middle)` such that `i` precedes `j` and `k` is an iterator
!    *  in the range `[__middle, __last)` then `*j < *i` and `*k < *i` are
!    *  both false.
    */
    template
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4680,4693 ****
     *  @param  __comp    A comparison functor.
     *  @return  Nothing.
     *
!    *  Sorts the smallest @p (__middle-__first) elements in the range
!    *  @p [__first,__last) and moves them to the range @p [__first,__middle). The
!    *  order of the remaining elements in the range @p [__middle,__last) is
!    *  undefined.
!    *  After the sort if @e i and @e j are iterators in the range
!    *  @p [__first,__middle) such that i precedes j and @e k is an iterator in
!    *  the range @p [__middle,__last) then @p *__comp(j,*i) and @p __comp(*k,*i)
!    *  are both false.
    */
    template
      _GLIBCXX20_CONSTEXPR
--- 4681,4694 ----
     *  @param  __comp    A comparison functor.
     *  @return  Nothing.
     *
!    *  Sorts the smallest `(__middle - __first)` elements in the range
!    *  `[__first, __last)` and moves them to the range `[__first, __middle)`.
!    *  The order of the remaining elements in the range `[__middle, __last)` is
!    *  unspecified.
!    *  After the sort if `i` and `j` are iterators in the range
!    *  `[__first, __middle)` such that `i` precedes `j` and `k` is an iterator
!    *  in the range `[__middle, __last)` then `*__comp(j, *i)` and
!    *  `__comp(*k, *i)` are both false.
    */
    template
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4719,4730 ****
     *  @param  __last    Another iterator.
     *  @return  Nothing.
     *
!    *  Rearranges the elements in the range @p [__first,__last) so that @p *__nth
     *  is the same element that would have been in that position had the
!    *  whole sequence been sorted. The elements either side of @p *__nth are
!    *  not completely sorted, but for any iterator @e i in the range
!    *  @p [__first,__nth) and any iterator @e j in the range @p [__nth,__last) it
!    *  holds that *j < *i is false.
    */
    template
      _GLIBCXX20_CONSTEXPR
--- 4720,4731 ----
     *  @param  __last    Another iterator.
     *  @return  Nothing.
     *
!    *  Rearranges the elements in the range `[__first, __last)` so that `*__nth`
     *  is the same element that would have been in that position had the
!    *  whole sequence been sorted. The elements either side of `*__nth` are
!    *  not completely sorted, but for any iterator `i` in the range
!    *  `[__first, __nth)` and any iterator `j` in the range `[__nth, __last)` it
!    *  holds that `*j < *i` is false.
    */
    template
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4759,4770 ****
     *  @param  __comp    A comparison functor.
     *  @return  Nothing.
     *
!    *  Rearranges the elements in the range @p [__first,__last) so that @p *__nth
     *  is the same element that would have been in that position had the
!    *  whole sequence been sorted. The elements either side of @p *__nth are
!    *  not completely sorted, but for any iterator @e i in the range
!    *  @p [__first,__nth) and any iterator @e j in the range @p [__nth,__last) it
!    *  holds that @p __comp(*j,*i) is false.
    */
    template
      _GLIBCXX20_CONSTEXPR
--- 4760,4771 ----
     *  @param  __comp    A comparison functor.
     *  @return  Nothing.
     *
!    *  Rearranges the elements in the range `[__first, __last)` so that `*__nth`
     *  is the same element that would have been in that position had the
!    *  whole sequence been sorted. The elements either side of `*__nth` are
!    *  not completely sorted, but for any iterator `i` in the range
!    *  `[__first, __nth)` and any iterator `j` in the range `[__nth, __last)`
!    *  it holds that `__comp(*j, *i)` is false.
    */
    template
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4797,4808 ****
     *  @param  __last    Another iterator.
     *  @return  Nothing.
     *
!    *  Sorts the elements in the range @p [__first,__last) in ascending order,
!    *  such that for each iterator @e i in the range @p [__first,__last-1),  
!    *  *(i+1)<*i is false.
     *
     *  The relative ordering of equivalent elements is not preserved, use
!    *  @p stable_sort() if this is needed.
    */
    template
      _GLIBCXX20_CONSTEXPR
--- 4798,4809 ----
     *  @param  __last    Another iterator.
     *  @return  Nothing.
     *
!    *  Sorts the elements in the range `[__first, __last)` in ascending order,
!    *  such that for each iterator `i` in the range `[__first, __last - 1)`,
!    *  `*(i+1) < *i` is false.
     *
     *  The relative ordering of equivalent elements is not preserved, use
!    *  `stable_sort()` if this is needed.
    */
    template
      _GLIBCXX20_CONSTEXPR
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 4828,4839 ****
     *  @param  __comp    A comparison functor.
     *  @return  Nothing.
     *
!    *  Sorts the elements in the range @p [__first,__last) in ascending order,
!    *  such that @p __comp(*(i+1),*i) is false for every iterator @e i in the
!    *  range @p [__first,__last-1).
     *
     *  The relative ordering of equivalent elements is not preserved, use
!    *  @p stable_sort() if this is needed.
    */
    template
      _GLIBCXX20_CONSTEXPR
--- 4829,4840 ----
     *  @param  __comp    A comparison functor.
     *  @return  Nothing.
     *
!    *  Sorts the elements in the range `[__first, __last)` in ascending order,
!    *  such that `__comp(*(i+1), *i)` is false for every iterator `i` in the
!    *  range `[__first, __last - 1)`.
     *
     *  The relative ordering of equivalent elements is not preserved, use
!    *  `stable_sort()` if this is needed.
    */
    template
      _GLIBCXX20_CONSTEXPR
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_algobase.h gcc-12.4.0/libstdc++-v3/include/bits/stl_algobase.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_algobase.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_algobase.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 388,393 ****
--- 388,398 ----
  	    }
  	  return __result;
  	}
+ 
+       template
+ 	static void
+ 	__assign_one(_Tp* __to, _Up* __from)
+ 	{ *__to = *__from; }
      };
  
  #if __cplusplus >= 201103L
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 408,434 ****
  	    }
  	  return __result;
  	}
      };
  #endif
  
    template
      struct __copy_move<_IsMove, true, random_access_iterator_tag>
      {
!       template
  	_GLIBCXX20_CONSTEXPR
! 	static _Tp*
! 	__copy_m(const _Tp* __first, const _Tp* __last, _Tp* __result)
  	{
- #if __cplusplus >= 201103L
- 	  using __assignable = __conditional_t<_IsMove,
- 					       is_move_assignable<_Tp>,
- 					       is_copy_assignable<_Tp>>;
- 	  // trivial types can have deleted assignment
- 	  static_assert( __assignable::value, "type must be assignable" );
- #endif
  	  const ptrdiff_t _Num = __last - __first;
! 	  if (_Num)
  	    __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);
  	  return __result + _Num;
  	}
      };
--- 413,440 ----
  	    }
  	  return __result;
  	}
+ 
+       template
+ 	static void
+ 	__assign_one(_Tp* __to, _Up* __from)
+ 	{ *__to = std::move(*__from); }
      };
  #endif
  
    template
      struct __copy_move<_IsMove, true, random_access_iterator_tag>
      {
!       template
  	_GLIBCXX20_CONSTEXPR
! 	static _Up*
! 	__copy_m(_Tp* __first, _Tp* __last, _Up* __result)
  	{
  	  const ptrdiff_t _Num = __last - __first;
! 	  if (__builtin_expect(_Num > 1, true))
  	    __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);
+ 	  else if (_Num == 1)
+ 	    std::__copy_move<_IsMove, false, random_access_iterator_tag>::
+ 	      __assign_one(__result, __first);
  	  return __result + _Num;
  	}
      };
*************** _GLIBCXX_END_NAMESPACE_CONTAINER
*** 725,745 ****
    template
      struct __copy_move_backward<_IsMove, true, random_access_iterator_tag>
      {
!       template
  	_GLIBCXX20_CONSTEXPR
! 	static _Tp*
! 	__copy_move_b(const _Tp* __first, const _Tp* __last, _Tp* __result)
  	{
- #if __cplusplus >= 201103L
- 	  using __assignable = __conditional_t<_IsMove,
- 					       is_move_assignable<_Tp>,
- 					       is_copy_assignable<_Tp>>;
- 	  // trivial types can have deleted assignment
- 	  static_assert( __assignable::value, "type must be assignable" );
- #endif
  	  const ptrdiff_t _Num = __last - __first;
! 	  if (_Num)
  	    __builtin_memmove(__result - _Num, __first, sizeof(_Tp) * _Num);
  	  return __result - _Num;
  	}
      };
--- 731,747 ----
    template
      struct __copy_move_backward<_IsMove, true, random_access_iterator_tag>
      {
!       template
  	_GLIBCXX20_CONSTEXPR
! 	static _Up*
! 	__copy_move_b(_Tp* __first, _Tp* __last, _Up* __result)
  	{
  	  const ptrdiff_t _Num = __last - __first;
! 	  if (__builtin_expect(_Num > 1, true))
  	    __builtin_memmove(__result - _Num, __first, sizeof(_Tp) * _Num);
+ 	  else if (_Num == 1)
+ 	    std::__copy_move<_IsMove, false, random_access_iterator_tag>::
+ 	      __assign_one(__result - 1, __first);
  	  return __result - _Num;
  	}
      };
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 1778,1788 ****
      }
  
  #if __cpp_lib_three_way_comparison
!   // Iter points to a contiguous range of unsigned narrow character type
!   // or std::byte, suitable for comparison by memcmp.
!   template
!     concept __is_byte_iter = contiguous_iterator<_Iter>
!       && __is_memcmp_ordered>::__value;
  
    // Return a struct with two members, initialized to the smaller of x and y
    // (or x if they compare equal) and the result of the comparison x <=> y.
--- 1780,1793 ----
      }
  
  #if __cpp_lib_three_way_comparison
!   // Both iterators refer to contiguous ranges of unsigned narrow characters,
!   // or std::byte, or big-endian unsigned integers, suitable for comparison
!   // using memcmp.
!   template
!     concept __memcmp_ordered_with
!       = (__is_memcmp_ordered_with,
! 				  iter_value_t<_Iter2>>::__value)
! 	  && contiguous_iterator<_Iter1> && contiguous_iterator<_Iter2>;
  
    // Return a struct with two members, initialized to the smaller of x and y
    // (or x if they compare equal) and the result of the comparison x <=> y.
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 1832,1851 ****
        if (!std::__is_constant_evaluated())
  	if constexpr (same_as<_Comp, __detail::_Synth3way>
  		      || same_as<_Comp, compare_three_way>)
! 	  if constexpr (__is_byte_iter<_InputIter1>)
! 	    if constexpr (__is_byte_iter<_InputIter2>)
! 	      {
! 		const auto [__len, __lencmp] = _GLIBCXX_STD_A::
! 		  __min_cmp(__last1 - __first1, __last2 - __first2);
! 		if (__len)
! 		  {
! 		    const auto __c
! 		      = __builtin_memcmp(&*__first1, &*__first2, __len) <=> 0;
! 		    if (__c != 0)
! 		      return __c;
! 		  }
! 		return __lencmp;
! 	      }
  
        while (__first1 != __last1)
  	{
--- 1837,1856 ----
        if (!std::__is_constant_evaluated())
  	if constexpr (same_as<_Comp, __detail::_Synth3way>
  		      || same_as<_Comp, compare_three_way>)
! 	  if constexpr (__memcmp_ordered_with<_InputIter1, _InputIter2>)
! 	    {
! 	      const auto [__len, __lencmp] = _GLIBCXX_STD_A::
! 		__min_cmp(__last1 - __first1, __last2 - __first2);
! 	      if (__len)
! 		{
! 		  const auto __blen = __len * sizeof(*__first1);
! 		  const auto __c
! 		    = __builtin_memcmp(&*__first1, &*__first2, __blen) <=> 0;
! 		  if (__c != 0)
! 		    return __c;
! 		}
! 	      return __lencmp;
! 	    }
  
        while (__first1 != __last1)
  	{
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_bvector.h gcc-12.4.0/libstdc++-v3/include/bits/stl_bvector.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_bvector.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_bvector.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 629,641 ****
        _M_allocate(size_t __n)
        {
  	_Bit_pointer __p = _Bit_alloc_traits::allocate(_M_impl, _S_nword(__n));
! #if __cpp_lib_is_constant_evaluated
  	if (std::is_constant_evaluated())
! 	{
! 	  __n = _S_nword(__n);
! 	  for (size_t __i = 0; __i < __n; ++__i)
! 	    __p[__i] = 0ul;
! 	}
  #endif
  	return __p;
        }
--- 629,641 ----
        _M_allocate(size_t __n)
        {
  	_Bit_pointer __p = _Bit_alloc_traits::allocate(_M_impl, _S_nword(__n));
! #if __cpp_lib_is_constant_evaluated && __cpp_constexpr_dynamic_alloc
  	if (std::is_constant_evaluated())
! 	  {
! 	    __n = _S_nword(__n);
! 	    for (size_t __i = 0; __i < __n; ++__i)
! 	      std::construct_at(std::to_address(__p) + __i);
! 	  }
  #endif
  	return __p;
        }
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 672,677 ****
--- 672,679 ----
     *  access to individual elements in any order.
     *
     *  @ingroup sequences
+    *  @headerfile vector
+    *  @since C++98
     *
     *  @tparam _Alloc  Allocator type.
     *
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_construct.h gcc-12.4.0/libstdc++-v3/include/bits/stl_construct.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_construct.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_construct.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 190,196 ****
  #endif
  #if __cplusplus >= 202002L
        if (std::__is_constant_evaluated())
! 	return _Destroy_aux::__destroy(__first, __last);
  #endif
        std::_Destroy_aux<__has_trivial_destructor(_Value_type)>::
  	__destroy(__first, __last);
--- 190,196 ----
  #endif
  #if __cplusplus >= 202002L
        if (std::__is_constant_evaluated())
! 	return std::_Destroy_aux::__destroy(__first, __last);
  #endif
        std::_Destroy_aux<__has_trivial_destructor(_Value_type)>::
  	__destroy(__first, __last);
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 239,245 ****
  #endif
  #if __cplusplus >= 202002L
        if (std::__is_constant_evaluated())
! 	return _Destroy_n_aux::__destroy_n(__first, __count);
  #endif
        return std::_Destroy_n_aux<__has_trivial_destructor(_Value_type)>::
  	__destroy_n(__first, __count);
--- 239,245 ----
  #endif
  #if __cplusplus >= 202002L
        if (std::__is_constant_evaluated())
! 	return std::_Destroy_n_aux::__destroy_n(__first, __count);
  #endif
        return std::_Destroy_n_aux<__has_trivial_destructor(_Value_type)>::
  	__destroy_n(__first, __count);
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_map.h gcc-12.4.0/libstdc++-v3/include/bits/stl_map.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_map.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_map.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 76,81 ****
--- 76,83 ----
     *  retrieved based on a key, in logarithmic time.
     *
     *  @ingroup associative_containers
+    *  @headerfile map
+    *  @since C++98
     *
     *  @tparam _Key  Type of key objects.
     *  @tparam  _Tp  Type of mapped objects.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_multimap.h gcc-12.4.0/libstdc++-v3/include/bits/stl_multimap.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_multimap.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_multimap.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 74,79 ****
--- 74,81 ----
     *  retrieved based on a key, in logarithmic time.
     *
     *  @ingroup associative_containers
+    *  @headerfile map
+    *  @since C++98
     *
     *  @tparam _Key  Type of key objects.
     *  @tparam  _Tp  Type of mapped objects.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_multiset.h gcc-12.4.0/libstdc++-v3/include/bits/stl_multiset.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_multiset.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_multiset.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 74,80 ****
     *  in logarithmic time.
     *
     *  @ingroup associative_containers
!    *
     *
     *  @tparam _Key  Type of key objects.
     *  @tparam _Compare  Comparison function object type, defaults to less<_Key>.
--- 74,81 ----
     *  in logarithmic time.
     *
     *  @ingroup associative_containers
!    *  @headerfile set
!    *  @since C++98
     *
     *  @tparam _Key  Type of key objects.
     *  @tparam _Compare  Comparison function object type, defaults to less<_Key>.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_numeric.h gcc-12.4.0/libstdc++-v3/include/bits/stl_numeric.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_numeric.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_numeric.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 328,337 ****
     *  @param  __last  End of input range.
     *  @param  __result  Output sums.
     *  @return  Iterator pointing just beyond the values written to result.
-    *
-    *  _GLIBCXX_RESOLVE_LIB_DEFECTS
-    *  DR 539. partial_sum and adjacent_difference should mention requirements
     */
    template
      _GLIBCXX20_CONSTEXPR
      _OutputIterator
--- 328,336 ----
     *  @param  __last  End of input range.
     *  @param  __result  Output sums.
     *  @return  Iterator pointing just beyond the values written to result.
     */
+   // _GLIBCXX_RESOLVE_LIB_DEFECTS
+   // DR 539. partial_sum and adjacent_difference should mention requirements
    template
      _GLIBCXX20_CONSTEXPR
      _OutputIterator
*************** _GLIBCXX_BEGIN_NAMESPACE_ALGO
*** 371,380 ****
     *  @param  __result  Output sum.
     *  @param  __binary_op Function object.
     *  @return  Iterator pointing just beyond the values written to result.
-    *
-    *  _GLIBCXX_RESOLVE_LIB_DEFECTS
-    *  DR 539. partial_sum and adjacent_difference should mention requirements
     */
    template
      _GLIBCXX20_CONSTEXPR
--- 370,378 ----
     *  @param  __result  Output sum.
     *  @param  __binary_op Function object.
     *  @return  Iterator pointing just beyond the values written to result.
     */
+   // _GLIBCXX_RESOLVE_LIB_DEFECTS
+   // DR 539. partial_sum and adjacent_difference should mention requirements
    template
      _GLIBCXX20_CONSTEXPR
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_pair.h gcc-12.4.0/libstdc++-v3/include/bits/stl_pair.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_pair.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_pair.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 180,185 ****
--- 180,187 ----
     *  @tparam _T2  Type of second object.
     *
     *  
+    *
+    * @headerfile utility
     */
    template
      struct pair
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 757,765 ****
--- 759,769 ----
  #if __cplusplus >= 201103L
    // Various functions which give std::pair a tuple-like interface.
  
+   /// @cond undocumented
    template
      struct __is_tuple_like_impl> : true_type
      { };
+   /// @endcond
  
    /// Partial specialization for std::pair
    template
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_set.h gcc-12.4.0/libstdc++-v3/include/bits/stl_set.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_set.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_set.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 74,79 ****
--- 74,81 ----
     *  retrieved in logarithmic time.
     *
     *  @ingroup associative_containers
+    *  @headerfile set
+    *  @since C++98
     *
     *  @tparam _Key  Type of key objects.
     *  @tparam _Compare  Comparison function object type, defaults to less<_Key>.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_tempbuf.h gcc-12.4.0/libstdc++-v3/include/bits/stl_tempbuf.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_tempbuf.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_tempbuf.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 254,259 ****
--- 254,261 ----
  	  __ucr(__first, __last, __seed);
      }
  
+ #pragma GCC diagnostic push
+ #pragma GCC diagnostic ignored "-Wdeprecated-declarations"
    template
      _Temporary_buffer<_ForwardIterator, _Tp>::
      _Temporary_buffer(_ForwardIterator __seed, size_type __original_len)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 278,283 ****
--- 280,286 ----
  	    }
  	}
      }
+ #pragma GCC diagnostic pop
  
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_tree.h gcc-12.4.0/libstdc++-v3/include/bits/stl_tree.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_tree.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_tree.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1436,1442 ****
        _M_move_assign(_Rb_tree&, false_type);
  #endif
  
! #if __cplusplus > 201402L
      public:
        /// Re-insert an extracted node.
        insert_return_type
--- 1436,1442 ----
        _M_move_assign(_Rb_tree&, false_type);
  #endif
  
! #if __cplusplus > 201404L
      public:
        /// Re-insert an extracted node.
        insert_return_type
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1454,1460 ****
  	      {
  		__ret.position
  		  = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
! 		__nh._M_ptr = nullptr;
  		__ret.inserted = true;
  	      }
  	    else
--- 1454,1460 ----
  	      {
  		__ret.position
  		  = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
! 		__nh.release();
  		__ret.inserted = true;
  	      }
  	    else
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1482,1488 ****
  	      __ret = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
  	    else
  	      __ret = _M_insert_equal_lower_node(__nh._M_ptr);
! 	    __nh._M_ptr = nullptr;
  	  }
  	return __ret;
        }
--- 1482,1488 ----
  	      __ret = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
  	    else
  	      __ret = _M_insert_equal_lower_node(__nh._M_ptr);
! 	    __nh.release();
  	  }
  	return __ret;
        }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1501,1507 ****
  	    if (__res.second)
  	      {
  		__ret = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
! 		__nh._M_ptr = nullptr;
  	      }
  	    else
  	      __ret = iterator(__res.first);
--- 1501,1507 ----
  	    if (__res.second)
  	      {
  		__ret = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
! 		__nh.release();
  	      }
  	    else
  	      __ret = iterator(__res.first);
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1524,1530 ****
  	      __ret = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
  	    else
  	      __ret = _M_insert_equal_lower_node(__nh._M_ptr);
! 	    __nh._M_ptr = nullptr;
  	  }
  	return __ret;
        }
--- 1524,1530 ----
  	      __ret = _M_insert_node(__res.first, __res.second, __nh._M_ptr);
  	    else
  	      __ret = _M_insert_equal_lower_node(__nh._M_ptr);
! 	    __nh.release();
  	  }
  	return __ret;
        }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1555,1561 ****
  	  = _Rb_tree<_Key, _Val, _KeyOfValue, _Compare2, _Alloc>;
  
        template
! 	friend class _Rb_tree_merge_helper;
  
        /// Merge from a compatible container into one with unique keys.
        template
--- 1555,1561 ----
  	  = _Rb_tree<_Key, _Val, _KeyOfValue, _Compare2, _Alloc>;
  
        template
! 	friend struct _Rb_tree_merge_helper;
  
        /// Merge from a compatible container into one with unique keys.
        template
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_uninitialized.h gcc-12.4.0/libstdc++-v3/include/bits/stl_uninitialized.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_uninitialized.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_uninitialized.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 690,695 ****
--- 690,701 ----
      inline _ForwardIterator
      __uninitialized_default_n(_ForwardIterator __first, _Size __n)
      {
+ #ifdef __cpp_lib_is_constant_evaluated
+       if (std::is_constant_evaluated())
+ 	return __uninitialized_default_n_1::
+ 		 __uninit_default_n(__first, __n);
+ #endif
+ 
        typedef typename iterator_traits<_ForwardIterator>::value_type
  	_ValueType;
        // See uninitialized_fill_n for the conditions for using std::fill_n.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stl_vector.h gcc-12.4.0/libstdc++-v3/include/bits/stl_vector.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stl_vector.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stl_vector.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 403,408 ****
--- 403,410 ----
     *  individual elements in any order.
     *
     *  @ingroup sequences
+    *  @headerfile vector
+    *  @since C++98
     *
     *  @tparam _Tp  Type of element.
     *  @tparam _Alloc  Allocator type, defaults to allocator<_Tp>.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/stream_iterator.h gcc-12.4.0/libstdc++-v3/include/bits/stream_iterator.h
*** gcc-12.3.0/libstdc++-v3/include/bits/stream_iterator.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/stream_iterator.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 77,82 ****
--- 77,83 ----
        : _M_stream(std::__addressof(__s)), _M_ok(true)
        { _M_read(); }
  
+       _GLIBCXX_CONSTEXPR
        istream_iterator(const istream_iterator& __obj)
        _GLIBCXX_NOEXCEPT_IF(is_nothrow_copy_constructible<_Tp>::value)
        : _M_stream(__obj._M_stream), _M_value(__obj._M_value),
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/unique_lock.h gcc-12.4.0/libstdc++-v3/include/bits/unique_lock.h
*** gcc-12.3.0/libstdc++-v3/include/bits/unique_lock.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/unique_lock.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 51,57 ****
--- 51,59 ----
     * to another unique_lock by move construction or move assignment. If a
     * mutex lock is owned when the destructor runs ownership will be released.
     *
+    * @headerfile mutex
     * @ingroup mutexes
+    * @since C++11
     */
    template
      class unique_lock
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/unique_ptr.h gcc-12.4.0/libstdc++-v3/include/bits/unique_ptr.h
*** gcc-12.3.0/libstdc++-v3/include/bits/unique_ptr.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/unique_ptr.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 65,72 ****
  #pragma GCC diagnostic pop
  #endif
  
!   /// Primary template of default_delete, used by unique_ptr for single objects
!   /// @since C++11
    template
      struct default_delete
      {
--- 65,75 ----
  #pragma GCC diagnostic pop
  #endif
  
!   /** Primary template of default_delete, used by unique_ptr for single objects
!    *
!    * @headerfile memory
!    * @since C++11
!    */
    template
      struct default_delete
      {
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 99,105 ****
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
    // DR 740 - omit specialization for array objects with a compile time length
  
!   /// Specialization of default_delete for arrays, used by `unique_ptr`
    template
      struct default_delete<_Tp[]>
      {
--- 102,112 ----
    // _GLIBCXX_RESOLVE_LIB_DEFECTS
    // DR 740 - omit specialization for array objects with a compile time length
  
!   /** Specialization of default_delete for arrays, used by `unique_ptr`
!    *
!    * @headerfile memory
!    * @since C++11
!    */
    template
      struct default_delete<_Tp[]>
      {
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/unordered_map.h gcc-12.4.0/libstdc++-v3/include/bits/unordered_map.h
*** gcc-12.3.0/libstdc++-v3/include/bits/unordered_map.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/unordered_map.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 78,83 ****
--- 78,85 ----
     *  with the keys.
     *
     *  @ingroup unordered_associative_containers
+    *  @headerfile unordered_map
+    *  @since C++11
     *
     *  @tparam  _Key    Type of key objects.
     *  @tparam  _Tp     Type of mapped objects.
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 1221,1226 ****
--- 1223,1230 ----
     *  values of another type with the keys.
     *
     *  @ingroup unordered_associative_containers
+    *  @headerfile unordered_map
+    *  @since C++11
     *
     *  @tparam  _Key    Type of key objects.
     *  @tparam  _Tp     Type of mapped objects.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/unordered_set.h gcc-12.4.0/libstdc++-v3/include/bits/unordered_set.h
*** gcc-12.3.0/libstdc++-v3/include/bits/unordered_set.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/unordered_set.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 75,80 ****
--- 75,82 ----
     *  the elements themselves.
     *
     *  @ingroup unordered_associative_containers
+    *  @headerfile unordered_set
+    *  @since C++11
     *
     *  @tparam  _Value  Type of key objects.
     *  @tparam  _Hash  Hashing function object type, defaults to hash<_Value>.
*************** _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*** 943,948 ****
--- 945,952 ----
     *  elements' keys are the elements themselves.
     *
     *  @ingroup unordered_associative_containers
+    *  @headerfile unordered_set
+    *  @since C++11
     *
     *  @tparam  _Value  Type of key objects.
     *  @tparam  _Hash  Hashing function object type, defaults to hash<_Value>.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/bits/utility.h gcc-12.4.0/libstdc++-v3/include/bits/utility.h
*** gcc-12.3.0/libstdc++-v3/include/bits/utility.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/bits/utility.h	Thu Jun 20 08:08:10 2024
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 163,168 ****
--- 163,171 ----
    template
      struct integer_sequence
      {
+ #if __cplusplus >= 202002L
+       static_assert(is_integral_v<_Tp>);
+ #endif
        typedef _Tp value_type;
        static constexpr size_t size() noexcept { return sizeof...(_Idx); }
      };
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 173,179 ****
  #if __has_builtin(__make_integer_seq)
        = __make_integer_seq;
  #else
!       = integer_sequence<_Tp, __integer_pack(_Num)...>;
  #endif
  
    /// Alias template index_sequence
--- 176,182 ----
  #if __has_builtin(__make_integer_seq)
        = __make_integer_seq;
  #else
!       = integer_sequence<_Tp, __integer_pack(_Tp(_Num))...>;
  #endif
  
    /// Alias template index_sequence
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/fs_ops.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/fs_ops.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/fs_ops.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/fs_ops.h	Thu Jun 20 08:08:10 2024
*************** inline namespace v1
*** 98,105 ****
    bool create_directory(const path& __p);
    bool create_directory(const path& __p, error_code& __ec) noexcept;
  
!   bool create_directory(const path& __p, const path& attributes);
!   bool create_directory(const path& __p, const path& attributes,
  			error_code& __ec) noexcept;
  
    void create_directory_symlink(const path& __to, const path& __new_symlink);
--- 98,105 ----
    bool create_directory(const path& __p);
    bool create_directory(const path& __p, error_code& __ec) noexcept;
  
!   bool create_directory(const path& __p, const path& __attributes);
!   bool create_directory(const path& __p, const path& __attributes,
  			error_code& __ec) noexcept;
  
    void create_directory_symlink(const path& __to, const path& __new_symlink);
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/fs_path.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/fs_path.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/fs_path.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/fs_path.h	Thu Jun 20 08:08:10 2024
*************** namespace __detail
*** 1049,1055 ****
      inline std::basic_string<_CharT, _Traits, _Allocator>
      path::string(const _Allocator& __a) const
      {
!       if _GLIBCXX_CONSTEXPR (is_same<_CharT, value_type>::value)
  	return { _M_pathname.begin(), _M_pathname.end(), __a };
  
        using _WString = basic_string<_CharT, _Traits, _Allocator>;
--- 1049,1055 ----
      inline std::basic_string<_CharT, _Traits, _Allocator>
      path::string(const _Allocator& __a) const
      {
!       if _GLIBCXX17_CONSTEXPR (is_same<_CharT, value_type>::value)
  	return { _M_pathname.begin(), _M_pathname.end(), __a };
  
        using _WString = basic_string<_CharT, _Traits, _Allocator>;
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/numeric_traits.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/numeric_traits.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/numeric_traits.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/numeric_traits.h	Thu Jun 20 08:08:10 2024
***************
*** 22,27 ****
--- 22,30 ----
  // see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  // .
  
+ #ifndef _GLIBCXX_EXPERIMENTAL_BITS_NUMERIC_TRAITS_H
+ #define _GLIBCXX_EXPERIMENTAL_BITS_NUMERIC_TRAITS_H
+ 
  #include 
  
  namespace std {
*************** template <>
*** 565,567 ****
--- 568,571 ----
  #endif // __FINITE_MATH_ONLY__
  
  } // namespace std
+ #endif  // _GLIBCXX_EXPERIMENTAL_BITS_NUMERIC_TRAITS_H
diff -Nrcpad gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd.h gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd.h
*** gcc-12.3.0/libstdc++-v3/include/experimental/bits/simd.h	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/include/experimental/bits/simd.h	Thu Jun 20 08:08:10 2024
***************
*** 43,49 ****
--- 43,54 ----
  #if _GLIBCXX_SIMD_X86INTRIN
  #include 
  #elif _GLIBCXX_SIMD_HAVE_NEON
+ #pragma GCC diagnostic push
+ // narrowing conversion of '__a' from 'uint64_t' {aka 'long long unsigned int'} to
+ //   'int64x1_t' {aka 'long long int'} [-Wnarrowing]
+ #pragma GCC diagnostic ignored "-Wnarrowing"
  #include 
+ #pragma GCC diagnostic pop
  #endif
  
  /** @ingroup ts_simd
*************** struct vector_aligned_tag
*** 180,189 ****
    template 
      _GLIBCXX_SIMD_INTRINSIC static constexpr _Up*
      _S_apply(_Up* __ptr)
!     {
!       return static_cast<_Up*>(
! 	__builtin_assume_aligned(__ptr, _S_alignment<_Tp, _Up>));
!     }
  };
  
  template  struct overaligned_tag
--- 185,191 ----
    template 
      _GLIBCXX_SIMD_INTRINSIC static constexpr _Up*
      _S_apply(_Up* __ptr)
!     { return static_cast<_Up*>(__builtin_assume_aligned(__ptr, _S_alignment<_Tp, _Up>)); }
  };
  
  template  struct overaligned_tag
*************** namespace __detail
*** 288,300 ****
    // expression. math_errhandling may expand to an extern symbol, in which case a constexpr value
    // must be guessed.
    template 
!     constexpr bool __handle_fpexcept_impl(int)
      { return math_errhandling & MATH_ERREXCEPT; }
  #endif
  
    // Fallback if math_errhandling doesn't work: with fast-math assume floating-point exceptions are
    // ignored, otherwise implement correct exception behavior.
!   constexpr bool __handle_fpexcept_impl(float)
    {
  #if defined __FAST_MATH__
      return false;
--- 290,304 ----
    // expression. math_errhandling may expand to an extern symbol, in which case a constexpr value
    // must be guessed.
    template 
!     constexpr bool
!     __handle_fpexcept_impl(int)
      { return math_errhandling & MATH_ERREXCEPT; }
  #endif
  
    // Fallback if math_errhandling doesn't work: with fast-math assume floating-point exceptions are
    // ignored, otherwise implement correct exception behavior.
!   constexpr bool
!   __handle_fpexcept_impl(float)
    {
  #if defined __FAST_MATH__
      return false;
*************** template 
*** 577,582 ****
--- 581,587 ----
    constexpr auto
    __int_for_sizeof()
    {
+     static_assert(_Bytes > 0);
      if constexpr (_Bytes == sizeof(int))
        return int();
    #ifdef __clang__
*************** template 
*** 609,642 ****
  	  operator&(_Ip __rhs) const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) { return __rhs._M_data[__i] & _M_data[__i]; });
  	  }
  
  	  _GLIBCXX_SIMD_INTRINSIC constexpr _Ip
  	  operator|(_Ip __rhs) const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) { return __rhs._M_data[__i] | _M_data[__i]; });
  	  }
  
  	  _GLIBCXX_SIMD_INTRINSIC constexpr _Ip
  	  operator^(_Ip __rhs) const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) { return __rhs._M_data[__i] ^ _M_data[__i]; });
  	  }
  
  	  _GLIBCXX_SIMD_INTRINSIC constexpr _Ip
  	  operator~() const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) { return ~_M_data[__i]; });
  	  }
  	};
  	return _Ip{};
        }
      else
!       static_assert(_Bytes != _Bytes, "this should be unreachable");
    }
  #pragma GCC diagnostic pop
  
--- 614,653 ----
  	  operator&(_Ip __rhs) const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		return __rhs._M_data[__i] & _M_data[__i];
! 	      });
  	  }
  
  	  _GLIBCXX_SIMD_INTRINSIC constexpr _Ip
  	  operator|(_Ip __rhs) const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		return __rhs._M_data[__i] | _M_data[__i];
! 	      });
  	  }
  
  	  _GLIBCXX_SIMD_INTRINSIC constexpr _Ip
  	  operator^(_Ip __rhs) const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		return __rhs._M_data[__i] ^ _M_data[__i];
! 	      });
  	  }
  
  	  _GLIBCXX_SIMD_INTRINSIC constexpr _Ip
  	  operator~() const
  	  {
  	    return __generate_from_n_evaluations<_Np, _Ip>(
! 	      [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return ~_M_data[__i]; });
  	  }
  	};
  	return _Ip{};
        }
      else
!       static_assert(_Bytes == 0, "this should be unreachable");
    }
  #pragma GCC diagnostic pop
  
*************** template 
*** 743,750 ****
  // __invoke_ub{{{
  template 
    [[noreturn]] _GLIBCXX_SIMD_ALWAYS_INLINE void
!   __invoke_ub([[maybe_unused]] const char* __msg,
! 	      [[maybe_unused]] const _Args&... __args)
    {
  #ifdef _GLIBCXX_DEBUG_UB
      __builtin_fprintf(stderr, __msg, __args...);
--- 754,760 ----
  // __invoke_ub{{{
  template 
    [[noreturn]] _GLIBCXX_SIMD_ALWAYS_INLINE void
!   __invoke_ub([[maybe_unused]] const char* __msg, [[maybe_unused]] const _Args&... __args)
    {
  #ifdef _GLIBCXX_DEBUG_UB
      __builtin_fprintf(stderr, __msg, __args...);
*************** class _ExactBool
*** 789,799 ****
    const bool _M_data;
  
  public:
!   _GLIBCXX_SIMD_INTRINSIC constexpr _ExactBool(bool __b) : _M_data(__b) {}
  
    _ExactBool(int) = delete;
  
!   _GLIBCXX_SIMD_INTRINSIC constexpr operator bool() const { return _M_data; }
  };
  
  // }}}
--- 799,812 ----
    const bool _M_data;
  
  public:
!   _GLIBCXX_SIMD_INTRINSIC constexpr
!   _ExactBool(bool __b) : _M_data(__b) {}
  
    _ExactBool(int) = delete;
  
!   _GLIBCXX_SIMD_INTRINSIC constexpr
!   operator bool() const
!   { return _M_data; }
  };
  
  // }}}
*************** template 
*** 1391,1397 ****
      operator^=(const _BitMask& __b) & noexcept
      {
        __execute_n_times<_S_array_size>(
! 	[&](auto __i) { _M_bits[__i] ^= __b._M_bits[__i]; });
        return *this;
      }
  
--- 1404,1410 ----
      operator^=(const _BitMask& __b) & noexcept
      {
        __execute_n_times<_S_array_size>(
! 	[&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { _M_bits[__i] ^= __b._M_bits[__i]; });
        return *this;
      }
  
*************** template 
*** 1399,1405 ****
      operator|=(const _BitMask& __b) & noexcept
      {
        __execute_n_times<_S_array_size>(
! 	[&](auto __i) { _M_bits[__i] |= __b._M_bits[__i]; });
        return *this;
      }
  
--- 1412,1418 ----
      operator|=(const _BitMask& __b) & noexcept
      {
        __execute_n_times<_S_array_size>(
! 	[&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { _M_bits[__i] |= __b._M_bits[__i]; });
        return *this;
      }
  
*************** template 
*** 1407,1413 ****
      operator&=(const _BitMask& __b) & noexcept
      {
        __execute_n_times<_S_array_size>(
! 	[&](auto __i) { _M_bits[__i] &= __b._M_bits[__i]; });
        return *this;
      }
  
--- 1420,1426 ----
      operator&=(const _BitMask& __b) & noexcept
      {
        __execute_n_times<_S_array_size>(
! 	[&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { _M_bits[__i] &= __b._M_bits[__i]; });
        return *this;
      }
  
*************** template 
*** 1482,1489 ****
  
  // else, use GNU-style builtin vector types
  template 
!   struct __vector_type_n<_Tp, _Np,
! 			 enable_if_t<__is_vectorizable_v<_Tp> && _Np >= 2>>
    {
      static constexpr size_t _S_Np2 = std::__bit_ceil(_Np * sizeof(_Tp));
  
--- 1495,1501 ----
  
  // else, use GNU-style builtin vector types
  template 
!   struct __vector_type_n<_Tp, _Np, enable_if_t<__is_vectorizable_v<_Tp> && _Np >= 2>>
    {
      static constexpr size_t _S_Np2 = std::__bit_ceil(_Np * sizeof(_Tp));
  
*************** template 
*** 1737,1754 ****
        return reinterpret_cast<_To>(__x);
      else if constexpr (__is_vector_type_v<_To> && __from_is_vectorizable)
        {
! 	using _FV [[gnu::vector_size(sizeof(_From))]] = _From;
  	return reinterpret_cast<_To>(_FV{__x});
        }
      else if constexpr (__to_is_vectorizable && __from_is_vectorizable)
        {
! 	using _TV [[gnu::vector_size(sizeof(_To))]] = _To;
! 	using _FV [[gnu::vector_size(sizeof(_From))]] = _From;
  	return reinterpret_cast<_TV>(_FV{__x})[0];
        }
      else if constexpr (__to_is_vectorizable && __is_vector_type_v<_From>)
        {
! 	using _TV [[gnu::vector_size(sizeof(_To))]] = _To;
  	return reinterpret_cast<_TV>(__x)[0];
        }
      else
--- 1749,1766 ----
        return reinterpret_cast<_To>(__x);
      else if constexpr (__is_vector_type_v<_To> && __from_is_vectorizable)
        {
! 	using _FV [[__gnu__::__vector_size__(sizeof(_From))]] = _From;
  	return reinterpret_cast<_To>(_FV{__x});
        }
      else if constexpr (__to_is_vectorizable && __from_is_vectorizable)
        {
! 	using _TV [[__gnu__::__vector_size__(sizeof(_To))]] = _To;
! 	using _FV [[__gnu__::__vector_size__(sizeof(_From))]] = _From;
  	return reinterpret_cast<_TV>(_FV{__x})[0];
        }
      else if constexpr (__to_is_vectorizable && __is_vector_type_v<_From>)
        {
! 	using _TV [[__gnu__::__vector_size__(sizeof(_To))]] = _To;
  	return reinterpret_cast<_TV>(__x)[0];
        }
      else
*************** template 
*** 1764,1771 ****
  // }}}
  // __to_intrin {{{
  template ,
! 	  typename _R
! 	  = __intrinsic_type_t>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __to_intrin(_Tp __x)
    {
--- 1776,1782 ----
  // }}}
  // __to_intrin {{{
  template ,
! 	  typename _R = __intrinsic_type_t>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __to_intrin(_Tp __x)
    {
*************** template 
    _GLIBCXX_SIMD_INTRINSIC constexpr __vector_type_t<_Tp, sizeof...(_Args)>
    __make_vector(const _Args&... __args)
!   {
!     return __vector_type_t<_Tp, sizeof...(_Args)>{static_cast<_Tp>(__args)...};
!   }
  
  // }}}
  // __vector_broadcast{{{
--- 1797,1803 ----
  template 
    _GLIBCXX_SIMD_INTRINSIC constexpr __vector_type_t<_Tp, sizeof...(_Args)>
    __make_vector(const _Args&... __args)
!   { return __vector_type_t<_Tp, sizeof...(_Args)>{static_cast<_Tp>(__args)...}; }
  
  // }}}
  // __vector_broadcast{{{
*************** template 
*** 1807,1816 ****
    template 
    _GLIBCXX_SIMD_INTRINSIC constexpr __vector_type_t<_Tp, _Np>
    __generate_vector_impl(_Gp&& __gen, index_sequence<_I...>)
!   {
!     return __vector_type_t<_Tp, _Np>{
!       static_cast<_Tp>(__gen(_SizeConstant<_I>()))...};
!   }
  
  template , typename _Gp>
    _GLIBCXX_SIMD_INTRINSIC constexpr _V
--- 1816,1822 ----
    template 
    _GLIBCXX_SIMD_INTRINSIC constexpr __vector_type_t<_Tp, _Np>
    __generate_vector_impl(_Gp&& __gen, index_sequence<_I...>)
!   { return __vector_type_t<_Tp, _Np>{ static_cast<_Tp>(__gen(_SizeConstant<_I>()))...}; }
  
  template , typename _Gp>
    _GLIBCXX_SIMD_INTRINSIC constexpr _V
*************** template ,
! 	  typename _R = __vector_type_t>
    constexpr _R
    __concat(_Tp a_, _Tp b_)
    {
--- 2029,2035 ----
  // }}}
  // __concat{{{
  template ,
! 	  typename _R = __vector_type_t>
    constexpr _R
    __concat(_Tp a_, _Tp b_)
    {
*************** template ,
! 	  typename _R = __vector_type_t>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __extract(_Tp __in)
    {
--- 2173,2179 ----
  	  int _SplitBy,
  	  typename _Tp,
  	  typename _TVT = _VectorTraits<_Tp>,
! 	  typename _R = __vector_type_t>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __extract(_Tp __in)
    {
*************** template (
! 	  __x, [](auto... __entries) {
  	    return reinterpret_cast<_R>(_Up{__entries...});
  	  });
        }
--- 2210,2216 ----
  #endif
  	constexpr int _O = _Offset * __return_width;
  	return __call_with_subscripts<__return_width, _O>(
! 	  __x, [](auto... __entries) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
  	    return reinterpret_cast<_R>(_Up{__entries...});
  	  });
        }
*************** template ::value_type>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __lo64(_Tp __x)
    {
--- 2219,2225 ----
  // }}}
  // __lo/__hi64[z]{{{
  template ::value_type>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __lo64(_Tp __x)
    {
*************** template ::value_type>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __hi64(_Tp __x)
    {
--- 2229,2235 ----
    }
  
  template ::value_type>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __hi64(_Tp __x)
    {
*************** template ::value_type>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __hi64z([[maybe_unused]] _Tp __x)
    {
--- 2240,2246 ----
    }
  
  template ::value_type>>
    _GLIBCXX_SIMD_INTRINSIC constexpr _R
    __hi64z([[maybe_unused]] _Tp __x)
    {
*************** template <>
*** 2350,2367 ****
  // the following excludes bool via __is_vectorizable
  #if _GLIBCXX_SIMD_HAVE_SSE
  template 
!   struct __intrinsic_type<_Tp, _Bytes,
! 			  enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 64>>
    {
      static_assert(!is_same_v<_Tp, long double>,
  		  "no __intrinsic_type support for long double on x86");
  
!     static constexpr size_t _S_VBytes = _Bytes <= 16   ? 16
! 					: _Bytes <= 32 ? 32
! 						       : 64;
  
      using type [[__gnu__::__vector_size__(_S_VBytes)]]
!     = conditional_t, long long int, _Tp>;
    };
  #endif // _GLIBCXX_SIMD_HAVE_SSE
  
--- 2351,2365 ----
  // the following excludes bool via __is_vectorizable
  #if _GLIBCXX_SIMD_HAVE_SSE
  template 
!   struct __intrinsic_type<_Tp, _Bytes, enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 64>>
    {
      static_assert(!is_same_v<_Tp, long double>,
  		  "no __intrinsic_type support for long double on x86");
  
!     static constexpr size_t _S_VBytes = _Bytes <= 16 ? 16 : _Bytes <= 32 ? 32 : 64;
  
      using type [[__gnu__::__vector_size__(_S_VBytes)]]
!       = conditional_t, long long int, _Tp>;
    };
  #endif // _GLIBCXX_SIMD_HAVE_SSE
  
*************** template <>
*** 2377,2391 ****
    struct __intrinsic_type
    { using type = float32x4_t; };
  
- #if _GLIBCXX_SIMD_HAVE_NEON_A64
  template <>
    struct __intrinsic_type
!   { using type = float64x1_t; };
  
  template <>
    struct __intrinsic_type
!   { using type = float64x2_t; };
  #endif
  
  #define _GLIBCXX_SIMD_ARM_INTRIN(_Bits, _Np)                                   \
  template <>                                                                    \
--- 2375,2395 ----
    struct __intrinsic_type
    { using type = float32x4_t; };
  
  template <>
    struct __intrinsic_type
!   {
! #if _GLIBCXX_SIMD_HAVE_NEON_A64
!    using type = float64x1_t;
! #endif
!   };
  
  template <>
    struct __intrinsic_type
!   {
! #if _GLIBCXX_SIMD_HAVE_NEON_A64
!     using type = float64x2_t;
  #endif
+   };
  
  #define _GLIBCXX_SIMD_ARM_INTRIN(_Bits, _Np)                                   \
  template <>                                                                    \
*************** _GLIBCXX_SIMD_ARM_INTRIN(64, 2);
*** 2407,2422 ****
  #undef _GLIBCXX_SIMD_ARM_INTRIN
  
  template 
!   struct __intrinsic_type<_Tp, _Bytes,
! 			  enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 16>>
    {
      static constexpr int _SVecBytes = _Bytes <= 8 ? 8 : 16;
      using _Ip = __int_for_sizeof_t<_Tp>;
      using _Up = conditional_t<
        is_floating_point_v<_Tp>, _Tp,
        conditional_t, make_unsigned_t<_Ip>, _Ip>>;
      static_assert(!is_same_v<_Tp, _Up> || _SVecBytes != _Bytes,
  		  "should use explicit specialization above");
      using type = typename __intrinsic_type<_Up, _SVecBytes>::type;
    };
  #endif // _GLIBCXX_SIMD_HAVE_NEON
--- 2411,2429 ----
  #undef _GLIBCXX_SIMD_ARM_INTRIN
  
  template 
!   struct __intrinsic_type<_Tp, _Bytes, enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 16>>
    {
      static constexpr int _SVecBytes = _Bytes <= 8 ? 8 : 16;
+ 
      using _Ip = __int_for_sizeof_t<_Tp>;
+ 
      using _Up = conditional_t<
        is_floating_point_v<_Tp>, _Tp,
        conditional_t, make_unsigned_t<_Ip>, _Ip>>;
+ 
      static_assert(!is_same_v<_Tp, _Up> || _SVecBytes != _Bytes,
  		  "should use explicit specialization above");
+ 
      using type = typename __intrinsic_type<_Up, _SVecBytes>::type;
    };
  #endif // _GLIBCXX_SIMD_HAVE_NEON
*************** _GLIBCXX_SIMD_PPC_INTRIN(unsigned long l
*** 2451,2473 ****
  #undef _GLIBCXX_SIMD_PPC_INTRIN
  
  template 
!   struct __intrinsic_type<_Tp, _Bytes,
! 			  enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 16>>
    {
      static constexpr bool _S_is_ldouble = is_same_v<_Tp, long double>;
      // allow _Tp == long double with -mlong-double-64
      static_assert(!(_S_is_ldouble && sizeof(long double) > sizeof(double)),
  		  "no __intrinsic_type support for 128-bit floating point on PowerPC");
  #ifndef __VSX__
      static_assert(!(is_same_v<_Tp, double>
  		    || (_S_is_ldouble && sizeof(long double) == sizeof(double))),
  		  "no __intrinsic_type support for 64-bit floating point on PowerPC w/o VSX");
  #endif
!     using type =
!       typename __intrinsic_type_impl<
! 		 conditional_t,
! 			       conditional_t<_S_is_ldouble, double, _Tp>,
! 			       __int_for_sizeof_t<_Tp>>>::type;
    };
  #endif // __ALTIVEC__
  
--- 2458,2511 ----
  #undef _GLIBCXX_SIMD_PPC_INTRIN
  
  template 
!   struct __intrinsic_type<_Tp, _Bytes, enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 16>>
    {
      static constexpr bool _S_is_ldouble = is_same_v<_Tp, long double>;
+ 
      // allow _Tp == long double with -mlong-double-64
      static_assert(!(_S_is_ldouble && sizeof(long double) > sizeof(double)),
  		  "no __intrinsic_type support for 128-bit floating point on PowerPC");
+ 
  #ifndef __VSX__
      static_assert(!(is_same_v<_Tp, double>
  		    || (_S_is_ldouble && sizeof(long double) == sizeof(double))),
  		  "no __intrinsic_type support for 64-bit floating point on PowerPC w/o VSX");
  #endif
! 
!     static constexpr auto __element_type()
!     {
!       if constexpr (is_floating_point_v<_Tp>)
! 	{
! 	  if constexpr (_S_is_ldouble)
! 	    return double {};
! 	  else
! 	    return _Tp {};
! 	}
!       else if constexpr (is_signed_v<_Tp>)
! 	{
! 	  if constexpr (sizeof(_Tp) == sizeof(_SChar))
! 	    return _SChar {};
! 	  else if constexpr (sizeof(_Tp) == sizeof(short))
! 	    return short {};
! 	  else if constexpr (sizeof(_Tp) == sizeof(int))
! 	    return int {};
! 	  else if constexpr (sizeof(_Tp) == sizeof(_LLong))
! 	    return _LLong {};
! 	}
!       else
! 	{
! 	  if constexpr (sizeof(_Tp) == sizeof(_UChar))
! 	    return _UChar {};
! 	  else if constexpr (sizeof(_Tp) == sizeof(_UShort))
! 	    return _UShort {};
! 	  else if constexpr (sizeof(_Tp) == sizeof(_UInt))
! 	    return _UInt {};
! 	  else if constexpr (sizeof(_Tp) == sizeof(_ULLong))
! 	    return _ULLong {};
! 	}
!     }
! 
!     using type = typename __intrinsic_type_impl::type;
    };
  #endif // __ALTIVEC__
  
*************** template 
*** 2483,2504 ****
      static constexpr size_t _S_full_size = sizeof(_BuiltinType) * __CHAR_BIT__;
  
      _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper
!     __as_full_vector() const { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper() = default;
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper(_BuiltinType __k)
!       : _M_data(__k) {};
  
!     _GLIBCXX_SIMD_INTRINSIC operator const _BuiltinType&() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC operator _BuiltinType&()
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC _BuiltinType __intrin() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr value_type operator[](size_t __i) const
      { return _M_data & (_BuiltinType(1) << __i); }
  
      template 
--- 2521,2549 ----
      static constexpr size_t _S_full_size = sizeof(_BuiltinType) * __CHAR_BIT__;
  
      _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper
!     __as_full_vector() const
!     { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapper() = default;
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapper(_BuiltinType __k) : _M_data(__k) {};
! 
!     _GLIBCXX_SIMD_INTRINSIC
!     operator const _BuiltinType&() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC
!     operator _BuiltinType&()
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC _BuiltinType
!     __intrin() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr value_type
!     operator[](size_t __i) const
      { return _M_data & (_BuiltinType(1) << __i); }
  
      template 
*************** template 
*** 2506,2512 ****
        operator[](_SizeConstant<__i>) const
        { return _M_data & (_BuiltinType(1) << __i); }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr void _M_set(size_t __i, value_type __x)
      {
        if (__x)
  	_M_data |= (_BuiltinType(1) << __i);
--- 2551,2558 ----
        operator[](_SizeConstant<__i>) const
        { return _M_data & (_BuiltinType(1) << __i); }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr void
!     _M_set(size_t __i, value_type __x)
      {
        if (__x)
  	_M_data |= (_BuiltinType(1) << __i);
*************** template 
*** 2514,2524 ****
  	_M_data &= ~(_BuiltinType(1) << __i);
      }
  
!     _GLIBCXX_SIMD_INTRINSIC
!     constexpr bool _M_is_constprop() const
      { return __builtin_constant_p(_M_data); }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool _M_is_constprop_none_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
--- 2560,2571 ----
  	_M_data &= ~(_BuiltinType(1) << __i);
      }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool
!     _M_is_constprop() const
      { return __builtin_constant_p(_M_data); }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool
!     _M_is_constprop_none_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
*************** template 
*** 2530,2536 ****
        return false;
      }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool _M_is_constprop_all_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
--- 2577,2584 ----
        return false;
      }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool
!     _M_is_constprop_all_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
*************** template 
    struct _SimdWrapperBase // no padding or no SNaNs
    {
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapperBase() = default;
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapperBase(_BuiltinType __init)
!       : _M_data(__init)
!     {}
  
      _BuiltinType _M_data;
    };
--- 2600,2610 ----
  template 
    struct _SimdWrapperBase // no padding or no SNaNs
    {
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapperBase() = default;
! 
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapperBase(_BuiltinType __init) : _M_data(__init) {}
  
      _BuiltinType _M_data;
    };
*************** template 
*** 2564,2573 ****
    struct _SimdWrapperBase // with padding that needs to
  					      // never become SNaN
    {
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapperBase() : _M_data() {}
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapperBase(_BuiltinType __init)
!       : _M_data(__init)
!     {}
  
      _BuiltinType _M_data;
    };
--- 2613,2623 ----
    struct _SimdWrapperBase // with padding that needs to
  					      // never become SNaN
    {
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapperBase() : _M_data() {}
! 
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapperBase(_BuiltinType __init) : _M_data(__init) {}
  
      _BuiltinType _M_data;
    };
*************** template 
*** 2606,2629 ****
      __as_full_vector() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper(initializer_list<_Tp> __init)
!       : _Base(__generate_from_n_evaluations<_Width, _BuiltinType>(
! 	[&](auto __i) { return __init.begin()[__i.value]; })) {}
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper() = default;
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper(const _SimdWrapper&)
!       = default;
!     _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper(_SimdWrapper&&) = default;
  
      _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper&
      operator=(const _SimdWrapper&) = default;
      _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper&
      operator=(_SimdWrapper&&) = default;
  
      template >,
  			     is_same<_V, __intrinsic_type_t<_Tp, _Width>>>>>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper(_V __x)
        // __vector_bitcast can convert e.g. __m128 to __vector(2) float
        : _Base(__vector_bitcast<_Tp, _Width>(__x)) {}
  
--- 2656,2688 ----
      __as_full_vector() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapper(initializer_list<_Tp> __init)
!     : _Base(__generate_from_n_evaluations<_Width, _BuiltinType>(
! 	      [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		return __init.begin()[__i.value];
! 	      })) {}
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapper() = default;
! 
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapper(const _SimdWrapper&) = default;
! 
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     _SimdWrapper(_SimdWrapper&&) = default;
  
      _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper&
      operator=(const _SimdWrapper&) = default;
+ 
      _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper&
      operator=(_SimdWrapper&&) = default;
  
      template >,
  			     is_same<_V, __intrinsic_type_t<_Tp, _Width>>>>>
!       _GLIBCXX_SIMD_INTRINSIC constexpr
!       _SimdWrapper(_V __x)
        // __vector_bitcast can convert e.g. __m128 to __vector(2) float
        : _Base(__vector_bitcast<_Tp, _Width>(__x)) {}
  
*************** template 
*** 2633,2665 ****
        _GLIBCXX_SIMD_INTRINSIC constexpr
        operator _SimdTuple<_Tp, _As...>() const
        {
! 	const auto& dd = _M_data; // workaround for GCC7 ICE
! 	return __generate_from_n_evaluations>([&](
! 	  auto __i) constexpr { return dd[int(__i)]; });
        }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr operator const _BuiltinType&() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr operator _BuiltinType&()
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr _Tp operator[](size_t __i) const
      { return _M_data[__i]; }
  
      template 
!       _GLIBCXX_SIMD_INTRINSIC constexpr _Tp operator[](_SizeConstant<__i>) const
        { return _M_data[__i]; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr void _M_set(size_t __i, _Tp __x)
!     { _M_data[__i] = __x; }
  
      _GLIBCXX_SIMD_INTRINSIC
!     constexpr bool _M_is_constprop() const
      { return __builtin_constant_p(_M_data); }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool _M_is_constprop_none_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
--- 2692,2737 ----
        _GLIBCXX_SIMD_INTRINSIC constexpr
        operator _SimdTuple<_Tp, _As...>() const
        {
! 	return __generate_from_n_evaluations>(
! 		 [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 		 { return _M_data[int(__i)]; });
        }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     operator const _BuiltinType&() const
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     operator _BuiltinType&()
      { return _M_data; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr _Tp
!     operator[](size_t __i) const
      { return _M_data[__i]; }
  
      template 
!       _GLIBCXX_SIMD_INTRINSIC constexpr _Tp
!       operator[](_SizeConstant<__i>) const
        { return _M_data[__i]; }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr void
!     _M_set(size_t __i, _Tp __x)
!     {
!       if (__builtin_is_constant_evaluated())
! 	_M_data = __generate_from_n_evaluations<_Width, _BuiltinType>([&](auto __j) {
! 		    return __j == __i ? __x : _M_data[__j()];
! 		  });
!       else
! 	_M_data[__i] = __x;
!     }
  
      _GLIBCXX_SIMD_INTRINSIC
!     constexpr bool
!     _M_is_constprop() const
      { return __builtin_constant_p(_M_data); }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool
!     _M_is_constprop_none_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
*************** template 
*** 2680,2686 ****
        return false;
      }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool _M_is_constprop_all_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
--- 2752,2759 ----
        return false;
      }
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr bool
!     _M_is_constprop_all_of() const
      {
        if (__builtin_constant_p(_M_data))
  	{
*************** template 
*** 2812,2817 ****
--- 2885,2916 ----
  } // namespace simd_abi
  
  // traits {{{1
+ template 
+   struct is_simd_flag_type
+   : false_type
+   {};
+ 
+ template <>
+   struct is_simd_flag_type
+   : true_type
+   {};
+ 
+ template <>
+   struct is_simd_flag_type
+   : true_type
+   {};
+ 
+ template 
+   struct is_simd_flag_type>
+   : __bool_constant<(_Np > 0) and __has_single_bit(_Np)>
+   {};
+ 
+ template 
+   inline constexpr bool is_simd_flag_type_v = is_simd_flag_type<_Tp>::value;
+ 
+ template >>
+   using _IsSimdFlagType = _Tp;
+ 
  // is_abi_tag {{{2
  template >
    struct is_abi_tag : false_type {};
*************** template 
!   struct rebind_simd<
!     _Tp, simd<_Up, _Abi>,
!     void_t, _Abi>>>
!   {
!     using type
!       = simd<_Tp, simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>;
!   };
  
  template 
!   struct rebind_simd<
!     _Tp, simd_mask<_Up, _Abi>,
!     void_t, _Abi>>>
!   {
!     using type
!       = simd_mask<_Tp, simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>;
!   };
  
  template 
    using rebind_simd_t = typename rebind_simd<_Tp, _V>::type;
--- 2977,2990 ----
    struct rebind_simd;
  
  template 
!   struct rebind_simd<_Tp, simd<_Up, _Abi>,
! 		     void_t, _Abi>>>
!   { using type = simd<_Tp, simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>; };
  
  template 
!   struct rebind_simd<_Tp, simd_mask<_Up, _Abi>,
! 		     void_t, _Abi>>>
!   { using type = simd_mask<_Tp, simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>; };
  
  template 
    using rebind_simd_t = typename rebind_simd<_Tp, _V>::type;
*************** template 
!   struct resize_simd<_Np, simd<_Tp, _Abi>,
! 		     void_t>>
    { using type = simd<_Tp, simd_abi::deduce_t<_Tp, _Np, _Abi>>; };
  
  template 
!   struct resize_simd<_Np, simd_mask<_Tp, _Abi>,
! 		     void_t>>
    { using type = simd_mask<_Tp, simd_abi::deduce_t<_Tp, _Np, _Abi>>; };
  
  template 
--- 2994,3004 ----
    struct resize_simd;
  
  template 
!   struct resize_simd<_Np, simd<_Tp, _Abi>, void_t>>
    { using type = simd<_Tp, simd_abi::deduce_t<_Tp, _Np, _Abi>>; };
  
  template 
!   struct resize_simd<_Np, simd_mask<_Tp, _Abi>, void_t>>
    { using type = simd_mask<_Tp, simd_abi::deduce_t<_Tp, _Np, _Abi>>; };
  
  template 
*************** template 
*** 2958,2970 ****
  
  // casts [simd.casts] {{{1
  // static_simd_cast {{{2
! template ,
! 	  typename = void>
    struct __static_simd_cast_return_type;
  
  template 
!   struct __static_simd_cast_return_type, _Up, _Ap, false,
! 					void>
    : __static_simd_cast_return_type, _Up, _Ap> {};
  
  template 
--- 3047,3057 ----
  
  // casts [simd.casts] {{{1
  // static_simd_cast {{{2
! template , typename = void>
    struct __static_simd_cast_return_type;
  
  template 
!   struct __static_simd_cast_return_type, _Up, _Ap, false, void>
    : __static_simd_cast_return_type, _Up, _Ap> {};
  
  template 
*************** template )
        return __x;
+     else if (__builtin_is_constant_evaluated())
+       return _Tp([&](auto __i) constexpr {
+ 	       return __i < simd_size_v<_Up, _Ap> ? __x[__i] : _Up();
+ 	     });
      else if constexpr (simd_size_v<_Up, _Ap> == 1)
        {
  	_Tp __r{};
*************** template 
*** 3193,3213 ****
    { return __x; }
  
  template 
!   _GLIBCXX_SIMD_INTRINSIC auto
    to_fixed_size(const simd<_Tp, _Ap>& __x)
    {
!     return simd<_Tp, simd_abi::fixed_size>>([&__x](
!       auto __i) constexpr { return __x[__i]; });
    }
  
  template 
!   _GLIBCXX_SIMD_INTRINSIC auto
    to_fixed_size(const simd_mask<_Tp, _Ap>& __x)
    {
!     constexpr int _Np = simd_mask<_Tp, _Ap>::size();
!     fixed_size_simd_mask<_Tp, _Np> __r;
!     __execute_n_times<_Np>([&](auto __i) constexpr { __r[__i] = __x[__i]; });
!     return __r;
    }
  
  // to_native {{{2
--- 3284,3302 ----
    { return __x; }
  
  template 
!   _GLIBCXX_SIMD_INTRINSIC fixed_size_simd<_Tp, simd_size_v<_Tp, _Ap>>
    to_fixed_size(const simd<_Tp, _Ap>& __x)
    {
!     using _Rp = fixed_size_simd<_Tp, simd_size_v<_Tp, _Ap>>;
!     return _Rp([&__x](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; });
    }
  
  template 
!   _GLIBCXX_SIMD_INTRINSIC fixed_size_simd_mask<_Tp, simd_size_v<_Tp, _Ap>>
    to_fixed_size(const simd_mask<_Tp, _Ap>& __x)
    {
!     return {__private_init,
! 	    [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; }};
    }
  
  // to_native {{{2
*************** template 
*** 3221,3236 ****
      return {__mem, vector_aligned};
    }
  
! template 
    _GLIBCXX_SIMD_INTRINSIC
    enable_if_t<(_Np == native_simd_mask<_Tp>::size()), native_simd_mask<_Tp>>
    to_native(const fixed_size_simd_mask<_Tp, _Np>& __x)
    {
!     return native_simd_mask<_Tp>([&](auto __i) constexpr { return __x[__i]; });
    }
  
  // to_compatible {{{2
! template 
    _GLIBCXX_SIMD_INTRINSIC enable_if_t<(_Np == simd<_Tp>::size()), simd<_Tp>>
    to_compatible(const simd<_Tp, simd_abi::fixed_size<_Np>>& __x)
    {
--- 3310,3327 ----
      return {__mem, vector_aligned};
    }
  
! template 
    _GLIBCXX_SIMD_INTRINSIC
    enable_if_t<(_Np == native_simd_mask<_Tp>::size()), native_simd_mask<_Tp>>
    to_native(const fixed_size_simd_mask<_Tp, _Np>& __x)
    {
!     return native_simd_mask<_Tp>(
! 	     __private_init,
! 	     [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; });
    }
  
  // to_compatible {{{2
! template 
    _GLIBCXX_SIMD_INTRINSIC enable_if_t<(_Np == simd<_Tp>::size()), simd<_Tp>>
    to_compatible(const simd<_Tp, simd_abi::fixed_size<_Np>>& __x)
    {
*************** template 
*** 3239,3249 ****
      return {__mem, vector_aligned};
    }
  
! template 
    _GLIBCXX_SIMD_INTRINSIC
    enable_if_t<(_Np == simd_mask<_Tp>::size()), simd_mask<_Tp>>
    to_compatible(const simd_mask<_Tp, simd_abi::fixed_size<_Np>>& __x)
!   { return simd_mask<_Tp>([&](auto __i) constexpr { return __x[__i]; }); }
  
  // masked assignment [simd_mask.where] {{{1
  
--- 3330,3344 ----
      return {__mem, vector_aligned};
    }
  
! template 
    _GLIBCXX_SIMD_INTRINSIC
    enable_if_t<(_Np == simd_mask<_Tp>::size()), simd_mask<_Tp>>
    to_compatible(const simd_mask<_Tp, simd_abi::fixed_size<_Np>>& __x)
!   {
!     return simd_mask<_Tp>(
! 	     __private_init,
! 	     [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; });
!   }
  
  // masked assignment [simd_mask.where] {{{1
  
*************** template 
*** 3276,3287 ****
  
    public:
      const_where_expression(const const_where_expression&) = delete;
      const_where_expression& operator=(const const_where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC const_where_expression(const _M& __kk, const _Tp& dd)
!       : _M_k(__kk), _M_value(const_cast<_Tp&>(dd)) {}
  
!     _GLIBCXX_SIMD_INTRINSIC _V
      operator-() const&&
      {
        return {__private_init,
--- 3371,3384 ----
  
    public:
      const_where_expression(const const_where_expression&) = delete;
+ 
      const_where_expression& operator=(const const_where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     const_where_expression(const _M& __kk, const _Tp& dd)
!     : _M_k(__kk), _M_value(const_cast<_Tp&>(dd)) {}
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _V
      operator-() const&&
      {
        return {__private_init,
*************** template 
*** 3290,3297 ****
      }
  
      template 
!       [[nodiscard]] _GLIBCXX_SIMD_INTRINSIC _V
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _Flags) const&&
        {
  	return {__private_init,
  		_Impl::_S_masked_load(__data(_M_value), __data(_M_k),
--- 3387,3394 ----
      }
  
      template 
!       [[nodiscard]] _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _V
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) const&&
        {
  	return {__private_init,
  		_Impl::_S_masked_load(__data(_M_value), __data(_M_k),
*************** template 
*** 3299,3306 ****
        }
  
      template 
!       _GLIBCXX_SIMD_INTRINSIC void
!       copy_to(_LoadStorePtr<_Up, value_type>* __mem, _Flags) const&&
        {
  	_Impl::_S_masked_store(__data(_M_value),
  			       _Flags::template _S_apply<_V>(__mem),
--- 3396,3403 ----
        }
  
      template 
!       _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!       copy_to(_LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) const&&
        {
  	_Impl::_S_masked_store(__data(_M_value),
  			       _Flags::template _S_apply<_V>(__mem),
*************** template 
*** 3320,3327 ****
      struct _Wrapper { using value_type = _V; };
  
    protected:
!     using value_type =
!       typename conditional_t, _Wrapper, _V>::value_type;
  
      _GLIBCXX_SIMD_INTRINSIC friend const _M&
      __get_mask(const const_where_expression& __x)
--- 3417,3424 ----
      struct _Wrapper { using value_type = _V; };
  
    protected:
!     using value_type
!       = typename conditional_t, _Wrapper, _V>::value_type;
  
      _GLIBCXX_SIMD_INTRINSIC friend const _M&
      __get_mask(const const_where_expression& __x)
*************** template 
*** 3338,3357 ****
      const_where_expression(const const_where_expression&) = delete;
      const_where_expression& operator=(const const_where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC const_where_expression(const bool __kk, const _Tp& dd)
!       : _M_k(__kk), _M_value(const_cast<_Tp&>(dd)) {}
  
!     _GLIBCXX_SIMD_INTRINSIC _V operator-() const&&
      { return _M_k ? -_M_value : _M_value; }
  
      template 
!       [[nodiscard]] _GLIBCXX_SIMD_INTRINSIC _V
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _Flags) const&&
        { return _M_k ? static_cast<_V>(__mem[0]) : _M_value; }
  
      template 
!       _GLIBCXX_SIMD_INTRINSIC void
!       copy_to(_LoadStorePtr<_Up, value_type>* __mem, _Flags) const&&
        {
  	if (_M_k)
  	  __mem[0] = _M_value;
--- 3435,3456 ----
      const_where_expression(const const_where_expression&) = delete;
      const_where_expression& operator=(const const_where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     const_where_expression(const bool __kk, const _Tp& dd)
!     : _M_k(__kk), _M_value(const_cast<_Tp&>(dd)) {}
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _V
!     operator-() const&&
      { return _M_k ? -_M_value : _M_value; }
  
      template 
!       [[nodiscard]] _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _V
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) const&&
        { return _M_k ? static_cast<_V>(__mem[0]) : _M_value; }
  
      template 
!       _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!       copy_to(_LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) const&&
        {
  	if (_M_k)
  	  __mem[0] = _M_value;
*************** template 
*** 3376,3393 ****
        is_same::value, "");
      static_assert(_M::size() == _Tp::size(), "");
  
!     _GLIBCXX_SIMD_INTRINSIC friend _Tp& __get_lvalue(where_expression& __x)
      { return __x._M_value; }
  
    public:
      where_expression(const where_expression&) = delete;
      where_expression& operator=(const where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC where_expression(const _M& __kk, _Tp& dd)
!       : const_where_expression<_M, _Tp>(__kk, dd) {}
  
      template 
!       _GLIBCXX_SIMD_INTRINSIC void operator=(_Up&& __x) &&
        {
  	_Impl::_S_masked_assign(__data(_M_k), __data(_M_value),
  				__to_value_type_or_member_type<_Tp>(
--- 3475,3495 ----
        is_same::value, "");
      static_assert(_M::size() == _Tp::size(), "");
  
!     _GLIBCXX_SIMD_INTRINSIC friend constexpr _Tp&
!     __get_lvalue(where_expression& __x)
      { return __x._M_value; }
  
    public:
      where_expression(const where_expression&) = delete;
      where_expression& operator=(const where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
!     where_expression(const _M& __kk, _Tp& dd)
!     : const_where_expression<_M, _Tp>(__kk, dd) {}
  
      template 
!       _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!       operator=(_Up&& __x) &&
        {
  	_Impl::_S_masked_assign(__data(_M_k), __data(_M_value),
  				__to_value_type_or_member_type<_Tp>(
*************** template 
*** 3396,3409 ****
  
  #define _GLIBCXX_SIMD_OP_(__op, __name)                                        \
    template                                                       \
!     _GLIBCXX_SIMD_INTRINSIC void operator __op##=(_Up&& __x)&&                 \
      {                                                                          \
        _Impl::template _S_masked_cassign(                                       \
  	__data(_M_k), __data(_M_value),                                        \
  	__to_value_type_or_member_type<_Tp>(static_cast<_Up&&>(__x)),          \
! 	[](auto __impl, auto __lhs, auto __rhs) constexpr {                    \
! 	return __impl.__name(__lhs, __rhs);                                    \
! 	});                                                                    \
      }                                                                          \
    static_assert(true)
      _GLIBCXX_SIMD_OP_(+, _S_plus);
--- 3498,3512 ----
  
  #define _GLIBCXX_SIMD_OP_(__op, __name)                                        \
    template                                                       \
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void                       \
!     operator __op##=(_Up&& __x)&&                                              \
      {                                                                          \
        _Impl::template _S_masked_cassign(                                       \
  	__data(_M_k), __data(_M_value),                                        \
  	__to_value_type_or_member_type<_Tp>(static_cast<_Up&&>(__x)),          \
! 	[](auto __impl, auto __lhs, auto __rhs)                                \
! 	  constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA                         \
! 	{ return __impl.__name(__lhs, __rhs); });                              \
      }                                                                          \
    static_assert(true)
      _GLIBCXX_SIMD_OP_(+, _S_plus);
*************** template 
*** 3418,3465 ****
      _GLIBCXX_SIMD_OP_(>>, _S_shift_right);
  #undef _GLIBCXX_SIMD_OP_
  
!     _GLIBCXX_SIMD_INTRINSIC void operator++() &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__increment>(__data(_M_k),
! 						       __data(_M_value));
      }
  
!     _GLIBCXX_SIMD_INTRINSIC void operator++(int) &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__increment>(__data(_M_k),
! 						       __data(_M_value));
      }
  
!     _GLIBCXX_SIMD_INTRINSIC void operator--() &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__decrement>(__data(_M_k),
! 						       __data(_M_value));
      }
  
!     _GLIBCXX_SIMD_INTRINSIC void operator--(int) &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__decrement>(__data(_M_k),
! 						       __data(_M_value));
      }
  
      // intentionally hides const_where_expression::copy_from
      template 
!       _GLIBCXX_SIMD_INTRINSIC void
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _Flags) &&
        {
! 	__data(_M_value)
! 	  = _Impl::_S_masked_load(__data(_M_value), __data(_M_k),
! 				  _Flags::template _S_apply<_Tp>(__mem));
        }
    };
  
  // where_expression {{{2
  template 
!   class where_expression : public const_where_expression
    {
      using _M = bool;
      using typename const_where_expression<_M, _Tp>::value_type;
--- 3521,3568 ----
      _GLIBCXX_SIMD_OP_(>>, _S_shift_right);
  #undef _GLIBCXX_SIMD_OP_
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator++() &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__increment>(__data(_M_k), __data(_M_value));
      }
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator++(int) &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__increment>(__data(_M_k), __data(_M_value));
      }
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator--() &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__decrement>(__data(_M_k), __data(_M_value));
      }
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator--(int) &&
      {
        __data(_M_value)
! 	= _Impl::template _S_masked_unary<__decrement>(__data(_M_k), __data(_M_value));
      }
  
      // intentionally hides const_where_expression::copy_from
      template 
!       _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) &&
        {
! 	__data(_M_value) = _Impl::_S_masked_load(__data(_M_value), __data(_M_k),
! 						 _Flags::template _S_apply<_Tp>(__mem));
        }
    };
  
  // where_expression {{{2
  template 
!   class where_expression
!   : public const_where_expression
    {
      using _M = bool;
      using typename const_where_expression<_M, _Tp>::value_type;
*************** template 
*** 3470,3481 ****
      where_expression(const where_expression&) = delete;
      where_expression& operator=(const where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC where_expression(const _M& __kk, _Tp& dd)
!       : const_where_expression<_M, _Tp>(__kk, dd) {}
  
  #define _GLIBCXX_SIMD_OP_(__op)                                                \
      template                                                     \
!       _GLIBCXX_SIMD_INTRINSIC void operator __op(_Up&& __x)&&                  \
        { if (_M_k) _M_value __op static_cast<_Up&&>(__x); }
  
      _GLIBCXX_SIMD_OP_(=)
--- 3573,3586 ----
      where_expression(const where_expression&) = delete;
      where_expression& operator=(const where_expression&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
!     where_expression(const _M& __kk, _Tp& dd)
!     : const_where_expression<_M, _Tp>(__kk, dd) {}
  
  #define _GLIBCXX_SIMD_OP_(__op)                                                \
      template                                                     \
!       _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void                     \
!       operator __op(_Up&& __x)&&                                               \
        { if (_M_k) _M_value __op static_cast<_Up&&>(__x); }
  
      _GLIBCXX_SIMD_OP_(=)
*************** template 
*** 3491,3557 ****
      _GLIBCXX_SIMD_OP_(>>=)
    #undef _GLIBCXX_SIMD_OP_
  
!     _GLIBCXX_SIMD_INTRINSIC void operator++() &&
      { if (_M_k) ++_M_value; }
  
!     _GLIBCXX_SIMD_INTRINSIC void operator++(int) &&
      { if (_M_k) ++_M_value; }
  
!     _GLIBCXX_SIMD_INTRINSIC void operator--() &&
      { if (_M_k) --_M_value; }
  
!     _GLIBCXX_SIMD_INTRINSIC void operator--(int) &&
      { if (_M_k) --_M_value; }
  
      // intentionally hides const_where_expression::copy_from
      template 
!       _GLIBCXX_SIMD_INTRINSIC void
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _Flags) &&
        { if (_M_k) _M_value = __mem[0]; }
    };
  
  // where {{{1
  template 
!   _GLIBCXX_SIMD_INTRINSIC where_expression, simd<_Tp, _Ap>>
    where(const typename simd<_Tp, _Ap>::mask_type& __k, simd<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template 
!   _GLIBCXX_SIMD_INTRINSIC
!     const_where_expression, simd<_Tp, _Ap>>
!     where(const typename simd<_Tp, _Ap>::mask_type& __k,
! 	  const simd<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template 
!   _GLIBCXX_SIMD_INTRINSIC
!     where_expression, simd_mask<_Tp, _Ap>>
!     where(const remove_const_t>& __k,
! 	  simd_mask<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template 
!   _GLIBCXX_SIMD_INTRINSIC
!     const_where_expression, simd_mask<_Tp, _Ap>>
!     where(const remove_const_t>& __k,
! 	  const simd_mask<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template 
!   _GLIBCXX_SIMD_INTRINSIC where_expression
    where(_ExactBool __k, _Tp& __value)
    { return {__k, __value}; }
  
  template 
!   _GLIBCXX_SIMD_INTRINSIC const_where_expression
    where(_ExactBool __k, const _Tp& __value)
    { return {__k, __value}; }
  
!   template 
!     void where(bool __k, simd<_Tp, _Ap>& __value) = delete;
  
!   template 
!     void where(bool __k, const simd<_Tp, _Ap>& __value) = delete;
  
  // proposed mask iterations {{{1
  namespace __proposed {
--- 3596,3666 ----
      _GLIBCXX_SIMD_OP_(>>=)
    #undef _GLIBCXX_SIMD_OP_
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator++() &&
      { if (_M_k) ++_M_value; }
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator++(int) &&
      { if (_M_k) ++_M_value; }
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator--() &&
      { if (_M_k) --_M_value; }
  
!     _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!     operator--(int) &&
      { if (_M_k) --_M_value; }
  
      // intentionally hides const_where_expression::copy_from
      template 
!       _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void
!       copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) &&
        { if (_M_k) _M_value = __mem[0]; }
    };
  
  // where {{{1
  template 
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
!   where_expression, simd<_Tp, _Ap>>
    where(const typename simd<_Tp, _Ap>::mask_type& __k, simd<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template 
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
!   const_where_expression, simd<_Tp, _Ap>>
!   where(const typename simd<_Tp, _Ap>::mask_type& __k, const simd<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template 
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
!   where_expression, simd_mask<_Tp, _Ap>>
!   where(const remove_const_t>& __k, simd_mask<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template 
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
!   const_where_expression, simd_mask<_Tp, _Ap>>
!   where(const remove_const_t>& __k, const simd_mask<_Tp, _Ap>& __value)
    { return {__k, __value}; }
  
  template 
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR where_expression
    where(_ExactBool __k, _Tp& __value)
    { return {__k, __value}; }
  
  template 
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR const_where_expression
    where(_ExactBool __k, const _Tp& __value)
    { return {__k, __value}; }
  
! template 
!   _GLIBCXX_SIMD_CONSTEXPR void
!   where(bool __k, simd<_Tp, _Ap>& __value) = delete;
  
! template 
!   _GLIBCXX_SIMD_CONSTEXPR void
!   where(bool __k, const simd<_Tp, _Ap>& __value) = delete;
  
  // proposed mask iterations {{{1
  namespace __proposed {
*************** template 
*** 3568,3577 ****
        size_t __mask;
        size_t __bit;
  
!       _GLIBCXX_SIMD_INTRINSIC void __next_bit()
        { __bit = __builtin_ctzl(__mask); }
  
!       _GLIBCXX_SIMD_INTRINSIC void __reset_lsb()
        {
  	// 01100100 - 1 = 01100011
  	__mask &= (__mask - 1);
--- 3677,3688 ----
        size_t __mask;
        size_t __bit;
  
!       _GLIBCXX_SIMD_INTRINSIC void
!       __next_bit()
        { __bit = __builtin_ctzl(__mask); }
  
!       _GLIBCXX_SIMD_INTRINSIC void
!       __reset_lsb()
        {
  	// 01100100 - 1 = 01100011
  	__mask &= (__mask - 1);
*************** template 
*** 3583,3602 ****
        iterator(const iterator&) = default;
        iterator(iterator&&) = default;
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE size_t operator->() const
        { return __bit; }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE size_t operator*() const
        { return __bit; }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE iterator& operator++()
        {
  	__reset_lsb();
  	__next_bit();
  	return *this;
        }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE iterator operator++(int)
        {
  	iterator __tmp = *this;
  	__reset_lsb();
--- 3694,3717 ----
        iterator(const iterator&) = default;
        iterator(iterator&&) = default;
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE size_t
!       operator->() const
        { return __bit; }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE size_t
!       operator*() const
        { return __bit; }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE iterator&
!       operator++()
        {
  	__reset_lsb();
  	__next_bit();
  	return *this;
        }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE iterator
!       operator++(int)
        {
  	iterator __tmp = *this;
  	__reset_lsb();
*************** template 
*** 3604,3620 ****
  	return __tmp;
        }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE bool operator==(const iterator& __rhs) const
        { return __mask == __rhs.__mask; }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE bool operator!=(const iterator& __rhs) const
        { return __mask != __rhs.__mask; }
      };
  
!     iterator begin() const
      { return __bits.to_ullong(); }
  
!     iterator end() const
      { return 0; }
    };
  
--- 3719,3739 ----
  	return __tmp;
        }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE bool
!       operator==(const iterator& __rhs) const
        { return __mask == __rhs.__mask; }
  
!       _GLIBCXX_SIMD_ALWAYS_INLINE bool
!       operator!=(const iterator& __rhs) const
        { return __mask != __rhs.__mask; }
      };
  
!     iterator
!     begin() const
      { return __bits.to_ullong(); }
  
!     iterator
!     end() const
      { return 0; }
    };
  
*************** template 
*** 3629,3643 ****
  // reductions [simd.reductions] {{{1
  template >
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _Tp
!   reduce(const simd<_Tp, _Abi>& __v,
! 	 _BinaryOperation __binary_op = _BinaryOperation())
    { return _Abi::_SimdImpl::_S_reduce(__v, __binary_op); }
  
  template >
    _GLIBCXX_SIMD_INTRINSIC typename _V::value_type
    reduce(const const_where_expression<_M, _V>& __x,
! 	 typename _V::value_type __identity_element,
! 	 _BinaryOperation __binary_op)
    {
      if (__builtin_expect(none_of(__get_mask(__x)), false))
        return __identity_element;
--- 3748,3760 ----
  // reductions [simd.reductions] {{{1
  template >
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _Tp
!   reduce(const simd<_Tp, _Abi>& __v, _BinaryOperation __binary_op = _BinaryOperation())
    { return _Abi::_SimdImpl::_S_reduce(__v, __binary_op); }
  
  template >
    _GLIBCXX_SIMD_INTRINSIC typename _V::value_type
    reduce(const const_where_expression<_M, _V>& __x,
! 	 typename _V::value_type __identity_element, _BinaryOperation __binary_op)
    {
      if (__builtin_expect(none_of(__get_mask(__x)), false))
        return __identity_element;
*************** template 
*** 3676,3691 ****
  template 
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _Tp
    hmin(const simd<_Tp, _Abi>& __v) noexcept
!   {
!     return _Abi::_SimdImpl::_S_reduce(__v, __detail::_Minimum());
!   }
  
  template 
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _Tp
    hmax(const simd<_Tp, _Abi>& __v) noexcept
!   {
!     return _Abi::_SimdImpl::_S_reduce(__v, __detail::_Maximum());
!   }
  
  template 
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
--- 3793,3804 ----
  template 
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _Tp
    hmin(const simd<_Tp, _Abi>& __v) noexcept
!   { return _Abi::_SimdImpl::_S_reduce(__v, __detail::_Minimum()); }
  
  template 
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _Tp
    hmax(const simd<_Tp, _Abi>& __v) noexcept
!   { return _Abi::_SimdImpl::_S_reduce(__v, __detail::_Maximum()); }
  
  template 
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR
*************** template 
*** 3753,3760 ****
  
  template 
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR simd<_Tp, _Ap>
!   clamp(const simd<_Tp, _Ap>& __v, const simd<_Tp, _Ap>& __lo,
! 	const simd<_Tp, _Ap>& __hi)
    {
      using _Impl = typename _Ap::_SimdImpl;
      return {__private_init,
--- 3866,3872 ----
  
  template 
    _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR simd<_Tp, _Ap>
!   clamp(const simd<_Tp, _Ap>& __v, const simd<_Tp, _Ap>& __lo, const simd<_Tp, _Ap>& __hi)
    {
      using _Impl = typename _Ap::_SimdImpl;
      return {__private_init,
*************** template 
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_CONST
    _SimdWrapper<_Tp, _Np / _Total * _Combine>
    __extract_part(const _SimdWrapper<_Tp, _Np> __x);
  
! template 
!   _GLIBCXX_SIMD_INTRINSIC auto
    __extract_part(const _SimdTuple<_Tp, _A0, _As...>& __x);
  
  // }}}
--- 3883,3894 ----
  
  // __extract_part {{{
  template 
!   _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_CONST constexpr
    _SimdWrapper<_Tp, _Np / _Total * _Combine>
    __extract_part(const _SimdWrapper<_Tp, _Np> __x);
  
! template 
!   _GLIBCXX_SIMD_INTRINSIC constexpr auto
    __extract_part(const _SimdTuple<_Tp, _A0, _As...>& __x);
  
  // }}}
*************** template 
*** 3786,3792 ****
    struct _SizeList
    {
      template 
!       static constexpr size_t _S_at(_SizeConstant<_I> = {})
        {
  	if constexpr (_I == 0)
  	  return _V0;
--- 3897,3904 ----
    struct _SizeList
    {
      template 
!       static constexpr size_t
!       _S_at(_SizeConstant<_I> = {})
        {
  	if constexpr (_I == 0)
  	  return _V0;
*************** template 
*** 3795,3801 ****
        }
  
      template 
!       static constexpr auto _S_before(_SizeConstant<_I> = {})
        {
  	if constexpr (_I == 0)
  	  return _SizeConstant<0>();
--- 3907,3914 ----
        }
  
      template 
!       static constexpr auto
!       _S_before(_SizeConstant<_I> = {})
        {
  	if constexpr (_I == 0)
  	  return _SizeConstant<0>();
*************** template 
*** 3805,3811 ****
        }
  
      template 
!       static constexpr auto _S_pop_front(_SizeConstant<_Np> = {})
        {
  	if constexpr (_Np == 0)
  	  return _SizeList();
--- 3918,3925 ----
        }
  
      template 
!       static constexpr auto
!       _S_pop_front(_SizeConstant<_Np> = {})
        {
  	if constexpr (_Np == 0)
  	  return _SizeList();
*************** template >([&](
! 	  auto __i) constexpr {
! 	  return _V([&](auto __j) constexpr {
! 	    return __x[__i * _V::size() + __j];
! 	  });
! 	});
        }
      else if constexpr (
        __is_fixed_size_abi_v<_Ap>
--- 4014,4024 ----
        }
      else if (__x._M_is_constprop())
        {
! 	return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>(
! 		 [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   return _V([&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 			     { return __x[__i * _V::size() + __j]; });
! 		 });
        }
      else if constexpr (
        __is_fixed_size_abi_v<_Ap>
*************** template * const __element_ptr
  	= reinterpret_cast*>(&__data(__x));
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&](
! 	auto __i) constexpr {
! 	return _V(__element_ptr + __i * _V::size(), vector_aligned);
!       });
  #else
        const auto& __xx = __data(__x);
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&](
! 	auto __i) constexpr {
! 	[[maybe_unused]] constexpr size_t __offset
! 	  = decltype(__i)::value * _V::size();
! 	return _V([&](auto __j) constexpr {
! 	  constexpr _SizeConstant<__j + __offset> __k;
! 	  return __xx[__k];
! 	});
!       });
  #endif
      }
    else if constexpr (is_same_v)
      {
        // normally memcpy should work here as well
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&](
! 	auto __i) constexpr { return __x[__i]; });
      }
    else
      {
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&](
! 	auto __i) constexpr {
! 	if constexpr (__is_fixed_size_abi_v)
! 	  return _V([&](auto __j) constexpr {
! 	    return __x[__i * _V::size() + __j];
! 	  });
! 	else
! 	  return _V(__private_init,
! 		    __extract_part(__data(__x)));
!       });
      }
    }
  
  // }}}
  // split(simd_mask) {{{
  template  / _V::size()>
    enable_if_t && simd_size_v == _Parts * _V::size(), array<_V, _Parts>>
    split(const simd_mask& __x)
--- 4031,4077 ----
  #ifdef _GLIBCXX_SIMD_USE_ALIASING_LOADS
        const __may_alias<_Tp>* const __element_ptr
  	= reinterpret_cast*>(&__data(__x));
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>(
! 	       [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 	       { return _V(__element_ptr + __i * _V::size(), vector_aligned); });
  #else
        const auto& __xx = __data(__x);
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>(
! 	       [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		 [[maybe_unused]] constexpr size_t __offset
! 		   = decltype(__i)::value * _V::size();
! 		 return _V([&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			  constexpr _SizeConstant<__j + __offset> __k;
! 			  return __xx[__k];
! 			});
! 	       });
  #endif
      }
    else if constexpr (is_same_v)
      {
        // normally memcpy should work here as well
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>(
! 	       [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; });
      }
    else
      {
!       return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>(
! 	       [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		 if constexpr (__is_fixed_size_abi_v)
! 		   return _V([&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			    return __x[__i * _V::size() + __j];
! 			  });
! 		 else
! 		   return _V(__private_init,
! 			     __extract_part(__data(__x)));
! 	       });
      }
    }
  
  // }}}
  // split(simd_mask) {{{
  template  / _V::size()>
    enable_if_t && simd_size_v == _Parts * _V::size(), array<_V, _Parts>>
    split(const simd_mask& __x)
*************** template >([&](
! 	  auto __i) constexpr {
! 	  constexpr size_t __offset = __i * _V::size();
! 	  return _V(__bitset_init, (__bits >> __offset).to_ullong());
! 	});
        }
      else
        {
! 	return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&](
! 	  auto __i) constexpr {
! 	  constexpr size_t __offset = __i * _V::size();
! 	  return _V(
! 	    __private_init, [&](auto __j) constexpr {
! 	      return __x[__j + __offset];
! 	    });
! 	});
        }
    }
  
--- 4087,4108 ----
      else if constexpr (_V::size() <= __CHAR_BIT__ * sizeof(_ULLong))
        {
  	const bitset __bits = __x.__to_bitset();
! 	return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>(
! 		 [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   constexpr size_t __offset = __i * _V::size();
! 		   return _V(__bitset_init, (__bits >> __offset).to_ullong());
! 		 });
        }
      else
        {
! 	return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>(
! 		 [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		   constexpr size_t __offset = __i * _V::size();
! 		   return _V(__private_init,
! 			     [&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			       return __x[__j + __offset];
! 			     });
! 		 });
        }
    }
  
*************** template ;
  
      if (__x._M_is_constprop())
!       return __generate_from_n_evaluations([&](
! 	auto __i) constexpr {
! 	using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>;
! 	constexpr size_t __offset = _SL::_S_before(__i);
! 	return _Vi([&](auto __j) constexpr { return __x[__offset + __j]; });
!       });
      else if constexpr (_Np == _N0)
        {
  	static_assert(sizeof...(_Sizes) == 1);
--- 4120,4133 ----
      using _V = __deduced_simd<_Tp, _N0>;
  
      if (__x._M_is_constprop())
!       return __generate_from_n_evaluations(
! 	       [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 		 using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>;
! 		 constexpr size_t __offset = _SL::_S_before(__i);
! 		 return _Vi([&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			  return __x[__offset + __j];
! 			});
! 	       });
      else if constexpr (_Np == _N0)
        {
  	static_assert(sizeof...(_Sizes) == 1);
*************** template * const __element_ptr
        = reinterpret_cast*>(&__x);
!     return __generate_from_n_evaluations([&](
!       auto __i) constexpr {
!       using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>;
!       constexpr size_t __offset = _SL::_S_before(__i);
!       constexpr size_t __base_align = alignof(simd<_Tp, _Ap>);
!       constexpr size_t __a
! 	= __base_align - ((__offset * sizeof(_Tp)) % __base_align);
!       constexpr size_t __b = ((__a - 1) & __a) ^ __a;
!       constexpr size_t __alignment = __b == 0 ? __a : __b;
!       return _Vi(__element_ptr + __offset, overaligned<__alignment>);
!     });
  #else
!     return __generate_from_n_evaluations([&](
!       auto __i) constexpr {
!       using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>;
!       const auto& __xx = __data(__x);
!       using _Offset = decltype(_SL::_S_before(__i));
!       return _Vi([&](auto __j) constexpr {
! 	constexpr _SizeConstant<_Offset::value + __j> __k;
! 	return __xx[__k];
!       });
!     });
  #endif
    }
  
--- 4194,4221 ----
  #ifdef _GLIBCXX_SIMD_USE_ALIASING_LOADS
      const __may_alias<_Tp>* const __element_ptr
        = reinterpret_cast*>(&__x);
!     return __generate_from_n_evaluations(
! 	     [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	       using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>;
! 	       constexpr size_t __offset = _SL::_S_before(__i);
! 	       constexpr size_t __base_align = alignof(simd<_Tp, _Ap>);
! 	       constexpr size_t __a
! 		 = __base_align - ((__offset * sizeof(_Tp)) % __base_align);
! 	       constexpr size_t __b = ((__a - 1) & __a) ^ __a;
! 	       constexpr size_t __alignment = __b == 0 ? __a : __b;
! 	       return _Vi(__element_ptr + __offset, overaligned<__alignment>);
! 	     });
  #else
!     return __generate_from_n_evaluations(
! 	     [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	       using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>;
! 	       const auto& __xx = __data(__x);
! 	       using _Offset = decltype(_SL::_S_before(__i));
! 	       return _Vi([&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 			constexpr _SizeConstant<_Offset::value + __j> __k;
! 			return __xx[__k];
! 		      });
! 	     });
  #endif
    }
  
*************** template 
    _GLIBCXX_SIMD_INTRINSIC void
!   __store_pack_of_simd(char* __mem, const simd<_Tp, _A0>& __x0,
! 		       const simd<_Tp, _As>&... __xs)
    {
      constexpr size_t __n_bytes = sizeof(_Tp) * simd_size_v<_Tp, _A0>;
      __builtin_memcpy(__mem, &__data(__x0), __n_bytes);
--- 4236,4242 ----
  // __store_pack_of_simd {{{
  template 
    _GLIBCXX_SIMD_INTRINSIC void
!   __store_pack_of_simd(char* __mem, const simd<_Tp, _A0>& __x0, const simd<_Tp, _As>&... __xs)
    {
      constexpr size_t __n_bytes = sizeof(_Tp) * simd_size_v<_Tp, _A0>;
      __builtin_memcpy(__mem, &__data(__x0), __n_bytes);
*************** template (__xs...);
      else if ((... && __xs._M_is_constprop()))
        return simd<_Tp,
! 		  simd_abi::deduce_t<_Tp, (simd_size_v<_Tp, _As> + ...)>>([&](
! 	auto __i) constexpr { return __subscript_in_pack<__i>(__xs...); });
      else
        {
  	_Rp __r{};
--- 4256,4264 ----
        return simd_cast<_Rp>(__xs...);
      else if ((... && __xs._M_is_constprop()))
        return simd<_Tp,
! 		  simd_abi::deduce_t<_Tp, (simd_size_v<_Tp, _As> + ...)>>(
! 	       [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA
! 	       { return __subscript_in_pack<__i>(__xs...); });
      else
        {
  	_Rp __r{};
*************** template  * _Np>
    concat(const array, _Np>& __x)
    {
!     return __call_with_subscripts<_Np>(__x, [](const auto&... __xs) {
!       return concat(__xs...);
!     });
    }
  
  // }}}
--- 4274,4283 ----
    _GLIBCXX_SIMD_CONSTEXPR __deduced_simd<_Tp, simd_size_v<_Tp, _Abi> * _Np>
    concat(const array, _Np>& __x)
    {
!     return __call_with_subscripts<_Np>(
! 	     __x, [](const auto&... __xs) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA {
! 	       return concat(__xs...);
! 	     });
    }
  
  // }}}
*************** template )
  	return _M_obj;
--- 4292,4299 ----
      int _M_index;
      _Up& _M_obj;
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr _ValueType
!     _M_read() const noexcept
      {
        if constexpr (is_arithmetic_v<_Up>)
  	return _M_obj;
*************** template 
!       _GLIBCXX_SIMD_INTRINSIC constexpr void _M_write(_Tp&& __x) const
        { _Accessor::_S_set(_M_obj, _M_index, static_cast<_Tp&&>(__x)); }
  
    public:
--- 4302,4309 ----
      }
  
      template 
!       _GLIBCXX_SIMD_INTRINSIC constexpr void
!       _M_write(_Tp&& __x) const
        { _Accessor::_S_set(_M_obj, _M_index, static_cast<_Tp&&>(__x)); }
  
    public:
*************** template , value_type>>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference operator=(_Tp&& __x) &&
        {
  	_M_write(static_cast<_Tp&&>(__x));
  	return {_M_obj, _M_index};
        }
  
! #define _GLIBCXX_SIMD_OP_(__op)                                                \
!     template () __op declval<_Tp>()),           \
! 	      typename = _ValuePreservingOrInt<__remove_cvref_t<_Tp>, _TT>,    \
! 	      typename = _ValuePreservingOrInt<_TT, value_type>>               \
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference                        \
!       operator __op##=(_Tp&& __x) &&                                           \
!       {                                                                        \
! 	const value_type& __lhs = _M_read();                                   \
! 	_M_write(__lhs __op __x);                                              \
! 	return {_M_obj, _M_index};                                             \
        }
      _GLIBCXX_SIMD_ALL_ARITHMETICS(_GLIBCXX_SIMD_OP_);
      _GLIBCXX_SIMD_ALL_SHIFTS(_GLIBCXX_SIMD_OP_);
--- 4313,4344 ----
  
      using value_type = _ValueType;
  
!     _GLIBCXX_SIMD_INTRINSIC
!     _SmartReference(const _SmartReference&) = delete;
  
!     _GLIBCXX_SIMD_INTRINSIC constexpr
!     operator value_type() const noexcept
      { return _M_read(); }
  
!     template , value_type>>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference
!       operator=(_Tp&& __x) &&
        {
  	_M_write(static_cast<_Tp&&>(__x));
  	return {_M_obj, _M_index};
        }
  
! #define _GLIBCXX_SIMD_OP_(__op)                                                   \
!     template () __op declval<_Tp>()), \
! 	      typename = _ValuePreservingOrInt<__remove_cvref_t<_Tp>, _TT>,       \
! 	      typename = _ValuePreservingOrInt<_TT, value_type>>                  \
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference                           \
!       operator __op##=(_Tp&& __x) &&                                              \
!       {                                                                           \
! 	const value_type& __lhs = _M_read();                                      \
! 	_M_write(__lhs __op __x);                                                 \
! 	return {_M_obj, _M_index};                                                \
        }
      _GLIBCXX_SIMD_ALL_ARITHMETICS(_GLIBCXX_SIMD_OP_);
      _GLIBCXX_SIMD_ALL_SHIFTS(_GLIBCXX_SIMD_OP_);
*************** template &>())>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference operator++() &&
        {
  	value_type __x = _M_read();
  	_M_write(++__x);
--- 4346,4354 ----
  #undef _GLIBCXX_SIMD_OP_
  
      template &>())>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference
!       operator++() &&
        {
  	value_type __x = _M_read();
  	_M_write(++__x);
*************** template &>()++)>
!       _GLIBCXX_SIMD_INTRINSIC constexpr value_type operator++(int) &&
        {
  	const value_type __r = _M_read();
  	value_type __x = __r;
--- 4356,4364 ----
        }
  
      template &>()++)>
!       _GLIBCXX_SIMD_INTRINSIC constexpr value_type
!       operator++(int) &&
        {
  	const value_type __r = _M_read();
  	value_type __x = __r;
*************** template &>())>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference operator--() &&
        {
  	value_type __x = _M_read();
  	_M_write(--__x);
--- 4367,4375 ----
        }
  
      template &>())>
!       _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference
!       operator--() &&
        {
  	value_type __x = _M_read();
  	_M_write(--__x);
*************** template &>()--)>
!       _GLIBCXX_SIMD_INTRINSIC constexpr value_type operator--(int) &&
        {
  	const value_type __r = _M_read();
  	value_type __x = __r;
--- 4377,4385 ----
        }
  
      template &>()--)>
!       _GLIBCXX_SIMD_INTRINSIC constexpr value_type
!       operator--(int) &&
        {
  	const value_type __r = _M_read();
  	value_type __x = __r;
*************** template 
*** 4339,4345 ****
  template 
    Option FlagsDescription
    -std
!       
! 	Select the C++ standard, and whether to use the base standard
! 	or GNU dialect.
!       
    
  	-fno-exceptions
        See exception-free dialect
    
  	-fno-rtti
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/appendix_contributing.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/appendix_contributing.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/appendix_contributing.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/appendix_contributing.xml	Thu Jun 20 08:08:10 2024
***************
*** 20,26 ****
  
    The GNU C++ Library is part of GCC and follows the same development model,
    so the general rules for
!   contributing
    to GCC apply. Active
    contributors are assigned maintainership responsibility, and given
    write access to the source repository. First-time contributors
--- 20,26 ----
  
    The GNU C++ Library is part of GCC and follows the same development model,
    so the general rules for
!   contributing
    to GCC apply. Active
    contributors are assigned maintainership responsibility, and given
    write access to the source repository. First-time contributors
***************
*** 64,70 ****
        
  	
  	  Peruse
! 	  the GNU
  	  Coding Standards, and chuckle when you hit the part
  	  about Using Languages Other Than C.
  	
--- 64,70 ----
        
  	
  	  Peruse
! 	  the GNU
  	  Coding Standards, and chuckle when you hit the part
  	  about Using Languages Other Than C.
  	
***************
*** 91,97 ****
    
    Assignment
  
      
!       See the legal prerequisites for all GCC contributions.
      
  
      
--- 91,97 ----
    
    Assignment
  
      
!       See the legal prerequisites for all GCC contributions.
      
  
      
***************
*** 151,162 ****
  
        
  	
! 	  A ChangeLog entry as plain text; see the various
! 	  ChangeLog files for format and content. If you are
! 	  using emacs as your editor, simply position the insertion
! 	  point at the beginning of your change and hit CX-4a to bring
! 	  up the appropriate ChangeLog entry. See--magic! Similar
! 	  functionality also exists for vi.
  	
        
  
--- 151,162 ----
  
        
  	
! 	  A ChangeLog entry as part of the Git commit message. Check
! 	  some recent commits for format and content. The
! 	  contrib/mklog.py script can be used to
! 	  generate a ChangeLog template for commit messages. See
! 	  Read-write Git access
! 	  for scripts and aliases that are useful here.
  	
        
  
***************
*** 171,177 ****
        
  	
  	  The patch itself. If you are using the Git repository use
! 	  git diff or git format-patch
  	  to produce a patch;
  	  otherwise, use diff -cp OLD NEW. If your
  	  version of diff does not support these options, then get the
--- 171,177 ----
        
  	
  	  The patch itself. If you are using the Git repository use
! 	  git show or git format-patch
  	  to produce a patch;
  	  otherwise, use diff -cp OLD NEW. If your
  	  version of diff does not support these options, then get the
***************
*** 186,191 ****
--- 186,193 ----
  	  patches and related discussion should be sent to the
  	  libstdc++ mailing list. In common with the rest of GCC,
  	  patches should also be sent to the gcc-patches mailing list.
+ 	  So you could send your email To:libstdc++@gcc.gnu.org and
+ 	  Cc:gcc-patches@gcc.gnu.org for example.
  	
        
      
*************** indicate a place that may require attent
*** 616,628 ****
        it is intended to precede the recommendations of the GNU Coding
        Standard, which can be referenced in full here:
  
!       http://www.gnu.org/prep/standards/standards.html#Formatting
  
        The rest of this is also interesting reading, but skip the "Design
        Advice" part.
  
        The GCC coding conventions are here, and are also useful:
!       http://gcc.gnu.org/codingconventions.html
  
        In addition, because it doesn't seem to be stated explicitly anywhere
        else, there is an 80 column source limit.
--- 618,630 ----
        it is intended to precede the recommendations of the GNU Coding
        Standard, which can be referenced in full here:
  
!       https://www.gnu.org/prep/standards/standards.html#Formatting
  
        The rest of this is also interesting reading, but skip the "Design
        Advice" part.
  
        The GCC coding conventions are here, and are also useful:
!       https://gcc.gnu.org/codingconventions.html
  
        In addition, because it doesn't seem to be stated explicitly anywhere
        else, there is an 80 column source limit.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/configure.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/configure.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/configure.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/configure.xml	Thu Jun 20 08:08:10 2024
***************
*** 74,82 ****
   
  
   --enable-cstdio=OPTION
!  Select a target-specific I/O package. At the moment, the only
! 	choice is to use 'stdio', a generic "C" abstraction.
! 	The default is 'stdio'. This option can change the library ABI.
       
   
  
--- 74,87 ----
   
  
   --enable-cstdio=OPTION
!  Select a target-specific I/O package. The choices are 'stdio'
!        which is a generic abstraction using POSIX file I/O APIs
!        (read, write,
!        lseek, etc.), and 'stdio_pure' which is similar
!        but only uses standard C file I/O APIs (fread,
!        fwrite, fseek, etc.).
!        The 'stdio_posix' choice is a synonym for 'stdio'.
!        The default is 'stdio'. This option can change the library ABI.
       
   
  
***************
*** 336,343 ****
  	C++ includes. If enabled (as by default), and the compiler
  	seems capable of passing the simple sanity checks thrown at
  	it, try to build stdc++.h.gch as part of the make process.
! 	In addition, this generated file is used later on (by appending 
! 	--include bits/stdc++.h  to CXXFLAGS) when running the
  	testsuite.
       
   
--- 341,348 ----
  	C++ includes. If enabled (as by default), and the compiler
  	seems capable of passing the simple sanity checks thrown at
  	it, try to build stdc++.h.gch as part of the make process.
! 	In addition, this generated file is used later on (by appending
! 	-include bits/stdc++.h to CXXFLAGS) when running the
  	testsuite.
       
   
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/evolution.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/evolution.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/evolution.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/evolution.xml	Thu Jun 20 08:08:10 2024
*************** Calling a std::bind result
*** 915,920 ****
--- 915,927 ----
    libstdc++.so.8.
  
  
+ 
+   The extension allowing containers to be instantiated with an allocator
+   that doesn't match the container's value type is no longer allowed in
+   strict () modes, only in
+    modes.
+ 
+ 
  
    
  
  
    <constant>9</constant>
*************** Calling a std::bind result
*** 998,1003 ****
--- 1005,1016 ----
    added.
  
  
+ 
+   The extension allowing containers to be instantiated with an allocator
+   that doesn't match the container's value type is no longer allowed in
+   C++20 mode, even in non-strict  mode.
+ 
+ 
  
    
  
  
    <constant>11</constant>
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2011.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2011.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2011.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2011.xml	Thu Jun 20 08:08:10 2024
*************** not in any particular release.
*** 2404,2410 ****
        30.4.4.2
        Function call_once
        Y
!       Exception support is broken on non-Linux targets.
  	See PR
  	66146.
--- 2404,2410 ----
        30.4.4.2
        Function call_once
        Y
!       Exception support is broken.
  	See PR
  	66146.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2014.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2014.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2014.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2014.xml	Thu Jun 20 08:08:10 2024
*************** not in any particular release.
*** 1390,1396 ****
        30.4.4.2
        Function call_once
        Broken
!       Exception support is broken on non-Linux targets.
  	See PR
  	66146.
--- 1390,1396 ----
        30.4.4.2
        Function call_once
        Broken
!       Exception support is broken.
  	See PR
  	66146.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2017.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2017.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2017.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2017.xml	Thu Jun 20 08:08:10 2024
*************** since C++14 and the implementation is co
*** 2505,2511 ****
        33.4.6.2
        Function call_once
        Y
!       Exception support is broken on non-Linux targets.
  	See PR
  	66146.
--- 2505,2511 ----
        33.4.6.2
        Function call_once
        Y
!       Exception support is broken.
  	See PR
  	66146.
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2020.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2020.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/status_cxx2020.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/status_cxx2020.xml	Thu Jun 20 08:08:10 2024
*************** or any notes about the implementation.
*** 251,264 ****
      
  
      
-       
          Improving Completeness Requirements for Type Traits 
        
          
          P1285R0 
        
!        Partial 
!       
      
  
      
--- 251,263 ----
      
  
      
          Improving Completeness Requirements for Type Traits 
        
          
          P1285R0 
        
!        — 
!        Most misuses are diagnosed, but not all. 
      
  
      
*************** or any notes about the implementation.
*** 542,554 ****
      
  
      
-       
         Avoid template bloat for safe_ranges in combination with ‘subrange-y’ view adaptors.
        
          
          P1739R4 
        
!        
        
      
  
--- 541,552 ----
      
  
      
         Avoid template bloat for safe_ranges in combination with ‘subrange-y’ view adaptors.
        
          
          P1739R4 
        
!        12.1 
        
      
  
*************** or any notes about the implementation.
*** 560,583 ****
      
  
      
!       
          Extending chrono to Calendars and Time Zones 
        
          
          P0355R7 
        
!       
         __cpp_lib_chrono >= 201803L 
      
  
      
-       
         Miscellaneous minor fixes for chrono 
        
          
          P1466R3 
        
!       
         __cpp_lib_chrono >= 201907L 
      
  
--- 558,580 ----
      
  
      
!       
          Extending chrono to Calendars and Time Zones 
        
          
          P0355R7 
        
!        (see Note 2) 
         __cpp_lib_chrono >= 201803L 
      
  
      
         Miscellaneous minor fixes for chrono 
        
          
          P1466R3 
        
!        (see Note 2) 
         __cpp_lib_chrono >= 201907L 
      
  
*************** or any notes about the implementation.
*** 717,729 ****
      
  
      
-       
          Update The Reference To The Unicode Standard 
        
          
          P1025R1 
        
!        
        
      
  
--- 714,725 ----
      
  
      
          Update The Reference To The Unicode Standard 
        
          
          P1025R1 
        
!        —
        
      
  
*************** or any notes about the implementation.
*** 797,809 ****
      
  
      
-       
          Comparing Unordered Containers 
        
          
          P0809R0 
        
!        
        
      
  
--- 793,804 ----
      
  
      
          Comparing Unordered Containers 
        
          
          P0809R0 
        
!        — 
        
      
  
*************** or any notes about the implementation.
*** 1030,1036 ****
          P0551R3 
        
         
!       
      
  
      
--- 1025,1031 ----
          P0551R3 
        
         
!       These changes will not be implemented.
      
  
      
*************** or any notes about the implementation.
*** 1104,1116 ****
      
  
      
-       
          Standard Library Specification in a Concepts and Contracts World 
        
          
          P0788R3 
        
!        
        
      
  
--- 1099,1110 ----
      
  
      
          Standard Library Specification in a Concepts and Contracts World 
        
          
          P0788R3 
        
!        — 
        
      
  
*************** or any notes about the implementation.
*** 1235,1247 ****
      
  
      
-       
          Cleaning up Clause 20 
        
          
          P1148R0 
        
!        
        
      
  
--- 1229,1240 ----
      
  
      
          Cleaning up Clause 20 
        
          
          P1148R0 
        
!        — 
        
      
  
*************** or any notes about the implementation.
*** 1332,1338 ****
      
  
      
-       
        
          Mandating the Standard Library:
          Clause 22 - Iterators library
--- 1325,1330 ----
*************** or any notes about the implementation.
*** 1341,1347 ****
          
          P1464R1 
        
!        
        
      
  
--- 1333,1339 ----
          
          P1464R1 
        
!        — 
        
      
  
*************** Note 1: This feature is supported in old
*** 1450,1453 ****
--- 1442,1450 ----
  (or not defined at all) until the version shown in parentheses.
  
  
+ 
+ Note 2: The C++20 calendar types are supported since 11.1,
+ time zones, UTC, formatting and parsing are not supported.
+ 
+ 
  
    
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/test.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/test.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/test.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/test.xml	Thu Jun 20 08:08:10 2024
*************** cat 27_io/objects/char/3_xin.in | a.out<
*** 749,755 ****
      be run for a specific standard (and not later standards) using an
      effective target like c++11_only. However, this means
      the test will be skipped by default (because the default mode is
!     gnu++14), and so will only run when
       or  is used
      explicitly. For tests that require a specific standard it is better to
      use a dg-options directive:
--- 749,755 ----
      be run for a specific standard (and not later standards) using an
      effective target like c++11_only. However, this means
      the test will be skipped by default (because the default mode is
!     gnu++17), and so will only run when
       or  is used
      explicitly. For tests that require a specific standard it is better to
      use a dg-options directive:
*************** cat 27_io/objects/char/3_xin.in | a.out<
*** 765,777 ****
      Similarly, tests which depend on a newer standard than the default
      must use dg-options instead of (or in addition to)
      an effective target, so that they are not skipped by default.
!     For example, tests for C++17 features should use
!     // { dg-options "-std=gnu++17" }
      before any dg-do such as:
!     // { dg-do run "c++17" }
      The dg-options directive must come first, so that
      the -std flag has already been added to the options
!     before checking the c++17 target.
        
  
  
    Examples of Test Directives
--- 765,777 ----
      Similarly, tests which depend on a newer standard than the default
      must use dg-options instead of (or in addition to)
      an effective target, so that they are not skipped by default.
!     For example, tests for C++20 features should use
!     // { dg-options "-std=gnu++20" }
      before any dg-do such as:
!     // { dg-do run { target c++20 } }
      The dg-options directive must come first, so that
      the -std flag has already been added to the options
!     before checking the c++20 effective target.
    
  
  
    Examples of Test Directives
diff -Nrcpad gcc-12.3.0/libstdc++-v3/doc/xml/manual/using.xml gcc-12.4.0/libstdc++-v3/doc/xml/manual/using.xml
*** gcc-12.3.0/libstdc++-v3/doc/xml/manual/using.xml	Mon May  8 12:14:42 2023
--- gcc-12.4.0/libstdc++-v3/doc/xml/manual/using.xml	Thu Jun 20 08:08:10 2024
***************
*** 7,13 ****
  
      
        The set of features available in the GNU C++ library is shaped by
!       several GCC
        Command Options. Options that impact libstdc++ are
        enumerated and detailed in the table below.
      
--- 7,13 ----
  
      
        The set of features available in the GNU C++ library is shaped by
!       several GCC
        Command Options. Options that impact libstdc++ are
        enumerated and detailed in the table below.
      
***************
*** 37,71 ****